Semiconductor device having hollow chamber

Abstract

The present disclosure relates to a semiconductor device (100) having a semiconductor substrate (110), an aluminum gallium nitride (AlGaN) back barrier layer (121) formed on the semiconductor substrate (110), a GaN channel layer (122) formed on the AlGaN back barrier layer (121), where a two-dimensional hole gas (2DHG) is formed at an interface (123) between the GaN channel layer (122) and the AlGaN back barrier layer (121), and a p-type doped region (101) formed on the semiconductor substrate (110) adjacent to the GaN channel layer (122) and the AlGaN back barrier layer (121). The p-type doped region (101) is configured to provide an ohmic contact to the two-dimensional hole gas formed at the interface (123) between the GaN channel layer (122) and the AlGaN back barrier layer (121). The p-type doped region (101) has magnesium as a p-type dopant. The p-type doped region (101) has one or more hollow chambers (102) extending from a top surface (101 a) of the p-type doped region (101). The hollow chambers (102) are configured to provide an escape path for hydrogen atoms formed during dopant activation of the p-type doped region (101) in the fabrication of the semiconductor device (100).

Description

[Technical Field]

[0001] The present disclosure relates to the field of semiconductor devices and power device applications. In particular, the present disclosure relates to gallium nitride (GaN) technology for power device applications. [Background technology]

[0002] A key step in GaN technology, used for power, RF (radio frequency), and LED applications, is represented by the proper activation of dopant elements within the device, and therefore the ability to form heavily doped n- and p-type regions, and ultimately, the ability to form p-n junctions. In wide-bandgap technologies like GaN, the formation of heavily doped p-type regions is particularly challenging. The first reason is that the acceptor energy levels are significantly removed from the edge of the valence band. For example, magnesium, the element traditionally used for p-type doping in GaN, has an activation energy in the range of 170–200 meV. The second reason is the complex formation of aggregates that prevent efficient dopant activation. The primary mechanism is believed to be the formation of Mg–H complexes. These complexes prevent magnesium from reaching substitutional lattice sites. Efficient dopant activation within deep trenches has significant implications for all future vertical and semi-vertical power MOSFETs in GaN technology. Aside from the details of the process flow, the key factor for successful implementation is that the p-type GaN layer inside the deep trench is fully activated, i.e., that the dopant element (Mg in this case) is properly activated. Summary of the Invention

[0003] This disclosure provides a solution for efficient activation of dopants in deep trenches.

[0004] In particular, the present disclosure provides a solution for semiconductor devices with highly doped n-type and p-type regions, especially in GaN technology.

[0005] These and other objects are achieved by the features of the independent claims. Further embodiments emerge from the dependent claims, the description and the drawings.

[0006] This disclosure presents a new technique that enables efficient dopant activation of p-type material in GaN technology, particularly suitable for use with deep trenches filled with doped materials, where conventional activation techniques are insufficient to achieve satisfactory dopant activation. The advantages of the new technique presented below can be summarized as follows: it enables efficient dopant activation within deep trenches; it can be combined with source-connected p-type deep trenches that connect a 2DHG (two-dimensional hole gas); and it enables minimization of dynamic effects and current collapse phenomena, which are currently of major concern for the successful development of GaN technology for RF and power applications. This new technique is also suitable for the realization of vertical GaN power transistors, where a buried deep p-type doped region is required for device operation.

[0007] To describe this disclosure in detail, the following terms, abbreviations, and notations will be used: GaN Gallium Nitride RF radio frequency MOSFET Metal Oxide Semiconductor Field Effect Transistor 2DHG Two-dimensional hole gas 2DEG Two-dimensional electron gas UID Unintentionally Doped HEMT High Electron Mobility Transistor RDSON On-resistance between drain and source terminals

[0008] This disclosure describes semiconductor devices based on GaN technology. GaN technology is currently being developed to replace traditional silicon technology for power electronics applications. Polarization charge is one of the key elements of GaN technology that is exploited to achieve better performance than silicon technology. A normally-off p-GaN HEMT can be represented by a silicon substrate used as a base material and a nitride-based epitaxial layer grown on the silicon substrate. This composite epitaxial layer can be composed of the following main layers: i) a nucleation layer, ii) a transition layer, iii) a carbon-doped buffer layer, iv) an intentionally undoped GaN channel layer, and v) an AlGaN barrier layer. In some special cases, the C-doped buffer and UID GaN layers can be modified by introducing a small amount of aluminum (<10%). This particular case is commonly referred to as the "back barrier approach."

[0009] In the back-barrier approach, the presence of polarization charges leads to the formation of a 2DHG (two-dimensional hole gas) at the interface between the GaN channel and the AlGaN buffer. The advantages of the AlGaN back-barrier can be summarized as follows: 1) a positive shift in the threshold voltage. Thanks to the presence of the back-barrier, higher positive values ​​of the threshold voltage can be achieved. 2) Reduction of subthreshold leakage, generally a short-channel effect. 3) The presence of a 2D hole gas can have a very beneficial effect in minimizing dynamic effects (current collapse, dynamic RDSON) in GaN technology. The main drawback of the back-barrier is that the 2DHG is effectively floating. Holes can then move left or right depending on the applied electric field, which can have a strong impact on the carrier density and electric field distribution within the device. The new technology presented in this disclosure provides a solution to avoid or at least strongly suppress this floating of the 2DHG.

[0010] Embodiments of the present disclosure describe a new technology that can alleviate the above-mentioned problems. In these embodiments, a source-connected pGaN layer can be used to connect the two-dimensional hole gas that forms at the bottom of the back barrier, thus preventing holes from remaining floating. A strong hole channel maintained at a fixed source potential offers advantages in terms of dynamic efficiency optimization for GaN technology for power and RF applications. In particular, prior to gate formation, a trench can be opened on the source side of the power device and subsequently filled with a p-type doped GaN layer during the growth of the p-GaN layer required for the gate module. Aside from the details of the process flow, a key factor for successful implementation is the complete activation of the p-type GaN layer inside the deep trench, e.g., the proper activation of the dopant element (Mg in this case) via a dedicated process step, such as annealing.

[0011] A key element for successful activation of p-type dopants is the provision of one or more hollow chambers in the p-type doped region to provide an escape path for hydrogen atoms formed during dopant activation in the p-type doped region in the fabrication of a semiconductor device.

[0012] Successful activation of Mg doping in GaN LEDs has enabled the fabrication and commercialization of blue LEDs. Efficient activation of dopants in deep trenches as presented in this disclosure has great relevance for all future vertical and semi-vertical power MOSFETs in GaN technology.

[0013] According to a first aspect, the present disclosure relates to a semiconductor device comprising: a semiconductor substrate; an aluminum gallium nitride (AlGaN) back barrier layer formed on the semiconductor substrate; a GaN channel layer formed on the AlGaN back barrier layer, wherein a two-dimensional hole gas (2DHG) is formed at an interface between the GaN channel layer and the AlGaN back barrier layer; and a p-type doped region formed on the semiconductor substrate adjacent to the GaN channel layer and the AlGaN back barrier layer, the p-type doped region having a top surface and a bottom surface opposite the top surface, the p-type doped region being configured to provide an ohmic contact to the two-dimensional hole gas formed at the interface between the GaN channel layer and the AlGaN back barrier layer, the p-type doped region having magnesium as a p-type dopant, and one or more hollow chambers extending from the top surface of the p-type doped region, the one or more hollow chambers being configured to form an escape path for hydrogen atoms formed during dopant activation of the p-type doped region in fabrication of the semiconductor device.

[0014] Such a semiconductor device with a hollow chamber provides a semiconductor device that enables efficient dopant activation, especially within a deep trench. The device can be combined with a source-connected p-type deep trench that connects a 2DHG (two-dimensional hole gas). Such a GaN semiconductor device enables minimization of dynamic effects and current collapse phenomena, which are still a major concern for the successful development of GaN technology for RF and power applications today. The semiconductor device is also suitable for realizing vertical GaN power transistors, where a buried deep p-type doped region is required for device operation.

[0015] The p-type doped region may alternatively have dopants other than magnesium (Mg), or combinations of magnesium with other dopants, although Mg is currently the most widely used element for p-type doping. Ca, Zn, or Be may alternatively be used.

[0016] In one exemplary implementation of the semiconductor device, one or more hollow chambers are filled with air or gas. This provides an optimal escape route for the generated hydrogen, since hydrogen can use air or gas as an escape medium. From an electrical standpoint, any dielectric material can be used, such as SiO2 or high-k. However, air allows H to easily escape. Therefore, alternatives to air are inferior solutions.

[0017] In one exemplary implementation of the semiconductor device, one or more hollow chambers are open to the ambient environment of the semiconductor device. To allow optimal escape of the generated hydrogen, the escape path has a good connection to the ambient environment. The chambers can be open to the atmosphere not only during the fabrication of the semiconductor device. Alternatively, the chambers can be closed and configured to serve as an escape or reservoir for the generated hydrogen.

[0018] In one exemplary implementation of the semiconductor device, dopant activation of the p-type doped region in the fabrication of the semiconductor device comprises thermal annealing in which hydrogen atoms are released. By applying thermal annealing, dopant activation can be efficiently enabled.

[0019] In one exemplary implementation of the semiconductor device, dopant activation in the p-type doped region dissociates magnesium-hydrogen complexes formed in the p-type doped region to release hydrogen and electrically activate magnesium. Dissociation of the magnesium-hydrogen complexes can efficiently release magnesium, which can provide a highly doped region. The semiconductor device can be, for example, a gallium nitride (GaN) semiconductor device. The p-type doped region 101 can form, for example, a p-type doped GaN region.

[0020] In one exemplary implementation of the semiconductor device, the activation energy for dopant activation of the p-type doped region is in the range between 160 meV and 200 meV, which allows for efficient release of magnesium, thus providing a highly doped region within the semiconductor device.

[0021] In one exemplary implementation of the semiconductor device, the p-type doped region has one or more side surfaces formed between the top surface and the bottom surface of the p-type doped region, and at least one of the one or more hollow chambers is formed in one or more side surfaces of the p-type doped region. The hollow chamber can be formed in the side surface of the p-type doped region, which can be easily connected to the ambient environment, allowing for efficient release of generated hydrogen.

[0022] In one exemplary implementation of the semiconductor device, at least one of the one or more hollow chambers is formed in a center of the p-type doped region, the hollow chamber having multiple contact areas with the p-type doped region to provide efficient release of hydrogen from the p-type doped region.

[0023] In one exemplary implementation of the semiconductor device, at least one of the one or more hollow chambers extends from at least the top surface to the bottom surface of the p-type doped region, the hollow chamber extending deep into the p-type doped region to enable efficient migration of hydrogen into the hollow chamber.

[0024] In one exemplary implementation of the semiconductor device, at least one of the one or more hollow chambers extends from a top surface of the p-type doped region into the p-type doped region, and hydrogen atoms can be efficiently released through the top surface of the p-type doped region.

[0025] In one example, the one or more hollow chambers may reach the bottom surface of the p-type doped region. In another example, the one or more hollow chambers may not reach the bottom surface of the p-type doped region, in which case the bottom of the hollow chamber may be formed by the p-type doped region.

[0026] In one exemplary implementation of the semiconductor device, the semiconductor device has a top surface and a bottom surface opposite the top surface, and a trench formed in the top surface of the semiconductor device, the trench being filled with a p-type doped material, which forms a p-type doped region, thereby enabling efficient activation of a dopant region within the trench, particularly a deep trench.

[0027] In one exemplary implementation of the semiconductor device, the semiconductor device has a source electrode forming source fingers on a top surface of the semiconductor device, the source fingers having two source finger sides and a center portion between the two source finger sides, and one or more hollow chambers formed along the source finger sides or along the source finger center portion, and a large contact area can be provided between the hollow chambers and the source fingers, which results in efficient transfer of hydrogen atoms to the surrounding environment.

[0028] In one exemplary implementation of the semiconductor device, one or more hollow chambers are formed continuously or discontinuously along the sides of two source fingers or along the center of a source finger, which provides flexible design options.

[0029] In one exemplary implementation of the semiconductor device, a p-type doped region connects the 2DHG to the source electrode to prevent the 2DHG from floating, thus effectively disabling the floating of the 2DHG.

[0030] The semiconductor device may have a transition layer formed on a semiconductor substrate. An AlGaN back barrier layer may be formed on the transition layer. The semiconductor device may have an AlGaN barrier layer formed on a GaN channel layer. A two-dimensional electron gas (2DEG) may be formed at the interface between the GaN channel layer and the AlGaN barrier layer. The semiconductor device may have a p-type doped GaN layer formed on the AlGaN barrier layer.

[0031] The p-type doped GaN layer can form a second p-type doped region of the semiconductor device, which can have one or more other hollow chambers extending from a top surface of the second p-type doped region into the second p-type doped region.

[0032] According to a second aspect, the present disclosure relates to a method for manufacturing a semiconductor device, the method including: forming a semiconductor substrate; forming an aluminum gallium nitride (AlGaN) back barrier layer on the semiconductor substrate; forming a GaN channel layer on the AlGaN back barrier layer; forming a two-dimensional hole gas (2DHG) at an interface between the GaN channel layer and the AlGaN back barrier layer; forming a p-type doped region on the semiconductor substrate adjacent to the GaN channel layer and the AlGaN back barrier layer, the p-type doped region having a top surface and a bottom surface opposite the top surface, the p-type doped region providing an ohmic contact to the two-dimensional hole gas formed at the interface between the GaN channel layer and the AlGaN back barrier layer; the p-type doped region having magnesium as a p-type dopant formed within the p-type doped region; the one or more hollow chambers extending from the top surface of the p-type doped region; dopant-activating the p-type doped region; the dopant activation resulting in formation of hydrogen atoms and releasing the hydrogen atoms through the one or more hollow chambers.

[0033] Therefore, semiconductor devices that enable efficient dopant activation, especially within deep trenches, can be efficiently fabricated. The method can be combined with the fabrication of source-connected p-type deep trenches that connect a 2DHG (two-dimensional hole gas). Such a fabrication method enables the minimization of dynamic effects and current collapse phenomena, which are still of major concern today for the successful development of GaN technology for RF and power applications. This method is also suitable for the fabrication of vertical GaN power transistors, where a buried deep p-type doped region is required for device operation.

[0034] The p-type doped region may alternatively have dopants other than magnesium, or combinations of magnesium with other dopants. [Brief explanation of the drawings]

[0035] Further embodiments of the present disclosure will be described with respect to the following figures. [Figure 1a] 1 shows a schematic cross-sectional view of a first embodiment of a semiconductor device 100 according to the present disclosure. [Figure 1b] 1 shows a schematic cross-sectional view of a second embodiment of a semiconductor device 100 according to the present disclosure. [Figure 1c] 1 shows a schematic cross-sectional view of a third embodiment of a semiconductor device 100 according to the present disclosure. [Figure 2] 1A-1C show three schematic top views according to three further embodiments of a semiconductor device 100 according to the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0036] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown, by way of illustration, specific embodiments in which the present disclosure may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims.

[0037] It is understood that comments made in connection with a described method can also apply to a corresponding device or system configured to perform that method, and vice versa. For example, if particular method steps are described, a corresponding device may include units for performing the described method steps, even if such units are not explicitly described or shown in a figure. Furthermore, it is understood that features of the various exemplary aspects described herein can be combined with each other, unless otherwise specified.

[0038] FIG. 1a shows a schematic cross-sectional view of a first embodiment of a semiconductor device 100 according to the present disclosure.

[0039] As shown in Figure 1a, a trench 103, specifically a deep trench 103, is created and then filled with a p-type doped material, for example magnesium-doped GaN. The main purpose of this doped region is to make electrical contact to the otherwise floating 2D hole gas that forms at the interface between the GaN channel and the carbon-doped buffer below it.

[0040] Due to the limited dopant activation possible for p-type dopants in the deep trench, one or more hollow chambers 102, e.g., air gaps, are introduced, as shown schematically in Figure 1a. These hollow chambers 102 or air gaps can be formed on the sides (e.g., left or right) of the trench or in the center of the trench 103. The main purpose of these openings is to create an escape path for hydrogen atoms so that they can escape during the annealing step and after the breakdown of the Mg-H complexes, allowing for better dopant activation in the deep trench.

[0041] 1a shows a semiconductor device 100 including a semiconductor substrate 110, an aluminum gallium nitride (AlGaN) back barrier layer 121 formed on the semiconductor substrate 110, a GaN channel layer 122 formed on the AlGaN back barrier layer 121, where a two-dimensional hole gas (2DHG) is formed at an interface 123 between the GaN channel layer 122 and the AlGaN back barrier layer 121, and a p-type doped region 101 formed on the semiconductor substrate 110 adjacent to the GaN channel layer 122 and the AlGaN back barrier layer 121. The p-type doped region 101 has a top surface 101a and a bottom surface 101b opposite the top surface 101a. The p-type doped region 101 is configured to provide an ohmic contact to the two-dimensional hole gas formed at the interface 123 between the GaN channel layer 122 and the AlGaN back barrier layer 121.

[0042] The p-type doped region 101 may have magnesium as a p-type dopant. The p-type doped region 101 may alternatively have a dopant other than magnesium (Mg), or a combination of magnesium with other dopants. However, Mg is the most widely used element for p-type doping. Ca, Zn, or Be may alternatively be used.

[0043] As shown in FIG. 1 a, the p-type doped region 101 has one or more hollow chambers 102 extending from a top surface 101 a of the p-type doped region 101 .

[0044] The one or more hollow chambers 102 are configured to provide an escape path for hydrogen atoms formed during dopant activation of the p-type doped region 101 in the fabrication of the semiconductor device 100 .

[0045] The one or more hollow chambers 102 can be filled with air or gas. From an electrical point of view, any dielectric material can be used, such as SiO2, high-k, etc. However, air allows H to easily escape. Therefore, air substitutes are only a poor solution.

[0046] One or more hollow chambers 102 can be open to the ambient environment of semiconductor device 100. Chambers 102 can be open to the atmosphere not only during fabrication of semiconductor device 100. Alternatively, chambers 102 can be closed and configured to act as an escape or reservoir for generated hydrogen.

[0047] Dopant activation of p-type doped region 101 in the fabrication of semiconductor device 100 may include thermal annealing in which hydrogen atoms are released.

[0048] Dopant activation of p-type doped region 101 can dissociate the magnesium-hydrogen complexes formed within p-type doped region 101 to release hydrogen and electrically activate the magnesium.

[0049] The semiconductor device 100 can be, for example, a gallium nitride (GaN) semiconductor device. The p-type doped region 101 can form, for example, a p-type doped GaN region.

[0050] The activation energy for dopant activation in p-type doped region 101 can be in the range between 160 meV and 200 meV. Other ranges can also be used, such as between 150 meV and 210 meV, or between 140 meV and 220 meV, or between 110 meV and 250 meV, or between 170 meV and 190 meV, or between 165 meV and 195 meV, as some other examples.

[0051] As shown in Figure 1a, the p-type doped region 101 may have one or more side surfaces 101c formed between the top surface 101a and the bottom surface 101b of the p-type doped region 101. At least one hollow chamber of the one or more hollow chambers 102 may be formed in one or more side surfaces 101c of the p-type doped region 101, as exemplarily shown in Figure 1b.

[0052] At least one hollow chamber of the one or more hollow chambers 102 may be formed in the center of the p-type doped region 101, as shown in FIG. 1a.

[0053] In another embodiment, at least one hollow chamber of the one or more hollow chambers 102 may be formed on one or more side surfaces 101c of the p-type doped region 101, and at least one hollow chamber of the one or more hollow chambers 102 may be formed in the center of the p-type doped region 101.

[0054] At least one hollow chamber of the one or more hollow chambers 102 may extend from at least the top surface 101a to the bottom surface 101b of the p-type doped region 101, for example as shown in Figures 1b and 1c.

[0055] At least one hollow chamber of the one or more hollow chambers 102 may extend from a top surface 101a of the p-type doped region 101 into the interior of the p-type doped region 101, as shown, for example, in Figures 1a, 1b, and 1c.

[0056] In one example, one or more hollow chambers 102 may reach the bottom surface 101b of the p-type doped region 101. In another example, one or more hollow chambers 102 may not reach the bottom surface 101b of the p-type doped region 101, in which case the bottom of the hollow chambers 102 may be formed by the p-type doped region 101.

[0057] The semiconductor device 100 may have a top surface 100a and a bottom surface 100b opposite the top surface 100a, and a trench 103 formed in the top surface 100a of the semiconductor device 100. The trench 103 may be filled with a p-type doped material, as shown in Figures 1a, 1b, and 1c, which forms a p-type doped region 101.

[0058] The semiconductor device 100 may have a source electrode 152 forming a source finger on the top surface 101 a of the semiconductor device 100, for example, as shown in Figure 2. The source finger may have two source finger sides 152 a, 152 b and a center portion 152 c between the two source finger sides 152 a, 152 b, for example, as shown in Figure 2. One or more hollow chambers 102 may be formed along the source finger sides 152 a, 152 b or along the source finger center portion 152 c, for example, as shown in Figure 2.

[0059] The one or more hollow chambers 102 may be formed continuously or discontinuously along the two source finger sides 152a, 152b or along the center portion 152c of the source finger, for example as shown in FIG.

[0060] The p-type doped region 101 can connect the 2DHG to the source electrode 152 to prevent the 2DHG from floating.

[0061] 1a, semiconductor device 100 may have a transition layer 111 formed on a semiconductor substrate 110. An AlGaN back barrier layer 121 may be formed on transition layer 111.

[0062] The semiconductor device 100 may have an AlGaN barrier layer 130 formed on the GaN channel layer 122. A two-dimensional electron gas (2DEG) may form at an interface 124 between the GaN channel layer 122 and the AlGaN barrier layer 130, as shown in FIG.

[0063] A first ohmic contact 152 for the two-dimensional electron gas can be used as a source contact, and a second ohmic contact 153 for the two-dimensional electron gas can be used as a drain contact. At the top surface 100a of the semiconductor device 100, a passivation layer 160 can cover the p-type doped region 101, the AlGaN barrier layer 130, and the two ohmic contacts 152, 153. The hollow chamber 102 can extend through the passivation layer 160. The passivation layer 160 can be a high-k dielectric, and can be made of, for example, silicon nitride (SiN), aluminum nitride (AlN), silicon oxide (SiO2), or any combination thereof.

[0064] 1a, semiconductor device 100 may have a p-type doped GaN layer 140 formed on AlGaN barrier layer 130. P-type doped GaN layer 140 may form a second p-type doped region of semiconductor device 100. This second p-type doped region may have one or more other hollow chambers (not shown in FIG. 1a) extending from a top surface of the second p-type doped region into the second p-type doped region. P-type doped GaN layer 140 may extend through passivation layer 160. Gate metal 151 may be disposed on p-type doped GaN layer 140.

[0065] FIG. 1b shows a schematic cross-sectional view of a second embodiment of a semiconductor device 100 according to the present disclosure.

[0066] The structure of the semiconductor device 100 shown in Figure 1b is the same as the semiconductor device 100 described above with respect to Figure 1a. One difference between the second embodiment and the first embodiment is that the hollow chamber 102 is not located in the center of the p-type doped region 101, but is located on a sidewall 101c of that region 101.

[0067] Another difference between the first embodiment and the second embodiment is that the at least one hollow chamber 102 extends downward from the top surface 101a of the p-type doped region 101 to the bottom surface 101b of the p-type doped region 101. In this case, the bottom of the at least one hollow chamber 102 may be formed by an AlGaN back barrier layer 121.

[0068] FIG. 1c shows a schematic cross-sectional view of a third embodiment of a semiconductor device 100 according to the present disclosure.

[0069] The structure of the semiconductor device 100 shown in Figure 1c is the same as the semiconductor device 100 described above with reference to Figure 1a. One difference between the first embodiment and the third embodiment is that the at least one hollow chamber 102 extends from the top surface 101a of the p-type doped region 101 to the bottom surface 101b of the p-type doped region 101 and downward to the AlGaN back barrier layer 121. In this case, the bottom of the at least one hollow chamber 102, and depending on the depth of the at least one hollow chamber 102, the lower part of the sidewall of the at least one hollow chamber 102 may also be formed by the AlGaN back barrier layer 121.

[0070] FIG. 2 shows three schematic top views according to three further embodiments of a semiconductor device 100 according to the present disclosure.

[0071] The structure of the semiconductor device 100 shown in Figure 2 is the same as the semiconductor device 100 described above with respect to Figure 1a. Different structures of the hollow chamber 102 are shown in these three top views.

[0072] The semiconductor device 100 may have a source electrode 152, a gate electrode 151, and a drain electrode 153. The source electrode 152 may be shaped differently, as shown in the three embodiments in FIG.

[0073] The source electrode 152 may form a source finger on the top surface 100a of the semiconductor device 100. The source finger may have two source finger sides 152a, 152b and a central portion 152c between the two source finger sides 152a, 152b, as shown in FIG.

[0074] One or more hollow chambers 102 may be formed along the source finger sides 152a, 152b or along the source finger center 152c, as shown in FIG.

[0075] One or more hollow chambers 102 can be formed continuously or discontinuously along the two source finger sides 152 a, 152 b or along the center 152 c of the source finger. The upper and middle views of Figure 2 show continuous hollow chambers 102, while the lower view of Figure 2 shows discontinuous hollow chambers 102. In this embodiment, the hollow chambers 102 can form a regular pattern. It should be understood that the hollow chambers can also form irregular patterns, or even random patterns.

[0076] As already mentioned above, the hollow chambers 102 can be introduced along the source finger sides 152 a, 152 b or along the source finger center 152 c. The hollow chambers 102 can be continuous or can be discontinuous, e.g., interrupted, e.g., as a series combination of two or more single hollow chambers 102.

[0077] The present disclosure also presents a method for manufacturing a semiconductor device 100 as shown in FIGS. 1a, 1b, 1c, and 2. FIG.

[0078] Such a method comprises: forming a semiconductor substrate 110; forming an aluminum gallium nitride (AlGaN) back barrier layer 121 on a semiconductor substrate 110; forming a GaN channel layer 122 on the AlGaN back barrier layer, and forming a two-dimensional hole gas (2DHG) at the interface 123 between the GaN channel layer 122 and the AlGaN back barrier layer 121, e.g., as described above with respect to Figure 1a; forming a p-type doped region 101 on the semiconductor substrate 110 adjacent to the GaN channel layer 122 and the AlGaN back barrier layer 121, the p-type doped region having a top surface 101a and a bottom surface 101b opposite the top surface 101a, for example as described above with respect to FIG. 1a, the p-type doped region 101 providing an ohmic contact to a two-dimensional hole gas formed at the interface between the GaN channel layer 122 and the AlGaN back barrier layer 121, the p-type doped region 101 may have magnesium as a p-type dopant; One or more hollow chambers 102 are formed within the p-type doped region 101, the one or more hollow chambers 102 extending from a top surface 101a of the p-type doped region 101, for example as described above with respect to FIG. 1a; dopant activating the p-type doped region 101, the dopant activation resulting in the formation of hydrogen atoms; and For example, hydrogen atoms are released through one or more hollow chambers 102 as described above with respect to FIG. 1a.

[0079] P-type doped region 101 may alternatively have dopants other than magnesium, or combinations of magnesium with other dopants.

[0080] Although a particular feature or aspect of the present disclosure may be disclosed with respect to only one of several implementations, such feature or aspect may be combined with one or more other features or aspects of other implementations, as may be desirable or advantageous for any given or particular application. Also, to the extent that the terms "comprise," "have," "comprise," or other variations thereof are used in either the detailed description or claims, such terms are intended to be inclusive, similar to the term "having." Also, the terms "exemplary," "for example," and "example" mean merely by way of example, rather than best or optimal. The terms "coupled" and "connected," along with their derivatives, may be used. It should be understood that these terms may be used to indicate that two elements cooperate or interact with each other, regardless of whether they are in direct physical or electrical contact or are not in direct contact with each other.

[0081] While specific aspects have been illustrated and described herein, it will be understood by those skilled in the art that various alternative and / or equivalent implementations may be substituted for the specific aspects illustrated and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the specific aspects described herein.

[0082] Although elements in the following claims are described in a particular order with corresponding labeling, the elements are not necessarily intended to be limited to being implemented in that particular order, unless the claim recitation otherwise implies a particular order for implementing some or all of the elements.

[0083] Numerous alternatives, modifications, and variations will be apparent to those skilled in the art in light of the above teachings. Of course, there are numerous applications of the present disclosure beyond those described herein, as those skilled in the art will readily recognize. While the present disclosure has been described with reference to one or more specific embodiments, those skilled in the art will recognize that numerous modifications can be made thereto without departing from the scope of the present disclosure. It is therefore to be understood that, within the scope of the appended claims and their equivalents, the present disclosure may be practiced otherwise than as specifically described herein.

Claims

1. A semiconductor device comprising: a semiconductor substrate; an aluminum gallium nitride (AlGaN) back barrier layer formed on the semiconductor substrate; a GaN channel layer formed on the AlGaN back barrier layer; a GaN channel layer in which a two-dimensional hole gas (2DHG) is formed at an interface between the GaN channel layer and the AlGaN back barrier layer; a p-type doped region formed on the semiconductor substrate adjacent to the GaN channel layer and the AlGaN back barrier layer, the p-type doped region having a top surface and a bottom surface opposite the top surface, the p-type doped region being configured to provide an ohmic contact to the two-dimensional hole gas formed at the interface between the GaN channel layer and the AlGaN back barrier layer; and the p-type doped region has magnesium as a p-type dopant; the p-type doped region having one or more hollow chambers extending from the top surface of the p-type doped region; the one or more hollow chambers are configured to provide an escape path for hydrogen atoms formed during dopant activation of the p-type doped region in fabrication of the semiconductor device. Semiconductor devices.

2. the one or more hollow chambers are filled with air or gas; The semiconductor device of claim 1 .

3. the one or more hollow chambers are open to the ambient environment of the semiconductor device; 3. The semiconductor device according to claim 1 or 2.

4. the dopant activation of the p-type doped region in the manufacture of the semiconductor device comprises thermal annealing to release the hydrogen atoms.

4. The semiconductor device according to claim 1.

5. the dopant activation of the p-type doped region dissociates magnesium-hydrogen complexes formed within the p-type doped region to release the hydrogen and electrically activate the magnesium.

5. The semiconductor device according to claim 1.

6. the activation energy for dopant activation of the p-type doped region is in the range between 160 meV and 200 meV; 6. The semiconductor device according to claim 1.

7. the p-type doped region has one or more side surfaces formed between the top surface and the bottom surface of the p-type doped region; at least one hollow chamber of the one or more hollow chambers is formed on the one or more sides of the p-type doped region; 7. The semiconductor device according to claim 1.

8. at least one hollow chamber of the one or more hollow chambers is formed in a center of the p-type doped region; 8. The semiconductor device according to claim 1.

9. at least one hollow chamber of the one or more hollow chambers extends from at least the top surface to the bottom surface of the p-type doped region; 9. The semiconductor device according to claim 1.

10. at least one hollow chamber of the one or more hollow chambers extends from the top surface of the p-type doped region into the p-type doped region; 10. The semiconductor device according to claim 1.

11. The semiconductor device is a top surface and a bottom surface opposite the top surface; a trench formed in the top surface of the semiconductor device, the trench being filled with a p-type doped material; and the p-type doped material forming the p-type doped region; 11. The semiconductor device according to claim 1.

12. The semiconductor device is a source electrode forming a source finger on the top surface of the semiconductor device, the source finger having two source finger sides and a central portion between the two source finger sides; and the one or more hollow chambers are formed along the sides of the source fingers or along the center of the source fingers; The semiconductor device of claim 11.

13. the one or more hollow chambers are formed continuously or discontinuously along the two side portions of the source fingers or along the central portion of the source fingers; The semiconductor device of claim 12.

14. The p-type doped region connects the 2DHG to a source electrode to prevent the 2DHG from floating.

14. A semiconductor device according to any one of claims 1 to 13.

15. 1. A method for manufacturing a semiconductor device, comprising: forming a semiconductor substrate; forming an aluminum gallium nitride (AlGaN) back barrier layer on the semiconductor substrate; forming a GaN channel layer on the AlGaN back barrier layer; a two-dimensional hole gas (2DHG) is formed at the interface between the GaN channel layer and the AlGaN back barrier layer; forming a p-type doped region on the semiconductor substrate adjacent to the GaN channel layer and the AlGaN back barrier layer, the p-type doped region having a top surface and a bottom surface opposite the top surface, the p-type doped region providing an ohmic contact to the two-dimensional hole gas formed at the interface between the GaN channel layer and the AlGaN back barrier layer; the p-type doped region having magnesium as a p-type dopant; forming one or more hollow chambers within the p-type doped region, the one or more hollow chambers extending from the top surface of the p-type doped region; dopant-activating the p-type doped region, the dopant activation resulting in the formation of hydrogen atoms; releasing the hydrogen atoms through the one or more hollow chambers; How to have that.

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