Light emitting device and manufacturing method thereof, display substrate

Abstract

A light-emitting device, a manufacturing method thereof, and a display substrate are provided. The light-emitting device comprises a first electrode, an electron transport layer, a light-emitting layer, a hole transport layer, and a second electrode, which are stacked in this order, and the electron transport layer includes at least one electron transport sublayer, and the electron transport sublayer closest to the light-emitting layer is a c-axis oriented electron transport sublayer, where the c-axis orientation is a direction perpendicular to the plane in which the light-emitting layer is located, and the proportion of the number of crystal grains that do not overlap with adjacent crystal grains along the direction perpendicular to the plane in which the light-emitting layer is located to the total number of crystal grains in the c-axis oriented electron transport sublayer is greater than 85%.

Description

[Technical Field]

[0001] The present disclosure relates to the field of display technology, and more particularly to a light-emitting device and a manufacturing method thereof, and a display substrate. [Background technology]

[0002] Quantum dot light-emitting diode (QLED) devices have attracted widespread attention in the display field due to their advantages of wide color gamut, self-luminescence, low start-up voltage, fast response, etc. The operating principle of a QLED device substrate is that electrons and holes are injected into both sides of the quantum dot light-emitting layer, respectively, and these electrons and holes recombine in the quantum dot light-emitting layer to form photons, which finally emit light. Summary of the Invention [Means for solving the problem]

[0003] In one embodiment, a light-emitting device is provided, comprising a first electrode, an electron transport layer, a light-emitting layer, a hole transport layer, and a second electrode, which are stacked in this order, the electron transport layer including at least one electron transport sublayer, the electron transport sublayer closest to the light-emitting layer being a c-axis oriented electron transport sublayer, the c-axis orientation being a direction perpendicular to a plane in which the light-emitting layer is located, and the proportion of the number of crystal grains in the c-axis oriented electron transport sublayer that do not overlap with adjacent crystal grains along the direction perpendicular to the plane in which the light-emitting layer is located to the total number of crystal grains is greater than 85%.

[0004] In some embodiments, in the c-axis oriented electron transport sublayer, the percentage of the total number of crystal grains in which the spacing between adjacent crystal grains is smaller than the dimension of the crystal grain itself in a first direction is greater than 50%, and the first direction is parallel to the plane in which the light emitting layer is located.

[0005] In some embodiments, the electron transport layer is composed of one electron transport sublayer, the electron transport sublayer is a c-axis oriented electron transport sublayer, and the thickness of the c-axis oriented electron transport sublayer is 30 nm to 90 nm.

[0006] In some embodiments, the electron transport layer is composed of two electron transport sublayers, and the electron transport sublayer closer to the light-emitting layer is a c-axis oriented electron transport sublayer, and the electron transport sublayer farther from the light-emitting layer is a non-c-axis oriented electron transport sublayer, and each of the electron transport sublayers has a thickness of 15 nm to 40 nm.

[0007] In some embodiments, the electron transport layer includes at least three electron transport sublayers, and of the at least three electron transport layers, the electron transport sublayer closest to the light-emitting layer is a c-axis oriented electron transport sublayer, the electron transport sublayer closest to the first electrode is a c-axis oriented electron transport sublayer or a non-c-axis oriented electron transport sublayer, and the electron transport sublayer disposed between the electron transport sublayer closest to the light-emitting layer and the electron transport sublayer closest to the first electrode is a non-c-axis oriented electron transport sublayer.

[0008] In some embodiments, the electron transport layer is composed of three transport sub-layers, and each of the electron transport sub-layers in the electron transport layer has a thickness of 10 nm to 30 nm.

[0009] In some embodiments, the ratio of the thickness of the middle electron transport sublayer among the three electron transport sublayers to the total thickness of the electron transport layers ranges from 0.25 to 0.35.

[0010] In some embodiments, the electron transport sublayer closest to the first electrode is a c-axis oriented electron transport sublayer, and the c-axis oriented electron transport sublayer closest to the light-emitting layer has a greater degree of c-axis orientation than the c-axis oriented electron transport sublayer closest to the first electrode.

[0011] In some embodiments, the same atoms contained in the material of each of the electron transport sublayers are oxygen atoms and zinc atoms.

[0012] In some embodiments, the electron transport layer comprises at least two electron transport sublayers, and the electron transport sublayer closest to the light-emitting layer has a lower oxygen vacancy than the other electron transport sublayers.

[0013] In some embodiments, the oxygen vacancy of the electron transport sublayer closest to the light-emitting layer is 5% to 25% lower than the oxygen vacancy of the other electron transport sublayers.

[0014] In some embodiments, the LUMO energy level of the electron transporting sublayer closest to the emissive layer is closer to the LUMO energy level of the emissive layer than the LUMO energy levels of the other electron transporting sublayers.

[0015] In some embodiments, the electron transport layer comprises three electron transport layers, and an intermediate electron transport sub-layer comprises doping atoms and an organic polymer material, the doping atoms comprising at least one of magnesium and gallium, and the organic polymer material comprising boron nitride.

[0016] In some embodiments, the conduction band energy level of an electron transport sublayer that includes doping atoms is shallower than the conduction band energy level of an electron transport sublayer that does not include doping atoms.

[0017] In some embodiments, the material of the electron transport layer is at least one inorganic material, and no ligand material is provided in any of the electron transport sublayers of the electron transport layer.

[0018] In some embodiments, an intermediate layer is disposed between the light-emitting layer and the electron-transporting sublayer closest to the light-emitting layer, and the material of the intermediate layer is an organic material or a polymer, and the material of the intermediate layer fills the pores between adjacent crystal grains of the electron-transporting sublayer closest to the light-emitting layer.

[0019] In some embodiments, the light-emitting device has a transposed structure, and each electron transport sublayer in the electron transport layer has a surface roughness of 0.5 nm to 2 nm on the side away from the first electrode; or the light-emitting device has an upright structure, and each electron transport sublayer in the electron transport layer has a surface roughness of 0.5 nm to 2 nm on the side away from the second electrode.

[0020] In another aspect, there is provided a method for manufacturing a light-emitting device, the method comprising the steps of: forming a first electrode, forming an electron transport layer on the first electrode, forming a light-emitting layer on the electron transport layer, forming a hole transport layer on the light-emitting layer, and forming a second electrode on the hole transport layer; or forming a second electrode, forming a hole transport layer on the second electrode, forming a light-emitting layer on the hole transport layer, forming an electron transport layer on the light-emitting layer, and forming a first electrode on the electron transport layer, wherein the electron transport layer includes at least one electron transport sublayer, and the electron transport sublayer closest to the light-emitting layer is c-axis oriented, the c-axis orientation being perpendicular to a plane in which the light-emitting layer is located, and the proportion of crystal grains in the c-axis oriented electron transport sublayer that do not overlap with adjacent crystal grains along the direction perpendicular to the plane in which the light-emitting layer is located is greater than 85% of the total crystal grains.

[0021] In some embodiments, forming the electron transport layer closest to the light emitting layer includes forming the c-axis oriented electron transport sub-layer using a magnetron sputtering process.

[0022] In some embodiments, the light-emitting layer, the first electrode, or the formed electron transport sublayer is a base for an electron transport sublayer formed in a subsequent step, and forming a non-C-axis oriented electron transport sublayer on the base includes depositing a material for the electron transport sublayer on the base using a magnetron sputtering process when the temperature of the base is a third temperature, where the third temperature is a base temperature that allows the material to form a non-C-axis orientation, to form a non-C-axis oriented electron transport sublayer, and forming a C-axis oriented electron transport sublayer on the base includes depositing a material for the electron transport sublayer on the base using a magnetron sputtering process when the temperature of the base is a first temperature. or a step of depositing an electron transport layer material on the base at a first temperature to form a C-axis oriented electron transport sublayer, where the first temperature is a base temperature at which the material can form a C-axis orientation, or a step of depositing an electron transport layer material on the base at a second temperature using a magnetron sputtering process and annealing the electron transport layer material to form a C-axis oriented electron transport sublayer, where the second temperature is a base temperature at which the deposited material can form a C-axis orientation, wherein the first temperature is room temperature, the second temperature is 200-500°C, and the third temperature is 100°C.

[0023] In some embodiments, the light-emitting layer, the first electrode, or the formed electron transport sublayer is a base for an electron transport sublayer to be formed in a subsequent step, and forming a non-C-axis oriented electron transport sublayer on the base further comprises depositing a material for the electron transport sublayer on the base using a magnetron sputtering process at a first sputtering power to form a non-C-axis oriented electron transport sublayer, where the first sputtering power is a sputtering power that can form a non-C-axis orientation in the material; and forming a C-axis oriented electron transport sublayer on the base comprises depositing a material for the electron transport sublayer on the base using a magnetron sputtering process at a second sputtering power to form a C-axis oriented electron transport sublayer, where the second sputtering power is a sputtering power that can form a C-axis orientation in the material.

[0024] The first sputtering power is greater than the second sputtering power.

[0025] In another aspect, there is provided a display substrate comprising a plurality of light-emitting elements according to any of the above embodiments.

[0026] In some embodiments, the display substrate further comprises a substrate and a pixel definition layer disposed on one side of the substrate, the pixel definition layer including a plurality of openings, the first electrodes of the plurality of light-emitting elements being located between the substrate and the pixel definition layer, each opening exposing at least a portion of the first electrode of one light-emitting element, the electron transport layer, the light-emitting layer, the hole transport layer, and the second electrode of the light-emitting element being sequentially stacked on the first electrode and being located within the openings, the electron transport layer of the light-emitting element being located within the openings, and the electron transport layers of the plurality of light-emitting elements are not in contact with each other; or the display substrate further comprises an electron transport film layer disposed on the pixel definition layer and the first electrodes of the plurality of light-emitting elements away from the substrate, the portions of the electron transport film layer located within the plurality of openings being the electron transport layers of the plurality of light-emitting elements, the electron transport layer of each light-emitting element including a first portion located on one side of the light-emitting layer and a second portion located on a sidewall of the opening, and the electron transport layers of the plurality of light-emitting elements being in contact with each other.

[0027] In some embodiments, the display substrate further comprises a substrate and a pixel definition layer disposed on one side of the substrate, the pixel definition layer including a plurality of openings, the second electrodes of the plurality of light-emitting elements being located between the substrate and the pixel definition layer, each opening exposing at least a portion of the second electrode of one light-emitting element, the hole transport layer, the light-emitting layer, the electron transport layer, and the first electrode of the light-emitting element being sequentially stacked on the second electrode and being located within the openings, the electron transport layer of the light-emitting element being located within the openings, and the electron transport layers of the plurality of light-emitting elements are not in contact with each other; or the display substrate further comprises an electron transport film layer disposed on the pixel definition layer and the light-emitting layers of the plurality of light-emitting elements away from the substrate, the portions of the electron transport film layer located within the plurality of openings being the electron transport layers of the plurality of light-emitting elements, the electron transport layer of each light-emitting element including a first portion located on one side of the light-emitting layer and a second portion located on a sidewall of the opening, and the electron transport layers of the plurality of light-emitting elements being in contact with each other. [Brief explanation of the drawings]

[0028] In order to more clearly explain the technical solutions according to the present disclosure, the drawings used in some embodiments of the present disclosure will be briefly described below. It is clear that the drawings in the following description are only a portion of the drawings in some embodiments of the present disclosure. Those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings in the following description may be considered as schematic diagrams, and are not intended to limit the actual dimensions of the products, the actual flow of the methods, the actual timing of the signals, etc., according to the embodiments of the present disclosure. [Figure 1A] 1 is a structural diagram of a light-emitting element in a normal position according to some embodiments of the present disclosure. [Figure 1B] 10A and 10B are structural diagrams of other inverted light-emitting devices according to some embodiments of the present disclosure. [Figure 1C] FIG. 10 is a structural diagram of yet another light-emitting device in a normal position according to some embodiments of the present disclosure. [Figure 1D] FIG. 10 is a structural diagram of yet another light-emitting device transposition according to some embodiments of the present disclosure. [Figure 2A] FIG. 1 shows XRD test results of amorphous electron transport layers according to some examples of the present disclosure. [Figure 2B] FIG. 1 shows XRD results for a c-axis oriented electron transport sublayer according to some embodiments of the present disclosure. [Figure 2C] FIG. 1 shows AFM test results for a c-axis oriented electron transport sublayer according to some embodiments of the present disclosure. [Figure 2D] FIG. 1 shows AFM test results for a c-axis oriented electron transport sublayer according to some embodiments of the present disclosure. [Figure 2E] FIG. 1 shows AFM test results for a c-axis oriented electron transport sublayer according to some embodiments of the present disclosure. [Figure 2F] FIG. 1 shows AFM test results for a c-axis oriented electron transport sublayer according to some embodiments of the present disclosure. [Figure 3A] FIG. 2 is a cross-sectional view of a c-axis oriented sputtered electron transport layer thin film according to some embodiments of the present disclosure. [Figure 3B] FIG. 2 is a cross-sectional view of a c-axis oriented electrochemically deposited electron transport layer thin film according to some embodiments of the present disclosure. [Figure 4A]1A and 1B are structural diagrams of transposition of light-emitting elements according to some embodiments of the present disclosure. [Figure 4B] 1 is a structural diagram of a light-emitting element in a normal position according to some embodiments of the present disclosure. [Figure 5A] FIG. 10 is a structural diagram of another light-emitting element transposition according to some embodiments of the present disclosure. [Figure 5B] 10A and 10B are structural diagrams of other light-emitting elements in upright position according to some embodiments of the present disclosure. [Figure 6A] FIG. 10 is a structural diagram of yet another light-emitting device transposition according to some embodiments of the present disclosure. [Figure 6B] FIG. 10 is a structural diagram of yet another light-emitting device in a normal position according to some embodiments of the present disclosure. [Figure 7] FIG. 10 is a structural diagram of yet another light-emitting device transposition according to some embodiments of the present disclosure. [Figure 8A] 1 is a graph showing current density with voltage change for light-emitting elements according to some examples of the present disclosure. [Figure 8B] 1 is a graph showing current efficiency with voltage change of light-emitting elements according to some examples of the present disclosure. [Figure 8C] 1 is a graph showing current density with voltage change for light-emitting elements according to some examples of the present disclosure. [Figure 8D] 1 is a graph showing current efficiency with voltage change of light-emitting elements according to some examples of the present disclosure. [Figure 9A] 10 is a graph showing current density with another change in voltage of a light-emitting element according to some embodiments of the present disclosure. [Figure 9B] 10 is a graph showing current efficiency with other voltage changes of light-emitting elements according to some embodiments of the present disclosure. [Figure 10A] 10 is a graph showing still another change in current density with voltage for light-emitting elements according to some embodiments of the present disclosure. [Figure 10B] 10 is a graph showing the current efficiency with voltage change of light-emitting elements according to some embodiments of the present disclosure. [Figure 11] 10 is a graph showing the current density with further voltage changes of light-emitting elements according to some embodiments of the present disclosure. [Figure 12]10 is a graph showing the current efficiency of light-emitting elements according to some embodiments of the present disclosure with respect to still another change in voltage; [Figure 13] 1A and 1B are structural diagrams of light-emitting devices according to some embodiments of the present disclosure. [Figure 14A] 1 is yet another structural diagram of a light-emitting device according to some embodiments of the present disclosure. [Figure 14B] 1 is yet another structural diagram of a light-emitting device according to some embodiments of the present disclosure. [Figure 15A] 1 is a flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 15B] 1 is a flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 16] 10 is yet another flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 17A] 10 is yet another flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 17B] 10 is yet another flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 18] 10 is yet another flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 19A] 10 is yet another flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 19B] 10 is yet another flowchart of a method for manufacturing a light-emitting device according to some embodiments of the present disclosure. [Figure 20] 1A and 1B are structural diagrams of a display substrate according to some embodiments of the present disclosure. [Figure 21A] 1A and 1B are structural diagrams of a display substrate according to some embodiments of the present disclosure. [Figure 21B] FIG. 10 is a structural diagram of another display substrate according to some embodiments of the present disclosure. [Figure 21C] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 21D] FIG. 10 is a structural diagram of yet another display substrate according to some embodiments of the present disclosure. [Figure 22] 1 is a structural diagram of a display device according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, several embodiments of the present disclosure will be described clearly and completely with reference to the drawings. Of course, the embodiments described herein are only a part of the embodiments of the present disclosure, and are not all of the embodiments. All other embodiments that can be obtained by those skilled in the art based on the embodiments in the present disclosure shall fall within the scope of protection of the present disclosure.

[0030] Unless the context indicates otherwise, in this specification and claims, the term "comprise" and other forms thereof, such as the third-person singular "comprises" and the present participle form "comprising," should be interpreted in an open, inclusive sense, i.e., "including, but not limited to." In the description, the terms "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," "some examples," and the like, are intended to indicate that a particular feature, structure, material, or characteristic associated with this embodiment or examples is included in at least one embodiment or example of the present disclosure. General references to the above terms do not necessarily refer to the same embodiment or example. Furthermore, a described particular feature, structure, material, or characteristic may be included in any one or more embodiments or examples in any appropriate manner.

[0031] Hereinafter, the terms "first" and "second" are for descriptive purposes only and should not be understood as indicating or implying the relative importance or quantity of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In describing the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more than two.

[0032] In describing some embodiments, the terms "coupled," "connected," and derivatives thereof may be used. The term "connected" should be understood in a broad sense, for example, "connected" may be a fixed connection, a detachable connection, or an integral connection, and may be directly connected or indirectly connected through an intermediate medium. The term "coupled," for example, indicates that two or more components are in direct physical or electrical contact with each other. The terms "coupled" or "communicatively coupled" may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the present specification.

[0033] "At least one of A, B, and C" has the same meaning as "at least one of A, B, or C," and all include combinations of A, B, and C, such as A only, B only, C only, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C.

[0034] "A and / or B" includes three combinations: A only, B only, and a combination of A and B.

[0035] As used herein, the term "if" is optionally interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrase "when it is determined" or "when [a described condition or event] is detected" is optionally interpreted to mean "when determining" or "in response to determining" or "upon [a described condition or event] is detected" or "in response to [a described condition or event] being detected," depending on the context.

[0036] In this specification, the use of "applied to" or "configured to" is intended to mean open and inclusive language and does not exclude equipment that is adapted or arranged to perform additional tasks or steps.

[0037] Also, the use of "based on" is meant to be open and inclusive, as a process, step, calculation, or other action performed "based on" one or more stated conditions or values ​​may, in fact, be based on additional conditions or values ​​beyond those stated.

[0038] As used herein, "about," "approximately," or "approximately" includes the stated value and the mean within an acceptable range of deviation of the specified value, where the acceptable range of deviation is determined by one of ordinary skill in the art considering the measurement and the error associated with measuring the specified quantity (i.e., limitations of the measurement system).

[0039] As used herein, "parallel," "perpendicular," and "equal" include the described situation and situations that approximate the described situation, and this range of approximate situations is within an acceptable deviation range, which is determined by taking into account the measurement considered by a person skilled in the art and the error associated with measuring a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes true parallel and approximately parallel, where an acceptable deviation range for approximately parallel may be, for example, a deviation within 5°, and "perpendicular" includes true perpendicular and approximately perpendicular, where an acceptable deviation range for approximately perpendicular may be, for example, a deviation within 5°. "Equal" includes absolutely equal and approximately equal, where, within the acceptable deviation range for approximately equal, for example, the difference between the two equals is 5% or less.

[0040] When a layer or element is referred to as being on another layer or substrate, it is understood that the layer or element may be directly on the other layer or substrate, or there may be an intermediate layer between the layer or element and another layer or substrate.

[0041] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized illustrative drawings. In the drawings, layer thicknesses and thicknesses of regions are exaggerated for clarity. As such, variations in shape relative to the drawings due, for example, to manufacturing techniques and / or tolerances are to be expected. Thus, exemplary embodiments of the present disclosure are not limited to the shapes of regions illustrated herein, but should be construed to include deviations in shape due to manufacturing or otherwise. For example, an etching region shown as a rectangle typically has curved features. Thus, regions shown in the drawings are exemplary in nature, and their shapes are not intended to represent the actual shape of regions of a facility, nor are they intended to limit the scope of exemplary embodiments.

[0042] Quantum dots (QDs) are a new type of luminescent material that boasts advantages such as high light color purity, high luminescent quantum efficiency, tunable emission color, and long service life, making them a hot research topic for new types of LED (Light Emitting Diode) luminescent materials. Therefore, quantum dot light emitting diodes (QLEDs), which use quantum dot materials as the luminescent layer, have become the main research direction for new display devices.

[0043] As consumer spending levels improve, high-resolution products have become the main development direction for display products. High-resolution full-color active electroluminescent quantum dot light-emitting diode (AMQLED) products need to be manufactured using mask evaporation, which causes problems with alignment accuracy. This means that the mask process line width of the organic light-emitting diode (OLED) deposition mask plate needs to be further reduced, which makes it impossible to achieve a smaller light-emitting area and limits further improvement in resolution.

[0044] Meanwhile, AMQLEDs have attracted increasing attention due to their potential advantages in areas such as a wide color gamut and long service life. Research into them is becoming more and more in-depth, and quantum dot efficiency continues to improve, reaching a fundamentally industrialized level. Further adoption of new processes and technologies is of great significance. Due to the characteristics of quantum dot materials themselves, printing techniques or printing methods are commonly used, which can effectively improve material utilization and provide an effective method for large-area manufacturing. For high-resolution backplanes, the dimensions of the pixel-defined area are too small, placing extremely high demands on both the precision and stability of the equipment.

[0045] In prior art, a photoresist material is applied to the bottom common layer of a light-emitting device. After exposure and development, three subpixel light-emitting layers (red, green, and blue) are fabricated, followed immediately by the deposition of a top common layer. This structure, however, at high resolutions, can lead to serious signal crosstalk issues between different subpixels due to the close distance between the subpixels, affecting the display performance of the device. To accommodate the wet deposition process of quantum dots, a transposed device structure is often used, in which the bottom layer is an electron transport layer fabricated by a sputtering process, effectively avoiding solution erosion. Furthermore, sputtered thin films are usually amorphous, exhibiting isotropic conductivity and high directional conductivity, leading to the formation of lateral currents. This lateral current refers to current flowing in the plane of the thin film, which can result in signal crosstalk.

[0046] Based on this, some embodiments of the present disclosure provide a light-emitting device, a manufacturing method thereof, and a display substrate, which can effectively solve the problem of side leakage and signal crosstalk caused by excessively high lateral conductivity of the electron transport layer.

[0047] The light emitting device, the manufacturing method thereof, and the display substrate provided by the present disclosure will be described below.

[0048] 1A to 1D, a light-emitting element 10 includes a first electrode 1, an electron transport layer 2, an emissive layer 3, a hole transport layer 4, and a second electrode 5, which are stacked in this order. As shown in FIGS. 1C and 1D, the electron transport layer 2 includes at least one electron transport sublayer 21. Of the at least one electron transport sublayer 21, the electron transport sublayer 21 closest to the emissive layer 3 is a c-axis oriented electron transport sublayer.

[0049] Here, the c-axis direction is a direction perpendicular to the plane in which the light-emitting layer 3 is located. In the c-axis-oriented electron transport sublayer, the proportion of the number of crystal grains in which the spacing between adjacent crystal grains is smaller than the dimension of the crystal grain itself in the first direction X to the total number of crystal grains is greater than 50%. For example, this proportion may be 60%, 70%, 80%, 90%, or 95%. Here, the first direction X is parallel to the plane in which the light-emitting layer 3 is located. The proportion of the number of crystal grains that do not overlap with adjacent crystal grains along the direction perpendicular to the plane in which the light-emitting layer 3 is located to the total number of crystal grains is greater than 85%. For example, this proportion may be 90% or 95%.

[0050] For example, the light-emitting element 10 may be in a transverse or upright position. The first electrode 1 is an anode, and the second electrode 5 is a cathode. As shown in FIGS. 1A and 1C, when the light-emitting element 10 is in a normal position, the first electrode 1 is a top electrode, and the second electrode 5 is a bottom electrode. As shown in FIGS. 1B and 1D, when the light-emitting element 10 is in a transverse position, the first electrode 1 is a bottom electrode, and the second electrode 5 is a top electrode. Here, the stacking method of the light-emitting element 10 is not limited to a normal position or a transverse position.

[0051] The electron transport sublayer 21 closest to the light-emitting layer 3 is a c-axis oriented electron transport sublayer. As shown in Figure 2A, Figure 2A shows the XRD test results for an amorphous (i.e., non-c-axis oriented) electron transport layer. The result shows no clear characteristic diffraction signal peak, indicating that the entire amorphous electron transport layer is amorphous and isotropic. Referring to Figure 2B, Figure 2B shows the XRD test results for a c-axis oriented electron transport sublayer. Compared to the amorphous electron transport layer, the result shows one clear characteristic diffraction signal peak, which represents a 002 crystal plane. Therefore, the c-axis oriented electron transport sublayer is amorphous overall in directions other than the vertical direction. For example, it is amorphous in the horizontal direction, but has clear crystallinity in the vertical direction. Here, the vertical direction is the direction perpendicular to the c-axis, i.e., the plane in which the light-emitting layer 3 is located, and the horizontal direction is the direction parallel to the plane in which the light-emitting layer 3 is located.

[0052] In the non-c-axis oriented electron transport layer, the conductivity of the amorphous electron transport sublayer thin film in each direction is 10 3 ~10 6 The resistance in each direction of a nanoparticle-type electron transport layer thin film is large, on the order of Ω / cm. 7 ~10 8 Ω / cm. In addition to the vertical current, there is also lateral electron leakage, which not only results in large electron leakage but also causes signal crosstalk in the light-emitting device. Referring to Figures 2C, 2D, 2E, and 2F, Figures 2C, 2D, 2E, and 2F show the results of AFM testing of a c-axis-oriented electron transport sublayer, where the c-axis orientation is perpendicular to the plane on which the light-emitting layer 3 is located. As can be seen, the c-axis-oriented electron transport sublayer has clear crystallinity along the c-axis, resulting in good conductivity in this direction, but poor conductivity in the horizontal direction due to the presence of clear grain boundaries. The horizontal direction here is the direction parallel to the plane on which the light-emitting layer 3 is located, and the first direction X is one of the horizontal directions. Tests have shown that the vertical conductivity of the c-axis-oriented electron transport sublayer is similar to that of an amorphous electron transport sublayer thin film, approximately 10 3 ~10 6 On the order of Ω / cm, in the horizontal direction the conductivity of the thin film drops off sharply to about 10 12 ~10 14 As can be seen, in the c-axis oriented electron transport sublayer, the ratio of the conductivity in the vertical direction to the horizontal direction of the 002 crystal plane is 10 6 ~10 11 Therefore, the light-emitting device provided by some embodiments of the present disclosure includes a c-axis oriented electron transport sublayer disposed closer to the light-emitting layer. The conductivity of the electron transport sublayer in a direction perpendicular to the plane in which the light-emitting layer 3 is located is greater than the conductivity of the electron transport sublayer in a direction parallel to the plane in which the light-emitting layer 3 is located, and the ratio of the conductivity of the electron transport sublayer in a direction perpendicular to the plane in which the light-emitting layer 3 is located to the conductivity of the electron transport sublayer in a direction parallel to the plane in which the light-emitting layer 3 is located is 10 6 ~10 11Therefore, the electrons are transported vertically from the first electrode to the light-emitting layer without leaking laterally, thereby avoiding the occurrence of large electron leakage and crosstalk problems.

[0053] Illustratively, the electron transport layer 2 is a sputtered electron transport layer, i.e., the electron transport layer is formed using a sputtering process. Referring to Figures 3A and 3B, Figure 3A is a cross-sectional view of a C-axis-oriented sputtered electron transport layer thin film, and Figure 3B is a cross-sectional view of a C-axis-oriented electrochemically deposited electron transport layer thin film, i.e., the electron transport layer is formed using an electrochemical deposition process. As can be seen from Figures 3A and 3B, the crystal grains in the C-axis-oriented sputtered electron transport layer thin film of Figure 3A all extend along the C-axis direction, the spacing between adjacent crystal grains in the first direction X is smaller than the spacing between adjacent crystal grains in the C-axis-oriented electrochemically deposited electron transport layer thin film of Figure 3B, and the collimation of the crystal grains in the C-axis-oriented sputtered electron transport layer thin film of Figure 3A is better than the collimation of the crystal grains in the C-axis-oriented electrochemically deposited electron transport layer thin film of Figure 3B.

[0054] As shown in FIG. 3A, the C-axis-oriented sputtered electron transport layer has clear grain boundaries in the first direction, resulting in lower horizontal conductivity. A test area of ​​1 square micron in the C-axis-oriented electron transport layer is selected, and the grain dimensions, i.e., spacing, within the test area are measured. As can be seen, the spacing d1 between some adjacent grains in the first direction X is smaller than the grain's own dimension D1 in the first direction X. The distance between adjacent grains is closer, the grains are more compact, and there are fewer pores. By calculation, the number of grains in the test area whose spacing between adjacent grains in the first direction X is smaller than the grain's own dimension is m, and the total number of grains within the test area is M, where m / M is greater than 50%. For example, m / M may be 60%, 70%, 80%, 90%, or 95%. This allows it to spread throughout the c-axis-oriented electron transport layer, and the ratio of the number of crystal grains whose spacing between adjacent crystal grains is smaller than the size of the crystal grains to the total number of crystal grains is greater than 50%. As can be seen, in the c-axis-oriented sputtered electron transport layer, the spacing between most adjacent crystal grains is small, thus preventing vertical leakage. If the spacing is too large, the distance between each crystal grain is large, resulting in more hole paths. When fabricated into a light-emitting device, this may result in more leakage paths and greater leakage of the light-emitting device. Therefore, the film layer has better vertical conductivity and fewer leakage paths. Referring to Figures 2C, 2D, 2E, and 2F, the cross-sectional views of the film layer shown in Figures 2D and 2F and the plan views of the film layer shown in Figures 2C and 2E all reflect the dimensional relationships between the crystal grains in the electron transport layer described above.

[0055] Furthermore, the crystal grains of the sputtered electron transport layer have good collimation. Similarly, a test area of ​​1 square micron in the c-axis-oriented electron transport layer is selected, and the overlapping state of the crystal grains in the test area is measured. As can be seen, the percentage of the number of crystal grains that do not overlap with neighboring crystal grains along the direction perpendicular to the plane in which the light-emitting layer 3 is located to the total number of crystal grains in the test area is greater than 85%, for example, 90% or 95%. This can be spread throughout the c-axis-oriented electron transport layer, and the percentage of the number of crystal grains that do not overlap with neighboring crystal grains to the total number of crystal grains is greater than 85%. As can be seen, the percentage of crystal grains that do not overlap with each other is high, and most of the crystal grains extend along the c-axis with a low degree of inclination. Referring to Figures 2C, 2D, 2E, and 2F, the cross-sectional views of the film layer shown in Figures 2D and 2F and the plan views of the film layer shown in Figures 2C and 2E all reflect the overlapping relationship between the crystal grains described above. 3B, in the electrochemically deposited electron transport layer having a c-axis orientation, the distance d2 between adjacent crystal grains in the first direction X is large, and the distance d2 between adjacent crystal grains in the first direction X is larger than the dimension D2 of the crystal grain itself in the first direction X. Furthermore, the number of crystal grains that overlap with adjacent crystal grains is large, the collimation of the crystal grains is low, and there are more hole paths in the film layer. Thus, when applied to a light-emitting device, there are more leakage paths, which may lead to greater leakage current in the device. Therefore, in the embodiments of the present disclosure, the c-axis-oriented sputtered electron transport layer thin film shown in FIG. 3A is preferred, and the sputtering manufacturing process is simpler.

[0056] Various embodiments of the electron transport layer 2 in the light-emitting device will be described below. The light-emitting device may be a normal light-emitting device or a transposed light-emitting device. The drawings referred to are all examples of the transposed light-emitting device, and the structure of the normal light-emitting device may refer to the drawings and related descriptions of the transposed light-emitting device.

[0057] In some embodiments, the electron transport layer 2 includes one electron transport sublayer, the electron transport sublayer 21 is a c-axis oriented electron transport sublayer, and the thickness of the c-axis oriented electron transport sublayer is 30 nm to 90 nm.

[0058] 4A and 4B, the electron transport layer 2 is composed of a single electron transport sublayer 21, which is a C-axis oriented electron transport sublayer, i.e., the C-axis oriented electron transport sublayer is located between the first electrode 1 and the light-emitting layer. In addition to simplifying the manufacturing process, the C-axis oriented electron transport layer has good vertical conductivity but poor horizontal conductivity. Therefore, the provision of the C-axis oriented electron transport layer may further weaken the horizontal conductivity, thereby suppressing the side leakage phenomenon of the light-emitting device 10.

[0059] Here, the thickness of the C-axis oriented electron transport sublayer is 30 nm to 90 nm, for example, 30 nm, 50 nm, 70 nm, or 90 nm, but the thickness here is not limited.

[0060] In some other embodiments, the electron transport layer 2 is composed of two electron transport sublayers 21. Of the two electron transport sublayers 21, the electron transport sublayer 21 closer to the light-emitting layer 3 is provided as a C-axis oriented electron transport sublayer, and the electron transport sublayer 21 farther from the light-emitting layer 3 is provided as a non-C-axis oriented electron transport sublayer. The thickness of each electron transport sublayer 21 in the electron transport sublayer 21 is 15 nm to 40 nm.

[0061] 5A and 5B, the electron transport layer 2 is composed of two electron transport sublayers 21. Here, the electron transport sublayer 21 closer to the light-emitting layer 3 (second electron transport sublayer 210) is formed as a c-axis oriented electron transport sublayer, and the electron transport sublayer 21 farther from the light-emitting layer 3 (first electron transport sublayer 211) is formed as a non-c-axis oriented electron transport sublayer, and both the first and second electron transport sublayers are formed by a sputtering process. This formation method can also serve to suppress side leakage of the light-emitting device 10.

[0062] By configuring the electron transport layer to include two electron transport sublayers 21, the electron transport sublayer 21 closest to the light-emitting layer 3 is C-axis oriented, ensuring that it serves to suppress side leakage. At the same time, by performing operations such as oxygen supplementation or doping during the formation process of a certain electron transport sublayer, the conductivity of that electron transport sublayer in the C-axis direction can be weakened, which is advantageous for the carrier balance of the light-emitting device. This will be described in detail later.

[0063] Here, the thickness of each electron transport sublayer 21 is 15 nm to 40 nm, i.e., the thickness of each C-axis oriented electron transport sublayer and non-C-axis oriented electron transport sublayer is 15 nm to 40 nm. For example, the thickness of each C-axis oriented electron transport sublayer and non-C-axis oriented electron transport sublayer may be 15 nm, 25 nm, 35 nm, or 40 nm, and the thickness here is not limited.

[0064] In some embodiments, the electron transport layer 2 includes at least three electron transport sublayers 21. Of the at least three electron transport layers, the electron transport sublayer 21 closest to the light-emitting layer 3 (second electron transport sublayer 210) is a c-axis oriented electron transport sublayer, and the electron transport sublayer closest to the first electrode 1 (first electron transport sublayer 211) is a c-axis oriented electron transport sublayer or a non-c-axis oriented electron transport sublayer. The electron transport sublayer 21 (intermediate electron transport sublayer 212) between the electron transport sublayer 21 closest to the light-emitting layer 3 and the electron transport sublayer 21 closest to the first electrode 1 is a non-c-axis oriented electron transport sublayer. Here, the intermediate electron transport sublayer 212 includes at least one layer.

[0065] 6A and 6B, the electron transport layer 2 includes three electron transport sublayers 21, where the first electron transport sublayer 211 closest to the first electrode 1 is a c-axis oriented electron transport sublayer, the second electron transport sublayer 210 closest to the light-emitting layer 3 is a c-axis oriented electron transport sublayer, and the middle electron transport sublayer 212 located between the two c-axis oriented electron transport sublayers is a non-c-axis oriented electron transport sublayer.

[0066] 6A and 6B, the electron transport layer 2 includes three electron transport sublayers, where the first electron transport sublayer 211 closest to the first electrode 1 is a non-c-axis oriented electron transport sublayer, the second electron transport sublayer 210 closest to the light-emitting layer 3 is a c-axis oriented electron transport sublayer, and the middle electron transport sublayer 212 located between the two c-axis oriented electron transport sublayers is a non-c-axis oriented electron transport sublayer.

[0067] In both of the above examples, the electron transport layer 2 includes three electron transport sublayers 21, and each of the three electron transport sublayers 21 includes a c-axis oriented electron transport sublayer. As can be seen from the characteristics of the c-axis orientation described above, this arrangement can also serve to suppress the side leakage phenomenon of the light emitting device 10.

[0068] That is, when the electron transport layer includes at least three electron transport sublayers, it is sufficient to ensure that the electron transport sublayer closest to the light-emitting layer has a C-axis orientation and that the middle electron transport sublayer 212 has a non-C-axis orientation. By configuring the electron transport layer to include at least three electron transport sublayers 21, it is possible to ensure that the electron transport sublayer 21 closest to the light-emitting layer 3 has a C-axis orientation and serves to suppress side leakage. At the same time, by performing operations such as oxygen supplementation or doping during the formation process of a certain electron transport sublayer, the conductivity of that electron transport sublayer in the C-axis direction can be weakened, which is advantageous for the carrier balance of the light-emitting device 10. This aspect will be described in detail later.

[0069] In some embodiments, the electron transport layer 2 includes three transport sublayers 21, and each of the electron transport sublayers 21 has a thickness of 10 nm to 30 nm.

[0070] 6A , in some examples, the electron transport layer 2 is composed of three electron transport sublayers. Here, the film layer stacked on the first electrode 1 is a c-axis oriented electron transport sublayer, the electron transport sublayer 21 closest to the light-emitting layer 3 is a c-axis oriented electron transport sublayer, and the film layer disposed between the two c-axis oriented electron transport sublayers is a non-c-axis oriented electron transport sublayer, and the thickness of each electron transport sublayer 21 is 10 nm to 30 nm. For example, the thickness of the c-axis oriented electron transport sublayer and the non-c-axis oriented electron transport sublayer may be 10 nm, 20 nm, or 30 nm, but the thicknesses are not limited thereto.

[0071] 6A and 6B , in some other examples, the electron transport layer 2 is composed of three electron transport sublayers. Here, the film layer stacked on the first electrode 1 is a non-c-axis oriented electron transport sublayer, the electron transport sublayer 21 closest to the light-emitting layer 3 is a c-axis oriented electron transport sublayer, and the film layer disposed between the two c-axis oriented electron transport sublayers is a non-c-axis oriented electron transport sublayer, and the thickness of each electron transport sublayer 21 is 10 nm to 30 nm. For example, the thickness of the c-axis oriented electron transport sublayer and the non-c-axis oriented electron transport sublayer may be 10 nm, 20 nm, or 30 nm, but the thicknesses are not limited thereto.

[0072] In some embodiments, as shown in Figures 6A and 6B, the electron transport sublayer (second electron transport sublayer 210) closest to the light-emitting layer and the electron transport sublayer 21 (first electron transport sublayer 211) closest to the first electrode 1 of the electron transport layer 2 are both C-axis oriented electron transport sublayers, and the C-axis oriented electron transport sublayer closest to the light-emitting layer 3 has a greater degree of C-axis orientation than the C-axis oriented electron transport sublayer closest to the first electrode 1.

[0073] The c-axis orientation of the electron transport sublayer can be tested as follows: XRD testing is performed on the electron transport sublayer, with a film thickness of approximately 50 nm and a glaze angle of 1-2°. For example, in the XRD test results for a c-axis-oriented electron transport sublayer, if the baseline signal of the thin film is between 500 and 1500 a.u. and the signal intensity of the 002 crystal plane exceeds the baseline by more than 500 a.u., the c-axis orientation is considered to exist. Furthermore, for a c-axis-oriented film layer, the signal intensity of the 002 crystal plane exceeds the baseline by 500 to 5000 a.u. is a typical range. The greater the signal intensity, the stronger the diffraction signal of the 002 crystal plane, indicating a greater degree of c-axis orientation in the c-axis-oriented electron transport sublayer. At the same time, the c-axis-oriented electron transport sublayer exhibits clear vertical crystallinity. As can be seen from the above test, the signal intensity of the 002 crystal plane in the c-axis-oriented electron transport sublayer closest to the light-emitting layer 3 exceeds the baseline by a greater amount than the signal intensity of the 002 crystal plane in the c-axis-oriented electron transport sublayer closest to the first electrode 1. That is, the degree of c-axis orientation in the c-axis-oriented electron transport sublayer closest to the light-emitting layer 3 is greater, the collimation of the crystal grains is better, and the ratio of the conductivity of the electron transport sublayer in the direction perpendicular to the plane in which the light-emitting layer 3 is located to the conductivity of the electron transport sublayer in the direction parallel to the plane in which the light-emitting layer 3 is located is greater. Therefore, the c-axis-oriented electron transport sublayer closest to the light-emitting layer 3 has a more pronounced effect on suppressing side leakage in the light-emitting device 10 than the c-axis-oriented electron transport sublayer closest to the first electrode 1, which is advantageous for carrier balance in the light-emitting device 10 and improves the efficiency of the light-emitting device 10.

[0074] In some embodiments, the same atoms contained in the material of each electron transport sublayer 21 are oxygen atoms and zinc atoms.

[0075] 4A, 5A, and 6A, when the electron transport layer 2 is one layer, two layers, or three layers, the material of each electron transport sublayer 21 contains the same atoms, i.e., oxygen atoms and zinc atoms. Illustratively, the material of each electron transport sublayer 21 is zinc oxide (ZnO) or zinc oxide doped with other atoms, for example, magnesium (Mg) or gallium (Ga).

[0076] 8A to 12 show simulation tests of current density and current efficiency performed on a light-emitting device by the inventors of the present disclosure. The structure of the light-emitting device, the materials and thicknesses of each film layer other than the electron transport layer, and the manufacturing process based on the simulation tests are as follows. As shown in FIG. 7, the light-emitting device includes a first electrode 1, an electron transport layer 2, a light-emitting layer 3, a hole transport layer 4, a hole injection layer 6, a second electrode 5, and a cover layer 7, which are stacked in this order. The first electrode 1 is manufactured by depositing opaque silver to a thickness of 80 nm to 100 nm, followed by depositing ITO (indium tin oxide) to a thickness of 8 nm to 10 nm thereon. The light-emitting layer 3 is manufactured by depositing CdSe (cadmium selenide) to a thickness of 15 nm to 30 nm. The hole transport layer 4 is fabricated by depositing two layers of hole transport material. Here, the hole transport material closer to the light-emitting layer 3 is molybdenum oxide (MoOx) with a thickness of 5 nm to 10 nm, and the hole transport material farther from the light-emitting layer 3 is nickel oxide (NiOx) with a thickness of 20 nm to 30 nm. The hole injection layer 6 is fabricated by depositing a molybdenum oxide (MoOx) material with a thickness of 5 nm to 10 nm. The second electrode 5 is fabricated by depositing an opaque silver material with a thickness of 10 nm. The cover layer 7 disposed on the second electrode 5 is fabricated from an organic material with a thickness of 70 nm. Both examples are described using a transposed light-emitting element as an example. The material, thickness, and fabrication process of the electron transport layer are variables in each simulation test. That is, in each simulation test, all film layers other than the electron transport layer satisfy the above-mentioned settings. 8A to 12, ZnO indicates that the material of the electron transport layer is ZnO, c-ZnO indicates that the material of the electron transport layer is ZnO and that the electron transport layer is c-axis oriented, and ZMO indicates that the material of the electron transport layer is Mg-doped ZnO (also called zinc magnesium oxide (ZnMgO)). ZMO / c-ZnO indicates that the two electron transport sublayers are a magnesium zinc oxide film layer and a c-axis oriented zinc oxide film layer, which are respectively disposed on one side of the first electrode.c-ZnO / ZMO / c-ZnO is a structure in which three electron transport sublayers are sequentially placed on one side of the first electrode: a c-axis oriented zinc oxide film layer, a magnesium zinc oxide film layer, and a c-axis oriented zinc oxide film layer. In other words, one magnesium zinc oxide film layer is inserted between two zinc oxide film layers.

[0077] The relationship between the thickness of the electron transport sublayer and the current efficiency in a light-emitting device will be described below.

[0078] In some embodiments, the ratio of the thickness of the middle electron transport sublayer 21 among the three electron transport sublayers 21 to the total thickness of the electron transport layer 2 ranges from 0.23 to 0.35.

[0079] 6A and 6B, the electron transport layer 2 of each of the light-emitting devices in FIGS. 6A and 6B includes three electron transport sublayers. The ratio of the thickness of the electron transport sublayer 21 at the intermediate position to the total thickness of the electron transport layer 2 ranges from 0.23 to 0.35. For example, if the thickness of the electron transport sublayer 21 at the intermediate position is 10 nm, the total thickness of the electron transport layer 2 is 30 nm; if the thickness of the electron transport sublayer 21 at the intermediate position is 20 nm, the total thickness of the electron transport layer 2 is 60 nm; and if the thickness of the electron transport sublayer 21 at the intermediate position is 30 nm, the total thickness of the electron transport layer 2 is 90 nm. The total thickness of the two electron transport layers adjacent to the electron transport sublayer 21 at the intermediate position is not limited here.

[0080] The following is a simulation performed on a light-emitting device in which the electron transport layer 2 of the light-emitting device includes three electron transport layers with different thicknesses. Referring to FIGS. 11 and 12, the c-ZnO / ZMnO / c-ZnO structure includes three electron transport sublayers, each of which is arranged on one side of the first electrode in order: a c-axis-oriented zinc oxide layer, a magnesium zinc oxide layer, and a c-axis-oriented zinc oxide layer. That is, one magnesium zinc oxide layer is sandwiched between two zinc oxide layers. FIG. 11 shows the change in current efficiency of the corresponding electron transport layer with voltage when the electron transport layer includes three electron transport sublayers and the total thickness of the electron transport layers remains constant (39 nm). As can be seen from the figure, the efficiency of the corresponding light-emitting device 10 is highest when the thicknesses of the three electron transport sublayers are 13.5 nm, 12 nm, and 13.5 nm, respectively. In this case, the ratio of the thickness of the middle electron transport sublayer 21 to the total thickness of the electron transport layer 2 is 0.31. When the thicknesses of the three electron transport sublayers 21 are 12 nm, 15 nm, and 12 nm, respectively, the efficiency of the corresponding light-emitting device 10 is high. In this case, the ratio of the thickness of the intermediate electron transport sublayer 21 to the total thickness of the electron transport layer 2 is 0.23. As can be seen from the above, when the electron transport layer includes three electron transport sublayers, the ratio of the thickness of the intermediate electron transport sublayer 21 to the total thickness of the electron transport layer 2 is within the range of 0.23 to 0.35, resulting in a low current density, effectively reducing electrical signal crosstalk, improving the efficiency of the light-emitting device 10, and extending its service life. Figure 12 shows the change in current density with voltage across the corresponding electron transport layer when the electron transport layer includes three electron transport sublayers and the total thickness of the electron transport layer is varied while maintaining the same thickness difference between the three electron transport sublayers. As can be seen from the figure, the greater the total thickness of the electron transport layer, the higher the current efficiency of the light-emitting device 10 and the longer the service life of the light-emitting device 10.

[0081] The following describes the changes in structure and properties caused by the oxygen replenishment operation to the electron transport layer.

[0082] In some embodiments, the electron transport layer 2 includes at least two electron transport sublayers 21, and the electron transport sublayer 21 closest to the light-emitting layer 3 has a lower oxygen vacancy than the other electron transport sublayers 21.

[0083] As shown in FIGS. 5A and 5B, the electron transport layer 2 includes two electron transport sublayers 21. The oxygen vacancy of the electron transport sublayer 21 closest to the light-emitting layer 3 (the second electron transport sublayer 210) is lower than that of the other electron transport sublayers (the first electron transport sublayer 211). Alternatively, as shown in FIG. 6A, the electron transport layer 2 includes three electron transport sublayers 21. The oxygen vacancy of the electron transport sublayer 21 closest to the light-emitting layer 3 (the second electron transport sublayer 210) is lower than that of the other electron transport sublayers (the first electron transport sublayer 211 and the middle electron transport sublayer 210).

[0084] Here, oxygen vacancies (OVs) are a type of metal oxide defect. They are formed by oxygen deficiency due to oxygen detachment from the crystal lattice of metal oxides under certain external conditions (e.g., high temperature, reduction treatment, etc.). For example, oxygen vacancies in zinc oxide thin films refer to vacancies formed by oxygen detachment in the zinc oxide lattice. A low oxygen vacancy rate in the electron transport sublayer indicates less oxygen detachment in the zinc oxide crystal lattice and therefore fewer zinc oxide defects. Here, the reduction of oxygen vacancy rate is achieved mainly by supplementing oxygen gas during the manufacturing process of the electron transport sublayer 21 closest to the light-emitting layer 3, thereby filling oxygen vacancies in the zinc oxide crystal lattice. XPS testing revealed that the oxygen vacancy rate of the electron transport sublayer 21 fabricated after supplementing oxygen gas during the process was lower than that of the electron transport sublayer fabricated without supplementing oxygen gas. Reducing the oxygen vacancy rate of the second electron transport sublayer 210 weakens the conductivity of the second electron transport sublayer 210, reducing electron injection, which is beneficial to the carrier balance of the light-emitting device and improves the luminous efficiency. The following describes the above effects, using simulation tests of a light-emitting device.

[0085] As shown in Figures 8A and 8B, the current density and current efficiency of two light-emitting devices were tested. The electron transport layer in one light-emitting device comprised a single-layer zinc oxide thin film, 39 nm thick, fabricated using a magnetron sputtering process. The electron transport layer in the other light-emitting device comprised two electron transport sublayers, each 19.5 nm thick zinc oxide thin film, fabricated using a magnetron sputtering process. The second electron transport sublayer was fabricated using 10% oxygen gas. The second electron transport sublayer, which refers to the electron transport sublayer closest to the light-emitting layer, had a c-axis orientation. As can be seen from Figure 8A, the current density decreased after oxygen gas was added to the second electron transport sublayer compared to the single-layer zinc oxide thin film, indicating that the conductivity of the second electron transport sublayer 21 was weakened and electron injection was reduced. Referring to FIG. 8B, compared to a single-layer zinc oxide thin film, after the second electron transport sub-layer is supplemented with oxygen gas, the carrier balance in the light-emitting device 10 is improved, and the efficiency of the light-emitting device 10 is higher.

[0086] In some examples, oxygen gas may be added to each electron transport sublayer in the electron transport layer, thereby weakening the conductivity of each electron transport sublayer, thereby reducing electron injection, improving carrier balance in the light-emitting device, and achieving better luminous efficiency.

[0087] In some embodiments, the oxygen supplement amount is 0-10% when fabricating the electron-transporting sublayer 21 closest to the light-emitting layer 3. Illustratively, the oxygen supplement amount is 8%.

[0088] As shown in Figures 8C and 8D, the current density and current efficiency of five light-emitting devices were tested. The electron transport layer of each of the five light-emitting devices included three electron transport sublayers. Of the three electron transport sublayers, the first electron transport sublayer 211 and the second electron transport sublayer 210 were both c-axis-oriented zinc oxide thin films, and the middle electron transport sublayer 212 was a magnesium zinc oxide thin film. The thicknesses of the first electron transport sublayer 211, the middle electron transport sublayer 212, and the second electron transport sublayer 210 were 13.5 nm, 12 nm, and 13.5 nm, respectively, and all were fabricated by magnetron sputtering. Different oxygen contents were introduced during the fabrication process of the second electron transport sublayer. As can be seen in Figure 8C, when the oxygen supplementation amount was between 0 and 10%, the current density of the light-emitting device 10 decreased, indicating that the conductivity of the second electron transport sublayer 21 was weakened and electron injection was reduced. Referring to FIG. 8D, after the second electron transport sublayer is supplemented with oxygen gas, when the supplemented oxygen amount is 8%, the carrier balance in the light-emitting device 10 is best achieved, and at the same time, the efficiency of the light-emitting device 10 is the highest.

[0089] In some embodiments, the oxygen vacancy of the electron transport sublayer 21 closest to the light-emitting layer 3 is 5% to 25% lower than the oxygen vacancy of the other electron transport sublayers 21 .

[0090] The oxygen vacancy rate of the electron transport sublayer 21 closest to the light-emitting layer 3 is lower. That is, the oxygen content of the electron transport sublayer 21 closest to the light-emitting layer 3 is higher, which can reduce the conductivity of the electron transport sublayer 21 and reduce electron injection, which is beneficial to the carrier balance in the light-emitting device 10 and improves the efficiency of the light-emitting device 10.

[0091] In some embodiments, the LUMO energy level of the electron-transporting sublayer closest to the light-emitting layer (second electron-transporting sublayer 210) is closer to the LUMO energy level of that layer than the LUMO energy levels of the other electron-transporting sublayers.

[0092] The LUMO (Lowest Unoccupied Molecular Orbital) energy level refers to the orbital energy level with the lowest energy level of unoccupied electrons. For example, oxygen gas may be added during the fabrication process of the second electron transport sublayer 210 to adjust the energy level difference between the second electron transport sublayer 210 and the light-emitting layer 3, thereby bringing the LUMO energy level of the second electron transport sublayer 210 closer to the LUMO energy level of the light-emitting layer 3. This improves carrier mobility, reduces the operating voltage of the light-emitting device 10, and extends its service life. The introduction of oxygen gas also changes the LUMO energy level of the second electron transport sublayer 210, which is beneficial for balancing the increase in device voltage due to the decrease in conductivity of the second electron transport sublayer 210, thereby improving the efficiency of the light-emitting device 10.

[0093] The following describes the changes in structure and properties of the electron transport sublayer due to the doping operation.

[0094] In some embodiments, the electron transport layer 2 includes three electron transport layers 21. The middle electron transport sublayer 21 includes doping atoms and an organic polymer material. The doping atoms include at least one of magnesium and gallium. The organic polymer material includes boron nitride.

[0095] 6A , the electron transport layer 2 includes three electron transport sublayers 21. The middle electron transport sublayer 21 (middle electron transport sublayer 212) is a non-c-axis oriented electron transport sublayer. The middle electron transport sublayer 212 includes doping atoms and an organic polymer material in addition to oxygen and zinc atoms. The doping atoms include at least one of magnesium (Mg) and gallium (Ga). That is, the non-c-axis oriented electron transport sublayer is a magnesium-doped zinc oxide (ZnO) film layer or a gallium-doped zinc oxide (ZnO) film layer, and may also be a film layer including a magnesium zinc oxide (ZnMgO) film layer and a boron nitride organic polymer material. Doping the middle electron transport sublayer 212 weakens the conductivity of the second electron transport sublayer 210 and reduces electron injection, which is beneficial to the carrier balance of the light-emitting device and improves its efficiency. The following describes the above effects through a simulation test of a light-emitting device.

[0096] 9A and 9B, FIG. 9A is a graph of current density with voltage change, and FIG. 9B is a graph of current efficiency with voltage change. Referring to FIGS. 9A and 9B, the current density and current efficiency of three light-emitting devices were tested. The electron transport layer in the first light-emitting device included a single c-axis-oriented zinc oxide thin film with a thickness of 39 nm. The electron transport layer in the second light-emitting device included two electron transport sublayers, a magnesium zinc oxide film layer and a c-axis-oriented zinc oxide film layer, each with a thickness of 19.5 nm. The electron transport layer in the third light-emitting device included three electron transport sublayers, a c-axis-oriented zinc oxide film layer, a magnesium zinc oxide film layer, and a c-axis-oriented zinc oxide film layer, each with a thickness of 13.5 nm, 12 nm, and 13.5 nm. As can be seen from Figure 9A, compared to a single layer of c-axis-oriented zinc oxide thin film, the light-emitting device with a magnesium zinc oxide film layer has a lower current density, which can weaken the conductivity of the electron transport layer and reduce electron injection. Referring to Figure 9B, when the electron transport layer of light-emitting device 10 has one magnesium zinc oxide film layer inserted between two zinc oxide films, the carrier balance effect in light-emitting device 10 is better and the current efficiency of light-emitting device 10 is higher, indicating that doping the intermediate electron transport sublayer with doping atoms (e.g., magnesium) can improve the current efficiency of the light-emitting device.

[0097] In some examples, referring to Figures 10A and 10B, the current density and current efficiency of two light-emitting devices were tested. Here, the electron transport layer in one light-emitting device includes a magnesium zinc oxide film layer and a zinc oxide film layer, both of which are 19.5 nm thick and fabricated by a sputtering process. The electron transport layer in the other light-emitting device includes two electron transport sublayers, both of which are zinc oxide thin films, both of which are 19.5 nm thick and fabricated by a sputtering process. Here, 10% oxygen gas was introduced during the fabrication process of the second electron transport sublayer, and the second electron transport sublayer refers to the electron transport sublayer closest to the light-emitting layer. As can be seen from Figure 10A, compared to the two zinc oxide thin films, the light-emitting device with the magnesium zinc oxide film has a lower current density, and the electron transport sublayer 21 has weaker conductivity, resulting in reduced electron injection. Referring to FIG. 10B, compared to a two-layer zinc oxide thin film, the light-emitting device having a magnesium zinc oxide film has a better carrier balance effect, and the efficiency of the light-emitting device 10 is higher. This indicates that doping doping ions into the electron transport sublayer is better for improving the efficiency of the light-emitting device than supplementing oxygen gas into the electron transport sublayer.

[0098] In some embodiments, the conduction band energy level of the electron transport sublayer 21 that includes doping atoms is shallower than the conduction band energy level of the electron transport sublayer 21 that does not include doping atoms. For example, the conduction band energy level of the magnesium-doped zinc oxide film layer is shallower than the conduction band energy level of the zinc oxide film layer.

[0099] In this manner, doping the electron transport sublayer 21 with doping atoms can lower the conduction band energy level of the layer, resulting in mismatched conduction band energy levels of the electron transport sublayers stacked in multiple layers. The resulting conduction band energy level difference can change the electron transport efficiency and is beneficial to adjusting the carrier injection balance of the light emitting device 10, thereby achieving the goal of reducing the operating voltage of the light emitting device 10 and extending the service life of the light emitting device 10.

[0100] In some embodiments, the material of the electron transport layer 2 is at least one inorganic material, and each electron transport sub-layer 21 in the electron transport layer 2 is free of a ligand material.

[0101] For example, the proportion of organic material in the electron transport sublayer 21 is smaller than the proportion of organic material in the hole transport material, the light-emitting layer, or the hole injection layer. The materials of the electron transport layer 2 are all inorganic materials. The proportion of organic material in the electron transport sublayer 21 is 0, and for example, it does not contain zinc oxide nanoparticles.

[0102] 13 , an intermediate layer 22 is disposed between the light-emitting layer 3 and the electron-transporting sublayer 21 closest to the light-emitting layer 3. The material of the intermediate layer 22 is an organic material or a polymer. The material of the intermediate layer 22 fills the pores between adjacent crystal grains of the electron-transporting sublayer 21 closest to the light-emitting layer 3.

[0103] For example, the material of the intermediate layer 22 is an organic substance or a polymer, such as a polymer such as PEIE or PMMA, or an alkylamine or aromatic amine-based organic substance. The electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer containing voids between the crystal grains. Filling the voids between adjacent crystal grains in the electron transport sublayer 21 closest to the light-emitting layer 3 with the intermediate layer material can further suppress side leakage, beneficiate carrier balance in the light-emitting device 10, and improve the current efficiency of the light-emitting device 10.

[0104] Illustratively, the thickness of intermediate layer 22 is smaller than the thickness of electron-transporting sublayer 21 closest to light-emitting layer 3 , and the thickness of intermediate layer 22 is smaller than the thickness of light-emitting layer 3 .

[0105] In some embodiments, the light-emitting device 10 has a transposed structure, and the surface roughness of each electron transport sub-layer 21 in the electron transport layer 2 on the side away from the first electrode 1 is 0.5 nm to 2 nm.

[0106] In some examples, the electron transport layer 2 is formed using a magnetron sputtering process and has a surface roughness. Referring to FIGS. 4A, 5A, and 6A, the surface roughness (root mean square roughness) of each electron transport sublayer 21 in the electron transport layer 2 facing away from the first electrode 1 ranges from 0.5 nm to 2.0 nm. For example, each electron transport sublayer 21 in the electron transport layer 2 is formed using a magnetron sputtering process and has a surface roughness of 0.5 nm, 0.7 nm, or 2.0 nm, etc., and has good surface flatness that meets the surface flatness requirements of the film layer.

[0107] In some embodiments, the light-emitting device has a normal structure, and the surface roughness of each electron transport sub-layer 21 in the electron transport layer 2 on the side away from the second electrode 5 is 0.5 nm to 2 nm.

[0108] In some examples, the electron transport layer is formed using a magnetron sputtering process and has a surface roughness. Referring to Figures 4B, 5B, and 6B, the surface roughness (Root Mean Square (RMS)) of each electron transport sublayer 21 in the electron transport layer 2 facing away from the second electrode 5 ranges from 0.5 nm to 2.0 nm. For example, each electron transport sublayer 21 in the electron transport layer 2 is formed using a magnetron sputtering process and has a surface roughness of 0.5 nm, 0.7 nm, or 2.0 nm, etc., and has good surface flatness that meets the surface flatness requirements of the film layer.

[0109] In some embodiments, the first electrode 1 is an opaque metal electrode made of aluminum, silver, titanium, or molybdenum, with a thickness of 60 nm to 150 nm, on which is deposited ITO (indium tin oxide), FTO (fluorine doped tin oxide), or a conductive polymer, with a thickness of 5 nm to 50 nm.

[0110] In some embodiments, light emitting layer 3 is a quantum dot light emitting layer, which emits light in one of three colors: red, green, or blue.

[0111] Illustratively, the quantum dots may be cadmium-containing materials such as CdSe (cadmium selenide) or cadmium-free materials such as InP (indium phosphide).

[0112] In some embodiments, hole transport layer 4 comprises at least one hole transport material, which comprises at least one of an organic transport material and an inorganic oxide transport material.

[0113] Illustratively, the organic transport materials mainly include polyvinylcarbazole, 1,2,4,5-tetra(trifluoromethyl)benzene, N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1,1'-biphenyl-4,4'-diamine, and the like.

[0114] For example, the inorganic oxide material mainly includes nickel oxide, vanadium oxide, etc., which can improve the energy conversion efficiency and electrical conductivity of the hole transport layer.

[0115] For example, the thickness of the hole transport layer is 10 nm to 40 nm, and preferably 25 nm to 35 nm.

[0116] In some embodiments, the second electrode 2 is a transparent conductive indium tin oxide (ITO), indium zinc oxide (IZO), a semiconductor electrode (FTO glass electrode), or a conductive polymer, and the thickness of the second electrode 2 may be 40 nm to 200 nm.

[0117] For example, the second electrode 2 is an opaque metal electrode made of aluminum, silver, or the like, and the thickness of the metal electrode is 10 nm to 20 nm.

[0118] In some embodiments, as shown in FIGS. 14A and 14B, the light-emitting device 10 further comprises a hole-injection layer 6 disposed on the side of the hole-transport layer 4 away from the light-emitting layer 3.

[0119] For example, the material of the hole injection layer 6 includes an aqueous solution of a high molecular weight polymer (PEDOT:PSS), 2,3,6,7,10,11-hexacyano-1,4,5,8,9,12-hexaazatriphenylene (HAT-CN), etc., and molybdenum oxide (MoO) having a strong electron-withdrawing ability. x ) may also be an inorganic oxide.

[0120] 7, in some embodiments, the light-emitting device 10 further includes a cover layer 7. The cover layer 7 is disposed on the side of the second electrode 5 away from the light-emitting layer 3, and the thickness of the cover layer 7 is 40 nm to 90 nm.

[0121] For example, the thickness of the cover layer 7 is 40 nm to 90 nm, preferably 70 nm. The material of the cover layer 7 is an organic material, and has a large refractive index and a small light absorption coefficient, which can improve the light output efficiency.

[0122] The light-emitting element 10 has a transposed structure, and the cover layer 7 is disposed on the side of the second electrode 5 that is farther from the light-emitting layer 3. When the light-emitting element 10 has a normal structure, the cover layer 7 is disposed on the side of the first electrode 1 that is farther from the light-emitting layer 3.

[0123] Some embodiments of the present disclosure further provide a method for manufacturing the light-emitting device 10. As shown in Fig. 15A, the method for manufacturing the light-emitting device 10 is described here by taking the light-emitting device 10 as transposed as an example, and the method includes S1 to S5.

[0124] S1, a first electrode 1 is formed on one side of the base.

[0125] Exemplarily, the base may be a glass or flexible PET (polyethylene terephthalate plastic) base. The first electrode 1 is the cathode.

[0126] For example, the first electrode 1 may be an opaque metal electrode such as aluminum, silver, titanium, molybdenum, etc., and the thickness of the metal electrode may be 60 nm to 150 nm, with ITO (indium tin oxide), FTO (fluorine-doped tin oxide), etc. deposited on top.

[0127] For example, the first electrode 1 may be an opaque metal electrode such as aluminum, silver, titanium, or molybdenum, and the thickness of the metal electrode may be 60 nm to 150 nm, with a conductive polymer or the like deposited on top. The thickness of the conductive polymer is 5 nm to 50 nm.

[0128] Illustratively, the first electrode 1 in the present disclosure is an opaque silver metal electrode with a thickness of 80 nm, on which indium tin oxide is deposited with a thickness of 10 nm.

[0129] S2: forming an electron transport layer 2 on the first electrode 1;

[0130] 4A, 5A, and 6A, the formed electron transport layer 2 includes at least one electron transport sublayer 21. Of the at least one electron transport sublayer 21, the electron transport sublayer 21 closest to the light-emitting layer 3 is a c-axis oriented electron transport layer.

[0131] Here, the C-axis orientation is a direction perpendicular to the plane in which the light-emitting layer 3 is located. In the C-axis-oriented electron transport sublayer 21, the proportion of the number of crystal grains in which the distance between adjacent crystal grains is smaller than the dimension of the crystal grain itself in the first direction X to the total number of crystal grains is greater than 50%. Here, the first direction X is parallel to the plane in which the light-emitting layer 3 is located. The proportion of the number of crystal grains that do not overlap with adjacent crystal grains along the direction perpendicular to the plane in which the light-emitting layer 3 is located to the total number of crystal grains is greater than 85%.

[0132] S3: forming the light-emitting layer 3 on the electron transport layer 2;

[0133] Illustratively, the light-emitting layer 3 is a quantum dot light-emitting layer, which is deposited by inkjet printing, photolithography, etc. The quantum dot light-emitting layer can emit one of three colors: red, green, and blue.

[0134] Illustratively, the quantum dots may be cadmium-containing materials such as CdSe (cadmium selenide) or cadmium-free materials such as InP (indium phosphide).

[0135] For example, the thickness of the light-emitting layer 3 is 10 nm to 40 nm, and preferably 20 nm to 30 nm.

[0136] S4: Forming a hole transport layer 4 on the light emitting layer 3.

[0137] Here, the hole transport layer 4 contains at least one hole transport material, and the hole transport material contains at least one of an organic transport material and an inorganic oxide transport material.

[0138] Illustratively, the organic transport materials mainly include polyvinylcarbazole, 1,2,4,5-tetra(trifluoromethyl)benzene, N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1,1'-biphenyl-4,4'-diamine, and the like.

[0139] For example, the inorganic oxide material mainly includes nickel oxide, vanadium oxide, etc., which can improve the energy conversion efficiency and electrical conductivity of the hole transport layer.

[0140] For example, in the hole transport layer 4 of the present invention, the HOMO energy level of the hole transport material on the side closer to the light emitting layer 3 is −6.2 eV to −5.5 eV, and the material is molybdenum oxide (MoO x ), which is advantageous for hole injection. The HOMO energy level of the hole transport material on the side away from the light-emitting layer is -5.3 eV to -5.0 eV, and the material is vanadium pentoxide (VO) and nickel oxide (NiO). x ) may be any of the following.

[0141] For example, the thickness of the hole transport layer is 10 nm to 40 nm, and in the present embodiment, it is preferably 25 nm to 35 nm.

[0142] S5: forming a second electrode 5 on the hole transport layer 4;

[0143] For example, the second electrode 2 is an anode and may be transparent conductive indium tin oxide (ITO), indium zinc oxide (IZO), a semiconductor electrode (FTO glass electrode), or a conductive polymer, and its thickness may be 40 nm to 200 nm.

[0144] For example, the second electrode 2 may be an opaque metal electrode made of aluminum, silver, or the like, deposited by evaporation, and the thickness of the metal electrode may be 10 nm to 20 nm.

[0145] In some examples, the method further includes a step of forming a hole injection layer 6 on the hole transport layer 4 between S4 and S5. Illustratively, the hole injection layer 6 is formed using a deposition process, and the thickness of the hole injection layer 6 is 3 nm to 7 nm, preferably 5 nm. The material of the hole injection layer 6 is an organic material.

[0146] In some embodiments of the present application, the light emitting device 10 is placed upright. As shown in Fig. 15B, the manufacturing method of the upright placed light emitting device includes steps S1' to S5'.

[0147] S1', a second electrode 5 is formed on one side of the base.

[0148] S2': forming a hole transport layer 4 on the second electrode 5;

[0149] S3': forming the light-emitting layer 3 on the hole-transporting layer 4;

[0150] S4': An electron transport layer 2 is formed on the light emitting layer 3.

[0151] S5': forming a first electrode 1 on the electron transport layer 2;

[0152] In some examples, the method further includes forming a hole injection layer 6 on the second electrode 5 between S1' and S2'. Illustratively, the hole injection layer 6 is formed using a deposition process, and the thickness of the hole injection layer 6 is 3 nm to 7 nm, preferably 5 nm. The material of the hole injection layer 6 is an organic material.

[0153] Here, for the specific manufacturing processes of S1' to S5', please refer to the description of the corresponding steps in the above-mentioned manufacturing method of the transposed light emitting device 10, and the description will not be repeated here. Below, the formation process of the electron transport layer in S2 and S4' will be mainly described.

[0154] In some embodiments, the electron transport layer 2 is formed by depositing a corresponding material on a substrate using a magnetron sputtering process. The degree of c-axis orientation of the formed electron transport layer can be adjusted by controlling the substrate temperature or magnetron sputtering power during the deposition process. For example, when the substrate temperature is 100°C, the formed electron transport layer has almost no c-axis orientation, but when the substrate temperature is room temperature or a high temperature of 200°C or higher, the formed electron transport layer has significant c-axis orientation. The degree of c-axis orientation of the formed electron transport layer can be reduced by increasing the sputtering power.

[0155] Here, the light-emitting layer 3, the first electrode 1, or the formed electron transport sub-layer 21 is the base of the electron transport sub-layer formed in the next step.

[0156] Below, a method for forming the electron transport layer 2 in the transposed light-emitting device will be described in accordance with the case.

[0157] The following describes the specific step S2 when the formed electron transport layer 2 includes one electron transport sublayer 21. Here, the one electron transport sublayer 21 is a c-axis oriented electron transport sublayer 21.

[0158] Here, as shown in FIG. 15A, in step S2, forming an electron transport layer 2 on the first electrode 1 includes forming a C-axis oriented electron transport sub-layer on the first electrode using a magnetron sputtering process.

[0159] In some embodiments, step S2 includes S21-1.

[0160] S21-1: When the temperature of the first electrode is at a first temperature, a material for the electron transport sublayer 21 is deposited on the first electrode 1 using a process such as magnetron sputtering to form a C-axis oriented electron transport sublayer.

[0161] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0162] For example, referring to FIG. 4A, a material may be deposited on the first electrode 1 at room temperature using a method such as magnetron sputtering, and the material may be ZnO, thereby forming a c-axis oriented electron transport sub-layer.

[0163] Alternatively, step S2 includes S21-2.

[0164] S21-2, using a magnetron sputtering process, depositing a material for an electron transport sublayer on the first electrode when the temperature of the first electrode is at a second temperature, and annealing the material for the electron transport sublayer to form a C-axis oriented electron transport sublayer.

[0165] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0166] For example, a material may be deposited on the first electrode 1 using a method such as magnetron sputtering when the temperature of the first electrode 1 is 300°C, and the material may be ZnO, and the ZnO material is annealed to form a C-axis oriented electron transport sub-layer.

[0167] The electron transport sublayer material is annealed under a second temperature condition to form a c-axis oriented electron transport sublayer, whose horizontal conductivity is much lower than its vertical conductivity, thereby effectively reducing the side leakage current of the thin film and avoiding the crosstalk phenomenon.

[0168] Alternatively, step S2 includes S21-3.

[0169] S21-3, using a magnetron sputtering process, depositing a material for the electron transport sublayer on the first electrode 1 under a second sputtering power to form a C-axis oriented electron transport sublayer, wherein the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0170] Exemplarily, the second sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is less than the first sputtering power, and the first sputtering power is a sputtering power that can form a non-c-axis orientation in the material.

[0171] The specific step of S2 will be described below when the formed electron transport layer 2 includes two electron transport sublayers 21. Here, the electron transport sublayer 21 farther from the light-emitting layer 3 is a non-C-axis oriented electron transport sublayer, and the two electron transport sublayers 21 are a first electron transport sublayer 211 and a second electron transport sublayer 210, with the first electron transport sublayer 211 being farther from the light-emitting layer 3.

[0172] Here, as shown in FIG. 16, in step S2, the step of forming the electron transport layer 2 on the first electrode 1 includes steps S22 and S23.

[0173] S22, forming a first electron transport sublayer on the first electrode using a magnetron sputtering process, the first electron transport sublayer being a non-c-axis oriented electron transport layer.

[0174] S23, using a magnetron sputtering process to form a second electron transport sublayer on the first electron transport sublayer, where the first electron transport sublayer is a c-axis oriented electron transport layer.

[0175] In some embodiments, S22 includes S22-1.

[0176] S22-1, using a process such as magnetron sputtering, when the temperature of the first electrode is at a third temperature, a material for the electron transport sublayer 21 is deposited on the first electrode 1 to form a non-C-axis oriented first electron transport sublayer 211.

[0177] Here, the third temperature is a base temperature at which the material can be made to have a non-C-axis orientation, and the third temperature is, for example, 100°C.

[0178] For example, referring to FIG. 5A, a material may be deposited on the first electrode 1 using a method such as magnetron sputtering when the temperature of the first electrode 1 is 100° C., and the material may be ZnO, thereby forming a non-C-axis oriented first electron transport sublayer 211.

[0179] Or, S22 includes S22-2.

[0180] S22-2, using a magnetron sputtering process, depositing a material for an electron transport sublayer on the first electrode under a first sputtering power to form a non-C-axis oriented electron transport sublayer, wherein the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.

[0181] Exemplarily, the first sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is smaller than the first sputtering power.

[0182] In some embodiments, S23 includes S23-1.

[0183] S23-1, using a process such as magnetron sputtering, when the temperature of the first electron transport sublayer 211 is at a first temperature, depositing the material of the electron transport sublayer 21 on the non-C-axis oriented first electron transport sublayer 211 to form a C-axis oriented second electron transport sublayer 210.

[0184] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0185] For example, referring to FIG. 5A, when the temperature of the first electron transport sublayer 211 is room temperature, a material may be deposited on the non-C-axis oriented first electron transport sublayer 211 using a method such as magnetron sputtering, and the material may be ZnO, to form a C-axis oriented second electron transport sublayer 210.

[0186] In some examples, oxygen gas may be introduced during the process of depositing the material of the electron transport sublayer 21 to form the second electron transport sublayer 210 in S23. By increasing the content of the introduced oxygen gas and replacing the oxygen gas with argon gas, the oxygen vacancy rate of the formed C-axis oriented second electron transport sublayer 210 can be reduced, thereby reducing its conductivity, thereby balancing the carriers, preventing current crosstalk, and improving the efficiency of the light-emitting element 10.

[0187] Or, S23 includes S23-2.

[0188] S23-2, using a magnetron sputtering process, depositing an electron transport sublayer material on the non-C-axis oriented first electron transport sublayer 211 when the temperature of the first electron transport sublayer 211 is at a second temperature, and annealing the electron transport sublayer material under a second temperature condition to form a C-axis oriented second electron transport sublayer 210.

[0189] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0190] For example, referring to FIG. 5A, a material may be deposited on the first electron transport sublayer 211 using a method such as magnetron sputtering when the temperature of the first electron transport sublayer 211 is 300° C., and the material may be ZnO. The ZnO material is then annealed to form the second electron transport sublayer 210 with a C-axis orientation.

[0191] For example, the second electron transport sublayer 210 is c-axis oriented, and its horizontal conductivity is much lower than its vertical conductivity, which can effectively reduce the side leakage of the thin film and avoid the occurrence of crosstalk.

[0192] Or, S23 includes S23-3.

[0193] S23-3, using a magnetron sputtering process, depositing an electron transport sublayer material on the first electron transport sublayer 211 under a second sputtering power to form a second electron transport sublayer 210 with a C-axis orientation, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0194] Illustratively, the sputtering power in the above magnetron sputtering process is 3 to 30 W / cm. 2 is.

[0195] In some examples, oxygen gas may be introduced during the process of depositing the material of the electron transport sublayer 21 to form the second electron transport sublayer 210 in S23. By increasing the content of the introduced oxygen gas and replacing the oxygen gas with argon gas, the oxygen vacancy rate of the formed C-axis oriented second electron transport sublayer 210 can be reduced, thereby reducing its conductivity, thereby balancing the carriers, preventing current crosstalk, and improving the efficiency of the light-emitting element 10.

[0196] The following describes the specific step S2 when the formed electron transport layer 2 includes three electron transport sublayers 21. Here, the electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the electron transport sublayer 21 closest to the first electrode 1 is a C-axis oriented electron transport sublayer or a non-C-axis oriented electron transport sublayer. The three electron transport sublayers include a first electron transport sublayer, a second electron transport sublayer, and a middle electron transport sublayer, where the first electron transport sublayer is farthest from the light-emitting layer, the second electron transport sublayer is closest to the light-emitting layer, and the middle electron transport sublayer is located between the first and second electron transport sublayers and is a non-C-axis oriented electron transport sublayer.

[0197] Here, when the light-emitting element 10 is inverted and the electron transport layer 2 includes three electron transport sub-layers 21 as shown in FIG. 6A, in step S2, the step of forming the electron transport layer 2 on the first electrode 1 correspondingly includes steps S24 to S26 as shown in FIG. 17A.

[0198] S24: Using a magnetron sputtering process, a first electron transport sublayer 211 is formed on the first electrode 1, where the first electron transport sublayer 211 is a c-axis oriented electron transport sublayer.

[0199] S25, using a magnetron sputtering process to form an intermediate electron transport sublayer 212 on the first electron transport sublayer 211, where the intermediate electron transport sublayer 212 of each layer is a non-c-axis oriented electron transport sublayer.

[0200] S26, using a magnetron sputtering process, a second electron transport sublayer 210 is formed on the middle electron transport sublayer 212, where the second electron transport sublayer 210 is a c-axis oriented electron transport sublayer.

[0201] In some embodiments, S24 includes S24-1.

[0202] S24-1: Using a process such as magnetron sputtering, when the temperature of the first electrode is at a first temperature, a material for the electron transport sublayer 21 is deposited on the first electrode 1 to form a first electron transport sublayer 211 with a C-axis orientation.

[0203] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0204] For example, referring to FIG. 6A, when the temperature of the first electrode 1 is room temperature, a material may be deposited on the first electrode 1 using a method such as magnetron sputtering, and the material may be ZnO, to form a C-axis oriented first electron transport sub-layer 211.

[0205] Or, S24 includes S24-2.

[0206] S24-2, using a magnetron sputtering process, when the temperature of the first electrode 1 is at a second temperature, depositing a material for the electron transport sublayer on the first electrode, and annealing the material for the electron transport sublayer under the second temperature condition to form a first electron transport sublayer 211 with a C-axis orientation.

[0207] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0208] For example, referring to FIG. 6A, a material may be deposited on the first electrode 1 using a method such as magnetron sputtering when the temperature of the first electrode 1 is 300° C., and the material may be ZnO. The ZnO material is then annealed to form a C-axis oriented first electron transport sublayer 211.

[0209] For example, the first electron transport sub-layer 211 is c-axis oriented, and its horizontal conductivity is much lower than its vertical conductivity, which can effectively reduce the side leakage of the thin film and avoid the occurrence of crosstalk.

[0210] Or, S24 includes S24-3.

[0211] S24-3, using a magnetron sputtering process, referring to FIG. 6A, depositing an electron transport sublayer material on the first electrode 1 under a second sputtering power to form a first electron transport sublayer 211 with a C-axis orientation, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0212] Illustratively, the sputtering power in the above magnetron sputtering process is 3 to 30 W / cm. 2 is.

[0213] In some embodiments, S25 includes S25-1.

[0214] S25-1, using a process such as magnetron sputtering, when the temperature of the first electron transport sublayer 211 is at a third temperature, a material of the electron transport sublayer 211 is deposited on the first electron transport sublayer 211 to form a non-C-axis oriented intermediate electron transport sublayer 212.

[0215] Here, the third temperature is a base temperature at which the material can be made to have a non-C-axis orientation, and the third temperature is, for example, 100°C.

[0216] For example, referring to FIG. 6A, when the temperature of the first electron transport sublayer 211 is 100° C., a material may be deposited on the first electron transport sublayer 211 using a method such as magnetron sputtering, and the material may be ZnO, thereby forming a non-c-axis oriented intermediate electron transport sublayer 212.

[0217] Or, S25 includes S25-2.

[0218] S25-2, using a magnetron sputtering process, depositing an electron transport sublayer material on the first electron transport sublayer 211 under a first sputtering power to form a non-C-axis oriented electron transport sublayer, wherein the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.

[0219] Exemplarily, the first sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is smaller than the first sputtering power.

[0220] In some embodiments, S26 includes S26-1.

[0221] S26-1, using a process such as magnetron sputtering, when the temperature of the intermediate electron transport sublayer 212 is at a first temperature, deposit the material of the electron transport sublayer 21 on the intermediate electron transport sublayer 212 to form a second electron transport sublayer 210 with a C-axis orientation.

[0222] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0223] For example, referring to FIG. 6A, when the temperature of the intermediate electron transport sublayer 212 is room temperature, a material may be deposited on the intermediate electron transport sublayer 212 using a method such as magnetron sputtering, and the material may be ZnO, to form a second electron transport sublayer 210 with a C-axis orientation.

[0224] Or, S26 includes S26-2.

[0225] S26-2, using a magnetron sputtering process, when the temperature of the intermediate electron transport sublayer 212 is at a second temperature, depositing an electron transport sublayer material on the intermediate electron transport sublayer 212, and annealing the electron transport sublayer material under the second temperature condition to form a C-axis oriented second electron transport sublayer 210.

[0226] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0227] For example, referring to FIG. 6A , when the temperature of the intermediate electron transport sublayer 212 is 300° C., a material may be deposited on the intermediate electron transport sublayer 212 using a method such as magnetron sputtering, and the material may be ZnO, and the ZnO material is annealed to form a C-axis oriented second electron transport sublayer 210.

[0228] For example, the second electron transport sublayer 210 is c-axis oriented, and its horizontal conductivity is much lower than its vertical conductivity, which can effectively reduce the side leakage of the thin film and avoid the occurrence of crosstalk.

[0229] Or, S26 includes S26-3.

[0230] S26-3, using a magnetron sputtering process, depositing an electron transport sublayer material on the intermediate electron transport sublayer 212 under a second sputtering power to form a second electron transport sublayer 210 with a C-axis orientation, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0231] Illustratively, the sputtering power in the above magnetron sputtering process is 3 to 30 W / cm. 2 is.

[0232] In some other embodiments, when the electron transport layer 2 includes three electron transport sub-layers 21, as shown in Figure 17B, the step of forming the electron transport layer 2 on the first electrode 1 in step S2 includes steps S27 to S29, respectively, where steps S27 to S29 and S24 to S26 are parallel steps.

[0233] S27: Using a magnetron sputtering process, a first electron transport sublayer 211 is formed on the first electrode 1, where the first electron transport sublayer 211 is a non-C-axis oriented electron transport sublayer.

[0234] S28, using a magnetron sputtering process to form an intermediate electron transport sublayer 212 on the first electron transport sublayer 211, wherein the intermediate electron transport sublayer 212 of each layer is a non-c-axis oriented electron transport sublayer.

[0235] S29: Using a magnetron sputtering process, a second electron transport sublayer 210 is formed on the middle electron transport sublayer 212, where the second electron transport sublayer 210 is a c-axis oriented electron transport sublayer.

[0236] In some embodiments, S27 includes S27-1.

[0237] S27-1, using a process such as magnetron sputtering, when the temperature of the first electrode is at a third temperature, a material for the electron transport sublayer 21 is deposited on the first electrode 1 to form a non-C-axis oriented first electron transport sublayer 211.

[0238] Here, the third temperature is a base temperature at which the material can be made to have a non-C-axis orientation, and the third temperature is, for example, 100°C.

[0239] For example, referring to FIG. 6A, a material may be deposited on the first electrode 1 using a method such as magnetron sputtering when the temperature of the first electrode 1 is 100° C., and the material may be ZnO, thereby forming a non-C-axis oriented first electron transport sublayer 211.

[0240] Or, S27 includes S27-2.

[0241] S27-2, using a magnetron sputtering process, depositing a material for an electron transport sublayer on the first electrode 1 under a first sputtering power to form a non-C-axis oriented electron transport sublayer, wherein the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.

[0242] Exemplarily, the first sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is smaller than the first sputtering power.

[0243] For specific process steps of S28, please refer to the description of S25, and for specific process steps of S29, please refer to the description of S26.

[0244] In some embodiments, the electron transport layer in the light-emitting device includes three or more electron transport sublayers, the intermediate electron transport layer 2 includes at least two electron transport sublayers 21, and each of the at least two electron transport sublayers 21 is a non-C-axis oriented intermediate electron transport sublayer 212. For the manufacturing method of each non-C-axis oriented intermediate electron transport sublayer 212, refer to the specific manufacturing method of the intermediate electron transport sublayer 212 when the electron transport layer 2 includes three electron transport sublayers described above, and the description will not be repeated here.

[0245] Hereinafter, a method for forming the electron transport layer 2 in a normal light-emitting element will be described in accordance with the case.

[0246] The following describes the specific step S4′ when the formed electron transport layer 2 includes one electron transport sublayer 21 (as shown in FIG. 4B ), where the single electron transport sublayer 21 is a c-axis oriented electron transport sublayer 21.

[0247] Here, as shown in FIG. 15B, in step S4′, the step of forming an electron transport layer 2 on the light-emitting layer 3 includes the step of forming a C-axis oriented electron transport layer on the light-emitting layer 3 using a magnetron sputtering process.

[0248] In some embodiments, S4' includes S41-1.

[0249] S41-1: When the temperature of the light-emitting layer 3 is at a first temperature, a material for the electron transporting sub-layer 21 is deposited on the light-emitting layer 3 using a process such as magnetron sputtering to form a C-axis oriented electron transporting sub-layer.

[0250] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0251] For example, referring to FIG. 4B, a material may be deposited on the light-emitting layer 3 at room temperature using a method such as magnetron sputtering, and the material may be ZnO, thereby forming a C-axis oriented electron transport sub-layer.

[0252] Alternatively, step S4' includes step S41-2.

[0253] S41-2. Using a magnetron sputtering process, deposit a material for an electron transport sublayer on the light emitting layer 3 when the temperature of the light emitting layer 3 is at a second temperature, and anneal the material for the electron transport sublayer to form a C-axis oriented electron transport sublayer.

[0254] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0255] For example, referring to FIG. 4B , when the temperature of the light-emitting layer 3 is 300° C., a material may be deposited on the light-emitting layer 3 using a method such as magnetron sputtering, and the material may be ZnO. The ZnO material is then annealed to form a C-axis oriented electron transport sub-layer.

[0256] The electron transport sublayer material is annealed under a second temperature condition to form a c-axis oriented electron transport sublayer, whose horizontal conductivity is much lower than its vertical conductivity, thereby effectively reducing the side leakage current of the thin film and avoiding the crosstalk phenomenon.

[0257] Alternatively, step S4' includes step S41-3.

[0258] S41-3: Using a magnetron sputtering process, referring to FIG. 4B, depositing a material for the electron transport sublayer on the light-emitting layer 3 under a second sputtering power to form a C-axis oriented electron transport sublayer, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0259] Exemplarily, the second sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is less than the first sputtering power, and the first sputtering power is a sputtering power that can form a non-c-axis orientation in the material.

[0260] The specific step of S4′ will be described below when the formed electron transport layer 2 includes two electron transport sublayers 21. Here, the electron transport sublayer 21 farther from the light-emitting layer 3 is a non-C-axis oriented electron transport sublayer, and the two electron transport sublayers 21 are a first electron transport sublayer 211 and a second electron transport sublayer 210, with the first electron transport sublayer 211 being farther from the light-emitting layer 3.

[0261] Here, as shown in FIG. 18, in step S4', the step of forming the electron transport layer 2 on the light-emitting layer 3 includes steps S42 and S43.

[0262] S42, using a magnetron sputtering process to form a second electron transport sub-layer on the light emitting layer 3, the second electron transport sub-layer being a c-axis oriented electron transport layer.

[0263] S43, forming a first electron transport sublayer on the second electron transport sublayer using a magnetron sputtering process, the first electron transport sublayer being a non-c-axis oriented electron transport layer.

[0264] In some embodiments, S42 includes S42-1.

[0265] S42-1: When the temperature of the light-emitting layer 3 is at a first temperature, a material for the electron transport sublayer 21 is deposited on the light-emitting layer 3 using a process such as magnetron sputtering to form a second electron transport sublayer 210 with a C-axis orientation.

[0266] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0267] For example, referring to FIG. 5B , when the temperature of the light-emitting layer 3 is room temperature, a material may be deposited on the light-emitting layer 3 using a method such as magnetron sputtering, and the material may be ZnO, to form a C-axis oriented second electron transport sub-layer 210.

[0268] In some examples, oxygen gas may be introduced during the process of depositing the material of the electron transport sublayer 21 to form the second electron transport sublayer 210 in S42. By increasing the content of the introduced oxygen gas and replacing the oxygen gas with argon gas, the oxygen vacancy rate of the formed C-axis oriented second electron transport sublayer 210 can be reduced, thereby reducing its conductivity, thereby balancing the carriers, preventing current crosstalk, and improving the efficiency of the light-emitting element 10.

[0269] Or, S42 includes S42-2.

[0270] S42-2, using a magnetron sputtering process, depositing a material for an electron transport sublayer on the light-emitting layer 3 when the temperature of the light-emitting layer 3 is at a second temperature, and annealing the material for the electron transport sublayer under the second temperature condition to form a second electron transport sublayer 210 with a C-axis orientation.

[0271] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0272] For example, referring to FIG. 5B , when the temperature of the light-emitting layer 3 is 300° C., a material may be deposited on the light-emitting layer 3 using a method such as magnetron sputtering, and the material may be ZnO. The ZnO material is then annealed to form a C-axis oriented second electron transport sub-layer 210.

[0273] For example, the second electron transport sublayer 210 is c-axis oriented, and its horizontal conductivity is much lower than its vertical conductivity, which can effectively reduce the side leakage of the thin film and avoid the occurrence of crosstalk.

[0274] Or, S42 includes S42-3.

[0275] S42-3: Using a magnetron sputtering process, referring to FIG. 5B, depositing a material for the electron transport sublayer on the light-emitting layer 3 under a second sputtering power to form a second electron transport sublayer 210 with a C-axis orientation, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0276] Illustratively, the sputtering power in the above magnetron sputtering process is 3 to 30 W / cm. 2 is.

[0277] In some embodiments, S43 includes S43-1.

[0278] S43-1, using a process such as magnetron sputtering, when the temperature of the second electron transport sublayer 210 is at a third temperature, a material of the electron transport sublayer 21 is deposited on the second electron transport sublayer 210 to form a non-C-axis oriented first electron transport sublayer 211.

[0279] Here, the third temperature is a base temperature at which the material can be made to have a non-C-axis orientation, and the third temperature is, for example, 100°C.

[0280] For example, referring to FIG. 5B, a material may be deposited on the second electron transport sublayer 210 using a method such as magnetron sputtering when the temperature of the second electron transport sublayer 210 is 100° C., and the material may be ZnO, thereby forming a non-C-axis oriented first electron transport sublayer 211.

[0281] Or, S43 includes S43-2.

[0282] S43-2, using a magnetron sputtering process, referring to FIG. 5B, depositing an electron transport sublayer material on the second electron transport sublayer 210 under a first sputtering power to form a non-C-axis oriented electron transport sublayer, where the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.

[0283] Exemplarily, the first sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is smaller than the first sputtering power.

[0284] The following describes a specific step S4′ when the formed electron transport layer 2 includes three electron transport sublayers 21. Here, the electron transport sublayer 21 closest to the light-emitting layer 3 is a C-axis oriented electron transport sublayer, and the electron transport sublayer 21 closest to the second electrode 5 is a C-axis oriented electron transport sublayer or a non-C-axis oriented electron transport sublayer. The three electron transport sublayers include a first electron transport sublayer, a second electron transport sublayer, and a middle electron transport sublayer, where the first electron transport sublayer is farthest from the light-emitting layer, the second electron transport sublayer is closest to the light-emitting layer, and the middle electron transport sublayer is located between the first and second electron transport sublayers and is a non-C-axis oriented electron transport sublayer.

[0285] Here, when the light-emitting element 10 is placed upright and the electron transport layer 2 includes three electron transport sub-layers 21 as shown in FIG. 6B, in step S4′, the step of forming the electron transport layer 2 on the first electrode 1 correspondingly includes steps S44 to S46 as shown in FIG. 19A.

[0286] S44: Using a magnetron sputtering process, a second electron transporting sub-layer 210 is formed on the light emitting layer 3, wherein the second electron transporting sub-layer 210 is a c-axis oriented electron transporting sub-layer.

[0287] S45, using a magnetron sputtering process to form an intermediate electron transport sublayer 212 on the second electron transport sublayer 210, wherein the intermediate electron transport sublayer 212 of each layer is a non-c-axis oriented electron transport sublayer.

[0288] S46: Using a magnetron sputtering process, a first electron transport sublayer 211 is formed on the middle electron transport sublayer 212, where the first electron transport sublayer 211 is a c-axis oriented electron transport sublayer.

[0289] In some embodiments, S44 includes S44-1.

[0290] S44-1: When the temperature of the light-emitting layer 3 is at a first temperature, a material for the electron transport sublayer 21 is deposited on the light-emitting layer 3 using a process such as magnetron sputtering to form a second electron transport sublayer 210 with a C-axis orientation.

[0291] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0292] For example, referring to FIG. 6B , when the temperature of the light-emitting layer 3 is room temperature, a material may be deposited on the light-emitting layer 3 using a method such as magnetron sputtering, and the material may be ZnO, to form a C-axis oriented second electron transport sub-layer 210.

[0293] Or, S44 includes S44-2.

[0294] S44-2: Using a magnetron sputtering process, deposit a material for an electron transport sublayer on the light-emitting layer 3 when the temperature of the light-emitting layer 3 is at a second temperature, and anneal the material for the electron transport sublayer under the second temperature condition to form a second electron transport sublayer 210 with a C-axis orientation.

[0295] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0296] For example, referring to FIG. 6B , when the temperature of the light-emitting layer 3 is 300° C., a material may be deposited on the light-emitting layer 3 using a method such as magnetron sputtering, and the material may be ZnO. The ZnO material is then annealed to form a C-axis oriented second electron transport sub-layer 210.

[0297] For example, the second electron transport sublayer 210 is c-axis oriented, and its horizontal conductivity is much lower than its vertical conductivity, which can effectively reduce the side leakage of the thin film and avoid the occurrence of crosstalk.

[0298] Or, S44 includes S44-3.

[0299] S44-3: Using a magnetron sputtering process, referring to FIG. 6B, depositing a material for the electron transport sublayer on the light-emitting layer 3 under a second sputtering power to form a second electron transport sublayer 210 with a C-axis orientation, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0300] Illustratively, the sputtering power in the above magnetron sputtering process is 3 to 30 W / cm. 2 is.

[0301] In some embodiments, S45 includes S45-1.

[0302] S45-1, using a process such as magnetron sputtering, when the temperature of the second electron transport sublayer 210 is at a third temperature, a material of the electron transport sublayer 211 is deposited on the second electron transport sublayer 210 to form a non-C-axis oriented intermediate electron transport sublayer 212.

[0303] Here, the third temperature is a base temperature at which the material can be made to have a non-C-axis orientation, and the third temperature is, for example, 100°C.

[0304] For example, referring to FIG. 6B, a material may be deposited on the second electron transport sublayer 210 using a method such as magnetron sputtering when the temperature of the second electron transport sublayer 210 is 100° C., and the material may be ZnO, thereby forming a non-c-axis oriented intermediate electron transport sublayer 212.

[0305] Alternatively, S45 includes S45-2.

[0306] S45-2, using a magnetron sputtering process, referring to FIG. 6B, depositing an electron transport sublayer material on the second electron transport sublayer 210 under a first sputtering power to form a non-C-axis oriented electron transport sublayer, where the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.

[0307] Exemplarily, the first sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is smaller than the first sputtering power.

[0308] In some embodiments, S46 includes S46-1.

[0309] S46-1, using a process such as magnetron sputtering, when the temperature of the intermediate electron transport sublayer 212 is at a first temperature, the material of the electron transport sublayer 21 is deposited on the intermediate electron transport sublayer 212 to form a first electron transport sublayer 211 with a C-axis orientation.

[0310] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0311] For example, referring to FIG. 6B, when the temperature of the intermediate electron transport sublayer 212 is room temperature, a material may be deposited on the intermediate electron transport sublayer 212 using a method such as magnetron sputtering, which may be ZnO, to form a first electron transport sublayer 211 with a C-axis orientation.

[0312] Or, S46 includes S46-2.

[0313] S46-2, using a magnetron sputtering process, when the temperature of the intermediate electron transport sublayer 212 is a second temperature, depositing an electron transport sublayer material on the intermediate electron transport sublayer 212, and annealing the electron transport sublayer material under the second temperature condition to form a first electron transport sublayer 211 with a C-axis orientation.

[0314] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0315] For example, referring to FIG. 6B , when the temperature of the intermediate electron transport sublayer 212 is 300° C., a material may be deposited on the intermediate electron transport sublayer 212 using a method such as magnetron sputtering, and the material may be ZnO, and the ZnO material is annealed to form a first electron transport sublayer 211 with a C-axis orientation.

[0316] For example, the first electron transport sub-layer 211 is c-axis oriented, and its horizontal conductivity is much lower than its vertical conductivity, which can effectively reduce the side leakage of the thin film and avoid the occurrence of crosstalk.

[0317] Or, S46 includes S46-3.

[0318] S46-3, using a magnetron sputtering process, referring to FIG. 6B, depositing an electron transport sublayer material on the middle electron transport sublayer 212 under a second sputtering power to form a first electron transport sublayer 211 with a C-axis orientation, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0319] Illustratively, the sputtering power in the above magnetron sputtering process is 3 to 30 W / cm. 2 is.

[0320] In some other embodiments, when the electron transport layer 2 includes three electron transport sub-layers 21, as shown in FIG. 19B, in step S4′, the step of forming the electron transport layer 2 on the light-emitting layer 3 includes steps S47 to S49 correspondingly.

[0321] S47: Using a magnetron sputtering process, a second electron transporting sub-layer 210 is formed on the light emitting layer 3, wherein the second electron transporting sub-layer 210 is a c-axis oriented electron transporting sub-layer.

[0322] S48: Using a magnetron sputtering process, form an intermediate electron transport sublayer 212 on the second electron transport sublayer 210, where the intermediate electron transport sublayer 212 of each layer is a non-c-axis oriented electron transport sublayer.

[0323] S49: Using a magnetron sputtering process, a first electron transport sublayer 211 is formed on the intermediate electron transport sublayer 212, where the first electron transport sublayer 211 is a non-c-axis oriented electron transport sublayer.

[0324] In some embodiments, S47 includes S47-1.

[0325] S47-1, using a process such as magnetron sputtering, when the temperature of the light-emitting layer 3 is at a first temperature, a material for the electron transport sublayer 21 is deposited on the light-emitting layer 3 to form a second electron transport sublayer 210 with a C-axis orientation.

[0326] Here, the first temperature is a base temperature at which the material can be made to have a C-axis orientation, and for example, the first temperature is room temperature, that is, 25°C.

[0327] For example, referring to FIG. 6B , when the temperature of the light-emitting layer 3 is room temperature, a material may be deposited on the light-emitting layer 3 using a method such as magnetron sputtering, and the material may be ZnO, thereby forming a C-axis oriented second electron transport sub-layer 210.

[0328] Or, S47 includes S47-2.

[0329] S47-2. Using a magnetron sputtering process, deposit a material for an electron transport sublayer on the light-emitting layer 3 when the temperature of the light-emitting layer 3 is at a second temperature, and anneal the material for the electron transport sublayer under the second temperature condition to form a C-axis oriented electron transport sublayer.

[0330] Here, the second temperature is a base temperature at which the deposited material can be made to have a C-axis orientation, and the second temperature is, for example, 200 to 500°C.

[0331] For example, referring to FIG. 6B , when the temperature of the light-emitting layer 3 is 300° C., a material may be deposited on the light-emitting layer 3 using a method such as magnetron sputtering, and the material may be ZnO. The ZnO material is then annealed to form a C-axis oriented second electron transport sub-layer 210.

[0332] For example, the second electron transport sublayer 210 is c-axis oriented, and its horizontal conductivity is much lower than its vertical conductivity, which can effectively reduce the side leakage of the thin film and avoid the occurrence of crosstalk.

[0333] Or, S47 includes S47-3.

[0334] S47-3: Using a magnetron sputtering process, referring to FIG. 6B, depositing an electron transport sublayer material on the light-emitting layer 3 under a second sputtering power to form a C-axis oriented second electron transport sublayer 210, where the second sputtering power is a sputtering power that can cause the material to form a C-axis orientation.

[0335] Illustratively, the sputtering power in the above magnetron sputtering process is 3 to 30 W / cm. 2 is.

[0336] For the specific process steps of S48, please refer to the description of S45.

[0337] In some embodiments, S49 includes S49-1.

[0338] Using a process such as S49-1 or magnetron sputtering, when the temperature of the intermediate electron transport sublayer 212 is at a third temperature, the material of the electron transport sublayer 21 is deposited on the intermediate electron transport sublayer 212 to form a first electron transport sublayer 211 with a non-C-axis orientation.

[0339] Here, the third temperature is a base temperature at which the material can be made to have a non-C-axis orientation, and the third temperature is, for example, 100°C.

[0340] For example, referring to FIG. 6B , when the temperature of the intermediate electron transport sublayer 212 is 100° C., a material may be deposited on the intermediate electron transport sublayer 212 using a method such as magnetron sputtering, which may be ZnO, thereby forming a non-C-axis oriented first electron transport sublayer 211.

[0341] Or, S49 includes S49-2.

[0342] S49-2, using a magnetron sputtering process, referring to FIG. 6B, depositing an electron transport sublayer material on the intermediate electron transport sublayer 212 under a first sputtering power to form a non-C-axis oriented electron transport sublayer, where the first sputtering power is a sputtering power that can cause the material to form a non-C-axis orientation.

[0343] Exemplarily, the first sputtering power in the above magnetron sputtering process is 3 to 30 W / cm 2 and the second sputtering power is smaller than the first sputtering power.

[0344] In some embodiments, the intermediate electron transport layer 212 includes at least two electron transport sublayers 21, and each of the at least two electron transport sublayers 21 is a non-C-axis oriented intermediate electron transport sublayer 212. For the manufacturing method of the non-C-axis oriented intermediate electron transport sublayer 212, refer to the specific manufacturing method of the intermediate electron transport sublayer 212 when the electron transport layer 2 includes three electron transport sublayers described above, and the description will not be repeated here.

[0345] Some embodiments of the present disclosure further provide a display substrate 100. As shown in Figures 20 and 21A, the display substrate 100 includes the light-emitting element 10 described above.

[0346] The display substrate 100 may be, for example, a quantum dot organic light emitting diode (QLED) display substrate, a mini light emitting diode (Mini LED) display substrate, or a micro light emitting diode (Micro LED) display substrate.

[0347] 21A and 21B , in some embodiments, a display substrate 100 includes a substrate 11 and a pixel definition layer 8 disposed on one side of the substrate 11. The pixel definition layer 8 includes a plurality of openings 81. First electrodes 1 of a plurality of light-emitting elements 10 are disposed between the substrate 11 and the pixel definition layer 8. Each opening 81 exposes at least a portion of the first electrode 1 of one light-emitting element 10. The electron transport layer 2, the light-emitting layer 3, the hole transport layer 4, and the second electrode 5 of the light-emitting element 10 are stacked in order on the first electrode 1 and located within the openings 81. The light-emitting element has a transposed structure.

[0348] 21C and 21D, a display substrate 100 includes a substrate 11 and a pixel definition layer 8 disposed on one side of the substrate 11. The pixel definition layer 8 includes a plurality of openings 81. The second electrodes 5 of a plurality of light-emitting elements 10 are disposed between the substrate 11 and the pixel definition layer 8. Each opening 81 exposes at least a portion of the second electrode 5 of one light-emitting element 10. The electron transport layer 2, the light-emitting layer 3, the hole transport layer 4, and the first electrode 1 of the light-emitting element 10 are stacked in order on the second electrode 5 and are located within the openings 81. The light-emitting element has a vertically positioned structure.

[0349] In some embodiments, the display substrate 100 includes a plurality of subpixels, each of which includes at least one light-emitting element, and the subpixels are red, green, and blue subpixels. The materials of the light-emitting layers of the light-emitting elements in the red, green, and blue subpixels are different, where RGB represents the light-emitting layer in the red subpixel, the light-emitting layer in the green subpixel, and the light-emitting layer in the blue subpixel, respectively, as shown in Figures 21A to 21D, and the display substrate 100 can emit light of three different colors: red, green, and blue.

[0350] As shown in FIGS. 21A and 21B, when the light emitting element included in the display substrate has a transposed structure, the structure of each film layer included in the light emitting element has the following examples.

[0351] In some embodiments, as shown in FIG. 21A, the electron transport layer 21 of the light-emitting element 10 is located within the opening 81, and the electron transport layers 21 of the multiple light-emitting elements 10 do not contact each other.

[0352] For example, the electron transport layers 2 of the multiple light-emitting elements 10 do not contact each other, i.e., the electron transport layers 2 of the subpixels of the multiple light-emitting elements 10 are not shared. During the manufacturing process, the initial electron transport layer 2 formed over the entire layer needs to be exposed, etched, and patterned to form multiple electron transport layers 2 located within the multiple openings, respectively, which further reduces crosstalk of electrical signals and improves device efficiency.

[0353] In some examples, the hole transport layers 4 of multiple light-emitting elements 10 may be in contact with each other, and the hole injection layers 6 of multiple light-emitting elements 10 may be in contact with each other, so that the hole transport layers 4 and the hole injection layers 6 of multiple light-emitting elements 10 are shared.

[0354] 21B , the display substrate 100 includes a pixel definition layer 8 and an electron transport film layer 12 disposed on a side of the first electrodes 1 of the plurality of light-emitting elements 10 that faces away from the substrate 11. The portion of the electron transport film layer 12 located within the opening 81 is the electron transport layer 2 of the plurality of light-emitting elements 10. The electron transport layer 2 of the light-emitting elements 10 includes a first portion G1 disposed on one side of the light-emitting layer and a second portion G2 disposed on a sidewall of the opening 81. The electron transport layers 2 of the plurality of light-emitting elements 10 are in contact with each other.

[0355] For example, the electron transport film layer 12 further includes a portion located on the surface of the pixel defining layer 8, which is referred to as an electron transport connecting layer 2′. The electron transport layers 2 of the multiple light-emitting elements 10 are in contact with each other via the electron transport connecting layer 2′.

[0356] For example, the electron transport layers 2 of the multiple light-emitting elements 10 are in contact with each other, i.e., the subpixels of the multiple light-emitting elements 10 share the electron transport layer 12. During the manufacturing process, no patterning process is required for the electron transport layer. The electron transport layer 2 has extremely low lateral conductivity, so no lateral current leakage occurs.

[0357] In some examples, the hole transport layers 4 of multiple light-emitting elements 10 do not contact each other, and the hole injection layers 6 of multiple light-emitting elements 10 do not contact each other, so the hole transport layers 4 and hole injection layers 6 of multiple light-emitting elements 10 are not shared.

[0358] As shown in Figures 21A and 21B, the first electrode 1 is a bottom electrode, the second electrode 5 is a top electrode, and the multiple first electrodes are separated from each other and do not contact each other, while the multiple second electrodes 5 are contacted to each other and formed as a whole as a second electrode layer, which provides the same signal to multiple light-emitting elements.

[0359] As shown in FIGS. 21C and 21D, when the light emitting element included in the display substrate has a normal structure, the structure of each film layer included in the light emitting element has the following examples.

[0360] 21C , the display substrate 100 includes a pixel defining layer 8 and an electron transport film layer 12 disposed on the side of the light-emitting layers 3 of the plurality of light-emitting elements 10 that faces away from the substrate 11. Portions of the electron transport film layer 12 located within the plurality of openings 81 constitute the electron transport layers 2 of the plurality of light-emitting elements 10. The electron transport layers 2 of the light-emitting elements 10 include a first portion G1 disposed on the light-emitting layers 3 and a second portion G2 disposed on the sidewalls of the openings 81. The electron transport layers 2 of the plurality of light-emitting elements 10 contact each other.

[0361] For example, the electron transport film layer 12 further includes a portion located on the surface of the pixel defining layer 8, which is referred to as an electron transport connecting layer 2′. The electron transport layers 2 of the multiple light-emitting elements 10 are in contact with each other via the electron transport connecting layer 2′.

[0362] For example, the electron transport layers 2 of the multiple light-emitting elements 10 are in contact with each other, i.e., the subpixels of the multiple light-emitting elements 10 share the electron transport layer 12. During the manufacturing process, no patterning process is required for the electron transport layer. The electron transport layer 2 has extremely low lateral conductivity, so no lateral current leakage occurs.

[0363] In some examples, the hole transport layers 4 of multiple light-emitting elements 10 do not contact each other, and the hole injection layers 6 of multiple light-emitting elements 10 do not contact each other, so the hole transport layers 4 and hole injection layers 6 of multiple light-emitting elements 10 are not shared.

[0364] In some embodiments, as shown in FIG. 21D, the electron transport layers 21 of the light-emitting elements 10 are located within the openings 81, and the electron transport layers 21 of the light-emitting elements 10 do not contact each other.

[0365] For example, the electron transport layers 2 of the multiple light-emitting elements 10 do not contact each other, i.e., the electron transport layers 2 of the subpixels of the multiple light-emitting elements 10 are not shared. During the manufacturing process, the initial electron transport layer 2 formed over the entire layer needs to be exposed, etched, and patterned to form multiple electron transport layers 2 located within the multiple openings, respectively, which further reduces crosstalk of electrical signals and improves device efficiency.

[0366] In some examples, the hole transport layers 4 of multiple light-emitting elements 10 may be in contact with each other, and the hole injection layers 6 of multiple light-emitting elements 10 may be in contact with each other, so that the hole transport layers 4 and the hole injection layers 6 of multiple light-emitting elements 10 are shared.

[0367] As shown in Figures 21C and 21D, the first electrode 1 is a top electrode, the second electrode 5 is a bottom electrode, and the multiple second electrodes 5 are separated from each other and do not contact each other, while the multiple first electrodes are contacted with each other and formed as a whole as a first electrode, and the first electrode provides the same signal to multiple light-emitting elements.

[0368] The beneficial effects of the display substrate 100 described above are the same as those of the light-emitting device 10 provided by the first embodiment of the present disclosure, and will not be repeated here.

[0369] Some embodiments of the present disclosure further provide a display device 1000. As shown in Fig. 22, the display device 1000 includes the display substrate 100 described above.

[0370] The display device 1000 provided by the embodiments of the present disclosure may be any device that displays text or images, whether moving (e.g., video) or static (e.g., still images). More specifically, it is anticipated that the embodiments may be applied to or associated with a variety of electronic devices, including, but not limited to, mobile phones, wireless devices, personal data assistants (PDAs), handheld or portable computers, global positioning system (GPS) receivers / navigators, cameras, MP4 video players, video cameras, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, car displays (e.g., speedometer displays, distance meters, etc.), navigators, cockpit controllers and / or displays, camera view displays (e.g., rearview camera displays in vehicles), electronic photography, electronic signage or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of jewelry images), etc.

[0371] The above are merely specific embodiments of the present disclosure, and the scope of protection of the present disclosure is not limited thereto. Any modifications or replacements that can be easily thought up by a person skilled in the art within the technical scope of the present disclosure are intended to be embraced within the technical scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be governed by the scope described in the claims.

Claims

1. A light-emitting element, a first electrode, an electron transport layer, a light-emitting layer, a hole transport layer, and a second electrode, which are stacked in this order; the electron transport layer includes at least one electron transport sublayer, and of the at least one electron transport sublayer, the electron transport sublayer closest to the light-emitting layer is a c-axis oriented electron transport sublayer; The C-axis orientation is a direction perpendicular to the plane in which the light-emitting layer is located, and in the C-axis oriented electron transport sublayer, the ratio of the number of crystal grains that do not overlap with adjacent crystal grains along the direction perpendicular to the plane in which the light-emitting layer is located to the total number of crystal grains is greater than 85%. Light-emitting element.

2. In the C-axis oriented electron transport sublayer, the ratio of the number of crystal grains in which the spacing between adjacent crystal grains is smaller than the dimension of the crystal grains in a first direction to the total number of crystal grains is greater than 50%, and the first direction is parallel to a plane in which the light emitting layer is located. The light-emitting device according to claim 1 .

3. the electron transport layer is composed of one electron transport sublayer, the electron transport sublayer is a C-axis oriented electron transport sublayer, and the thickness of the C-axis oriented electron transport sublayer is 30 nm to 90 nm; The light-emitting device according to claim 1 or 2.

4. the electron transport layer is composed of two electron transport sublayers, and of the two electron transport sublayers, the electron transport sublayer closer to the light-emitting layer is provided as a C-axis oriented electron transport sublayer, and the electron transport sublayer farther from the light-emitting layer is a non-C-axis oriented electron transport sublayer; The thickness of each of the electron transport sublayers is 15 nm to 40 nm. The light-emitting device according to claim 1 or 2.

5. the electron transport layer comprises at least three electron transport sublayers; Among the at least three electron transport sublayers, the electron transport sublayer closest to the light-emitting layer is a c-axis oriented electron transport sublayer; the electron transport sublayer closest to the first electrode is a c-axis oriented electron transport sublayer or a non-c-axis oriented electron transport sublayer; the electron transport sublayer disposed between the electron transport sublayer closest to the light-emitting layer and the electron transport sublayer closest to the first electrode is a non-C-axis oriented electron transport sublayer; The light-emitting device according to claim 1 or 2.

6. the electron transport layer is composed of three electron transport sublayers, and the thickness of each of the electron transport sublayers is 10 nm to 30 nm; The light-emitting device according to claim 5 .

7. the ratio of the thickness of the middle electron transport sublayer to the total thickness of the electron transport layers is in the range of 0.23 to 0.35; The light-emitting device according to claim 6 .

8. the electron transport sublayer closest to the first electrode is a C-axis oriented electron transport sublayer, and the C-axis oriented electron transport sublayer closest to the light-emitting layer has a greater degree of C-axis orientation than the C-axis oriented electron transport sublayer closest to the first electrode; The light-emitting device according to claim 7 .

9. the same atoms contained in the material of each of the electron transport sublayers are oxygen atoms and zinc atoms; The light-emitting device according to claim 1 or 2.

10. the electron transport layer includes at least two electron transport sublayers, and the oxygen vacancy of the electron transport sublayer closest to the light-emitting layer is lower than the oxygen vacancy of the other electron transport sublayers; The light-emitting device according to claim 9 .

11. the oxygen vacancy of the electron transport sublayer closest to the light-emitting layer is 5% to 25% lower than the oxygen vacancy of the other electron transport sublayers; The light-emitting device according to claim 10.

12. the LUMO energy level of the electron transporting sublayer closest to the light-emitting layer is closer to the LUMO energy level of the light-emitting layer than the LUMO energy levels of the other electron transporting sublayers; The light-emitting device according to claim 11 .

13. the electron transport layer includes three electron transport layers, and an intermediate electron transport sublayer further includes doping atoms, the doping atoms including at least one of magnesium, gallium, and boron nitride; The light-emitting device according to claim 9 .

14. the conduction band energy level of the electron transport sublayer containing the doping atoms is shallower than the conduction band energy level of the electron transport sublayer not containing the doping atoms; The light-emitting device according to claim 13 .

15. the material of the electron transport layer is at least one inorganic material, and no ligand material is provided in any of the electron transport sublayers of the electron transport layer; The light-emitting device according to claim 1 or 2.

16. The light-emitting device further comprises an intermediate layer disposed between the light-emitting layer and the electron transport sublayer closest to the light-emitting layer, the material of the intermediate layer being an organic substance or a high molecular weight polymer, the material of the intermediate layer filling pores between adjacent crystal grains of the electron transport sublayer closest to the light-emitting layer. The light-emitting device according to claim 15.

17. the light-emitting device has a transposed structure, and each electron transport sub-layer in the electron transport layer has a surface roughness of 0.5 nm to 2 nm on a side away from the first electrode; Alternatively, the light-emitting device has a normal structure, and the surface roughness of each electron transport sub-layer of the electron transport layer on a side away from the second electrode is 0.5 nm to 2 nm. The light-emitting device according to claim 1 or 2.

18. A method for manufacturing a light-emitting element, comprising: forming a first electrode; forming an electron transport layer on the first electrode; forming a light-emitting layer on the electron transport layer; forming a hole transport layer on the light-emitting layer; forming a second electrode on the hole transport layer; or forming a second electrode; depositing a hole transport layer on the second electrode; forming a light-emitting layer on the hole transport layer; forming an electron transport layer on the light-emitting layer; forming a first electrode on the electron transport layer; Including, the electron transport layer includes at least one electron transport sublayer, and of the at least one electron transport sublayer, the electron transport sublayer closest to the light-emitting layer is a C-axis oriented electron transport sublayer, and in the C-axis oriented electron transport sublayer, the ratio of the number of crystal grains that do not overlap with adjacent crystal grains along a direction perpendicular to a plane in which the light-emitting layer is located to the total number of crystal grains is greater than 85%; A method for manufacturing a light-emitting device.

19. forming the electron transport sub-layer closest to the light emitting layer includes forming a c-axis oriented electron transport sub-layer using a magnetron sputtering process; The method for manufacturing a light-emitting device according to claim 18.

20. the light-emitting layer, the first electrode, or the formed electron transport sublayer is the base of the electron transport sublayer formed in the next step; forming a non-c-axis oriented electron transport sublayer on the base; depositing an electron transport sub-layer material onto the base using a magnetron sputtering process when the base temperature is at a third temperature to form a non-C-axis oriented electron transport sub-layer, the third temperature being a base temperature that allows the material to form a non-C-axis orientation; forming a c-axis oriented electron transport sublayer on the base; depositing an electron transport sublayer material onto the base using a magnetron sputtering process when the base temperature is a first temperature or a second temperature, to form a C-axis oriented electron transport sublayer, wherein the first temperature is a base temperature that can cause the material to form a C-axis orientation; or depositing an electron transport sublayer material onto the base using a magnetron sputtering process when the base temperature is a second temperature, and annealing the electron transport sublayer material to form a C-axis oriented electron transport sublayer, wherein the second temperature is a base temperature that can cause the deposited material to form a C-axis orientation; The first temperature is room temperature, the second temperature is 200 to 500°C, and the third temperature is 100°C. The method for manufacturing a light-emitting device according to claim 18 or 19.

21. the light-emitting layer, the first electrode, or the formed electron transport sublayer is the base of the electron transport sublayer formed in the next step; forming a non-c-axis oriented electron transport sublayer on the base; depositing an electron transport sublayer material onto the base using a magnetron sputtering process at a first sputtering power to form a non-C-axis oriented electron transport sublayer, the first sputtering power being a sputtering power capable of forming a non-C-axis orientation in the material; forming a c-axis oriented electron transport sublayer on the base; depositing a material of the electron transport sublayer on the base using a magnetron sputtering process at a second sputtering power to form a C-axis oriented electron transport sublayer, the second sputtering power being a sputtering power capable of forming a C-axis orientation in the material; The first sputtering power is greater than the second sputtering power. The method for manufacturing a light-emitting device according to claim 18 or 19.

22. A light-emitting element according to claim 1 or 2, Display board.

23. The display substrate further comprises a substrate and a pixel definition layer disposed on one side of the substrate, the pixel definition layer including a plurality of openings; the first electrodes of the plurality of light-emitting elements are located between the substrate and the pixel definition layer, each opening exposes at least a portion of the first electrode of one light-emitting element, and the electron transport layer, the light-emitting layer, the hole transport layer, and the second electrode of the light-emitting element are sequentially stacked on the first electrodes and located within the openings; the electron transport layer of the light-emitting device is located within the opening, and the electron transport layers of the light-emitting devices are not in contact with each other; Alternatively, the display substrate may include an electron transport film layer disposed on the pixel definition layer and on the side of the first electrodes of the plurality of light-emitting elements that is away from the substrate, and portions of the electron transport film layer located within the plurality of openings are electron transport layers of the plurality of light-emitting elements, and the electron transport layer of each light-emitting element includes a first portion disposed on one side of the light-emitting layer and a second portion disposed on a side wall of the opening, and the electron transport layers of the plurality of light-emitting elements are in contact with each other. The display substrate according to claim 22.

24. The display substrate further comprises a substrate and a pixel definition layer disposed on one side of the substrate, the pixel definition layer including a plurality of openings; the second electrodes of the light-emitting elements are located between the substrate and the pixel definition layer, each opening exposes at least a portion of the second electrode of one light-emitting element, and the hole transport layer, the light-emitting layer, the electron transport layer, and the first electrode of the light-emitting element are sequentially stacked on the second electrode and located within the opening; the electron transport layer of the light-emitting device is located within the opening, and the electron transport layers of the light-emitting devices are not in contact with each other; Alternatively, the display substrate may include an electron transport film layer disposed on a side of the pixel definition layer and the light-emitting layers of the plurality of light-emitting elements that is away from the substrate, and portions of the electron transport film layer located within the plurality of openings are electron transport layers of the plurality of light-emitting elements, and the electron transport layer of each light-emitting element includes a first portion disposed on one side of the light-emitting layer and a second portion disposed on a side wall of the opening, and the electron transport layers of the plurality of light-emitting elements are in contact with each other. The display substrate according to claim 22.

Images