Racetrack memory with a read element based on a polarity-reversible Josephson superconducting current diode

Abstract

A racetrack (RT) memory is disclosed that includes a racetrack layer and at least one read element, where the read element includes a polarity-reversible Josephson superconducting current diode (=JJ).

Description

[Technical Field]

[0001] The present invention relates to a racetrack memory device with an improved read element, and more particularly to a racetrack memory in which the read element includes a polarity-reversible Josephson superconducting current diode that can detect magnetic domains, and therefore domain walls, in the racetrack. [Background technology]

[0002] Today, we live in a digital world where ever-increasing amounts of data are stored in the "cloud," accompanied by ever-increasing energy consumption. At the same time, the evolution of traditional silicon-based computing systems has reached the end of Moore's Law. Novel memory and computing devices that can use less energy are needed. Arguably, today's leading nonvolatile, high-performance memories are spintronic memories: MRAM (magnetoresistive random access memory) and RTM (racetrack memory) (see, for example, U.S. Patent Nos. 5,929,949 and 5,929,949). MRAM, like many other conventional memories, does not function well at low temperatures. MRAM requires thermal fluctuations for its operation, which are suppressed at low temperatures. RTM, on the other hand, is deterministic and thus, in principle, can operate even at the lowest temperatures. RTM is unique among memories in that it is a "shift register." In a shift register, data is encoded by the presence or absence of chiral domain walls, and these data bits are simultaneously shifted back and forth along a magnetic nanowire or "racetrack" by current pulses.

[0003] Beyond the challenge of storing ever-increasing amounts of data with the lowest possible energy consumption, there is considerable interest today in developing quantum computers to perform tasks impossible with conventional computing. Quantum computing goes beyond encoding data in memory and logic circuits as "1"s and "0"s and instead uses the phase of a wave function, which can take on any value. The most advanced of these uses superconducting or spin qubits and operates at cryogenic temperatures (approximately 10-20 mK), well below room temperature. Most research efforts focus on developing analog quantum memory and logic gates and circuits incorporating them, extending their coherence times. High-frequency signals (GHz) are required to set up and read out these qubits, and the number of signal lines required is equal to the number of qubits. For practical applications, a significant increase in the number of qubits is needed beyond what is possible today (approximately 70). The heat load of this wiring and the great complexity of the required electronics mean that scaling up to large numbers of qubits in a dilution refrigerator is extremely difficult. To solve this problem, while conventional control circuits are typically operated at room temperature, significant efforts are being expended to develop cryo-CMOS, which can operate at lower temperatures, but above the temperature of the qubits. The significant physical separation of the digital control circuitry from the analog quantum core creates significant latency and performance issues.

[0004] The critical bottleneck device in high performance racetrack memory devices is the read element, which determines how and at what speed data is read from the memory. In particular, to increase the read speed, it is desirable to work with superconducting materials that operate at the lowest possible resistance and therefore at the highest speed, while consuming less energy.

[0005] One of the most intriguing phenomena in superconductivity is the Josephson effect. The Josephson effect results in an electric current, known as supercurrent, that flows continuously without any applied voltage across a device known as a Josephson junction (JJ). A JJ consists of two (or three or more) superconductors joined by weak links that normally do not superconduct. The weak links can be a thin insulating barrier (known as a superconductor-insulator-superconductor junction, or SIS), a short section of non-superconducting metal (SNS), or a physical constriction (ScS) that weakens superconductivity at the junction.

[0006] Since the discovery of the Josephson effect, much research has been done to develop memory devices and logic circuits that utilize the nonlinear response of Josephson junctions (JJs) as computing and (volatile) memory elements, with the potential for energy-efficient, ultrafast computing. Switches based on JJs can, in principle, operate at speeds in the sub-THz (picosecond) regime with very low heat dissipation. Current supercomputing technologies require energy for cryogenic cooling; however, at the exascale, i.e., approximately 1 × 10 18 It offers significant competitive advantages over CMOS technology when scaled to FLOPS (floating point operations per second) and beyond.

[0007] Josephson junctions exhibit a critical current below which supercurrent can flow and above which the device no longer superconducts. In a JJ, the critical current flowing between the superconducting electrodes is the same for currents flowing in each direction (from the first electrode to the second electrode or from the second electrode to the first electrode). Recently, it has been discovered that JJs can exhibit a diode effect, where the critical current has distinct values ​​for these two current directions, i.e., the device exhibits current polarity. For such a Josephson diode to work, time-reversal symmetry must be broken. Time-reversal symmetry (TRS) can be broken by the application of a magnetic field when the materials forming the weak link are not inherently TRS-broken (e.g., by being inherently magnetic). Thus, in the presence of a magnetic field, a JJ can be resistive with negative currents and superconducting with positive currents, or vice versa. A magnetic field causes TRS violation, which is required to create the diode effect.

[0008] Since a magnetic field is required for the Josephson effect for materials without TRS violation, it is desirable to use the magnetic regions of the (moving) magnetic domains in a racetrack memory to trigger the polarity-dependent Josephson effect in a Josephson diode, thereby allowing the Josephson diode to be used as a read element in a racetrack memory. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] U.S. Patent No. 6,834,005 [Patent Document 2] U.S. Patent Application Publication No. 2014 / 204648 Summary of the Invention [Problem to be solved by the invention]

[0010] It is therefore an object of the present invention to provide a racetrack memory in which the read element comprises a polarity-reversible Josephson superconducting current diode capable of detecting magnetic domains, and therefore domain walls, in the racetrack memory. [Means for solving the problem]

[0011] The above objectives are achieved by a racetrack memory whose read element includes a polarity-reversible Josephson diode (JD). Such a JD can use the orientation (up or down) of the magnetic domains in the racetrack to trigger the Josephson diode effect (JDE), which causes a supercurrent or normal current to flow through the Josephson junction. This can then be used to detect a voltage (zero or finite) across the Josephson junction and, in turn, the magnetic domains, or domain walls (DWs) in the racetrack. The proposed Josephson diode includes two or more superconducting electrodes, each separated by an ultrathin crystalline Pt or Pt alloy layer (Figure 1c). This particular JD is magnetized by the magnetic domains in the racetrack, located near the Pt or Pt alloy layer. [Brief explanation of the drawings]

[0012] [Figure 1] Josephson with a nearby magnetized Pt barrier

number

number

number

number

number

number

number

number

[0013] The present invention provides a method for manufacturing a Pt-based magnetic material (e.g., YFeO 12 This is based on the surprising effect that a Pt layer can be used to "exchange transfer" the magnetic field from a YIG (Yttria-Germanium-Iron GaAs) to a JJ (see Jeon, KR., Kim, JK., Yoon, J et al., Zero-field polarity-reversible Josephson supercurrent diodes enabled by a proximity-magnetized Pt barrier. Nat. Mater. (2022). https: / / doi.org / 10.1038 / s41563-022-01300-7). The proximity of the magnetic layer to the Pt layer "makes" the Pt layer magnetic. The magnetic Pt layer exhibits strong spin-orbit coupling (SOC) and simultaneously functions as a Rashba-type Josephson barrier that weakly couples the two adjacent superconductors (see Figure 1c).

[0014] The present inventors have surprisingly discovered that even exchange fields of significantly lower strength than those produced by the YIG layer in Jeon et al. above can nearby magnetize the Pt layer, which means that even the relatively low exchange field strength (compared to YIG) of the racetrack memory layer can be used to magnetize the Pt layer and thus trigger the Josephson diode effect so that such a JJ can be used as a read element in a racetrack memory device.

[0015] Therefore, the present invention includes a racetrack (RT) memory in which the read element includes a reversible Josephson diode (JD). The Josephson junction (JJ) in the RT memory of the present invention includes two or more superconducting electrodes, each separated by an ultrathin crystalline Pt or Pt alloy layer (see FIG. 5).

[0016] Several spatial arrangements can be used to separate the superconducting electrodes. For example, the electrodes can be positioned adjacent to each other as bars, with the required lateral spacing, which can then be filled with a crystalline Pt or Pt alloy layer. This design can be fabricated sequentially, starting with a first superconducting electrode, followed by a Pt or Pt alloy layer, and then a second superconducting electrode. Alternatively, the electrodes can be fabricated in parallel by first fabricating two laterally separated superconducting electrodes and then filling the gap between them with a Pt or Pt alloy layer, or by first fabricating a Pt or Pt alloy layer, which is then laterally sandwiched between the two superconducting electrodes. In another preferred alternative, the superconducting electrodes can be positioned on top of a crystalline Pt or Pt alloy layer, as shown in Figure 1c. In another arrangement of the superconducting electrodes, they can be arranged vertically, with a Pt or Pt alloy layer positioned vertically between two superconducting electrodes. This geometry is particularly useful for 3D racetrack memory devices, where the racetracks are formed on the vertical sidewalls.

[0017] generally, The lateral spacing between the superconducting electrodes, and therefore the width of the junction formed by the crystalline Pt or Pt alloy layer, is about 3 nm to 1000 nm, preferably 3 to 100 nm, more preferably 5 to 20 nm. The thickness of each of the superconducting electrodes, which are independent of one another, is usually in the range of 2 to 100 nm, preferably 5 to 100 nm, and more preferably 5 to 50 nm. The length of the superconducting electrodes is usually in the range of 5 to 1000 nm, preferably 5 to 100 nm, and more preferably 5 to 50 nm. The width of the superconducting electrodes is generally in the range of 3 to 1000 nm, preferably 3 to 100 nm, more preferably 5 to 20 nm, independently of one another. The thickness of the Pt or Pt alloy layer forming the JD is usually in the range of 1 to 20 nm, preferably 2 to 10 nm, and more preferably 2 to 5 nm.

[0018] The superconducting electrodes are made of typical conventional superconducting materials that can be used for this purpose are known and are listed, for example, at https: / / en.wikipedia.org / wiki / List_of_super-conductors, examples of which include Al, Be, Bi, Ga, Hf, α-La, β-La, Mo, Nb, Os, Pb, Re, Rh, Ru, Sn, Ta, α-Th, Ti, V, α-W, β-W, Zn, Zr, FeB4, InN, In2O3, LaB6, MgB2, Nb3Al, NbC 1-x N x , Nb3Ge, NbO, NbN, Nb3Sn, NbTi, TiN, V3Si, YB6, ZrN, ZrB 12 , YBCO (Yttrium Barium Copper Oxide), BSCCO (Bismuth Strontium Calcium Copper Oxide), HBCCO (Mercury Bismuth Calcium Copper Oxide), preferably Nb or NbN. Superconducting 2D materials can also be used such as 2H-NbSe2.

[0019] The crystalline Pt or Pt alloy layer is either a crystalline Pt layer or a Pt alloy layer, in which Pt is homogeneously mixed (=blended) with 1 to 70 atom %, preferably 5 to 40 atom %, and more preferably 10 to 30 atom % (atom % based on Pt) of a metal selected from Bi, Re, Os, Ir, Au, Ru, Rh, Pd, Al, and Ga. The Pt alloy can be a binary, ternary, or higher mixture with one, two, or more of the metals selected from the above list. When two or more of the above listed metals are blended with Pt, the above atom % represents the total of the blended metals. The crystal structure of the alloy is preferably cubic, like Pt, although other crystal structures may be preferred depending on the composition and structure of the racetrack. L 10 Recent racetracks made using materials have been made either alone or in combination with cubic materials. 10 In some cases, it may be preferable to use Pt alloys, examples of which include Pt-Al and Pt-Ga, where the Pt content can be only about 30 atomic percent.

[0020] For the JJ of the present invention to function as a read element in a racetrack memory, the crystalline Pt or Pt alloy layer of the JJ must be "close" to the racetrack layer, resulting in an exchange transfer of magnetization from the racetrack to the Pt or Pt alloy layer. Therefore, whenever used herein, "close proximity" or "proximity" means that two materials, preferably two layers, are positioned next to each other by forming a junction phase boundary (=zero distance) or separated by a separation layer of 0.5 to 100 nm, preferably 0.5 to 10 nm, and most preferably 0.5 to 5.0 nm. The separation layer can be selected from a second Pt or Pt alloy layer that is different from the first layer. While the Pt or Pt alloy layer must be close to the magnetic layer within the racetrack, the extent of this layer need not completely cover the racetrack across its entire width; for example, it can cover only a portion of the racetrack, from either side of the racetrack or in the center. Similarly, the Pt or Pt alloy layer can be wider than the width of the racetrack, for example, to facilitate fabrication and integration of the superconducting electrodes. The preferred case is when the Pt or Pt alloy layer separating the two superconducting electrodes is completely covered by the magnetic racetrack, and the extent (length) of the Pt layer along the racetrack is smaller than the separation between consecutive DWs.

[0021] The racetrack (RT) itself is preferably a ferromagnetic or synthetic antiferromagnetic (SAF) racetrack. A typical RT layer consists of multiple layers that jointly form the RT layer. The basic structure of the racetrack is usually based on a ferromagnetic structure or a synthetic antiferromagnetic structure. A synthetic antiferromagnetic structure may consist of two ferromagnetic layers antiferromagnetically coupled via an antiferromagnetic coupling layer, usually made of a transition metal such as Ru or Ir. The ferromagnetic structure usually includes one or more, preferably two or three, layers of ferromagnetic materials selected from Co, Ni, or Fe, or alloys of Fe and / or Co, or alloys of Ni that may further contain one or more of Fe and Co. Typically, the racetrack structure has a total thickness in the range of 0.5 to 3.0 nm. Each individual layer of the racetrack structure may have a thickness in the range of 0.1 to 1.5 nm. The structure consists of multiple thin magnetic layers such that the multilayer structure exhibits PMA (perpendicular magnetic anisotropy), which is usually derived from the interface characteristics of the multilayer structure.

[0022] The individual layers of the racetrack device can be prepared by various techniques, depending on the type of material. Films can be prepared from elements, alloys, or homogeneous element mixtures. To produce the films, techniques such as chemical solution deposition (CSD), spin coating, chemical vapor deposition (CVD), plasma-enhanced CVD, atomic layer deposition (ALD), molecular layer deposition (MLD), electron beam evaporation, molecular beam epitaxy (MBE), sputtering, pulsed laser deposition, cathodic arc deposition (arc-PVD), or electrohydrodynamic deposition can be used. For example, films can be prepared by sputtering (co-sputtering) elements onto a substrate. If it is desired to provide a film with a surface having a predetermined crystal orientation, sputtering (co-sputtering) can be performed by epitaxial growth onto a corresponding substrate exhibiting the desired crystal orientation with the same or similar unit cell dimensions as the compound being grown. All of the above methods are generally known in the art.

[0023] Due to its unique performance at low temperatures, the racetrack memory according to the present invention is particularly well suited for quantum computers, preferably cryogenic quantum computers.

[0024] Surprisingly, the JJ read element can also be used for local pinning or trapping of domain walls in the racetrack according to the present invention, thereby enabling reliable synchronized movement of a series of domain walls along the racetrack to predetermined positions along the racetrack.

[0025] The invention is illustrated by the following examples. [Example]

[0026] Ferrimagnetic insulating Y3Fe5O placed under a Pt layer 12 A transverse JJ (Fig. 1c and d) was fabricated in which multiple superconducting Nb electrodes were separated by ultrathin crystalline Pt layers closely magnetized by a (YIG) film.

[0027] The magnetic Pt layer with a strong SOC acts as a Rashba-type Josephson barrier that weakly couples two adjacent Nb superconductors.

[0028] As shown in Fig. 1a, the magnetization orientation M of the Pt weak link Pt has a component ( / / x-axis) perpendicular to both its structural inversion asymmetry ( / / z-axis) and the direction of current flow ( / / y-axis), the associated exchange spin splitting ΔE acting on the conduction electrons ex and Rashba (type) SOCΔk R forms a non-trivial in-plane (IP) spin texture Fermi contour in k-space, which is characterized by inhomogeneous positive and negative I branches (

number

number

number

number

number

number

[0029] Figure 2a shows μ0H || T of the junction seen at =0 C Two different M Pt ( / / ±x-axis) shows a typical current-voltage IV curve of a magnetic 5 nm thick Pt JJ.

number

number

[0030] In contrast, the Cu-inserted control JJs, in which a 5 nm (Fig. 2b) or 10 nm thick Cu interfacial layer with weak SOC is inserted between the Pt and YIG layers as a Rashba isolation and proximity suppression layer, exhibited a low SOC.

number

number

number

number

number

number

[0031] Zero-field polarity switchable ΔI C To understand the underlying origin of ΔI at fixed γ = 90° (Fig. 3a and 3d), C How μ0H || How does it depend on the intensity and how is it constant μ0=H || 5 mT (Fig. 3b and Fig. 3d). In Fig. 3a, ΔI C and I C (Inset) μH for magnetic 5 nm thick Pt JJ || from which the asymmetric hysteresis ΔI C (μ0H II ) but μ0H || It can be clearly seen that the low-field hysteresis ΔI C (|μ0H || |≦5mT) behavior, M Pt ( / / M YIG )'s μ0H || By mimicking the drive reversal, |ΔI C | is higher μ0H || These are the exchange field-driven ΔI C characterize its effective ΔE ex is 0.8 meV, but corresponds to an internal spin splitting magnetic field of 9000 mT, so any μH || Without the need for |ΔI C |≒60μA easily generated. Zeeman field driven ΔI in non-magnetic NM-based JJs C In this case, ΔI C is up to a breakdown electric field (75mT) μ0H ||It was found to be linear at , above which the supercurrent rectification rapidly disappears.

[0032]

number

number

[0033] γ, α R , and for a given value of L,

number

number

number

[0034]

number

[0035] In particular, t Pt For the 3 nm Pt JJ (Fig. 4a and 4b), a significant increase of up to 35% was observed at 2 K.

number

number

number

number

number

number

number

number

number

[0036] When JJ is in the diffusion regime,

number

number

number

number

[0037] method Sample preparation and device fabrication. Prior to lithography device fabrication, 1 × 10 -9 (111)-oriented single-crystalline Gd3Ga5O was grown at room temperature by dc magnetron plasma sputtering in an ultra-high vacuum system with a base pressure of 1 Torr. 12 Three different types of normal metal (NM) structures were prepared on 200 nm thick single-crystalline YIG films grown by liquid phase epitaxy on (GGG) wafers: Pt (3–10 nm), Pt (5 nm) / Cu (5–10 nm), and Cu (5 nm). All these films were sputtered at 27 °C with a sputtering power of 15 W and an Ar pressure of 3 mTorr. To prevent oxidation, a 1 nm thick sputter-deposited AlO film was added. x To fabricate the lateral JJs (Fig. 1d and Fig. 1f), a 1.5 × 50 μm 2A central NM track with lateral dimensions of 1.0 × 1.5 μm was first defined using optical lithography and Ar ion beam etching. Then, electrical leads were defined, and bonding pads made of Au (80 nm) / Ru (2 nm) were deposited by Ar ion beam sputtering. 2 A number of Nb electrodes with active lateral dimensions of 1.5 × 10 were defined on top of the NM tracks via electron beam lithography and a lift-off step. 50 nm thick Nb electrodes were deposited on the NM tracks. -4 The Nb electrodes were grown by Ar ion beam sputtering at an Ar pressure of 1000 mbar. The edge-to-edge separation between adjacent Nb electrodes (Fig. 1d and 1f) was 4 Josephson superconducting current rectification (∝L) with detectably large critical current at 2 K in a He cryostat 3 The thickness of the AlO electrode was fixed at about 100 nm to maximize the Nb content. x The capping layer and the Au surface were Ar ion beam etched to form possible direct metal electrical contacts.

[0038] The proximity effect of singlet Cooper pairs in a magnetic Josephson barrier is

number

number

[0039] Josephson transport measurements and data analysis. The current-voltage I-V curves of the fabricated JJs (Fig. 1d and Fig. 1f) were measured by a four-probe configuration in a Quantum Design Physical Property Measurement System using a Keithley 6221 current source and a Keithley 2182A nanovoltmeter. The T C Before the zero-field IV measurements (Figures 2a and 2b, 4a and 4b) below 6K, μ0H was significantly larger than the coercive field of YIG. || = ±30mT is first applied along the x-axis, and then the residual state M in the ±x direction Pt was set back to zero to initialize the Josephson critical current I C is the standard formula for an overdamped junction

number

number

[0040] Spatial dependence due to disorder

number

number

number

number

number

number

number

number

number

[0041] AHE measurement. Anomalous Hall resistance ρ AH is the effective ΔE in the nearby magnetized Pt layer induced by the underlying ferrimagnetic insulating YIG ex To estimate μ0H ⊥ The measurements were carried out under the application of the spin Hall AHE theory.

number

Claims

1. A racetrack (RT) memory comprising a racetrack layer and at least one read element, the read element comprising a polarity-reversible Josephson superconducting current diode (=JJ).

2. 10. The racetrack (RT) memory of claim 1, wherein the reversible Josephson junction (JJ) comprises two or more superconducting electrodes each separated by a Pt or Pt alloy layer.

3. The superconducting electrode includes Al, Be, Bi, Ga, Hf, α-La, β-La, Mo, Nb, Os, Pb, Re, Rh, Ru, Sn, Ta, α-Th, Ti, V, α-W, β-W, Zn, Zr, FeB. ４ , InN, In ２ O ３ , LaB ６ , MgB ２ , Nb ３ Al, NbC １－ｘ N ｘ , Nb ３ Ge, NbO, NbN, Nb ３ Sn, NbTi, TiN, V ３ Si, YB ６ , ZrN, ZrB １２ 3. The racetrack (RT) memory of claim 1 or 2, wherein the metals are independently selected from YBCO (yttrium barium copper oxide), BSCCO (bismuth strontium calcium copper oxide), HBCCO (mercury bismuth calcium copper oxide), preferably Nb or NbN, more preferably Nb.

4. 4. The racetrack (RT) memory according to claim 1, wherein the Pt alloy has a cubic crystal structure.

5. The crystalline Pt alloy is L １０ The racetrack (RT) memory according to any one of claims 1 to 4, which exhibits an alloy.

6. 6. The racetrack (RT) memory of claim 5, wherein the crystalline Pt alloy is Pt-Al or Pt-Ga.

7. The racetrack (RT) memory of any one of claims 1 to 5, wherein the crystalline Pt alloy consists of Pt uniformly mixed (blended) with 1 to 70 atomic % (atomic % based on Pt) of a metal selected from Bi, Re, Os, Ir, Au, Ru, Rh, Pd, Al, and Ga.

8. 8. The racetrack (RT) memory of claim 7, wherein the crystalline Pt alloy is a binary, ternary or higher mixture of Pt with one, two or more of the metals selected from Bi, Re, Os, Ir, Au, Ru, Rh, Pd, Al, Ga.

9. the Pt or Pt alloy layer, and The racetrack layer comprises: A racetrack (RT) memory according to any one of claims 1 to 8, forming a junction phase boundary (=zero distance) or separated by a separation layer of 0.5 to 100 nm.

10. The racetrack (RT) memory of any one of claims 1 to 9, wherein the lateral spacing between the superconducting electrodes is between about 3 nm and 1000 nm.

11. 11. The racetrack (RT) memory according to claim 1, wherein the thickness of each of the superconducting electrodes independent of each other is in the range of 2 nm to 100 nm.

12. The racetrack (RT) memory according to any one of claims 1 to 11, wherein the length of the superconducting electrodes is in the range of 5 nm to 1000 nm.

13. The racetrack (RT) memory according to any one of claims 1 to 12, wherein the width of the superconducting electrodes is in the range of 3 nm to 1000 nm.

14. The racetrack (RT) memory according to any one of claims 1 to 13, wherein the thickness of the Pt or Pt alloy layer is in the range of 1 nm to 20 nm.

15. 10. A method for fabricating a racetrack (RT) memory according to claim 1, comprising preparing films and / or film layers of individual elements of the racetrack memory from an element of the periodic system, an alloy of two or more elements of the periodic system, or a homogeneous mixture of elements of the periodic system by chemical solution deposition (CSD), spin coating, chemical vapor deposition (CVD), plasma-enhanced CVD, atomic layer deposition (ALD), molecular layer deposition (MLD), electron beam evaporation, molecular beam epitaxy (MBE), sputtering, pulsed laser deposition, cathodic arc deposition (arc-PVD), or electrohydrodynamic deposition.

16. Use of the memory of claim 1 in a quantum computer.

17. 17. The use according to claim 16, wherein the quantum computer is a cryo-quantum computer.

18. Use of polarity-reversible Josephson supercurrent diodes for local pinning or trapping of domain walls in racetrack memories.

Images