Off-chip Interface

Abstract

A transceiver circuit implemented on one or more integrated circuits, the transceiver including: a signal transmitter for forming a radio signal for transmission; a signal receiver for performing receive processing on the received radio signal; and a cancellation circuit for at least partially canceling a component of the signal for transmission in the signal receiver, the cancellation circuit configured to receive an input from the signal transmitter and to provide a cancellation output to the signal receiver, the cancellation circuit configured to form the cancellation output in response to both the input from the signal transmitter and a response received from a first external connection pad of one of the integrated circuits.

Description

[Technical Field]

[0001] The present invention relates to an integrated circuit having an interface to external components. [Background technology]

[0002] Figure 1 shows the general architecture of a typical wireless transceiver found in mobile devices such as cell phones. Transmitter 1 generates a signal for transmission. The signal is amplified by amplifier 2, bandpass filtered by transmit filter 3, and fed to antenna 4 for transmission. The signal received by antenna 4 is bandpass filtered by receive filter 5, amplified by amplifier 6, and then processed by receiver 7. Both the transmit and receive filters are connected to antenna 4. Therefore, the transmit signal from filter 3 can reach the input of filter 5. If the transmit and receive frequency bands do not overlap, in principle, filter 3 and filter 5 could cooperate to completely suppress the transmit signal from reaching receiver 7. However, in practice, this is difficult to achieve without using large or expensive filters.

[0003] Figure 2 shows an alternative configuration. Similar components are numbered similarly to Figure 1. A cancellation path 10 is coupled between the input 8 to the transmit filter 3 and the output 9 of the receive filter 5. The purpose of the cancellation path is to generate a signal at 9 that cancels any elements of the transmit signal that may have passed through the receive filter 5. This type of cancellation path can be configured in a variety of ways. In the example of Figure 2, it includes tunable filters 11 and 12, a transformer 13, and a balancing impedance 14. Filters 11 and 12 are varied to generate the desired cancellation signal at 9. The balancing impedance is intended to balance the antenna impedance. In practical circuits, it can be difficult to properly balance the antenna impedance, especially when the cancellation path is implemented on an integrated circuit.

[0004] Improved transceivers and / or cancellation circuits are needed. Summary of the Invention

[0005] According to one aspect, there is provided a transceiver circuit implemented on one or more integrated circuits, the transceiver circuit including: a signal transmitter for forming a radio signal for transmission; a signal receiver for performing receive processing on the received radio signal; and a cancellation circuit for at least partially canceling a component of the signal for transmission in the signal receiver, the cancellation circuit configured to receive an input from the signal transmitter and to provide a cancellation output to the signal receiver, the cancellation circuit configured to form the cancellation output in response to both the input from the signal transmitter and a response received from the integrated circuit(s) or a first external connection pad of one of the integrated circuits.

[0006] The response may be a reactive response to a signal formed by the cancellation circuit in response to an input from a signal transmitter.

[0007] The cancellation circuit may include a first filter coupled between the signal transmitter and the external connection pad and a second filter coupled between the external connection pad and the signal receiver. The first filter may be fixed or tunable. The second filter may be fixed or tunable. The filters may be interconnected on the integrated circuit or one of the integrated circuits. Thus, the cancellation circuit may be embodied in operative form on the integrated circuit(s). The filters may be coupled to connection pads, allowing them to be interconnected to a link between the pads that is external to the integrated circuit(s). In such an embodiment, the filters may not be interconnected on the integrated circuit or one of the integrated circuits. Thus, the cancellation circuit may not be embodied in operative form on the integrated circuit(s).

[0008] The cancellation circuit may include a first tunable filter coupled between the signal transmitter and the external connection pad and a second tunable filter coupled between a further external connection pad and the signal receiver, whereby the first tunable filter and the second tunable filter may be interconnected by an external filter coupled between the external connection pad and the further connection pad.

[0009] A signal transmitter may be coupled to a second external connection pad of the integrated circuit(s) to provide a signal for transmission to an antenna external to the or each integrated circuit.

[0010] The signal receiver may be coupled to a second external connection pad of the integrated circuit(s) for receiving radio signals received from an antenna external to the or each integrated circuit.

[0011] The signal receiver may be coupled to a third external connection pad of the integrated circuit(s) for receiving radio signals received from an antenna external to the or each integrated circuit.

[0012] The transceiver circuit may include an antenna balancing circuit coupled to a fourth external connection pad of the integrated circuit(s), by which the balancing circuit may be coupled to the first external connection pad by a transmission line external to the or each integrated circuit.

[0013] The antenna balancing circuit may have a ground node for grounding the antenna balancing circuit, and the ground node may be coupled to a fifth external connection pad of the integrated circuit(s).

[0014] The transceiver circuit may include a switch for selectively coupling the fourth external connection pad to the first external connection pad.

[0015] The or each balancing circuit may include a network including one or more capacitors and one or more inductors.

[0016] A single integrated circuit may include at least part of the cancellation circuitry and a duplexer for coupling the transmitter and receiver to the antenna, or the transmitter and receiver may be implemented remotely from the integrated circuit.

[0017] According to another aspect, a transceiver apparatus may be provided that includes the transceiver circuit described above, one or more antennas external to the integrated circuit(s) and each coupled to one or both of a signal transmitter and a signal receiver, and a matching circuit external to the integrated circuit(s) and coupled to a first external connection pad for at least partially matching a response of the antenna(s).

[0018] The matching circuit may include a first transmission line.

[0019] The antenna(s) or at least one of the antenna(s) may be coupled to the integrated circuit(s) by a second transmission line, and the length of the first transmission line may match the length of the second transmission line.

[0020] A transmission line may couple the first external connection pad to the fourth external connection pad.

[0021] The matching circuit may include a balanced circuit that includes a network including one or more capacitors and one or more inductors.

[0022] According to a further aspect, a transceiver circuit is provided implemented on one or more integrated circuits, the transceiver circuit including: a signal transmitter for forming a radio signal for transmission; a signal receiver for performing receive processing on the received radio signal; and a cancellation circuit for at least partially canceling a component of the signal for transmission in the signal receiver, the cancellation circuit configured to receive input from the signal transmitter and including a first circuit path extending to the integrated circuit(s) or a first external connection pad of one of the integrated circuits; and a second circuit path extending between the integrated circuit(s) or a second external connection pad of the one of the integrated circuits and the cancellation path for providing cancellation feedback to the signal receiver, the first path and the second path being connectable to each other by a component external to the integrated circuit.

[0023] At least one of the first path and the second path may include a tunable filter.

[0024] A signal transmitter may be coupled to a third external connection pad of the integrated circuit(s) to provide a signal for transmission to an antenna external to the or each integrated circuit.

[0025] The signal receiver may be coupled to a third external connection pad of the integrated circuit(s) for receiving radio signals received from an antenna external to the or each integrated circuit.

[0026] The signal receiver may be coupled to a fourth external connection pad of the integrated circuit(s) for receiving radio signals received from an antenna external to the or each integrated circuit.

[0027] The transceiver circuit may include an antenna balancing circuit coupled to a fifth external connection pad of the integrated circuit(s), such that the balancing circuit can be coupled to the first external connection pad and / or the second external connection pad by a transmission line external to the or each integrated circuit.

[0028] The antenna balancing circuit may have a ground node for grounding the antenna balancing circuit, and the ground node may be coupled to a sixth external connection pad of the integrated circuit(s).

[0029] The transceiver circuit may include a switch for selectively coupling the fifth external connection pad to the first external connection pad.

[0030] The or each balancing circuit may include a network including one or more capacitors and one or more inductors.

[0031] A single integrated circuit may include at least part of the cancellation circuitry and a duplexer for coupling the transmitter and receiver to the antenna, or the transmitter and receiver may be implemented remotely from the integrated circuit.

[0032] There may be a component external to the integrated circuit connecting the first path and the second path together, which may be a passive conductor, or a filter, optionally a tunable filter.

[0033] According to a further aspect, there is provided a transceiver apparatus including the transceiver circuit described above, one or more antennas external to the integrated circuit(s) and each coupled to one or both of a signal transmitter and a signal receiver, and a matching circuit external to the integrated circuit(s) and coupled to one or both of the first external connection pad and the second external connection pad for at least partially matching a response of the antenna(s).

[0034] The matching circuit may include a first transmission line.

[0035] The antenna(s) or at least one of the antenna(s) may be coupled to the integrated circuit(s) by a second transmission line, the length of the first transmission line matching the length of the second transmission line.

[0036] The matching circuit may include a balanced circuit that includes a network including one or more capacitors and one or more inductors.

[0037] The matching circuit may be configured to mimic the response of the antenna(s) as affected by any one or more of the length of one or more signal lines coupling the antenna(s) to the transceiver circuitry, the positioning of the antenna(s) relative to other components of the transceiver device, the mechanical housing of the transceiver device, and one or more ground planes of the transceiver device associated with the antenna(s).

[0038] According to a further aspect, a transceiver circuit is provided, the transceiver circuit including: a signal transmitter for forming a radio signal for transmission; a signal receiver for performing receive processing on the received radio signal; a balancing circuit; and a cancellation circuit for at least partially canceling a component of the signal for transmission in the signal receiver, the cancellation circuit configured to receive an input from the signal transmitter and provide a cancellation output to the signal receiver, the cancellation circuit configured to form the cancellation output in response to both the input from the signal transmitter and a response of the balancing circuit to an intermediate signal formed by the cancellation circuit in response to the input from the signal transmitter, wherein the balancing circuit includes one or more elements configured to be switchably enabled or disabled to change the response of the balancing circuit.

[0039] The balancing circuit and the cancellation circuit may be formed on a single integrated circuit.

[0040] The cancellation circuit may be formed on an integrated circuit having a first substrate, and at least one of the elements may be formed on a second substrate.

[0041] The first substrate and the second substrate may be made of different materials.

[0042] At least one of the elements may be a transmission line.

[0043] The transmission line may be coupled to transmit a surface wave derived from the intermediate signal.

[0044] The transceiver circuitry may be implemented on a single integrated circuit.

[0045] The response received from the first external connection pad of one of the integrated circuits may be an analog signal.

[0046] The cancellation circuit can form a cancellation output by electrically combining an input from the signal transmitter and a response received from a first external connection pad of one of the integrated circuits, the combination optionally being performed simultaneously with the cancellation.

[0047] The response received from the first external connection pad of one of the integrated circuits may be derived from the output of the signal transmitter.

[0048] The response received from the first external connection pad of one of the integrated circuits may be derived from an input to the cancellation circuit, which input may be formed in response to an input from the signal transmitter.

[0049] When the cancellation circuit includes a first tunable filter coupled between the signal transmitter and an external connection pad and a second tunable filter coupled between a further external connection pad and the signal receiver, the external connection pad and the further connection pad may not be interconnected on the integrated circuit. Thus, the cancellation circuit may be such that it operates when enabled by an external connection between two or more nodes thereof. Alternatively, the cancellation circuit may be embodied on the integrated circuit(s) such that it can operate without requiring an external connection between the two nodes of the cancellation circuit.

[0050] The entire transceiver circuitry may be implemented on a single integrated circuit. The integrated circuit may have a single semiconductor die or multiple semiconductor dies. The integrated circuit may be packaged to have multiple pads for electrical connection to external components. The transceiver device may include a circuit board on which the integrated circuit is mounted. The transceiver device may include an external housing that houses the circuit board. The or each antenna may be housed within the housing. The transceiver device may be, for example, a mobile or cellular telephone, or another form of end user device, terminal device, or user equipment device. The transceiver device may be a base station, base transceiver station, or network equipment device.

[0051] The transceiver may include a transmit circuit and a receive circuit. The transmit circuit may include a bandpass filter having a passband encompassing the transmit frequency band of the transceiver and a stopband encompassing the receive frequency band of the receiver. The control circuit may control the responses of the first filter and the second filter in response to a signal input to the bandpass filter or in response to a signal formed as an input to the bandpass filter. The receive circuit may include a bandpass filter having a passband encompassing the receive frequency band of the transceiver and a stopband encompassing the transmit frequency band of the receiver. The output of the cancellation circuit may be provided to the output of the bandpass filter of the receive circuit or a signal formed in response to the output.

[0052] The invention will now be described, by way of example only, with reference to the accompanying drawings, in which: [Brief explanation of the drawings]

[0053] [Figure 1] FIG. 2 illustrates a transceiver circuit. [Figure 2] FIG. 1 illustrates a transceiver circuit having a cancellation path. [Figure 3] FIG. 1 is a block diagram of a transceiver formed on an integrated circuit. [Figure 4]FIG. 4 shows the transceiver of FIG. 3 in more detail. [Figure 5] FIG. 10 illustrates a portion of the circuitry of an alternative design of a transceiver. [Figure 6] FIG. 10 shows a portion of the circuitry of another alternative design of a transceiver. [Figure 7] FIG. 1 shows a portion of a circuit for use with a series external filter. DETAILED DESCRIPTION OF THE INVENTION

[0054] 3 illustrates a radio frequency architecture for transmitting and receiving wireless signals. The transceiver is formed on a single integrated circuit (IC) 20. The transceiver includes a transmit module 21, a receive module 22, and a cancellation module 23. The transmit module forms signals for transmission. The receive module processes received signals. The cancellation module generates a cancellation signal in response to input from the transmit module and provides the cancellation signal to the receive module to at least partially cancel any components of the transmitted signal that may have been provided to the receive module.

[0055] In this example, transmitter module 21 includes a digital section 24 and a radio frequency (RF) section 25. The digital section forms a digital data signal for transmission. The signal is sent to RF section 25, which converts the digital signal to a radio frequency signal and amplifies it for output to antenna 26. The details of the digital signal depend on the protocol being used and the content of the message to be transmitted. The shape and frequency spectrum of the radio frequency spectrum vary depending on the air interface protocol being used. The output of RF section 25 is sent to signal line 27, which is connected to an external pad 28 of integrated circuit 20. Antenna 26 is connected to antenna pad 28 by transmission line 29. Variations of this circuit are possible. For example, digital section 24 may be implemented separately from integrated circuit 20. Examples of functions that the RF transmitter section may perform include any one or more of digital-to-analog conversion, modulation, mixing, amplification, and filtering.

[0056] In this example, the transmitter module 22 includes an RF receiver section 30 and a digital receiver section 31. The RF receiver section 30 is coupled to the antenna 26 via a transmission line 29, a pad 28, and a signal line 27. Thus, RF signals received by the antenna 26 can be sent to the RF receiver section 30. The RF receiver section processes and converts the received signals into signals suitable for input to the digital section 31. The digital section 31 then further processes the signals to detect and analyze their data content. Variations on this circuit are possible. For example, the digital section 31 may be implemented separately from the integrated circuit 20. Examples of functions that the RF receiver section can perform include any one or more of analog-to-digital conversion, demodulation, mixing, amplification, and filtering.

[0057] A signal transmitter may be considered to be a component that forms a signal for transmission, e.g., generates, encodes, filters, modulates, or amplifies the signal. Such components may operate in the analog or digital domain. Such components may operate at radio frequency or baseband. A signal receiver may be considered to be a component that processes a received signal, e.g., detects, decodes, demodulates, filters, or amplifies the signal. Such components may operate in the analog or digital domain. Such components may operate at radio frequency or baseband. In one example, a signal receiver may include a receive signal chain from a node where the receive signal chain combines with a transmit signal chain to an interface where the receive signal chain outputs a digital representation of the received signal.

[0058] The cancellation module 23 receives an input from the transmit module 24. The input represents an analog signal provided by the transmit module on the signal line 27 linking the transmit module and the receive module. The cancellation module includes circuitry for generating, in response to the input, a signal at its output suitable for at least partially canceling components of the transmit signal that may have been sent to the receive module at the receive module 22. To that end, the cancellation module includes a signal shaping module 32 and a balanced impedance module 33. The signal shaping module 32 processes the signal received from the transmit module 24 to generate a signal in a form suitable for cancellation at the receive module. Generating this signal may require compensating for the antenna impedance using a balanced impedance. The balanced impedance module 33 provides an impedance for connection to the signal shaping module that at least partially mimics the effect of an impedance load on the signal line 27, which can substantially mimic such effects. The balanced impedance module can be invoked in two modes. In the first mode, the switch 34 is closed, coupling the balanced impedance module to the signal shaping module by a path located entirely on the integrated circuit on which the signal shaping module and the balanced impedance module are defined. In the second mode, components off-chip couple signal conditioning module 32 to the balanced impedance module. The off-chip components are connected between external connection pads 35, 36 of the integrated circuit. Pad 35 is coupled on-chip to signal conditioning module 32. Pad 36 is coupled on-chip to balanced impedance module 33. In the second mode, switch 34 can be open or closed. When the switch is open, module 32 is coupled to module 33 only by paths extending off-chip. When the switch is closed, module 32 is coupled to module 33 by both (i) a first path located entirely on the integrated circuit and (ii) a second path located partially off-chip.

[0059] The type of circuit shown in FIG. 3 may offer several advantages. It is common to manufacture ICs 20 for use in several different communications products. These products may have different antennas and transmission lines 29 of different lengths and configurations, depending on the product's size, shape, and internal packaging. Nevertheless, a balanced impedance is desirable to closely balance the impedance of antenna 26 and transmission line 29. The configuration of FIG. 3 allows product manufacturers to connect appropriate circuit elements between pads 35 and 36, thereby closely balancing the inherent impedance characteristics of antenna components within the product. Product manufacturers are not limited to the components on IC 20. They can provide passive or active components coupled between pads 35 and 36, or between one or both of pads 35 and 36 and an external node, such as circuit ground. In this way, product manufacturers can tailor the performance of the integrated circuit to a specific product design. This feature allows IC 20 manufacturers to reduce the complexity of IC 20 while making the IC compatible with a wide range of end products. It also allows product manufacturers to use components without having to provide bulky components with balanced circuitry on the IC. Some components, such as inductors and / or transmission lines, can occupy a significant amount of IC die area.

[0060] Figure 4 shows in more detail one circuit for implementing the architecture of Figure 3. In Figure 4, like components are numbered like in Figure 3.

[0061] The digital sections 24 and 31 each include a digital signal processor (DSP) 50 and 51, which may be implemented by the same physical processor or by different processors.

[0062] The RF and / or analog transmitter 25 includes a pre-processing unit 52, an amplifier 53, and a filter 54. The pre-processing unit performs functions such as digital-to-analog conversion, modulation, frequency shifting, and signal conditioning of the signal from the digital module 24. The output from the pre-processing unit 52 is a radio frequency signal. The amplifier 53 is a power amplifier that amplifies the radio frequency signal. The filter 54 is a filter for filtering the output of the amplifier 53. The output of the filter is sent to a line 27 that is coupled to the antenna. Conveniently, the filter 54 is a band-pass filter configured to attenuate frequencies outside the desired transmit band of the system. Alternatively, it may be a low-pass or high-pass filter. Preferably, the filter 54 significantly attenuates frequencies within the desired receive band of the system, reducing their presence at the input to the receiver block 30. For example, it may attenuate the power in the receive band or each receive band by a factor of 10, 100, or more of the power in the transmit band or each transmit band. Multiple amplifiers 53 and / or multiple filters 54 may be present, and may be arranged in series or parallel. In some embodiments, as further described below, the system may have multiple transmission bands.

[0063] The RF and / or analog receiver section 30 includes a filter 55, an amplifier 56, and an analog processing unit 57. The filter 55 is a filter for filtering signals present at the connection 28 to the antenna 26. These signals may include signals generated by the transmitter section and signals received by the antenna 26. The purpose of the filter 55 is to reduce the impact of signals generated by the transmitter section on the receiver section. Conveniently, the filter 55 is a bandpass filter configured to attenuate frequencies outside the desired receive band of the system. Alternatively, it may be a lowpass or highpass filter. Preferably, the filter 55 significantly attenuates frequencies within the desired transmit band of the system, reducing their presence at the input to the amplifier 56. For example, it may attenuate the power in the transmit band or bands by a factor of 10, 100, or more of the power in the receive band or bands. The amplifier 56 amplifies the output of the filter 55. The signal processing unit 57 performs functions such as analog-to-digital conversion, demodulation, frequency shifting, and signal conditioning of the signal from the amplifier 56. The output of the signal processing unit 57 is sent to the DSP 51 for further processing and interpretation.

[0064] The filters 54 and 55 themselves may not completely remove elements of the transmit signal from the receive path, and to that end, cancellation circuitry, described further below, can actively cancel components of the transmit signal in the receive path.

[0065] The signal shaping module 32 includes two adjustable filters 58, 59. Filter 58 receives input from a tap 60 at the output of the transmit amplifier 53. Alternatively, the tap may be located elsewhere in the analog transmission path, such as at the input to that amplifier or within the signal processing unit 52. Advantageously, the tap is located before filter 54. This avoids attenuation of receive band components of the input by filter 54. Advantageously, the tap is located immediately before filter 54 and / or immediately after amplifier 53. Filter 58 may be a band-pass filter, a low-pass filter, or a high-pass filter. Advantageously, filter 58 is a band-pass filter. Advantageously, filter 58 is configured to have a behavior that mimics the behavior of filter 55. Advantageously, filter 58 is a band-pass filter configured to attenuate frequencies outside the desired receive band of the system. Preferably, filter 58 significantly attenuates frequencies within the desired transmit band of the system. For example, it may attenuate the power in the or each transmission band by a factor of 10, 100, or more of the power in the or each transmission band. Filter 59 receives the output of filter 58 as an input. Filter 59 may be a band-pass filter, a low-pass filter, or a high-pass filter. Conveniently, filter 59 is a band-pass filter. Conveniently, filter 59 is configured to have a behavior that mimics the behavior of filter 54. Conveniently, filter 59 is a band-pass filter configured to attenuate frequencies outside the desired transmission band of the system. Preferably, filter 59 significantly attenuates frequencies within the desired reception band of the system. For example, it may attenuate the power in the or each reception band by a factor of 10, 100, or more of the power in the or each transmission band.

[0066] The output of filter 59 is sent to transformer 61. The purpose of transformer 61 is to invert the output signal so that it can be phase-correctly coupled to the input chain for cancellation. Other mechanisms for inverting the filter output can be used, such as an inverting amplifier. The output of the transformer is sent to tap 69 of receiver 30. The tap is conveniently located between filter 55 and amplifier 56, but may be located elsewhere in the receive chain. Transformer 61 may also be included elsewhere in the signal shaping unit. For example, instead of being connected between the output of filter 59 and tap 69, transformer 61 could alternatively be connected between the output of filter 58 and the input of filter 59.

[0067] Signal path 62 extends from node 63 between filters 58 and 59 to pad 35, which is exposed externally from integrated circuit 20. A circuit 64 formed off-chip can be connected to pad 35 to act as a balancing impedance. The circuit may be formed, for example, with a combination of one or more resistors, inductors, and / or capacitors. One or more of these components may optionally be variable. The circuit may be configured to balance the impedance of antenna 26. Because the antenna is off-chip and its impedance may be unknown to the integrated circuit manufacturer, this approach allows the integrated circuit manufacturer to provide an appropriate balancing circuit without customizing the integrated circuit. A control circuit 65 may be provided to modify the behavior of filters 58 and 59. It receives inputs from the transmitting and receiving units and provides control outputs to filters 58 and 59. The control circuit may be implemented by a digital processor programmed with a strategy developed to achieve effective cancellation of the transmitted signal component at receiver 30. Various self-interference cancellation algorithms are known in the art and can be applied to this example.

[0068] Optionally, a balanced impedance circuit 33 can be formed on the integrated circuit. It may be formed of one or more resistors, inductors, and / or capacitors. The on-chip balanced impedance circuit can be switched on by a switch 34 on the integrated circuit or by a connection 66 from pad 35 to pad 36.

[0069] As mentioned above, an off-chip balancing circuit can be configured to balance the impedance of the antenna 26. Additionally, the off-chip balancing circuit may be coupled to pin 35 by a transmission line. The length of the transmission line can be selected to match the length of the transmission line 29 connecting the antenna to pin 28 of the integrated circuit. The transmission line 29 introduces a delay that depends on its length. If the balancing impedance is not coupled in a similar manner, a frequency-dependent phase shift can impair the cancellation effect of circuit 23. By providing manufacturers with the ability to implement matched transmission lines off-chip, this circuit allows manufacturers to achieve good matching with off-chip antennas (whose connection details are unknown to the integrated circuit manufacturer). In an alternative configuration, a transmission line of appropriate length can be coupled between pads 35 and 36, and the on-chip balancing impedance 33 can be coupled to a circuit with a delay matched to the antenna. This is useful, for example, when the antenna is of standard impedance, but the length of the transmission line 29 to the antenna is specific to a particular implementation. Other circuitry can be connected between pads 35 and 36. For example, a filter can be connected here to provide a phase shift and / or delay. A matching circuit can be connected here to transform the impedance of the on-chip balanced circuit at pad 36 into a different impedance for connection at pad 35. This can transform the impedance of the on-chip balanced impedance 35 so that there is a better correspondence between the antenna impedance and the balanced impedance, potentially improving the level of self-interference cancellation.

[0070] Other aspects of the antenna connection or packaging in a particular embodiment or end product may be mimicked by a balanced circuit, which may help to improve the level of self-interference cancellation in the receiver. These aspects may include the positioning of the antenna relative to other components of the product, the characteristics of the mechanical housing of the product, and the nature and / or size of one or more ground planes that may be associated with the antenna.

[0071] Optionally, the balancing circuit may be adjustable. This may enable the balancing circuit to compensate for dynamic changes in the local environment that may change the effective impedance and / or reflection coefficient of the antenna 26. This may be due, for example, to an impact from a user's hand or other object proximate to the antenna. Adjustment of the balancing circuit may be achieved using variable or adjustable components within the circuit. A string of capacitors and switches may be included to form one or more adjustable capacitances within the balancing network. Individual capacitors or groups of capacitors may be coupled to switches to selectively connect or disconnect them from the circuit, thereby changing the overall capacitance of each adjustable capacitance. One or more components within the balancing network, such as such adjustable capacitances, may be controlled by a controller 65. The controller 65 may be configured to adjust the balancing network to improve the level of self-interference cancellation. Optionally, one or more connections may be included external to the integrated circuit to allow the controller 65 to be connected to adjustable components external to the integrated circuit. This may enable adjustment of the impedance of the off-chip balancing impedance, which may improve the level of self-interference cancellation.

[0072] In the above example, a single antenna is connected to antenna port 28, which is electrically coupled to both the transmit and receive circuits. Alternatively, there may be multiple antennas connected to a single antenna port. Optionally, the antennas may provide spatial versatility and / or be adapted to transmit and / or receive different frequency bands. In another alternative configuration, the integrated circuit may have a first antenna port coupled to the transmit circuit and a second antenna port coupled to the receive circuit. These ports may not be directly electrically connected to each other. The first antenna may be connected to the first antenna port, and the second antenna may be connected to the second antenna port. A cancellation circuit can then cancel signals that may leak wirelessly from one antenna to the other. Thus, separate antennas may be present for transmit and receive. The output of filter 54 may be sent to the transmit antenna. The input of filter 55 may be supplied from the receive antenna. There may be no wired connection from the transmit antenna to the receive antenna. Nevertheless, the receive antenna may pick up signals radiated from the transmit antenna, so self-interference cancellation may still be required in this case. Circuit 32 and its associated components, including pad 35 and optionally pad 36, can also be used in this situation.

[0073] The circuit 64 may be formed on a circuit board 67 to which the IC 20 is mounted.

[0074] In the above example, the circuit for forming the cancellation signal includes two filters (11, 12) and a balanced impedance 14. The filters may be on a single integrated circuit. The balanced impedance may be at least partially separate from the integrated circuit. Other circuit designs may be used to form the cancellation circuit. For example, filters 11, 12 may be replaced with a single filter, or three or more filters, or any circuit designed to have an adjustable frequency response (e.g., a network of one or more resistors, capacitors, and / or inductors), where one or more of the components are variable or adjustable or can be selectively switched in or out of the circuit. When there are multiple filters, they may be arranged in series or in parallel. One or more filters may be replaced with an active circuit for generating the cancellation signal. Thus, in one embodiment, the circuit for generating the cancellation signal may not include a filter. For example, the circuit for generating the cancellation signal may include an amplifier configured to receive a signal from a transmitter and amplify the signal to form a cancellation signal that is output to the receiver. The amplifier may be selected so that its response provides a signal suitable for at least partially canceling components of the transmitted signal that may leak into the receiver. In each case, the response or behavior of the circuit for forming the cancellation signal, and therefore the cancellation signal it generates in response to a given signal sensed at the transmitter, can be adjusted by one or more external components. A large portion of the cancellation circuit can be formed on a circuit carrier, such as a circuit board or integrated circuit. That portion of the cancellation circuit may expose at least one connection from the circuit carrier to which an external component may be connected. That portion of the cancellation circuit may be configured so that its response can depend on components external to the circuit carrier supporting that portion of the circuit. Many types of cancellation circuits are known and can be implemented in this manner.

[0075] Thus, a system may provide a transmitting circuit and a receiving circuit, which may be arranged to allow the receiving circuit to receive interference from the transmitting circuit, which may be referred to as self-interference. For example, a cancellation circuit configured as described above may be present, receiving an input from the transmitting circuit and generating an output in response to the input. The cancellation circuit may be configured to generate an output capable of at least partially canceling the self-interference at the receiver. The output may be provided to a receiver to cancel a component in a signal at the receiver. The response of the cancellation circuit to generate such a signal may depend on an external component connected to the cancellation circuit. Advantageously, the response of the cancellation circuit may depend on the reactance characteristics of the external component. Alternatively, the response of the cancellation circuit may depend on another characteristic of the external component. For example, the cancellation circuit may have multiple operating modes, and may select which operating mode to operate in response to a characteristic of the external component. The characteristic may be, for example, a digital or analog signal provided by the external component.

[0076] A portion of the self-interference canceller may be formed on a single integrated circuit, and the response of that portion may be sensitive to off-chip components connected to the self-interference canceller.

[0077] FIG. 5 shows an alternative configuration. Only a portion of IC 20 is shown in FIG. 5. Balance circuit 33 is provided on integrated circuit 20. Pad 68 is exposed on the outside of the integrated circuit and is coupled to the ground of the balance circuit. An off-chip circuit ground can be connected to pad 68. This can improve the grounding of the balance circuit, for example, to better match the ground of antenna 26. This approach can be used with any of the on-chip balance circuit implementations described herein.

[0078] FIG. 6 shows another configuration. Only a portion of IC 20 is shown in FIG. 5. Multiple LC networks 75, 76, and 77 are provided on the integrated circuit. Each of the LC networks may not be connected to other LC networks on the integrated circuit. One or more of the LC networks (e.g., network 75) may be connected to node 63 on the chip. Another point on the network(s) may be connected to pad 71 exposed externally to the chip. The network(s) may not be connected to ground on the integrated circuit. One or more of the LC networks (e.g., network 76) may not be connected to both node 63 and any ground on the integrated circuit. Two points on the network(s) may be connected to respective pads 72 and 73 exposed externally to the chip. One or more of the LC networks (e.g., network 77) may not be connected to node 63 on the integrated circuit but may be connected to ground on the integrated circuit. A point on the network(s) may be connected to pad 74 exposed externally to the chip. These networks can be interconnected by applying connections external to the chip between selected pads 35, 71, 72, 73, and 74 to form a balanced network with a desired response through off-chip connections. These connections can be made using transmission lines and / or traces on the circuit board or circuit carrier on which the integrated circuit is mounted. Alternatively or additionally, these connections can be made through other components, such as capacitors and / or inductors, connected between two or more of pads 35, 71, 72, 73, and / or 74. This allows manufacturers to provide balanced networks suited to their particular implementations. Manufacturers can form balanced networks by arbitrarily connecting components internal and / or external to the integrated circuit to form networks. One or more of the connections between these pads may be made by transmission lines of lengths selected to match transmission line 29. One or more of the components in networks 75, 76, and 77 may be variable or adjustable.One or more external components in the balancing network may be adjustable. Networks 75, 76, and / or 77 may optionally be adjusted by controller 65.

[0079] In the above embodiments, the transmit circuit, receive circuit, and cancellation circuit may be implemented on a single common integrated circuit. Other configurations are possible. For example, the cancellation circuit may be implemented on an integrated circuit that does not include the transmit circuit and the receive circuit. The integrated circuit may optionally include a duplexer having an input for receiving a transmit signal input from the transmit circuit, an output for providing a receive signal output to the receive circuit, and a port for connecting to an antenna. The input, output, and port may be connections (e.g., contact pads) external to the integrated circuit for connecting to external components. The integrated circuit may have additional connections (e.g., contact pads) external to the integrated circuit for connecting to external components on which the response of the cancellation circuit depends. In one example, the integrated circuit may include the self-interference cancellation circuit 32 and a duplexer that couples the transmit circuit and receive circuit to an antenna, while other portions of the transmitter and receiver may be omitted from the integrated circuit or may be implemented elsewhere. For example, the integrated circuit may not include a transmit amplifier and / or a receive amplifier and / or a transmit filter and / or a receive filter. Any one or more of these components may be implemented on a second integrated circuit.

[0080] The self-interference cancellation path runs from the transmitter 21 through the circuit block 32 to the receiver 22. As mentioned above, functional external circuitry can be connected to node 35 to modify the response of the self-interference cancellation circuitry. Active circuitry can be provided to modify the response of the external circuitry. The active circuitry can modify its response in response to, for example, one or more of the following factors: an input representing an antenna configuration and / or connection to the antenna selected from a predetermined set of configurations; a measured indication of the physical characteristics of the antenna and / or connection to the antenna (e.g., its impedance or frequency response); or the degree of self-interference cancellation achieved in the receiver by the self-interference cancellation circuitry. The active circuitry can be on the integrated circuit on which the self-interference cancellation circuitry is defined, or it can be separate from the integrated circuit. For example, it can include a processor configured to execute code stored in non-transitory form and having an output that can modify the behavior of the functional external circuitry, for example, by connecting or disconnecting components from the circuitry. Controller 65 can provide some or all of this functionality.

[0081] As shown in 33, part or all of the balanced circuit may be implemented on a common integrated circuit with the self-interference cancellation circuit. That portion of the balanced circuit may include multiple reactive elements that can be connected or disconnected from the circuit by switches located on the integrated circuit or on one or more other circuit carriers, such as the integrated circuit or a circuit board. In this way, the behavior of the balanced circuit can be modified. One aspect of an antenna implementation that may be desirable to compensate for using such a circuit is the length of any connection from the antenna port (e.g., 28) to the antenna. One way to compensate for this is by a portion of the balanced circuit including multiple transmission line segments that can be connected or disconnected from the circuit to form a transmission line of a selected length. One or more of the transmission lines may be formed from a material through which signals travel slower than on conductor wires or slower than on other ones of the transmission lines. For example, one or more of the transmission lines may be formed on a ceramic substrate, which can transmit signals as surface waves. This approach may allow transmission lines for compensating longer lengths of antenna connection to be easily packaged on a small circuit carrier. In this configuration, external connection 35 may optionally be omitted.

[0082] In another embodiment, external components may be connected in series in the cancellation path. In such an embodiment, the self-interference cancellation circuit may not be formed to provide a continuous cancellation path within the integrated circuit. In this sense, the self-interference cancellation circuit may be incomplete within the integrated circuit or may only be partially located within the integrated circuit. For example, there may be no connection between the output of filter 58 and the input of filter 59 on the integrated circuit. The output of filter 58 and the input of filter 59 may instead be connected to separate external connections. This may allow a series network including one or more external components and / or transmission lines to be connected between the output of filter 58 and the input of filter 59. The series network may include one or more of an inductor, a capacitor, a resistor, an active component (e.g., an amplifier), a filter, a transmission line, a hybrid circuit, and / or a transformer. The series network may include series and / or parallel components. The series network may include one or more connections to electrical ground. The series networks may be connected to complete the self-interference canceller circuit. This may allow, for example, to select the topology of the cancellation network or to change the behavior or response of the cancellation network after the integrated circuit is fabricated. This can be beneficial in allowing manufacturers to tailor the cancellation circuitry to a particular application. For example, if separate transmit and receive antennas are used, the series network can be designed using knowledge of the antenna structure that may not be available at the time the integrated circuit is designed. This may allow the cancellation circuitry to be adapted to improve cancellation of self-interference that may be coupled between the transmit and receive antennas. One or more components within the integrated circuit may optionally be included in the series network using optional connections external to the integrated circuit or using switches within the integrated circuit.The construction and / or connection and / or configuration of the series network can be performed in a similar manner as described above with respect to the external circuit connected via external connection 35, but rather than connecting balanced networks in parallel to adjust the response of the self-interference cancellation circuit, the external components of the series network are connected in series to complete the self-interference cancellation circuit.

[0083] Figure 7 shows a portion of the circuit of Figure 4 adapted to the above configuration. The output of filter 58 is coupled to pad 80, which is external to the integrated circuit. The input of filter 59 is coupled to pad 81, which is also external to the integrated circuit. If there is nothing connected between pads 80 and 81, filters 58 and 59 are not interconnected. A filter 82 can be connected between pads 80 and 81 to complete the circuit. Filter 82 can take any form. Pads 80 and 81 can be connected directly to each other without an external filter. In that case, the entire filtering circuit can be constructed on the integrated circuit.

[0084] The pads 35 etc. may be in any suitable form, for example they may be conductive lands for receiving solder, conductive pins or solder balls.

[0085] Some wireless transceivers implement carrier aggregation, in which multiple transmit signals with different carrier frequencies are sent to a common antenna and multiple receive signals with different carrier frequencies are received by the common antenna. The above circuitry may be used in a carrier aggregation transceiver. Filters 58 and 59 may be composite filters to match the effects of multiple corresponding filters in the transmit and receive sections.

[0086] The or each balanced circuit or LC network may be formed of any suitable arrangement of reactive and / or resistive components (e.g., inductors, capacitors, and resistors). The components may be selected and connected together to provide a suitable response for the circuit. The circuit may be a filter circuit. The circuit may have a frequency-dependent response. The circuit may provide reactance.

[0087] Transceivers of the type described herein may be suitable for transmitting and receiving signals of protocols such as 5G, 4G, 3G, WiFi / IEEE802.11, or Bluetooth.

[0088] The applicant discloses each individual feature described herein and any combination of two or more such features separately, to the extent that such feature or combination is operable in light of the common general knowledge of a person skilled in the art based on the specification as a whole, regardless of whether such feature or combination solves any problems disclosed herein, and without limitation to the scope of the claims. The applicant indicates that aspects of the invention may consist of any such individual feature or combination of features. In view of the foregoing description, it will be apparent to one skilled in the art that various modifications can be made within the scope of the invention.

[0089] The phrases "configured to" or "arranged to" followed by a term defining a condition or function are used herein to indicate that the subject of the phrase is in a state of having that condition or capable of performing that function without modification or further configuration.

Claims

1. A transceiver circuit implemented on one or more integrated circuits, comprising: a signal transmitter for forming a radio signal for transmission; a signal receiver that performs reception processing on the received wireless signal; a cancellation circuit for at least partially canceling a component of the signal for transmission at the signal receiver, the cancellation circuit configured to receive an input from the signal transmitter and to provide a cancellation output to the signal receiver, the cancellation circuit configured to form the cancellation output in response to both the input from the signal transmitter and a response received from the integrated circuit(s) or a first external connection pad of one of the integrated circuits.

2. 2. The transceiver circuit of claim 1, wherein the response is a reactive response to a signal formed by the cancellation circuit in response to the input from the signal transmitter.

3. 3. The transceiver circuit of claim 1, wherein the cancellation circuit includes a first tunable filter coupled between the signal transmitter and the external connection pad, and a second tunable filter coupled between the external connection pad and the signal receiver.

4. 3. The transceiver circuit of claim 1, wherein the cancellation circuit includes a first tunable filter coupled between the signal transmitter and the external connection pad, and a second tunable filter coupled between a further external connection pad and the signal receiver, whereby the first tunable filter and the second tunable filter may be interconnected by an external filter coupled between the external connection pad and the further connection pad.

5. 10. A transceiver circuit as claimed in any one of the preceding claims, wherein the signal transmitter is coupled to a second external connection pad of the integrated circuit(s) to provide the signal for transmission to an antenna external to the or each integrated circuit.

6. 6. The transceiver circuit of claim 5, wherein the signal receiver is coupled to the second external connection pad of the integrated circuit(s) for receiving the received radio signal from the antenna external to the or each integrated circuit.

7. 6. A transceiver circuit as claimed in any one of claims 1 to 5, wherein the signal receiver is coupled to a third external connection pad of the integrated circuit(s) for receiving the received radio signal from an antenna external to the or each integrated circuit.

8. 10. A transceiver circuit as claimed in any one of the preceding claims, wherein the transceiver circuit includes an antenna balancing circuit coupled to a fourth external connection pad of the integrated circuit(s), whereby the balancing circuit can be coupled to the first external connection pad by a transmission line external to the or each integrated circuit.

9. 9. The transceiver circuit of claim 8, wherein the antenna balancing circuit has a ground node for grounding the antenna balancing circuit, the ground node being coupled to a fifth external connection pad of the integrated circuit(s).

10. 10. The transceiver circuit of claim 8, wherein the transceiver circuit includes a switch for selectively coupling the fourth external connection pad to the first external connection pad.

11. A transceiver circuit as claimed in any one of claims 8 to 10, wherein the or each balanced circuit comprises a network including one or more capacitors and one or more inductors.

12. 10. A transceiver circuit as claimed in any one of the preceding claims, wherein a single integrated circuit carries at least part of the cancellation circuit and a duplexer for coupling the transmitter and receiver to an antenna, the transmitter and receiver being implemented remotely from the integrated circuit.

13. 1. A transceiver device, comprising: A transceiver circuit according to any one of claims 1 to 12; one or more antennas external to the integrated circuit(s), each coupled to one or both of the signal transmitter and the signal receiver; a matching circuit external to the integrated circuit(s) and coupled to the first external connection pad for at least partially matching the response of the antenna.

14. 14. The transceiver device of claim 13, wherein the matching circuit comprises a first transmission line.

15. 15. The transceiver apparatus of claim 14, wherein the or at least one of the antenna(s) is / are coupled to the integrated circuit(s) by a second transmission line, and wherein a length of the first transmission line matches a length of the second transmission line.

16. 16. The transceiver device of claim 14 or 15, wherein the transceiver circuit is as claimed in claim 8, and the transmission line couples the first external connection pad to the fourth external connection pad.

17. 17. The transceiver device according to claim 13, wherein the matching circuit comprises a balanced circuit including a network including one or more capacitors and one or more inductors.

18. A transceiver circuit implemented on one or more integrated circuits, comprising: a signal transmitter for forming a radio signal for transmission; a signal receiver that performs reception processing on the received wireless signal; a cancellation circuit for at least partially canceling a component of the signal for transmission at the signal receiver, the cancellation circuit configured to receive an input from the signal transmitter and including: a first circuit path extending to the integrated circuit(s) or a first external connection pad of one of the integrated circuits; and a second circuit path extending between the integrated circuit(s) or a second external connection pad of the one of the integrated circuits and a cancellation path for providing cancellation feedback to the signal receiver, the first path and the second path being connectable to each other by a component external to the integrated circuit.

19. 20. The transceiver circuit of claim 18, wherein at least one of the first path and the second path includes a tunable filter.

20. 20. A transceiver circuit as claimed in claim 18 or 19, wherein the signal transmitter is coupled to a third external connection pad of the integrated circuit(s) to provide the signal for transmission to an antenna external to the or each integrated circuit.

21. 21. The transceiver circuit of claim 20, wherein the signal receiver is coupled to the third external connection pad of the integrated circuit(s) for receiving the received radio signal from the antenna external to the or each integrated circuit.

22. 22. A transceiver circuit as claimed in any one of claims 18 to 21, wherein the signal receiver is coupled to a fourth external connection pad of the integrated circuit(s) for receiving the received radio signal from an antenna external to the or each integrated circuit.

23. 23. A transceiver circuit as claimed in any one of claims 18 to 22, wherein the transceiver circuit includes an antenna balancing circuit coupled to a fifth external connection pad of the integrated circuit(s), whereby the balancing circuit can be coupled to the first external connection pad and / or the second external connection pad by a transmission line external to the or each integrated circuit.

24. 24. The transceiver circuit of claim 23, wherein the antenna balancing circuit has a ground node for grounding the antenna balancing circuit, the ground node being coupled to a sixth external connection pad of the integrated circuit(s).

25. 25. The transceiver circuit of claim 23 or 24, wherein the transceiver circuit includes a switch for selectively coupling the fifth external connection pad to the first external connection pad.

26. A transceiver circuit as claimed in any one of claims 23 to 25, wherein the or each balanced circuit comprises a network including one or more capacitors and one or more inductors.

27. 27. A transceiver circuit as claimed in any one of claims 18 to 26, wherein a single integrated circuit carries at least part of the cancellation circuit and a duplexer for coupling the transmitter and receiver to an antenna, the transmitter and receiver being implemented remotely from the integrated circuit.

28. 1. A transceiver device, comprising: A transceiver circuit according to any one of claims 18 to 27; one or more antennas external to the integrated circuit(s), each coupled to one or both of the signal transmitter and the signal receiver; a matching circuit external to the integrated circuit(s) and coupled to one or both of the first external connection pad and the second external connection pad to at least partially match the response of the antenna.

29. 30. The transceiver apparatus of claim 28, wherein the matching circuit comprises a first transmission line.

30. 30. The transceiver apparatus of claim 29, wherein the or at least one of the antenna(s) is / are coupled to the integrated circuit(s) by a second transmission line, and wherein a length of the first transmission line matches a length of the second transmission line.

31. The transceiver device according to any one of claims 28 to 30, wherein the matching circuit comprises a balanced circuit including a network including one or more capacitors and one or more inductors.

32. 32. The transceiver device of claim 28, wherein the matching circuit is configured to mimic the response of the antenna as affected by any one or more of the length of one or more signal lines coupling the antenna(s) to the transceiver circuitry, the positioning of the antenna relative to other components of the transceiver device, the mechanical housing of the transceiver device, and one or more ground planes of the transceiver device associated with the antenna.

33. 1. A transceiver circuit comprising: a signal transmitter for forming a radio signal for transmission; a signal receiver that performs reception processing on the received wireless signal; a balancing circuit; a cancellation circuit for at least partially canceling a component of the signal for transmission in the signal receiver, the cancellation circuit configured to receive an input from the signal transmitter and to provide a cancellation output to the signal receiver, the cancellation circuit configured to form the cancellation output in response to both the input from the signal transmitter and a response of the balancing circuit to an intermediate signal formed by the cancellation circuit in response to the input from the signal transmitter; A transceiver circuit, wherein the balancing circuit includes one or more elements configured to be switchably enabled or disabled to modify the response of the balancing circuit.

34. 34. The transceiver circuit of claim 33, wherein the balancing circuit and the cancellation circuit are formed on a single integrated circuit.

35. 35. The transceiver circuit of claim 34, wherein the cancellation circuit is formed on an integrated circuit having a first substrate and at least one of the elements is formed on a second substrate.

36. 36. The transceiver circuit of claim 35, wherein the first substrate and the second substrate are made of different materials.

37. A transceiver circuit according to any one of claims 33 to 36, wherein at least one of said elements is a transmission line.

38. 38. The transceiver circuit of claim 37, wherein the transmission line is coupled to transmit a surface wave derived from the intermediate signal.

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