Adaptive Bilateral Matching for Decoder-Side Affine Motion Vector Refinement

Abstract

A video coder is configured to receive a first block of video data to be coded using adaptive affine decoder-side motion vector refinement (DMVR). The video coder may determine to set a first motion vector differential (MVD) for a first reference picture list to 0 and then refine a CPMV associated with a second reference picture list to generate a refined control point motion vector (CPMV). The video coder may then code the first block of video data using the refined CPMV.

Description

[Technical Field]

[0001] This application claims priority to U.S. Patent Application No. 18 / 507,544, filed November 13, 2023, and U.S. Provisional Patent Application No. 63 / 384,979, filed November 25, 2022, the entire contents of which are incorporated herein by reference. U.S. Patent Application No. 18 / 507,544, filed November 13, 2023, claims the benefit of U.S. Provisional Patent Application No. 63 / 384,979, filed November 25, 2022.

[0002] TECHNICAL FIELD This disclosure relates to video encoding and decoding. [Background technology]

[0003] Digital video capabilities may be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video gaming devices, video game consoles, cellular or satellite wireless telephones, so-called "smartphones," video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques such as those described in standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), ITU-T H.266 / Versatile Video Coding (VVC), and extensions to such standards, as well as proprietary video codecs / formats such as AOMedia Video 1 (AV1) developed by the Alliance for Open Media. By implementing such video coding techniques, video devices may transmit, receive, encode, decode, and / or store digital video information more efficiently.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. In block-based video coding, video slices (e.g., video pictures or portions of video pictures) may be partitioned into video blocks, which are also sometimes referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in intra-coded (I) slices of a picture are encoded using spatial prediction with respect to reference samples in neighboring blocks in the same picture. Video blocks in inter-coded (P or B) slices of a picture may use spatial prediction with respect to reference samples in neighboring blocks in the same picture or temporal prediction with respect to reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the Invention

[0005] In general, this disclosure describes techniques for encoding and decoding video data, including techniques for inter-prediction. More specifically, this disclosure describes techniques for adaptive affine decoder-side affine motion vector refinement (DMVR) using bilateral matching. In some examples of affine DMVR, both predictors are refined simultaneously. However, in certain cases, one of the predictors may already have a level of accuracy that is acceptable for coding efficiency, and coding efficiency may be improved by refining the other predictor.

[0006] This disclosure describes a technique for adaptive affine DMVR that allows for further refinement flexibility using additional signaling. Compared to other affine DMVR techniques, the adaptive affine DMVR of this disclosure may include setting the motion vector differential of one of the reference picture lists to 0 (0,0). In this way, instead of simultaneously refining motion vectors from both reference lists, only one motion vector of the predictor from a given reference list is refined. Therefore, coding efficiency may be improved.

[0007] In one example, the present disclosure provides a method for decoding video data, including receiving a first block of video data to be decoded using adaptive affine DMVR, determining to set a first motion vector difference (MVD) for a first reference picture list to 0, refining control point motion vectors (CPMVs) associated with a second reference picture list to generate refined control point motion vectors (CPMVs), and decoding the first block of video data using the refined CPMVs.

[0008] In another example, this disclosure describes an apparatus configured to decode video data, the apparatus comprising: a memory; and one or more processors in communication with the memory, wherein the one or more processors are configured to: receive a first block of video data to be decoded using adaptive affine DMVR; determine to set a first MVD for a first reference picture list to 0; refine a CPMV associated with a second reference picture list to generate a refined CPMV; and decode the first block of video data using the refined CPMV.

[0009] In another example, this disclosure describes an apparatus configured to decode video data, the apparatus comprising: means for receiving a first block of video data to be decoded using adaptive affine DMVR; means for determining to set an MVD for a first reference picture list to 0; means for refining a CPMV associated with a second reference picture list to generate a refined CPMV; and means for decoding the first block of video data using the refined CPMV.

[0010] In another example, this disclosure describes a non-transitory computer-readable storage medium that stores instructions that, when executed, cause one or more processors to receive a first block of video data to be decoded using an adaptive affine DMVR, determine to set a first MVD for a first reference picture list to 0, refine a CPMV associated with a second reference picture list to generate a refined CPMV, and decode the first block of video data using the refined CPMV.

[0011] In another example, this disclosure describes a method for encoding video data, the method including receiving a first block of video data to be encoded using adaptive affine DMVR, determining to set a first MVD for a first reference picture list to 0, refining a CPMV associated with a second reference picture list to generate a refined CPMV, and encoding the first block of video data using the refined CPMV.

[0012] In another example, this disclosure describes an apparatus configured to encode video data, the apparatus comprising: a memory; and one or more processors in communication with the memory, wherein the one or more processors are configured to: receive a first block of video data to be encoded using adaptive affine DMVR; determine to set a first MVD for a first reference picture list to 0; refine a CPMV associated with a second reference picture list to generate a refined CPMV; and encode the first block of video data using the refined CPMV.

[0013] In another example, this disclosure describes an apparatus configured to encode video data, the apparatus comprising: means for receiving a first block of video data to be encoded using adaptive affine DMVR; means for determining to set an MVD for a first reference picture list to 0; means for refining a CPMV associated with a second reference picture list to generate a refined CPMV; and means for encoding the first block of video data using the refined CPMV.

[0014] In another example, this disclosure describes a non-transitory computer-readable storage medium that stores instructions that, when executed, cause one or more processors to receive a first block of video data to be encoded using adaptive affine DMVR, determine to set a first MVD for a first reference picture list to 0, refine a CPMV associated with a second reference picture list to generate a refined CPMV, and encode the first block of video data using the refined CPMV.

[0015] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description, drawings, and claims. [Brief explanation of the drawings]

[0016] [Figure 1] FIG. 1 is a block diagram illustrating an example video encoding and decoding system in which techniques of this disclosure may be implemented. [Figure 2] FIG. 10 is a conceptual diagram illustrating an example of bilateral matching. [Figure 3] FIG. 10 is a conceptual diagram illustrating an example of an independent bilateral matching search for control point motion vectors. [Figure 4] FIG. 1 is a conceptual diagram illustrating an example template and its reference samples in a reference picture. [Figure 5] FIG. 1 is a conceptual diagram illustrating an example template and its reference samples for a block with sub-block motion. [Figure 6] FIG. 2 is a block diagram illustrating an example video encoder that may implement the techniques of this disclosure. [Figure 7] FIG. 2 is a block diagram illustrating an example video decoder that may implement the techniques of this disclosure. [Figure 8] 10 is a flowchart illustrating an example method for encoding a current block, in accordance with techniques of this disclosure. [Figure 9] 10 is a flowchart illustrating an example method for decoding a current block, in accordance with techniques of this disclosure. [Figure 10] 10 is a flowchart illustrating another example method for encoding a current block, in accordance with techniques of this disclosure. [Figure 11] 10 is a flowchart illustrating another example method for decoding a current block, in accordance with techniques of this disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0017] In general, this disclosure describes techniques for encoding and decoding video data, including techniques for inter-prediction. More specifically, this disclosure describes techniques for adaptive affine decoder-side affine motion vector refinement (DMVR) using bilateral matching. In some examples of affine DMVR, both predictors are refined simultaneously. However, in certain cases, one of the predictors may already have a level of accuracy that is acceptable for coding efficiency, and coding efficiency may be improved by refining the other predictor.

[0018] This disclosure describes a technique for adaptive affine DMVR that allows further refinement flexibility using additional signaling. Compared to other affine DMVR techniques, the adaptive affine DMVR of this disclosure may include setting the motion vector differential of one of the reference picture lists to (0,0). In this way, instead of simultaneously refining motion vectors from both reference lists, only one motion vector of the predictor from a given reference list is refined. Therefore, coding efficiency may be improved.

[0019] 1 is a block diagram illustrating an example video encoding and decoding system 100 that may implement techniques of this disclosure. The techniques of this disclosure are generally directed to coding (encoding and / or decoding) video data. Generally, video data includes any data for processing video. Thus, video data may include raw uncoded video, coded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0020] 1 , in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 may be or include any of a wide range of devices, such as a desktop computer, a notebook (i.e., laptop) computer, a mobile device, a tablet computer, a set-top box, a telephone handset such as a smartphone, a television, a camera, a display device, a digital media player, a video gaming console, a video streaming device, a broadcast receiver device, etc. In some cases, source device 102 and destination device 116 may be capable of wireless communication and thus may be referred to as wireless communication devices.

[0021] In the example of FIG. 1 , source device 102 includes video source 104, memory 106, video encoder 200, and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120, and display device 118. According to this disclosure, video encoder 200 of source device 102 and video decoder 300 of destination device 116 may be configured to apply affine DMVR techniques. Thus, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, the source device and destination device may include other components or configurations. For example, source device 102 may receive video data from an external video source, such as an external camera. Similarly, destination device 116 may interface with an external display device rather than including an integrated display device.

[0022] System 100 as shown in FIG. 1 is merely an example. In general, any digital video encoding and / or decoding device may implement the affine DMVR technique. Source device 102 and destination device 116 are merely examples of coding devices, such that source device 102 generates coded video data that destination device 116 transmits. This disclosure refers to devices that perform data coding (encoding and / or decoding) as “coding” devices. Accordingly, video encoder 200 and video decoder 300 represent examples of coding devices, specifically, video encoders and video decoders, respectively. In some examples, source device 102 and destination device 116 may operate in a substantially symmetrical manner, such that source device 102 and destination device 116 each include video encoding and decoding components. Thus, system 100 may support unidirectional or bidirectional video transmission between source device 102 and destination device 116, e.g., for video streaming, video playback, video broadcasting, or video telephony.

[0023] Generally, video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a continuous series of pictures (also called “frames”) of the video data to video encoder 200, which encodes the picture data. Video source 104 of source device 102 may include a video capture device such as a video camera, a video archive containing previously captured raw video, and / or a video feed interface that receives video from a video content provider. As a further alternative, video source 104 may generate computer-graphics-based data as source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes the captured, pre-captured, or computer-generated video data. Video encoder 200 may reorder the pictures from the order in which they were received (sometimes referred to as “display order”) into a coding order for coding. Video encoder 200 may generate a bitstream containing the encoded video data. Source device 102 may then output the encoded video data via output interface 108 to computer-readable medium 110, for receipt and / or retrieval by input interface 122 of destination device 116, for example.

[0024] Memory 106 of source device 102 and memory 120 of destination device 116 represent general-purpose memory. In some examples, memory 106, 120 may store raw video data, e.g., raw video from video source 104 and raw decoded video data from video decoder 300. Additionally or alternatively, memory 106, 120 may store software instructions executable by, e.g., video encoder 200 and video decoder 300, respectively. While memory 106 and memory 120 are shown separate from video encoder 200 and video decoder 300 in this example, it should be understood that video encoder 200 and video decoder 300 may also include internal memory for functionally similar or equivalent purposes. Furthermore, memory 106, 120 may store, e.g., encoded video data output from video encoder 200 and input to video decoder 300. In some examples, portions of memory 106, 120 may be allocated as one or more video buffers, for example, to store raw decoded video data and / or encoded video data.

[0025] The computer-readable medium 110 may represent any type of medium or device capable of transferring encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to transmit encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. The output interface 108 may modulate a transmission signal containing the encoded video data, and the input interface 122 may demodulate a received transmission signal in accordance with a communication standard such as a wireless communication protocol. The communication medium may comprise any wireless or wired communication medium, such as the radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include routers, switches, base stations, or any other equipment that may be useful for facilitating communication from the source device 102 to the destination device 116.

[0026] In some examples, source device 102 may output encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray Disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium that stores encoded video data.

[0027] In some examples, source device 102 may output encoded video data to file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or download.

[0028] File server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to destination device 116. File server 114 may represent a web server (e.g., for a website), a server configured to provide file transfer protocol services (such as File Transfer Protocol (FTP) or File Delivery over Unidirectional Transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a Multimedia Broadcast Multicast Service (MBMS) or Enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. The file server 114 may additionally or alternatively implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, etc.

[0029] Destination device 116 may access the encoded video data from file server 114 through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both suitable for accessing encoded video data stored on file server 114. Input interface 122 may be configured to operate according to any one or more of the various protocols mentioned above to retrieve or receive media data from file server 114, or other such protocols to retrieve media data.

[0030] Output interface 108 and input interface 122 may represent a wireless transmitter / receiver, a modem, a wired network component (e.g., an Ethernet card), a wireless communication component operating according to any of the various IEEE 802.11 standards, or other physical components. In examples in which output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transfer data, such as encoded video data, according to a cellular communication standard, such as 4G, 4G-LTE (Long Term Evolution), LTE-Advanced, 5G, etc. In some examples in which output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transfer data, such as encoded video data, according to other wireless standards, such as the IEEE 802.11 standard, the IEEE 802.15 standard (e.g., ZigBee™), the Bluetooth™ standard, etc. In some examples, source device 102 and / or destination device 116 may include respective system-on-chip (SoC) devices. For example, source device 102 may include an SoC device that performs the functionality attributed to video encoder 200 and / or output interface 108, and destination device 116 may include an SoC device that performs the functionality attributed to video decoder 300 and / or input interface 122.

[0031] The techniques of this disclosure may be applied to video coding supporting any of a variety of multimedia applications, such as over-the-air television broadcast, cable television transmission, satellite television transmission, Internet streaming video transmission such as Dynamic Adaptive Streaming over HTTP (DASH), digital video encoded on a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0032] The input interface 122 of the destination device 116 receives an encoded video bitstream from a computer-readable medium 110 (e.g., a communications medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 that is also used by the video decoder 300, such as syntax elements having values ​​that describe characteristics and / or processing of video blocks or other coded units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0033] Although not shown in FIG. 1, in some examples, the video encoder 200 and the video decoder 300 may each be integrated with an audio encoder and / or audio decoder and may include appropriate MUX-DEMUX units or other hardware and / or software to handle multiplexed streams containing both audio and video in a common data stream.

[0034] The video encoder 200 and the video decoder 300 may each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the techniques are implemented partially in software, a device may store instructions for the software in a suitable non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to implement the techniques of this disclosure. Each of the video encoder 200 and the video decoder 300 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder / decoder (CODEC) in the respective device. Devices including the video encoder 200 and / or the video decoder 300 may implement the video encoder 200 and / or the video decoder 300 in processing circuitry, such as an integrated circuit and / or a microprocessor. Such a device may be a wireless communication device, such as a cellular telephone, or any other type of device described herein.

[0035] The video encoder 200 and the video decoder 300 may operate according to a video coding standard such as ITU-T H.265, also known as High Efficiency Video Coding (HEVC), or an extension thereof, such as multiview and / or scalable video coding extensions. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards, such as ITU-T H.266, also known as Generic Video Coding (VVC). In other examples, the video encoder 200 and the video decoder 300 may operate according to proprietary video codecs / formats such as AOMedia Video 1 (AV1), extensions of AV1, and / or successor versions of AV1 (e.g., AV2). In other examples, the video encoder 200 and the video decoder 300 may operate according to other proprietary formats or industry standards. However, the techniques of this disclosure are not limited to any particular coding standard or format. In general, video encoder 200 and video decoder 300 may be configured to implement the techniques of this disclosure in conjunction with any video coding technique that uses affine DMVR.

[0036] Generally, the video encoder 200 and the video decoder 300 may perform block-based coding of pictures. The term “block” generally refers to a structure containing data to be processed (e.g., encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of luminance and / or chrominance data samples. Generally, the video encoder 200 and the video decoder 300 may code video data represented in YUV (e.g., Y, Cb, Cr) format. That is, rather than coding red, green, and blue (RGB) data for picture samples, the video encoder 200 and the video decoder 300 may code luminance and chrominance components, which may include both red and blue chrominance components. In some examples, the video encoder 200 converts received RGB-format data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to RGB format. Alternatively, pre-processing and post-processing units (not shown) may perform these transformations.

[0037] This disclosure may generally refer to coding (e.g., encoding and decoding) a picture as including the process of encoding or decoding data for a picture. Similarly, this disclosure may refer to coding a block of a picture as including the process of encoding or decoding data for the block, e.g., predictive and / or residual coding. A coded video bitstream generally includes a series of values ​​of syntax elements that represent coding decisions (e.g., coding modes) and the partitioning of a picture into blocks. Thus, references to coding a picture or a block should generally be understood as coding values ​​of the syntax elements that form the picture or block.

[0038] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video coder (such as video encoder 200) partitions coding tree units (CTUs) into CUs according to a quadtree structure. That is, the video coder partitions CTUs and CUs into four equal, non-overlapping squares, and each node of the quadtree has either zero or four child nodes. A node with no child nodes may be called a "leaf node," and a CU of such a leaf node may include one or more PUs and / or one or more TUs. The video coder may further partition PUs and TUs. For example, in HEVC, a residual quadtree (RQT) represents the partitioning of TUs. In HEVC, a PU represents inter-predicted data, and a TU represents residual data. An intra-predicted CU includes intra-prediction information, such as an intra-mode indication.

[0039] As another example, video encoder 200 and video decoder 300 may be configured to operate according to VVC. According to VVC, a video coder (such as video encoder 200) partitions a picture into multiple CTUs. Video encoder 200 may partition the CTUs according to a tree structure, such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure. The QTBT structure eliminates the concept of multiple partition types, such as the separation between CUs, PUs, and TUs in HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to a CTU. The leaf nodes of the binary tree correspond to CUs.

[0040] In the MTT partitioning structure, blocks may be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of triple tree (TT) (also called ternary tree (TT)) partitioning. A triple tree partitioning or triple tree partitioning is a partitioning in which a block is divided into three sub-blocks. In some examples, a triple tree partitioning or triple tree partitioning divides a block into three sub-blocks without splitting the original block through the center. The partition types in MTT (e.g., QT, BT, and TT) may be symmetric or asymmetric.

[0041] When operating according to the AV1 codec, the video encoder 200 and the video decoder 300 may be configured to code video data in blocks. In AV1, the largest coding block that can be processed is called a superblock. In AV1, a superblock can be either 128x128 luma samples or 64x64 luma samples. However, in successor video coding formats (e.g., AV2), a superblock can be defined by a different (e.g., larger) luma sample size. In some examples, a superblock is the top level of a block quadtree. The video encoder 200 may further partition the superblock into smaller coding blocks. The video encoder 200 may partition the superblock and other coding blocks into smaller blocks using square or non-square partitioning. Non-square blocks may include N / 2xN, NxN / 2, N / 4xN, and NxN / 4 blocks. The video encoder 200 and the video decoder 300 may perform separate prediction and transform processes for each of the coding blocks.

[0042] AV1 also defines tiles of video data. A tile is a rectangular array of superblocks that may be coded independently of other tiles. That is, video encoder 200 and video decoder 300 may encode and decode coding blocks within a tile, respectively, without using video data from other tiles. However, video encoder 200 and video decoder 300 may perform filtering across tile boundaries. Tiles may be uniform or non-uniform in size. Tile-based coding may enable parallel processing and / or multithreading for encoder and decoder implementations.

[0043] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luminance and chrominance components, and in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luminance component and another QTBT / MTT structure for both chrominance components (or two QTBT / MTT structures for the individual chrominance components).

[0044] Video encoder 200 and video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, superblock partitioning, or other partitioning structures.

[0045] In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples for a picture having three sample arrays, or a CTB of samples for a picture coded using three separate color planes and syntax structures used to code a monochrome picture or samples. A CTB may be an N×N block of samples for some value of N, partitioned to divide the components into CTBs. A component is a single sample from one of the three arrays (luma and two chroma) that make up a picture in 4:2:0, 4:2:2, or 4:4:4 color format, or a single sample from an array or arrays that make up a picture in monochrome format. In some examples, a coding block is an M×N block of samples for some values ​​of M and N, partitioned to divide the CTB into coding blocks.

[0046] Blocks (e.g., CTUs or CUs) may be grouped in various ways within a picture. As an example, a brick may refer to a rectangular region of a CTU row within a particular tile within a picture. A tile may be a rectangular region of CTUs within a particular tile column and a particular tile row within a picture. A tile column refers to a rectangular region of CTUs with a height equal to the height of the picture and a width specified by a syntax element (e.g., in a picture parameter set). A tile row refers to a rectangular region of CTUs with a height specified by a syntax element (e.g., in a picture parameter set) and a width equal to the width of the picture.

[0047] In some examples, a tile may be partitioned into multiple bricks, each of which may include one or more CTU rows within the tile. A tile that is not partitioned into multiple bricks may also be referred to as a brick. However, a brick that is a true subset of a tile may not be referred to as a tile. Bricks within a picture may also be arranged as slices. A slice may be an integer number of bricks of a picture that may be contained exclusively within a single network abstraction layer (NAL) unit. In some examples, a slice includes either several complete tiles or only a continuous sequence of complete bricks of one tile.

[0048] This disclosure may use "N x N" and "N by N," e.g., 16 x 16 samples or 16 by 16 samples, interchangeably to refer to the sample dimensions of a block (such as a CU or other video block) in the vertical and horizontal dimensions. Generally, a 16 x 16 CU has 16 samples in the vertical direction (y = 16) and 16 samples in the horizontal direction (x = 16). Similarly, an N x N CU generally has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. Samples within a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily have to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N x M samples, where M is not necessarily equal to N.

[0049] Video encoder 200 encodes video data for a CU that represents prediction and / or residual information and other information. The prediction information indicates how the CU will be predicted to form a predictive block for the CU. The residual information generally represents sample-by-sample differences between the samples of the CU before encoding and the predictive block.

[0050] To predict a CU, video encoder 200 may generally form a predictive block for the CU through inter prediction or intra prediction. Inter prediction generally refers to predicting a CU from data of a previously coded picture, and intra prediction generally refers to predicting a CU from previously coded data of the same picture. To perform inter prediction, video encoder 200 may generate a predictive block using one or more motion vectors. Video encoder 200 may generally perform motion search to identify a reference block that closely matches the CU with respect to the difference between the CU and the reference block, for example. Video encoder 200 may calculate a difference metric using a sum of absolute difference (SAD), a sum of squared differences (SSD), a mean absolute difference (MAD), a mean squared difference (MSD), or other such difference calculation to determine whether the reference block closely matches the current CU. In some examples, video encoder 200 may predict the current CU using unidirectional prediction or bidirectional prediction.

[0051] Some examples of VVC also provide an affine motion compensation mode, which may be considered an inter-prediction mode. In affine motion compensation mode, video encoder 200 may determine two or more motion vectors that represent non-translational motion, such as zooming in or out, rotation, perspective movement, or other irregular motion types.

[0052] To perform intra prediction, video encoder 200 may select an intra prediction mode to generate a predicted block. Some examples of VVC provide 67 intra prediction modes, including various directional modes, as well as a planar mode and a DC mode. Generally, video encoder 200 selects an intra prediction mode that describes neighboring samples for a current block (e.g., a block of a CU) and predicts samples of the current block therefrom. Assuming that video encoder 200 codes CTUs and CUs in raster scan order (left to right, top to bottom), such samples may generally be above, above and to the left, or to the left of the current block in the same picture as the current block.

[0053] The video encoder 200 encodes data representing a prediction mode for the current block. For example, in the case of an inter prediction mode, the video encoder 200 may encode data representing which of various available inter prediction modes is used as well as motion information for the corresponding mode. In the case of unidirectional or bidirectional inter prediction, for example, the video encoder 200 may encode motion vectors using an advanced motion vector prediction (AMVP) mode or a merge mode. The video encoder 200 may use a similar mode to encode motion vectors for an affine motion compensation mode.

[0054] AV1 includes two general techniques for encoding and decoding coding blocks of video data. The two general techniques are intra-prediction (e.g., intra-frame prediction or spatial prediction) and inter-prediction (e.g., inter-frame prediction or temporal prediction). In the context of AV1, when predicting a block of a current frame of video data using an intra-prediction mode, the video encoder 200 and the video decoder 300 do not use video data from other frames of the video data. In most intra-prediction modes, the video encoder 200 encodes the block of the current frame based on the difference between sample values ​​in the current block and predicted values ​​generated from reference samples in the same frame. The video encoder 200 determines the predicted values ​​generated from the reference samples based on the intra-prediction mode.

[0055] Following prediction, such as intra- or inter-prediction, of a block, the video encoder 200 may calculate residual data for the block. The residual data, such as a residual block, represents sample-by-sample differences between the block and a prediction block for that block formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transform data in the transform domain rather than the sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 may apply a secondary transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, or a Karhunen-Loeve transform (KLT), following the initial transform. The video encoder 200 produces transform coefficients following application of the one or more transforms.

[0056] As described above, following any transformation that produces transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all of the transform coefficients. For example, the video encoder 200 may truncate an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift of the value to be quantized.

[0057] Following quantization, the video encoder 200 may scan the transform coefficients, creating a one-dimensional vector from a two-dimensional matrix containing the quantized transform coefficients. The scan may be designed to place transform coefficients with higher energy (and therefore lower frequency) at the front of the vector and transform coefficients with lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 may use a predefined scan order to scan the quantized transform coefficients to create a serialized vector and then entropy code the quantized transform coefficients of the vector. In other examples, the video encoder 200 may perform adaptive scanning. After scanning the quantized transform coefficients to form the one-dimensional vector, the video encoder 200 may entropy code the one-dimensional vector, for example, according to context-adaptive binary arithmetic coding (CABAC). The video encoder 200 may also entropy code values ​​for syntax elements that describe metadata associated with the encoded video data for use by the video decoder 300 in decoding the video data.

[0058] To implement CABAC, video encoder 200 may assign a context in a context model to a symbol to be transmitted. The context may relate, for example, to whether neighboring values ​​of the symbol are zeroed. A probability determination may be based on the context assigned to the symbol.

[0059] Video encoder 200 may further generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for example, within a picture header, a block header, a slice header, or other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS), to video decoder 300. Video decoder 300 may similarly decode such syntax data to determine how to decode the corresponding video data.

[0060] In this manner, video encoder 200 may generate a bitstream including syntax elements that describe coded video data, e.g., partitions of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Finally, video decoder 300 may receive the bitstream and decode the coded video data.

[0061] Generally, video decoder 300 performs a reciprocal process to that performed by video encoder 200 to decode encoded video data of a bitstream. For example, video decoder 300 may decode values ​​for syntax elements of a bitstream using CABAC in a manner that is reciprocal but substantially similar to the CABAC encoding process of video encoder 200. The syntax elements may define partition information for the partition of a picture into CTUs and the partition of each CTU according to a corresponding partition structure, such as a QTBT structure, to define the CUs of the CTU. The syntax elements may further define prediction information and residual information for blocks of video data (e.g., CUs).

[0062] The residual information may be represented, for example, by quantized transform coefficients. The video decoder 300 may dequantize and inverse transform the quantized transform coefficients of the block to reconstruct a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-prediction or inter-prediction) and associated prediction information (e.g., motion information for inter-prediction) to form a predictive block for the block. The video decoder 300 can then combine the predictive block and the residual block (sample by sample) to reconstruct the original block. The video decoder 300 may also perform additional processing, such as performing a deblocking process to reduce visual artifacts along block boundaries.

[0063] This disclosure may generally refer to “signaling” particular information, such as a syntax element. The term “signaling” may generally refer to the communication of values ​​for syntax elements and / or other data used to decode encoded video data. That is, video encoder 200 may signal values ​​for syntax elements within a bitstream. Generally, signaling refers to generating values ​​within a bitstream. As mentioned above, source device 102 may forward the bitstream to destination device 116 in substantially real time or non-real time, which may occur, for example, when storing syntax elements in storage device 112 for later retrieval by destination device 116.

[0064] According to the techniques of this disclosure, as described in more detail below, video encoder 200 and video decoder 300 may be configured to code video data using an adaptive affine DMVR mode. For example, video encoder 200 and video decoder 300 may be configured to receive a first block of video data to be coded using adaptive affine DMVR, determine to set a first motion vector differential (MVD) for a first reference picture list to 0, refine control point motion vectors (CPMVs) associated with a second reference picture list to generate a refined CPMV, and code the first block of video data using the refined CPMV.

[0065] Bilateral Matching Bilateral matching (BM) is a technique by which the video encoder 200 and the video decoder 300 can be configured to refine a pair of two initial motion vectors, MV0 and MV1. Generally, the BM technique involves searching around the area of ​​the reference picture pointed to by MV0 and MV1 to derive refined MVs, MV0' and MV1', that minimize the block matching cost. The block matching cost measures the similarity between two motion-compensated predictors generated by the two MVs. Some typical criteria for the block matching cost are sum of absolute difference (SAD), sum of absolute transformed difference (SATD), sum of square error (SSE), etc. The bilateral matching cost may also include a regularization term derived based on the MV difference between the current MV pair and the initial MV pair. Some specific constraints may also be applied to the MV difference (MVD) between MVD0 (MV0'-MV0) and MVD1 (MV1'-MV1). Typically, BM is applied using the assumption that MVD0 and MVD1 are proportional to the temporal distance (TD) between the current picture and the reference pictures pointed to by the two MVs. However, in some applications, BM is applied using the assumption that MVD0 is equal to -MVD1.

[0066] Affine Mode The affine motion model can be described by the following equation:

[0067]

number

[0068] In a typical video coder, a picture is partitioned into blocks for block-based coding. An affine motion model for a block also uses three motion vectors (MVs) at three different locations that are not on the same line.

[0069]

number

[0070]

number

[0071] In the affine mode, a different motion vector can be derived for each pixel in a block according to an associated affine motion model. Therefore, motion compensation can be performed on a pixel-by-pixel basis. However, to reduce the complexity of the affine mode, sub-block-based motion compensation can be used, in which a block is partitioned into multiple sub-blocks (each sub-block has a block size smaller than that of the original block), and each sub-block is associated with one motion vector for block-based motion compensation. The motion vector of each sub-block is derived using the representative coordinate of the sub-block. Typically, a central position is used as the representative coordinate.

[0072] In one example, a block is partitioned into non - overlapping sub - blocks. The block width is blkW, the block height is blkH, the sub - block width is sbW, and the sub - block height is sbH. In this example, there are blkH / sbH rows of sub - blocks and blkW / sbW sub - blocks in each row. For a 6 - parameter affine motion model, the motion vector (referred to as sub - block MV) for the sub - block at the i - th row (0 ≤ i < blkW / sbW) and j - th column (0 ≤ j < blkH / sbH) is derived as follows.

[0073] [Number]

[0074] The motion vector (MV) of the sub - block is rounded to a given accuracy and stored in a motion buffer for motion compensation and motion vector prediction.

[0075] The simplified 4 - parameter affine model (zoom and rotation motion) is described as follows:

[0076] [Number]

[0077] Similar to the 6 - parameter affine model, the 4 - parameter affine model for a block can be described by the following two CPMVs, that is, at two corners of the block (typically, the upper - left and upper - right)

[0078] [Number] In this case, the motion field is described as follows:

[0079] [Number]

[0080] The motion vector (MV) of the sub-block at the ith row and jth column is derived as follows:

[0081]

number

[0082] DMVR in VVC In VVC, BM-based DMVR may be used by the video encoder 200 and the video decoder 300 to improve the accuracy of the MV of a bi-predictive merge candidate. The BM-based DMVR method calculates the SAD between two candidate blocks in the reference picture list L0 and the list L1. FIG. 2 is a conceptual diagram illustrating an example of bilateral matching. As shown in FIG. 2, the video encoder 200 and the video decoder 300 may be configured to calculate the SAD between block 500 and block 502 based on each MV candidate surrounding the initial MV. The SAD may be referred to as a distortion cost calculation or a bilateral matching cost calculation. The MV candidate with the lowest SAD becomes the refined MV and is used to generate a bi-predicted signal. In some examples, the SAD of the initial MV is subtracted by ¼ of the SAD value to act as a regularization term. In the example of Figure 2, the temporal distance (e.g., Picture Order Count (POC) difference) from the two reference pictures to the current picture is assumed to be the same, and therefore the motion vector differential for MV0 (MVD0) is simply the opposite sign of the motion vector differential for MV1 (MVD1).

[0083] The refinement search range is two integer luma samples from the initial MV. The search includes an integer sample offset search stage and a fractional sample refinement stage. For the integer sample offset search, a 25-point full search is applied. The SAD of the initial MV pair is calculated first. If the SAD of the initial MV pair is smaller than a threshold, the integer sample stage of the DMVR ends. Otherwise, the SADs of the remaining 24 points are calculated and checked in raster scan order. The point with the smallest SAD is selected as the output of the integer sample offset search stage.

[0084] The integer sample search is followed by fractional sample refinement. To reduce computational complexity, the fractional sample refinement may be derived by using a parametric error surface equation rather than an additional search using SAD comparison. In one example, the fractional sample refinement is conditionally invoked based on the output of the integer sample search stage. When the integer sample search stage ends at the center with the smallest SAD in either the first or second iteration, the fractional sample refinement is further applied.

[0085] In parametric error surface based sub-pixel offset estimation, the central position cost and the costs at four adjacent positions from the center are used to fit a 2D parabolic error surface equation of the form:

[0086]

number

[0087]

number

[0088] Since all cost values ​​are positive and the minimum value is E(0,0), x min and y min The value of is automatically constrained to be between -8 and 8, which corresponds to a half-pel offset with 1 / 16-pel MV precision in VVC. The calculated fraction (x min ,y min ) is added to the integer distance refinement MV to obtain the sub-pixel accurate refinement delta MV.

[0089] In VVC, the resolution of the motion vector (MV) is 1 / 16 luma sample. Samples at fractional positions are interpolated using an 8-tap interpolation filter. In DMVR, search points surround the initial fractional pel motion vector (MV) with integer sample offsets, and therefore, samples at those fractional positions are interpolated for the DMVR search process. To reduce computational complexity, a bilinear interpolation filter is used to generate fractional samples for the search process in DMVR. Another advantage is that by using a bilinear filter with a two-sample search range, the DVMR process does not access more reference samples than a conventional motion compensation process. After the refined motion vector (MV) is obtained using the DMVR search process, a conventional 8-tap interpolation filter is applied to generate the final prediction. To avoid accessing more reference samples than a conventional motion compensation process, samples not required for the interpolation process based on the original motion vector (MV) but required for the interpolation process based on the refined motion vector (MV) can be padded from available samples.

[0090] When the width and / or height of a CU is greater than 16 luma samples, the CU may be further divided into sub-blocks with width and / or height equal to 16 luma samples for the DMVR process.

[0091] In VVC, DMVR can be applied to CUs coded with the following modes and features: CU-level merge mode with bi-predictive MV For a current picture, one reference picture is in the past and another is in the future. The distance from the two reference pictures to the current picture (i.e., the POC difference) is the same Both reference pictures are short-term reference pictures CU has more than 64 luma samples Both the CU height and CU width are 8 luma samples or more Bi-Prediction with CU-level Weight (BCW) weight index indicates equal weight Weighted prediction (WP) is not currently enabled for blocks Combined inter-intra prediction (CIIP) mode is not used for the current block

[0092] Compatible DMVR The general idea of ​​adaptive DMVR is to configure video encoder 200 and video decoder 300 to use different search strategies and / or search methods for different coded blocks for bilateral matching. The selected search strategy for a block is signaled as one or more syntax elements coded in the bitstream. The search strategy includes the constraints / relationships between MVD0 and MVD1 that are imposed during the bilateral matching search process.

[0093] One of the following constraints between MVD0 and MVD1 is selected for each bilateral matching block: 1) Mirrored MVD: MVD0 and MVD1 have the same magnitude but opposite signs, i.e., MVD0=-MVD1 (normal DMVR). 2) MVD0 is 0 (both x and y components are 0), i.e., MV0 is fixed, while a search is performed around MV1 to derive a refined MV1', where MV0' is equal to MV0 (adaptive DMVR). 3) MVD1 is 0, i.e., MV1 is fixed, while a search is performed around MV0 to derive a refined MV0', where MV1' is equal to MV1 (adaptive DMVR).

[0094] Video encoder 200 may signal a first syntax element that represents mode information (e.g., whether normal DMVR or adaptive DMVR should be applied). The three options mentioned above are categorized by the first syntax element. When the normal merge candidate satisfies the DVMR condition, option 1) applies normal DMVR to the coded block; when the coded block uses the specified new merge mode, option 2) or 3) applies, and all candidates shall also satisfy the specified DMVR condition. Constraints 2) and 3) are further distinguished by a mode flag or a merge index.

[0095] DMVR for Affine Merge Mode The affine DMVR design can be summarized in the following steps: 1) Divide the current block into sub-blocks. 2) Generate initial motion vectors (in both prediction directions) for each sub-block (sub-block motion field) according to an initial affine motion model. 3) Loop over each subblock and calculate the subblock bilateral matching cost for all possible offsets. 4) For each possible offset, accumulate the sub-block bilateral matching costs to generate a bilateral matching cost corresponding to the entire block. 5) Determine the best offset by selecting the offset with the smallest bilateral matching cost that corresponds to the entire block.

[0096] In this way, the sub-block motion field is generated only once for each candidate offset.

[0097] The sub-block size in the above process is determined based on the affine parameter, which reflects the pixel-by-pixel motion vector change in the affine-coded block. Generally, when the affine parameter is small, a larger sub-block size is used, and vice versa.

[0098] Given the offsets and initial motion vectors (generated in step 2 above), candidate motion vectors can be derived. Pre-interpolation is applied to generate predictors for all possible offsets in one step, thereby reducing complexity. Instead of the 8-tap (6-tap or 12-tap) interpolation filter typically used for final motion compensation, bilinear interpolation is used.

[0099] To generate the sub-pixel offsets, a parametric error surface based sub-pixel offset estimation is applied after step 5).

[0100] Jie Chen,et.al. “EE2-2.6:DMVR for affine merge coded blocks,”Joint Video Experts Team(JVET)of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29,28 th Meeting, Mainz, DE, 20-28 October 2022 (hereinafter referred to as "JVET-AB0112"), an affine DMVR technique that follows the above-mentioned procedure is proposed.

[0101] Han Huang,et.al.,"EE2-related Sub-block processing for affine DMVR,"Joint Video Experts Team(JVET)of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29,28 th Meeting, Mainz, DE, 20-28 October 2022 (hereinafter referred to as "JVET-AB0177"), certain simplifications of affine DMVR are described. For example, instead of using each of the sub-blocks in the affine DMVR, only a subset of the sub-blocks is used. In addition, based on the affine DMVR search results, a regression-based affine merge candidate derivation method can be further applied.

[0102] Han Huang,et.al.,"EE2-related:Control-point motion vector refinement for Affine DMVR,"Joint Video Experts Team(JVET)of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29,28 th Meeting, Mainz, DE, 20-28 October 2022 (hereinafter referred to as "JVET-AB0178"), a CPMV-based affine DMVR search method was presented. Given an initial control point motion vector initCpMvLX[cpIdx], where cpIdx=0..numCpMv-1, numCpMv is the number of CPMVs for the current affine coding block. The proposed method can be described in the following steps: 1) For each control point, perform bilateral matching on the block 510 centered by the control point to derive a refined CPMV bmRefinedCpMvLx[cpIdx], as shown in Figure 3. Figure 3 is a conceptual diagram illustrating an example of independent bilateral matching search of control point motion vectors. 2) Loop over the combinations of initCpMvLX[cpIdx] and bmRefinedCpMvLx[cpIdx] and derive the best set of CPMVs that minimize the bilateral matching cost of the current block. 3) Iteratively refine the CPMVs to minimize the bilateral matching cost of the current block. In each iteration, one CPMV is refined and the other CPMVs are fixed.

[0103] Adaptive Reordering of Merge Candidates (ARMC) In the Enhanced Compression Model (ECM) currently being studied, merge candidates are adaptively reordered using template matching (TM). The reordering method is applied to the regular merge candidate list, the TM merge candidate list, and the affine merge candidate list (the subblock merge candidate list excluding subblock temporal motion vector predictor (SbTMVP) candidates). In some instances of ECM, multiple SbTMVP candidates may be included in the candidate list, and these multiple SbTMVP candidates can be reordered using the ARMC process. In the TM merge mode, merge candidates are reordered before the TM refinement process.

[0104] After the merge candidate list is constructed, the TM cost of the merge candidate is measured by the sum of absolute differences (SAD) between the samples of the template of the current block and their corresponding reference samples. The template of the current block includes a set of reconstructed samples that are adjacent to the current block. The reference samples of the template are positioned according to the motion information of the merge candidate.

[0105] When a merge candidate utilizes bi-prediction, the reference samples of the merge candidate's template are also generated by bi-prediction, as shown in FIG. 4. FIG. 4 is a conceptual diagram illustrating an example template and reference samples of the template in a reference picture. A current block 600 of a current picture 602 has a top template 604 and a left template 606. A reference block 610 of a reference picture 612 in reference list 0 is identified using the motion vector of the merge candidate in reference list 0. Reference samples of a top template 614 and a left template 616 are obtained (RT0). Similarly, a reference block 620 of a reference picture 622 in reference list 1 is identified using the motion vector of the merge candidate in reference list 1. Reference samples of a top template 624 and a left template 626 are obtained (RT1). The RT0 reference samples and the RT1 reference samples are combined and averaged to obtain a single template. A sum of absolute differences (SAD) can be calculated between the current template T and the single template formed from the RT0 and RT1 samples. Video encoder 200 and video decoder 300 may use the SAD value to determine whether a template is a good match.

[0106] For subblock-based merging candidates with a subblock size equal to W×H, the top template includes several subtemplates with a size of W×1, and the left template includes several subtemplates with a size of 1×H. Figure 5 is a conceptual diagram illustrating an example of an exemplary template and reference samples for subblock motion. As shown in Figure 5, motion information for subblocks in the first row (A, B, C, D) and first column (A, E, F, G) of a current block 700 in a current picture 702 is used to derive reference samples for each subtemplate 710 and 712. The subtemplate 710 is represented by a black box above reference blocks A, B, C, and D in a reference picture 714. The reference blocks for the subtemplate 710 are identified by the motion vectors of subblocks A, B, C, and D relative to a collocated block 716. The subtemplate 712 is represented by a black box to the left of reference blocks A, E, F, and G in the reference picture 714. The reference blocks of the sub-template 712 are identified by the motion vectors of sub-blocks A, E, F, G relative to the collocated block 716 .

[0107] The merge candidate list is sorted in ascending order based on the TM cost of each merge candidate.

[0108] A general example of adaptive affine DMVR In this disclosure, video encoder 200 and video decoder 300 may be configured to code video data according to an adaptive affine DMVR process. The adaptive affine DMVR of this disclosure allows for flexibility in further refinement to the affine DMVR using additional signaling. Compared with other affine DMVR techniques, the general idea of ​​the adaptive affine DMVR of this disclosure is to set the MVD of one of the reference lists to (0,0). In this way, instead of refining both reference lists simultaneously, only one of the predictors from a given reference list is refined.

[0109] Adaptive affine DMVR can be an extension of the regular adaptive DMVR method described above. However, when refining the MVD to determine the refined CPMV, the BM cost is derived for each subblock instead of the entire CU, and the BM cost is accumulated for each subblock for the final cost to determine the best MVD. In some cases, one of the predictors may already be accurate and only the other predictors need to be refined, so additional coding benefits can be realized. In one example, a total of three different refinement options can be provided for each affine merge candidate that satisfies the DMVR condition, along with the original decoder-side motion vector refinement. 1) The original affine DMVR-MVD is mirrored: MVD0 and MVD1 have the same magnitude but opposite signs, i.e., MVD0 = -MVD1. 2) Adaptive affine DMVR1-MVD0 is 0 (both x and y components are 0). For each sub-block in the affine CU, MV0 is fixed, but the BM cost is derived within the search range of MV1. The accumulated BM cost is used to determine the final MVD1 for each CPMV in reference list 1. 3) Adaptive affine DMVR2-MVD1 is 0 (both x and y components are 0). For each sub-block in the affine CU, MV1 is fixed, but the BM cost is derived within the search range of MV0. The accumulated BM cost is used to determine the final MVD0 for each CPMV in reference list 0.

[0110] With the introduction of multiple refinement options, additional syntax signaling may be used. In one example, video encoder 200 may encode a first syntax element to indicate whether option 1) is used (e.g., affine DMVR with mirrored MVDs). If the first syntax indicates that option 1) is not used, video encoder 200 may encode a second syntax element to indicate whether option 2) or option 3) is used (either MVD0 is 0 or MVD1 is 0). Video decoder 300 may decode and parse the first and second syntax elements to determine the type of affine DMVR decoding to perform.

[0111] In a general example of this disclosure, video encoder 200 and video decoder 300 may receive a block of video data to be coded (e.g., encoded or decoded) using adaptive affine DMVR. Video encoder 200 and video decoder 300 may determine to set a first MVD for a first reference picture list to 0. In one example, the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1. In another example, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

[0112] Video encoder 200 and video decoder 300 may be configured to code a first syntax element indicating that a first block of video data should be decoded using adaptive affine DMVR (e.g., according to option 2) and option 3) above). In one example, to determine to set the first MVD for the first reference picture list to 0, video decoder 300 may decode a second syntax element indicating to set the first MVD for the first reference picture list to 0. In this example, the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

[0113] The video encoder 200 and the video decoder 300 may then refine the CPMV associated with the second reference picture list to generate a refined CPVM. To perform the refinement, the video encoder 200 and the video decoder 300 may refine the second MVD for the second reference picture list using any of the affine DMVR techniques described above or the affine DMVR techniques described below. For example, the video encoder 200 and the video decoder 300 may determine, for each sub-block in the first block of video data, a bilateral matching (BM) cost within a search range of the motion vector, accumulate the BM costs for multiple sub-blocks of the first block of video data to generate an accumulated BM cost, determine a second MVD for the CPMV of the second reference picture list based on the accumulated BM cost, and determine the refined CPMV based on the second MVD.

[0114] Video encoder 200 and video decoder 300 may then code the first block of video data using the refined CPMV. In this context, the coding is bidirectional coding. The refined CPMV is used for the second reference picture list, and the original CPMV (e.g., because the first MVD is set to 0) is used for the first reference picture list.

[0115] Signaling Syntax In one example, video encoder 200 may be configured to signal the above-described adaptive affine DMVR mode (adaptive_aff_bm_mode) as an additional affine merge mode to the regular affine merge mode. Various signaling methods may be applied. In one example, adaptive_aff_bm_mode is considered as one variant of the regular affine merge mode. Video encoder 200 may first signal a syntax element to indicate the regular merge mode, and then an additional flag is signaled to indicate whether the merge mode is adaptive_aff_bm_mode.

[0116] In another example, video encoder 200 may signal a first flag to indicate whether a regular affine merge mode is used. Video encoder 200 may further signal a second flag to indicate whether the affine merge candidate is an affine MMVD candidate. In this example, adaptive_aff_bm_mode is signaled after the affine MMVD flag to indicate whether a regular affine merge candidate should be derived or an adaptive affine merge candidate should be derived.

[0117] In another example, adaptive_aff_bm_mode is indicated by a flag before the indication of normal affine merge mode. If the syntax indicates that the current block is not using adaptive_aff_bm_mode, another syntax element is signaled to indicate whether the merge mode is normal affine merge mode or affine MMVD mode.

[0118] Video encoder 200 may signal merge indexes in adaptive_aff_bm_mode using the same signaling method as in normal affine merge mode. In one example, the same context model is used to code the merge indexes. In another example, a separate context model is used when the mode is adaptive_aff_bm_mode. The maximum number of merge candidates may be different between adaptive_aff_bm_mode and normal affine merge mode.

[0119] Several high-level syntax elements may be used to indicate whether adaptive_aff_bm_mode may be applied. In one example, the same high-level syntax that controls normal affine DMVR on / off is also used to control adaptive_aff_bm_mode on / off. In another example, a separate high-level syntax is used to control adaptive_aff_bm_mode on / off. In another example, a separate high-level syntax is used to control adaptive_aff_bm_mode on / off, but the high-level syntax is only present when normal affine DMVR is enabled. If the high-level syntax for normal affine DMVR indicates that normal affine DMVR is off, the high-level syntax for controlling adaptive_aff_bm_mode on / off is not signaled and is inferred to be off. The corresponding high-level syntax signaling may be in the SPS, PPS, picture header, slice header, or other syntax structure.

[0120] Reduced Syntax Signaling The signaling of the above syntax can be saved (e.g., not signaled) in some cases. Instead, either TM cost information or BM cost information can be used to determine the use of adaptive affine DMVR. To save the signaling of the second syntax, in one example, two TM costs are derived before performing affine DMVR or adaptive affine DMVR. Define the TM cost between the template of the current block and the template of the predictor from reference list 0 as TM0, and define the TM cost between the template of the current block and the template of the predictor from reference list 1 as TM0. If TM1 < TM0, only options 1) and 2) are examined, and only one syntax is required to indicate which option is used. Otherwise, only options 1) and 3) are examined, and similarly, only one syntax is required.

[0121] In a second example, all three options are examined first. Then, using the refined affine motion vectors, a dual-prediction reference template is derived, and the TM cost between the current template and the dual-reference template is calculated for both options 2) and 3). By comparing the TM costs of option 2) and option 3), one of the options is opted out, and thus only one syntax element needs to be signaled.

[0122] In a third example, instead of using TM costs as in the second example, the minimum BM cost in the adaptive affine DMVR refinement search process is used and compared between option 2) and option 3) to determine which option is used. Excluding one of the options reduces the number of syntaxes required from 2 to 1.

[0123] The first syntax signaling can also be saved by using either the TM cost or the BM cost. In one example, the minimum BM cost of all three options during the DMVR search process is recorded. After all three options are examined, only the option with the minimum BM cost is kept. In yet another example, instead of using the BM cost, the TM cost is used to determine which of the three options is kept.

[0124] Alternative Affine Merge Lists for Adaptive Affine DMVR In the case of adaptive affine DMVR, since there is already a first syntax element for indicating whether affine DMVR or adaptive affine DMVR is applied, a separate affine merge list can be constructed that includes only affine merge candidates that satisfy the affine DMVR conditions. In one example, after the affine merge list is constructed, candidates that satisfy the adaptive affine DMVR conditions can be added to a separate list used only for the adaptive affine DMVR process. By excluding either unipredicted candidates or candidates that do not satisfy the adaptive affine DMVR conditions, the merge index to be signaled may be smaller, and therefore signaling overhead may be reduced. To further reduce signaling overhead, ARMC can be further applied to the adaptive affine merge list before refining each of the candidates.

[0125] In a second example, an adaptive affine merge candidate is alternatively added to the regular merge candidate list for adaptive bilateral matching. When scanning to build the regular merge candidate list for adaptive bilateral matching, the affine flag is further checked. If the neighboring coded block is coded in affine mode, instead of adding a transform inter merge candidate, an affine merge candidate is alternatively added. As a result, depending on whether the merge candidate is a transform inter merge candidate or an affine merge candidate, an adaptive DMVR process or an affine-adaptive DMVR process can be applied accordingly.

[0126] When an alternative merge list is used for adaptive affine DMVR, the second syntax element can also be saved using the same method as described above, for example, using the TM cost. In addition, the merge index to be signaled can also be modified to be smaller based on the TM cost or the BM cost. For example, in one example, an adaptive affine merge list with a list size M is constructed. Two adaptive affine DMVR options 2) and 3) can be used to generate a total of 2M refined candidates. These 2M candidates can be collected into a single list, and ARMC sorting can be performed using the TM cost, with only the first M candidates in the list being retained. In this way, signaling of the second syntax element can be skipped and a smaller merge index can be signaled.

[0127] Alternative Search Patterns In affine DMVR, a square search pattern is used for integer searches and a parametric error surface is followed for sub-pel searches. For adaptive affine DMVR, in one example, the same search pattern is used. In a second example, a full search is used instead. For sub-pel searches, in one example, the same parametric error surface method is used. In a second example, a diamond search pattern is used. And in a third example, the sub-pel search is skipped.

[0128] Alternative search areas In one example of affine DMVR, the search range is set to 3 pels. In one example, the same search range used for affine DMVR is used for the adaptive affine DMVR technique of this disclosure. In another example, an alternative search range is used for the adaptive affine DMVR only, for example 4 pels.

[0129] Alternative Cost Metrics In affine DMVR, either SAD or mean-removed SAD (MRSAD) is used, depending on the block size. For adaptive affine DMVR, an alternative cost metric can be used instead. In one example, SATD is used instead. In a second example, SSE is used. In another example, the adaptive DMVR technique uses the same cost metric as affine DMVR, including SAD, MRSAD, SATD, or SSE.

[0130] Combining Affine DMVR with Further Refinement As described above, different affine DMVR designs may be applied to pictures of video data. Adaptive affine DMVRs generally follow the same procedure in refining affine merge candidates, with the difference being that they add MVD to calculate the BM cost. Thus, in one example, the adaptive affine DMVR uses the same design as the affine DMVR, e.g., both use the design from JVET-AB0177. In yet another example, the affine DMVR uses the design from JVET-AB0112, and the adaptive affine DMVR uses the design from JVET-AB0177.

[0131] Also, as explained above, further refinement after the affine DMVR may be possible. Similar further refinement schemes can also be applied to the adaptive affine DMVR. In one example, a regression-based affine merge candidate derivation method is applied to the adaptive affine DMVR output. In yet another example, a CPMV-based affine DMVR search method is applied to the adaptive affine DMVR result. In another example, both further refinement methods are applied sequentially on top of the adaptive affine DMVR.

[0132] 6 is a block diagram illustrating an example video encoder 200 that may implement the techniques of this disclosure. Figure 6 is provided for purposes of explanation and should not be considered limiting of the techniques broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes video encoder 200 in accordance with VVC and HEVC techniques. However, the techniques of this disclosure may be implemented by video encoding devices configured for other video coding standards and video coding formats, such as AV1 and successors to the AV1 video coding format.

[0133] 6, video encoder 200 includes video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, decoded picture buffer (DPB) 218, and entropy coding unit 220. Any or all of video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, DPB 218, and entropy coding unit 220 may be implemented in one or more processors or processing circuits. For example, the units of video encoder 200 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Moreover, video encoder 200 may include additional or alternative processors or processing circuitry that perform these and other functions.

[0134] Video data memory 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data stored in video data memory 230, for example, from video source 104 (FIG. 1). DPB 218 may function as a reference picture memory that stores reference video data for use in predicting subsequent video data by video encoder 200. Video data memory 230 and DPB 218 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous dynamic random access memory (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. Video data memory 230 and DPB 218 may be provided by the same memory device or separate memory devices. In various examples, video data memory 230 may be on-chip with other components of video encoder 200, as shown, or may be off-chip relative to those components.

[0135] In this disclosure, references to video data memory 230 should not be construed as limited to memory internal to video encoder 200 unless specifically stated so, or to memory external to video encoder 200 unless specifically stated so. Rather, references to video data memory 230 should be understood as a reference memory that stores video data that video encoder 200 receives for encoding (e.g., video data for a current block to be encoded). Memory 106 of FIG. 1 may also provide temporary storage of outputs from various units of video encoder 200.

[0136] The various units in FIG. 6 are shown to aid in understanding the operations performed by video encoder 200. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. A fixed-function circuit refers to a circuit that provides a specific function, and the operations that may be performed are predefined. A programmable circuit refers to a circuit that may be programmed to perform various tasks, and provides flexibility in the operations that may be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by the software or firmware instructions. While a fixed-function circuit may execute software instructions (e.g., receive parameters or output parameters), the types of operations that the fixed-function circuit performs are generally invariant. In some examples, one or more of the units may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units may be integrated circuits.

[0137] Video encoder 200 may include arithmetic logic units (ALUs), elementary function units (EFUs), digital circuits, analog circuits, and / or a programmable core formed from programmable circuits. In examples in which the operations of video encoder 200 are implemented using software executed by programmable circuits, memory 106 (FIG. 1) may store software instructions (e.g., object code) that video encoder 200 receives and executes, or a separate memory (not shown) within video encoder 200 may store such instructions.

[0138] The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve pictures of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be raw video data to be encoded.

[0139] The mode select unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode select unit 202 may include additional functional units that perform video prediction according to other prediction modes. By way of example, the mode select unit 202 may include a palette unit, an intra block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0140] The mode selection unit 202 generally coordinates multiple coding passes to test combinations of coding parameters and the resulting rate-distortion values ​​for such combinations. The coding parameters may include partitioning of CTUs into CUs, prediction modes for CUs, transform types for residual data of CUs, quantization parameters for residual data of CUs, etc. The mode selection unit 202 may ultimately select a combination of coding parameters that has a better rate-distortion value than the other tested combinations.

[0141] Video encoder 200 may partition a picture retrieved from video data memory 230 into a series of CTUs and encapsulate one or more CTUs within a slice. Mode select unit 202 may partition the CTUs of a picture according to a tree structure, such as the MTT structure, QTBT structure, superblock structure, or quadtree structure described above. As described above, video encoder 200 may form one or more CUs from partitioning the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks."

[0142] Generally, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for a current block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and TU). In the case of inter prediction of the current block, the motion estimation unit 222 may perform motion search to identify one or more closely matching reference blocks among one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate a value representing how similar a potential reference block is to the current block according to, for example, the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 may generally perform these calculations using sample-by-sample differences between the current block and the reference block under consideration. Motion estimation unit 222 may identify the reference block with the lowest value resulting from these calculations, indicating the reference block that most closely matches the current block.

[0143] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of the current block in the current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, in the case of unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while in the case of bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then generate a predictive block using the motion vectors. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference blocks. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate values ​​for the predictive block according to one or more interpolation filters. Moreover, in the case of bidirectional inter prediction, the motion compensation unit 224 may retrieve data for the two reference blocks identified by the respective motion vectors and combine the retrieved data, for example, through sample-wise averaging or weighted averaging.

[0144] When operating according to the AV1 video coding format, the motion estimation unit 222 and the motion compensation unit 224 may be configured to encode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, overlapped block motion compensation (OBMC), and / or synthetic inter-intra prediction.

[0145] The motion estimation unit 222 and the motion compensation unit 224 may also be configured to implement one or more techniques of this disclosure related to adaptive affine DMVR. For example, the motion estimation unit 222 and the motion compensation unit 224 may be configured to receive a first block of video data to be encoded using adaptive affine DMVR, determine to set a first MVD for a first reference picture list to 0, refine a CPMV associated with a second reference picture list to generate a refined CPMV, and encode the first block of video data using the refined CPMV.

[0146] As another example, in the case of intra prediction or intra-predictive coding, intra prediction unit 226 may generate a predictive block from samples neighboring the current block. For example, in the case of a directional mode, intra prediction unit 226 may generally mathematically combine values ​​of neighboring samples and populate these calculated values ​​in a defined direction across the current block to create the predictive block. As another example, in the case of a DC mode, intra prediction unit 226 may calculate an average of neighboring samples for the current block and generate a predictive block to include this resulting average for each sample of the predictive block.

[0147] When operating according to the AV1 video coding format, intra prediction unit 226 may be configured to encode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, chroma-from-luma (CFL) prediction, intra block copy (IBC), and / or color palette mode. Mode select unit 202 may include additional functional units that perform video prediction according to other prediction modes.

[0148] The mode select unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives a raw, uncoded version of the current block from the video data memory 230 and the prediction block from the mode select unit 202. The residual generation unit 204 calculates sample-by-sample differences between the current block and the prediction block. The resulting sample-by-sample differences define a residual block for the current block. In some examples, the residual generation unit 204 may also determine differences between sample values ​​in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0149] In examples in which mode select unit 202 partitions CUs into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. Video encoder 200 and video decoder 300 may support PUs having various sizes. As mentioned above, the size of a CU may refer to the size of the luma coding block of the CU, and the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, video encoder 200 may support a PU size of 2N×2N or N×N for intra prediction, and a symmetric PU size of 2N×2N, 2N×N, N×2N, N×N, or similar for inter prediction. Video encoder 200 and video decoder 300 may also support asymmetric partitioning of PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter prediction.

[0150] In examples where mode select unit 202 does not further partition CUs into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As described above, the size of a CU may refer to the size of the luma coding block of the CU. Video encoder 200 and video decoder 300 may support CU sizes of 2N×2N, 2N×N, or N×2N.

[0151] For other video coding techniques, such as intra block copy mode coding, affine mode coding, and linear model (LM) mode coding, as some examples, mode select unit 202 generates a predictive block for the current block being coded via a separate unit associated with the coding technique. In some examples, such as palette mode coding, mode select unit 202 may not generate a predictive block, but instead may generate syntax elements that indicate how to reconstruct the block based on a selected palette. In such modes, mode select unit 202 may provide these syntax elements to entropy coding unit 220 to be coded.

[0152] As described above, the residual generation unit 204 receives video data for a current block and a corresponding predictive block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates sample-by-sample differences between the predictive block and the current block.

[0153] Transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, transform processing unit 206 may perform multiple transforms on the residual block, e.g., a linear transform and a secondary transform such as a rotational transform. In some examples, transform processing unit 206 does not apply a transform to the residual block.

[0154] When operating according to AV1, transform processing unit 206 may apply one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, transform processing unit 206 may apply a horizontal / vertical transform combination, which may include a discrete cosine transform (DCT), an asymmetric discrete sine transform (ADST), an inverse ADST (e.g., ADST in reverse order), and an identity transform (IDTX). When using an identity transform, the transform is skipped in one of the vertical or horizontal directions. In some examples, the transform process may be skipped.

[0155] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode select unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may result in loss of information, and therefore, the quantized transform coefficients may be less accurate than the original transform coefficients produced by the transform processing unit 206.

[0156] Inverse quantization unit 210 and inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. Reconstruction unit 214 may produce a reconstructed block that corresponds to the current block (possibly with some distortion) based on the reconstructed residual block and the predictive block generated by mode select unit 202. For example, reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the predictive block generated by mode select unit 202 to produce the reconstructed block.

[0157] Filter unit 216 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along the edges of a CU. The operations of filter unit 216 may be skipped in some examples.

[0158] When operating according to AV1, filter unit 216 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along the edges of a CU. In other examples, filter unit 216 may apply a constrained directional enhancement filter (CDEF), which may be applied after deblocking and may include application of a non-separable, nonlinear, low-pass directional filter based on estimated edge directions. Filter unit 216 may also include a loop restoration filter, which may be applied after the CDEF and may include a separable symmetric normalized Wiener filter or a dual autoinduction filter.

[0159] Video encoder 200 stores the reconstructed blocks in DPB 218. For example, in examples where the operations of filter unit 216 are not performed, reconstruction unit 214 may store the reconstructed blocks in DPB 218. In examples where the operations of filter unit 216 are performed, filter unit 216 may store the filtered reconstructed blocks in DPB 218. Motion estimation unit 222 and motion compensation unit 224 may retrieve reference pictures formed from the reconstructed (and possibly filtered) blocks from DPB 218 to inter-predict blocks of a later-encoded picture. Additionally, intra-prediction unit 226 may use the reconstructed blocks of the current picture in DPB 218 to intra-predict other blocks in the current picture.

[0160] Generally, entropy encoding unit 220 may entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy encoding unit 220 may entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy encoding unit 220 may entropy encode predictive syntax elements (e.g., motion information for inter-prediction or intra-mode information for intra-prediction) from mode select unit 202. Entropy encoding unit 220 may perform one or more entropy encoding operations on syntax elements, which are other examples of video data, to generate entropy-encoded data. For example, entropy encoding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a Probability Interval Partitioning Entropy (PIPE) coding operation, an Exponential-Golomb coding operation, or another type of entropy coding operation on the data. In some examples, entropy encoding unit 220 may operate in a bypass mode in which syntax elements are not entropy coded.

[0161] Video encoder 200 may output a bitstream that includes entropy-encoded syntax elements needed to reconstruct blocks of a slice or picture. Specifically, entropy encoding unit 220 may output the bitstream.

[0162] The entropy coding unit 220 may be configured as a symbol-to-symbol adaptive multi-symbol arithmetic coder according to AV1. A syntax element in AV1 includes an alphabet of N elements, and a context (e.g., a probability model) includes a set of N probabilities. The entropy coding unit 220 may store the probabilities as n-bit (e.g., 15-bit) cumulative distribution functions (CDFs). The entropy coding unit 220 may perform recursive scaling to update the context, using an update factor based on the alphabet size.

[0163] The operations described above are described with respect to blocks. Such descriptions should be understood as operations on luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are luma and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are luma and chroma components of a PU.

[0164] In some examples, operations performed with respect to luma coding blocks need not be repeated for chroma coding blocks. As one example, operations identifying motion vectors (MVs) and reference pictures for luma coding blocks need not be repeated to identify MVs and reference pictures for chroma blocks. Rather, the MVs of luma coding blocks may be scaled to determine the MVs of chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0165] Video encoder 200 represents an example of a device configured to encode video data, including a memory configured to store video data and one or more processing units implemented in circuitry and configured to receive a first block of video data to be encoded using adaptive affine DMVR, determine to set a first MVD for a first reference picture list to 0, refine a CPMV associated with a second reference picture list to generate a refined CPMV, and encode the first block of video data using the refined CPMV.

[0166] 7 is a block diagram illustrating an example video decoder 300 that may implement the techniques of this disclosure. Figure 7 is provided for purposes of explanation and does not limit the techniques broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes a video decoder 300 in accordance with VVC and HEVC techniques. However, the techniques of this disclosure may be implemented by video coding devices configured for other video coding standards.

[0167] In the example of Figure 7, the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a DPB 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or processing circuits. For example, the units of the video decoder 300 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Moreover, the video decoder 300 may include additional or alternative processors or processing circuits that perform these and other functions.

[0168] Prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. Prediction processing unit 304 may include additional units that perform prediction according to other prediction modes. By way of example, prediction processing unit 304 may include a palette unit, an intra block copy unit (which may form part of motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, video decoder 300 may include more, fewer, or different functional components.

[0169] When operating in accordance with AV1, the motion compensation unit 316 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, OBMC, and / or synthetic inter-intra prediction, as described above. The intra prediction unit 318 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, CFL, IBC, and / or color palette mode, as described above.

[0170] The motion compensation unit 316 may also be configured to implement one or more techniques of this disclosure related to adaptive affine DMVR. For example, the motion compensation unit 316 may be configured to receive a first block of video data to be decoded using adaptive affine DMVR, determine to set a first MVD for a first reference picture list to 0, refine a CPMV associated with a second reference picture list to generate a refined CPMV, and decode the first block of video data using the refined CPMV.

[0171] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. The video data stored in CPB memory 320 may be retrieved, for example, from computer-readable medium 110 (FIG. 1). CPB memory 320 may include a CPB that stores encoded video data (e.g., syntax elements) from the encoded video bitstream. CPB memory 320 may also store video data other than syntax elements of coded pictures, such as temporary data representing output from various units of video decoder 300. DPB 314 generally stores decoded pictures that video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory 320 and DPB 314 may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300 or off-chip relative to those components.

[0172] Additionally or alternatively, in some examples, video decoder 300 may retrieve coded video data from memory 120 (FIG. 1). That is, memory 120 may store data such as those discussed above for CPB memory 320. Similarly, memory 120 may store instructions to be executed by video decoder 300 when some or all of the functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300.

[0173] The various units shown in FIG. 7 are presented to aid in understanding the operations performed by video decoder 300. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. As with FIG. 6, fixed-function circuits refer to circuits that provide a specific function and have predefined operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and offer flexibility in the operations that can be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by the software or firmware instructions. While a fixed-function circuit may execute software instructions (e.g., receive parameters or output parameters), the types of operations that the fixed-function circuit performs are generally invariant. In some examples, one or more of the units may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units may be integrated circuits.

[0174] Video decoder 300 may include a programmable core formed from ALUs, EFUs, digital circuits, analog circuits, and / or programmable circuits. In examples where the operations of video decoder 300 are performed by software executing on programmable circuits, on-chip or off-chip memory may store software instructions (e.g., object code) that video decoder 300 receives and executes.

[0175] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to recover the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0176] Generally, video decoder 300 reconstructs a picture on a block-by-block basis. Video decoder 300 may perform a reconstruction operation on each block individually (the block currently being reconstructed, i.e., decoded, may be referred to as the “current block”).

[0177] The entropy decoding unit 302 may entropy decode syntax elements that define the quantized transform coefficients of the quantized transform coefficient block as well as transform information, such as a quantization parameter (QP) and / or a transform mode indication(s). The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine the degree of quantization, and similarly the degree of inverse quantization, that the inverse quantization unit 306 should apply. The inverse quantization unit 306 may, for example, perform a bitwise left-shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0178] After the inverse quantization unit 306 forms the transform coefficient blocks, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient blocks to generate residual blocks associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse transform, or another inverse transform to the transform coefficient blocks.

[0179] Further, prediction processing unit 304 generates a predictive block according to the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 may generate a predictive block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which to retrieve a reference block, as well as a motion vector that identifies the location of the reference block in the reference picture relative to the location of the current block in the current picture. Motion compensation unit 316 may generally perform the inter-prediction process in a manner substantially similar to that described with respect to motion compensation unit 224 (FIG. 6).

[0180] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, intra prediction unit 318 may generate a predictive block according to the intra-prediction mode indicated by the prediction information syntax element. Again, intra prediction unit 318 may generally perform the intra-prediction process in a manner substantially similar to that described with respect to intra prediction unit 226 (FIG. 6). Intra prediction unit 318 may retrieve data of neighboring samples for the current block from DPB 314.

[0181] The reconstruction unit 310 may reconstruct the current block using the predictive block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the predictive block to reconstruct the current block.

[0182] Filter unit 312 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 312 may perform a deblocking operation to reduce blockiness artifacts along the edges of the reconstructed blocks. The operations of filter unit 312 are not necessarily performed in all instances.

[0183] The video decoder 300 may store the reconstructed blocks in the DPB 314. For example, in examples where the operations of the filter unit 312 are not performed, the reconstruction unit 310 may store the reconstructed blocks in the DPB 314. In examples where the operations of the filter unit 312 are performed, the filter unit 312 may store the filtered reconstructed blocks in the DPB 314. As described above, the DPB 314 may provide reference information to the prediction processing unit 304, such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation. Furthermore, the video decoder 300 may output the decoded pictures (e.g., decoded video) from the DPB 314 for later display on a display device, such as the display device 118 of FIG. 1 .

[0184] In this manner, video decoder 300 represents an example of a video decoding device that includes a memory configured to store video data and one or more processing units implemented in a circuit and configured to: receive a first block of video data to be decoded using adaptive affine DMVR; determine to set a first MVD for a first reference picture list to 0; refine a CPMV associated with a second reference picture list to generate a refined CPMV; and decode the first block of video data using the refined CPMV.

[0185] 8 is a flowchart illustrating an example method for encoding a current block in accordance with the techniques of this disclosure. The current block may be or include a current CU. Although described with respect to video encoder 200 (FIGS. 1 and 6), it should be understood that other devices may be configured to implement methods similar to the method of FIG.

[0186] In this example, video encoder 200 first predicts the current block (350). For example, video encoder 200 may form a predictive block for the current block. Video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, video encoder 200 may calculate the difference between the original uncoded block and the predictive block for the current block. Video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Video encoder 200 may then scan the quantized transform coefficients of the residual block (356). During or following the scan, video encoder 200 may entropy code the transform coefficients (358). For example, video encoder 200 may code the transform coefficients using CAVLC or CABAC. Video encoder 200 may then output entropy-coded data for the block (360).

[0187] 9 is a flowchart illustrating an example method for decoding a current block of video data in accordance with the techniques of this disclosure. The current block may be or include a current CU. Although described with respect to video decoder 300 (FIGS. 1 and 7), it should be understood that other devices may be configured to implement methods similar to the method of FIG.

[0188] The video decoder 300 may receive entropy-coded data for the current block, such as entropy-coded prediction information and entropy-coded data for the transform coefficients of the residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy-coded data to determine prediction information for the current block and reconstruct the transform coefficients of the residual block (372). The video decoder 300 may predict the current block, e.g., using the intra-prediction mode or inter-prediction mode indicated by the prediction information for the current block, to calculate a predictive block for the current block (374). The video decoder 300 may then inverse-scan the reconstructed transform coefficients to create a block of quantized transform coefficients (376). The video decoder 300 may then dequantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (378). The video decoder 300 may finally decode the current block by combining the predictive block and the residual block (380).

[0189] 10 is a flowchart illustrating another example method for encoding a current block in accordance with the techniques of this disclosure. The technique of FIG. 10 may be implemented by one or more structural components of video encoder 200, including motion estimation unit 222 and motion compensation unit 224.

[0190] In one example, video encoder 200 may receive a first block of video data to be encoded using adaptive affine decoder-side motion vector refinement (DMVR) (1000). Video encoder 200 may be configured to encode a first syntax element indicating that the first block of video data is to be decoded using adaptive affine DMVR.

[0191] Video encoder 200 may determine to set a first motion vector differential (MVD) for a first reference picture list to 0 (1010). In one example, the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1. In another example, the first MVD is MVD1, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

[0192] In one example, video encoder 200 may encode a second syntax element indicating setting the first MVD for the first reference picture list to 0. The second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1. In another example, to determine to set the first MVD for the first reference picture list to 0, video encoder 200 may determine to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

[0193] Video encoder 200 may be further configured to refine a CPMV associated with a second reference picture list to generate a refined control point motion vector (CPMV) (1020). To refine a CPMV associated with a second reference picture list to generate a refined CPMV, encoder 200 may determine, for each sub-block in a first block of video data, a bilateral matching (BM) cost within a search range of the motion vector, accumulate the BM costs for multiple sub-blocks of the first block of video data to generate an accumulated BM cost, determine a second MVD for the CPMV of the second reference picture list based on the accumulated BM costs, and determine the refined CPMV based on the second MVD. In some examples, video encoder 200 may determine one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

[0194] Video encoder 200 may then encode the first block of video data using the refined CPMV (1030). Video encoder 200 may construct an adaptive affine merge candidate list for the first block of video data, where the adaptive affine merge candidate list differs from the affine merge candidate list for normal affine DMVR mode. In one example, the adaptive affine merge candidate list includes only affine merge candidates.

[0195] 11 is a flowchart illustrating another example method for decoding a current block in accordance with the techniques of this disclosure. The technique of FIG. 11 may be implemented by one or more structural components of the video decoder 300, including the motion compensation unit 316.

[0196] In one example, video decoder 300 may receive a first block of video data to be decoded using adaptive affine decoder-side motion vector refinement (DMVR) (1100). Video decoder 300 may be configured to decode a first syntax element indicating that the first block of video data is to be decoded using adaptive affine DMVR.

[0197] The video decoder 300 may determine to set a first motion vector differential (MVD) for the first reference picture list to 0 (1110). In one example, the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1. In another example, the first MVD is MVD1, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

[0198] In one example, to determine to set the first MVD for the first reference picture list to 0, video decoder 300 may decode a second syntax element indicating to set the first MVD for the first reference picture list to 0. The second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1. In another example, to determine to set the first MVD for the first reference picture list to 0, video decoder 300 may determine to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

[0199] The video decoder 300 may be further configured to refine a CPMV associated with the second reference picture list to generate a refined control point motion vector (CPMV) (1120). To refine a CPMV associated with the second reference picture list to generate the refined CPMV, the video decoder 300 may determine, for each sub-block in the first block of video data, a bilateral matching (BM) cost within a search range of the motion vector, accumulate the BM costs for multiple sub-blocks of the first block of video data to generate an accumulated BM cost, determine a second MVD for the CPMV of the second reference picture list based on the accumulated BM costs, and determine the refined CPMV based on the second MVD. In some examples, the video decoder 300 may determine one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

[0200] The video decoder 300 may then decode the first block of video data using the refined CPMV (1130). The video decoder 300 may construct an adaptive affine merge candidate list for the first block of video data, where the adaptive affine merge candidate list differs from the affine merge candidate list for normal affine DMVR mode. In one example, the adaptive affine merge candidate list includes only affine merge candidates.

[0201] The following numbered clauses illustrate one or more aspects of the devices and techniques described in this disclosure.

[0202] Aspect 1A - A method for coding video data, comprising: receiving a first block of video data to be coded using adaptive affine decoder-side motion vector refinement (DMVR); determining to set a first motion vector differential (MVD) for a first reference picture list to 0; refining a CPMV associated with a second reference picture list to generate a refined control point motion vector (CPMV); and coding the first block of video data using the refined CPMV.

[0203] Example 2A - The method of example 1A, wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

[0204] Example 3A - The method of example 1A, wherein the first MVD is MVD1, the first reference picture list is Reference Picture List 1, the second MVD is MVD0, and the second reference picture list is Reference Picture List 0.

[0205] Embodiment 4A - A method according to any one of embodiments 1A to 3A, wherein refining a CPMV associated with a second reference picture list using a second MVD to generate a refined CPMV includes: determining, for each sub-block in a first block of video data, a bilateral matching (BM) cost within a search range of a motion vector; accumulating the BM costs; determining a second MVD for the CPMV of the second reference picture list based on the accumulated BM costs; and determining a refined CMPV from the second MVD.

[0206] Example 5A - The method of any one of examples 1A to 4A, wherein determining to set the first MVD for the first reference picture list to 0 includes coding a syntax element indicating to set the first MVD for the first reference picture list to 0.

[0207] Aspect 6A - A method according to any one of aspects 1A to 4A, wherein determining to set the first MVD for the first reference picture list to 0 includes determining to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

[0208] Embodiment 7A - The method of any one of embodiments 1A-6A, further comprising constructing an affine merge candidate list based on conditions for affine DMVR.

[0209] Embodiment 8A - The method of any one of embodiments 1A-7A, further comprising determining one or more of a search pattern, a search range, or a cost metric for the adaptive affine DMVR.

[0210] Embodiment 9A - The method of any one of embodiments 1A-8A, wherein the coding includes decoding.

[0211] Embodiment 10A - The method of any one of embodiments 1A-8A, wherein coding comprises encoding.

[0212] Aspect 11A - A device for coding video data, the device comprising one or more means for performing the method according to any one of aspects 1A to 10A.

[0213] Embodiment 12A - The device of embodiment 11A, wherein the one or more means comprise one or more processors implemented in the circuitry.

[0214] Embodiment 13A - The device of embodiment 11A or 12A, further comprising a memory for storing video data.

[0215] Embodiment 14A - The device of any one of embodiments 11A-13A, further comprising: a display configured to display the decoded video data.

[0216] Aspect 15A - The device of any one of Aspects 11A to 14A, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0217] Example 16A - The device of any one of Examples 11A to 15A, wherein the device includes a video decoder.

[0218] Example 17A - The device of any one of Examples 11A to 16A, wherein the device comprises a video encoder.

[0219] Aspect 18A - A computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors to perform a method described in any one of Aspects 1A-10A.

[0220] Aspect 1B - A method for decoding video data, comprising: receiving a first block of video data to be decoded using adaptive affine decoder-side motion vector refinement (DMVR); determining to set a first motion vector differential (MVD) for a first reference picture list to 0; refining a CPMV associated with a second reference picture list to generate a refined control point motion vector (CPMV); and decoding the first block of video data using the refined CPMV.

[0221] Aspect 2B - The method of aspect 1B, wherein refining a CPMV associated with a second reference picture list to generate a refined CPMV includes: determining a bilateral matching (BM) cost within a search range of a motion vector for each sub-block in a first block of video data; accumulating BM costs for multiple sub-blocks of the first block of video data to generate an accumulated BM cost; determining a second MVD for the CPMV of the second reference picture list based on the accumulated BM costs; and determining a refined CPMV based on the second MVD.

[0222] Embodiment 3B - The method of embodiment 2B, wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

[0223] Embodiment 4B - The method of embodiment 2B, wherein the first MVD is MVD1, the first reference picture list is Reference Picture List 1, the second MVD is MVD0, and the second reference picture list is Reference Picture List 0.

[0224] Embodiment 5B - The method of any one of embodiments 1B to 4B, further comprising: decoding a first syntax element indicating that the first block of video data should be decoded using adaptive affine DMVR.

[0225] Aspect 6B - The method of aspect 5B, wherein determining to set the first MVD for the first reference picture list to 0 includes decoding a second syntax element indicating to set the first MVD for the first reference picture list to 0.

[0226] Embodiment 7B - The method of embodiment 6B, wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

[0227] Example 8B - The method of any one of Examples 1B to 7B, further comprising constructing an adaptive affine merge candidate list for the first block of video data, wherein the adaptive affine merge candidate list is different from the affine merge candidate list for the normal affine DMVR mode.

[0228] Embodiment 9B - The method of embodiment 8B, wherein the adaptive affine merge candidate list includes only affine merge candidates.

[0229] Embodiment 10B - The method of any one of embodiments 1B to 9B, further comprising determining one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

[0230] Aspect 11B - The method of aspect 1B, wherein determining to set the first MVD for the first reference picture list to 0 includes determining to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

[0231] Embodiment 12B - The method of any one of embodiments 1B to 11B, further comprising: displaying a picture including the first block of video data.

[0232] Aspect 13B - An apparatus configured to decode video data, comprising: a memory; and one or more processors in communication with the memory, wherein the one or more processors are configured to: receive a first block of video data to be decoded using adaptive affine decoder-side motion vector refinement (DMVR); determine to set a first motion vector differential (MVD) for a first reference picture list to 0; refine a CPMV associated with a second reference picture list to generate a refined control point motion vector (CPMV); and decode the first block of video data using the refined CPMV.

[0233]

[0063] Embodiment 14B - The apparatus described in embodiment 13B, further configured to: refine a CPMV associated with a second reference picture list to generate a refined CPMV; for each sub-block in a first block of video data, determine a bilateral matching (BM) cost within a search range of the motion vector; accumulate BM costs for multiple sub-blocks of the first block of video data to generate an accumulated BM cost; determine a second MVD for the CPMV of the second reference picture list based on the accumulated BM cost; and determine a refined CPMV based on the second MVD.

[0234] Example 15B - The apparatus of example 14B, wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

[0235] Example 16B - The apparatus of example 14B, wherein the first MVD is MVD1, the first reference picture list is Reference Picture List 1, the second MVD is MVD0, and the second reference picture list is Reference Picture List 0.

[0236]

[0047] Example 17B - The apparatus of any one of Examples 13B to 16B, wherein the one or more processors are further configured to decode a first syntax element indicating that the first block of video data is to be decoded using adaptive affine DMVR.

[0237] Example 18B - The apparatus described in Example 17B, wherein, to determine to set the first MVD for the first reference picture list to 0, the one or more processors are further configured to decode a second syntax element indicating to set the first MVD for the first reference picture list to 0.

[0238]

[0041] Example 19B - The apparatus of example 18B, wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

[0239] Example 20B - The apparatus of any one of Examples 13B to 19B, wherein the one or more processors are further configured to construct an adaptive affine merge candidate list for the first block of video data, the adaptive affine merge candidate list being different from the affine merge candidate list for the normal affine DMVR mode.

[0240] Embodiment 21B - The apparatus of embodiment 20B, wherein the adaptive affine merge candidate list includes only affine merge candidates.

[0241] Example 22B - The apparatus of any one of Examples 13B to 21B, wherein the one or more processors are further configured to determine one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

[0242] Example 23B - The apparatus described in Example 13B, wherein, to determine to set the first MVD for the first reference picture list to 0, the one or more processors are further configured to determine to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

[0243] Embodiment 24B - The apparatus of any one of embodiments 13B to 23B, further comprising: a display configured to display a picture including the first block of video data.

[0244] Aspect 25B - A method for encoding video data, comprising: receiving a first block of video data to be encoded using adaptive affine decoder-side motion vector refinement (DMVR); determining to set a first motion vector differential (MVD) for a first reference picture list to 0; refining a CPMV associated with a second reference picture list to generate a refined control point motion vector (CPMV); and encoding the first block of video data using the refined CPMV.

[0245] Embodiment 26B - The method described in embodiment 25B, wherein refining a CPMV associated with a second reference picture list to generate a refined CPMV includes: determining a bilateral matching (BM) cost within a search range of a motion vector for each sub-block in a first block of video data; accumulating BM costs for multiple sub-blocks of the first block of video data to generate an accumulated BM cost; determining a second MVD for the CPMV of the second reference picture list based on the accumulated BM costs; and determining a refined CPMV based on the second MVD.

[0246] Example 27B - The method of example 26B, wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

[0247] Example 28B - The method of example 26B, wherein the first MVD is MVD1, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

[0248] Embodiment 29B - The method of any one of embodiments 25B to 28B, further comprising: encoding a first syntax element indicating that the first block of video data should be decoded using adaptive affine DMVR.

[0249] Embodiment 30B - The method of embodiment 29B, further comprising: encoding a second syntax element indicating that the first MVD for the first reference picture list is set to 0.

[0250] Embodiment 31B - The method of embodiment 30B, wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

[0251] Example 32B - The method of any one of examples 25B to 31B, further comprising constructing an adaptive affine merge candidate list for the first block of video data, wherein the adaptive affine merge candidate list is different from the affine merge candidate list for the normal affine DMVR mode.

[0252] Embodiment 33B - The method of embodiment 32B, wherein the adaptive affine merge candidate list includes only affine merge candidates.

[0253] Embodiment 34B - The method of any one of embodiments 25B to 33B, further comprising determining one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

[0254] Aspect 35B - The method described in aspect 25B, wherein determining to set the first MVD for the first reference picture list to 0 includes determining to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

[0255] Embodiment 36B - The method of any one of embodiments 25B to 35B, further comprising: displaying a picture including the first block of video data.

[0256] Aspect 37B - An apparatus configured to encode video data, comprising: a memory; and one or more processors in communication with the memory, wherein the one or more processors are configured to: receive a first block of video data to be encoded using adaptive affine decoder-side motion vector refinement (DMVR); determine to set a first motion vector differential (MVD) for a first reference picture list to 0; refine a CPMV associated with a second reference picture list to generate a refined control point motion vector (CPMV); and encode the first block of video data using the refined CPMV.

[0257] Embodiment 38B - The apparatus described in embodiment 37B, further configured to: refine a CPMV associated with a second reference picture list to generate a refined CPMV; determine a bilateral matching (BM) cost within a search range of a motion vector for each sub-block in a first block of video data; accumulate BM costs for multiple sub-blocks of the first block of video data to generate an accumulated BM cost; determine a second MVD for the CPMV of the second reference picture list based on the accumulated BM cost; and determine a refined CPMV based on the second MVD.

[0258] Example 39B - The apparatus of example 38B, wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

[0259] Example 40B - The apparatus of example 38B, wherein the first MVD is MVD1, the first reference picture list is Reference Picture List 1, the second MVD is MVD0, and the second reference picture list is Reference Picture List 0.

[0260]

[0047] Example 41B - The apparatus of any one of examples 37B to 40B, wherein the one or more processors are further configured to encode a first syntax element indicating that the first block of video data is to be decoded using adaptive affine DMVR.

[0261] Example 42B - The apparatus described in example 41B, wherein the one or more processors are further configured to encode a second syntax element indicating that the first MVD for the first reference picture list is set to 0.

[0262]

[0081] Example 43B - The apparatus of example 42B, wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

[0263] Example 44B - The apparatus of any one of Examples 37B to 43B, wherein the one or more processors are further configured to construct an adaptive affine merge candidate list for the first block of video data, the adaptive affine merge candidate list being different from the affine merge candidate list for the normal affine DMVR mode.

[0264] Embodiment 45B - The apparatus of embodiment 44B, wherein the adaptive affine merge candidate list includes only affine merge candidates.

[0265] Embodiment 46B - The apparatus of any one of embodiments 37B to 45B, wherein the one or more processors are further configured to determine one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

[0266] Aspect 47B - The apparatus described in aspect 37B, wherein, to determine to set the first MVD for the first reference picture list to 0, the one or more processors are further configured to determine to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

[0267] Embodiment 48B - The apparatus of any one of embodiments 37B to 47B, further comprising: a camera configured to capture a picture including the first block of video data.

[0268] It should be recognized that, in some examples, certain acts or events of any of the techniques described herein may be performed in a different order, added, merged, or omitted entirely (e.g., not all described acts or events may be required to practice the techniques). Moreover, in certain examples, acts or events may be performed in parallel rather than sequentially, for example, through multithreading, interrupt processing, or multiple processors.

[0269] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted via a computer-readable medium as one or more instructions or code and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which correspond to tangible media such as data storage media, or communication media, including any medium that facilitates transfer of a computer program from one place to another, for example, according to a communications protocol. As such, computer-readable media may generally correspond to (1) tangible computer-readable storage media that is non-transitory, or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures to implement the techniques described in this disclosure. A computer program product may include a computer-readable medium.

[0270] By way of example, and not limitation, such computer-readable storage media may include one or more of RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included within the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but instead cover non-transitory tangible storage media. As used herein, disk and disc include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc, where disks typically reproduce data magnetically, while discs reproduce data optically using a laser. Combinations of the above should also be included within the scope of computer-readable media.

[0271] The instructions may be executed by one or more processors, such as one or more DSPs, general-purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry. Accordingly, as used herein, the terms "processor" and "processing circuitry" may refer to any of the above structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided in dedicated hardware and / or software modules configured for encoding and decoding, or may be incorporated into a combined codec. It is also possible for these techniques to be implemented entirely in one or more circuits or logic elements.

[0272] The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units have been described in this disclosure to highlight functional aspects of devices configured to implement the disclosed techniques, but they do not necessarily require realization by different hardware units. Rather, as described above, the various units may be combined in a codec hardware unit or may be provided by a collection of interoperable hardware units, including one or more processors as described above, in conjunction with suitable software and / or firmware.

[0273] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. 1. A method for decoding video data, the method comprising: receiving a first block of video data to be decoded using adaptive affine decoder-side motion vector refinement (DMVR); determining to set a first motion vector differential (MVD) for a first reference picture list to 0; refining a control point motion vector (CPMV) associated with the second reference picture list to generate a refined CPMV; decoding the first block of video data using the refined CPMV; and A method comprising:

2. refining the CPMV associated with the second reference picture list to generate the refined CPMV; determining a bilateral matching (BM) cost within a motion vector search range for each sub-block in the first block of video data; accumulating the BM costs for a plurality of sub-blocks of the first block of video data to generate an accumulated BM cost; determining a second MVD for the CPMV of the second reference picture list based on the accumulated BM cost; determining the refined CPMV based on the second MVD; and The method of claim 1 , comprising:

3. The method of claim 2 , wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

4. The method of claim 2 , wherein the first MVD is MVD1, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

5. decoding a first syntax element indicating that the first block of video data is to be decoded using adaptive affine DMVR; The method of claim 1 further comprising:

6. determining to set the first MVD for the first reference picture list to 0; The method of claim 5 , comprising decoding a second syntax element indicating setting the first MVD for the first reference picture list to 0.

7. The method of claim 6 , wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

8. 2. The method of claim 1, further comprising: constructing an adaptive affine merge candidate list for the first block of video data, the adaptive affine merge candidate list being different from an affine merge candidate list for a normal affine DMVR mode.

9. The method of claim 8 , wherein the adaptive affine merge candidate list includes only affine merge candidates.

10. determining one or more of a search pattern, a search range, or a cost metric to be used to refine the CPMV; The method of claim 1 further comprising:

11. determining to set the first MVD for the first reference picture list to 0; The method of claim 1 , comprising determining to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

12. displaying a picture including the first block of video data; The method of claim 1 further comprising:

13. 1. An apparatus configured to decode video data, comprising: Memory and one or more processors in communication with the memory; wherein the one or more processors: receiving a first block of video data to be decoded using adaptive affine decoder-side motion vector refinement (DMVR); determining to set a first motion vector differential (MVD) for a first reference picture list to 0; refine a control point motion vector (CPMV) associated with the second reference picture list to generate a refined CPMV; decoding the first block of video data using the refined CPMV; The apparatus is configured to:

14. to refine the CPMV associated with the second reference picture list to generate the refined CPMV, the one or more processors: determining a bilateral matching (BM) cost within a motion vector search range for each sub-block in the first block of video data; accumulating the BM costs for a plurality of sub-blocks of the first block of video data to generate an accumulated BM cost; determining a second MVD for the CPMV of the second reference picture list based on the accumulated BM cost; determining the refined CPMV based on the second MVD; 14. The apparatus of claim 13, further configured to:

15. The apparatus of claim 14 , wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

16. The apparatus of claim 14 , wherein the first MVD is MVD1, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

17. the one or more processors:

14. The apparatus of claim 13, further configured to decode a first syntax element indicating that the first block of video data is to be decoded using adaptive affine DMVR.

18. To determine to set the first MVD for the first reference picture list to 0, the one or more processors:

20. The apparatus of claim 17, further configured to decode a second syntax element indicating setting the first MVD for the first reference picture list to 0.

19. The apparatus of claim 18 , wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

20. the one or more processors:

14. The apparatus of claim 13, further configured to construct an adaptive affine merge candidate list for the first block of video data, the adaptive affine merge candidate list being different from an affine merge candidate list for a normal affine DMVR mode.

21. The apparatus of claim 20 , wherein the adaptive affine merge candidate list includes only affine merge candidates.

22. the one or more processors: The apparatus of claim 13 , further configured to determine one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

23. To determine to set the first MVD for the first reference picture list to 0, the one or more processors: The apparatus of claim 13 , further configured to determine to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

24. The apparatus of claim 13 , further comprising a display configured to display a picture including the first block of video data.

25. 1. A method for encoding video data, comprising: receiving a first block of video data to be encoded using adaptive affine decoder-side motion vector refinement (DMVR); determining to set a first motion vector differential (MVD) for a first reference picture list to 0; refining a control point motion vector (CPMV) associated with the second reference picture list to generate a refined CPMV; encoding the first block of video data using the refined CPMV; and A method comprising:

26. refining the CPMV associated with the second reference picture list to generate the refined CPMV; determining a bilateral matching (BM) cost within a motion vector search range for each sub-block in the first block of video data; accumulating the BM costs for a plurality of sub-blocks of the first block of video data to generate an accumulated BM cost; determining a second MVD for the CPMV of the second reference picture list based on the accumulated BM cost; determining the refined CPMV based on the second MVD; and 26. The method of claim 25, comprising:

27. 27. The method of claim 26, wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

28. 27. The method of claim 26, wherein the first MVD is MVD1, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

29. encoding a first syntax element indicating that the first block of video data should be decoded using adaptive affine DMVR; 26. The method of claim 25, further comprising:

30. encoding a second syntax element indicating setting the first MVD for the first reference picture list to 0; 30. The method of claim 29, further comprising:

31. 31. The method of claim 30, wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

32. 26. The method of claim 25, further comprising constructing an adaptive affine merge candidate list for the first block of video data, the adaptive affine merge candidate list being different from an affine merge candidate list for a normal affine DMVR mode.

33. 33. The method of claim 32, wherein the adaptive affine merge candidate list includes only affine merge candidates.

34. determining one or more of a search pattern, a search range, or a cost metric to be used to refine the CPMV; 26. The method of claim 25, further comprising:

35. determining to set the first MVD for the first reference picture list to 0; 26. The method of claim 25, comprising: determining to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

36. displaying a picture including the first block of video data; 26. The method of claim 25, further comprising:

37. 1. An apparatus configured to encode video data, comprising: Memory and one or more processors in communication with the memory; wherein the one or more processors: receiving a first block of video data to be encoded using adaptive affine decoder-side motion vector refinement (DMVR); determining to set a first motion vector differential (MVD) for a first reference picture list to 0; refine a control point motion vector (CPMV) associated with the second reference picture list to generate a refined CPMV; encoding the first block of video data using the refined CPMV; The apparatus is configured to:

38. to refine the CPMV associated with the second reference picture list to generate the refined CPMV, the one or more processors: determining a bilateral matching (BM) cost within a motion vector search range for each sub-block in the first block of video data; accumulating the BM costs for a plurality of sub-blocks of the first block of video data to generate an accumulated BM cost; determining a second MVD for the CPMV of the second reference picture list based on the accumulated BM cost; determining the refined CPMV based on the second MVD; 38. The apparatus of claim 37, further configured to:

39. 39. The apparatus of claim 38, wherein the first MVD is MVD0, the first reference picture list is reference picture list 0, the second MVD is MVD1, and the second reference picture list is reference picture list 1.

40. 39. The apparatus of claim 38, wherein the first MVD is MVD1, the first reference picture list is reference picture list 1, the second MVD is MVD0, and the second reference picture list is reference picture list 0.

41. the one or more processors:

38. The apparatus of claim 37, further configured to encode a first syntax element indicating that the first block of video data is to be decoded using adaptive affine DMVR.

42. the one or more processors:

42. The apparatus of claim 41, further configured to encode a second syntax element indicating that the first MVD for the first reference picture list is set to 0.

43. 43. The apparatus of claim 42, wherein the second syntax element indicates whether the first reference picture list is reference picture list 0 or reference picture list 1.

44. the one or more processors:

38. The apparatus of claim 37, further configured to construct an adaptive affine merge candidate list for the first block of video data, the adaptive affine merge candidate list being different from an affine merge candidate list for a normal affine DMVR mode.

45. 45. The apparatus of claim 44, wherein the adaptive affine merge candidate list includes only affine merge candidates.

46. the one or more processors:

38. The apparatus of claim 37, further configured to determine one or more of a search pattern, a search range, or a cost metric used to refine the CPMV.

47. To determine to set the first MVD for the first reference picture list to 0, the one or more processors:

38. The apparatus of claim 37, further configured to determine to set the first MVD for the first reference picture list to 0 based on a template matching cost or a bilateral matching cost.

48. a camera configured to capture a picture including said first block of video data; 38. The apparatus of claim 37, further comprising:

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