Inverter with intermediate circuit center and method for measuring insulation resistance with controlled asymmetry

Abstract

The present application relates to a method for operating an inverter (10) configured to exchange power between a DC side and an AC side. The inverter (10) comprises a bridge circuit (12) and a divided intermediate circuit (14) arranged between the DC side and the bridge circuit (12) and having at least two partial capacitances. The method includes the steps of: generating a first asymmetry of the partial capacitances relative to each other to generate a first potential position of the DC potential of the partial capacitances of the intermediate circuit (14) relative to ground potential; and setting the first potential position of the DC potential of the partial capacitances of the intermediate circuit (14) to a first set value by varying the asymmetry, where the first set value is constant for a first period of time or is modulated at a frequency not greater than 1 / 100 of the AC frequency of the exchanged power. The present application also relates to uses of this method and the inverter.

Description

[Technical Field]

[0001] The present application relates to a method for operating an inverter configured to transfer power between a DC side (DC: direct current / direct current voltage) and an AC side (AC: alternating current / alternating current voltage), and to a method for measuring insulation resistance using this method, and to the inverter. [Background technology]

[0002] An inverter is a power electronic device that can convert electrical power from DC to AC and vice versa. When converting AC to DC, the inverter acts as a rectifier. When operating a DC power source connected to the DC side of the inverter, it may be desirable and / or necessary for safety reasons to measure the insulation resistance of the DC power source, especially if the inverter can be connected to an AC network on the AC side.

[0003] Various devices and methods are known for measuring the insulation resistance of a DC power source connected to the DC side of an inverter relative to ground potential. Here, a DC power source generally refers to an electrical device that operates on a DC voltage and can supply and / or receive power in the form of DC current, i.e., can operate as a source and / or load. Examples of DC power sources include photovoltaic generators, batteries (especially vehicle batteries), DC buses, electrolyzers, and fuel cells. The main feature of such insulation resistance measurement methods is to intentionally shift the potential of the DC power source relative to ground potential and detect the resulting ground current at different potential shift values. The ground current can be detected directly by a current sensor in the DC line on the DC side between the inverter and the DC power source, or indirectly by a voltage sensor on a suitably positioned resistor, either in the DC line on the DC side between the inverter and the DC power source or in the AC side output of the connected inverter.

[0004] A DC power source can be connected to an AC network via an inverter to supply power to or draw power from the AC network. If the inverter is electrically isolated between its DC and AC sides, for example, via a transformer, a potential shift on the DC side can, in principle, be performed independently of the AC side. However, if the inverter is not electrically isolated between its DC and AC sides, especially if it is designed as a transformerless inverter, the potentials on the DC side and the AC side are usually electrically connected to each other, and therefore a potential shift on the DC side cannot be easily performed without electrically isolating the inverter from the AC network on the AC side.

[0005] In order to effectively distinguish between resistive ground currents and capacitive leakage currents using measurement techniques, it is advantageous to make the DC side potential shift as low frequency as possible or quasi-steady (e.g., raising the DC side potential relative to ground and holding it there for a few seconds, then lowering it relative to ground and holding it there for a few seconds), in which case the change in the potential position of the DC power supply is, for example, a few volts to a few tens of volts, for a DC voltage of, for example, a few hundred volts.

[0006] WO 2014 / 079775 A1 proposes applying a zero-sequence system to the AC output voltages provided by the half bridges of an inverter for each phase of an AC network. In a so-called two-level topology, where the intermediate circuit on the DC side of the inverter is designed as a two-pole circuit (i.e., has only two voltage levels and does not have a center tap connected to the inverter bridge), the value of this zero-sequence system directly corresponds to the potential shift of the DC source connected to the DC side of the inverter relative to ground. However, this method is not applicable to multilevel inverters with split intermediate circuits. This is because, in particular, if the center tap of the intermediate circuit is temporarily connected to the switching node of the half bridge at a certain time, applying the zero-sequence system would result in uneven loading of the partial capacitances of the split intermediate circuit. This method is also not applicable to inverters where the center tap of the split intermediate circuit is connected to the neutral conductor, since, naturally, the zero-sequence system cannot be applied there.

[0007] DE 10 2020103 839 A1 describes a circuit arrangement for balancing a split DC voltage intermediate circuit arranged between two DC terminals. Summary of the Invention

[0008] the purpose The object of the present application is to provide a method for operating a multilevel inverter and a multilevel inverter including a divided intermediate circuit, in which the insulation resistance on the DC side can be measured by a potential shift on the DC side.

[0009] solution This object is achieved by a method comprising the features of claim 1, by use of the method according to claim 11, and by an inverter comprising the features of claim 12. Embodiments are set out in the dependent claims.

[0010] explanation The inverter is configured to exchange power between a DC side and an AC side. The inverter includes a bridge circuit and a split intermediate circuit arranged between the DC side and the bridge circuit and including at least two partial capacitances. The bridge circuit includes semiconductor switches and can convert DC power to AC power and / or vice versa. A method for operating the inverter includes: - generating a first asymmetry of the partial capacitances relative to one another to generate a first potential position of the DC potential of the partial capacitances of the intermediate circuit relative to ground potential; - setting a first potential position of the DC potential of the partial capacitance of the intermediate circuit to a first set value by varying the asymmetry, the first set value being constant for a first period of time or modulated at a frequency not greater than 1 / 100 of the AC frequency of the exchanged power.

[0011] The resulting asymmetry leads to a shift in the potential of the inverter's DC terminals relative to ground, resulting in, among other things, a change in the ground current. This change can be used to measure the insulation resistance of the DC power source relative to ground. Setting the first potential position to a first preset value establishes a quasi-steady state that ensures correct measurements taking into account the associated capacitances. It is advantageous to keep the voltages of the partial capacitances higher than the peak voltages of the AC network that can be connected to the AC side of the inverter, so that the inverter continues to generate AC voltage and exchange power with the AC network in the desired form and quality.

[0012] The low frequency modulation of the first setpoint allows sufficient time for measuring the insulation resistance characteristics of the inverter and / or the system in which the inverter is located, in particular the ground current and the insulation resistance to ground.

[0013] An intermediate circuit with two partial capacitances includes a center, which can be connected to ground potential by bringing it out of the device and connecting it to an AC network, particularly as the neutral conductor of an inverter. The partial capacitance is located between the center and a DC terminal on the DC side. The other partial capacitance is located between the center and another DC terminal on the DC side. In an intermediate circuit with three or more partial capacitances connected in series, the total capacitance of the intermediate circuit between the two DC terminals is divided accordingly among the partial capacitances. An intermediate circuit with three or more partial capacitances can have more intermediate taps between its two DC terminals and a center that can be connected to ground potential. In an intermediate circuit with its center connected to ground potential, half of the partial capacitance is connected in series between the center and one of the DC terminals, and the other half of the partial capacitance is connected in series between the center and the other DC terminal. Thus, such an intermediate circuit can have a DC connection with a positive voltage relative to ground potential and a DC connection with a corresponding negative voltage of the same magnitude, provided that they are symmetrical.

[0014] The DC connection of the intermediate circuit can be connected to the DC connection of the DC side of the inverter and thus to a DC power source connected to the DC side of the inverter. One or both terminals of the DC side of the inverter can be connected to the respective DC terminals of the intermediate circuit, either directly or via a DC / DC converter, so that a fixed potential reference is established between the terminals of the DC input and the terminals of the intermediate circuit. If a split intermediate circuit includes a midpoint between its DC terminals and this midpoint is connected to ground potential, the two DC terminals of a symmetrical intermediate circuit are at respective potentials symmetrical to each other with respect to ground potential, one with a positive sign and the other with a negative sign.

[0015] According to the described method, the asymmetry between the partial capacitances of the intermediate circuit makes it possible to shift the potential position of the DC connections of the intermediate circuit. If two partial capacitances of an intermediate circuit are charged asymmetrically and the central potential position is kept at ground potential, the total potential of the intermediate circuit shifts relative to ground potential, and the potentials of its two DC connections also shift relative to an intermediate circuit with symmetrically charged partial capacitances. The same applies if there are three or more partial capacitances. In that case, the total potential of the intermediate circuit, and therefore the potentials of its DC connections, also shifts relative to ground potential due to the asymmetry of the intermediate circuit.

[0016] The divided intermediate circuit is shifted to a first potential level by setting a first asymmetry in the intermediate circuit. This first potential level is adjusted to a first set value by varying the asymmetry, and is either kept constant by maintaining the first set value for a first period of time, or is modulated at a specific frequency, which is small, less than 1 / 100th of the AC frequency of the inverter's AC side.

[0017] In one embodiment, the method further comprises: generating a second asymmetry or symmetry of the partial capacitances relative to one another to generate a second potential position of the DC potential of the partial capacitances of the intermediate circuit relative to ground potential.

[0018] A second asymmetry of the intermediate circuit can have an opposite sign to the first asymmetry, and the second potential position can be set to a second set value for a second time period. Instead of the second asymmetry, the symmetry of the intermediate circuit can be set for the second time period by setting the asymmetry set value to zero.

[0019] Such targeted generation of the first and / or second potential positions of the divided intermediate circuit makes it possible to carry out targeted measurements on the inverter, in particular current and / or voltage measurements, which are suitable for determining the insulation resistance by calculating the set voltage and the measured current in a known manner.

[0020] In one embodiment of the method involving modulation of the first potential position, the modulated first set value of the potential position is set by adjusting the asymmetry with a change in sign. For example, the asymmetry can have different half-waves with different signs. The modulation of the first set value can have various forms, for example, a sinusoidal waveform.

[0021] This method makes it possible to induce a potential shift on the DC side of the inverter, and thus on the DC power supply, which can be used to determine the insulation resistance, either alone or in combination with the quasi-stationary asymmetry of the divided intermediate circuit of the inverter. For this purpose, the divided intermediate circuit is intentionally brought into an asymmetric state, whereby the set potential position is either maintained quasi-stationarily, i.e., kept constant for at least about one or a few seconds, or is modulated at a very low frequency, i.e., a frequency much lower than the mains frequency, in particular below 1 Hz, so that the time course of the potential position has sufficiently long periods of quasi-stationary values, especially at the extremes of the modulation function used.

[0022] To more effectively detect complex insulation resistances (i.e., insulation resistances that are composed of a network of resistances, capacitances, and inductances and therefore have different real and imaginary parts at different frequencies), it is preferable to sinusoidally modulate the setpoint of the potential position. Particularly preferably, the setpoint of the potential position can be modulated successively with sinusoidal functions of different frequencies, thereby determining not only the real and imaginary parts of the insulation resistance at a specific frequency, but also the underlying component values ​​of resistance, capacitance, and inductance. Alternatively, sinusoidal functions of different frequencies can be superimposed when modulating the setpoint, and thus the potential position.

[0023] This method can be carried out by balancing control of the partial capacitances of the intermediate circuit, by setting the setpoint for the balancing control to a desired first or second setpoint, a so-called asymmetric setpoint (e.g. 50 volts), as opposed to the normal value of zero (= symmetric intermediate circuit).

[0024] For example, the first and / or second potential positions can be set to a set value by creating and varying the first and / or second asymmetry by directly redistributing the charge in the divided intermediate circuit. This can be done, for example, by a balancing circuit, in particular a DC / DC converter connected to the intermediate circuit. The balancing circuit transfers charge between the partial capacitances of the intermediate circuit.

[0025] If the asymmetry is caused by a direct redistribution of charge, the potential position at the terminals of the intermediate circuit is determined solely by the asymmetry of the intermediate circuit. In this case, instead of controlling the potential position to a set value, the asymmetry can be controlled directly using an equivalent set value (i.e., a set value can be specified and modulated over time due to the asymmetry), and the potential position can be controlled accordingly.

[0026] In many cases, a balancing circuit suitable for direct redistribution is already provided in the inverter. In addition to its actual function of balancing the intermediate circuit, depending on the application, it can also be used to intentionally create an asymmetry in the intermediate circuit. In particular, the asymmetry is set by specifying a first or second setpoint value of the balancing circuit that is not zero. In particular, the first or second setpoint value can also be modulated. This modulation allows the setpoint to take on different values ​​over time.

[0027] Such a method can be implemented, for example, by an inverter including an intermediate circuit balancing circuit by setting the balancing circuit setpoint to a non-zero value. The center of the intermediate circuit can be connected to the N conductor and thus maintained at ground potential, so that the potential of the DC terminals of the intermediate circuit, and therefore the potential of the DC power supply, is shifted according to the set asymmetry compared to a symmetrically charged intermediate circuit. The balancing circuit draws a current from one half of the intermediate circuit and supplies a different current to the other half. These two currents are superimposed with the current exchanged from the intermediate circuit on the DC side and / or through the inverter bridge to form a total current, which, when integrated over time and divided by the capacitance of the intermediate circuit, gives the voltage of each half of the intermediate circuit. By varying the current in the balancing circuit, the total current can be affected, thereby maintaining or changing the asymmetry of the intermediate circuit halves.

[0028] Alternatively or additionally, the asymmetry of the intermediate circuit and the first and / or second potential positions of the DC potential may be created or maintained by interaction with the AC side of the inverter.

[0029] In a multilevel inverter where the center of the intermediate circuit is temporarily connected directly to the switching nodes of the half-bridges, the application of a zero sequence system results in unequal loading of the halves of the intermediate circuit and thus, when integrated over time, an asymmetry of the intermediate circuit occurs.

[0030] In one embodiment of this method, the bridge circuit first generates a first and / or second asymmetry by generating an initialized zero sequence system voltage, where the initialized zero sequence system voltage includes a curve determined by a control process and generates an initial asymmetry in the intermediate circuit. A desired potential position is then set by a stabilized zero sequence system voltage, which, in conjunction with the initial asymmetry caused by the initialized zero sequence system voltage, results in the desired potential position, also including a curve determined by the control process. Specifically, a controller can be used for this purpose to adjust the potential position setpoint by varying the zero sequence system voltage as a manipulated variable. The first and / or second potential positions are then set to the first and / or second setpoints directly on the controller. The initialized zero sequence system voltage and the stabilized zero sequence system voltage have different signs. The inverter bridge can generate the initialized zero sequence system voltage and / or the stabilized zero sequence system voltage by generating a constant voltage offset relative to ground potential on all phase conductors and, optionally, on the N conductor. If a particular inverter with a split intermediate circuit already includes a balancing controller that can reduce the asymmetry by creating an appropriate asymmetric load on one half of the intermediate circuit with the help of a zero-sequence system powered by individual voltages from the bridge branches, the balancing controller can be superimposed on the zero-sequence system depending on the application by giving its setpoint a finite value instead of the usual zero setpoint. The zero-sequence system itself represents the manipulated variable for such a superimposition control and therefore must be compensated for; simply controlling the asymmetry is not sufficient.

[0031] Alternatively or additionally, the initial asymmetry can be generated by asymmetrically initially loading the intermediate circuit, i.e., by exchanging different powers with the partial capacities. However, since the initial asymmetry of the intermediate circuit generated by either the initializing zero sequence system or the asymmetric loading is itself amplified, especially when power from the DC source is input to the intermediate circuit and / or when power is extracted from the intermediate circuit by the inverter and fed to the AC network, it can be stabilized by the stabilizing zero sequence system, so that the desired asymmetry can be kept constant for a first period of time or modulated at a low frequency.

[0032] During operation as a rectifier, i.e. when power is transferred from the AC side to the DC side of the inverter, any initially occurring asymmetry in the intermediate circuit is automatically eliminated during operation. For this reason, the desired asymmetry must be stabilized even during operation as a rectifier.

[0033] The method using the zero-sequence system voltage is preferably used for inverters in which the center of the intermediate circuit is not connected to the N conductor of an AC network connectable to the AC side and no fixed earth reference for the center of the intermediate circuit exists.

[0034] In one embodiment of the method, the zero sequence system voltages for setting the first potential position to the modulated set point are each modulated at a frequency that is less than or equal to 1 / 100th the frequency of the AC switched power.

[0035] In an alternative embodiment, the zero sequence system voltage can be temporarily made substantially constant, particularly during the first and / or second time periods, to establish the first and / or second constant potential positions, particularly as soon as a regulated equilibrium state of the power asymmetrically flowing into and asymmetrically drawn from the intermediate circuit is reached. In this case, "substantially constant" means that the value is constant except for fluctuations to correct the first and / or second potential positions. "Substantially constant" can also be understood to mean that the zero sequence system voltage does not undergo at least a sign change during the first and / or second time periods. This facilitates the respective partial measurements at specific quasi-stationary potential positions.

[0036] Such method embodiments can also be implemented using inverters without an intermediate circuit balancing circuit, for example, by generating a stabilizing zero-sequence system to stabilize the initial asymmetry so that the first and / or second potential positions specified by the setpoints are established. A separate half-bridge can be provided for each inverter output terminal L1, L2, L3, or N. The asymmetry can also be "initialized" by generating an initializing zero-sequence system, where the stabilizing zero-sequence system for stabilizing the potential positions (at least when the inverter is operating) has an opposite sign to the sign of the initializing zero-sequence system for initializing the asymmetry.

[0037] In one embodiment, the first period and / or the second period comprises at least one second, in particular several seconds.

[0038] In one embodiment, the first and / or second potential positions are periodically set to be repeated, in particular at a low frequency, where "low frequency" means a frequency that is 1 / 100th or less of the AC frequency of the inverter's exchanged power.

[0039] This method can be used to measure the insulation resistance of a DC power supply connected to the DC side of an inverter. To do this, a first potential position in the intermediate circuit is established, and a first ground current is measured during a first period or at a point in the first half-wave. A second potential position is then established, and a second ground current is measured during a second period or at a point in the second half-wave of the modulated first potential position. The insulation resistance of the DC side of the inverter is then determined from the established potential positions and the measured ground currents using known calculations.

[0040] Using this method, the DC terminal of the intermediate circuit corresponding to the DC terminal on the DC side of the inverter is set to a first or second potential position, respectively. The DC terminal can be connected to a DC power source. When the DC power source is connected to the DC side of the inverter, the potential position of the DC terminal corresponds to the potential position of the DC terminal of the DC power source. Therefore, this method allows the insulation resistance of a DC power source, e.g., a direct current energy source, particularly a PV generator, on the DC side of the inverter to be continuously determined while the inverter exchanges power between its AC and DC sides, e.g., while supplying power from a connected PV generator to a connected AC network. This increases the safety of the PV system during operation.

[0041] The inverter is configured to transfer power between a DC side and an AC side. The inverter includes a bridge circuit and a split intermediate circuit disposed between the DC side and the bridge circuit and including at least two partial capacitances. The inverter is configured to generate a first potential position of the DC potential of the partial capacitances of the intermediate circuit relative to ground. The first potential position is created by generating a first asymmetry of the partial capacitances relative to each other. The inverter is further configured to set the first potential level to a first set value. The first set value is held constant or modulated at a low frequency for a first period of time. "Low frequency" means a frequency that is one-hundredth or less of the AC frequency of the AC side exchanged power of the inverter.

[0042] The inverter may be further configured to generate a second potential position of the DC potential of the partial capacitances of the intermediate circuit relative to ground by generating a second asymmetry having an opposite sign to the first asymmetry or symmetry of the partial capacitances relative to each other. The inverter may be further configured to set the second potential position to a second set value for a second time period or to set the symmetry of the intermediate circuit to an asymmetry set value of zero for a second time period.

[0043] In one embodiment, the inverter is configured to set the potential position to an adjusted first set value by adjusting the asymmetry with different signs in different half-waves.

[0044] In one embodiment, the inverter comprises a device for redistributing charge in the divided intermediate circuit, which device for redistributing charge can be designed, for example, as a balancing circuit and arranged between the partial capacitances of the intermediate circuit, for example, as a DC / DC converter for transferring charge between the partial capacitances of the intermediate circuit.

[0045] For this reason, asymmetry can be created by means of the DC side of the inverter, and the potential position of the DC potential of the partial capacitance of the intermediate circuit relative to ground can be set according to a set value by exchanging charge between the halves of the intermediate circuit, in particular using a balancing circuit. The center of the intermediate circuit can have a fixed reference to ground, for example by direct or indirect connection to the neutral conductor of the AC network connected to the AC side. If such a fixed potential reference exists between the center of the intermediate circuit and the neutral conductor of the AC network, especially if the connection is direct, it is particularly advantageous to use a balancing circuit in the intermediate circuit to create the asymmetry in the intermediate circuit and set the required potential position.

[0046] In one embodiment, a neutral conductor (N conductor) of the AC network, which can be connected to the AC side via an inverter bridge circuit, is connected to the center of the intermediate circuit between the first partial capacitance and the second partial capacitance of the intermediate circuit.

[0047] In one embodiment, the inverter bridge circuit is configured to generate an initialized zero sequence system voltage that shifts the potential position of the center of the intermediate circuit between the first and second partial capacitances of the intermediate circuit relative to ground, thereby asymmetrically loading the intermediate circuit. Such an initialized zero sequence system voltage can cause an initial asymmetry in the intermediate circuit, but this asymmetry continues to grow, especially if the sign of the initialized zero sequence system remains the same.

[0048] Therefore, the bridge circuit is configured to generate a stabilized zero sequence system voltage, which also shifts the potential position of the center of the intermediate circuit relative to ground potential and loads the intermediate circuit asymmetrically, but preferably with the opposite sign to the initialized zero sequence system voltage. The stabilized zero sequence system voltage influences the first and / or second asymmetry of the intermediate circuit, particularly by setting and stabilizing the potential position to a desired set value. The initialized zero sequence system voltage and the stabilized zero sequence system voltage have different signs, stabilizing the asymmetry of the intermediate circuit when the inverter is operating.

[0049] In the case of an inverter with three or more partial capacitances connected in series, i.e., four or more DC potentials of the intermediate circuit, for example a five-level inverter with a four-part intermediate circuit having five voltage taps, the method can be implemented accordingly by using an existing balancing circuit to create asymmetry and setting the potential positions of the three or more partial capacitances of the intermediate circuit or by creating a zero-sequence system.

[0050] The described method and inverter offer the advantage that embodiments involving charge transfer between at least the partial capacitances can also be applied to inverters in which the center of the intermediate circuit is connected to the N conductor of an AC network. This allows for continuous measurement and permanent monitoring of the insulation resistance of DC power sources connected to the inverter. This is particularly true for transformerless inverters, where monitoring can be performed in a simple, cost-effective, and reliable manner. Embodiments that do not involve charge transfer between the partial capacitances of the intermediate circuit have the additional advantage that no special balancing circuitry is required. [Brief explanation of the drawings]

[0051] The invention will be further explained and described below with reference to exemplary embodiments shown in the drawings. [Figure 1] Figure 1 shows how the inverter operates. [Figure 2] FIG. 2 shows a schematic diagram of an embodiment of an inverter including a connected DC power source and a connected AC network. [Figure 3] FIG. 3 shows a schematic representation of another embodiment of an inverter including a connected DC power source and a connected AC network. [Figure 4] FIG. 4 shows a schematic equivalent circuit diagram of one embodiment of a divided intermediate circuit including a current source. [Figure 5] FIG. 5 shows an exemplary time curve of the voltage on the DC side of the inverter and the zero sequence system voltage when applying the method according to the present application.

[0052] In the drawings, identical or similar elements are designated by the same reference numerals. Representations in the drawings may not be to scale. DETAILED DESCRIPTION OF THE INVENTION

[0053] Figure 1 shows a schematic diagram of the operation of an inverter 10 (see Figures 2 and 3) that can be used in the insulation resistance measurement method. The inverter 10 is configured to transfer power between a DC side and an AC side. The inverter 10 comprises a bridge circuit 12 and a split intermediate circuit 14 that is arranged between the DC side and the bridge circuit 12 and includes at least two partial capacitances.

[0054] In S1, a first potential position of the DC potential of the partial capacitances of the intermediate circuit 14 relative to ground is generated by creating a first asymmetry of the partial capacitances relative to each other, for example by transferring charge between the partial capacitances or by setting a zero-sequence system voltage on the AC side of the inverter 10 (see Figures 2 and 3).

[0055] The split intermediate circuit has a center M, and each partial capacitance is located between center M and a corresponding DC terminal of the intermediate circuit. The DC terminals of the intermediate circuit may correspond to the DC terminals of the DC side of the inverter 10. In the case of a DC power source 18 connected to the DC side, such as a solar generator, each DC potential of the split intermediate circuit corresponds to the potential of the DC terminal of the DC side of the inverter 10, and thus to the potential of the DC terminal of the DC power source 18. If center M is held at ground potential, asymmetry in the intermediate circuit 14, i.e., unequal charges and therefore unequal voltages on the partial capacitances of the split intermediate circuit 14, will result in a shift in the DC potential of the DC terminal of the intermediate circuit 14 relative to ground potential.

[0056] In S2, the first potential position is set to a first set value, which is either held constant for a first period of time or modulated at a frequency not greater than 1 / 100th the AC frequency of the inverter 10's commutating power.

[0057] In an asymmetrically charged divided intermediate circuit 14, where the center M is connected to or held at ground potential, the voltage distribution between the center M and the DC terminals of the intermediate circuit 14 becomes asymmetric. This means that the center M is no longer halfway between the two DC potentials of the DC terminals of the intermediate circuit. Hence the expression "asymmetry of the intermediate circuit 14."

[0058] After setting a first potential position in S2, a first ground current is detected in S3 within a first period during which the first set value is maintained or at a point within a first half-wave of the modulated first set value.

[0059] In S4, a second potential position of the DC potential of the partial capacitances of the intermediate circuit 14 relative to ground is created by creating a second asymmetry in the intermediate circuit, i.e., by creating an asymmetry of the partial capacitances relative to each other. Alternatively, in S4, symmetry in the intermediate circuit is created. Both can be achieved, for example, by transferring charge between parts of the intermediate circuit or by setting a zero-sequence system voltage on the AC side of the inverter 10 (see Figures 2 and 3).

[0060] In S5, the second potential position is set to a second set value having the opposite sign to the first set value for a second period of time, or the symmetry of the intermediate circuit is set to a second set value of zero for a second period of time.

[0061] After setting the second potential position in S5, the ground current is again detected within a second time period in S6. Alternatively, after detecting the first ground current at a time point within a first half-wave of the modulated first setpoint (in S3), the second ground current is detected at a time point within a second half-wave of the modulated first setpoint in S6. Thus, in the case of an asymmetric modulated first setpoint of the intermediate circuit 14, the separate setting of the second potential position in steps S4, S5 can be omitted, and S6 can be performed immediately after S3.

[0062] After S6, in S7, the insulation resistance is calculated from the set potential position and the detected ground current.

[0063] In an embodiment, the insulation resistance measurement method may be performed repeatedly during normal operation of inverter 10. This is indicated by the dashed arrow between S7 and S1 in FIG.

[0064] FIG. 2 shows a schematic diagram of an inverter 10 having a DC power source 18 connected to its DC side and an AC network 16 connected to its AC side. The AC network 16 is a three-phase AC network with a neutral conductor N and includes three AC phases L1, L2, and L3. The inverter 10 includes a bridge circuit 12 that converts direct current to alternating current and / or vice versa. For this purpose, the bridge circuit preferably includes clocked semiconductor switches. In FIG. 2, the bridge circuit is shown as an equivalent circuit diagram with equivalent current sources Q.N, Q.1, Q.2, and Q.3 corresponding to the phases. This equivalent circuit diagram simulates the electrical operation of a properly clocked bridge circuit. In the illustrated example, each phase L1, L2, L3, and N is assigned an equivalent current source. The neutral conductor N is assigned an equivalent current source Q.N. The phase conductor L1 is assigned an equivalent current source Q.1, the phase conductor L2 is assigned an equivalent current source Q.2, and the phase conductor L3 is assigned an equivalent current source Q.3. In one embodiment, each of the equivalent current sources QN, Q.1, Q.2, Q.3 may comprise a bridge circuit, in particular a half-bridge having at least two clocked semiconductor switches.

[0065] The inverter 10 further comprises a split intermediate circuit 14. The split intermediate circuit 14 comprises two partial capacitances and a center M. The center M can optionally be connected on the AC side to the neutral conductor N of the AC network 16 (dashed line in FIG. 2), thereby keeping the center M at ground potential.

[0066] Between the two partial capacitances of the intermediate circuit 14, a DC / DC converter 20 is arranged. This DC / DC converter is configured to transfer charge between the two partial capacitances. The DC / DC converter 20 therefore acts as an equalizer between the two partial capacitances, i.e. it can set as much of an identical charge as possible on the partial capacitances, if required.

[0067] To create asymmetry in the intermediate circuit, charge can be shifted between the partial capacitances via the DC / DC converter 20. Asymmetry means that the halves of the intermediate circuit 14 have different charges. Therefore, in an asymmetric intermediate circuit, the partial capacitances have different voltages. Therefore, the DC / DC converter 20 can function as both a balanced and an unbalanced circuit. By shifting charge between the partial capacitances of the intermediate circuit, asymmetry in the intermediate circuit can be created and the required potential positions can be set. In particular, the DC / DC converter 20 can set the potential positions to a first and / or a second set value. The first set value can also be modulated by appropriately operating the DC / DC converter.

[0068] When an asymmetry is generated, it automatically increases (inverter operation, DC to AC power transfer) or decreases (rectifier operation, AC to DC power transfer) depending on the operating mode of the inverter 10, and must therefore be maintained by a balancing circuit (unbalancing circuit) to maintain the potential position at the desired value. For this purpose, the first or second setting value of the balancing circuit can be set to the desired asymmetry setting value, e.g., 50 volts for a given total voltage of the intermediate circuit of 1000 V, as opposed to a value of zero for a symmetrical intermediate circuit.

[0069] The insulation resistance of the connected DC power supply 18 can be determined by detecting the ground current at each of the first potential location, the second potential location, and / or the intermediate circuit if symmetrical.

[0070] FIG. 3 shows a further embodiment of the inverter 10. In the illustrated example, the intermediate circuit 14 of the inverter 10 does not include a balanced circuit. The center of the split intermediate circuit 14 in the example shown in FIG. 3 is not connected to the neutral conductor N of the AC network 16 and therefore does not have a fixed ground reference. Furthermore, in FIG. 3, the inverter 10 is connected to a DC power source 18 on the DC side and to an AC network 16 on the AC side. The DC power source 18 is, for example, a solar generator. For example, the AC network 16 is a three-phase AC network with a neutral conductor N. The first phase of the AC network is designated L1, the second phase of the AC network is designated L2, and the third phase of the AC network is designated L3.

[0071] The bridge circuit 12 is shown as an electrical equivalent circuit diagram including current sources Q.1, Q.2, Q.3, and Q.N, which are configured to form a zero-sequence system 30 in addition to the normal phase or outer conductor voltages. In the example shown in FIG. 3, the zero-sequence system is represented in the electrical equivalent circuit diagram as a voltage source 30. Setting an initial zero-sequence system voltage can asymmetrically load the intermediate circuit 14, creating an asymmetric state. When the inverter 10 operates in inverter mode, i.e., in an operating mode in which power is transferred from the DC side, e.g., the DC source 18, to the AC side, e.g., the AC network 16, the asymmetry generated by the zero-sequence system 30, for example, is amplified during operation, particularly due to the uneven distribution of DC power flowing from the DC source to the intermediate circuit among the partial capacitances. After setting the initial zero-sequence system voltage, a stabilized zero-sequence system voltage with the opposite sign to the initial zero-sequence system voltage is generated in a second step. As a result, the intermediate circuit is asymmetrically loaded in the opposite direction to the asymmetrically input power on the DC side, and the asymmetry of the intermediate circuit is stabilized so that the potential position is set to a first set value. The second potential position can be set accordingly by further setting an initial zero sequence system voltage and then a stabilized zero sequence system voltage. Alternatively or additionally, the first asymmetry of the intermediate circuit 14, and thus the potential position, can be modulated at a low frequency at a specific time, in particular by modulating the zero sequence system accordingly.

[0072] The asymmetry created by each initialization zero sequence system 30 can be stabilized by the AC side generation of the stabilizing zero sequence system 30, thereby setting the potential position. Asymmetry in the intermediate circuit 14 leads to unequal distribution of input DC power to the partial capacities. Therefore, the stabilizing zero sequence system 30 is created and controlled so that unequal power inflows to the partial capacities (when using DC power sources 18, e.g., PV generators (PV - photovoltaic)) are inversely compensated by unequal power draws from the halves of the intermediate circuit, thereby keeping the asymmetry, and therefore the potential position, constant. This is also called an imbalance controller.

[0073] It should be noted that the creation of the zero sequence system 30 is only possible if the center M is not directly connected to the neutral conductor N.

[0074] Figure 4 shows two equivalent circuit diagrams of an intermediate circuit 14 with a connected three-level half bridge. The left side shows examples of possible switches (here, IGBTs) that can be used to connect the switching node to the left of the inductor to three taps of the intermediate circuit. By appropriately operating the semiconductor switches of the bridge circuit, the operation of the bridge circuit can be generated on the output side, corresponding to the operation of voltage sources Q, Q.1, Q.2, Q.3, and Q.N on the conductors of the AC network. The voltage value of the voltage source is the voltage of one half of the intermediate circuit multiplied by the duty cycle of the associated switch. The load of one half of the intermediate circuit can be represented by a current source, the value of which is the inductor current multiplied by the duty cycle of the switch assigned to that half of the intermediate circuit. By appropriately operating the bridge circuit 12, a zero-sequence system voltage 30 can also be generated. In Figure 4, the right and left half representations are equivalent, each showing an electrical equivalent circuit diagram of the operation of a bridge branch of the bridge circuit 12.

[0075] The creation of the zero sequence system 30 results in a potential shift at center M relative to ground, which is undesirable and counteracts the potential shift caused by the asymmetry. Therefore, the resulting DC potential shift tends to be smaller than the potential shift caused by the intermediate circuit asymmetry alone. Therefore, the initial asymmetry caused by the initializing zero sequence system feed 30 must be larger than the potential shift at center M induced by the stabilizing zero sequence system feed 30, which is necessary to stabilize the asymmetry.

[0076] Three-phase electrical systems can be described by so-called phase shifters. Phase shifters can be divided into symmetrical positive-sequence systems, in which the phase shifter moves with the rotating magnetic field; negative-sequence systems, in which the rotating magnetic field moves in opposite directions; and zero-sequence systems. In zero-sequence systems, phase shifters of different phases have the same length and orientation. Zero-sequence systems occur in asymmetric three-phase systems.

[0077] The embodiment described with reference to Figures 3 and 4 can be used, for example, in an inverter 10 in which the cost of the balancing circuit 20 is disproportionately high and all output terminals, phase conductors L1, L2, L3 and neutral conductor N are each provided by a separate half-bridge of the bridge circuit 12, to supply the conductors of the AC network with the desired zero-sequence system.

[0078] 5 shows, by way of example, the time course of the potential position of the DC potential of the partial capacitance of the intermediate circuit relative to ground potential when carrying out the method according to the present invention for measuring insulation resistance using the zero-sequence system voltage. The curve for the negative DC potential of the intermediate circuit is designated by reference numeral 51, and the curve for the positive DC potential is designated by reference numeral 52. Furthermore, reference numeral 50 denotes the curve for the virtual mid-potential of the intermediate circuit, i.e., the curve for the arithmetic mean between the DC potentials 51, 52. Furthermore, FIG. 5 shows the curve for the zero-sequence system voltage with reference numeral 53 and the curve for the resulting asymmetry of the partial capacitance of the intermediate circuit with reference numeral 54.

[0079] In the initial state at time t=0, the intermediate circuit is in a symmetrical state, i.e. the DC potentials 51, 52 have the same magnitude but different signs, and the virtual central potential 50 corresponds to the reference potential of the system, in particular the ground potential, which by definition has a value of zero.

[0080] The method begins at time t1 with step S1 (see FIG. 1 ), in which a first potential position of the DC potentials 51, 52 of the partial capacitances of the intermediate circuit relative to ground is created by generating a first asymmetry of the partial capacitances relative to each other. To this end, an initialized zero-sequence system is created during the period between t1 and t2 by causing the zero-sequence system voltage 53 to assume a positive value. As a result, the potential position of the entire intermediate circuit first rises, and the DC potentials 51, 52 and the virtual center potential 50 first increase proportionally to the zero-sequence system voltage 53. For a given power exchange from the intermediate circuit to the AC side of the inverter, this increase in potential position causes the intermediate circuit to be asymmetrically loaded, which creates an asymmetry, i.e., a difference, between the values ​​of the DC potentials 51, 52, increasing the asymmetry 54. This is evident from the fact that the virtual center potential 50 exceeds the zero-sequence system voltage 53 by the magnitude of the asymmetry 54.

[0081] At time t2, the asymmetry 54 reaches the target value and the zero sequence system voltage 53 returns to zero because no further asymmetric loading is required by the initialized zero sequence system. Thus, at time t2, a first asymmetry exists and the DC potentials 51, 52 are shifted from their initial state by the magnitude of the asymmetry 54 at time t2.

[0082] The potential positions are then set to the first preset value according to step S2 of FIG. 1. If a zero-sequence system had not been generated after time t2, the existing asymmetry would cause the DC power source to charge the intermediate circuit asymmetrically, increasing asymmetry 54. Therefore, between time t1 and time t2, a stabilized zero-sequence system is generated by setting zero-sequence system voltage 53 to a value with the opposite sign to the initialized zero-sequence system voltage. As a result, the asymmetric power input to the intermediate circuit is mirror-compensated by the asymmetric power output from the intermediate circuit, maintaining a constant asymmetry 54. The stabilized zero-sequence system voltage induces an opposite shift in the potential positions across the intermediate circuit compared to the asymmetry-induced shift, resulting in DC potentials 51 and 52 shifted from their symmetric initial positions by the sum of asymmetry 54 and zero-sequence system voltage 53, which is clearly visible at the virtual center potential 50.

[0083] In the period between t2 and t3, a first measurement of the ground current is performed according to step S3 from FIG. 1 and assigned to a particular value of the DC potential 51, 52 at the stabilized first potential position.

[0084] At time t3, a second potential position of the DC potentials 51, 52 is generated by setting the asymmetry 54 to a value of opposite sign according to step S4 from Fig. 1. For this purpose, an initial zero-sequence system voltage is generated again, and the zero-sequence system voltage 53 takes a negative value, resulting in an overall decrease in the potential position of the intermediate circuit, with the DC potentials 51, 52 and the virtual central potential 50 initially decreasing in proportion to the zero-sequence system voltage 53. This decrease in potential position loads the intermediate circuit asymmetrically and reduces the asymmetry 54.

[0085] At time t4, the asymmetry 54 reaches the target value, and the zero-sequence system voltage 53 returns to zero. Therefore, a second asymmetry exists at time t4, and the DC potentials 51 and 52 are shifted from their initial state by the magnitude of the asymmetry 54 at time t4. Then, according to step S5 of FIG. 1, the potential positions are set to a second set value by generating a stabilized zero-sequence system, i.e., by setting the zero-sequence system voltage 53 to a value having the opposite sign to that of the initialized zero-sequence system between t3 and t4. The stabilized zero-sequence system is controlled by the zero-sequence system voltage 53 so that the asymmetry 54 remains constant. As a result, the second potential positions of the DC potentials 51 and 52 are shifted from their symmetrical initial positions by the sum of the asymmetry 54 and the zero-sequence system voltage 53, and the shift of the second potential position has the opposite sign to that of the shift of the first potential position.

[0086] In the period between t4 and t5, a second measurement of the ground current is performed according to step S6 of FIG. 1 and assigned to a particular value of the DC potential 51, 52 at the stabilized second potential location.

[0087] Based on the ground currents measured at the first and second potential locations, the insulation resistance on the DC side of the inverter can be determined according to step S7 of FIG.

[0088] After the series of measurements is completed at time t5, the intermediate circuit can be put into a symmetrical state and the potential position of the intermediate circuit can be returned to the initial state reached at time t6. Alternatively, the method can be repeated at time t5 or t6 by returning to step S1 of Figure 1. [Explanation of symbols]

[0089] 10 Inverter 12 Bridge Circuit 14 Intermediate circuit 16 AC grid 18 DC power supply 20 DC / DC converters 30 Equivalent voltage source for zero-sequence systems L1, L2, L3 AC phases M Intermediate circuit center N neutral conductor Q.1, Q.2, Q.3, QN, Q network phase equivalent voltage sources S1,...,S7 method steps

Claims

1. A method for operating an inverter (10) configured to exchange power between a DC side and an AC side, comprising: The inverter (10) comprises a bridge circuit (12) and a split intermediate circuit (14) arranged between a DC side and the bridge circuit (12) and including at least two partial capacitances; The method comprises: - generating a first asymmetry of the partial capacitances relative to one another to generate a first potential position of the DC potential of the partial capacitances of the intermediate circuit (14) relative to ground potential; - setting a first potential position of the DC potential of the partial capacitances of the intermediate circuit (14) to a first set value by varying the asymmetry, wherein the first set value is constant for a first period of time or is modulated at a frequency not greater than 1 / 100th of the AC frequency of the exchanged power.

2. 10. The method of claim 1, - generating a second asymmetry or symmetry of the partial capacitances relative to one another to generate a second potential position of the DC potential of the partial capacitances of the intermediate circuit (14) relative to ground potential, wherein the second asymmetry has an opposite sign to the first asymmetry, and the second potential position is set to a second set value for a second period of time, or the symmetry of the intermediate circuit (14) is set to an asymmetry set value of zero for a second period of time.

3. 10. The method of claim 1, A method, characterized in that the modulated first set value is adjusted over time in different half waves by modulating the asymmetry with changing sign.

4. 4. The method according to claim 1 or 3, 10. A method according to claim 9, wherein the time characteristic of the modulated first set value comprises a plurality of different frequencies, successive or superimposed.

5. The method according to any one of claims 1 to 4, - a method characterized in that it comprises a step of generating and varying the first and / or second asymmetry by redistributing the charges in the divided intermediate circuit (14) using a balancing circuit, in particular a DC / DC converter (20), which transfers charges between the partial capacitances.

6. 6. The method of claim 5, - setting said first potential position by specifying a non-zero, optionally modulated, asymmetric setting value for said balancing circuit.

7. The method according to any one of claims 1 to 4, - generating a first and / or second asymmetry in the intermediate circuit (14) by generating an initial zero-sequence system voltage (30) by means of the bridge circuit (12); - setting the first and / or second potential positions to the first and / or second set values ​​by generating a stabilized zero sequence system voltage (30) by means of the bridge circuit (12), - the initialized zero sequence system voltage and the stabilized zero sequence system voltage have different signs.

8. 8. The method of claim 7, 1. A method according to claim 1, wherein each of said zero sequence system voltages (30) comprises a modulation at a frequency not more than 1 / 100th of the frequency of the AC interchange power, said zero sequence system voltages being in particular sinusoidally modulated or substantially constant at certain times, in particular during the first and / or second time periods.

9. 10. A method according to any one of the preceding claims, comprising:

10. A method characterized in that the first and / or second time period comprises at least one second, in particular several seconds.

10. 10. A method according to any one of the preceding claims, comprising: A method characterized in that the setting of the first and / or second potential positions is repeated periodically, in particular at a low frequency.

11. Use of the method according to any one of the preceding claims for measuring insulation resistance, comprising: - setting said first potential position and detecting a first ground current within said first period or at a point in time during a first half-wave; - setting the second potential position and detecting a second ground current within the second time period, or - detecting a second earth current at a point in time during a second half-wave at a first potential location having a modulated first set value; - calculating the insulation resistance from the set potential position and the measured earth current.

12. 1. An inverter configured to exchange power between a DC side and an AC side, comprising: The inverter (10) comprises a bridge circuit (12) and a split intermediate circuit (14) arranged between a DC side and the bridge circuit (12) and including at least two partial capacitances, and the inverter (10) comprises: - generating a first potential position of the DC potential of the partial capacitances of said intermediate circuit (14) relative to ground potential by generating a first asymmetry of the partial capacitances relative to one another, - an inverter configured to set said first potential position to a first set value, said first set value being constant or modulated at a frequency not greater than 1 / 100th of the AC frequency of the exchanged power during a first period of time.

13. 13. The inverter according to claim 12, the inverter (10) is further configured to generate a second potential position of the intermediate circuit (14) relative to ground potential by establishing a second asymmetry or symmetry of the partial capacitances relative to one another, and to set the second potential position to a second set value for a second period of time, or to set the symmetry of the intermediate circuit (14) to an asymmetric set value of zero for a second period of time.

14. 13. The inverter according to claim 12, The inverter (10) is further configured to adjust the first potential position to a modulated first set value by modulating the asymmetry with different signs in different half-waves.

15. 14. The inverter according to claim 12 or 13, 1. The inverter (10) comprises a device for redistributing charge in a divided intermediate circuit (14), the device for redistributing charge being specially designed as a balancing circuit between the partial capacitances of the intermediate circuit (14).

16. 16. The inverter according to claim 15, Inverter, characterized in that the balancing circuit is designed as a DC / DC converter (20) for transferring charges between partial capacitances.

17. 17. The inverter according to claim 15 or 16, 1. An inverter comprising: a neutral conductor (N) of an AC grid (16) connectable to the AC side, the neutral conductor (N) being connected to the center (M) of the intermediate circuit (14) between a first partial capacitance and a second partial capacitance of the intermediate circuit (14) via the bridge circuit (12).

18. The inverter according to any one of claims 12 to 14, The bridge circuit (12) is configured to generate an initialization zero sequence system voltage (30) that shifts the potential position of a center (M) of the intermediate circuit (14) between a first partial capacitance and a second partial capacitance of the intermediate circuit (14) relative to ground potential.

19. 20. The inverter of claim 18, The bridge circuit (12) is configured to generate a stabilized zero sequence system voltage (30) that shifts the potential position of the center (M) of the intermediate circuit (14) relative to ground potential, and the initialized zero sequence system voltage and the stabilized zero sequence system voltage (30) have different signs.

20. 20. The inverter according to claim 18 or 19, The inverter is characterized in that the bridge circuit (12) is configured to regulate the potential position to a first or second set value of a temporally constant or modulated potential position by the stabilized zero sequence system voltage (30).

Images