Voltage generating circuit

Abstract

To provide a voltage generation circuit that reduces a temperature change of a divided voltage.SOLUTION: The voltage generation circuit 100 includes first and second terminals V1 and V2 to which first and second voltages T1 and T2 are supplied, diffused resistors 24A to 24C that are connected in series between the first and second terminals and have a first conductivity type, regions 22A to 22C that surround the diffused resistors, respectively, and have a second conductivity type different from the first conductivity type, a drain D electrically connected to the first terminals, a source S electrically connected to a region 22B other than a region on a side closest to the first terminals, and a gate G. the gate G has a voltage closer to the first voltage than a third voltage at a third end on a side closer to the second terminals of the first diffused resistors corresponding to the region. 22B 24B 26B, A first transistor 24B to which a first control voltage is supplied, the first control voltage being closer to the second voltage than a fourth voltage at a first terminal-side fourth end 24A of a second diffusion resistor 25A that is closest to the first diffusion resistor Tr1 on the first terminal side, and a third terminal N2 that is connected to a node T3 between adjacent diffusion resistors and outputs a divided voltage.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a voltage generating circuit. [Background technology]

[0002] When a diffused resistor is used, it is known that the diffused resistor is surrounded by a region having a conductivity type different from that of the diffused resistor (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-152335 Summary of the Invention [Problem to be solved by the invention]

[0004] When voltage division is performed using diffused resistors, the divided voltage changes with temperature.

[0005] The present disclosure provides a voltage generation circuit that can reduce the temperature change of a divided voltage. [Means for solving the problem]

[0006] an embodiment of the present disclosure is a voltage generation circuit comprising: a first terminal supplied with a first voltage; a second terminal supplied with a second voltage; a plurality of diffused resistors of a first conductivity type provided on a semiconductor substrate and connected in series between the first terminal and the second terminal; a plurality of regions provided on the semiconductor substrate surrounding the plurality of diffused resistors and having a second conductivity type different from the first conductivity type; a first end electrically connected to the first terminal; a second end electrically connected to a first region other than a region of the plurality of regions closest to the first terminal; and a control end, [Effects of the Invention]

[0007] According to the present disclosure, it is possible to reduce the temperature change of the divided voltage. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a cross-sectional view of a diffused resistor used in the first embodiment. [Figure 2] FIG. 2 is a circuit diagram of the voltage generating circuit according to the first embodiment. [Figure 3] FIG. 3 is a circuit diagram of a voltage generating circuit of a first comparative example. [Figure 4] FIG. 4 is a circuit diagram of a voltage generating circuit of the second comparative example. [Figure 5] FIG. 5 is a circuit diagram of the voltage generating circuit of the first embodiment in the simulation. [Figure 6] FIG. 6 is a circuit diagram of a voltage generating circuit of the second comparative example in the simulation. [Figure 7]FIG. 7 is a diagram showing the divided voltage versus temperature in the simulation. [Figure 8] FIG. 8 is a circuit diagram of a voltage generating circuit according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments for carrying out the present disclosure will be described in detail with reference to the drawings. The following embodiments are examples for embodying the technical ideas of the invention, and the present disclosure is not limited to the described configurations and numerical values. In each drawing, the same components are given the same reference numerals, and duplicate explanations may be omitted as appropriate. The size, positional relationship, etc. of each component shown in each drawing may be exaggerated to facilitate understanding of the invention.

[0010] (First embodiment) FIG. 1 is a cross-sectional view of a diffused resistor used in the first embodiment. As shown in FIG. 1, a voltage generating circuit 100 includes a semiconductor substrate 10, an N-type region 12, a P-type region 14, and contact regions 13, 15, and 16. The semiconductor substrate 10 is, for example, a silicon substrate and is P-type. The N-type region 12 is provided within the semiconductor substrate 10. The P-type region 14 is provided within the N-type region 12 and is surrounded on the side and bottom by the N-type region 12. The contact region 13 is provided in a part above the N-type region 12. The contact region 13 is N-type. The impurity concentration of the contact region 13 is higher than that of the N-type region. The N-type impurity is, for example, arsenic (As) or phosphorus (P). Wiring contacts the contact region 13, and a voltage is supplied to the N-type region 12.

[0011] The contact region 15 is provided in an upper layer portion of one end of the P-type region 14. The contact region 16 is provided in an upper layer portion of the other end of the P-type region 14. The contact regions 15 and 16 are P-type. The impurity concentrations of the contact regions 15 and 16 are higher than the impurity concentration of the P-type region 14. The P-type impurity is, for example, boron (B) or aluminum (Al). Wiring contacts the contact regions 15 and 16, respectively. The P-type region 14 between the contact regions 15 and 16 functions as a diffused resistor.

[0012] 2 is a circuit diagram of a voltage generating circuit according to the first embodiment. As shown in FIG. 2, the voltage generating circuit 100 includes diffused resistors 24A-24C, regions 22A-22C, transistors Tr1 and Tr2, and terminals T1, T2, and T3. A voltage V1 (first voltage) is supplied to the terminal T1 (first terminal), and a voltage V2 (second voltage) is supplied to the terminal T2 (second terminal). The diffused resistors 24A-24C are connected in series between the terminals T1 and T2. A plurality of regions 22A-22C surround the plurality of diffused resistors 24A-24C, respectively. The diffused resistors 24A-24C have a P-type (first conductivity type) and correspond to the P-type region 14 in FIG. 1. The regions 22A-22C have an N-type (second conductivity type different from the first conductivity type) and correspond to the N-type region 12 in FIG. 1. 1. Ends 25A to 25C of the diffused resistors 24A to 24C on the terminal T1 side correspond to the contact region 15 in FIG. 1. Ends 26A to 26C of the diffused resistors 24A to 24C on the terminal T2 side correspond to the contact region 16 in FIG. 1. The contacts 23A to 23C of the regions 22A to 22C correspond to the contact region 13 in FIG. 1. The end 25A is electrically connected to the terminal T1 and the contact 23A and has approximately the same potential. The ends 26A and 25B are electrically connected to a node N1 and have the same potential. The ends 26B and 25C are electrically connected to a node N2 and have the same potential. The node N2 is electrically connected to a terminal T3 (third terminal) that outputs a voltage Vout. The end 26C is electrically connected to the terminal T2 and has the same potential. The node to which the terminal T3 is electrically connected is a node between adjacent diffused resistors among the plurality of diffused resistors 24A to 24C.

[0013] The transistors Tr1 and Tr2 are, for example, normally-on (depletion) N-channel FETs (Field Effect Transistors), and have a source S, a drain D, and a gate G. The drain D of the transistor Tr1 is electrically connected to the terminal T1. The source S of the transistor Tr1 is electrically connected to the contact 23B. The gate G of the transistor Tr1 is electrically connected to the node N1. The drain D of the transistor Tr2 is electrically connected to the terminal T1. The source S of the transistor Tr2 is electrically connected to the contact 23C. The gate G of the transistor Tr2 is electrically connected to the node N2. The substrates Sub of the transistors Tr1 and Tr2 are grounded.

[0014] The voltage V1 at the terminal T1 and the voltage V2 at the terminal T2 are divided by the diffused resistors 24A to 24C. As a result, the voltage Vout at the terminal T3 becomes a desired voltage between the voltages V1 and V2. While an example in which three diffused resistors 24A to 24C are used has been described in FIG. 2, two or four or more diffused resistors may be connected in series between the terminals T1 and T2. The terminal T3 may be electrically connected to a node between any adjacent diffused resistors among the plurality of diffused resistors.

[0015] (First comparative example) 3 is a circuit diagram of a voltage generating circuit of a first comparative embodiment. As shown in FIG. 3, in a voltage generating circuit 110 of the first comparative embodiment, one region 22 surrounds the diffused resistors 24A to 24C. The region 22 is provided to reduce leakage current from the diffused resistors 24A to 24C to the semiconductor substrate 10. To suppress the leakage current, it is preferable that the voltage applied to the N-type region 12 be the reverse voltage of the PN junction between the P-type region 14 and the N-type region 12. For this reason, it is preferable to supply a higher voltage to the N-type region 12 than to the P-type region 14. Therefore, the contact 23 of the region 22 is electrically connected to the terminal T1. The other configurations are the same as those in FIG. 2.

[0016] Because the temperature dependence of the resistance values ​​of the diffused resistors 24A to 24C is the same, the voltage Vout should not be temperature dependent. However, the potential differences ΔVA to ΔVC between the diffused resistors 24A to 24C and the region 22 are different. Specifically, ΔVB is greater than ΔVA, and ΔVC is greater than ΔVB. Therefore, the width of the depletion layer of the PN junction between the P-type region 14 and the N-type region 12 between the diffused resistor 24C and the region 22 is greater than the width of the depletion layer between the P-type region 14 and the N-type region 12 between the diffused resistor 24A and the region 22. Therefore, the width of the P-type region 14 in the diffused resistor 24C that contributes to conduction is smaller than the width of the P-type region 14 in the diffused resistor 24A that contributes to conduction. The temperature dependence of the depletion layer width of the PN junction differs depending on the diffused resistors 24A to 24C. Therefore, the temperature dependence of the width of the P-type region 14 that contributes to conduction differs depending on the diffused resistors 24A to 24C. This causes the temperature dependence of the resistance values ​​of the diffused resistors 24A to 24C to differ, which in turn causes the voltage Vout to have temperature dependence.

[0017] A leakage current IL flows from region 22 to semiconductor substrate 10. A portion of current I1 flowing from terminal T1 toward diffused resistor 24A flows as leakage current IL from contact 23, region 22, to semiconductor substrate 10. Therefore, current IA flowing through diffused resistor 24A is I1-IL. Currents IB and IC flowing through diffused resistors 24B and 24C are both IA, and even if leakage current IL changes with temperature, voltage Vout does not change.

[0018] Thus, in the first comparative example, although the temperature change of the voltage Vout caused by the leakage current IL is small, the temperature dependence of the voltage Vout caused by the potential differences ΔVA to ΔVC occurs.

[0019] (Second comparative example) FIG. 4 is a circuit diagram of a voltage generating circuit of the second comparative embodiment. As shown in FIG. 4, in a voltage generating circuit 112 of the second comparative embodiment, regions 22A to 22C surround diffused resistors 24A to 24C, respectively. The contact 23A of region 22A is electrically connected to terminal T1. The contact 23B of region 22B is electrically connected to node N1. The contact 23C of region 22C is electrically connected to node N2. As a result, the potential differences ΔVA to ΔVC between the diffused resistors 24A to 24C and the regions 22A to 22C are approximately the same. The temperature dependence of the widths of the P-type region 14 that contribute to conduction is approximately the same for the diffused resistors 24A to 24C. Therefore, the temperature dependence of the resistance values ​​of the diffused resistors 24A to 24C is approximately the same, and no temperature dependence of the voltage Vout occurs.

[0020] Leakage currents ILA to ILC flow from the regions 22A to 22C to the semiconductor substrate 10, respectively. The current IA flowing through the diffused resistor 24A is I1-ILA. Similarly, the currents IB and IC flowing through the diffused resistors 24B and 24C are IA-ILB and IB-ILC, respectively. In this way, the currents IA to IC flowing through the diffused resistors 24A to 24C have different current values. The regions 22A to 22C have different voltages. Therefore, the temperature dependence of the leakage currents ILA to ILC differs depending on the regions 22A to 22C, and the temperature dependence of the currents IA to IC also differs. This causes temperature dependence in the voltage Vout.

[0021] As described above, in the second comparative example, although the temperature change of the voltage Vout caused by the potential differences ΔVA to ΔVC is small, the temperature dependence of the voltage Vout caused by the leakage currents ILA to ILC occurs.

[0022] (Description of the First Embodiment) As shown in FIG. 2, in the voltage generating circuit 100 of the first embodiment, a normally-on (depletion-mode) N-channel transistor Tr1 is connected between the terminal T1 and the region 22B. The gate G of the transistor Tr1 is connected to a node N1. As a result, when the voltage at the node N1 relative to the voltage at the region 22B becomes equal to or greater than the threshold voltage of the transistor Tr1, the transistor Tr1 is turned on, and the voltage at the region 22B increases. When the voltage at the region 22B increases and the voltage at the node N1 relative to the region 22B becomes lower than the threshold voltage, the transistor Tr1 is turned off. As a result, the voltage at the region 22B becomes approximately equal to the voltage at the node N1. Similarly, the voltage at the region 22C becomes approximately equal to the voltage at the node N2. Therefore, the potential differences ΔVA to ΔVC between the diffused resistors 24A to 24C and the region 22 are approximately the same. Therefore, the voltage Vout hardly changes with temperature due to the potential differences ΔVA to ΔVC.

[0023] Due to the leakage current ILA from the region 22A to the semiconductor substrate 10, the current IA flowing through the diffused resistor 24A is I1-ILA. The leakage current ILB from the region 22B to the semiconductor substrate 10 is supplied via the transistor Tr1. Therefore, the current IB flowing through the diffused resistor 24B is approximately the same as the current IA. The leakage current ILC from the region 22C to the semiconductor substrate 10 is supplied via the transistor Tr2. Therefore, the current IC flowing through the diffused resistor 24C is approximately the same as the currents IA and IB. Therefore, there is almost no temperature change in the voltage Vout caused by the leakage currents ILA to ILC.

[0024] As described above, in the first embodiment, the temperature dependence of the voltage Vout caused by the potential differences ΔVA to ΔVC and the temperature dependence of the voltage BVout caused by the leakage currents ILA to ILC hardly occur.

[0025] (simulation) A simulation was performed to determine the divided voltage versus temperature of the resistance voltage divider circuits of the first embodiment and the second comparative embodiment. FIG. 5 is a circuit diagram of the first embodiment used in the simulation. As shown in FIG. 5, in the voltage generating circuit 102 of the first embodiment used in the simulation, the diffused resistor 24A has a plurality of diffused resistors 24A1 to 24A3 connected in series. The plurality of diffused resistors 24A1 to 24A3 are surrounded by one region 22A. Similarly, the diffused resistor 24B (and 24C) has a plurality of diffused resistors 24B1 to 24B3 (and 24C1 to 24C3) connected in series. The plurality of diffused resistors 24B1 to 24B3 (and 24C1 to 24C3) are surrounded by one region 22B (and 22C). The other configurations are the same as those in FIGS. 1 and 2.

[0026] 6 is a circuit diagram of the second comparative example in the simulation. As shown in FIG. 6, in the voltage generating circuit 114 of the second comparative example in the simulation, the diffused resistors 24A, 24B, and 24C include diffused resistors 24A1 to 24A3 connected in series, diffused resistors 24B1 to 24B3 connected in series, and diffused resistors 24C1 to 24C3 connected in series, respectively. Regions 22A, 22B, and 22C surround the diffused resistors 24A1 to 24A3, diffused resistors 24B1 to 24B3, and diffused resistors 24C1 to 24C3, respectively. The other configurations are the same as those in FIG. 4.

[0027] Fig. 7 is a diagram showing the divided voltage versus temperature in a simulation. In Fig. 7, the voltage between the voltage V1 at terminal T1 and the voltage V2 at terminal T2 is set to 3.3V. In the second comparative example, the voltage Vout varies by about 30mV from -50°C to 130°C. In contrast, in the first embodiment, the fluctuation in voltage Vout is about 2mV from -50°C to 130°C. In this way, in the first embodiment, the temperature dependency of the divided voltage can be reduced.

[0028] (Second embodiment) 8 is a circuit diagram of a voltage generating circuit according to the second embodiment. As shown in FIG. 8, the gate G of transistor Tr1 is electrically connected to a node N3 between diffused resistors 24A2 and 24A3 in diffused resistor 24A. The gate G of transistor Tr2 is electrically connected to a node N4 between diffused resistors 24C1 and 24C2 in diffused resistor 24C. If the voltage of region 22B is approximately the same as the voltage of node N1, the temperature dependence of voltage Vout due to ΔVA to ΔVC is reduced.

[0029] According to the first and second embodiments, the transistor Tr1 (first transistor) has a drain D (first terminal) electrically connected to the terminal T1, a source S (second terminal) electrically connected to the region 22B (first region) other than the region 22A closest to the terminal T1 among the plurality of regions 22A-22C, and a gate G (control terminal) electrically connected to a node N1 between the diffused resistors 24A and 24B. Here, the diffused resistor 24B (first diffused resistor) is the diffused resistor corresponding to the region 22B to which the source S is connected among the plurality of diffused resistors 24A-24C. The diffused resistor 24A (second diffused resistor) is the diffused resistor closest to the diffused resistor 24B on the terminal T1 side.

[0030] As a result, the voltage of region 22B becomes approximately the same as the voltage of node N1, making ΔVA and ΔVB approximately equal. In transistor Tr2, by connecting the source S, drain D, and gate G in the same way, ΔVA to ΔVC can be made approximately equal. This reduces the temperature dependency of voltage Vout.

[0031] Furthermore, of the multiple regions 22A to 22C, the region 22A closest to the terminal T1 is electrically connected to the terminal T1, thereby making it possible to make ΔVA approximately equal to ΔVB and ΔVC.

[0032] 8, the gate voltage Vg1 (first control voltage) supplied to the gate G of the transistor Tr1 is closer to the voltage V1 than the voltage V3 (third voltage) at the end 26B (third end) on the terminal T2 side of the diffused resistor 24B, and closer to the voltage V2 than the voltage V4 (fourth voltage) at the end 25A (fourth end) on the terminal T1 side of the diffused resistor 24A. This makes it possible to reduce the temperature dependence of the voltage V2 caused by ΔVA to ΔVC compared to the first comparative example.

[0033] Therefore, the gate G of the transistor Tr1 is electrically connected to a position electrically closer to the terminal T1 than the end 26B on the terminal T2 side within the diffused resistor 24B, or to a position electrically closer to the terminal T2 than the end 25A on the terminal T1 side within the diffused resistor 24A.

[0034] The transistor Tr2 (second transistor) has a drain D (first terminal) electrically connected to the terminal T1, a source S (second terminal) electrically connected to the region 22C (the second region closest to the terminal T2 side of the region 22B), and a gate G (control terminal). The gate voltage Vg2 (second control voltage) supplied to the gate G of the transistor Tr2 is closer to the voltage V1 than the voltage V6 (sixth voltage) at the end 26C (fifth terminal) of the diffused resistor 24C (the third diffused resistor corresponding to the region 22C) on the terminal T2 side, and is closer to the voltage V2 than the gate voltage Vg1. This reduces the temperature dependence of the voltage V2 due to ΔVA to ΔVC compared to the first comparative example.

[0035] If the voltage at node N1 is V5 (fifth voltage), the gate voltage Vg1 applied to the gate G of transistor Tr1 is preferably a voltage between V5+(V3-V5) / 2 and V5+(V4-V5) / 2, and more preferably a voltage between V5+(V3-V5) / 3 and V5+(V4-V5) / 3. Thus, it is preferable that the gate voltage Vg1 be close to voltage V5. If voltage V5 becomes higher than the voltage of region 22B (almost Vg1), a forward current will flow through the PN junction between region 22B and diffused resistor 24B. Therefore, it is preferable that the gate voltage Vg1 be equal to or lower than voltage V5. The gate voltage Vg1 is set appropriately taking into account temperature fluctuations, manufacturing variations, and the like.

[0036] The transistors Tr1 and Tr2 may be of a normally-off type (enhancement type). If the transistors Tr1 and Tr2 are of a normally-on type (depletion type), they turn on when the voltages of the source S and gate G are equal, so the voltage of the region 22B can be made approximately equal to the voltage of the gate G.

[0037] The diffusion resistors 24A to 24C have a P conductivity type, and the regions 22A to 22C have an N conductivity type. In this case, the voltage applied to the regions 22A to 22C is preferably equal to or higher than the voltage of the diffusion resistors 24A to 24C so that a forward voltage is not applied to the PN junctions between the diffusion resistors 24A to 24C and the regions 22A to 22C (i.e., the PN junctions between the P-type region 14 and the N-type region 12). In other words, the voltage V1 is preferably higher than the voltage V2.

[0038] In this case, transistor Tr1 (and Tr2) is preferably an N-channel FET so that transistor Tr1 turns on when the voltage in region 22B drops below the desired voltage.

[0039] The conductivity type of the diffused resistors 24A to 24C may be N-type, and the conductivity type of the regions 22A to 22C may be P-type. In this case, it is preferable that the voltage applied to the regions 22A to 22C is equal to or lower than the voltage of the diffused resistors 24A to 24C. That is, it is preferable that the voltage V1 is lower than the voltage V2. It is preferable that the transistor Tr1 (and Tr2) is a P-channel FET so that the transistor Tr1 turns on when the voltage of the region 22B becomes higher than a desired voltage. That is, it is preferable that the transistor Tr1 (and Tr2) is a second conductivity type FET that is the same as the second conductivity type of the regions 22A to 22C.

[0040] Although the transistors Tr1 and Tr2 are FETs in the example described above, the transistors may be bipolar transistors or IGBTs (Insulated Gate Bipolar Transistors).

[0041] Although the embodiments have been described above, they are presented as examples and the present invention is not limited to the above embodiments. The above embodiments can be implemented in various other forms, and various combinations, omissions, substitutions, modifications, etc. can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as set forth in the claims. [Explanation of symbols]

[0042] 10. Semiconductor substrate 12 N-type region 13, 15, 16 Contact area 14 P-type region 22, 22A, 22B, 22C area 23, 23A, 23B, 23C Contacts 24A, 24B, 24C Diffused resistors 25A, 25B, 25C, 26A, 26B, 26C ends

Claims

1. a first terminal to which a first voltage is supplied; a second terminal to which a second voltage is supplied; a plurality of diffused resistors of a first conductivity type provided on a semiconductor substrate and connected in series between the first terminal and the second terminal; a plurality of regions provided on the semiconductor substrate, surrounding the plurality of diffused resistors respectively, and having a second conductivity type different from the first conductivity type; a first transistor having a first end electrically connected to the first terminal, a second end electrically connected to a first region other than the region closest to the first terminal among the plurality of regions, and a control end, to which a first control voltage is supplied that is closer to the first voltage than a third voltage at a third end on the second terminal side of a first diffused resistor among the plurality of diffused resistors corresponding to the first region and that is closer to the second voltage than a fourth voltage at a fourth end on the first terminal side of a second diffused resistor that is closest to the first diffused resistor on the first terminal side; a third terminal electrically connected to a node between adjacent ones of the plurality of diffusion resistors and outputting a divided voltage; A voltage generating circuit comprising:

2. 2. The voltage generating circuit according to claim 1, wherein the first transistor is a normally-on transistor.

3. the first transistor is a FET with a channel of the second conductivity type, When the first conductivity type is P-type and the second conductivity type is N-type, the first voltage is higher than the second voltage; 3. The voltage generating circuit according to claim 2, wherein when the first conductivity type is N-type and the second conductivity type is P-type, the first voltage is lower than the second voltage.

4. 4. The voltage generating circuit according to claim 3, wherein the first conductivity type is P-type and the second conductivity type is N-type.

5. The voltage generating circuit according to claim 1 , wherein the control terminal is electrically connected to a node between the first diffusion resistor and the second diffusion resistor.

6. 5. The voltage generating circuit according to claim 1, wherein the control terminal is electrically connected to a position electrically closer to the first terminal than the third terminal and electrically closer to the second terminal than the fourth terminal.

7. The voltage generating circuit according to claim 1 , wherein the region closest to the first terminal among the plurality of regions is electrically connected to the first terminal.

8. 5. The voltage generation circuit according to claim 1, wherein the voltage applied to the control end of the first transistor is a voltage between V5+(V3−V5) / 2 and V5+(V4−V5) / 2, where V3 is the third voltage, V4 is the fourth voltage, and V5 is a fifth voltage at a node between the first diffused resistor and the second diffused resistor.

9. 5. The voltage generation circuit according to claim 1, further comprising: a second transistor having: a first end electrically connected to the first terminal; a second end electrically connected to a second region among the plurality of regions that is closest to the first region on a side of the second terminal; and a control end, wherein a second control voltage is supplied to the control end, the second control voltage being closer to the first voltage than a sixth voltage at a fifth end on the second terminal side of a third diffused resistor among the plurality of diffused resistors that corresponds to the second region and being closer to the second voltage than the first control voltage.

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