Semiconductor device

Abstract

To provide a highly reliable semiconductor device.SOLUTION: In a semiconductor device having a shift register or the like including a pulse output circuit composed of transistors of the same conductivity type, a transistor having a back gate is used as a transistor in which there is no potential difference between a source and a drain and positive stress is applied to a gate during a non-selection period of the pulse output circuit. In a non-selection period, the potentials of the gate and the back gate are replaced with each other, whereby stress applied to the transistor is relieved.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the invention disclosed in this specification, etc. relates to an object, a method, or a manufacturing method. One aspect of the invention disclosed in this specification is a process, a machine, a manufacture, or Composition of Matter.

[0002] In particular, one embodiment of the invention disclosed in this specification and the like is a semiconductor device and an electric device having the semiconductor device. Regarding child devices.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to display devices (liquid crystal display devices, light emitting display devices, etc.), lighting devices, electro-optical devices, Power storage devices, memory devices, semiconductor circuits, imaging devices, electronic devices, etc. have semiconductor devices. There are cases where this happens. [Background technology]

[0004] With the spread of large display devices such as LCD TVs, there is a demand for higher value-added products. In particular, the channel region is made of amorphous semiconductor. By using thin film transistors (TFTs), the scanning line driving circuit and other components are mounted on the same substrate as the pixel section. The technology that configures the drive circuit is being actively developed because it contributes greatly to reducing costs and improving reliability. Development is underway.

[0005] Thin film transistors with channel regions made of amorphous semiconductors have the following problems: an increase in threshold voltage, As the degradation of the thin film transistor progresses, the following problems occur: This causes problems such as the driver circuit becoming difficult to operate and making it impossible to display an image. Patent Document 1 describes a shift register that can suppress the deterioration of thin film transistors. In Patent Document 1, two thin film transistors are used to suppress the deterioration of their characteristics. A thin film transistor is provided, and the thin film transistor is connected to the output terminal of the flip-flop and V It is connected between the wiring that supplies SS (hereinafter referred to as the negative power supply). The thin film transistor and the other thin film transistor are alternately turned on. The time that the transistor is turned on can be shortened to about half of one frame period. Therefore, deterioration of the characteristics of the thin film transistor can be suppressed to a certain extent. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-050502 Summary of the Invention [Problem to be solved by the invention]

[0007] An object of one embodiment of the present invention is to provide a highly reliable semiconductor device or the like. Another object is to provide a semiconductor device or the like with high productivity. Another object of the present invention is to provide a semiconductor device or the like with little defect. One of the goals is to provide

[0008] The description of these problems does not preclude the existence of other problems. The embodiment does not necessarily solve all of these problems. Problems other than these may be solved by the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other issues. [Means for solving the problem]

[0009] One aspect of the present invention is a shift register including a pulse output circuit configured with transistors of the same conductivity type. In a semiconductor device having a register or the like, the source / drain A transistor with no potential difference between the inputs and a positive stress applied to the gate In the non-selection period, a pulse output circuit is characterized by using a transistor having the following structure: By swapping the gate and back gate potentials, the stress applied to the transistor is This can ease the response.

[0010] One embodiment of the present invention is a semiconductor device including the first to twelfth transistors, The first to twelfth transistors each have a first gate and a second gate, One of the source and the drain of the transistor is electrically connected to the first wiring. The other of the source or drain of the transistor is connected to the source or drain of a second transistor. The other of the source or drain of the second transistor is electrically connected to the second the source or the drain of the third transistor is electrically connected to the first wiring. The third transistor is electrically connected to the wiring, and the other of the source and the drain of the third transistor is electrically connected to the first transistor. the source or drain of the fourth transistor is electrically connected to the other of the source or drain of the fourth transistor. One of the source and drain of the fourth transistor is electrically connected to the first wiring. The other of the source and drain of the ninth transistor is electrically connected to the source and drain of the ninth transistor. the gate of the fourth transistor is electrically connected to the gate of the second transistor. The other of the source and the drain of the ninth transistor is electrically connected to the second wiring. , the first gate of the ninth transistor is electrically connected to the first gate of the tenth transistor. the second gate of the ninth transistor is electrically connected to the third wiring, and the second gate of the eleventh transistor is electrically connected to the third wiring. One of the source or drain of the first transistor is connected to the source or drain of the fourth transistor. The other of the source and drain of the eleventh transistor is electrically connected to a first gate of the eleventh transistor electrically connected to the gate of the fifth transistor; The second gate of the eleventh transistor is electrically connected to the fourth wiring, and the second gate of the eleventh transistor is electrically connected to the ninth wiring. the source or drain of the fifth transistor; one of the source and drain of the sixth transistor is electrically connected to one of the source and drain of the fifth transistor. The other of the source or drain of the transistor is connected to the source or drain of the tenth transistor. The second gate of the tenth transistor is electrically connected to one of the third wirings. The other of the source or drain of the sixth transistor is electrically connected to the twelfth transistor. The gate of the sixth transistor is electrically connected to either the source or the drain of the sixth transistor. a gate of the fifth transistor electrically connected to the source or The other of the drains is electrically connected to the second wiring, and the first gate of the twelfth transistor is electrically connected to the first gate of the tenth transistor and the second gate of the twelfth transistor. The gate of the second transistor is electrically connected to the third wiring, and the source or drain of the seventh transistor is One of the gates is electrically connected to the first gate of the tenth transistor, and the other of the gates is electrically connected to the first gate of the seventh transistor. The other of the source and drain of the seventh transistor is electrically connected to the second wiring. The gate of the eighth transistor is electrically connected to the third wiring, and the source or drain of the eighth transistor is electrically connected to the third wiring. one of the source and drain of the third transistor is electrically connected to the other of the source and drain of the eighth transistor; The other of the source or drain of the transistor is electrically connected to the first gate of the tenth transistor. The gate of the eighth transistor is electrically connected to the fourth wiring. The semiconductor device is characterized by the above.

[0011] The semiconductor device of one embodiment of the present invention may include a first capacitor. One electrode of the sixth transistor is electrically connected to the gate of the sixth transistor, and the other electrode of the first capacitor is electrically connected to the gate of the sixth transistor. The electrode is electrically connected to one of the source and drain of the twelfth transistor.

[0012] The semiconductor device of one embodiment of the present invention may include a second capacitor. One electrode is electrically connected to the other of the source and drain of the third transistor, The other electrode of the second capacitor element is electrically connected to a second wiring.

[0013] The semiconductor device of one embodiment of the present invention may include a third capacitor. One electrode of the third capacitor is electrically connected to the first gate of the tenth transistor. The other electrode is electrically connected to a second wiring.

[0014] The sixth transistor has a source or a drain to which the first clock signal is supplied. The gate of the first transistor is electrically connected to a wiring through which a reset signal The gate of the second transistor is electrically connected to the wiring that supplies the voltage. The gate of the third transistor is electrically connected to a wiring to which a gate signal is supplied. It is electrically connected to a wiring line to which a second clock signal is supplied.

[0015] In addition, in the semiconductor device of one embodiment of the present invention, in addition to the source or drain of the fifth transistor, The semiconductor device of one embodiment of the present invention has a function of outputting a signal from the sixth transistor. It has the function of outputting a signal from the other of the source or drain of the transistor.

[0016] In addition, the first to twelfth transistors each include an oxide semiconductor in a semiconductor layer where a channel is formed. It is preferable to use [Effects of the Invention]

[0017] It is possible to provide a semiconductor device with high reliability. Alternatively, it is possible to provide a semiconductor device with low power consumption. Alternatively, a semiconductor device including a unipolar logic circuit in which the output voltage is unlikely to decrease can be used. Alternatively, a novel semiconductor device or the like can be provided.

[0018] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description, This becomes clear from the description, drawings, claims, etc. From any description, it is possible to extract effects other than these. [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 2 is a diagram showing an example of a shift register and a pulse output circuit. [Figure 2] FIG. 2 is a diagram showing an example of a pulse output circuit. [Figure 3] FIG. 2 is a diagram showing an example of a pulse output circuit. [Figure 4] FIG. 2 is a diagram showing an example of a pulse output circuit. [Figure 5] FIG. 2 is a diagram showing an example of a shift register and a pulse output circuit. [Figure 6] FIG. 2 is a diagram showing an example of a shift register and a pulse output circuit. [Figure 7] 4 is a timing chart illustrating the operation of a shift register. [Figure 8] 4 is a timing chart illustrating the operation of a shift register. [Figure 9] 4 is a timing chart illustrating the operation of a pulse output circuit. [Figure 10] FIG. 3 is a circuit diagram illustrating the operation of a pulse output circuit. [Figure 11] FIG. 3 is a circuit diagram illustrating the operation of a pulse output circuit. [Figure 12] FIG. 3 is a circuit diagram illustrating the operation of a pulse output circuit. [Figure 13] 4 is a timing chart illustrating the operation of a shift register. [Figure 14] FIG. 2 is a diagram showing an example of a shift register and a pulse output circuit. [Figure 15] 4 is a timing chart illustrating the operation of a shift register. [Figure 16] 4 is a timing chart illustrating the operation of a pulse output circuit. [Figure 17] FIG. 3 is a circuit diagram illustrating the operation of a pulse output circuit. [Figure 18] FIG. 3 is a circuit diagram illustrating the operation of a pulse output circuit. [Figure 19] FIG. 3 is a circuit diagram illustrating the operation of a pulse output circuit. [Figure 20] 1A and 1B illustrate an example of a transistor. [Figure 21] 1A and 1B illustrate an example of a transistor. [Figure 22] 1A and 1B illustrate an example of a transistor. [Figure 23]1A and 1B illustrate an example of a transistor. [Figure 24] 1A and 1B illustrate an example of a transistor. [Figure 25] 1A and 1B illustrate an example of a transistor. [Figure 26] 1A and 1B illustrate an example of a transistor. [Figure 27] 1A and 1B illustrate an example of a transistor. [Figure 28] 1A and 1B illustrate an example of a transistor. [Figure 29] 1A and 1B illustrate an example of a transistor. [Figure 30] 1A and 1B illustrate an example of a transistor. [Figure 31] FIG. 2 is a diagram illustrating an energy band structure. [Figure 32] 1A and 1B illustrate an example of a display device. [Figure 33] 1A and 1B illustrate an example of a display device. [Figure 34] FIG. 2 illustrates an example of the configuration of a driver circuit. [Figure 35] 1A and 1B illustrate an example of a display device. [Figure 36] 1A and 1B illustrate an example of a display device. [Figure 37] FIG. 2 is a diagram illustrating an example of a display module. [Figure 38] 1A to 1C illustrate examples of electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0020] The present invention will be described with reference to the drawings. The present invention is not limited to the embodiments described above, and the forms and details thereof may be changed without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications can be made to the above. The invention described below should not be construed as being limited to the description of the embodiments. In the configuration of the present invention, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. These terms are commonly used, and repeated explanations may be omitted.

[0021] In addition, the position, size, range, etc. of each component shown in the drawings are for the purpose of facilitating understanding of the invention. Therefore, the actual location, size, range, etc. may not be shown. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc.

[0022] In addition, in the drawings, in order to facilitate understanding of the invention, the illustration of some components may be omitted. In addition, some hidden lines may be omitted.

[0023] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The numbers are used to indicate the order or priority of the processes or stacking steps. In addition, even if a term is not accompanied by an ordinal number in this specification, etc., it is used to avoid confusion of the constituent elements. In order to clarify the scope of the invention, ordinal numbers may be used in the claims. Even if a term has an ordinal number in the first place, it may be given a different ordinal number in the claims. In addition, even if a term is given an ordinal number in this specification, etc., it may be used in the patent. Ordinal numbers may be omitted in claims, etc.

[0024] In addition, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring." Furthermore, the terms "electrode" and "wiring" are used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the "line" is formed as a single unit.

[0025] In this specification, the terms "above" and "below" refer to the positional relationship of components directly above or below each other. For example, "electrode on insulating layer A" is not limited to being below and in direct contact with the insulating layer A. If the expression is "B", electrode B does not need to be formed directly on insulating layer A, The inclusion of other components between the edge layer A and the electrode B is not excluded.

[0026] The source and drain functions may also be different when using transistors with different polarities or when using circuits When the direction of the current changes during circuit operation, they are interchanged depending on the operating conditions. Therefore, it can be difficult to determine which is the source and which is the drain. Therefore, in this specification, the terms source and drain can be used interchangeably. It shall be possible.

[0027] In addition, when it is explicitly stated in this specification that X and Y are connected, is when X and Y are electrically connected and when X and Y are functionally connected. and the case where X and Y are directly connected are considered to be disclosed in this specification and the like. Therefore, the present invention is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also considered to be described in the drawings or text. do.

[0028] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a " is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. Therefore, even when it is expressed as "electrically connecting," in an actual circuit, In some cases, there are no physical connections and only wires running.

[0029] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). In the region where a channel is formed (also called a "channel forming region") , source (source region or source electrode) and drain (drain region or drain electrode) ) in one transistor. The channel length of a transistor is not necessarily the same value. Therefore, in this specification, the channel length is the area where the channel is formed. The value is any one of the values, the maximum value, the minimum value, or the average value.

[0030] The channel width is the width of the semiconductor (or transistor) when it is in the on state. The region where the current flows and the gate electrode overlap, or the region where the channel is formed. The length of the part where the source and drain face each other in the region. In a transistor, the channel width does not necessarily have the same value in all regions. The channel width of each transistor may not be determined to be a single value. In the document, the channel width is defined as any one value, maximum value, or The minimum or average value.

[0031] Depending on the structure of the transistor, the channel in the region where the channel is actually formed may be The effective channel width (also called the "effective channel width") and the The channel width (also called "apparent channel width") may differ from the When the gate electrode covers the side surface of the semiconductor layer, the effective channel width is For example, when the gate voltage is too high and the In a transistor in which the electrodes cover the side of the semiconductor, the portion of the channel region formed on the side of the semiconductor In this case, the effective channel width may be larger than the apparent channel width. The width of the rule becomes larger.

[0032] In such a case, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known exactly, it is difficult to estimate the effective chip size. Channel width is difficult to measure accurately.

[0033] Therefore, in this specification, the apparent channel width is referred to as the "surrounding channel width (SCW)". In addition, in this specification, So, when we simply write "channel width," it means the enclosed channel width or the apparent channel width. In this specification, when simply referred to as a channel width, it may refer to the actual It may refer to the effective channel width. The width, apparent channel width, and enclosed channel width can be determined by analyzing cross-sectional TEM images. The value can be determined by, for example,

[0034] The field effect mobility of the transistor and the current value per channel width are calculated. In this case, the effective channel width is calculated using the enclosed channel width. The value may differ from that calculated using the channel width.

[0035] Unless otherwise specified, the transistors shown in this specification are enhancement type transistors. (normally off) field effect transistor (FET) In addition, unless otherwise specified, the transistors shown in this specification The transistor is an n-channel transistor, and the voltage between the gate and source (Vgs) is set to a certain threshold. When the voltage exceeds a certain threshold (Vth), the source and drain are in a conducting state (ON state). In addition, unless otherwise specified, the Vth of the transistors shown in this specification and the like are all assumed to be the same.

[0036] The impurities in a semiconductor refer to, for example, substances other than the main components that make up the semiconductor. For example, the concentration Elements with a concentration of less than 0.1 atomic percent can be considered impurities. The DOS (Density of States) of the conductor increases and carrier mobility The semiconductor may be an oxide semiconductor, and the crystallinity may decrease. In the case of a conductor, impurities that change the properties of the semiconductor include, for example, elements of Group 1, Group elements, Group 13 elements, Group 14 elements, Group 15 elements, and elements other than the main components of oxide semiconductors transition metals, especially hydrogen (which is also contained in water), lithium, sodium In the case of oxide semiconductors, impurities such as hydrogen are The inclusion of impurities can cause oxygen vacancies. Also, if the semiconductor is silicon, Impurities that change the properties of semiconductors include, for example, oxygen, elements of Group 1 except for hydrogen, and These include Group 2 elements, Group 13 elements, and Group 15 elements.

[0037] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to a state in which two lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" and "orthogonal" mean that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. "Straight" refers to two straight lines that form an angle of 60° or more and 120° or less.

[0038] In this specification, the terms "identical," "same," and "equal" are used to refer to counting values ​​and measurement values. " or "uniform" (including their synonyms) unless expressly stated otherwise. The calculations are subject to a margin of error of plus or minus 20%.

[0039] In this specification, a high power supply potential VDD (hereinafter simply referred to as "VDD" or "H potential") ) indicates a power supply potential that is higher than the low power supply potential VSS. The potential VSS (hereinafter simply referred to as "VSS" or "L potential") is the high power supply potential VDD. It also refers to the power supply potential that is lower than the ground potential. For example, if VDD is at ground potential, VSS is at a potential lower than ground potential. When VSS is at ground potential, VDD is at a potential higher than ground potential.

[0040] Generally, "voltage" refers to the difference between a certain potential and a reference potential (for example, ground potential (GND potential) or In many cases, it refers to the potential difference between the source and the source potential. Therefore, the potential applied to wiring etc. may change depending on the reference potential. In some cases, the terms "voltage" and "potential" can be used interchangeably. Unless otherwise specified, VSS is the reference potential.

[0041] The words "film" and "layer" may be used interchangeably depending on the situation. For example, the term "conductive layer" can be replaced with "conductive film." ". Alternatively, for example, the term "insulating film" may be used. It may be possible to change the term to "insulating layer."

[0042] (Embodiment 1) In this embodiment, a pulse output circuit, which is a type of semiconductor circuit, An example of a shift register will be described with reference to the drawings.

[0043] <<Conventional shift register>> First, an example of the configuration and operation of a conventional shift register will be described with reference to FIGS. 14 to 19. Please refer to the following for explanation.

[0044] <Configuration of shift register 900> The shift register 900 shown in FIG. 14A outputs n pulses (n is a natural number of 2 or more). In this specification, the first stage pulse output circuit 910 is referred to as the "pulse output Circuit 910 _ 1”, and the n-th stage pulse output circuit 910 may be referred to as the “pulse output circuit 910_n". Also, the pulse of the i-th stage (i is a natural number between 1 and n). The output circuit 910 is referred to as the "pulse output circuit 910 _ In addition, the pulse output circuit The terminals and output signal OUT of the circuit 910 may also be referred to in the same manner as above. For example, when the output signal OUT of the pulse output circuit 910_i is referred to as "output signal OUT_i" There is.

[0045] The shift register 900 also includes a wiring 905 to which a reset signal RES is supplied and a clock The wiring 901 has a first clock signal. A first clock signal CLK1 is supplied to the wiring 901, a second clock signal CLK2 is supplied to the wiring 902, The third clock signal CLK3 is supplied to the wiring 903, and the fourth clock signal CLK4 is supplied to the wiring 904. The signal CLK4 is provided.

[0046] The clock signal is a signal that changes between H potential and L potential at regular intervals. The fourth clock signal CLK1 to the fourth clock signal CLK4 are delayed by 1 / 4 cycle in order. In this embodiment, the first clock signal CLK1 to the fourth clock signal CLK4 are used to Controls the pulse output circuit, etc.

[0047] The pulse output circuit 910 has terminals 911 to 916 (see FIG. 14B). The terminals 911 and 912 are electrically connected to any of the wirings 901 to 904. For example, in FIG. 14A, a pulse output circuit 910_1 has a terminal 911 The terminal 912 is electrically connected to the wiring 902. In addition, the pulse output circuit 910_2 has a terminal 911 electrically connected to the wiring 902 and a terminal 9 12 is electrically connected to the wiring 903. Also, the terminal 914 is electrically connected to the wiring 905. is connected.

[0048] A start signal SP is supplied to a terminal 913 of the pulse output circuit 910_1, and a start signal SP is supplied to a terminal 916 An output signal OUT_1 is output from the terminal 91 of the pulse output circuit 910_i. 3 is a terminal 91 of a pulse output circuit 910_i-1 (a pulse output circuit 910 of the (i-1)th stage). 5. A terminal 915 of the pulse output circuit 910_i is electrically connected to the pulse The pulse output circuit 910 is electrically connected to the terminal 913 of the output circuit 910_i+1. An output signal OUT_i is output from a terminal 916 of the n-th stage pulse output An output signal OUT_n is output from a terminal 916 of the circuit 910_n.

[0049] The pulse output circuit 910_n does not necessarily have to have the terminal 915. If 10_n has a terminal 915, the terminal 915 (terminal 915_n) is connected to the first stage It may also be electrically connected to the terminal 913 (terminal 913_1) of the pulse output circuit 910_1. .

[0050] [Configuration of pulse output circuit 910] Next, the configuration of the pulse output circuit 910 will be described (see FIG. 14(C)). The output circuit 910 includes a transistor 921, a transistor 922, a transistor 924, and a transistor 926. A transistor 929, a transistor 931, a transistor 932, a capacitor 933, and It has a capacitor element 934 .

[0051] One of the source and the drain of the transistor 921 is electrically connected to a wiring 941. The other of the source and drain is electrically connected to a node 962, and the gate is electrically connected to a terminal 912. One of the source and drain of the transistor 922 is electrically connected to the wiring 941. and the other of the source and drain is electrically connected to node 962. The gate is electrically connected to the terminal 914. The source or drain of the transistor 924 One of the inputs is electrically connected to the wiring 941, and the other of the source and drain is connected to the node 96 3 and its gate is electrically connected to terminal 913. One of the source or drain of 25 is electrically connected to node 963. The other end of the drain is electrically connected to the wiring 946, and the gate is electrically connected to a node 962. One of the source and the drain of the transistor 926 is electrically connected to the terminal 911. The other of the source and drain is electrically connected to a terminal 915, and the gate is connected to a node 961. One of the source and drain of the transistor 927 is The other of the source and drain is electrically connected to a terminal 915 and a wiring 946. The source of transistor 928 is electrically connected to node 962. Alternatively, one of the drains is electrically connected to the terminal 911, and the other of the source or drain is The transistor is electrically connected to the terminal 916 and the gate is electrically connected to the node 961. One of the source and drain of the transistor 929 is electrically connected to the terminal 916. Alternatively, the other of the drains is electrically connected to the wiring 946, and the gate is electrically connected to the node 962. One of the source and drain of the transistor 931 is connected to a node 962. The other of the source and drain is electrically connected to the wiring 946. The terminal 913 is electrically connected to the source or drain of the transistor 932. One of the source and drain is electrically connected to node 963, and the other of the source and drain is connected to node 961. and the gate is electrically connected to a wiring 941. One electrode is electrically connected to a node 962, and the other electrode is electrically connected to a wiring 946. It has been done.

[0052] <Operation of shift register 900> Next, the operation of the shift register 900 shown in FIG. 14(A) will be explained with reference to FIG. 15. FIG. 15 is a timing chart illustrating the operation of the shift register 900. In 15, from the start of operation of the shift register 900 to the terminals 916_1 to 916_5, 3 shows how the output signal OUT at H potential is output in order.

[0053] First, a reset signal RES is supplied to the wiring 905 (period 950). A start signal SP is supplied to a terminal 913_1 of the circuit 910_1 (period 951). In synchronization with the clock signal CLK1, the H potential is output from the terminal 916_1 and the terminal 915_1. The potential supplied to the terminal 915 is supplied to the terminal 916 (period 952). Therefore, the potential change at the terminal 915 is not shown in FIG. The output of 915_1 is input to the terminal 913_2. As a result, an H potential is output from the terminal 916_2 (period 953). Next, in synchronization with the clock signal CLK3, the signal is output from the terminal 916_3. An H potential is output from the terminal 915_3. The output from the terminal 915_3 is input to the terminal 913_4 (during the period 95 4) Next, in synchronization with the clock signal CLK4, an H potential is output from the terminal 916_4. The output of the terminal 915_4 is input to the terminal 913_5 (period 955). Next, the clock In synchronization with the signal CLK1, the H potential is output from the terminal 916_5. The force is input to the terminal 913_6 (period 956). An H potential is output in order up to the terminal 916 .

[0054] [Operation of Pulse Output Circuit 910] Next, the operation of the pulse output circuit 910 included in the shift register 900 will be described with reference to FIGS. The description will be made with reference to Fig. 19. Fig. 16 explains the operation of the first-stage pulse output circuit 910_1. 17 to 19 are timing charts showing the operation of the pulse output circuit 910_1. FIG.

[0055] FIG. 16 shows the potential changes of the terminals 911 to 916 and the nodes 961 to 963. In addition, in FIG. 16, a transistor 921, a transistor 922, a transistor The transistors 924 to 929, the transistor 931, and the transistor 932 , indicates whether the shift register 900 is in an on state or an off state. In the middle, the H potential is supplied to the wiring 941 and the L potential is supplied to the wiring 946 .

[0056] [Period 950 (see Figure 17(A))] Before power is supplied to the shift register, each node in the circuit is in a floating state. When power is supplied to the shift register, a pulse is output from the pulse output circuit 910 depending on the state of each node. The reset signal R may be output irregularly immediately after power-on. Supplying ES allows the shift register to operate normally.

[0057] The reset signal RES is supplied to the terminals 914 of all the pulse output circuits 910. Then, The transistors 922 of all the pulse output circuits 910 are turned on, and all the nodes An H potential (more precisely, a potential of H potential-Vth) is supplied to the node 962. The transistor 925 of the pulse output circuit 910 is turned on, and all the nodes 961 Therefore, all output signals OUT are at L potential.

[0058] [Period 951 (see Figure 17(B))] When a start signal SP is supplied to the terminal 913, the transistor 924 and the transistor When the transistor 924 is turned on, the pulse output circuit 91 The potentials of the nodes 961 and 963 of the 0_1 are H potential (more precisely, H potential - Vth ) and the transistor 926 and the transistor 927 of the pulse output circuit 910_1 28 is turned on. Since the L potential is supplied to the terminal 911_1, the terminal 915_ 1 and the output of the terminal 916_1 remain at the L potential. Also, the transistor 931 is turned on. When this state is reached, the potential of the node 962 becomes the L potential. The output signal of the terminal 915_i-1 of the previous stage is supplied to the terminal 915_i-1.

[0059] [Period 952 (see Figure 18(A))] An L potential is supplied to the terminal 913, and an H potential (clock signal CLK1) is supplied to the terminal 911. When the L potential is supplied to the terminal 913, the transistor 924 is turned off, and When a high potential is applied to the terminal 911, the terminal 916 The node 961 and the terminal 916 are connected via a capacitor 934. Therefore, the potential of node 961 rises to a maximum of 2 × VDD-Vth due to the bootstrap operation. Therefore, the H potential is output from the terminal 915 and the terminal 916. 63 is electrically connected to node 961 through transistor 932, so that node 9 The potential of terminal 63 remains at the H potential (more precisely, the H potential minus Vth). The output of 15 is input to a terminal 913 of a pulse output circuit 910 in the next stage.

[0060] In this specification and the like, it is assumed that the H potential is supplied to the terminal 913_i and then the terminals 915_i and and / or the period until the H potential is output from the terminal 916_i is the pulse output circuit 910 For example, the period 951 and the period 952 are called the "selection period" of the pulse output circuit 9 10_1 selection period. Also, the period 952 and the period 953 are the selection periods of the pulse output circuit 91 0-2 selection periods. In this specification, a period other than the selection period is referred to as a "non-selection period." This is called "ma".

[0061] [Period 953 (see Figure 18(B))] An L potential is supplied to a terminal 911, and an H potential (clock signal CLK2) is supplied to a terminal 912. When a high potential is supplied to the terminal 912, the transistor 921 is turned on, and The potential of the transistor 962 becomes the H potential (to be precise, the H potential minus Vth). The transistor 925 is turned on, and the node 961 is at an L potential. 7 is turned on, and an L potential is output from the terminal 915. Also, the transistor 929 The transistor is turned on, and an L potential is output from the terminal 916.

[0062] [Period 954 (see Figure 19)] An L potential is supplied to the terminal 912, and the transistor 921 is turned off. 910_1 is supplied with an H potential at the terminal 911 until an H potential is next supplied to the terminal 913. Even if the voltage Vcc is low, the L potential is output from the terminal 915 and the terminal 916 .

[0063] By repeating the above operation for each pulse output circuit 910, the first to nth stage terminals 91 6, an output signal OUT of H potential can be output in sequence.

[0064] In all the pulse output circuits 910, after outputting the output signal OUT, an H voltage is applied to the terminal 913. Until a potential is supplied, transistor 925, transistor 927, transistor 929, The source and drain of the transistor 932 are at the L potential, and the gate is at the H potential. Therefore, the transistor 925, the transistor 927, the transistor 929, and and transistor 932, a positive stress is applied to the gate during the non-selection period. It becomes a state where

[0065] Thus, transistor 925, transistor 927, transistor 929, and transistor Transistor 932 has a positive shift at its gate for most of the shift register's operating period. This results in a state where stress is applied, which can lead to a decrease in reliability due to deterioration of transistor characteristics. This is a concern.

[0066] <<Shift register according to one embodiment of the present invention>> Next, an example of the structure and operation of a shift register of one embodiment of the present invention will be described with reference to FIGS. This will be explained with reference to the following.

[0067] <Configuration of shift register 100> The shift register 100 shown in FIG. 1A has n pulse output circuits 110. In the detailed description, the first stage pulse output circuit 110 is referred to as the "pulse output circuit 110 _ When writing "1" The n-th stage pulse output circuit 110 may be referred to as a "pulse output circuit 110_n." In addition, the pulse output circuit 110 in the i-th stage is referred to as the "pulse output circuit 110 _ Sometimes it is written as "i" The terminals and output signal OUT of the pulse output circuit 110 are the same as those described above. For example, the output signal OUT of the pulse output circuit 110_i is referred to as the "output signal It may be written as "No. OUT_i".

[0068] The shift register 100 has wirings 101 to 104 to which clock signals are supplied. , a wiring 105 to which a reset signal RES is supplied, and a wiring 106 to which a signal DTY1 is supplied. a wiring 107 to which a signal DTY2 is supplied, a wiring 108 to which a signal DTY3 is supplied, The wiring 101 has a first clock signal DTY4 and a wiring 109 to which the first clock signal DTY4 is supplied. A signal CLK1 is supplied to the wiring 102, a second clock signal CLK2 is supplied to the wiring 103, and a second clock signal CLK3 is supplied to the wiring 104. A third clock signal CLK3 is supplied to the wiring 103, and a fourth clock signal CLK4 is supplied to the wiring 104. CLK4 is supplied.

[0069] The pulse output circuit 110 has terminals 111 to 118 (see FIG. 1B). The terminals 111 and 112 are electrically connected to any of the wirings 101 to 104. For example, in FIG. 1A, the first stage pulse output circuit 110_1 has a terminal 11 1 is electrically connected to the wiring 101, and the terminal 112 is electrically connected to the wiring 102. In addition, the second stage pulse output circuit 110_2 has a terminal 111 electrically connected to the wiring 102. The terminal 112 is electrically connected to the wiring 103. The terminal 114 is electrically connected to the wiring 103. 5 is electrically connected to

[0070] A start signal SP is supplied to a terminal 113 of the first-stage pulse output circuit 110_1. The output signal OUT_1 is output from the output 116. The terminal 113 of the (i-1)th stage pulse output circuit 110_i-1 is electrically connected to the terminal 115 of the (i-1)th stage pulse output circuit 110_i-1. The terminal 115 of the pulse output circuit 110_i of the i-th stage is connected to the terminal 115 of the pulse output circuit 110_i of the i+1-th stage. The pulse output circuit 110_i+1 is electrically connected to the terminal 113 of the pulse output circuit 110_i+1. An output signal OUT_i is output from a terminal 116 of the output circuit 110_i. An output signal OUT_n is output from a terminal 116 of the pulse output circuit 110_n.

[0071] The n-th stage pulse output circuit 110_n does not necessarily have to have the terminal 115. When the output circuit 110_n has a terminal 115, the terminal 115 (terminal 115_n) is connected to the It may be electrically connected to the terminal 113_1 of the pulse output circuit 110_1 of the second stage (FIG. 1(C) )reference.).

[0072] Also, the pulse output circuits 110_1 at the first stage to the (k-1)th stage (k is a natural number between 1 and n) are connected. In the pulse output circuit 110_k-1 of the first embodiment, the terminal 117 is electrically connected to the wiring 106. The terminal 118 is electrically connected to the wiring 107. In addition, the k-th stage pulse output circuit In the pulse output circuits 110_k to 110_n in the n-th stage, the terminal 117 is connected to the wiring 108. The terminal 118 is electrically connected to the wiring 109 .

[0073] [Configuration of pulse output circuit 110] Next, the configuration of the pulse output circuit 110 will be described (see FIG. 2(A)). Pulse Output The circuit 110 includes a transistor 121, a transistor 122, a transistor 124, and a transistor 126. Transistor 129, transistor 131, transistor 132, transistor 135, The transistor 125, the transistor 136, and the capacitor 134 are also included. The transistors 127, 129, and 132 are connected to the gate and back A transistor having a gate is used.

[0074] Generally, the back gate is formed of a conductive layer. The gate and back gate are both semiconductor layers. The back gate functions in the same way as the gate. The back gate potential can be the same as the gate potential or can be connected to GND. The back gate potential may be set independently of the gate potential. By changing the voltage, the threshold voltage of the transistor can be changed. In this case, either the gate or the back gate is called the "first gate" and the other is called the "second gate." It is sometimes called "port".

[0075] One of the source and the drain of the transistor 121 is electrically connected to the wiring 141. The other of the source and drain is electrically connected to node 164, and the gate is electrically connected to terminal 112. One of the source and drain of the transistor 122 is electrically connected to the wiring 141. and the other of the source and drain is electrically connected to node 164. The gate is electrically connected to the terminal 114. The source or drain of the transistor 124 One of the inputs is electrically connected to the wiring 141, and the other of the source and drain is connected to the node 16. 3 and its gate is electrically connected to terminal 113. One of the source or drain of 25 is electrically connected to node 163, and the source or drain The other drain is electrically connected to the wiring 145, and the first gate is electrically connected to the node 162. The first gate of the transistor 126 is electrically connected to the terminal 117. One of the source and the drain is electrically connected to the terminal 111. The other end is electrically connected to terminal 115, and the gate is electrically connected to node 161. One of the source and drain of the transistor 127 is electrically connected to the terminal 115. The other of the source and the drain is electrically connected to the wiring 145, and the first gate is connected to the node 1 The first gate is electrically connected to the terminal 62, and the second gate is electrically connected to the terminal 117. One of the source and drain of the transistor 128 is electrically connected to the terminal 111. The other of the drain and the gate is electrically connected to the terminal 116 and the node 161. One of the source and drain of the transistor 129 is electrically connected to the terminal 116. The other of the source and drain is electrically connected to the wiring 145, and the first gate The first gate is electrically connected to node 162 and the second gate is electrically connected to terminal 117. One of the source and drain of the transistor 131 is electrically connected to the node 164. The other of the source and drain is electrically connected to a wiring 145, and the gate is connected to a terminal 1 13. Either the source or the drain of the transistor 132 is electrically connected to the The other of the source and drain is electrically connected to node 161. The first gate is electrically connected to terminal 118 and the second gate is electrically connected to terminal 117. One of the source and drain of transistor 135 is electrically connected to node 1 64, and the other of the source and drain is electrically connected to node 162. The gate of the transistor 136 is electrically connected to the terminal 118. One of the drains is electrically connected to the node 162, and the other of the source and drain is connected to a wiring. The capacitor element 1 is electrically connected to the terminal 145, and the gate is electrically connected to the terminal 117. One electrode of 34 is electrically connected to node 161, and the other electrode is electrically connected to terminal 116. is connected to.

[0076] The pulse output circuit 110 according to one aspect of the present invention uses transistors all of the same conductivity type. Therefore, a pulse output circuit with high productivity can be realized. In this embodiment, all of the pulse output circuits 110 are n Although an example is shown in which all of these transistors are p It is also possible to replace the transistor with a channel type transistor.

[0077] [Variation 1] In addition, as in the pulse output circuit 110a shown in the circuit diagram of FIG. 2B, the transistor 121 One of the source and the drain of the transistor 124 is electrically connected to the wiring 142. Either the source or the drain of the transistor may be electrically connected to the wiring 143. The other of the source and drain of the transistor 125 is electrically connected to the wiring 146. The other of the source and drain of the transistor 127 is electrically connected to the wiring 147. The other of the source and the drain is electrically connected to the wiring 148. The other of the source and drain may be electrically connected to the wiring 149 .

[0078] The same potential may be supplied to the wirings 141 to 143, or any potential may be supplied to each of them. The same potential may be supplied to the wirings 145 to 149, or the wirings 145 to 149 may be supplied with different potentials. Any potential may be supplied to the capacitor.

[0079] [Variation 2] For example, when the gate capacitance of the transistor 128 is large enough, If the parasitic capacitance between the gate and source is large enough, the pulse output shown in the circuit diagram of Figure 3(A) Unlike the circuit 110b, the capacitor 134 does not necessarily have to be provided.

[0080] By not providing the capacitor 134, the area occupied by the pulse output circuit can be reduced. Therefore, the degree of integration of the pulse output circuit according to one embodiment of the present invention can be increased. The degree of integration of the semiconductor device according to one embodiment of the present invention can be increased. Therefore, the productivity of the pulse output circuit according to one embodiment of the present invention can be improved. The productivity of semiconductor devices can be increased.

[0081] [Variation 3] As shown in the circuit diagram of FIG. 3B, the pulse output circuit 110c has a node 164 and a wiring 145. A capacitor 137 may be provided between the first and second electrodes. The other electrode is electrically connected to the wiring 145. The other electrode of the terminal 137 may be connected to any wiring to which any potential is supplied.

[0082] By providing the capacitor 137, even when the node 164 is in a floating state, Therefore, the potential of the pulsed current source 164 can be kept more stable. The output circuit can be operated more stably. This allows the device to operate more stably.

[0083] [Variation 4] As shown in the circuit diagram of the pulse output circuit 110d in FIG. 4A, the node 162 and the wiring 145 A capacitor 138 may be provided between the first and second electrodes. The other electrode is electrically connected to the wiring 145. The other electrode of the terminal 138 may be connected to any wiring to which any potential is supplied.

[0084] By providing the capacitor 138, even when the node 162 is in a floating state, Therefore, the potential of the node 162 can be kept more stable. The output circuit can be operated more stably. This allows the device to operate more stably.

[0085] [Variation 5] In addition, as in the pulse output circuit 110e shown in the circuit diagram of FIG. 4B, the transistor 121 , transistor 122, transistor 124, transistor 126, transistor 128 , transistor 131, transistor 135, and transistor 136. A transistor having a gate may also be used.

[0086] In the pulse output circuit 110e shown in FIG. 4B, the first gate and the second gate of the transistor 121 are connected to each other. The first gate and the second gate of the transistor 122 are electrically connected. The first gate of the transistor 124 and the second gate of the transistor 125 are electrically connected to each other. The first gate and the second gate of the transistor 126 are electrically connected. The first gate and the second gate of the transistor 128 are electrically connected. The first gate and the second gate of the transistor 135 are electrically connected to each other. The first gate or the second gate of the transistor 131 is electrically connected to the One end of the port is electrically connected to the terminal 113, and the other end is electrically connected to the wiring 145. The other of the first gate and the second gate of the transistor 131 is connected to a wiring 145. The first gate and the second gate may be electrically connected to each other without being connected to each other. One of the first gate or the second gate of 36 is electrically connected to the terminal 117, and the other is The first gate of the transistor 136 is electrically connected to the wiring 145. The other side of the second gate is not connected to the wiring 145, and the first gate and the second gate are electrically connected. This may continue.

[0087] By using a transistor with a back gate, the area occupied by the pulse output circuit can be reduced. Therefore, the degree of integration of the pulse output circuit according to one embodiment of the present invention can be increased. Therefore, the degree of integration of the semiconductor device according to one embodiment of the present invention can be increased. Therefore, the productivity of the pulse output circuit according to one embodiment of the present invention can be improved. The productivity of the semiconductor device according to the embodiment can be improved. Therefore, the reliability of the semiconductor device according to one embodiment of the present invention can be improved. This can be done.

[0088] [Variation 6] Also, as in the pulse output circuit 110f shown in the circuit diagram of FIG. 5(A), the transistor 126 , the transistor 127 and the terminal 115 may be omitted. ) shows a block diagram of the pulse output circuit 110f. 5(D) shows a block diagram of a shift register 100f using the above. The terminal 116 (terminal 116_n) of the nth stage is electrically connected to the terminal 113 (terminal 113_1) of the first stage. may be connected indirectly.

[0089] Since the pulse output circuit 110f does not have the terminal 115, in the shift register 100f, The potential output to the terminal 116 of the first-stage pulse output circuit 110f is The terminal 113 of the pulse output circuit 110f of the i-th stage is input to the terminal 114 of the pulse output circuit 110f. The potential output to 116 is input to the terminal 113 of the pulse output circuit 110f of the (i+1)th stage. do.

[0090] By not providing the transistor 126, the transistor 127, and the terminal 115, the pulse The area occupied by the output circuit can be reduced, so that the pulse output circuit according to one embodiment of the present invention Furthermore, the productivity of the pulse output circuit according to one embodiment of the present invention can be improved. Therefore, the degree of integration of the semiconductor device according to one embodiment of the present invention can be increased. Furthermore, productivity of the semiconductor device according to one embodiment of the present invention can be increased.

[0091] [Variation 7] Also, as shown in the circuit diagram of FIG. 6(A), the pulse output circuit 11 0, a transistor 123 and a terminal 119 may be provided. One of the source and the drain of the transistor 123 is electrically connected to the wiring 141. The other end is electrically connected to node 164, and the gate is electrically connected to terminal 119. FIG. 6(B1) shows a block diagram of the pulse output circuit 110g. FIG. 6(C) shows the pulse A block diagram of a shift register 100g using an output circuit 110g is shown.

[0092] In the shift register 100g, the terminal 115 of the pulse output circuit 110g in the i-th stage is set to i-1 The n-th pulse output circuit 110g is electrically connected to the terminal 119 of the n-th pulse output circuit 110g. The terminal 115 of the output circuit 110g is connected to the terminal 119 of the pulse output circuit 110g of the (n-1)th stage. Make an electrical connection.

[0093] In addition, a pulse output circuit 110g_D is provided in the next stage of the n-th stage pulse output circuit 110g. , the terminal 115 of the pulse output circuit 110g_D is connected to the terminal 1 6B2 shows the pulse output circuit 110g_ A block diagram of the pulse output circuit 110g_D is shown. The pulse output circuit 110g_D supplies a signal to the terminal 119_n. Therefore, the pulse output circuit 110g_D is provided with the terminal 116 and the terminal The child 119 may not be provided.

[0094] By providing the transistor 123, the charge supply capability to the node 162 and the node 164 is improved. This increases the potential of the node 162 and the node 164, making the potentials of the nodes 162 and 164 more stable. This enables high-speed operation of the semiconductor device according to one embodiment of the present invention. According to one embodiment of the present invention, the reliability of the semiconductor device can be improved.

[0095] <Operation of shift register 100> Next, the operation of the shift register 100 shown in FIG. 1(A) will be described with reference to FIGS. 7 and 8. 7 and 8 are timing charts illustrating the operation of the shift register 100. 7 and 8, from the start of operation of the shift register 100, the terminals 116_ 1 through 116_4, the output signal OUT at H potential is output in order.

[0096] First, a reset signal RES is supplied to the wiring 105 (period 150). Next, a pulse output A start signal SP is supplied to the terminal 113_1 of the circuit 110_1 (period 151). In synchronization with the clock signal CLK1, the H potential is output from the terminal 116_1 and the terminal 115_1. The potential output from the terminal 115 is output from the terminal 116 (period 152). Therefore, the potential change at the terminal 115 is not shown in FIG. The output of the terminal 115_1 is input to the terminal 113_2. Then, the H potential is output from the terminal 116_2 (period 153). Then, in synchronization with the clock signal CLK3, the signal is input to the terminal 116_3. The output of the terminal 115_3 is input to the terminal 113_4 (during the period 1 54). Next, in synchronization with the clock signal CLK4, an H potential is output from the terminal 116_4. The output of the terminal 115_4 is input to the terminal 113_5 (period 155). In synchronization with the clock signal CLK1, the H potential is output from the terminal 116_5. The output is input to the terminal 113_6 (period 156). In this way, the first to nth stages The H potential is output in order up to the terminal 116.

[0097] Thereafter, when the start signal SP is supplied to the terminal 113_1 again, the above operation is repeated. After the start signal SP is input, the next start signal SP is input. The period in this case is called a frame period 171. As shown in FIG. 1(C) and FIG. 5(D), When the terminal 115_n and / or the terminal 116_n are electrically connected to the terminal 113_1, The output of terminal 115_n or terminal 116_n can be used as the start signal SP. The above operation can be repeated.

[0098] During a period 191, the terminal 116_k-1 outputs an H potential, and the signal DTY3 goes low. In addition, during a period 192, the terminal 116_k During the period 193, the H potential is output from the terminal 116_k+1. The signal DTY1 becomes the H potential and the signal DTY2 becomes the L potential. The period 151 to the period 153 and the period 193 are referred to as the switching period 172b. The periods 251 to 253 are referred to as a switching period 172a.

[0099] When the first frame period 171 ends, a start signal SP( H potential) is input, and the second frame period 171 begins. In the period 171, a start signal SP is supplied to the terminal 113_1 during the period 251. The terminal 116_n outputs an H potential, the signal DTY1 becomes an L potential, and the signal DTY2 becomes an H potential. During the period 252, the H potential is output from the terminal 116_1. 3, the H potential is output from the terminal 116_2, the signal DTY3 becomes the H potential, and the signal D TY4 becomes L potential.

[0100] When k=1, the k-1th stage is the nth stage, and when k=n, the k+1th stage is the 1st stage. In addition, the period 251 to the period 253 correspond to the period 151 to the period 153. Therefore, the periods 251 to 253 are also switching periods. The periods 251 to 253 and the periods 151 to 153 are also switching periods. The periods 153 are referred to as switching periods 172a.

[0101] [Operation of Pulse Output Circuit 110: Pulse Output Circuit 910_1] Next, the operation of the pulse output circuit 110 included in the shift register 100 will be described with reference to FIGS. 9 is a flow chart for explaining the operation of the first stage pulse output circuit 110_1. 10 to 12 are timing charts illustrating the operation of the pulse output circuit 110_1. FIG.

[0102] FIG. 9 shows the potential changes of the terminals 111 to 116 and the nodes 161 to 163. 9, the transistor 121, the transistor 122, the transistor 124 to transistor 129, transistor 131, transistor 132, and transistor The shift register 135 indicates whether it is in an on state or an off state. During operation of the starter 100, the H potential is supplied to the wiring 141 and the L potential is supplied to the wiring 145. do.

[0103] [Period 150 (see Figure 10(A))] After power supply to the shift register 100 is started, all pulse output circuits are A reset signal RES is supplied to the terminal 114 of the circuit 110. Also, during the period 150, the signal D The signal TY1 and the signal DTY3 are set to the L potential, and the signals DTY2 and DTY4 are set to the H potential. Therefore, the L potential is supplied to the terminal 117 of all the pulse output circuits 110, and the H potential is supplied to the terminal 118. Then, the transistors 122 and 123 of all the pulse output circuits 110 are turned on. The transistor 135 is turned on, and all the nodes 162 are set to the H potential (more precisely, H A potential of potential -Vth is supplied. The transistor 125 is turned on, and the L potential is supplied to all the nodes 161. All output signals OUT become L potential.

[0104] [Period 151 (see Figure 10(B))] The supply of the reset signal RES is stopped, and the terminals 114 of all the pulse output circuits 110 are set to the L potential. When this occurs, the transistors 122 of all the pulse output circuits 110 are turned off. When a start signal SP is supplied to the terminal 113_1, the transistor 124 and the transistor When transistor 124 is turned on, node 1 61 and the potential of node 163 become H potential (more precisely, H potential-Vth potential), The transistor 126 and the transistor 128 are turned on. The terminal 111 is at an L potential. is supplied, the outputs of terminals 115 and 116 remain at the L potential. When the transistor 131 is turned on, the potential of the node 162 becomes an L potential. The output signal of the terminal 115_i-1 of the previous stage is supplied to the terminal 113_i of the next stage and thereafter.

[0105] [Period 152 (see Figure 11(A))] An L potential is supplied to the terminal 113, and an H potential (clock signal CLK1) is supplied to the terminal 111. When the L potential is supplied to the terminal 113, the transistor 124 is turned off, and The node 161 and the node 163 are in a floating state. When this occurs, the potentials of the terminals 115_1 and 116_1 rise.

[0106] Since the node 161 and the terminal 116_1 are connected via the capacitance element 134, The potential of the node 161 rises to a maximum of 2×VDD−Vth due to the trapping action. , the H potential is output from the terminal 115 and the terminal 116. 61 through the transistor 132, the potential of the node 163 is H The output of the terminal 115 is The signal is input to a terminal 113_2 of the pulse output circuit 110_2 at the next stage.

[0107] In this specification, the terminals 115_i and 115_i are supplied with an H potential after the terminal 113_i is supplied with an H potential. During the period until the H potential is output from the terminal 116_i, the pulse output circuit 11 For example, the period 151 and the period 152 are the selection periods of the pulse output circuit 11. 0_1 selection period. In addition, the period other than the period 151 and the period 152 is the pulse output This is the non-selection period of the circuit 110_1.

[0108] [Period 153 (see Figure 11(B))] An L potential is supplied to the terminal 111_1, and an H potential (clock signal CLK2) is supplied to the terminal 112_1. When the H potential is supplied to the terminal 112_1, the transistor 121 is turned on. The potential of the node 162 becomes the H potential (to be precise, the potential of the H potential - Vth). Then, the transistor 125 is turned on, and the nodes 161 and 163 are at the L potential. In addition, the transistor 127 is turned on, and the L potential is output from the terminal 115_1. Also, the transistor 129 is turned on, and the L potential is output from the terminal 116_1. will be done.

[0109] During the period 153, the signal DTY3 goes to the H potential and the signal DTY4 goes to the L potential. .

[0110] [Period 154 (see Figure 12(A))] An L potential is supplied to the terminal 112_1, and the transistor 121 is turned off. Pulse output The circuit 110_1 keeps the H potential at the terminal 111 until the H potential is next supplied to the terminal 113_1. Even if supplied, the L potential is output from the terminal 115_1 and the terminal 116_1.

[0111] By repeating the above operation for each pulse output circuit 110, the first to nth stage terminals 11 6, an output signal OUT of H potential can be output in sequence.

[0112] [Period 193] After the period 154, the signals DTY1 and DTY4 are kept low until the switching period 172b. Therefore, the transistor 125, the signal DTY2, and the signal DTY3 are at the H potential. The first gates of the transistors 127, 129, and 132 are connected to the first gates of the transistors 127, 129, and 132. An H potential is applied to the gate, and an L potential is applied to each second gate (FIG. 12(A) )reference.).

[0113] During the switching period 172b, the signals DTY1 and DTY4 are at the H potential, and the signal DTY 2 and signal DTY3 go to the L potential. Then, transistor 125, transistor 12 7, the first gate of the transistor 129 and the first gate of the transistor 132 are at the L potential. A potential H is applied to each of the second gates (see FIG. 12(B)). Even if the potentials of the first gate and the second gate are swapped, the transistor remains on. Therefore, the output of the terminal 116_1 is also maintained.

[0114] Transistor 125, transistor 127, transistor 129, and transistor 1 32, a transistor having a first gate and a second gate is used to provide a positive voltage during a non-selection period. By switching the gate to which the stress is applied, the shift caused by the deterioration of transistor characteristics can be reduced. Therefore, the deterioration of the reliability of the resistor 100 can be reduced. The reliability of such a semiconductor device can be improved.

[0115] 13A to 13C show the start signal SP and the signals DTY1 to DTY4. In this embodiment, two switching times are performed per frame period 171. Explanation of the case where the period 172 (switching period 172a, switching period 172b) is provided (see FIG. 13A). One embodiment of the present invention is not limited thereto. For example, two or more switching periods 172 may be provided per frame period 171. Four switching periods 172 (switching periods 172a to 172d) are provided. (See FIG. 13B.) In addition, the duty ratios of the signals DTY1 to DTY4 are can be set arbitrarily (see FIG. 13C). However, according to one embodiment of the present invention, In order to improve the reliability of the semiconductor device, the duty ratios of the signals DTY1 to DTY4 are 30% to 70% is preferred, 40% to 60% is more preferred, and 45% to 55% is even more preferred. In this specification, the term "duty ratio" refers to the ratio of one frame of a specific signal to the This refers to the percentage of the period during which the potential is high during the entire period.

[0116] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0117] (Embodiment 2) In this embodiment, the pulse output circuit and the pulse output circuit shown in the above embodiment are An example of the structure of a transistor that can be used in a semiconductor device will be described.

[0118] The pulse output circuit of one embodiment of the present invention includes a bottom-gate transistor or a top-gate transistor. The semiconductor device can be manufactured using various types of transistors such as transistors. The semiconductor layer materials and transistor structures used can be easily changed to suit existing production lines. It can be replaced.

[0119] [Bottom-gate transistor] FIG. 20(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 2 is a cross-sectional view of a transistor 410. The transistor 410 is formed on a substrate 271 with an insulating layer 272 interposed therebetween. The semiconductor layer 242 is formed on the electrode 246 via the insulating layer 226. The electrode 246 can function as a gate electrode. The insulating layer 226 can function as a gate insulating layer. It can function.

[0120] The insulating layer 225 is provided on the channel formation region of the semiconductor layer 242. Electrodes 244a and 244b are provided on the insulating layer 226 in contact with a portion of the insulating layer 226. A portion of electrode 244 a and a portion of electrode 244 b are formed on insulating layer 225 .

[0121] The insulating layer 225 can function as a channel protection layer. By providing the electrode 244a and the electrode 244b, the exposure of the semiconductor layer 242 that occurs when the electrode 244a and the electrode 244b are formed can be prevented. Therefore, when the electrodes 244a and 244b are formed, the semiconductor layer This prevents the channel formation region 242 from being etched. According to this, a transistor with good electrical characteristics can be realized.

[0122] The transistor 410 is also provided with an insulating layer 225 on the electrodes 244a and 244b. The insulating layer 228 has a layer 229 on it.

[0123] When an oxide semiconductor is used for the semiconductor layer 242, the electrodes 244a and 244b At least the portion in contact with the semiconductor layer 242 is provided with oxygen by removing oxygen from a portion of the semiconductor layer 242. It is preferable to use a material that can generate oxygen vacancies. The carrier concentration in the region where the defect occurs increases, and the region becomes n-type, and the n-type region (n + layer) and Therefore, the region can function as a source region or a drain region. Examples of materials that can remove oxygen from an oxide semiconductor and cause oxygen vacancies include , tungsten, titanium, etc.

[0124] The source and drain regions are formed in the semiconductor layer 242, forming an electrode 244a In addition, the contact resistance between the electrode 244b and the semiconductor layer 242 can be reduced. The electrical characteristics of the transistor, such as the effective mobility and threshold voltage, can be improved. can.

[0125] When a semiconductor such as silicon is used for the semiconductor layer 242, the semiconductor layer 242 and the electrode 244a and between the semiconductor layer 242 and the electrode 244b, as an n-type semiconductor or a p-type semiconductor. It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. It can function as a source or drain region of a transistor.

[0126] The insulating layer 229 has a function of preventing or reducing the diffusion of impurities into the transistor from the outside. It is preferable to form the insulating layer 229 using a material having the above properties. You can also do this.

[0127] When an oxide semiconductor is used for the semiconductor layer 242, the insulating layer 229 is formed before or after the insulating layer 229 is formed. Alternatively, heat treatment may be performed before or after the formation of the insulating layer 229. The oxygen contained in the insulating layer 229 and other insulating layers is diffused into the semiconductor layer 242, Alternatively, the insulating layer 229 can be formed by heating. By doing so, oxygen vacancies in the semiconductor layer 242 can be compensated for.

[0128] The transistor 411 shown in FIG. 20A2 has a gate electrode formed on the insulating layer 229 and functioning as a back gate. The transistor 410 differs from the transistor 410 in that it has an electrode 223 that can be connected to the electrode 246. It can be formed using the same materials and methods as those described above.

[0129] <About the back gate> As mentioned above, the back gate is generally formed of a conductive layer, and the gate and back gate form a semiconductor. The back gate is arranged on both sides of the channel forming region of the semiconductor layer. The back gate may be set to the same potential as the gate electrode. The back gate potential can be set to GND potential or any other potential. By changing the voltage independently, the threshold voltage of the transistor can be changed. do.

[0130] Both electrode 246 and electrode 223 can function as gates. The insulating layer 226, the insulating layer 228, and the insulating layer 229 each function as a gate insulating layer. The electrode 223 may be provided between the insulating layer 228 and the insulating layer 229. good.

[0131] In addition, either the electrode 246 or the electrode 223 may be referred to as a "gate" or a "gate electrode." In this case, the other is called the "back gate" or "back gate electrode." In 411, when the electrode 223 is called a "gate electrode," the electrode 246 is called a "back gate." When the electrode 223 is used as a "gate electrode," the transistor 4 11 can be considered as a type of top-gate transistor. Either the electrode 221 or the electrode 223 is referred to as the "first gate" or the "first gate electrode", and the other The second gate electrode is sometimes called the "second gate" or "second gate electrode."

[0132] By providing the electrode 246 and the electrode 223 with the semiconductor layer 242 interposed therebetween, the electrode 24 6 and the electrode 223 are set to the same potential, the region where carriers flow in the semiconductor layer 242 The area becomes larger in the film thickness direction, so the amount of carrier movement increases. As the on-current of the transistor 411 increases, the field effect mobility also increases.

[0133] Therefore, the transistor 411 is a transistor having a large on-state current relative to its area. That is, the area occupied by the transistor 411 is determined based on the required on-current. According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, a highly integrated semiconductor device can be realized.

[0134] In addition, since the gate and back gate are made of conductive layers, the electric current generated outside the transistor is The function of preventing magnetic fields from acting on the semiconductor layer where the channel is formed (especially against static electricity) The back gate is formed larger than the semiconductor layer, By covering the semiconductor layer with a gate, the electric field shielding function can be improved.

[0135] The electrode 246 (gate) and the electrode 223 (back gate) are each externally Therefore, the load generated on the insulating layer 272 side or above the electrode 223 is blocked. Charges such as electrons do not affect the channel forming region of the semiconductor layer 242. As a result, stress Test (e.g., applying a negative charge to the gate - GBT (Gate Bias-Temperature Degradation due to stress tests is suppressed. This reduces the change in the gate voltage (rising voltage) at which the on-current begins to flow. This effect can be achieved whether the electrode 246 and the electrode 223 are at the same potential or different potentials. This occurs in the case of electric potential.

[0136] The GBT stress test is a type of accelerated test that measures the temperature and humidity of the battery during long-term use. It is possible to evaluate the change in characteristics (aging) of a resistor in a short time. The amount of change in the threshold voltage of a transistor before and after testing is an important factor for examining reliability. The smaller the threshold voltage fluctuation, the more reliable the transistor. can.

[0137] In addition, the electrode 246 and the electrode 223 are provided, and the electrode 246 and the electrode 223 are set to the same potential. This reduces the amount of variation in threshold voltage. At the same time, the variations in electrical characteristics are reduced.

[0138] Also, a transistor with a back gate applies a positive charge to the gate. The variation in threshold voltage before and after the back-gate test was also smaller than that of a transistor without a back gate. small.

[0139] In addition, by forming the back gate using a conductive film having a light-shielding property, the semiconductor This prevents light from entering the conductor layer. This can prevent deterioration of electrical characteristics such as a shift in the threshold voltage of the transistor.

[0140] According to one embodiment of the present invention, a highly reliable transistor can be provided. It is possible to realize a pulse output circuit, a semiconductor device, etc. with high reliability.

[0141] Figure 20(B1) shows a channel protection transistor, which is one of the bottom gate transistors. 4 shows a cross-sectional view of transistor 420. Transistor 420 has a similar structure to transistor 410. The insulating layer 225 having the openings 231a and 231b is a semiconductor layer. The opening 231a and the opening 231b are different in that they cover the semiconductor layer 242. It is formed by selectively removing a portion of the overlying insulating layer 225 .

[0142] The semiconductor layer 242 and the electrode 244a are electrically connected in the opening 231a. At the opening 231b, the semiconductor layer 242 and the electrode 244b are electrically connected. 25, the semiconductor layer 242 that is generated when the electrode 244a and the electrode 244b are formed Therefore, when the electrodes 244a and 244b are formed, the semiconductor This can prevent the layer 242 from being thinned. can function as a channel protection layer.

[0143] The transistor 421 shown in FIG. 20B2 has a gate electrode formed on the insulating layer 229 and functioning as a back gate. The transistor 420 differs from the transistor 420 in that it has an electrode 223 that can be connected.

[0144] Also, the transistors 420 and 421 are the same as the transistors 410 and 421. The distance between the electrode 244a and the electrode 246 and the distance between the electrode 244b and the electrode 246 are larger than the distance between the electrode 244a and the electrode 246 and the electrode 244b. Therefore, the distance between the electrodes 244a and 246 is increased. In addition, the parasitic capacitance generated between the electrode 244b and the electrode 246 can be reduced. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be realized. Cut.

[0145] The transistor 425 shown in FIG. 20C1 is a bottom-gate transistor. The transistor 425 is a channel-etched transistor having an insulating layer 225. Instead, the electrode 244a and the electrode 244b are formed in contact with the semiconductor layer 242. Therefore, the part of the semiconductor layer 242 that is exposed when the electrodes 244a and 244b are formed is etched. On the other hand, since the insulating layer 225 is not provided, productivity of the transistor can be improved. It can be done.

[0146] The transistor 426 shown in FIG. 20C2 has a gate electrode formed on the insulating layer 229 and functioning as a back gate. The transistor 425 differs from the transistor 425 in that it has an electrode 223 that can be connected.

[0147] [Top-gate transistor] FIG. 21A1 shows a cross-sectional view of a transistor 430, which is a type of top-gate transistor. The transistor 430 is formed by a semiconductor layer 272 on a substrate 271 via an insulating layer 272. 42, and an electrode contacting a part of the semiconductor layer 242 is provided on the semiconductor layer 242 and the insulating layer 272. and an electrode 244b in contact with a part of the semiconductor layer 242. , electrode 244a, and electrode 244b, and an insulating layer 226 is formed on the insulating layer 226. It has 46.

[0148] The transistor 430 is connected between the electrode 246 and the electrode 244a, and between the electrode 246 and the electrode 244b do not overlap, the parasitic capacitance generated between the electrode 246 and the electrode 244a, and Furthermore, the parasitic capacitance occurring between the electrode 246 and the electrode 244b can be reduced. After the electrode 246 is formed, the impurity 255 is introduced into the semiconductor using the electrode 246 as a mask. By introducing the impurities into the semiconductor layer 242, the impurities are self-aligned in the semiconductor layer 242. A pure region can be formed (see FIG. 21(A3)). A transistor with good electrical characteristics can be realized.

[0149] The introduction of the impurity 255 can be performed using an ion implantation device, an ion doping device, or a plasma treatment device. This can be done using a processing device.

[0150] The impurity 255 may be, for example, at least one of a group 13 element or a group 15 element. When an oxide semiconductor is used for the semiconductor layer 242, In this case, at least one element selected from rare gases and hydrogen is used as impurity 255. It is also possible to

[0151] The transistor 431 shown in FIG. 21A2 has an electrode 223 and an insulating layer 227. The transistor 431 is formed on the insulating layer 272. The electrode 223 has an insulating layer 227 formed on the electrode 223. The electrode 223 has a Therefore, the insulating layer 227 can function as a gate insulating layer. The insulating layer 227 can function as the insulating layer 226. It can be achieved.

[0152] Like the transistor 411, the transistor 431 has a large on-state current relative to its area. That is, for the required on-current, the transistor 4 According to one aspect of the present invention, the area occupied by the transistor 31 can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be manufactured. A body device can be realized.

[0153] The transistor 440 illustrated in FIG. 21B1 is a top-gate transistor. The transistor 440 is formed by forming the electrodes 244a and 244b on a semiconductor substrate. The transistor 430 differs from the transistor 430 in that the layer 242 is formed. The transistor 441 has an electrode 223 and an insulating layer 227. 40. In the transistor 440 and the transistor 441, the semiconductor layer 242 A part of the semiconductor layer 242 is formed on the electrode 244a, and another part of the semiconductor layer 242 is formed on the electrode 244b. will be done.

[0154] Like the transistor 411, the transistor 441 has a large on-state current relative to its area. That is, for the required on-current, the transistor 4 According to one aspect of the present invention, the area occupied by the transistor 41 can be reduced. The required area can be reduced, and therefore a highly integrated semiconductor device can be realized.

[0155] The transistor 442 illustrated in FIG. 22A1 is a top-gate transistor. The transistor 442 has an electrode 244a and an electrode 244b on the insulating layer 229. The electrodes 244a and 244b are formed on the insulating layers 228 and 229. The opening is electrically connected to the semiconductor layer 242 .

[0156] Also, a part of the insulating layer 226 that does not overlap with the electrode 246 is removed. A portion of the insulating layer 226 of the electrode 442 extends beyond the end of the electrode 246 .

[0157] The electrode 246 and the insulating layer 226 are used as a mask to introduce impurities 255 into the semiconductor layer 242. By this, an impurity region is formed in the semiconductor layer 242 in a self-aligned manner. This can be done (see FIG. 22(A3)).

[0158] At this time, the impurity 255 is not introduced into the region of the semiconductor layer 242 that overlaps with the electrode 246, and the electrode Impurities 255 are introduced into the region that does not overlap with the insulating layer 246. The impurity concentration in the region where the impurity 255 is introduced through the insulating layer 226 is The electrode 246 in the semiconductor layer 242 is lower than the region where the impurity 255 is introduced. An LDD (Lightly Doped Drain) region is formed in the adjacent region.

[0159] The transistor 443 shown in FIG. 22A2 has an electrode 223 below the semiconductor layer 242. The electrode 223 is connected to the semiconductor layer 221 via an insulating layer 272. 242. The electrode 223 can function as a back gate electrode.

[0160] In addition, the transistor 444 shown in FIG. 22B1 and the transistor shown in FIG. 22B2 Like the area 445, the insulating layer 226 may be entirely removed in areas that do not overlap with the electrode 246. In addition, the transistor 446 shown in FIG. 22(C1) and the transistor shown in FIG. 22(C2) As in the case of the insulating layer 226, the insulating layer 226 may be left without being removed except for the opening.

[0161] The transistors 444 to 447 are also formed by forming the electrode 246. As a result, the semiconductor layer 242 is doped with impurities 255 using the mask. An impurity region can be formed in a self-aligned manner.

[0162] [s-channel transistor] FIG. 23 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 242. In FIG. FIG. 23A is a top view of the transistor 451. FIG. 23B is a top view of the transistor 451 shown in FIG. This is a cross-sectional view of the portion L1-L2 indicated by the dashed line (cross-sectional view in the channel length direction). 23(C) is a cross-sectional view of the portion W1-W2 indicated by the dashed line in FIG. 23(A) (in the channel width direction). (cross-sectional view).

[0163] The transistor 451 includes a semiconductor layer 242, an insulating layer 226, an insulating layer 272, an insulating layer 282, and an insulating layer 290. The edge layer 274 includes an electrode 224, an electrode 243, an electrode 244a, and an electrode 244b. Electrode 243 can function as a gate. Electrode 224 can function as a back gate. The insulating layer 226, the insulating layer 272, the insulating layer 282, and the insulating layer 274 serve as gate insulating layers. The electrode 244a can function as either a source electrode or a drain electrode. The electrode 244b can function as the other of the source electrode or the drain electrode.

[0164] An insulating layer 275 is provided on the substrate 271, and the electrode 224 and the insulating layer 27 are provided on the insulating layer 275. 3 is provided. In addition, an insulating layer 274 is provided on the electrode 224 and the insulating layer 273. Furthermore, an insulating layer 282 is provided on the insulating layer 274, and an insulating layer 27 is provided on the insulating layer 282. 2 is provided.

[0165] The semiconductor layer 242a is provided on the protrusion formed on the insulating layer 272, and the semiconductor layer 242a A semiconductor layer 242b is provided on the semiconductor layer 242b. An electrode 244a, The semiconductor layer 242b has a region overlapping with the electrode 244a. , can function as one of the source and drain of the transistor 451. The region overlapping with the electrode 244b of the transistor 451 is the other of the source and drain of the transistor 451. It can function as such.

[0166] In addition, a semiconductor layer 242c is provided in contact with a part of the semiconductor layer 242b. An insulating layer 226 is provided on the conductor layer 242c, and an electrode 243 is provided on the insulating layer 226. are.

[0167] The transistor 451 is formed on the upper surface and side surface of the semiconductor layer 242b in the region W1-W2. The side surface of the semiconductor layer 242a is covered with the semiconductor layer 242c. By providing the semiconductor layer 242b above the protrusions provided on the layer 272, the side of the semiconductor layer 242b The surface can be covered with the electrode 243. That is, the transistor 451 can The semiconductor layer 242b can be electrically surrounded by the field. In this way, the electric field of the conductive film electrically surrounds the semiconductor layer where the channel is formed. The structure of the transistor is a surrounded channel (s-channel) structure. A transistor with an s-channel structure is called an "s-channel It is also called an "s-channel transistor" or "s-channel transistor."

[0168] In the s-channel structure, a channel is formed in the entire (bulk) semiconductor layer 242b. In the s-channel structure, the drain current of the transistor can be increased. Furthermore, the electric field of the electrode 243 can As a result, the entire channel formation region formed in the semiconductor layer 242b can be depleted. Therefore, in the s-channel structure, the off-state current of the transistor can be further reduced. It is possible.

[0169] In addition, by increasing the height of the protrusions of the insulating layer 272 and reducing the channel width, the s-channel The effect of increasing the on-current and reducing the off-current due to the n-type structure can be further enhanced. Furthermore, when processing the semiconductor layer 242b, the exposed semiconductor layer 242a may be removed. In this case, the side surfaces of the semiconductor layer 242a and the semiconductor layer 242b may be aligned.

[0170] In addition, the insulating layer 228 is provided over the transistor 451, and the insulating layer 229 is provided over the insulating layer 228. On the insulating layer 229, an electrode 225a, an electrode 225b, and an electrode 225c are provided. The electrode 225a is provided on the insulating layer 229 and the insulating layer 228. The opening is electrically connected to the electrode 244a via a contact plug. 225b is an opening provided in the insulating layer 229 and the insulating layer 228, and is a contact plug. The electrode 225c is electrically connected to the electrode 244b via the insulating layer 229 and An opening provided in the insulating layer 228 is electrically connected to the electrode 243 via a contact plug. It continues.

[0171] The insulating layer 282 may be made of hafnium oxide, aluminum oxide, tantalum oxide, or aluminum. By forming the insulating layer 282 from silicate or the like, it is possible to make the insulating layer 282 function as a charge trapping layer. By injecting electrons into the insulating layer 282, the threshold voltage of the transistor can be changed. Electrons can be injected into the insulating layer 282 by using, for example, the tunnel effect. By applying a positive voltage to the electrode 224, tunnel electrons are injected into the insulating layer 282. You can enter.

[0172] [Energy band structure of semiconductor layer 242 (1)] Here, the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c are stacked. The function and effect of the semiconductor layer 242 formed will be explained using the energy The band structure will be explained using the diagram of FIG. 31(A). In other words, Figure 31(A) shows the energy band structure of the region indicated by 4 shows the energy band structure of the channel formation region of the transistor 451.

[0173] In Figure 31(A), Ec382, Ec383a, Ec383b, Ec383c, Ec386 are the insulating layer 272, the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c, respectively. , indicates the energy of the conduction band minimum of the insulating layer 226.

[0174] Here, the electron affinity is the energy difference between the vacuum level and the top of the valence band (the "ionization potential"). It is the value obtained by subtracting the band gap from the Using a spectroscopic ellipsometer (HORIBA JOBIN YVON UT-300) The energy difference between the vacuum level and the top of the valence band can be measured by ultraviolet photoelectron spectroscopy ( UPS:Ultraviolet Photoelectron Spectrosco Measurement can be performed using a PHI VersaProbe device.

[0175] The In-Ga was formed using a target with an atomic ratio of In:Ga:Zn=1:3:2. The band gap of α-Zn oxide is approximately 3.5 eV and the electron affinity is approximately 4.5 eV. In addition, the In-Ga was formed using a target with an atomic ratio of In:Ga:Zn=1:3:4. The band gap of Zn-oxide is about 3.4 eV and the electron affinity is about 4.5 eV. , In-Ga- formed using a target with an atomic ratio of In:Ga:Zn=1:3:6 The band gap of ZnO is about 3.3 eV and the electron affinity is about 4.5 eV. In-Ga-Z formed using a target with an atomic ratio of In:Ga:Zn=1:6:2 The band gap of n-oxide is about 3.9 eV and the electron affinity is about 4.3 eV. In-Ga-Zn formed using a target with a molecular ratio of In:Ga:Zn=1:6:8 The band gap of the oxide is about 3.5 eV and the electron affinity is about 4.4 eV. In-Ga-Zn formed using a target with a numerical ratio of In:Ga:Zn=1:6:10 The band gap of the oxide is about 3.5 eV and the electron affinity is about 4.5 eV. In-Ga-Zn oxide formed using a target with a numerical ratio of In:Ga:Zn=1:1:1 The band gap of the oxide is about 3.2 eV, and the electron affinity is about 4.7 eV. In-Ga-Zn oxide formed using a target with a ratio of In:Ga:Zn=3:1:2 The band gap of the material is approximately 2.8 eV and the electron affinity is approximately 5.0 eV.

[0176] Since the insulating layer 272 and the insulating layer 226 are insulators, Ec382 and Ec386 are It is closer to the vacuum level than 3a, Ec383b, and Ec383c (it has a smaller electron affinity). ).

[0177] Also, Ec383a is closer to the vacuum level than Ec383b. is 0.07 eV or more and 1.3 eV or less than Ec383b, preferably 0.1 eV or more and 0.07 eV or less than Ec383b. 0.7 eV or less, more preferably 0.15 eV to 0.4 eV, close to the vacuum level. preferable.

[0178] Also, Ec383c is closer to the vacuum level than Ec383b. is 0.07 eV or more and 1.3 eV or less than Ec383b, preferably 0.1 eV or more and 0.07 eV or less than Ec383b. 0.7 eV or less, more preferably 0.15 eV to 0.4 eV, close to the vacuum level. preferable.

[0179] Here, between the semiconductor layer 242a and the semiconductor layer 242b, there is a semiconductor layer 242a and a semiconductor layer 242b. In some cases, the semiconductor layer 242b and the semiconductor layer 242c are mixed. There may be a mixed region of the semiconductor layer 242b and the semiconductor layer 242c between them. The interface state density is low in the overlap region. The stack of the semiconductor layer 242c and the semiconductor layer 242d has a structure in which energy is continuously distributed near the interfaces of the semiconductor layer 242c and the semiconductor layer 242d. This results in a band structure that changes (also called a continuous junction).

[0180] At this time, the electrons are not in the semiconductor layer 242a and the semiconductor layer 242c, but in the semiconductor layer 2 Therefore, the electrons move mainly through the semiconductor layer 242a and the semiconductor layer 242b. Interface state density at the interface, the interface between the semiconductor layer 242b and the semiconductor layer 242c By lowering the level density, the movement of electrons in the semiconductor layer 242b is inhibited. Therefore, the on-state current of the transistor 451 can be increased.

[0181] In addition, the interface between the semiconductor layer 242a and the insulating layer 272, and the interface between the semiconductor layer 242c and the insulating layer 226 Although trap levels 390 due to impurities and defects can be formed near the interface, The presence of the conductor layer 242a and the semiconductor layer 242c allows the semiconductor layer 242b and the This allows the rapping level to be kept away.

[0182] When the transistor 451 has an s-channel structure, the region W1-W2 Therefore, a channel is formed in the entire semiconductor layer 242b. The thicker the semiconductor layer 242b, the larger the channel region. For example, the on-current of the capacitor 451 can be increased by 10 nm or more, preferably 40 nm or more. A region having a thickness of 100 nm or more, more preferably 60 nm or more, and even more preferably 100 nm or more. However, the semiconductor device having the transistor 451 may be a semiconductor layer 242b. Therefore, for example, it is preferable that the thickness is 300 nm or less, preferably 200 nm or less. The semiconductor layer 242b may have a thickness of 150 nm or less. As the channel formation region shrinks, the thinner the semiconductor layer 242b, the more the transistor Therefore, the thickness of the semiconductor layer 242b is preferably less than 10 nm. may be.

[0183] In order to increase the on-state current of the transistor 451, the thickness of the semiconductor layer 242c is small. For example, it is less than 10 nm, preferably 5 nm or less, and more preferably 3 The semiconductor layer 242c may have a region of 100 nm or less. The semiconductor layer 242b in which the channel is formed is doped with elements other than oxygen (water) that constitute the adjacent insulator. It has the function of blocking the penetration of elements such as silicon and silicon dioxide. It is preferable that 242c has a certain thickness. For example, it is preferable that it is 0.3 nm or more. a semiconductor layer 242c having a region with a thickness of at least 1 nm, more preferably at least 2 nm; Just do that.

[0184] In order to increase reliability, the semiconductor layer 242a is thick and the semiconductor layer 242c is thin. For example, it is preferably 10 nm or more, more preferably 20 nm or more, and even more preferably 40 If the semiconductor layer 242a has a region with a thickness of 60 nm or more, more preferably 60 nm or more, By increasing the thickness of the semiconductor layer 242a, the adjacent insulator and the semiconductor layer 242a The distance from the interface with the semiconductor layer 242b where the channel is formed can be increased. However, productivity of a semiconductor device including the transistor 451 may decrease. For example, the thickness is 200 nm or less, preferably 120 nm or less, and more preferably 80 nm or less. The semiconductor layer 242a may have the above-mentioned region.

[0185] Note that silicon in an oxide semiconductor may become a carrier trap or a carrier generation source. Therefore, the lower the silicon concentration of the semiconductor layer 242b, the more preferable. Between the layer 242b and the semiconductor layer 242a, for example, secondary ion mass spectroscopy (SIMS: 1×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than, more Preferably 2 x 10 18 atoms / cm 3 It has a region where the silicon concentration is less than In addition, a 1×10 19 a toms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than, even more preferred Kuha 2 x 10 18 atoms / cm 3 The silicon concentration is less than 1000 .mu.m.

[0186] In order to reduce the hydrogen concentration in the semiconductor layer 242b, the semiconductor layer 242a and the semiconductor layer It is preferable to reduce the hydrogen concentration in the semiconductor layer 242a and the semiconductor layer 242c. , 2×10 in SIMS 20 atoms / cm 3 Less than or equal to 5 x 10 19 a toms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 Below are some more good ones: Preferably 5 x 10 18 atoms / cm 3 The hydrogen concentration range is as follows:

[0187] Note that when copper is mixed into an oxide semiconductor, electron traps may be generated. The flip-flop may cause the threshold voltage of the transistor to shift in the positive direction. The copper concentration on the surface or inside of the semiconductor layer 242b is preferably as low as possible. Layer 242b, copper concentration 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 or less, or 1 x 10 18 atoms / cm 3 It is preferable to have a region where: .

[0188] The above-mentioned three-layer structure is an example. For example, a semiconductor layer without the semiconductor layer 242a or the semiconductor layer 242c Alternatively, a two-layer structure may be used. 242c, a semiconductor layer 242a, a semiconductor layer 242b, and a semiconductor layer 242c are provided above or below the semiconductor layer 242a, a semiconductor layer 242b, and a semiconductor layer 242c. Alternatively, a four-layer structure may be used, which includes any one of the semiconductors exemplified above. Above layer 242a, below semiconductor layer 242a, above semiconductor layer 242c, below semiconductor layer 242c The semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c are disposed in two or more locations. It may also be a g-layer structure (g is an integer of 5 or more) having one of the semiconductors exemplified above. do not have.

[0189] In particular, the transistor 451 described in this embodiment has a semiconductor The upper surface and side surfaces of the layer 242b are in contact with the semiconductor layer 242c, and the lower surface of the semiconductor layer 242b is in contact with the semiconductor layer In this way, the semiconductor layer 242b is formed in contact with the semiconductor layer 242a. By covering the semiconductor layer 242c, the influence of the trap level can be further reduced. This can be done.

[0190] The band gaps of the semiconductor layer 242a and the semiconductor layer 242c are It is preferable that the band gap is wider than that of b.

[0191] According to one embodiment of the present invention, a transistor with little variation in electrical characteristics can be provided. Therefore, a semiconductor device with little variation in electrical characteristics can be realized. According to one embodiment, a highly reliable transistor can be realized. Therefore, a semiconductor device with good performance can be realized.

[0192] In addition, the band gap of oxide semiconductors is 2 eV or more, so the semiconductor in which the channel is formed A transistor using an oxide semiconductor for its semiconductor layer (also called an OS transistor) The current can be made extremely small. Specifically, the voltage between the source and drain is 3.5 V, and at room temperature (25°C), the off-state current per 1 μm of channel width is 1×10 -20 A Less than 1×10 -22 Less than A or 1 x 10 -24 It can be less than A. That is, the on / off ratio can be set to 20 or more digits and 150 or less digits. The OS transistor has a high withstand voltage between the source and drain. It is possible to provide a semiconductor device having a high withstand voltage.

[0193] According to one embodiment of the present invention, a transistor with low power consumption can be provided. As a result, a semiconductor device with low power consumption can be realized.

[0194] Depending on the purpose, the electrode 224 that can function as a back gate may not be provided. FIG. 24A is a top view of the transistor 451a. 24(A) is a cross-sectional view of the portion L1-L2 indicated by the dashed line in FIG. The transistor 451a is a cross-sectional view of a portion W1-W2 indicated by a dashed line. The electrode 224, the insulating layer 273, the insulating layer 274, and the insulating layer 282 are omitted from the electrode 451. By eliminating the need for electrodes and insulating layers, the productivity of transistors can be improved. Therefore, the productivity of the semiconductor device can be improved.

[0195] Another example of an s-channel transistor is shown in FIG. 25. FIG. 25(A) shows a transistor. 25(B) and 25(C) are top views of the star 452. 10 is a cross-sectional view of a portion L1-L2 and a portion W1-W2 indicated by a chain line.

[0196] The transistor 452 has the same configuration as the transistor 451, but the electrodes 244a and The difference is that the electrodes 244a and 244b are in contact with the side surfaces of the semiconductor layers 242a and 242b. In addition, the insulating layer 228 covering the transistor 452 may be formed using the same insulating layer as the transistor 451. An insulating layer having a flat surface may be used. A pole 225b and an electrode 225c may be provided.

[0197] Another example of an s-channel transistor is shown in FIG. 26. FIG. 26(A) shows a transistor. 26(B) is a top view of the part L indicated by the dashed line in FIG. 1-L2 and a cross-sectional view of the portion W1-W2. As in the case of 51, the semiconductor layer 242a and the semiconductor layer 242b are formed on the protrusions provided on the insulating layer 272. In addition, an electrode 244a and an electrode 244b are provided on the semiconductor layer 242b. A region of the semiconductor layer 242b overlapping with the electrode 244a is a region of the transistor 453. The semiconductor layer 242b overlaps with the electrode 244b. The other region can function as the source or drain of the transistor 453. The region 269 of the semiconductor layer 242b sandwiched between the electrodes 244a and 244b is a channel. It can function as a hole-forming region.

[0198] The transistor 453 is formed by removing a part of the insulating layer 228 to form an opening in the region overlapping the region 269. A semiconductor layer 242c is provided along the side and bottom surfaces of the opening. An insulating layer is formed in the opening via the semiconductor layer 242c and along the side and bottom surfaces of the opening. In addition, the semiconductor layer 242c and the insulating layer 226 are formed in the opening. An electrode 243 is provided through the opening and along the side and bottom surfaces of the opening.

[0199] The opening is formed between the semiconductor layer 242a and the semiconductor layer 24 in the cross section in the channel width direction. Therefore, in the region 269, the semiconductor layer 242a and The side surfaces of the semiconductor layer 242b are covered with the semiconductor layer 242c.

[0200] In addition, an insulating layer 229 is provided on the insulating layer 228, and an insulating layer 277 is provided on the insulating layer 229. In addition, electrodes 225a, 225b, and 225c are provided on the insulating layer 277. The electrode 225a is provided with an insulating layer 277, an insulating layer 229, and an insulating layer 228. In the opening formed by removing a part of the electrode 244a, an electrical connection is established between the electrode 244a and the contact plug. The electrode 225b is electrically connected to the insulating layer 277, the insulating layer 229, and the insulating In the opening formed by removing a portion of the layer 228, an electrode 244 is formed via a contact plug. b. The electrode 225c is electrically connected to the insulating layer 277 and the insulating layer 229. In the opening formed by removing a part of the is connected to.

[0201] Depending on the purpose, the electrode 224 that can function as a back gate may not be provided. FIG. 27A is a top view of the transistor 453a. 1 is a cross-sectional view of a portion L1-L2 and a portion W1-W2 indicated by a dashed line in FIG. 453a is a transistor 453 from the electrode 224, the insulating layer 274, and the insulating layer 282. By not providing these electrodes and insulating layers, the productivity of the transistor is improved. Therefore, the productivity of the semiconductor device can be improved.

[0202] Another example of an s-channel transistor is shown in FIG. 28. FIG. 28(A) shows a transistor. 28(B) is a top view of the part L1 indicated by the dashed line in FIG. 28(C) is a cross-sectional view of the area W1-W2 indicated by the dashed line in FIG. 2 is a cross-sectional view of FIG.

[0203] The transistor 454 is a type of bottom-gate transistor having a back gate electrode. In the transistor 454, the electrode 243 is formed over the insulating layer 274. An insulating layer 226 is provided to cover the electrode 243. The semiconductor layer 242 included in the transistor 454 is a semiconductor It has a stack of a conductor layer 242a and a semiconductor layer 242b.

[0204] In addition, an electrode 244a and an electrode 244b are formed on the insulating layer 226 in contact with a part of the semiconductor layer 242. In addition, an electrode 244a and an electrode 244b are formed in contact with a part of the semiconductor layer 242. An insulating layer 228 is formed on the insulating layer 44b. An insulating layer 229 is formed on the insulating layer 228. An electrode 224 is formed on the insulating layer 229 in a region overlapping with the semiconductor layer 242. It is being done.

[0205] The electrode 224 provided on the insulating layer 229 is connected to the insulating layer 229, the insulating layer 228, and the insulating layer 229. The openings 247a and 247b in the electrode 226 are electrically connected to the electrode 243. Therefore, the same potential is supplied to the electrode 224 and the electrode 243. It is not necessary to provide either the opening 247a or the opening 247b. It is not necessary to provide both the opening 247a and the opening 247b. If no electrode is provided, different potentials can be applied to the electrode 224 and the electrode 243 .

[0206] [Energy band structure of semiconductor layer 242 (2)] FIG. 31(B) shows the energy band structure of the portion indicated by the dashed line D3-D4 in FIG. 28(B). FIG. 31B shows the energy band of the channel formation region of the transistor 454. The structure is shown.

[0207] In FIG. 31B, Ec384 indicates the energy of the bottom of the conduction band of the insulating layer 228. By forming the semiconductor layer 242 into two layers, the semiconductor layer 242a and the semiconductor layer 242b, a transistor In addition, since the semiconductor layer 242c is not provided, the trap level 390, but the semiconductor layer 242 is more susceptible to the influence of the electric field 390 than when the semiconductor layer 242 has a single layer structure. Effective mobility can be achieved.

[0208] Depending on the purpose, the electrode 224 that can function as a back gate may not be provided. FIG. 29(A) is a top view of the transistor 454a. is a cross-sectional view of the portion L1-L2 and the portion W1-W2 shown by the dashed line in FIG. 29(A). The transistor 454a is connected to the electrode 224, the opening 247a, and the By omitting these electrodes and openings, Therefore, the productivity of the semiconductor device can be improved. do.

[0209] FIG. 30 shows an example of a transistor having an s-channel structure. The transistor 448 has almost the same configuration as the transistor 447 described above. The transistor 448 is a type of top-gate transistor having a back gate. FIG. 30(A) is a top view of the transistor 448. FIG. 30(B) is a top view of the transistor 448. 30(C) is a cross-sectional view of the portion L1-L2 indicated by the dashed line in FIG. 1 is a cross-sectional view of the portion W1-W2 indicated by the arrow.

[0210] FIG. 30 shows a semiconductor layer 242 constituting a transistor 448, which is an inorganic semiconductor layer such as silicon. 30 shows an example of a configuration in which an electrode 224 is provided on a substrate 271. An insulating layer 272 is provided on the electrode 224. A semiconductor layer 242 is formed on the protrusion.

[0211] The semiconductor layer 242 includes a semiconductor layer 242i, two semiconductor layers 242t, and two semiconductor layers 242i. The semiconductor layer 242i is disposed between two semiconductor layers 242t. In addition, the semiconductor layer 242i and the two semiconductor layers 242t are disposed between the two semiconductor layers 242u. An electrode 243 is provided in a region overlapping with the semiconductor layer 242i.

[0212] When the transistor 448 is in an on state, a channel is formed in the semiconductor layer 242i. The semiconductor layer 242i functions as a channel formation region. The semiconductor layer 242u functions as a high concentration impurity region (LDD region). It should be noted that one or both of the two semiconductor layers 242t may function as a semiconductor layer 242. 42t may not be provided. 2u functions as a source region, and the other semiconductor layer 242u functions as a drain region. .

[0213] The electrode 244a provided on the insulating layer 229 is connected to the insulating layer 226, the insulating layer 228, and the insulating layer 229. An opening 247c is provided in the layer 229, and the opening 247c is electrically connected to one of the semiconductor layers 242u. The electrode 244b provided on the insulating layer 229 is connected to the insulating layer 226 and the insulating layer 229. 28 and the other side of the semiconductor layer 242u in the opening 247d provided in the insulating layer 229. and is electrically connected.

[0214] The electrode 243 provided on the insulating layer 226 is connected to the insulating layer 226 and the insulating layer 272. The electrode 224 is electrically connected to the opening 247a and the opening 247b. Therefore, the same potential is supplied to the electrode 243 and the electrode 224. It is not necessary to provide either the opening 247a or the opening 247b. In the case where both the openings 247a and 247b are not provided, In this case, different potentials can be applied to the electrodes 243 and 224 .

[0215] <Film formation method> The conductive layers, insulating layers, and semiconductor layers such as electrodes shown in this specification are formed by chemical vapor deposition (CVD). Vapor Deposition (Vapor Deposition), evaporation, or sputtering Generally, the CVD method is a plasma CVD method that uses plasma. (PECVD: Plasma Enhanced CVD) method, thermal CVD ( Thermal CVD (TCVD) methods are also available. Atmospheric Pressure CVD (APCVD) method Furthermore, depending on the source gas used, there are metal CVD (MCVD) method, metal organic CVD (MOCVD) method, etc. can.

[0216] Generally, the evaporation method includes resistance heating evaporation, electron beam evaporation, MBE (Molecular Beam Evaporation), Beam Epitaxy) method, PLD (Pulsed Laser Deposit) ion) method, IAD (Ion beam Assisted Deposition) method , ALD (Atomic Layer Deposition) method, etc.

[0217] The plasma CVD method can produce high-quality films at relatively low temperatures. When using a deposition method that does not use plasma during deposition, damage to the surface to be deposited may occur. Moreover, a film with few defects can be obtained.

[0218] Generally, the sputtering method is classified into DC sputtering method, magnetron sputtering method, sputtering, RF sputtering, ion beam sputtering, ECR (Electro Cyclotron Resonance (Cyclotron Resonance) sputtering method, facing target sputtering They can be classified into methods such as the tarring method.

[0219] In the facing target sputtering method, the plasma is confined between the targets. It is possible to reduce plasma damage to the substrate. Also, depending on the tilt of the target, This allows the incident angle of sputtering particles onto the substrate to be shallow, improving step coverage. It can be done.

[0220] The CVD and ALD methods are film formation methods in which particles emitted from a target or the like are deposited. Unlike the conventional method, this is a film formation method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film formation method that is less affected by the shape of the workpiece and has good step coverage. In particular, the ALD method has excellent step coverage and thickness uniformity, making it suitable for aspect ratio However, the ALD method is relatively Because the deposition rate is slow, it is used in combination with other deposition methods such as CVD, which has a faster deposition rate. In some cases, this is preferable.

[0221] In the CVD and ALD methods, the composition of the resulting film can be controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any desired value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having a composition. By changing the flow rate ratio of the source gases while When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film by hand, the time required for film formation is shortened by the time required for transport and pressure adjustment. Therefore, the productivity of transistors and semiconductor devices can be improved. There are cases where this happens.

[0222] <Substrate> There is no particular limitation on the material used for the substrate 271. Depending on the purpose, the material may be transparent or non-transparent, or may be heat-treated. The material should be selected taking into consideration the heat resistance required to withstand the heat. Glass substrates such as glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, and surface treatment substrates. The substrate 271 may be a semiconductor substrate, a flexible substrate, or the like. (Flexible substrate), laminated film, base film, etc. may also be used.

[0223] The semiconductor substrate may be a single semiconductor made of silicon or germanium, for example. Conductor substrate, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of silicon, zinc oxide, or gallium oxide are also available. The semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0224] Examples of materials for flexible substrates, laminating films, and base films include polyethylene. polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyether Polypropylene (PES), Polytetrafluoroethylene (PTFE), Polypropylene, Poly Ester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon , aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic Resins and the like can be used.

[0225] The flexible substrate used for the substrate 271 is preferably one having a lower linear expansion coefficient, since deformation due to the environment is suppressed. The flexible substrate used for the substrate 271 has a linear expansion coefficient of, for example, 1×10 -3 / K or less, 5 x10 -5 / K or less, or 1×10 -5 / K or less. Since ramid has a low linear expansion coefficient, it is suitable for a flexible substrate.

[0226] <Insulating layer> Insulating layer 272, insulating layer 273, insulating layer 274, insulating layer 275, insulating layer 282, insulating layer 22 8, the insulating layer 226, the insulating layer 229, and the insulating layer 277 are made of aluminum nitride, aluminum oxide, or the like. Aluminum, aluminum oxide nitride, aluminum oxide nitride, magnesium oxide, silicon nitride Silicon oxide, silicon oxide nitride, silicon oxynitride, gallium oxide, germanium oxide tungsten oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide The materials selected from aluminum, tantalum oxide, aluminum silicate, etc. are used in a single layer or In addition, oxide materials, nitride materials, oxynitride materials, and oxynitride materials are also used. That is, a material in which a plurality of materials are mixed may be used.

[0227] In this specification, the term "nitride oxide" refers to a compound containing more nitrogen than oxygen. Also, oxynitrides refer to compounds that contain more oxygen than nitrogen. The content of Measurements can be made using techniques such as kScattering Spectrometry. .

[0228] In particular, the insulating layer 275 and the insulating layer 229 are formed using an insulating material that is difficult for impurities to penetrate. For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, A single layer of insulating material containing zirconium, lanthanum, neodymium, hafnium or tantalum For example, oxide films can be used as insulating materials that are difficult for impurities to penetrate. Aluminum, Aluminum Nitride, Aluminum Oxide Nitride, Aluminum Oxide Nitride, Oxide Gallium, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, acid Examples of the oxide include neodymium oxide, hafnium oxide, tantalum oxide, and silicon nitride. The insulating layer 273 or the insulating layer 229 may be made of indium tin zinc oxide (I n-Sn-Zn oxide) may also be used.

[0229] By using an insulating material that is difficult for impurities to penetrate for the insulating layer 275, impurities from the substrate 271 side can be prevented. The diffusion of impurities can be suppressed, and the reliability of the transistor can be improved. By using an insulating material that is difficult for objects to penetrate, the diffusion of impurities from the insulating layer 229 side is suppressed. This can improve the reliability of the transistor.

[0230] Insulating layer 272, insulating layer 273, insulating layer 274, insulating layer 282, insulating layer 228, insulating layer 22 6, the insulating layer 229, and the insulating layer 277 are formed of a plurality of insulating layers made of these materials. The insulating layer 272, the insulating layer 273, the insulating layer 274, the insulating layer 282, and the insulating layer 283 may be laminated. The methods for forming the edge layer 228, the insulating layer 226, the insulating layer 229, and the insulating layer 277 are not particularly limited. Sputtering, CVD, MBE, PLD, ALD, spin coating Various forming methods can be used.

[0231] For example, when forming an aluminum oxide film using thermal CVD, the solvent and aluminum The raw material gas is a vaporized liquid containing a precursor compound (e.g., TMA), and H2O is used as an oxidizer. The chemical formula of trimethylaluminum is Al(CH3)3. Other liquid materials include tris(dimethylamido)aluminum and triisobutene. Aluminum tris(2,2,6,6-tetramethyl-3,5-heptyl) Tandione, etc.

[0232] In addition, when an oxide semiconductor is used for the semiconductor layer 242, the hydrogen concentration in the semiconductor layer 242 is In order to prevent this increase, it is preferable to reduce the hydrogen concentration in the insulating layer. It is preferable to reduce the hydrogen concentration in the insulating layer in contact with 2. Specifically, The concentration was 2×10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 Below, More preferably 5×10 18 atoms / cm 3 The following applies.

[0233] The concentration measured by SIMS analysis may vary by ±40%. There is.

[0234] When an oxide semiconductor is used for the semiconductor layer 242, oxygen is released from the insulating layer by heating. It is preferable to form the insulating layer using an insulating layer containing excess oxygen (also called an "insulating layer containing excess oxygen"). In particular, the insulating layer in contact with the semiconductor layer 242 preferably contains excess oxygen. For example, the surface temperature of the insulating layer is 100°C or higher and 700°C or lower, preferably 100°C or lower. In TDS analysis, which is performed at a temperature of 500°C or less, the desorption of oxygen converted to oxygen atoms is The separation is 1.0 x 10 18 atoms / cm 3 That's it, 1×10 19 atoms / cm 3 End , or 1.0 × 10 20 atoms / cm 3 An insulating layer having the above properties is preferred.

[0235] Alternatively, an insulating layer containing excess oxygen can be formed by adding oxygen to an insulating layer. The process of adding oxygen can be carried out by heat treatment under an oxygen atmosphere, ion implantation equipment, ion doping equipment, etc. This can be done using a doping device or a plasma treatment device. As a gas, 16 O2 or 18 Oxygen gas such as O2, nitrous oxide gas or ozone In this specification, the process of adding oxygen is referred to as "oxygen doping." Also called "processing."

[0236] In addition, by forming an insulating layer by a sputtering method in an atmosphere containing oxygen, Oxygen can be introduced into

[0237] Generally, a capacitance element has a structure in which a dielectric is sandwiched between two opposing electrodes. The thinner the thickness (the shorter the distance between the two opposing electrodes), and the higher the dielectric constant of the dielectric However, the thinner the dielectric, the larger the capacitance value. The current that flows unintentionally between the two electrodes due to the tunnel effect, etc. (hereinafter referred to as "leak") The capacitance element's breakdown voltage is likely to decrease. do.

[0238] The overlapping portion of the gate electrode, gate insulating layer, and semiconductor layer of the transistor acts as a capacitance element. (Hereinafter, this function is also referred to as "gate capacitance"). A channel is formed in the region where the gate electrode overlaps. The formation region functions as two electrodes of the capacitor element. It is preferable that the gate capacitance has a large value, but increasing the capacitance value If the gate insulating layer is made thinner to reduce the gate capacitance, problems such as an increase in leakage current and a decrease in dielectric strength will occur. This can easily cause problems.

[0239] Therefore, hafnium silicate (HfSi x O y (x>0, y>0) Nitrogen-doped hafnium silicate (HfSi x O y N z (x>0, y>0, z>0 )), nitrogen-doped hafnium aluminate (HfAl x O y Nz (x>0, y>0 , z>0), hafnium oxide, or yttrium oxide. This makes it possible to ensure a sufficient capacitance value of the capacitance element even if the dielectric is made thick.

[0240] For example, if a high-k material with a large dielectric constant is used as the dielectric, the dielectric Since the capacitance value is equivalent to that when silicon oxide is used as the dielectric, the capacitance element can be This reduces the leakage current that occurs between the two electrodes formed. The insulating material may be laminated with another insulating material.

[0241] The insulating layer 228 has a flat surface. In addition to insulating materials, polyimide, acrylic resin, benzocyclobutene resin, polyamide Organic materials having heat resistance, such as amides and epoxy resins, can be used. In addition to the electrical materials, low-k materials, siloxane resins, PSG (Lingala It is possible to use materials such as BPSG (borophosphorus glass) and BPSG (borophosphorus glass). A plurality of insulating layers may be stacked.

[0242] The siloxane resin is a Si—O— compound formed using a siloxane material as a starting material. It corresponds to a resin containing Si bonds. Siloxane resins contain organic groups (e.g., alkane) as substituents. Alternatively, an alkyl group or an aryl group, or a fluoro group may be used. It's okay to be there.

[0243] The method for forming the insulating layer 228 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, etc.), printing For example, a printing method (screen printing, offset printing, etc.) may be used.

[0244] Further, the sample surface may be subjected to CMP treatment. This reduces the unevenness of the surface, thereby improving the coverage of the insulating layer and conductive layer that will be formed later.

[0245] <Semiconductor layer> The semiconductor layer 242 may be formed of a material such as a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor. Examples of semiconductor materials that can be used include silicon and germanium. Silicon germanium, silicon carbide, gallium arsenide, and oxide can also be used. Compound semiconductors such as nitride semiconductors and nitride semiconductors, as well as organic semiconductors can be used. .

[0246] In addition, when an organic semiconductor is used as the semiconductor layer 242, a low molecular weight organic material having an aromatic ring is used. and π-electron conjugated conductive polymers can be used. For example, rubrene, tetracene, etc. , pentacene, perylenediimide, tetracyanoquinodimethane, polythiophene, polya Cetylene, polyparaphenylene vinylene, etc. can be used.

[0247] As mentioned above, the band gap of the oxide semiconductor is 2 eV or more. By using an oxide semiconductor for 42, it is possible to realize a transistor with extremely low off-state current. In addition, OS transistors have a high withstand voltage between the source and drain. It is possible to provide a highly reliable transistor. It is also possible to provide a semiconductor device with high reliability. Therefore, a semiconductor device with a high breakdown voltage can be provided.

[0248] In this embodiment, the case where an oxide semiconductor is used for the semiconductor layer 242 will be described. The oxide semiconductor used for the semiconductor layer 242 is, for example, an oxide semiconductor containing indium (In). For example, when an oxide semiconductor contains indium, carrier transport is facilitated. In addition, the oxide semiconductor preferably contains an element M.

[0249] The element M is preferably aluminum, gallium, yttrium, tin, or the like. Other elements that can be used for element M include boron, silicon, titanium, iron, and nickel. , germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium However, the element M is the same as the above. In some cases, a combination of multiple elements may be used. For example, the element M has a bond energy with oxygen of 0. The element M is an element with a high energy. For example, the element M increases the energy gap of an oxide semiconductor. The oxide semiconductor preferably contains zinc. Conductors containing zinc may be prone to crystallization.

[0250] However, the oxide semiconductor used for the semiconductor layer 242 is not limited to an oxide containing indium. Examples of oxide semiconductors include zinc tin oxide, gallium tin oxide, and gallium oxide. oxides containing zinc, oxides containing gallium, oxides containing tin, and oxides not containing indium It may be a semiconductor or the like.

[0251] For example, the semiconductor layer 242 may be formed by thermal CVD using InGaZnO X (X>0) Deposit a film In the case of trimethylindium (In(CH3)3), trimethylgallium (Ga(C H3)3), and dimethylzinc (Zn(CH3)2). The combination is not limited to the above, and triethylgallium (Ga(C2H5)) may be used instead of trimethylgallium. 3) can also be used, and diethyl zinc (Zn(C2H5)2) can be used instead of dimethyl zinc. It can also be used.

[0252] For example, the semiconductor layer 242 may be formed by an ALD method using InGaZnO X (X>0) Deposit a film In this case, In(CH3)3 gas and O3 gas are introduced repeatedly to form an InO2 layer. Then, Ga(CH3)3 gas and O3 gas are introduced repeatedly to form a GaO layer. Then, Zn(CH3)2 gas and O3 gas are introduced repeatedly to form a ZnO layer. The order of these layers is not limited to this example. Two-layer and mixed compound layers such as InZnO2 layer, GaInO layer, ZnInO layer, GaZnO layer Alternatively, instead of O3 gas, H may be formed by bubbling water with an inert gas such as Ar. Although O gas may be used, it is preferable to use O gas that does not contain H. Instead of CH3)3 gas, In(C2H5)3 gas or tris(acetylacetonato)in Tris(acetylacetonato)indium may be used. Also, instead of Ga(CH3)3 gas, Ga(C2H5)3 gas or Tris(acetylacetonato)gallium may also be used. Gallium (Ga) is also called Ga(acac)3. It is also used in gases such as Zn(CH3)2 and zinc acetate. Lead may also be used. The gas species are not limited to these.

[0253] When forming oxide semiconductor films by sputtering, indium is used to reduce the number of particles. It is preferable to use a target containing M. Also, an oxide target having a high atomic ratio of element M is preferable. When using a target containing indium, the conductivity of the target may be reduced. When using a target, the conductivity of the target can be increased, making DC discharge and AC discharge easier. Therefore, it becomes easier to handle large-area substrates, which increases the productivity of semiconductor devices. It is possible.

[0254] As mentioned above, when forming an oxide semiconductor film by sputtering, the target element For example, the molecular ratio of In:M:Zn is 3:1:1, 3:1:2, 3:1:4, 1:1:0. .5, 1:1:1, 1:1:2, 1:4:4, 5:1:7, 4:2:4.1, and this It is sufficient to set it to the vicinity of these.

[0255] When an oxide semiconductor is formed by sputtering, the atomic ratio of the target is deviated. In particular, zinc may be deposited as an oxide semiconductor with a target atomic ratio of 0.1 to 0.2. The atomic ratio of the deposited film may be smaller than that of the target. The ratio of the number of atoms of zinc to be used may be between 40 atomic % and 90 atomic %. be.

[0256] The semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c are made of In or Ga. It is preferable to form the insulating layer using a material containing one or both of these elements. Typically, the insulating layer is made of In-Ga oxide. (oxide containing In and Ga), In-Zn oxide (oxide containing In and Zn), In-M -Zn oxide (oxide containing In, element M, and Zn. Element M is Al, Ti, Ga, Y , Zr, La, Ce, Nd or Hf, and more oxygen than In. It is a metallic element that has a strong bonding force with metals.

[0257] The semiconductor layer 242a and the semiconductor layer 242c are formed by the same metal element as that of the semiconductor layer 242b. In other words, it is preferable that the material contains one or more kinds of the same metal element. When the material is used, the interface between the semiconductor layer 242a and the semiconductor layer 242b and the semiconductor layer This can make it difficult for interface states to occur at the interface between the semiconductor layer 242c and the semiconductor layer 242b. This makes it difficult for carriers to be scattered or captured at the interface, and the field-effect mobility of the transistor is improved. It is also possible to reduce the variation in the threshold voltage of the transistor. Therefore, it is possible to realize a semiconductor device having good electrical characteristics. This becomes:

[0258] The semiconductor layer 242b is an In-M-Zn oxide, and the semiconductor layer 242a and the semiconductor When the layer 242c is also an In-M-Zn oxide, the semiconductor layer 242a and the semiconductor layer 242 c is In:M:Zn=x1:y1:z1 [atomic ratio], and the semiconductor layer 242b is In:M:Z If n=x2:y2:z2 [atomic ratio], then y1 / x1 is greater than y2 / x2. The semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b can be selected so that Preferably, the semiconductor is arranged so that y1 / x1 is 1.5 times or more larger than y2 / x2. The semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b are preferably selected. The semiconductor layer 242a and the semiconductor layer 242b are formed such that y1 / x1 is at least twice as large as y2 / x2. More preferably, y1 / x1 is selected to be greater than y2 / x2 or more. Select layer 242b. When y1 is equal to or greater than x1, the transistor has stable electrical characteristics. However, if y1 is three times or more than x1, the field effect of the transistor Since the mobility is reduced, it is preferable that y1 is less than three times x1. By configuring the semiconductor layer 242a and the semiconductor layer 242c as described above, The layer 242c can be a layer in which oxygen vacancies are less likely to occur than in the semiconductor layer 242b.

[0259] When the semiconductor layer 242a and the semiconductor layer 242c are made of In-M-Zn oxide, I When the sum of n and element M is 100 atomic %, the atomic ratio of In to element M is: Preferably, In is less than 50 atomic % and the element M is 50 atomic % or more, and more preferably Preferably, In is less than 25 atomic % and the element M is 75 atomic % or more. When the semiconductor layer 242b is an In-M-Zn oxide, the sum of In and element M is 100 The atomic ratio of In to element M in atomic % is preferably 25 atoms. ic% or more, element M is less than 75 atomic %, and more preferably In is 34 atomic % or more. c% or more, and element M is less than 66 atomic %.

[0260] For example, the semiconductor layer 242a containing In or Ga and the semiconductor layer 242b containing In or Ga 242c as In:Ga:Zn=1:3:2, 1:3:4, 1:3:6, 1:4:5, Formed using targets with atomic ratios of 1:6:4, 1:9:6, or nearby The target used was an In-Ga-Zn oxide or an In:Ga=1:9 atomic ratio target. In-Ga oxide formed by the above method, gallium oxide, etc. can be used. Layer 242b: In:Ga:Zn=3:1:2, 1:1:1, 5:5:6, 5:1:7 , or 4:2:4.1 or a target with an atomic ratio close to these. The semiconductor layer 242a and the semiconductor layer 242b may be made of n-Ga-Zn oxide. The atomic ratios of the semiconductor layer 242b and the semiconductor layer 242c are each calculated by multiplying the atomic ratios by the above-mentioned plus or minus factor as an error. Includes a minus 20% fluctuation.

[0261] In addition, in order to provide stable electrical characteristics to an OS transistor, it is necessary to reduce the impurities in the oxide semiconductor layer. The impurities and oxygen vacancies are reduced to make the semiconductor layer 242 highly intrinsic, and the semiconductor layer 242 is made intrinsic or substantially intrinsic. In addition, at least the semiconductor layer 242 is preferably an oxide semiconductor layer that can be regarded as a It is preferable that the channel formation region be an oxide semiconductor layer that can be regarded as intrinsic or substantially intrinsic. It's nice.

[0262] In particular, impurities and oxygen vacancies in the semiconductor layer 242b are reduced to make it highly purified and intrinsic. It is preferable that the oxide semiconductor layer 242b be an oxide semiconductor layer that can be regarded as intrinsic or substantially intrinsic. In addition, at least the channel forming region in the semiconductor layer 242b is considered to be intrinsic or substantially intrinsic. It is preferable to use a semiconductor layer in which the

[0263] Note that an oxide semiconductor layer that can be considered substantially intrinsic is an oxide semiconductor layer having a carrier density of , 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than, more preferably 1×1010 / cm 3 Less than 1 x 10 -9 / cm 3 The oxide semiconductor layer having the above structure is cormorant.

[0264] When an oxide semiconductor layer is used as the semiconductor layer 242, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor CAAC-OS is an oxide film having multiple crystal parts aligned along the c-axis. It is one of the compound semiconductors.

[0265] In addition, the oxide semiconductor layer used for the semiconductor layer 242 has a region that is not CAAC. It is preferable that the thickness is less than 20% of the total body layer.

[0266] The CAAC-OS has a dielectric anisotropy. The dielectric constant in the c-axis direction is larger than that in the b-axis direction. The transistor with the gate electrode aligned along the c-axis using CAAC-OS has Because of its large dielectric constant, the electric field generated from the gate electrode easily reaches the entire CAAC-OS. This makes it possible to reduce the subthreshold swing value (S value). Transistors using CAAC-OS layers are less likely to experience an increase in S value due to miniaturization.

[0267] In addition, the CAAC-OS has a small dielectric constant in the a-axis and b-axis directions, so the source and drain Therefore, the influence of the electric field generated between the gates is reduced. , etc. are unlikely to occur, and the reliability of the transistor can be improved.

[0268] Here, the channel length modulation effect is the effect of increasing the drain voltage when the drain voltage is higher than the threshold voltage. This refers to the phenomenon in which the depletion layer expands from the inside, shortening the effective channel length. The channel effect is a phenomenon in which a decrease in the threshold voltage and other electrical characteristics occur due to a shortened channel length. The smaller the transistor, the greater the deterioration of electrical characteristics due to these phenomena. It is easy to occur.

[0269] After the oxide semiconductor layer is formed, oxygen doping treatment may be performed. In order to further reduce impurities such as moisture or hydrogen contained in the oxide semiconductor layer and to highly purify the oxide semiconductor layer, It is preferable to carry out a heat treatment.

[0270] For example, under a reduced pressure atmosphere, under an inert atmosphere such as nitrogen or a rare gas, under an oxidizing atmosphere, or under an ultra-dry atmosphere. Dry air (measured using a CRDS (cavity ring-down laser spectroscopy) dew point meter) The moisture content when the air is cooled is 20 ppm or less (-55°C in terms of dew point), preferably 1 ppm or less. Preferably, the oxide semiconductor layer is subjected to heat treatment in an air atmosphere of 10 ppb or less. An oxidizing atmosphere is an atmosphere containing 10 ppm or more of oxidizing gases such as oxygen, ozone, or nitrogen dioxide. An inert atmosphere is an atmosphere in which the above-mentioned oxidizing gases are less than 10 ppm. It also refers to an atmosphere filled with nitrogen or a rare gas.

[0271] Furthermore, by performing a heat treatment, the impurities are released and the oxygen contained in the insulating layer 226 is also removed. The oxygen vacancies in the oxide semiconductor layer can be reduced by diffusing the oxygen vacancies in the oxide semiconductor layer. After the heat treatment in an inert atmosphere, an oxidizing gas is added to replace the desorbed oxygen. The heat treatment may be carried out in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more. The heat treatment may be performed at any time after the oxide semiconductor layer is formed.

[0272] There is no particular limitation on the heating device used for the heat treatment. For example, an electric furnace or an LR furnace may be used. TA (Lamp Rapid Thermal Anneal) equipment, GRTA (Gas Rapid Thermal Anneal (RTA) equipment The LRTA device uses a halogen lamp, Metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium The light (electromagnetic waves) emitted from lamps such as lamps and high-pressure mercury lamps The GRTA device is a device that uses high-temperature gas to perform heat treatment.

[0273] The heat treatment is carried out at a temperature of 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower. The treatment time should be within 24 hours. Heat treatment for more than 24 hours will result in a decrease in productivity. Therefore, it is not desirable.

[0274] <Electrode> Electrode 243, electrode 224, electrode 244a, electrode 244b, electrode 225a, and electrode 22 The conductive material for forming 5b includes aluminum, chromium, copper, silver, gold, platinum, Tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, Metal elements selected from aluminum, manganese, magnesium, zirconium, beryllium, etc. It is possible to use a material containing one or more of these elements. Highly conductive semiconductors such as silicon, and silicides such as nickel silicide A plurality of conductive layers made of these materials may be stacked.

[0275] In addition, the electrodes 243, 224, 244a, 244b, 225a, and The conductive material for forming the electrode 225b is indium tin oxide (ITO). Tin Oxide), Indium Oxide with Tungsten Oxide, Tungsten Oxide Indium zinc oxide containing titanium oxide, indium oxide containing titanium oxide Indium tin oxide, indium zinc oxide, silicon-doped indium tin oxide, etc. Conductive materials containing oxygen, titanium nitride, tantalum nitride, and other conductive materials containing nitrogen are used. It is also possible to combine the material containing the metal element and the conductive material containing oxygen. It is also possible to form a laminated structure in which the above-mentioned material containing a metal element and a material containing nitrogen are combined. It is also possible to use a laminated structure in which conductive materials containing the above-mentioned metal elements are combined. A laminated structure combining a material containing oxygen, a conductive material containing nitrogen, and a conductive material containing oxygen. The method for forming the conductive material is not particularly limited, and may be a vapor deposition method, a CVD method, a sputtering method, or the like. Various methods for forming the conductive layer, such as a tarring method, can be used.

[0276] <Contact plug> The contact plug may be made of a material with high embedding properties, such as tungsten or polysilicon. A conductive material can be used. The side and bottom surfaces of the material can be covered with a titanium layer, a nitride layer, or the like. It may be covered with a barrier layer (diffusion prevention layer) made of a titanium layer or a laminate of these. The barrier layer may also be referred to as a contact plug.

[0277] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0278] (Embodiment 3) The shift register disclosed in the above embodiment can be used in a driver circuit of a display device. In this embodiment, the shift register disclosed in the above embodiment is used in a display device. FIG. 32(A) is a block diagram illustrating an example of the configuration of the display device 500. FIG.

[0279] The display device 500 shown in FIG. 32(A) includes a drive circuit 511, a drive circuit 521a, and a drive circuit 5 21b, and a display area 531. and the drive circuit 521b are sometimes collectively referred to as the "drive circuit" or the "peripheral drive circuit." be.

[0280] The driving circuits 521a and 521b can function as, for example, scanning line driving circuits. The driver circuit 511 can function as, for example, a signal line driver circuit. The display area 531 may be formed by the driving circuit 521b. A circuit of some kind may be provided at a position facing the driving circuit 511 across the substrate.

[0281] In addition, the display device 500 shown in FIG. 32(A) is arranged substantially parallel to each other and is driven by p wirings 5 ​​whose potentials are controlled by the circuit 521a and / or the drive circuit 521b 35 and q electrodes which are arranged approximately parallel to each other and whose potentials are controlled by a driving circuit 511. The display area 531 has a plurality of wirings 536 arranged in a matrix. It has a pixel 532. The pixel 532 has a pixel circuit 534 and a display element.

[0282] In addition, by making the three pixels 532 function as one pixel, a full color display can be realized. The three pixels 532 can be transparent, each emitting red, green, or blue light. The transmittance, reflectance, or emitted light amount is controlled by the three pixels 532. The colors are not limited to a combination of red, green, and blue, but may also be yellow, cyan, and magenta.

[0283] In addition to the pixels that control red, green, and blue light, a pixel 532 that controls white light is added. In this case, four pixels 532 may be grouped together to function as one pixel. By adding the pixel 532, the brightness of the display area can be increased. The number of pixels 532 that function as a function of the red, green, blue, yellow, cyan, and magenta is increased. By using them together, the reproducible color gamut can be expanded.

[0284] When pixels are arranged in a 1920 x 1080 matrix, it becomes what is known as full high definition (" Also known as "2K resolution," "2K1K," or "2K." The device 500 can be realized. For example, the pixels can be arranged in a matrix of 3840 x 2160. When arranged in a grid, it can be used for so-called ultra-high definition (4K resolution, 4K2K, It is possible to realize a display device 500 capable of displaying at a resolution of 1080p (also called "4K"). For example, if pixels are arranged in a 7680 x 4320 matrix, Super Hi-Vision (also called "8K resolution," "8K4K," or "8K") By increasing the number of pixels, it is possible to realize a display device 500 capable of displaying at a resolution of 1 It is also possible to realize a display device 500 capable of displaying at a resolution of 6K or 32K.

[0285] The wiring 535_g (g is a natural number between 1 and p) in the gth row is p in the display area 531. Among the multiple pixels 532 arranged in rows and columns q (p and q are both natural numbers of 1 or more), g The wiring 536_h in the hth column is electrically connected to the q pixels 532 arranged in the row. (h is a natural number between 1 and q) indicates the pixel 532 arranged in p rows and q columns that is arranged in h columns. The pixel 532 is electrically connected to p pixels 532 provided therein.

[0286] [Display element] The display device 500 can take a variety of forms or have a variety of display elements. An example of a display element is an EL (electroluminescence) element (organic EL element, Inorganic EL elements, or EL elements containing organic and inorganic materials), LEDs (white LEDs, red LED, green LED, blue LED, etc.), transistor (transistor that emits light according to the current) Electron emission element, liquid crystal element, electronic ink, electrophoretic element, grating light bar GLV (Glass Liquid Crystal Display), MEMS (Micro-Electro-Mechanical Systems) Display element, Digital Micromirror Device (DMD), DMS (Digital Micromirror Scatter), MIRASOL (registered trademark), IMOD (Interferometric Module) MEMS display elements, shutter-type MEMS display elements, optical interference-type MEMS display elements electrons, electrowetting elements, piezoelectric ceramic displays, carbon nanotubes Display elements using a magnetic field, etc., which use electrical or magnetic effects to improve contrast, brightness, and reflectivity. Some display devices have display media that change their reflectivity, transmittance, etc. A marker may also be used.

[0287] An example of a display device using an EL element is an EL display. An example of a display device using the above is a field emission display (FED) or SED type flat panel display (SED: Surface-conduction El Quantum dot displays An example of such a device is a quantum dot display. An example is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display). , reflective LCD displays, direct-view LCD displays, projection LCD displays, etc. An example of a display device using electronic ink, electronic liquid powder (registered trademark), or electrophoretic elements Examples include electronic paper. The display device is a plasma display panel (PDP). may be.

[0288] When realizing a semi-transmissive or reflective LCD display, the pixel voltage A part or all of the electrodes may be made to function as a reflective electrode. For example, A part or all of the pixel electrodes may be made of aluminum, silver, or the like. Furthermore, in this case, it is also possible to provide a memory circuit such as an SRAM below the reflective electrode. This further reduces power consumption.

[0289] When using an LED, graphene or graphene is placed under the LED electrode or nitride semiconductor. Graphene and graphite can be arranged in layers to form a multilayer film. In this way, by providing graphene or graphite, it is possible to form a nitride layer on the graphene or graphite. Semiconductors, such as n-type GaN semiconductor layers having crystallinity, can be easily formed. Furthermore, a p-type GaN semiconductor layer having crystals is formed on top of that to form an LED. It is possible to combine graphene or graphite with a crystalline n-type GaN semiconductor layer. An AlN layer may be provided between the GaN layer and the LED. However, by providing graphene, the GaN semiconductor of the LED The layer can also be deposited by sputtering.

[0290] 32(B), 32(C), 33(A), and 33(B) show the structure used for pixel 532. 1 shows an example of a circuit configuration that can be implemented.

[0291] [Example of a pixel circuit for a light-emitting display device] The pixel circuit 534 shown in FIG. 32B includes a transistor 461, a capacitor 463, and a transistor 32B. The path 534 is electrically connected to a light emitting element 469 that can function as a display element.

[0292] One of the source electrode and the drain electrode of the transistor 461 is electrically connected to the wiring 536_h. Furthermore, the gate electrode of the transistor 461 is electrically connected to the wiring 535_g. A video signal is supplied from the wiring 536_h.

[0293] The transistor 461 has a function of controlling writing of a video signal to a node 465. .

[0294] One of a pair of electrodes of the capacitor 463 is electrically connected to the node 465, and the other is The source electrode and the drain electrode of the transistor 461 are electrically connected to the The other of the electrodes is electrically connected to node 465 .

[0295] The capacitor 463 functions as a storage capacitor for storing data written to the node 465. It has.

[0296] One of the source electrode and the drain electrode of the transistor 468 is connected to the potential supply line VL_a. The other end is electrically connected to node 467. The gate electrode of 8 is electrically connected to node 465 .

[0297] One of the source electrode and the drain electrode of the transistor 464 is electrically connected to the potential supply line V0. and the other is electrically connected to a node 467. The gate electrode is electrically connected to a wiring 535_g.

[0298] One of the anode and cathode of the light emitting element 469 is electrically connected to the potential supply line VL_b. and the other is electrically connected to node 467.

[0299] The light emitting element 469 may be, for example, an organic electroluminescence element (also called an organic EL element). However, the light-emitting element 469 is not limited to this. For example, an inorganic EL element made of an inorganic material may be used.

[0300] For example, a high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0301] In the display device 500 having the pixel circuit 534 of FIG. 32(B), the driver circuit 521a and / or the driver circuit 521b sequentially selects the pixels 532 in each row, and the transistors 461, Then, the transistor 464 is turned on to write the video signal to the node 465 .

[0302] The pixel 532 in which data is written to the node 465 is connected to the transistor 461 and the transistor The register 464 is turned off, which puts the node 465 into a holding state. A current flows between the source and drain electrodes of the transistor 468 according to the potential of the input data. The amount of current is controlled, and the light emitting element 469 emits light with a brightness according to the amount of current flowing. By performing this step sequentially, an image can be displayed.

[0303] As shown in FIG. 33A, the transistor 461, the transistor 464, and the transistor 465 are connected to each other. A transistor having a back gate may be used as the transistor 468. The transistor 461 and the transistor 464 shown in A) have a back gate and a gate electrode. They are electrically connected. Therefore, the gate and back gate are always at the same potential. The back gate of the transistor 468 is electrically connected to the node 467. The back gate is always at the same potential as the node 467 .

[0304] [An example of a pixel circuit for a liquid crystal display device] The pixel circuit 534 shown in FIG. 32C includes a transistor 461 and a capacitor 463. The pixel circuit 534 shown in FIG. 32(C) is a liquid crystal element that can function as a display element. 462 is electrically connected to

[0305] The potential of one of the pair of electrodes of the liquid crystal element 462 is set appropriately according to the specifications of the pixel circuit 534. For example, a common potential is applied to one of the pair of electrodes of the liquid crystal element 462. Alternatively, the potential of one of the pair of electrodes of the liquid crystal element 462 may be the same as that of the capacitance line CL. On the other hand, different potentials may be applied to the pixels 532. The liquid crystal element 462 is electrically connected to the node 466. The alignment state is set by the data.

[0306] As a driving method of the display device including the liquid crystal element 462, for example, TN (Twisted Nematic) Nematic mode, STN (Super Twisted Nematic) mode Mode, VA mode, ASM (Axially Symmetric Aligned Mix cro-cell mode, OCB (Optically Compensated B refrigeration mode, FLC (Ferroelectric Liquid d Crystal) mode, AFLC (AntiFerroelectric Liq. Crystal) mode, MVA mode, PVA (Patterned Ver Artificial Alignment mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode may also be used. In addition to the above-mentioned driving method, the display device can also be driven by an ECB (Electric Carrier Board) or the like. Ally Controlled Birefringence mode, PDLC (P Polymer Dispersed Liquid Crystal (PNLC) mode (Polymer Network Liquid Crystal) mode, guest However, the liquid crystal element and its driving method are not limited to these. A variety of materials can be used.

[0307] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, etc. The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, the liquid crystal material can be in a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0308] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the crystalline phase to the isotropic phase. Therefore, a liquid crystal composition containing 5% by weight or more of a chiral agent is used to improve the temperature range. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of It is short (less than 1 msec), has optical isotropy so alignment processing is not required, and is not dependent on viewing angle. In addition, since there is no need to provide an alignment film, rubbing treatment is also unnecessary. This prevents electrostatic damage caused by the soldering process, and prevents the LCD display from being damaged during the manufacturing process. This reduces the number of defects and damages to the device, thereby improving the productivity of liquid crystal display devices. This makes it possible to:

[0309] In addition, a pixel is divided into several regions (subpixels), each of which is oriented in a different direction. It is called multi-domain or multi-domain design, which is designed to defeat molecules. The method can be used.

[0310] The specific resistance of the liquid crystal material is 1×10 9 Ω·cm or more, preferably 1×10 11 Ω·cm or more, and more preferably 1×10 12 Ω·cm or more. The resistivity values ​​in this document are those measured at 20°C.

[0311] In the pixel circuit 534 in the gth row and the hth column, the source electrode and the drain electrode of the transistor 461 One of the electrodes is electrically connected to the wiring 536_h, and the other is electrically connected to the node 466. A gate electrode of the transistor 461 is electrically connected to a wiring 535_g. The line 536_h provides the video signal. The transistor 461 provides a It has the function of controlling the writing of video signals.

[0312] One of the pair of electrodes of the capacitor 463 is connected to a wiring to which a specific potential is supplied (hereinafter, referred to as a capacitor line CL ), and the other is electrically connected to a node 466. The value of the potential is set as appropriate according to the specifications of the pixel circuit 534. It functions as a storage capacitor that stores data written in the memory card 466 .

[0313] For example, in a display device 500 having a pixel circuit 534 shown in FIG. 32(C), a driver circuit 521a and / or the pixel circuits 534 in each row are sequentially selected by the driving circuit 521b, and the transistors The starter 461 is turned on to write the video signal to the node 466.

[0314] In the pixel circuit 534 in which the video signal is written to the node 466, the transistor 461 is turned off. By doing this for each row, the display area 531 You can display images.

[0315] In addition, as shown in FIG. 33B, the transistor 461 may have a back gate. The transistor 461 shown in FIG. 33B has a back gate. Therefore, the gate and back gate are always at the same potential.

[0316] [Example of peripheral circuit configuration] 34A shows a configuration example of the driver circuit 511. The driver circuit 511 includes a shift register 51 2, a latch circuit 513, and a buffer 514. Also, FIG. 34(B) shows a driving circuit The driver circuit 521a includes a shift register 522 and a buffer The driving circuit 521b can have the same configuration as the driving circuit 521a. .

[0317] The shift register 512 and the shift register 522 receive a start pulse SP and a clock signal. The shift register 512 and the shift register 522 are configured as follows: The shift register disclosed in the above embodiment can be used.

[0318] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0319] (Fourth embodiment) A part of a driver circuit including a shift register can be formed using the transistor described in the above embodiment. Alternatively, the entire display can be formed on the same substrate as the pixel section to form a system-on-panel. Regarding a structural example of a display device in which the transistor described in the above embodiment can be used, This will be explained with reference to FIGS. 35 and 36.

[0320] [Liquid crystal display devices and EL display devices] As examples of the display device, a display device using a liquid crystal element and a display device using an EL element are described. In FIG. 35A, a pixel portion 400 provided on a first substrate 4001 is A sealant 4005 is provided to surround the second substrate 4006. In FIG. 35(A), a sealing material 4005 on a first substrate 4001 In a region different from the enclosed region, a single crystal semiconductor or polycrystalline A signal line driver circuit 4003 and a scanning line driver circuit 4004 formed of semiconductor are mounted. In addition, the signal line driver circuit 4003, the scanning line driver circuit 4004, or the pixel portion 400 Various signals and potentials are applied to 2 through the FPC (Flexible Printed Circuit). Powered by FPC4018a and FPC4018b.

[0321] In FIG. 35(B) and FIG. 35(C), the pixel portion 4 provided on the first substrate 4001 A sealant 4005 is provided so as to surround the gate electrode 4002 and the scanning line driver circuit 4004. In addition, a second substrate 4006 is provided on the pixel portion 4002 and the scanning line driver circuit 4004. Therefore, the pixel portion 4002 and the scanning line driver circuit 4004 are connected to the first substrate 400. The display element is sealed with a sealing material 4005 and a second substrate 4006. In FIG. 35(B) and FIG. 35(C), the sealant 400 on the first substrate 4001 In a region different from the region surrounded by 5, a single crystal semiconductor or A signal line driver circuit 4003 formed of a polycrystalline semiconductor is mounted on the substrate. In FIG. 35(C), a signal line driver circuit 4003, a scanning line driver circuit 4004, Various signals and potentials applied to the pixel portion 4002 are supplied from the FPC 4018. There are.

[0322] In addition, in FIG. 35(B) and FIG. 35(C), a signal line driver circuit 4003 is separately formed. 10, an example in which the scanning element 4001 is mounted on the first substrate 4001 is shown, but the present invention is not limited to this configuration. A signal line driver circuit may be formed separately and mounted, or a part of the signal line driver circuit or the scanning line driver circuit may be mounted. Only a part of the path may be formed separately and mounted.

[0323] The method of connecting the separately formed drive circuit is not particularly limited, and may be a wire bond. ing, COG (Chip On Glass), TCP (Tape Carrier) Package), COF (Chip On Film), etc. can be used. 35(A) is a circuit board in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are mounted by COG. FIG. 35(B) is an example in which a signal line driver circuit 4003 is mounted by COG. FIG. 35C shows an example in which the signal line driver circuit 4003 is implemented using TCP.

[0324] The display device also includes a panel in which a display element is sealed, and a controller for the panel. This may also include a module in which an IC or the like including the above is mounted.

[0325] The pixel portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor described in the above embodiment can be applied to this.

[0326] Figures 36(A) and 36(B) show the structure of the region indicated by the chain line N1-N2 in Figure 35(B). The display device shown in FIGS. 36(A) and 36(B) has an electrode 4. The electrode 4015 is connected to a terminal of the FPC 4018 and an anisotropic conductive layer 401 9. The electrode 4015 is electrically connected to the insulating layer 4112 and the insulating layer 4111 and an opening formed in the insulating layer 4110, which is electrically connected to the wiring 4014. It has been done.

[0327] The electrode 4015 is formed from the same conductive layer as the first electrode layer 4030. The source and drain electrodes of the transistor 4010 and the transistor 4011 are the same. The same conductive layer is used.

[0328] The pixel portion 4002 and the scanning line driver circuit 4004 provided on the first substrate 4001 are 36(A) and 36(B), the pixel portion 4002 has a plurality of transistors. The transistor 4010 included in the scanning line driver circuit 4004 36A illustrates the transistor 4010 and the transistor 4011. An insulating layer 4112, an insulating layer 4111, and an insulating layer 4110 are provided on the insulating layer 4111. In 6(B), a partition wall 4510 is formed on the insulating layer 4112.

[0329] The transistor 4010 and the transistor 4011 are provided over an insulating layer 4102. The transistor 4010 and the transistor 4011 are formed by insulating layers 4102. An electrode 4017 is formed thereon, and an insulating layer 4103 is formed on the electrode 4017. . The electrode 4017 can function as a back gate electrode.

[0330] The transistors 4010 and 4011 are the same as those described in the above embodiment modes. The transistors described in the above embodiments can be used because they have little fluctuation in electrical characteristics. Therefore, the ripples in the junctions shown in Figs. 36(A) and 36(B) are suppressed and electrically stable. The display device of this embodiment can be a highly reliable display device.

[0331] 36(A) and 36(B), the transistor 4010 and the transistor The transistor 4011 has a structure similar to that of the transistor 452 described in the above embodiment. The example shows the case where a transistor is used.

[0332] The display devices shown in FIGS. 36A and 36B each include a capacitor 4020. The capacitor 4020 is connected to one of the source electrode and the drain electrode of the transistor 4010. The electrode 4021 has a region where the electrode 4021 overlaps with the insulating layer 4103 interposed therebetween. It is formed from the same conductive layer as electrode 4017.

[0333] In general, the capacitance of a capacitor provided in a display device is determined by the capacitance of the resistor of a transistor arranged in a pixel portion. The capacitance is set to be able to hold charge for a predetermined period, taking into consideration the current flowing through the capacitor. The capacitance may be set in consideration of the off-state current of the transistor and the like.

[0334] For example, by using an OS transistor in a pixel portion of a liquid crystal display device, the capacitance of a capacitor element can be reduced. The volume of the liquid crystal can be reduced to 1 / 3 or even 1 / 5. By using a resistor, the formation of a capacitive element can be omitted.

[0335] The transistor 4010 provided in the pixel portion 4002 is electrically connected to the display element. 6(A) is an example of a liquid crystal display device using a liquid crystal element as a display element. In the figure, a liquid crystal element 4013, which is a display element, has a first electrode layer 4030 and a second electrode layer 4040. 031 and a liquid crystal layer 4008. The liquid crystal layer 4008 is sandwiched between alignment films and The insulating layers 4032 and 4033 functioning as the second electrode layer 4031 are provided. is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 are liquid crystal layers. The crystal layer 4008 is placed between them.

[0336] The spacers 4035 are columnar spacers obtained by selectively etching the insulating layer. and the distance (cell gap) between the first electrode layer 4030 and the second electrode layer 4031 is controlled. A spherical spacer may also be used.

[0337] Note that OS transistors are used as the transistors 4010 and 4011. It is preferable that the OS transistor has a low current value in an off state (off-state current value). Therefore, the retention time of the electric signals such as the image signals can be extended. When the power is on, the write interval can be set longer, so the frequency of refresh operations can be reduced. This reduces the power consumption.

[0338] In addition, OS transistors have relatively high field-effect mobility, enabling high-speed operation. Therefore, by using the above transistor in a driver circuit portion or a pixel portion of a display device, In addition, a driver circuit section or a pixel section can be formed on the same substrate. Since the components can be manufactured separately, the number of components of the display device can be reduced.

[0339] In addition, in display devices, black matrices (light-shielding layers), polarizing members, phase difference members, reflecting members, For example, a polarizing substrate and an optical member (optical substrate) such as a polarizing member may be provided. Circularly polarized light produced by a retardation substrate may also be used. etc. may also be used.

[0340] Furthermore, a light-emitting element that utilizes electroluminescence is used as a display element included in the display device. An EL element is a light-emitting diode (EL element) that is formed between a pair of electrodes. The EL element has a layer containing a light-emitting compound (also called an "EL layer") between a pair of electrodes. When a potential difference greater than the threshold voltage is generated, holes are injected into the EL layer from the anode side, and the cathode Electrons are injected from the electrode side. The injected electrons and holes recombine in the EL layer, forming a The luminescent material contained therein emits light.

[0341] EL elements are also classified according to whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element, and the latter is called an inorganic EL element.

[0342] When a voltage is applied to an organic EL element, electrons are emitted from one electrode and holes are emitted from the other electrode. are injected into the EL layer, and then the carriers (electrons and holes) recombine. By this, the light-emitting organic compound forms an excited state, and the excited state returns to the ground state. Due to this mechanism, such a light-emitting element is called a current-excited light-emitting element. It is called a child.

[0343] In addition to the light-emitting compound, the EL layer may contain a material having a high hole injection property and a material having a high hole transport property. , hole blocking material, material with high electron transporting ability, material with high electron injecting ability, or bipolar The layer may contain a highly functional substance (a substance having high electron-transporting and hole-transporting properties).

[0344] The EL layer can be formed by a variety of methods, including vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating. It can be formed in any way.

[0345] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0346] The light emitting element only needs to have at least one of the pair of electrodes transparent in order to extract light. The transistor and the light emitting element are formed on the substrate, and light is emitted from the surface opposite to the substrate. Top emission structure, which emits light from the top surface, and bottom emission structure, which emits light from the surface of the substrate. (bottom emission) structure and double-sided emission (dual emission) structure There are light emitting elements with a light-emitting structure, and any light emitting element with an emission structure can be applied.

[0347] FIG. 36(B) shows a light-emitting display device (also called an "EL display device") that uses light-emitting elements as display elements. The light-emitting element 4513, which is a display element, is provided in the pixel portion 4002. The light-emitting element 4513 is electrically connected to the transistor 4010. The first electrode layer 4030, the light-emitting layer 4511, and the second electrode layer 4031 are laminated together. The light emitting element 4513 may be formed in accordance with the direction of light to be extracted from the light emitting element 4513. The configuration of 513 can be changed as needed.

[0348] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. An opening is formed on the first electrode layer 4030 using a resin material, and the side of the opening is It is preferable to form the inclined surface with a curvature.

[0349] The light-emitting layer 4511 may be composed of a single layer or a plurality of layers stacked. Either way is fine.

[0350] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513. A protective layer may be formed on the insulating layer 4031 and the partition wall 4510. The protective layer may be formed of silicon nitride. silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, Forming aluminum oxide nitride, DLC (Diamond Like Carbon), etc. In addition, the first substrate 4001, the second substrate 4006, and the sealing material 4 The space sealed by 005 is sealed with a filler 4514. In addition, a protective film (laminating film) with high airtightness and low outgassing is used to prevent exposure to the outside air. It is preferable to package (enclose) the product in a protective film (film, ultraviolet curing resin film, etc.) or a cover material. I wish.

[0351] Filler 4514 can be an inert gas such as nitrogen or argon, or an ultraviolet curing resin or Thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic resin, Imide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) or the like can be used. Agents may also be included.

[0352] The sealing material 4005 is made of glass materials such as glass frit, or ordinary materials such as two-component mixed resin. Resin materials such as heat-curing resin, photo-curing resin, and thermosetting resin can be used. The sealing material 4005 may also contain a desiccant.

[0353] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be attached to the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates), color filters, etc. may be provided as needed. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0354] In addition, by using a microcavity structure for the light-emitting element, it is possible to extract light with high color purity. In addition, by combining a microcavity structure with a color filter, This reduces congestion and improves the visibility of the displayed image.

[0355] A first electrode layer and a second electrode layer (a pixel electrode layer, a common electrode layer, In the case of the counter electrode layer, the direction of the light to be extracted, the location of the electrode layer, and The light transmission property or reflectivity can be selected depending on the pattern structure of the electrode layer.

[0356] The first electrode layer 4030 and the second electrode layer 4031 are made of an indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light-transmitting properties, such as indium tin oxide doped with silicon oxide, may be used. This can be done.

[0357] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum. (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N b), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium Metals such as titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag) or its alloy, or metal nitride thereof. .

[0358] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer can be formed using a conductive composition containing a conductive polymer. For example, a so-called π-electron conjugated conductive polymer can be used. or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives or a copolymer consisting of two or more of aniline, pyrrole and thiophene, or Its derivatives are also included.

[0359] In addition, since transistors are easily damaged by static electricity, a protection circuit for protecting the drive circuit is required. It is preferable that the protection circuit is configured using a non-linear element.

[0360] By using the shift register described in the above embodiment mode, a highly reliable display device can be provided. Furthermore, by using the transistor described in the above embodiment, In addition, the reliability of the semiconductor device can be further improved by using the transistor described in the above embodiment. This makes it possible to provide a display device with high resolution, a large area, and good display quality. In addition, a display device with reduced power consumption can be provided.

[0361] [Display module] As an example of a semiconductor device using the above-mentioned shift register or transistor, a display module The display module 6000 shown in FIG. 1 and a lower cover 6002, a touch sensor 6004 connected to an FPC 6003, Display panel 6006 connected to FPC 6005, backlight unit 6007, frame The display includes a display unit 6009, a printed circuit board 6010, and a battery 6011. When the unit 6007, the battery 6011, the touch sensor 6004, etc. are not provided There are also.

[0362] The semiconductor device of one embodiment of the present invention includes, for example, a touch sensor 6004, a display panel 6006, It can be used for an integrated circuit mounted on a printed circuit board 6010. For example, The display device described above can be used for the panel 6006.

[0363] The upper cover 6001 and the lower cover 6002 are connected to the touch sensor 6004 and the display panel 6006. The shape and dimensions can be changed as needed to fit sizes such as 006.

[0364] The touch sensor 6004 is a resistive or capacitive touch sensor connected to the display panel 6 The display panel 6006 can be used by being superimposed on the display panel 6006. For example, it is possible to provide a touch sensor electrode in each pixel of the display panel 6006. It is also possible to add a capacitive touch panel function. By providing an optical sensor in each pixel of the panel 6006 and adding the function of an optical touch sensor, It is also possible to do the following.

[0365] The backlight unit 6007 includes a light source 6008. It may be configured to be provided at the end of the unit 6007 and to use a light diffusion plate. When a light-emitting display device or the like is used for 6006, the backlight unit 6007 is omitted. It is possible.

[0366] The frame 6009 not only protects the display panel 6006 but also protects the printed circuit board 6010 from the side. It also functions as an electromagnetic shield to block the electromagnetic waves generated. 009 may also function as a heat sink.

[0367] The printed circuit board 6010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply for the power supply circuit is a battery 6011. If a commercial power source is used as the power source, , the battery 6011 can be omitted.

[0368] In addition, components such as polarizing plates, retardation plates, and prism sheets have been added to the Display Module 6000. It may also be provided as follows.

[0369] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0370] (Embodiment 5) In this embodiment, an example of an electronic device using a semiconductor device disclosed in this specification will be described. I will explain.

[0371] Examples of electronic devices using a semiconductor device according to one embodiment of the present invention include display devices such as televisions and monitors. , lighting equipment, desktop or notebook personal computers, word processors stored on recording media such as DVD (Digital Versatile Disc) Image playback devices that play still or moving images, portable CD players, radios, tapes Recorders, headphone stereos, stereos, table clocks, wall clocks, cordless telephone handsets , transceivers, car phones, mobile phones, personal digital assistants, tablet terminals, portable games Fixed game machines such as gaming machines and pachinko machines, calculators, electronic organizers, e-books, electronic translators, voice Input devices, video cameras, digital still cameras, electric shavers, microwave ovens, and other high-frequency devices Heating devices, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air conditioners Air conditioning equipment such as conditioners, humidifiers, and dehumidifiers, dishwashers, dish dryers, and clothes dryers , futon dryers, electric refrigerators, electric freezers, electric refrigerator-freezers, freezers for DNA storage, flashlights Examples include lights, tools such as chainsaws, smoke detectors, and medical equipment such as dialysis machines. , guide lights, traffic lights, conveyor belts, elevators, escalators, industrial robots, electricity Examples include industrial equipment such as storage systems, power leveling and smart grid storage devices. In addition, it is propelled by a fuel-powered engine or an electric motor that uses electricity from a storage battery. Mobile devices may also be included in the category of electronic devices. Automobiles (EV), hybrid vehicles (HEV) that combine internal combustion engines and electric motors, plug-ins Hybrid vehicles (PHEVs), tracked vehicles that replace these tires and wheels with tracks, electric Motorized bicycles including cysto bicycles, motorcycles, electric wheelchairs, golf carts, small or Large ships, submarines, helicopters, aircraft, rockets, satellites, space probes and planetary probes Examples include spacecraft and spacecraft.

[0372] The portable game machine 2900 shown in FIG. 38(A) includes a housing 2901, a housing 2902, a display unit 2903, and a display unit 2904. 903, display unit 2904, microphone 2905, speaker 2906, operation switch 29 07, etc. The portable game machine 2900 also has an antenna, a battery, etc., inside the housing 2901. The portable game machine shown in FIG. 38(A) has two display units 29 The number of display units is not limited to this. 903 is provided with a touch screen as an input device, and a stylus 2908 or the like is used. It is more operable.

[0373] The information terminal 2910 shown in FIG. 38(B) includes a housing 2911, a display unit 2912, a microphone 2913, and a microphone unit 2914. 17, speaker unit 2914, camera 2913, external connection unit 2916, and operation switch The display unit 2912 includes a display panel and a touch panel using a flexible substrate. The information terminal 2910 also has an antenna inside the housing 2911, The information terminal 2910 is, for example, a smartphone, a mobile phone, a tablet, or the like. Used as a notebook type information terminal, tablet type personal computer, e-book reader, etc. It is possible.

[0374] A notebook personal computer 2920 shown in FIG. 38(C) includes a housing 2921, a display unit 2922, a keyboard 2923, and a pointing device 2924. The notebook personal computer 2920 has an antenna, a battery, and the like inside the housing 2921. It has a terry, etc.

[0375] The video camera 2940 shown in FIG. 38(D) includes a housing 2941, a housing 2942, a display unit 29 43, an operation switch 2944, a lens 2945, and a connection part 2946. The switch 2944 and the lens 2945 are provided in the housing 2941. 3 is provided in a housing 2942. A video camera 2940 is provided in a housing 2941. The housing 2941 and the housing 2942 are provided with an antenna, a battery, etc. on the side. 2946, and the angle between the housing 2941 and the housing 2942 is 46. ​​The housing 2942 relative to the housing 2941 Depending on the angle, the orientation of the image displayed on the display unit 2943 can be changed, and the image can be displayed / hidden. Switching can be done.

[0376] An example of a bangle-type information terminal is shown in FIG. 38(E). The information terminal 2950 has a housing 2951. The information terminal 2950 has a housing 2951 and a display unit 2952. The display unit 2952 is supported by a curved housing 2951. The display unit 2952 is provided with a display panel using a flexible substrate. It is possible to provide an information terminal 2950 that is flexible, lightweight, and easy to use.

[0377] An example of a wristwatch-type information terminal is shown in FIG. 38(F). The information terminal 2960 includes a housing 2961, Display unit 2962, band 2963, buckle 2964, operation switch 2965, input / output terminal The information terminal 2960 includes an antenna, a battery, and the like inside the housing 2961. The information terminal 2960 is equipped with a mobile phone, e-mail, document viewing and creation, It can be used for various applications such as music playback, internet communication, and computer games. It can be done.

[0378] The display surface of the display unit 2962 is curved, and display can be performed along the curved display surface. The display unit 2962 is also equipped with a touch sensor, and can be operated by touching the screen with a finger or a stylus. For example, the icon 2967 displayed on the display unit 2962 can be operated by touching the The operation switch 2965 is used to start the application. In addition to settings, you can also turn the power on and off, turn wireless communication on and off, activate silent mode, and It can have various functions such as turning on and off the power saving mode, turning on and off the power saving mode, etc. The operating system installed in the information terminal 2960 controls the operation of the operation switch 29 You can also set up to 65 functions.

[0379] The information terminal 2960 is also capable of performing standardized short-range wireless communication. For example, by communicating with a wireless headset, you can make hands-free calls. The information terminal 2960 is also provided with an input / output terminal 2966, and can be connected to other information terminals. Data can be exchanged directly through the connector. Charging can also be performed via the input / output terminal 2966. It may also be powered by a line.

[0380] FIG. 38(G) shows an electric refrigerator as an example of a household electrical appliance. The electric refrigerator 2970 is It has a housing 2971, a refrigerator door 2972, a freezer door 2973, and a display unit 2974. do.

[0381] 38(H) is an external view showing an example of an automobile. The automobile 2980 includes a body 2981, It has wheels 2982, a dashboard 2983, and lights 2984. The car 2980 is equipped with an antenna, a battery, etc.

[0382] The electronic devices described in this embodiment include a semiconductor device according to one embodiment of the present invention.

[0383] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible. [Explanation of symbols]

[0384] 100 Shift Registers 101 Wiring 102 Wiring 103 Wiring 104 Wiring 105 Wiring 106 Wiring 107 Wiring 108 Wiring 109 Wiring 110 Pulse output circuit 111 terminal 112 terminals 113 terminal 114 terminals 115 terminals 116 terminals 117 terminals 118 terminals 119 terminal 121 Transistor 122 transistors 123 Transistor 124 transistors 125 transistors 126 transistors 127 transistors 128 transistors 129 transistors 131 Transistor 132 transistors 134 Capacitor element 135 transistors 136 transistors 137 Capacitor 138 Capacitor 141 Wiring 142 Wiring 143 Wiring 145 Wiring 146 Wiring 147 Wiring 148 Wiring 149 Wiring 150 period 151 period 152 period 153 period 154 period 155 period 156 period 161 nodes 162 nodes 163 nodes 164 nodes 171 frame duration 172 period 191 period 192 period 193 period 223 Electrode 224 electrode 225 Insulating Layer 226 Insulating Layer 227 Insulating Layer 228 Insulating Layer 229 Insulating Layer 242 Semiconductor layer 243 Electrode 246 Electrode 251 period 252 period 253 period 255 Impurities 269 ​​areas 271 Circuit Board 272 Insulating Layer 273 Insulating Layer 274 Insulating Layer 275 Insulating Layer 277 Insulating Layer 282 Insulating Layer 382 Ec 384 Ec 386 Ec 390 trap levels 410 Transistor 411 Transistor 420 transistors 421 Transistor 425 transistor 469 Light-emitting element 430 transistors 431 Transistor 440 transistors 441 Transistor 442 transistors 443 Transistor 444 transistor 445 transistor 446 Transistor 447 Transistor 448 transistors 451 Transistor 452 transistors 453 Transistor 454 transistor 461 Transistor 462 Liquid crystal element 463 Capacitor 464 transistors 465 nodes 466 nodes 467 nodes 468 transistors 500 display device 511 Drive circuit 512 Shift Register 513 Latch Circuit 514 buffers 522 Shift Register 523 buffers 531 Display area 532 pixels 534 pixel circuit 535 Wiring 536 Wiring 900 Shift Register 901 Wiring 902 Wiring 903 Wiring 904 Wiring 905 Wiring 910 Pulse output circuit 911 terminal 912 terminal 913 terminal 914 terminal 915 terminal 916 terminal 921 Transistor 922 Transistor 924 Transistor 925 Transistor 926 Transistor 927 Transistor 928 Transistor 929 Transistor 931 Transistor 932 transistors 933 Capacitor 934 Capacitor 941 Wiring 946 Wiring 950 period 951 period 952 period 953 period 954 period 955 period 956 period 961 nodes 962 nodes 963 nodes 2900 handheld game console 2901 Case 2902 Case 2903 Display section 2904 Display section 2905 Microphone 2906 Speaker 2907 Operation switch 2908 Stylus 2910 Information terminal 2911 Case 2912 Display section 2913 Camera 2914 Speaker section 2915 Operation switch 2916 External connection part 2917 Mike 2920 Notebook Personal Computer 2921 Case 2922 Display section 2923 keyboard 2924 Pointing Device 2940 video camera 2941 Case 2942 Case 2943 Display section 2944 Operation switch 2945 Lens 2946 Connection 2950 Information terminal 2951 Case 2952 Display section 2960 Information Terminal 2961 Case 2962 Display section 2963 bands 2964 Buckle 2965 Operation switch 2966 Input / output terminal 2967 icons 2970 Electric refrigerator 2971 Case 2972 Refrigerator door 2973 Freezer door 2974 Display section 2980 Automobiles 2981 Body 2982 wheels 2983 Dashboard 2984 Light 4001 board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 board 4008 Liquid crystal layer 4010 transistor 4011 transistor 4013 Liquid crystal element 4014 Wiring 4015 Electrode 4017 Electrode 4018 FPC 4019 Anisotropic conductive layer 4020 Capacitor 4021 Electrode 4030 Electrode layer 4031 Electrode layer 4032 Insulation layer 4033 Insulation layer 4035 Spacer 4102 Insulation layer 4103 Insulation layer 4110 Insulation layer 4111 Insulation layer 4112 Insulation layer 4510 Bulkhead 4511 Light-emitting layer 4513 Light-emitting element 4514 Filling material 6000 Display Module 6001 Top cover 6002 Lower cover 6003 FPC 6004 Touch Sensor 6005 FPC 6006 Display Panel 6007 Backlight Unit 6008 Light source 6009 Frame 6010 printed circuit board 6011 Battery 100f shift register 100g shift register 110a Pulse output circuit 110b Pulse output circuit 110c pulse output circuit 110d Pulse output circuit 110e Pulse output circuit 110f pulse output circuit 110g Pulse output circuit 172a period 172b period 172d period 225a electrode 225b electrode 225c electrode 231a aperture 231b aperture 242a Semiconductor layer 242b Semiconductor layer 242c Semiconductor layer 242i Semiconductor layer 242t Semiconductor layer 242u Semiconductor layer 244a electrode 244b electrode 247a aperture 247b aperture 247c aperture 247d aperture 383a Ec 383b Ec 383c Ec 4018b FPC 451a Transistor 453a Transistor 454a Transistor 521a drive circuit 521b drive circuit

Claims

[Claim 1] A semiconductor device having first to twelfth transistors, the ninth to twelfth transistors each have a first gate and a second gate; one of a source and a drain of the first transistor is electrically connected to a first wiring; the other of the source and the drain of the first transistor is electrically connected to the one of the source and the drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to a second wiring; one of a source and a drain of the third transistor is electrically connected to the first wiring; the other of the source and the drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor; one of a source and a drain of the fourth transistor is electrically connected to the first wiring; the other of the source and the drain of the fourth transistor is electrically connected to one of the source and the drain of the ninth transistor; a gate of the fourth transistor electrically connected to a gate of the second transistor; the other of the source and the drain of the ninth transistor is electrically connected to the second wiring; the first gate of the ninth transistor is electrically connected to the first gate of the tenth transistor; the second gate of the ninth transistor is electrically connected to a third wiring; one of the source and the drain of the eleventh transistor is electrically connected to the other of the source and the drain of the fourth transistor; the other of the source and the drain of the eleventh transistor is electrically connected to the gate of the fifth transistor; the first gate of the eleventh transistor is electrically connected to a fourth wiring; the second gate of the eleventh transistor is electrically connected to the second gate of the ninth transistor; one of the source and the drain of the fifth transistor is electrically connected to one of the source and the drain of the sixth transistor; the other of the source and the drain of the fifth transistor is electrically connected to the one of the source and the drain of the tenth transistor; the second gate of the tenth transistor is electrically connected to the third wiring; the other of the source and the drain of the sixth transistor is electrically connected to the one of the source and the drain of the twelfth transistor; a gate of the sixth transistor electrically connected to a gate of the fifth transistor; the other of the source and the drain of the twelfth transistor is electrically connected to the second wiring; the first gate of the twelfth transistor is electrically connected to the first gate of the tenth transistor; the second gate of the twelfth transistor is electrically connected to the third wiring; one of the source and the drain of the seventh transistor is electrically connected to the first gate of the tenth transistor; the other of the source and the drain of the seventh transistor is electrically connected to the second wiring; a gate of the seventh transistor is electrically connected to the third wiring; one of the source and the drain of the eighth transistor is electrically connected to the other of the source and the drain of the third transistor; the other of the source and the drain of the eighth transistor is electrically connected to the first gate of the tenth transistor; a gate of the eighth transistor electrically connected to the fourth wiring;

Images