Display device

Abstract

To provide a display device capable of improving reliability.SOLUTION: A display device according to an embodiment of the present disclosure may include a substrate including a display area and a non-display area, a first electrode disposed on the substrate, an inorganic light emitting element disposed on the first electrode, and a first passivation layer disposed on the first electrode. The first electrode may include a first driving electrode disposed in the display area and a first dummy electrode disposed in the non-display area. The first passivation layer may include a first opening disposed on the first dummy electrode.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present specification relates to a display device. [Background technology]

[0002] Display devices are applied to various electronic devices such as TVs, mobile phones, notebooks, tablets, etc.

[0003] Display devices include organic light emitting displays (OLEDs), which emit light themselves, and liquid crystal displays (LCDs), which require a separate light source.

[0004] In recent years, displays incorporating light-emitting diodes (LEDs) have been gaining attention as next-generation display devices. Because LEDs are made of inorganic materials rather than organic materials, they can display images with faster lighting speeds, superior luminous efficiency, and higher brightness than LCDs and OLEDs.

[0005] In another example, micro LEDs may be used as light emitting elements. Summary of the Invention [Problem to be solved by the invention]

[0006] In the case of a display device using a micro LED, a large amount of gas can be generated during the manufacturing process because multiple layers containing organic materials are stacked. However, if an inorganic material layer is stacked on top of the organic material layer, the gas may not be able to be discharged to the outside, which can lead to a problem of reduced reliability of the display device.

[0007] The present specification provides a display device that can improve reliability.

[0008] The problems to be solved by the embodiments of the present specification are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0009] A display device according to an embodiment of the present specification may include a substrate including a display region and a non-display region, a first electrode disposed on the substrate, an inorganic light-emitting element disposed on the first electrode, and a first passivation layer disposed on the first electrode. The first electrode may include a first drive electrode disposed in the display region and a first dummy electrode disposed in the non-display region. The first passivation layer may include a first opening disposed on the first dummy electrode. [Effects of the Invention]

[0010] According to the present specification, gas inside the panel can be discharged to the outside, preventing the electrodes or alignment keys from lifting up. Therefore, the micro LEDs or panel components can be stacked at accurate positions, providing a display device with improved reliability.

[0011] According to this specification, a display device can be provided that can be driven with high efficiency and low power consumption by controlling a plurality of micro LEDs with a plurality of pixel driving circuits.

[0012] The effects of this specification are not limited to those mentioned above, and other effects not mentioned will be clearly understood by a person having ordinary skill in the technical field to which the technical idea of ​​this specification belongs from the following description. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is an exploded perspective view of a display device according to an embodiment of the present specification; [Figure 2] 1 is a plan view of a display device according to an embodiment of the present specification; [Figure 3] 1 is an enlarged view of a display device according to an embodiment of the present specification; [Figure 4] FIG. 1 illustrates a circuit structure according to an embodiment of the present specification. [Figure 5] 1 is a plan view of a display device according to an embodiment of the present specification; [Figure 6] 1 is a plan view of a display device according to an embodiment of the present specification; [Figure 7] 1 is a plan view of a display device according to an embodiment of the present specification; [Figure 8a] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 8b] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 9] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 10] 1 is an enlarged view of a display device according to an embodiment of the present specification; [Figure 11] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 12a] 10 is a cross-sectional view showing a second dummy region of the display device according to the embodiment of the present specification. FIG. [Figure 12b] FIG. 2 is a plan view of a first dummy electrode of the display device according to the embodiment of the present specification. [Figure 13] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 14] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 15] 10A and 10B are diagrams illustrating an alignment key exposed according to an embodiment of the present specification; [Figure 16] 10A and 10B are diagrams illustrating an alignment key exposed according to an embodiment of the present specification; [Figure 17] FIG. 10 is a diagram showing a state in which a second align key is arranged on the outside of a display device according to an embodiment of the present specification. [Figure 18] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 19] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 20] FIG. 10 is a diagram showing a state in which the second alignment key is peeled off. [Figure 21] 1 is a cross-sectional view of a display device according to an embodiment of the present specification. [Figure 22] 1A to 1C are diagrams showing an apparatus to which a display device according to an embodiment of the present specification is applied. [Figure 23] 1A to 1C are diagrams showing an apparatus to which a display device according to an embodiment of the present specification is applied. [Figure 24] 1A to 1C are diagrams showing an apparatus to which a display device according to an embodiment of the present specification is applied. [Figure 25] 1A to 1C are diagrams showing an apparatus to which a display device according to an embodiment of the present specification is applied. DETAILED DESCRIPTION OF THE INVENTION

[0014] The advantages and features of the present invention, as well as methods for achieving them, will become more apparent from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and may be embodied in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully convey the scope of the invention to those skilled in the art.

[0015] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of this specification are illustrative only and the specification is not limited to the details shown in the drawings. The same reference symbols refer to the same elements throughout this specification. Furthermore, when describing this specification, if a detailed description of related prior art is deemed to unnecessarily obscure the gist of this specification, such a detailed description will be omitted. When the terms "comprise," "have," or "consist of" are used in this specification, other parts may be added unless "only" or "only" is used. When an element is expressed in the singular, it may also include a plural, unless otherwise expressly specified.

[0016] When interpreting elements, they are interpreted as including a range of error even if there is no separate explicit description of the range of error.

[0017] When describing a positional relationship between two parts, for example, using terms such as "above," "on top of," "below," "next to," or "adjacent," one or more other parts may be located between the two parts, as long as terms such as "immediately," "directly," or "close to" are not used.

[0018] When describing a temporal relationship, if the temporal sequence is described using terms such as "after," "following," "next," or "before," the terms "immediately" or "directly" are not used, and therefore cases that are not consecutive may also be included.

[0019] Although terms such as "first" and "second" are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a first component referred to below may also be a second component within the technical concept of this specification.

[0020] In describing elements of the present specification, terms such as first, second, A, B, (a), or (b) may be used. These terms are used only to distinguish the elements from other elements, and do not limit the nature, order, sequence, or number of the elements.

[0021] When a component is described as being "coupled," "coupled," "connected," or "attached," "mounted," or "mounted" to another component, it should be understood that the component can be directly coupled, coupled, connected, or attached, mounted, or mounted to the other component, but that there can also be other components between the components that are indirectly coupled, coupled, connected, or attached, mounted, or mounted, unless otherwise expressly stated.

[0022] When a component or layer is described as "contacting" or "overlapping" another component or layer, it should be understood that the component or layer can directly contact or be overlaid on the other component or layer, but that other components can also be interposed between components that can indirectly contact or be overlaid unless otherwise explicitly stated.

[0023] "At least one" should be understood to include all combinations of one or more of the associated components. For example, "at least one of a first, second, and third component" means not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.

[0024] The terms "first direction," "second direction," "third direction," "X-axis direction," "Y-axis direction," and "Z-axis direction" should not be interpreted only as having a geometric relationship in which the relationship between them is perpendicular, but may also mean having a broader directionality within the range in which the configuration of this specification can function.

[0025] The features of the various embodiments of this specification may be partially or fully combined or combined with each other, and various technical interlocking and driving mechanisms may be possible, and the embodiments may be implemented in combination with each other.

[0026] Various embodiments of the present specification will now be described in detail with reference to the accompanying drawings.

[0027] Fig. 1 is an exploded perspective view showing a display device according to an embodiment of the present specification, Fig. 2 is a plan view of a display device according to an embodiment of the present specification, and Fig. 3 is an enlarged view of a display device according to an embodiment of the present specification.

[0028] As shown in Figures 1 to 3, a display device 1000 according to an embodiment of the present specification may include a display panel 100, a polarizing layer 293, an adhesive layer 295, a cover member 120, a support substrate 110, a flexible circuit board CB, and a printed circuit board 160.

[0029] For example, the display device 1000 may include a substrate 110. The substrate 110 may be a member that supports other components of the display device 1000. The substrate 110 may be made of an insulating material. For example, the substrate 110 may be made of glass or resin. The substrate 110 may also be made of a flexible material. For example, the substrate 110 may be made of a flexible plastic material such as polyimide (PI). However, the embodiments of the present specification are not limited thereto.

[0030] The display panel 100 can realize information, pictures, and / or images to be provided to a user. For example, the display panel 100 can include a display area AA and a non-display area NA. For example, the substrate 110 can include the display area AA and the non-display area NA. The display area AA and the non-display area NA are not limited to the substrate 110, but can be described throughout the display device 1000.

[0031] The display area AA may be an area where an image is displayed. The display area AA may include a plurality of pixels PX. Each of the plurality of pixels PX may be composed of a plurality of sub-pixels. A plurality of light-emitting elements may be arranged in each of the plurality of sub-pixels. The plurality of light-emitting elements may be configured differently depending on the type of display device 1000. For example, if the display device 1000 is an inorganic light-emitting display device, the light-emitting elements may be LEDs (light-emitting diodes), micro LEDs (micro light-emitting diodes), or mini LEDs (mini light-emitting diodes), although the embodiments and the like of the present specification are not limited thereto. Micro LEDs may be light-emitting elements having a size of 100 μm or less, but are not necessarily limited thereto.

[0032] The non-display area NA may be an area where no image is displayed. Various wirings and circuits for driving the pixels PX of the display area AA may be arranged in the non-display area NA. For example, various wirings and driving circuits may be implemented in the non-display area NA, and a pad unit PAD to which an integrated circuit, a printed circuit, etc. may be connected may be arranged, but the embodiments of the present specification are not limited thereto.

[0033] For example, the driving circuit may be a data driving circuit and / or a gate driving circuit, although the embodiments of the present specification are not limited thereto. Wiring to which control signals for controlling the driving circuits are supplied may be arranged in the display panel 100. For example, the control signals may include various timing signals including a clock signal, an input data enable signal, and a synchronization signal, although the embodiments of the present specification are not limited thereto. The control signals may be received via a pad unit PAD. For example, link wiring LL for transmitting signals may be arranged in the non-display area NA. For example, driving components such as a flexible circuit board CB and a printed circuit board 160 may be connected to the pad unit PAD.

[0034] According to the present specification, the non-display area NA may include a first non-display area NA1, a bending area BA, and a second non-display area NA2. For example, the first non-display area NA1 may be an area surrounding at least a portion of the display area AA. The bending area BA may be an area extending from at least one of the multiple sides of the first non-display area NA1 and may be a bendable area. The second non-display area NA2 is an area extending from the bending area BA and may have a pad section PAD disposed therein. For example, the bending area BA may be curved, and the remaining area of ​​the substrate 110 excluding the bending area BA may be flat. In this case, the bending area BA may bend, so that the second non-display area NA2 is located on the back surface of the display area AA. However, the embodiments of the present specification are not limited thereto.

[0035] The display area AA of the substrate 110 or the display device 1000 may be configured in various shapes depending on the design of the display device 1000. For example, the display area AA may be configured in a rectangular shape with four rounded corners, but the embodiments and the like of the present specification are not limited to this. As another example, the display area AA may be configured in a rectangular shape with four right-angled corners or a circular shape, but the embodiments and the like of the present specification are not limited to this.

[0036] According to this specification, the width of the second non-display area NA2 in which the plurality of pad electrodes PE are arranged may be wider than the width of the bending area BA in which only the plurality of link lines LL are arranged. Also, the width of the display area AA in which the plurality of sub-pixels are arranged may be wider than the width of the bending area BA in which only the plurality of link lines LL are arranged. Although the drawings show that the width of the bending area BA is narrower than the width of other areas of the substrate 110, the shape of the substrate 110 including the bending area BA is merely an example, and the embodiments and the like of this specification are not limited thereto.

[0037] As shown in FIG. 3 , multiple pixel driving circuits PD may be arranged in the display area AA. The multiple pixel driving circuits PD may be circuits for driving light-emitting elements of multiple sub-pixels. Each of the multiple pixel driving circuits PD includes multiple transistors, including driving transistors, and storage capacitors, and can supply control signals, power, and driving currents to the light-emitting elements of the multiple sub-pixels to control the light-emitting operations of the multiple light-emitting elements. For example, the pixel driving circuit PD may include power wiring and signal wiring for controlling the on / off and / or light-emitting duration of the light-emitting elements. For example, the multiple pixel driving circuits PD may be driver circuits manufactured on a semiconductor substrate using a MOSFET (Metal-Oxide-Silicon Field Effect Transistor) manufacturing process, but the embodiments of the present specification are not limited thereto. The driver circuit includes multiple pixel driving circuits PD and can drive multiple sub-pixels.

[0038] 1, a flexible circuit board CB and a printed circuit board 160 may be disposed below the display panel 100. The flexible circuit board CB and the printed circuit board 160 may be disposed at least on one side of the display panel 100, although embodiments of the present specification are not limited thereto. One side of the flexible circuit board CB may be attached to the display panel 100 and the other side may be attached to the printed circuit board 160, although embodiments of the present specification are not limited thereto. The flexible circuit board CB may be a flexible film, although embodiments of the present specification are not limited thereto.

[0039] A pad unit PAD including a plurality of pad electrodes PE may be arranged in the second non-display area NA2. Driving components including one or more flexible circuit boards (or flexible films) CB and a printed circuit board 160 may be attached or bonded to the pad unit PAD. The plurality of pad electrodes PE of the pad unit PAD may be electrically connected to the one or more flexible circuit boards (or flexible films) CB and transmit various signals (or power) from the printed circuit board 160 and the flexible circuit boards (or flexible films) CB to a plurality of pixel driving circuits PD in the display area AA.

[0040] The flexible circuit board (or flexible film) CB may be a film in which various components are disposed on a flexible base film. For example, a driving IC such as a gate driver IC or a data driver IC may be disposed on the flexible circuit board (or flexible film) CB, but the embodiments of the present specification are not limited thereto. The driving IC may be a component that processes data and driving signals for displaying images. Depending on the mounting method, the driving IC may be disposed in a manner such as chip-on-glass (COG), chip-on-film (COF), or tape carrier package (TCP), but the embodiments of the present specification are not limited thereto. The flexible circuit board (or flexible film) CB may be attached or bonded to a plurality of pad electrodes PE via a conductive adhesive layer, but the embodiments of the present specification are not limited thereto.

[0041] The printed circuit board 160 may be a component electrically connected to one or more flexible circuit boards (or flexible films) CB and supply signals to the driving ICs. The printed circuit board 160 may be disposed on one side of the flexible circuit boards (or flexible films) CB and electrically connected to the flexible circuit boards (or flexible films) CB. Various components for supplying various signals to the driving ICs may be disposed on the printed circuit board 160. For example, various components such as a timing controller, a power supply, a memory, or a processor may be disposed on the printed circuit board 160. For example, the printed circuit board 160 may include a power management integrated circuit (PMIC), although embodiments of the present specification are not limited thereto.

[0042] The printed circuit board 160 may include at least one hole 180, although embodiments and the like herein are not limited thereto. An internal component for sensing ambient light, temperature, or the like, which may be provided as a plurality of sensors, may be disposed in an area corresponding to the at least one hole 180. For example, the internal component may include an ambient light sensor (ALS) or a temperature sensor, although embodiments and the like herein are not limited thereto. For example, the hole 180 may be a transparent hole, although embodiments and the like herein are not limited thereto. In another example, the hole 180 may be a transparent region or hole, although embodiments and the like herein are not limited thereto.

[0043] 1, a polarizing layer 293 may be disposed on the display panel 100. The polarizing layer 293 may prevent or reduce light generated from an external light source from entering the display panel 100 and affecting light-emitting elements, etc.

[0044] The cover member 120 may be disposed on the polarizing layer 293. The cover member 120 may be a member for protecting the display panel 100. An adhesive layer 295 may be disposed between the polarizing layer 293 and the cover member 120. The adhesive layer 295 can attach the cover member 120 to the display panel 100. The adhesive layer 295 may include an optically cleared adhesive (OCA), an optically cleared resin (OCR), a pressure sensitive adhesive (PSA), or the like, but the embodiments and the like of the present specification are not limited thereto.

[0045] A support substrate 110 may be disposed between the display panel 100 and the printed circuit board 160. The support substrate 110 may reinforce the rigidity of the display panel 100. The support substrate 110 may be a backplate, but the embodiments and the like of the present specification are not limited thereto.

[0046] As shown in FIGS. 1 to 3, a plurality of link wirings LL may be arranged in the non-display area NA. The plurality of link wirings LL may be wirings that transmit various signals from one or more flexible circuit boards (or flexible films) CB and printed circuit board 160 to the display area AA. The plurality of link wirings LL may extend from the plurality of pad electrodes PE in the second non-display area NA2 toward the bending area BA and the first non-display area NA1 and be electrically connected to the plurality of drive wirings VL in the display area AA. The plurality of pixel drive circuits PD may be driven by receiving signals from one or more flexible circuit boards (or flexible films) CB and printed circuit board 160 via the drive wirings VL in the display area AA and the link wirings LL in the non-display area NA.

[0047] For example, the plurality of drive wirings VL, together with the plurality of link wirings LL, may be wirings for transmitting signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 to the plurality of pixel driving circuits PD. The plurality of drive wirings VL may be disposed in the display area AA and electrically connected to each of the plurality of pixel driving circuits PD. The plurality of drive wirings VL may extend from the display area AA toward the non-display area NA and electrically connected to the plurality of link wirings LL. Therefore, signals output from the flexible circuit board (or flexible film) CB and the printed circuit board 160 may be transmitted to each of the plurality of pixel driving circuits PD via the plurality of link wirings LL and the plurality of drive wirings VL.

[0048] As the bending area BA is bent, portions of the link lines LL may also be bent. Stress may concentrate in the bent portions of the link lines LL, which may cause cracks in the link lines LL. Therefore, the link lines LL may be made of a flexible conductive material to reduce cracks during bending of the bending area BA. For example, the link lines LL may be made of a flexible conductive material such as gold (Au), silver (Ag), or aluminum (Al), but the embodiments of the present specification are not limited thereto. The link lines LL may also be made of one of various conductive materials used in the display area AA. For example, the link lines LL may be made of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or an alloy of silver (Ag) and magnesium (Mg), or alloys thereof, but the embodiments of the present specification are not limited thereto. The link lines LL may have a multilayer structure including various conductive materials. For example, the link wirings LL may be configured with a triple layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but the embodiments and the like of the present specification are not limited to this.

[0049] The link wirings LL may be configured in various shapes to reduce stress. At least a portion of the link wirings LL arranged on the bending area BA may extend in the same direction as the extension direction of the bending area BA, or may extend in a direction different from the extension direction of the bending area BA to reduce stress. For example, if the bending area BA extends in one direction from the first non-display area NA1 to the second non-display area NA2, at least a portion of the link wirings LL arranged on the bending area BA may extend in a direction oblique to the one direction. As another example, at least a portion of the link wirings LL may be configured in various patterns. For example, at least a portion of the link wirings LL arranged on the bending area BA may have a shape in which conductive patterns having at least one of the following shapes are repeatedly arranged: diamond, rhombus, trapezoid, triangular wave, sawtooth wave, sine wave, circle, and omega (Ω) shape. However, the embodiments of the present specification are not limited thereto. Therefore, in order to minimize the stress concentrated on the link wires LL and the resulting cracks, the shape of the link wires LL may be configured in various shapes including the shapes described above, but the embodiments of this specification are not limited thereto.

[0050] FIG. 4 is a diagram illustrating a circuit structure according to an embodiment of the present specification.

[0051] Although FIG. 4 illustrates an example in which one light emitting element ED is connected to a μDriver, this is not limiting. For example, eight light emitting elements ED may be connected to one μDriver. In other examples, 16 light emitting elements ED may be connected to one μDriver, or 32 or 64 light emitting elements ED may be connected to one μDriver simultaneously. The light emitting element ED may be a micro light emitting element (μLED). The μDriver may correspond to a pixel driving circuit PD or may include multiple pixel driving circuits PD integrated therein.

[0052] One driver (μDriver) drives the driving transistor T DR and light-emitting transistor T EM However, embodiments of the present specification are not limited thereto. For example, one or more other transistors and one or more capacitors may be included in the driver (μDriver). For example, 2T1C, 3T1C, 4T1C, 5T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T1C, 7T2C, 8T1C, 8T2C structures, etc. may also be included in the driver (μDriver).

[0053] For example, the driving transistor T DR In the example shown in FIG. 1, a high potential power supply voltage VDD is applied to the first electrode, and a light-emitting transistor T EM The first electrodes of the driving transistors T are connected to each other, and a scan signal SC can be applied to the gate electrodes of the driving transistors T. DR The scan signal SC applied to the gate electrode is a direct current power supply, and a fixed reference voltage Vref may be applied for each frame, but the embodiments and the like of this specification are not limited to this.

[0054] Light-emitting transistor T EM is connected to the first electrode of the driving transistor T DR The light emitting element ED is connected to the second electrode of the light emitting transistor T. A light emitting signal EM can be applied to the gate electrode of the light emitting transistor T. EM The light emission signal EM applied to the gate electrode may be a pulse width modulation signal that is changed for each frame, but the embodiments and the like of this specification are not limited to this.

[0055] The first electrode of the light-emitting element ED is connected to the light-emitting transistor T EM The first electrode of the light-emitting element ED may be connected to the second electrode of the light-emitting element ED, and the second electrode of the light-emitting element ED may be connected to ground. For example, the first electrode of the light-emitting element ED may be an anode electrode, and the second electrode of the light-emitting element ED may be a cathode electrode, but the embodiments and the like of the present specification are not limited thereto.

[0056] Drive transistor TDR and light-emitting transistor T EM may each be an n-type transistor or a p-type transistor.

[0057] The driving driver (μDriver) drives the driving transistor T DR is turned on, and the light-emitting transistor T EM This allows the driving transistor T DR A high potential power supply voltage VDD applied to the first electrode of the driving transistor T DR and light-emitting transistor T EM The light emitting element ED can emit light by applying a voltage to the light emitting element ED via the voltage Vcc.

[0058] 5 to 7 are plan views of display devices according to embodiments of the present specification.

[0059] For example, Fig. 5 is an enlarged plan view of a display area including a plurality of pixels, Fig. 6 is an enlarged plan view of a display area including one pixel, and Fig. 7 is an enlarged plan view of a display area including a plurality of pixels.

[0060] 5 and 7, only a plurality of signal wirings TL, a plurality of communication wirings NL, a plurality of first drive electrodes CE1, a plurality of banks BNK, and a plurality of light-emitting elements ED are illustrated, but the embodiments of the present specification are not limited to this. Fig. 7 is an enlarged plan view in which a plurality of second electrodes CE2 are further arranged in Fig. 5.

[0061] 5 and 6, a plurality of pixels PX each consisting of a plurality of sub-pixels may be arranged in a display area AA. Each of the plurality of sub-pixels includes a light-emitting element ED and can independently emit light. The plurality of sub-pixels may be arranged in a matrix having a plurality of rows and a plurality of columns, although the embodiments of the present specification are not limited thereto.

[0062] The plurality of subpixels may include a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3. For example, one of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be a red subpixel, another may be a green subpixel, and the remaining may be blue subpixels. The types of the plurality of subpixels are merely exemplary, and the embodiments and the like of the present specification are not limited thereto.

[0063] Each of the pixels PX may include one or more first subpixels SP1, one or more second subpixels SP2, and one or more third subpixels SP3. For example, one pixel PX may include a pair of first subpixels SP1, a pair of second subpixels SP2, and a pair of third subpixels SP3. The pair of first subpixels SP1 may be composed of a 1-1 subpixel SP1a and a 1-2 subpixel SP1b. The pair of second subpixels SP2 may be composed of a 2-1 subpixel SP2a and a 2-2 subpixel SP2b. The pair of third subpixels SP3 may be composed of a 3-1 subpixel SP3a and a 3-2 subpixel SP3b. For example, one pixel PX may include a 1-1 subpixel SP1a and a 1-2 subpixel SP1b, a 2-1 subpixel SP2a and a 2-2 subpixel SP2b, and a 3-1 subpixel SP3a and a 3-2 subpixel SP3b, but the embodiments and the like of this specification are not limited to this.

[0064] The subpixels constituting one pixel PX may be arranged in various ways. For example, in one pixel PX, a pair of first subpixels SP1 may be arranged in the same column, a pair of second subpixels SP2 may be arranged in the same column, and a pair of third subpixels SP3 may be arranged in the same column. The first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be arranged in the same row. The number and arrangement of the subpixels constituting one pixel PX are merely examples, and the embodiments and the like of this specification are not limited thereto.

[0065] A plurality of signal lines TL may be arranged in regions between the plurality of subpixels. The plurality of signal lines TL may extend in the column direction from between the plurality of subpixels. The plurality of signal lines TL may be lines that transmit an anode voltage from a pixel driving circuit PD to the plurality of subpixels. For example, the plurality of signal lines TL may be electrically connected to the plurality of pixel driving circuits PD and the first driving electrodes CE1 of the plurality of subpixels. The anode voltage output from the pixel driving circuit PD may be transmitted to the first driving electrodes CE1 of the plurality of subpixels via the plurality of signal lines TL. For example, the first driving electrode CE1 may be an electrode electrically connected to the anode electrode 134 of the light-emitting element ED. Thus, the anode voltage from the signal line TL may be transmitted to the anode electrode 134 of the light-emitting element ED via the first driving electrode CE1.

[0066] Therefore, instead of forming multiple transistors and storage capacitors in each of the multiple sub-pixels, a pixel driving circuit PD in which multiple pixel circuits are integrated can be used to simplify the structure of the display device 1000. Furthermore, by integrating the circuits disposed in each of the multiple sub-pixels into a single pixel driving circuit PD, highly efficient low-power driving is possible.

[0067] The plurality of signal lines TL may include a first signal line TL1, a second signal line TL2, a third signal line TL3, a fourth signal line TL4, a fifth signal line TL5, and a sixth signal line TL6. Each of the first signal line TL1 and the second signal line TL2 may be electrically connected to each of the pair of first sub-pixels SP1. Each of the third signal line TL3 and the fourth signal line TL4 may be electrically connected to each of the pair of second sub-pixels SP2. Each of the fifth signal line TL5 and the sixth signal line TL6 may be electrically connected to each of the pair of third sub-pixels SP3.

[0068] A first signal line TL1 may be arranged on one side of the pair of first subpixels SP1, and a second signal line TL2 may be arranged on the other side of the pair of first subpixels SP1. The first signal line TL1 may be electrically connected to the first drive electrode CE1 of one of the pair of first subpixels SP1, for example, the 1-1th subpixel SP1a. The second signal line TL2 may be electrically connected to the first drive electrode CE1 of the other of the pair of first subpixels SP1, for example, the 1-2th subpixel SP1b.

[0069] A third signal line TL3 may be arranged on one side of the pair of second subpixels SP2, and a fourth signal line TL4 may be arranged on the other side of the pair of second subpixels SP2. For example, the third signal line TL3 may be arranged adjacent to the second signal line TL2. The third signal line TL3 may be electrically connected to the first drive electrode CE1 of one of the pair of second subpixels SP2, for example, the 2-1st subpixel SP2a. The fourth signal line TL4 may be electrically connected to the first drive electrode CE1 of the other of the pair of second subpixels SP2, for example, the 2-2nd subpixel SP2b.

[0070] A fifth signal line TL5 may be arranged on one side of the pair of third subpixels SP3, and a sixth signal line TL6 may be arranged on the other side of the pair of third subpixels SP3. For example, the fifth signal line TL5 may be arranged adjacent to the fourth signal line TL4. The sixth signal line TL6 may be arranged adjacent to the first signal line TL1 connected to the adjacent pixel PX. The fifth signal line TL5 may be electrically connected to the first drive electrode CE1 of one of the pair of third subpixels SP3, for example, the 3-1 subpixel SP3a. The sixth signal line TL6 may be electrically connected to the first drive electrode CE1 of the other of the pair of third subpixels SP3, for example, the 3-2 subpixel SP3b.

[0071] The signal wirings TL may be made of a conductive material. For example, the signal wirings TL may be made of a conductive material such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but the embodiments of the present specification are not limited thereto. As another example, the signal wirings TL may be made of a multilayer structure of conductive materials. For example, the signal wirings TL may be made of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the embodiments of the present specification are not limited thereto.

[0072] A plurality of communication lines NL may be arranged in the region between the plurality of pixels PX. The plurality of communication lines NL may be arranged extending in the row direction from the region between the plurality of pixels PX. The plurality of communication lines NL may be arranged in the region between the plurality of second electrodes CE2 and may not overlap the plurality of second electrodes CE2. For example, the plurality of communication lines NL may be lines used for short-range communication such as NFC (Near Field Communication). The plurality of communication lines NL may function as an antenna. For example, the plurality of communication lines NL may be a plurality of connecting lines, but the embodiments and the like of this specification are not limited thereto.

[0073] According to this specification, a bank BNK may be disposed in each of the plurality of subpixels. The plurality of banks BNK may be a structure to which a plurality of light-emitting elements ED are fixed. The banks BNK of the plurality of subpixels SP may be configured to be separated from each other. For example, the banks BNK of the plurality of subpixels SP may be formed in an island shape. The plurality of banks BNK may guide the positions of the plurality of light-emitting elements ED in a transfer process for transferring the plurality of light-emitting elements ED to the display device 1000. This makes it easy to distinguish the banks BANK of the first subpixel, second subpixel, and third subpixel to which different types of light-emitting elements ED are transferred.

[0074] In the transfer process of the plurality of light emitting elements ED, the plurality of light emitting elements ED can be transferred onto the plurality of banks BNK. The plurality of banks BNK may be bank patterns or structures, but the embodiments of the present specification are not limited thereto.

[0075] The banks BNK for the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be spaced apart from one another. The banks BNK for the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be configured to be separated from one another. This makes it easy to distinguish between the banks BNK for the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, to which different types of light-emitting elements ED are transferred.

[0076] The bank BNK of the 1-1 subpixel SP1a and the bank BNK of the 1-2 subpixel SP1b may be connected to each other, or may be spaced apart or separated from each other. For example, taking into consideration design requirements such as transfer process requirements, the bank BNK of the 1-1 subpixel SP1a and the bank BNK of the 1-2 subpixel SP1b, in which the same type of light-emitting element ED is arranged, may be connected to each other, spaced apart or separated from each other. The bank BNK of the 2-1 subpixel SP2a and the bank BNK of the 2-2 subpixel SP2b may be connected to each other, or may be spaced apart or separated from each other. The bank BNK of the 3-1 subpixel SP3a and the bank BNK of the 3-2 subpixel SP3b may be connected to each other, or may be spaced apart or separated from each other. Therefore, the banks BNK of the pair of first subpixels SP1, the banks BNK of the pair of second subpixels SP2, and the banks BNK of the pair of third subpixels SP3 can be formed in various ways, and the embodiments of this specification are not limited thereto.

[0077] For example, the plurality of banks BNK may be made of an organic insulating material. The plurality of banks BNK may be made of a single layer or multiple layers of an organic insulating material. For example, the plurality of banks BNK may be made of a photoresist, polyimide (PI), an acrylic material, or the like, but the embodiments of the present specification are not limited thereto.

[0078] A first drive electrode CE1 may be arranged in each of the plurality of subpixels. The first drive electrode CE1 may be arranged on a bank BNK. The first drive electrode CE1 may be electrically connected to one signal line TL among the plurality of signal lines TL. At least a portion of the first drive electrode CE1 may extend outside the bank BNK and be electrically connected to the signal line TL closest to the first drive electrode CE1. For example, a portion of the first drive electrode CE1 of the 1-1 subpixel SP1a may extend to one side region of the 1-1 subpixel SP1a and be electrically connected to the first signal line TL1, and a portion of the first drive electrode CE1 of the 1-2 subpixel SP1b may extend to the other side region of the 1-2 subpixel SP1b and be electrically connected to the second signal line TL2. A portion of the first drive electrode CE1 of the 2-1 subpixel SP2a may extend to one side region of the 2-1 subpixel SP2a and be electrically connected to the third signal line TL3, a portion of the first drive electrode CE1 of the 2-2 subpixel SP2b may extend to the other side region of the 2-2 subpixel SP2b and be electrically connected to the fourth signal line TL4, a portion of the first drive electrode CE1 of the 3-1 subpixel SP3a may extend to one side region of the 3-1 subpixel SP3a and be electrically connected to the fifth signal line TL5, and a portion of the first drive electrode CE1 of the 3-2 subpixel SP3b may extend to the other side region of the 3-2 subpixel SP3b and be electrically connected to the sixth signal line TL6.

[0079] The first driving electrode CE1 is electrically connected to the anode electrode 134 of the light-emitting element ED and may transmit an anode voltage from the pixel driving circuit PD to the light-emitting element ED via the signal wiring TL. Different voltages may be applied to the first driving electrode CE1 of each of the plurality of sub-pixels depending on the image to be displayed. For example, different voltages may be applied to the first driving electrode CE1 of each of the plurality of sub-pixels. Therefore, the first driving electrode CE1 may be a pixel electrode, and the embodiments of the present specification are not limited thereto.

[0080] The first driving electrode CE1 may be made of a conductive material. For example, the first driving electrode CE1 may be integrally formed with the plurality of signal lines TL. For example, the first driving electrode CE1 may be made of the same conductive material as the plurality of signal lines TL, but the embodiments and the like of the present specification are not limited thereto. For example, the first driving electrode CE1 may be made of a conductive material such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc., but the embodiments and the like of the present specification are not limited thereto. As another example, the first driving electrode CE1 may be made of a multi-layer structure of conductive materials. For example, the plurality of first drive electrodes CE1 may be composed of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the embodiments and the like of this specification are not limited thereto.

[0081] A light-emitting element ED may be arranged in each of the plurality of sub-pixels. The light-emitting elements ED may be either light-emitting diodes (LEDs) or micro light-emitting diodes (micro LEDs), but the embodiments of the present specification are not limited thereto. The light-emitting elements ED may be arranged on the bank BNK and the first driving electrodes CE1. The light-emitting elements ED may be arranged on the first driving electrodes CE1 and electrically connected to the first driving electrodes CE1. Therefore, the light-emitting elements ED may emit light when an anode voltage is applied from the pixel driving circuit PD via the signal wiring TL and the first driving electrodes CE1.

[0082] The plurality of light-emitting elements ED may include a first light-emitting element 130, a second light-emitting element 140, and a third light-emitting element 150. The first light-emitting element 130 may be disposed in a first sub-pixel SP1. The second light-emitting element 140 may be disposed in a second sub-pixel SP2. The third light-emitting element 150 may be disposed in a third sub-pixel SP3. For example, one of the first light-emitting element 130, the second light-emitting element 140, and the third light-emitting element 150 may be a red light-emitting element, another may be a green light-emitting element, and the remaining may be blue light-emitting elements; however, the embodiments and the like herein are not limited thereto. This allows light of various hues, including white, to be realized by combining the red light, green light, and blue light emitted from the plurality of light-emitting elements ED. The types of the plurality of light-emitting elements ED are merely exemplary, and the embodiments and the like herein are not limited thereto.

[0083] The first light-emitting element 130 may include a 1-1 light-emitting element 130a arranged in a 1-1 sub-pixel SP1a and a 1-2 light-emitting element 130b arranged in a 1-2 sub-pixel SP1b. The second light-emitting element 140 may include a 2-1 light-emitting element 140a arranged in a 2-1 sub-pixel SP2a and a 2-2 light-emitting element 140b arranged in a 2-2 sub-pixel SP2b. The third light-emitting element 150 may include a 3-1 light-emitting element 150a arranged in a 3-1 sub-pixel SP3a and a 3-2 light-emitting element 150b arranged in a 3-2 sub-pixel SP3b.

[0084] 5 to 7, a second electrode CE2 may be disposed in each of the plurality of sub-pixels. The second electrode CE2 may be disposed on the light-emitting element ED. The second electrode CE2 may be electrically connected to the pixel driving circuit PD via a plurality of contact electrodes CCE.

[0085] For example, the second electrode CE2 may be electrically connected to the cathode electrode 135 of the light-emitting element ED to transmit a cathode voltage from the pixel driving circuit PD to the light-emitting element ED. The same cathode voltage may be applied to the second electrode CE2 of each of the plurality of sub-pixels. For example, the same voltage may be applied to the second electrode CE2 of each of the plurality of sub-pixels and the cathode electrode 135 of the light-emitting element ED. Thus, the second electrode CE2 may be a common electrode, but the embodiments of the present specification are not limited thereto.

[0086] At least some of the subpixels may share the second electrode CE2. At least some of the second electrodes CE2 of the subpixels may be electrically connected to one another. The same voltage may be applied to the second electrode CE2, allowing at least some of the subpixels to share the second electrode CE2. For example, the second electrodes CE2 of at least some of the pixels PX arranged in the same row may be connected to one another. For example, one second electrode CE2 may be arranged for multiple pixels PX. One second electrode CE2 may be arranged for every n subpixels.

[0087] For example, some of the second electrodes CE2 of the plurality of subpixels may be spaced apart or separated from one another. For example, the second electrode CE2 connected to the pixels PX in the nth row and the second electrode CE2 connected to the pixels PX in the (n+1)th row may be spaced apart or separated from one another. For example, the plurality of second electrodes CE2 may be spaced apart from one another across a plurality of communication lines NL extending in the row direction. As a result, the number of the plurality of subpixels may be greater than the number of the plurality of second electrodes CE2. As another example, all of the second electrodes CE2 of the plurality of subpixels may be connected to one another, and only one second electrode CE2 may be disposed on the substrate 110; however, the embodiments of the present specification are not limited to this.

[0088] The plurality of second electrodes CE2 may be made of a transparent conductive material, but the embodiments and the like of the present specification are not limited thereto. The plurality of second electrodes CE2 may be made of a transparent conductive material and may direct light emitted from the light emitting element ED toward the top of the second electrodes CE2. For example, the second electrodes CE2 may be made of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc., but the embodiments and the like of the present specification are not limited thereto.

[0089] A plurality of contact electrodes CCE may be arranged on the substrate 110. For example, the plurality of contact electrodes CCE may be arranged at a distance from the plurality of banks BNK and the plurality of signal wirings TL. Each of the plurality of second electrodes CE2 may overlap at least one contact electrode CCE. For example, one second electrode CE2 may overlap a plurality of contact electrodes CCE.

[0090] For example, the contact electrodes CCE may be electrically coupled to the second electrodes CE2. The contact electrodes CCE may be disposed between the substrate 110 and the second electrodes CE2 to transmit a cathode voltage from the pixel driving circuit PD to the second electrodes CE2.

[0091] When micro LEDs are used as the light emitting elements ED, the display device 1000 can be manufactured by fabricating multiple micro LEDs on a wafer and transferring the micro LEDs to the substrate 110 of the display device 1000. Various defects may occur during the process of transferring multiple light emitting elements ED, each having a fine size, from the wafer to the substrate 110. For example, a transfer defect may occur in which the light emitting element ED is not transferred to some subpixels, and a transfer defect may occur in which the light emitting element ED is transferred out of position due to an alignment error to other subpixels. Furthermore, the transfer process may proceed normally, but the transferred light emitting element ED itself may be defective. Therefore, in consideration of defects during the transfer process of multiple light emitting elements ED, multiple light emitting elements ED of the same type may be transferred to one subpixel. A lighting test of the multiple light emitting elements ED may be performed, and only one light emitting element ED that is ultimately determined to be normal may be used.

[0092] For example, both the 1-1 light-emitting element 130a and the 1-2 light-emitting element 130b can be transferred to one pixel PX and inspected for defects. If both the 1-1 light-emitting element 130a and the 1-2 light-emitting element 130b are determined to be normal, only the 1-1 light-emitting element 130a can be used, and the 1-2 light-emitting element 130b can be left unused. As another example, if, of the 1-1 light-emitting element 130a and the 1-2 light-emitting element 130b, only the 1-2 light-emitting element 130b is determined to be normal, the 1-1 light-emitting element 130a can be left unused, and only the 1-2 light-emitting element 130b can be used. Therefore, even if multiple light-emitting elements ED of the same type are transferred to one pixel PX, ultimately only one light-emitting element ED can be used.

[0093] Thus, one of the pair of light emitting elements ED may be a main (or primary) light emitting element ED, and the other may be a redundancy light emitting element ED. The redundancy light emitting element ED may be an extra light emitting element ED transferred in preparation for a defect in the main light emitting element ED. When the main light emitting element ED is defective, the redundancy light emitting element ED can be used in place of the main light emitting element ED. Therefore, by transferring both the main light emitting element ED and the redundancy light emitting element ED to one pixel PX, it is possible to minimize degradation of display quality due to defects in the main light emitting element ED and the redundancy light emitting element ED.

[0094] For example, the 1-1 light-emitting element 130a, the 2-1 light-emitting element 140a, and the 3-1 light-emitting element 150a transferred to one pixel PX can be used as the main light-emitting element ED, and the 1-2 light-emitting element 130b, the 2-2 light-emitting element 140b, and the 3-2 light-emitting element 150b can be used as the redundancy light-emitting element ED.

[0095] The display panel 100 according to the present specification includes a first driving electrode CE1 disposed under the light-emitting element ED, and can improve light output efficiency by exposing a portion of a conductive layer with high reflectivity among a plurality of conductive layers disposed in the first driving electrode CE1 through a process such as an etching process.

[0096] 8a and 8b are cross-sectional views of a display device according to an embodiment of the present specification, for example, Fig. 8a is a cross-sectional view of the display area taken along line II' in Fig. 3, and Fig. 8b is a cross-sectional view of the first non-display area, the bending area, and the second non-display area taken along line II' in Fig. 3.

[0097] 9 is a cross-sectional view of a display device according to an embodiment of the present specification, for example, a cross-sectional view showing a sub-pixel including a light-emitting element arranged in a display area AA.

[0098] As shown in FIGS. 8a and 8b, a first buffer layer 111a and a second buffer layer 111b may be disposed on the remaining area of ​​the substrate 110 except for the bending area BA.

[0099] The first buffer layer 111a and the second buffer layer 111b may be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. The first buffer layer 111a and the second buffer layer 111b may reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b may be composed of an inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b may be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), although the embodiments and the like of the present specification are not limited thereto.

[0100] For example, portions of the first buffer layer 111a and the second buffer layer 111b on the bending region BA may be removed. The top surface of the substrate 110 located in the bending region BA may be exposed from the first buffer layer 111a and the second buffer layer 111b. By removing the first buffer layer 111a and the second buffer layer 111b made of an inorganic insulating material from the bending region BA, cracks in the first buffer layer 111a and the second buffer layer 111b that may occur during bending may be minimized.

[0101] A plurality of align keys MK may be disposed between the first buffer layer 111a and the second buffer layer 111b. The plurality of align keys MK may be configured to identify the positions of the pixel driving circuits PD during the manufacturing process of the display device 1000. For example, the plurality of align keys MK may be configured to align the positions of the pixel driving circuits PD transferred onto the adhesive layer 112. As another example, the plurality of align keys MK may be omitted.

[0102] An adhesive layer 112 may be disposed on the second buffer layer 111b. The adhesive layer 112 may be disposed in the display area AA, the first non-display area NA1, the bending area BA, and the second non-display area NA2. As another example, at least a portion of the adhesive layer 112 may be removed from the non-display area NA including the bending area BA. For example, the adhesive layer 112 may be made of any one of an adhesive polymer, an epoxy resin, a UV-curable resin, a polyimide-based material, an acrylate-based material, a urethane-based material, and polydimethylsiloxane (PDMS), but the embodiments of the present specification are not limited thereto.

[0103] In the display area AA, a pixel driving circuit PD may be disposed on the adhesive layer 112. When the pixel driving circuit PD is realized by a driver, the driver may be mounted on the adhesive layer 112 by a transfer process, but the embodiments and the like of this specification are not limited thereto.

[0104] A first protective layer 113a and a second protective layer 113b may be disposed on the adhesive layer 112 and the pixel driving circuit PD. The first protective layer 113a and the second protective layer 113b may be disposed to surround the side surfaces of the pixel driving circuit PD, although the embodiments and the like of the present specification are not limited thereto. For example, the second protective layer 113b may be disposed to cover at least a portion of the upper surface of the pixel driving circuit PD. For example, at least one of the first protective layer 113a and the second protective layer 113b disposed on the bending region BA may be omitted. For example, the first protective layer 113a may be disposed entirely in the display region AA and the non-display region NA, and the second protective layer 113b may be partially disposed in the display region AA, the first non-display region NA1, and the second non-display region NA2. For example, the portion of the second protective layer 113b in the bending region BA may be removed. However, the embodiments and the like of the present specification are not limited thereto.

[0105] The first protective layer 113a and the second protective layer 113b may be made of an organic insulating material, but the embodiments of the present specification are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be an overcoating layer or an insulating layer, but the embodiments of the present specification are not limited thereto.

[0106] According to the present specification, a plurality of first connecting wires 121 may be disposed on the second protective layer 113b in the display area AA. The plurality of first connecting wires 121 may be wires for electrically connecting the pixel driving circuit PD to other components. For example, the pixel driving circuit PD may be electrically connected to a plurality of signal wires TL and a plurality of contact electrodes CCE via the plurality of first connecting wires 121. For example, the plurality of first connecting wires 121 may include a 1-1 connecting wire 121a, a 1-2 connecting wire 121b, a 1-3 connecting wire 121c, and a 1-4 connecting wire 121d, but the embodiments of the present specification are not limited thereto.

[0107] For example, the plurality of first-first connecting wires 121a may be disposed on the second protective layer 113b. The plurality of first-first connecting wires 121a may be electrically connected to the pixel driving circuit PD. The plurality of first-first connecting wires 121a may transmit a voltage output from the pixel driving circuit PD to the first driving electrode CE1 or the second electrode CE2.

[0108] For example, a third protective layer 114 may be disposed on the second protective layer 113b. The third protective layer 114 may be disposed over the entire display area AA and non-display area NA. In the bending area BA, the third protective layer 114 may cover or encase the side surfaces of the second protective layer 113b and the top surface of the first protective layer 113a. The third protective layer 114 may be made of an organic insulating material. For example, the third protective layer 114 may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 may be made of the same material, but the embodiments of the present disclosure are not limited thereto.

[0109] A plurality of first-second connecting wires 121b may be disposed on the third protective layer 114. The plurality of first-second connecting wires 121b may be directly connected to the pixel driving circuit PD. For example, some of the first-second connecting wires 121b may be directly connected to the pixel driving circuit PD through contact holes in the third protective layer 114. Other parts of the first-second connecting wires 121b may be electrically connected to the first-first connecting wire 121a through contact holes in the third protective layer 114. However, the embodiments of the present specification are not limited thereto. A voltage output from the pixel driving circuit PD may be transmitted to the first driving electrode CE1 or the second electrode CE2 through the plurality of first-second connecting wires 121b and other connecting wires.

[0110] A first insulating layer 115a may be disposed on the plurality of first and second connecting wires 121b. The first insulating layer 115a may be disposed over the entire display area AA and non-display area NA, although embodiments of the present specification are not limited thereto. The first insulating layer 115a may be made of an organic insulating material, although embodiments of the present specification are not limited thereto. For example, the first insulating layer 115a may be made of a photoresist, polyimide (PI), or a photoacryl-based material, although embodiments of the present specification are not limited thereto.

[0111] A plurality of first-third connecting wires 121c may be disposed on the first insulating layer 115a. The plurality of first-third connecting wires 121c may be electrically connected to the plurality of first-second connecting wires 121b. For example, the first-third connecting wires 121c may be electrically connected to the first-second connecting wires 121b through contact holes in the first insulating layer 115a.

[0112] A second insulating layer 115b may be disposed on the first to third connecting wires 121c. The second insulating layer 115b may be disposed in the remaining area excluding the bending area BA, but the embodiments of the present specification are not limited thereto. The second insulating layer 115b may be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2, but the embodiments of the present specification are not limited thereto. For example, a portion of the second insulating layer 115b disposed in the bending area BA may be removed. The second insulating layer 115b may be made of an organic insulating material, but the embodiments of the present specification are not limited thereto. For example, the second insulating layer 115b may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto.

[0113] A plurality of first to fourth connecting wires 121d may be disposed on the second insulating layer 115b. The plurality of first to fourth connecting wires 121d may be electrically connected to the plurality of first to third connecting wires 121c. For example, the first to fourth connecting wires 121d may be electrically connected to the first to third connecting wires 121c through contact holes in the second insulating layer 115b.

[0114] According to the present specification, a plurality of second connecting wires 122 may be disposed on the second protective layer 113b in the non-display area NA. The plurality of second connecting wires 122 may be wires for transmitting signals transmitted to the pad unit PAD from the flexible circuit board (or flexible film) CB and the printed circuit board 160 (see FIG. 1) to the pixel driving circuit PD in the display area AA. For example, the plurality of second connecting wires 122 may be electrically connected to a plurality of pad electrodes PE, and signals from the flexible circuit board (or flexible film) CB and the printed circuit board may be applied to the plurality of second connecting wires 122.

[0115] For example, the second connecting wires 122 may extend from the pad unit PAD toward the display area AA and transmit signals to the wires in the display area AA. In this case, the second connecting wires 122 may function as link wires LL. The second connecting wires 122 may include a 2-1 connecting wire 122a, a 2-2 connecting wire 122b, a 2-3 connecting wire 122c, and a 2-4 connecting wire 122d.

[0116] A plurality of second-1 connecting wires 122a may be disposed on the second protective layer 113b. The plurality of second-1 connecting wires 122a may extend from the second non-display area NA2 to the bending area BA and the first non-display area NA1. The plurality of second-1 connecting wires 122a may transmit signals transmitted to the pad unit PAD from the flexible circuit board (or flexible film) CB and the printed circuit board to the pixel driving circuit PD in the display area AA.

[0117] A plurality of second-second connecting wires 122b may be disposed on the third protective layer 114. The plurality of second-second connecting wires 122b may be disposed in the second non-display area NA2. The second-second connecting wires 122b may be electrically connected to the second-first connecting wires 122a through contact holes in the third protective layer 114. Therefore, signals from the flexible circuit board (or flexible film) CB and the printed circuit board may be transmitted to the second-first connecting wires 122a via the second-second connecting wires 122b.

[0118] The second-third connecting wire 122c may be disposed on the first insulating layer 115a. The second-third connecting wire 122c may be disposed in the second non-display area NA2. The second-third connecting wire 122c may be electrically connected to the second-second connecting wire 122b through a contact hole in the first insulating layer 115a. Therefore, signals from the flexible circuit board (or flexible film) CB and the printed circuit board may be transmitted to the second-first connecting wire 122a via the second-third connecting wire 122c and the second-second connecting wire 122b.

[0119] A second-fourth connecting wire 122d may be disposed on the second insulating layer 115b. The second-fourth connecting wire 122d may be disposed in the second non-display area NA2. The second-fourth connecting wire 122d may be electrically connected to the second-third connecting wire 122c through a contact hole in the second insulating layer 115b. Therefore, signals from the flexible circuit board (or flexible film) CB and the printed circuit board may be transmitted to the second-first connecting wire 122a via the second-fourth connecting wire 122d, the second-third connecting wire 122c, and the second-second connecting wire 122b.

[0120] The plurality of first connecting wires 121 and the plurality of second connecting wires 122 may be formed of a flexible conductive material or any one of various conductive materials used in the display area AA. For example, the second connecting wire 122 disposed in a portion of the bending area BA may be formed of a flexible conductive material such as gold (Au), silver (Ag), or aluminum (Al), but the embodiments of the present specification are not limited thereto. As another example, the plurality of first connecting wires 121 and the plurality of second connecting wires 122 may be formed of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), an alloy of silver (Ag) and magnesium (Mg), or an alloy thereof, but the embodiments of the present specification are not limited thereto.

[0121] A third insulating layer 115c may be disposed on the plurality of first connecting wires 121 and the plurality of second connecting wires 122. The third insulating layer 115c may be disposed in the remaining area excluding the bending area BA, but the embodiments of the present specification are not limited thereto. The third insulating layer 115c may be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. A portion of the third insulating layer 115c in the bending area BA may be removed. The third insulating layer 115c may be made of an organic insulating material, but the embodiments of the present specification are not limited thereto. For example, the third insulating layer 115c may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto.

[0122] A plurality of banks BNK may be arranged on the third insulating layer 115c in the display area AA. The plurality of banks BNK may be arranged to overlap each of the plurality of sub-pixels. One or more light-emitting elements ED of the same type may be arranged on top of each of the plurality of banks BNK.

[0123] A plurality of signal lines TL may be arranged on the third insulating layer 115c in the display area AA. The signal lines TL may be arranged in the areas between the plurality of banks BNK. For example, the signal lines TL may be arranged adjacent to any one of the plurality of banks BNK.

[0124] A plurality of contact electrodes CCE may be disposed on the third insulating layer 115c in the display area AA. The plurality of contact electrodes CCE may supply a cathode voltage from the pixel driving circuit PD to the second electrode CE2.

[0125] A first drive electrode CE1 may be arranged on the bank BNK. For example, the first drive electrode CE1 may be arranged extending from the adjacent signal wiring TL toward the top of the bank BNK. The first drive electrode CE1 may be arranged on the top surface of the bank BNK and on the side surface of the bank BNK. For example, the first drive electrode CE1 may be arranged extending from the signal wiring TL on the top surface of the third insulating layer 115c to the side surface of the bank BNK and on the top surface of the bank BNK.

[0126] 9, the first drive electrode CE1 and the contact electrode CCE may be composed of a plurality of conductive layers. The first drive electrode CE1 and the contact electrode CCE may be formed in the same process, and each of the first drive electrode CE1 and the contact electrode CCE may include the same plurality of conductive layers.

[0127] The first drive electrode CE1 may include a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but the embodiments and the like of this specification are not limited to this.

[0128] The first conductive layer CE1a may be disposed on the bank BNK. The second conductive layer CE1b may be disposed on the first conductive layer CE1a. The third conductive layer CE1c may be disposed on the second conductive layer CE1b. The fourth conductive layer CE1d may be disposed on the third conductive layer CE1c. For example, each of the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d may be made of any one of titanium (Ti), molybdenum (Mo), aluminum (Al), and indium tin oxide (ITO), although the embodiments and the like of the present specification are not limited thereto.

[0129] According to the present specification, among the plurality of conductive layers constituting the first driving electrode CE1, some conductive layers with high reflective efficiency may be configured as an alignment key and / or a reflector for aligning the light emitting element ED. For example, among the plurality of conductive layers of the first driving electrode CE1, the second conductive layer CE1b may include a reflective material. For example, the second conductive layer CE1b may include aluminum (Al), but the embodiments of the present specification are not limited thereto. Thus, the second conductive layer CE1b may be configured as a reflector. Furthermore, the high reflective efficiency of the second conductive layer CE1b may facilitate identification during the manufacturing process, and thus the position or transfer position of the light emitting element ED may be aligned based on the second conductive layer CE1b.

[0130] For example, to configure the second conductive layer CE1b as a reflector, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b may be partially removed or etched. For example, portions of the third conductive layer CE1c and the fourth conductive layer CE1d may be removed or etched to expose the top surface of the second conductive layer CE1b. For example, the central portion and the frame portion (or edge portion) of the third conductive layer CE1c and the fourth conductive layer CE1d where the solder pattern SDP is disposed may be left, and the remaining portions may be removed. For example, the frame portion (or edge portion) of the third conductive layer CE1c made of titanium (Ti) and the frame portion (or edge portion) of the fourth conductive layer CE1d made of indium tin oxide (ITO) may not need to be etched. This can prevent other conductive layers, such as the second conductive layer of the first driving electrode CE1, from being corroded by a TMAH (TetraMethylAmmonium Hydroxide) solution used in the mask process for forming the first driving electrode CE1.

[0131] According to the present specification, the first conductive layer CE1a and the third conductive layer CE1c may include titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b may include aluminum (Al). The fourth conductive layer CE1d may include a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion to the solder pattern SDP and is corrosion-resistant and acid-resistant. However, embodiments of the present specification are not limited thereto.

[0132] The first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d may be sequentially deposited and then patterned by performing a photolithography process and an etching process, but the embodiments of this specification are not limited thereto.

[0133] According to the present specification, the signal wiring TL, the contact electrode CCE, and the pad electrode PE, which are arranged in the same layer as the first drive electrode CE1, may be configured with multiple layers of conductive materials, but the embodiments of the present specification are not limited to this. For example, the signal wiring TL, the contact electrode CCE, and the pad electrode PE may be configured with multiple layers of indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but the embodiments of the present specification are not limited to this.

[0134] According to the present specification, a solder pattern SDP may be disposed on the first driving electrode CE1 in each of the plurality of subpixels. The solder pattern SDP allows the light emitting element ED to be bonded to the first driving electrode CE1. The first driving electrode CE1 and the light emitting element ED may be electrically connected to each other through eutectic bonding using the solder pattern SDP, but embodiments of the present specification are not limited thereto. For example, the first driving electrode CE1 and the anode electrode 134 of the light emitting element ED may be electrically connected to each other through eutectic bonding using the solder pattern SDP, but embodiments of the present specification are not limited thereto. For example, if the solder pattern SDP is made of indium (In) and the anode electrode 134 of the light emitting element ED is made of gold (Au), the solder pattern SDP and the anode electrode 134 may be bonded to each other by applying heat and pressure during the light emitting element ED transfer process. The light emitting element ED may be bonded to the solder pattern SDP and the first driving electrode CE1 through eutectic bonding without any additional adhesive. For example, the solder pattern SDP may be made of indium (In), tin (Sn), or an alloy thereof, but the embodiments and the like herein are not limited thereto. For example, the solder pattern SDP may be a pattern layer, a pattern, a bonding pad, or a bonding pad, but the embodiments and the like herein are not limited thereto.

[0135] According to the present specification, the first passivation layer 116 may be disposed on the plurality of signal lines TL, the plurality of first driving electrodes CE1, the plurality of contact electrodes CCE, and the third insulating layer 115c. For example, the first passivation layer 116 may be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. A portion of the first passivation layer 116 disposed in the bending area BA may be removed. A portion of the first passivation layer 116 covering the plurality of pad electrodes PE in the second non-display area NA2 may be removed. The first passivation layer 116 is disposed to cover the remaining areas except for the bending area BA, the plurality of pad electrodes PE, the area where the solder pattern SDP is disposed, and a portion of the contact electrode CCE exposed so that the second electrode CES is connected thereto, thereby reducing the penetration of moisture or impurities into the light-emitting element ED. For example, the first passivation layer 116 may be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), although the embodiments and the like of the present specification are not limited thereto. For example, the first passivation layer 116 may be a protective layer or an insulating layer, although the embodiments and the like of the present specification are not limited thereto. The first passivation layer 116 may be formed to a thickness of 1000 to 2000 Å, which is thinner than the thickness of the second electrode CE2.

[0136] A light-emitting element ED may be arranged on the solder pattern SDP in each of the plurality of sub-pixels. A first light-emitting element 130 may be arranged in the first sub-pixel SP1. A second light-emitting element 140 may be arranged in the second sub-pixel SP2. A third light-emitting element 150 may be arranged in the third sub-pixel SP3.

[0137] The light-emitting element ED may be formed on a silicon wafer by methods such as metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering, but the embodiments of this specification are not limited thereto.

[0138] The first light emitting element 130 may include an anode electrode 134, a light emitting structure, a cathode electrode 135, and a sealing film 136, but the embodiments of the present specification are not limited thereto. For example, the first light emitting element 130 may not include the sealing film 136. The light emitting structure may include a first semiconductor layer 131, an active layer 132, and a second semiconductor layer 133.

[0139] A first semiconductor layer 131 may be disposed on the solder pattern SDP. A second semiconductor layer 133 may be disposed on the first semiconductor layer 131.

[0140] For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be realized by a compound semiconductor such as a III-V group or II-VI group, and may be doped with an impurity (or a dopant). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be a semiconductor layer doped with an n-type impurity, and the other may be a semiconductor layer doped with a p-type impurity, but the embodiments and the like of the present specification are not limited thereto. For example, one or more of the first semiconductor layer 131 and the second semiconductor layer 133 may be a layer in which a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), aluminum indium phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs) is doped with n-type or p-type impurities, but the embodiments of the present specification are not limited thereto. For example, the n-type impurities may be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), or tin (Sn), but the embodiments of the present specification are not limited thereto. For example, the p-type impurity may be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or beryllium (Be), but the embodiments and the like of this specification are not limited thereto.

[0141] For example, the first semiconductor layer 131 and the second semiconductor layer 133 may be a nitride semiconductor containing n-type impurities and a nitride semiconductor containing p-type impurities, respectively, but the embodiments and the like of the present specification are not limited thereto. For example, the first semiconductor layer 131 may be a nitride semiconductor containing p-type impurities, and the second semiconductor layer 133 may be a nitride semiconductor containing n-type impurities, but the embodiments and the like of the present specification are not limited thereto.

[0142] The active layer 132 may be disposed between the first semiconductor layer 131 and the second semiconductor layer 133. The active layer 132 may emit light by receiving holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133. For example, the active layer 132 may have one of a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but the embodiments and the like herein are not limited thereto. For example, the active layer 132 may have indium gallium nitride (InGaN) or gallium nitride (GaN), but the embodiments and the like herein are not limited thereto.

[0143] As another example, the active layer 132 may include a multi-quantum well (MQW) structure having well layers and barrier layers with a bandgap higher than that of the well layers. For example, the active layer 132 may be configured with InGaN well layers and AlGaN barrier layers, although the embodiments and the like of the present specification are not limited thereto.

[0144] The anode electrode 134 may be disposed between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode electrode 134 may electrically connect the first semiconductor layer 131 and the first driving electrode CE1. An anode voltage output from the pixel driving circuit PD may be applied to the first semiconductor layer 131 via the signal wiring TL, the first driving electrode CE1, and the anode electrode 134. For example, the anode electrode 134 may be made of a conductive material capable of eutectic bonding with the solder pattern SDP, but the embodiments of the present specification are not limited thereto. For example, the anode electrode 134 may be made of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), copper (Cu), or alloys thereof, but the embodiments of the present specification are not limited thereto.

[0145] The cathode electrode 135 may be disposed on the second semiconductor layer 133. For example, the cathode electrode 135 may electrically connect the second semiconductor layer 133 and the second electrode CE2. A cathode voltage output from the pixel driving circuit PD may be applied to the second semiconductor layer 133 via the contact electrode CCE, the second electrode CE2, and the cathode electrode 135. The cathode electrode 135 may be made of a transparent conductive material so that light emitted from the light emitting element ED can be directed toward the upper part of the light emitting element ED, although embodiments and the like herein are not limited thereto. For example, the cathode electrode 135 may be made of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), although embodiments and the like herein are not limited thereto.

[0146] The sealing film 136 may be disposed on at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135. For example, the sealing film 136 may surround at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135.

[0147] For example, the sealing film 136 may protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the sealing film 136 may be disposed on the side surfaces of the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133.

[0148] For example, the sealing film 136 may be disposed on at least a portion of the anode electrode 134 and the cathode electrode 135, for example, an edge portion (or end portion, or one side) of the anode electrode 134 and an edge portion (or end portion, or one side) of the cathode electrode 135. At least a portion of the anode electrode 134 may be exposed from the sealing film 136 to connect the anode electrode 134 to a solder pattern SDP. For example, at least a portion of the cathode electrode 135 may be exposed from the sealing film 136 to connect the cathode electrode 135 to a second electrode CE2. For example, the sealing film 136 may be made of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but the embodiments of the present specification are not limited thereto.

[0149] As another example, the encapsulation layer 136 may have a structure in which a reflective material is dispersed in a resin layer, but the embodiments of the present specification are not limited thereto. For example, the encapsulation layer 136 may be made of a reflector having various structures, but the embodiments of the present specification are not limited thereto. Light emitted from the active layer 132 may be reflected upward by the encapsulation layer 136, thereby improving light extraction efficiency. For example, the encapsulation layer 136 may be a reflective layer, but the embodiments of the present specification are not limited thereto.

[0150] Although the light emitting device ED has been described herein as having a vertical structure, the embodiments of the present specification are not limited thereto. For example, the light emitting device ED may have a lateral structure or a flip chip structure.

[0151] 9, the first light-emitting element 130 has been described, but the second light-emitting element 140 and the third light-emitting element 150 may have substantially the same structure as the first light-emitting element 130. For example, the second light-emitting element 140 and the third light-emitting element 150 may have substantially the same first semiconductor layer 131, active layer 132, second semiconductor layer 133, anode electrode 134, cathode electrode 135, and sealing film 136 as the first light-emitting element 130.

[0152] According to the present specification, a first optical layer 117a may be disposed peripherally surrounding the plurality of light-emitting elements ED in the display area AA. The first optical layer 117a may surround the plurality of light-emitting elements ED. For example, the first optical layer 117a may be disposed so as to cover the plurality of light-emitting elements ED and the banks BNK in the region of the plurality of subpixels. For example, the first optical layer 117a may cover the banks BNK, a portion of the first passivation layer 116, and spaces between the plurality of light-emitting elements ED. The first optical layer 117a may be disposed or cover spaces between the plurality of light-emitting elements ED and the plurality of banks BNK included in one pixel PX. For example, the first optical layer 117a may extend in a first direction (X-axis direction) and be spaced apart in a second direction (Y-axis direction). For example, the first optical layer 117a may be disposed between the first passivation layer 116 and the second electrode CE2 so as to surround the sides of the light-emitting element ED and the bank BNK, but the embodiments and the like of the present specification are not limited thereto. For example, the first optical layer 117a may be a diffusion layer or a sidewall diffusion layer, but the embodiments and the like of the present specification are not limited thereto.

[0153] The first optical layer 117a may include an organic insulating material in which fine particles are dispersed, but the embodiments of the present specification are not limited thereto. For example, the first optical layer 117a may be made of siloxane in which fine metal particles, such as titanium dioxide (TiO2) particles, are dispersed, but the embodiments of the present specification are not limited thereto. Light from the plurality of light emitting elements ED may be scattered by the fine particles dispersed in the first optical layer 117a and emitted to the outside of the display device 1000. As a result, the first optical layer 117a may improve the extraction efficiency of light emitted from the plurality of light emitting elements ED.

[0154] For example, the first optical layer 117a may be disposed in each of the plurality of pixels PX, or may be disposed together in some of the pixels PX arranged in the same row, but the embodiments and the like of the present specification are not limited to this. For example, the first optical layer 117a may be disposed in each of the plurality of pixels PX, or a single first optical layer 117a may be shared by the plurality of pixels PX. As another example, each of the plurality of sub-pixels may include a separate first optical layer 117a, but the embodiments and the like of the present specification are not limited to this.

[0155] According to the present specification, the second optical layer 117b may be disposed on the first passivation layer 116 in the display area AA. For example, the second optical layer 117b may be disposed around the first optical layer 117a. For example, the second optical layer 117b may be disposed so as to surround the first optical layer 117a. For example, the second optical layer 117b may be in contact with a side surface of the first optical layer 117a. For example, the second optical layer 117b may be disposed in an area between multiple pixels PX. However, embodiments and the like of the present specification are not limited thereto. For example, the second optical layer 117b may be a diffusion layer, a diffusion layer window, a window diffusion layer, or the like, but the embodiments and the like of the present specification are not limited thereto.

[0156] The second optical layer 117b may be made of an organic insulating material, but embodiments and the like of the present specification are not limited thereto. The second optical layer 117b may be made of the same material as the first optical layer 117a, but embodiments and the like of the present specification are not limited thereto. For example, the first optical layer 117a may include fine particles, and the second optical layer 117b may not include fine particles. For example, the second optical layer 117b may be made of siloxane, but embodiments and the like of the present specification are not limited thereto.

[0157] For example, the thickness of the first optical layer 117a may be thinner than the thickness of the second optical layer 117b, but the embodiments of the present specification are not limited to this. As a result, when viewed from above, the area where the first optical layer 117a is disposed may include a recess that is recessed inward from the upper surface of the second optical layer 117b.

[0158] According to the present specification, a second electrode CE2 may be disposed on the first optical layer 117a and the second optical layer 117b. For example, the second electrode CE2 may be electrically connected to the plurality of contact electrodes CCE through contact holes in the second optical layer 117b. For example, the second electrode CE2 may be disposed on the plurality of light-emitting elements ED. For example, the second electrode CE2 may include a transparent conductive oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO), but the embodiments of the present specification are not limited thereto. For example, the second electrode CE2 may be disposed so as to be in contact with the cathode electrode 135. For example, the second electrode CE2 may overlap the first optical layer 117a. For example, the second electrode CE2 may cover the outer flat surface of the first optical layer 117a.

[0159] The second electrode CE2 may extend continuously in a first direction (X-axis direction) of the substrate 110. This allows the second electrode CE2 to be commonly connected to a plurality of pixels PX arranged in the first direction X of the substrate 110. For example, the second electrode CE2 may be commonly connected to a plurality of pixels PX.

[0160] According to this specification, the second electrode CE2 may extend continuously over the first optical layer 117a, the second optical layer 117b, and the light-emitting element ED. The region where the first optical layer 117a is disposed may include a recess recessed inward from the upper surface of the second optical layer 117b. As a result, a first portion of the second electrode CE2 disposed on the first optical layer 117a is disposed along the recess and may therefore be positioned lower than a second portion of the second electrode CE2 disposed on the second optical layer 117b.

[0161] A third optical layer 117c may be disposed on the second electrode CE2. The third optical layer 117c may be disposed to overlap the plurality of light-emitting elements ED and the first optical layer 117a. The third optical layer 117c is disposed on the second electrode CE2 and the plurality of light-emitting elements ED, thereby improving unevenness that may occur in some of the plurality of light-emitting elements ED. For example, when the plurality of light-emitting elements ED are transferred onto the substrate 110 of the display device 1000, regions where the spacing between the plurality of light-emitting elements ED is not uniform may occur due to process deviations, etc. If the spacing between the plurality of light-emitting elements ED is not uniform, the light-emitting areas of each of the plurality of light-emitting elements ED may be unevenly arranged, which may cause the user to see unevenness. As a result, the third optical layer 117c is configured to uniformly diffuse light over the plurality of light-emitting elements ED, thereby reducing the likelihood that light emitted from some of the light-emitting elements ED will appear as uneven. Therefore, the third optical layer 117c uniformly diffuses the light emitted from the light emitting elements ED and extracts it to the outside of the display device 1000, thereby improving the luminance uniformity of the display device 1000.

[0162] The third optical layer 117c may be made of an organic insulating material with fine particles dispersed therein, but the embodiments and the like of the present specification are not limited thereto. For example, the third optical layer 117c may be made of siloxane with fine metal particles, such as titanium dioxide (TiO2) particles, dispersed therein, but the embodiments and the like of the present specification are not limited thereto. For example, the third optical layer 117c may be made of the same material as the first optical layer 117a, but the embodiments and the like of the present specification are not limited thereto. For example, the third optical layer 117c may be a diffusion layer or a top diffusion layer, but the embodiments and the like of the present specification are not limited thereto.

[0163] According to the present specification, light from the plurality of light emitting elements ED may be scattered by the fine particles dispersed in the third optical layer 117c and emitted to the outside of the display device 1000. The third optical layer 117c may evenly mix the light emitted from the plurality of light emitting elements ED to further improve the luminance uniformity of the display device 1000. Furthermore, the light scattered by the plurality of fine particles may improve the light extraction efficiency of the display device 1000, thereby enabling the display device 1000 to be driven with low power.

[0164] A black matrix BM may be disposed on the second electrode CE2, the first optical layer 117a, the second optical layer 117b, and the third optical layer 117c in the display area AA. For example, the black matrix BM may fill the contact hole of the second optical layer 117b. Because the black matrix BM is configured to cover the display area AA, it may reduce color mixing of light from multiple sub-pixels and external light reflection. For example, the black matrix BM may also be disposed in the contact hole connecting the second electrode CE2 and the contact electrode CCE, thereby preventing light leakage between adjacent sub-pixels.

[0165] For example, the black matrix BM may be made of an opaque material, but the embodiments of the present specification are not limited thereto. For example, the black matrix BM may be made of an organic insulating material to which a black pigment or black dye is added, but the embodiments of the present specification are not limited thereto.

[0166] A cover layer 118 may be disposed on the black matrix BM in the display area AA. The cover layer 118 may protect the components below the cover layer 118. For example, the cover layer 118 may be made of an organic insulating material, but the embodiments of the present specification are not limited thereto. For example, the cover layer 118 may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto. For example, the cover layer 118 may be an overcoating layer or an insulating layer, but the embodiments of the present specification are not limited thereto.

[0167] A polarizing layer 293 may be disposed on the cover layer 118 via a first adhesive layer 291. A cover member 120 may be disposed on the polarizing layer 293 via a second adhesive layer 295. For example, the first adhesive layer 291 and the second adhesive layer 295 may include an optically cleared adhesive (OCA), an optically cleared resin (OCR), a pressure sensitive adhesive (PSA), or the like, but the embodiments and the like of the present specification are not limited thereto.

[0168] According to the present specification, a plurality of pad electrodes PE may be disposed on the third insulating layer 115c in the second non-display area NA2. For example, at least a portion of the plurality of pad electrodes PE may be exposed from the first passivation layer 116. For example, the plurality of pad electrodes PE may be electrically connected to the second to fourth connecting wires 122d through contact holes in the third insulating layer 115c.

[0169] An adhesive layer ACF may be disposed on the plurality of pad electrodes PE. The adhesive layer ACF may be an adhesive layer in which conductive balls are dispersed in an insulating material, but the embodiments of the present specification are not limited thereto. When heat or pressure is applied to the adhesive layer ACF, the conductive balls may be electrically connected in the areas where heat or pressure is applied, thereby providing conductive properties. The adhesive layer ACF may be disposed between the plurality of pad electrodes PE and a flexible circuit board (or flexible film) CB, and the flexible circuit board (or flexible film) CB may be attached or bonded to the plurality of pad electrodes PE. For example, the adhesive layer ACF may be an anisotropic conductive film (ACF), but the embodiments of the present specification are not limited thereto.

[0170] A flexible circuit board (or flexible film) CB may be disposed on the adhesive layer ACF. The flexible circuit board (or flexible film) CB may be electrically connected to the pad electrodes PE via the adhesive layer ACF. Therefore, signals output from the flexible circuit board (or flexible film) CB and the printed circuit board may be transmitted to the pixel driving circuit PD of the display area AA via the pad electrodes PE, the 2-4th connecting wire 122d, the 2-3rd connecting wire 122c, the 2-2nd connecting wire 122b, and the 2-1st connecting wire 122a. Also, as shown in FIGS. 8A and 8B, the 1-1st through 1-4th connecting wires 121a through 121d may be disposed in the same layer as the 2-1st through 2-4th connecting wires 122a through 122d, respectively. For example, the 1-1st through 1-4th connecting wires 121a through 121d and the 2-1st through 2-4th connecting wires 122a through 122d may be formed of the same material and simultaneously through the same mask process.

[0171] FIG. 10 is an enlarged view of a display device according to an embodiment of the present disclosure. FIG. 11 is a cross-sectional view of a display device according to an embodiment of the present disclosure. For example, FIG. 10 may be an enlarged view of a portion of a display region and a first non-display region. FIG. 11 may be a cross-sectional view of FIG. 10. Although FIGS. 5 to 7 and 10 illustrate that the main light-emitting elements are arranged in the same row and the redundancy light-emitting elements are arranged in another row in the array of subpixels or light-emitting elements, the present disclosure is not limited thereto. For example, in one pixel, one of the main light-emitting elements (e.g., the second main light-emitting element) may be arranged in the row in which the first redundancy light-emitting element and the third redundancy light-emitting element are arranged, and one of the redundancy light-emitting elements (e.g., the second redundancy light-emitting element) may be arranged in the row in which the first main light-emitting element and the third main light-emitting element are arranged.

[0172] 10 and 11, a first non-display area NA1 may be arranged outside the display area AA. The first non-display area NA1 may include a first dummy area DUA1 surrounding the display area AA and a second dummy area DUA2 surrounding the first dummy area DUA1. The first dummy area DUA1 may be arranged outside the display area AA, and the second dummy area DUA2 may be arranged outside the first dummy area DUA1.

[0173] The first dummy area DUA1 may be arranged to allow for a process margin when transferring the light-emitting elements ED. If transfer is performed only on the display area AA, a process error at one end of the display area AA may result in an area in the display area AA where the light-emitting elements ED are not transferred. Therefore, by performing transfer on an area wider than the display area AA, including the first dummy area DUA1, it is possible to prevent the light-emitting elements ED from not being transferred to the display area AA. The second dummy area DUA2 may be arranged to allow for a cutting margin when cutting the panel. Without the second dummy area DUA2, damage to the display area AA may occur due to cutting tolerances. For example, the cutting may be a trimming process or a cutting process, but the embodiments of the present specification are not limited thereto.

[0174] The areas of the first dummy area DUA1 and the second dummy area DUA2 can be adjusted in various ways. For example, the first dummy area DUA1 may be wider than the second dummy area DUA2. For example, the first dummy area DUA1 may be narrower than the second dummy area DUA2. For example, the areas of the first dummy area DUA1 and the second dummy area DUA2 may be the same.

[0175] A dummy light-emitting element DED may be arranged in the first dummy area DUA1. The dummy light-emitting element DED may be a normal light-emitting element or an element that does not emit light because power is not applied. Wiring TL may be arranged in the display area AA and connected to the first driving electrode CE1, but wiring may not be arranged in the first dummy area DUA1 and the second dummy area DUA2. Since the first dummy area DUA1 and the second dummy area DUA2 are dummy areas designed to account for tolerance, wiring for applying power may not be provided. However, the embodiments of the present specification are not limited to this. For example, wiring may also be arranged in the first dummy area DUA1 and the second dummy area DUA2.

[0176] The cross-sectional structures of the first dummy region DUA1 and the second dummy region DUA2 may be similar to that of the display region AA. In the first dummy region DUA1 and the second dummy region DUA2, a first buffer layer 111a and a second buffer layer 111b may be disposed on the substrate 110.

[0177] An adhesive layer 112 may be disposed on the second buffer layer 111b. The adhesive layer 112 may be made of any one of an adhesive polymer, an epoxy resin, a UV-curable resin, a polyimide-based material, an acrylate-based material, a urethane-based material, and polydimethylsiloxane (PDMS), but the embodiments and the like of the present specification are not limited thereto.

[0178] A dummy pixel driving circuit DPD may be arranged on the adhesive layer 112 in the first dummy area DUA1. If the dummy pixel driving circuit DPD is realized as a driver, the dummy driver may be mounted on the adhesive layer 112 by a transfer process, but the embodiments and the like of the present specification are not limited to this. The dummy pixel driving circuit DPD may be arranged to align the heights of the display area AA and the first dummy area DUA1.

[0179] The second dummy area DUA2 may not necessarily have a dummy pixel driving circuit DPD arranged therein. However, the embodiments of the present specification are not limited to this. For example, the second dummy area DUA2 may also have a dummy pixel driving circuit DPD arranged therein.

[0180] A first protective layer 113a and a second protective layer 113b may be disposed on the adhesive layer 112 and the dummy pixel driving circuit DPD. The first protective layer 113a and the second protective layer 113b may be disposed so as to surround the side surfaces of the dummy pixel driving circuit DPD, although the embodiments and the like of the present specification are not limited thereto. For example, the second protective layer 113b may be disposed so as to cover at least a portion of the upper surface of the dummy pixel driving circuit DPD.

[0181] The first protective layer 113a and the second protective layer 113b may be made of an organic insulating material, but the embodiments of the present specification are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto.

[0182] According to the present specification, a plurality of connecting wires 121, 123 may be disposed on the second protective layer 113b. The plurality of connecting wires 121, 123 may include a plurality of first connecting wires 121 disposed in the display area AA and a plurality of dummy connecting wires 123 disposed in the first non-display area NA1.

[0183] The plurality of first connecting wires 121 may be wires for electrically connecting the pixel driving circuit PD to the light emitting element. The plurality of dummy connecting wires 123 are dummy wires for matching the height of the plurality of first connecting wires 121, and therefore may not be electrically connected to the dummy pixel driving circuit DPD. However, the present invention is not limited thereto. For example, the plurality of dummy connecting wires 123 may be electrically connected to the dummy pixel driving circuit DPD.

[0184] The plurality of first connecting wires 121 may include, but are not limited to, a 1-1 connecting wire 121a, a 1-2 connecting wire 121b, a 1-3 connecting wire 121c, and a 1-4 connecting wire 121d. The plurality of dummy connecting wires 123 may include, but are not limited to, a 1-1 dummy connecting wire 123a arranged at the bottom, a 1-2 dummy connecting wire 123b arranged on the 1-1 dummy connecting wire 123a, a 1-3 dummy connecting wire 123c arranged on the 1-2 dummy connecting wire 123b, and a 1-4 dummy connecting wire 123d arranged on the 1-3 dummy connecting wire 123c. However, the embodiments of the present specification are not limited to this.

[0185] The plurality of first-first connecting wires 121a and the first-first dummy connecting wires 123a may be disposed on the second protective layer 113b. The plurality of first-first connecting wires 121a may be electrically connected to the pixel driving circuit PD. The plurality of first-first connecting wires 121a may transmit a voltage output from the pixel driving circuit PD to the first driving electrode CE1 or the second electrode CE2.

[0186] The 1-1th dummy connecting line 123a may be arranged at the bottom of the plurality of dummy connecting lines 123 and may be arranged closest to the dummy pixel driving circuit DPD. The 1-1th dummy connecting line 123a may be electrically insulated from the dummy pixel driving circuit DPD. The dummy pixel driving circuit DPD may be a dummy driver, but the embodiments of the present specification are not limited thereto.

[0187] A third protective layer 114 may be disposed on the second protective layer 113b. The third protective layer 114 may be disposed over the entire display area AA and the first non-display area NA1. The third protective layer 114 may be made of an organic insulating material. For example, the third protective layer 114 may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 may be made of the same material, but the embodiments of the present specification are not limited thereto.

[0188] A plurality of first-second connecting wires 121b and a plurality of first-second dummy connecting wires 123b may be disposed on the third protective layer 114. The plurality of first-second connecting wires 121b may be connected to the pixel driving circuit PD or may be directly connected thereto.

[0189] A first insulating layer 115a may be disposed on the plurality of first-second connecting wires 121b and the first-second dummy connecting wires 123b. The first insulating layer 115a may be disposed over the entire display area AA and the first non-display area NA1, although embodiments of the present specification are not limited thereto. The first insulating layer 115a may be made of an organic insulating material, although embodiments of the present specification are not limited thereto. For example, the first insulating layer 115a may be made of a photoresist, polyimide (PI), or a photoacryl-based material, although embodiments of the present specification are not limited thereto.

[0190] A plurality of first-third connecting wires 121c and a first-third dummy connecting wire 123c may be disposed on the first insulating layer 115a. The plurality of first-third connecting wires 121c may be electrically connected to the plurality of first-second connecting wires 121b.

[0191] A second insulating layer 115b may be disposed on the plurality of first to third connecting wires 121c and the first to third dummy connecting wires 123c. The second insulating layer 115b may be made of an organic insulating material, but the embodiments of the present specification are not limited thereto. For example, the second insulating layer 115b may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto.

[0192] A plurality of first-fourth connecting wires 121d and a plurality of first-fourth dummy connecting wires 123d may be disposed on the second insulating layer 115b. The plurality of first-fourth connecting wires 121d may be electrically connected to the plurality of first-third connecting wires 121c.

[0193] The first protective layer 113a, the second protective layer 113b, the third protective layer 114, the first insulating layer 115a, and the second insulating layer 115b may be made of an organic insulating material, but the embodiments of the present specification are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, the third protective layer 114, the first insulating layer 115a, and the second insulating layer 115b may be made of a photoresist, polyimide (PI), or a photoacryl-based material, but the embodiments of the present specification are not limited thereto. A large amount of gas may be generated during the manufacturing process of an organic insulating material. Because gas cannot pass through inorganic layers, if the gas inside the panel cannot be exhausted, the inorganic layers may lift up.

[0194] The bank BNK may be disposed on the second insulating layer 115b. The first driving electrodes CE1 and DCE1 may be disposed on the bank BNK. The first driving electrodes CE1 and DCE1 may include a first driving electrode CE1 disposed on the bank BNK in the display area AA and a first dummy electrode DCE1 disposed on the bank BNK in the first non-display area NA1. The first driving electrode CE1 and the first dummy electrode DCE1 may include the same material. The first driving electrode CE1 may be electrically connected to the pixel driving circuit PD via a plurality of first connecting wires 121. The first dummy electrode DCE1 may be electrically insulated from the dummy connecting wires 123 and the dummy pixel driving circuit DPD.

[0195] The solder pattern SDP may be disposed on the first driving electrodes CE1 and the first dummy electrodes DCE1, and the solder pattern SDP may bond the light-emitting element ED to the first driving electrodes CE1 and the dummy light-emitting element DED to the first dummy electrodes DCE1.

[0196] A first passivation layer 116 may be disposed on the light-emitting element ED and the dummy light-emitting element DED. The first passivation layer 116 may reduce the penetration of moisture or impurities into the light-emitting element ED and the dummy light-emitting element DED. For example, the first passivation layer 116 may be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), although embodiments and the like herein are not limited thereto.

[0197] The first optical layer 117a may be disposed to cover the plurality of light-emitting elements ED, the dummy light-emitting elements DED, and the banks BNK. For example, the first optical layer 117a may cover the banks BNK, a part of the first passivation layer 116, and spaces between the plurality of light-emitting elements ED and the dummy light-emitting elements DED.

[0198] A second electrode CE2 may be disposed in the display area AA, and may be disposed on the light-emitting element ED. The second electrode CE2 may be electrically connected to the pixel driving circuit PD.

[0199] The second electrode CE2 may not be disposed on the first non-display area NA1. However, the embodiments of the present specification are not limited thereto. For example, the second electrode CE2 may also be disposed on the dummy light emitting element DED. For example, when the dummy connecting wiring 123 is not electrically connected to the dummy pixel driving circuit DPD, the dummy light emitting element DED does not emit light even if the second electrode CE2 is disposed on the dummy light emitting element DED.

[0200] The black matrix BM may be disposed entirely over the display area AA and the first non-display area NA1. The black matrix BM has openings formed in areas corresponding to the light-emitting elements ED in the display area AA, and may be disposed entirely over the dummy light-emitting elements DED in the first non-display area NA1. Because the first dummy area DUA1 and the second dummy area DUA2 are not light-emitting areas, the black matrix BM may be disposed entirely over the first dummy area DUA1 and the second dummy area DUA2.

[0201] As shown in FIGS. 11, 12a, and 12b, the second dummy area DUA2 may be formed as a margin for cutting the panel after fabrication. The second dummy area DUA2 may include dummy connection lines 123 corresponding to the first connection lines 121 in the display area AA. For example, the first dummy area DUA1 may include a 1-1 dummy connection line 123a corresponding to the 1-1 connection line 121a in the display area AA, a 1-2 dummy connection line 123b corresponding to the 1-2 connection line 121b, a 1-3 dummy connection line 123c corresponding to the 1-3 connection line 121c, and a 1-4 dummy connection line 123d corresponding to the 1-4 connection line 121d. However, embodiments of the present specification are not limited thereto. For example, the dummy connection lines 123 may be omitted from the second dummy area DUA2.

[0202] In the second dummy region DUA2, inorganic light-emitting elements ED may not be arranged on the banks BNK, but the embodiments of the present specification are not limited to this. For example, dummy light-emitting elements DED may be arranged in at least a portion of the second dummy region DUA2. For example, in the second dummy region DUA2, banks BNK in which dummy light-emitting elements DED are arranged and banks BNK in which dummy light-emitting elements DED are not arranged may be arranged alternately, but this is not limited to this.

[0203] The first passivation layer 116 can cover the banks BNK and the first electrodes arranged in the display area AA, the first dummy area DUA1, and the second dummy area DUA2. The first passivation layer 116 can include first openings 116a arranged on the first drive electrodes CE1 arranged in the display area AA, and the first dummy electrodes DCE1 in the first dummy area DUA1 and the second dummy area DUA2. The first openings 116a in the first passivation layer 116 can expose the first drive electrodes CE1 in the display area AA and the first dummy electrodes DCE1 in the first and second dummy areas DUA1 and DUA2.

[0204] A light-emitting element ED may be arranged on the first driving electrode CE1, and a dummy light-emitting element DED may be arranged on the first dummy electrode DCE1 in the first dummy area DUA1. The dummy light-emitting element DED may not be arranged on the first dummy electrode DCE1 in the second dummy area DUA2, and only a solder pattern SDP may be arranged. However, this embodiment is not limited to this. For example, the solder pattern SDP and / or the first dummy electrode DCE1 may be omitted in the second dummy area DUA2.

[0205] In the case of a display device using inorganic light emitting elements ED, a relatively large number of organic layers are stacked, which can generate a large amount of gas GS during panel fabrication. According to an embodiment of the present specification, the gas GS can be discharged to the outside through the first opening 116a of the first passivation layer 116. The first opening 116a formed in the second dummy region DUA2 can remain open because no dummy light emitting elements DED are stacked thereon. Therefore, the gas GS can be discharged to the outside through the first opening 116a of the second dummy region DUA2.

[0206] According to the embodiment of the present specification, since the dummy light emitting element DED is not disposed on the first dummy electrode DCE1 of the second dummy area DUA2, the gas GS can be discharged to the outside through the first opening 116a formed in the second dummy area DUA2 even after the process of transferring the light emitting element ED. Therefore, the problem of the first driving electrode CE1, the first dummy electrode DCE1, or the first passivation layer 116 being lifted up by the gas GS can be alleviated.

[0207] The first passivation layer 116 may further include second openings 116b disposed between the banks BNK of the second dummy region DUA2. The second openings 116b may facilitate the discharge of gas GS from within the panel. The number of second openings 116b may be greater than the number of first openings 116a on the second dummy region DUA2. However, the embodiments of the present specification are not limited to this. For example, the number of second openings 116b may be less than the number of first openings 116a on the second dummy region DUA2. If the number of second openings 116b is too large, the adhesion between the first passivation layer 116 and the third insulating layer 115c may be weakened.

[0208] According to an embodiment of the present specification, a second passivation layer 119 may be disposed on the first-1 connecting wire 121a and the first-1 dummy connecting wire 123a. The second passivation layer 119 may have a third opening 119a formed on the first-1 dummy connecting wire 123a between the first dummy region DUA1 and the second dummy region DUA2, thereby allowing gas GS generated between the first protective layer 113a and the second protective layer 113b to be discharged to the outside. As shown in FIG. 12a, the third opening 119a may be disposed on the first-1 dummy connecting wire 123a. If the third opening 119a is disposed outside the first-1 dummy connecting wire 123a, moisture may penetrate into the display panel through the third opening 119a. The 1-1 dummy connection wiring 123a is a dummy wiring that does not affect the performance of the display panel even if it is lifted or peeled off due to gas emission, and therefore can be configured as a path for discharging gas.

[0209] 10, a bank BNK is arranged for each of a plurality of sub-pixels, and a light-emitting element ED may be arranged on the bank BNK. A first align key AK1 for guiding the position of the light-emitting element ED may be arranged in any one of the plurality of banks BNK. The bank in which the first align key AK1 is arranged may be, but is not limited to, the align bank BNK1.

[0210] The first align key AK1 may be formed at the same time as the first drive electrode CE1 and may have the same layer structure, but embodiments of the present specification are not limited thereto. For example, the first align key AK1 may be made of a conductive material such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc., but embodiments of the present specification are not limited thereto.

[0211] The first align key AK1 may be made of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the embodiments and the like of this specification are not limited to this.

[0212] The first align key AK1 may be arranged in any one of the multiple banks BNK. For example, the first align key AK1 may be arranged in any one of the 16 banks BNK. However, this is not necessarily limited to this, and the first align key AK1 may be arranged in any one of the 32 or 64 banks BNK.

[0213] As shown in FIGS. 13 and 14 , the first passivation layer 116 may be disposed on a plurality of banks BNK. The first passivation layer 116 may cover the first driving electrode CE1. The first passivation layer 116 may include a fourth opening 116c disposed on the first align key AK1. The bank BNK may be made of an organic insulating material. The bank BNK may be made of a single layer or multiple layers of organic insulating material. Therefore, gas generated in the bank BNK and the organic layer below the bank BNK may be discharged through the fourth opening 116c. Therefore, the gas GS may be discharged through the fourth opening 116c, thereby preventing the first align key AK1 from lifting up.

[0214] As shown in FIG. 15, the fourth opening 116c may be disposed over the first align key AK1. This may alleviate the problem of the first align key AK1 peeling off if the first passivation layer 116 covers one end of the first align key AK1. However, the embodiments of the present specification are not limited to this. As shown in FIG. 16, the fourth opening 116c may be disposed so as to surround the first align key AK1 while being spaced apart from it. This may alleviate the problem of the first align key AK1 lifting up due to the gas GS being discharged into the fourth opening 116c without passing through the first align key AK1. Furthermore, the first align key AK1 may be modified into various other shapes to perform various guide or alignment functions required for manufacturing a display panel.

[0215] Fig. 17 is a diagram showing a state in which a second alignment key is arranged on the outside of a display device according to an embodiment of the present specification. Fig. 18 is a cross-sectional view of a display device according to an embodiment of the present specification. Fig. 19 is a cross-sectional view of a display device according to an embodiment of the present specification. Fig. 20 is a diagram showing a state in which the second alignment key has been peeled off. Fig. 21 is a cross-sectional view of a display device according to an embodiment of the present specification.

[0216] As shown in FIG. 17 , the substrate 110 may include a display area AA and a first non-display area NA1. A plurality of second align keys AK2 may be arranged outside the first non-display area NA1. The second align keys AK2 may enable alignment necessary for manufacturing the display panel. For example, the second align keys AK2 may include an align key AK21 that serves as a guide during touch panel lamination, an align key that serves as an align key during light-emitting element ED transfer, or an align key that guides the position for cutting the display panel, but the embodiments of the present specification are not limited thereto. A plurality of second align keys AK2 may be arranged with different shapes to perform various guide (or align) functions necessary for manufacturing the display panel.

[0217] The plurality of second align keys AK2 may be arranged to surround the first non-display area NA1 of the display panel. The plurality of second align keys AK2 may be arranged on a cutting area TUA, which is an area outside the first non-display area NA1. The cutting area TUA may be an area that is removed by cutting after panel fabrication is completed. For example, the cutting area TUA may be a trimming area or a cutting area, although the embodiments of the present specification are not limited thereto.

[0218] 18, a first buffer layer 111a, a second buffer layer 111b, an adhesive layer 112, a first protective layer 113a, and a second protective layer 113b may be formed on a substrate 110, and a first dummy interconnection 123a may be formed on the second protective layer 113b. A second passivation layer 119 may be formed on the first dummy interconnection 123a.

[0219] The second passivation layer 119 may include a third opening 119a exposing an upper portion of the first dummy interconnection wiring 123a. Therefore, the gas GS generated between the first protective layer 113a and the second protective layer 113b can be discharged to the outside through the third opening 119a. This can alleviate the problem of the second passivation layer 119 floating up due to the gas GS generated between the first protective layer 113a and the second protective layer 113b.

[0220] 19, a third protective layer 114, a first insulating layer 115a, a second insulating layer 115b, and a third insulating layer 115c can be formed on the second passivation layer 119. A bank BNK can be formed on the third insulating layer 115c, and a first dummy electrode DCE1 can be formed on the bank BNK. A second align key AK2 can be formed in the cutting region TUA simultaneously with the first dummy electrode DCE1.

[0221] The first passivation layer 116 may include a first opening 116a exposing the first dummy electrode DCE1 and a fifth opening 116d surrounding the second alignment key AK2. Gas GS generated from the organic layer is discharged through the fifth opening 116d, preventing the second alignment key AK2 from being lifted or peeled off due to the gas GS. If the second alignment key AK2 is peeled off, as shown in FIG. 20, it may be difficult to identify the second alignment key, which may result in misalignment in a subsequent process.

[0222] 21, various processes that are performed after the transfer process can be performed using the second align key AK2. A black matrix BM can be disposed in the first non-display area NA1, and a cover layer 118 can be disposed on top. Thereafter, once the manufacturing of the display panel is completed, the cutting area TUA can be removed along the cutting line (or trimming line or cutting line).

[0223] 22 to 25 are diagrams showing devices to which the display device according to the embodiment of the present specification is applied.

[0224] 22 to 25, a display device 1000 according to an embodiment of the present specification may be included in various devices or electronic devices, etc. For example, the various electronic devices may include a wearable device 1100, a mobile device 1200, a notebook 1300, and a monitor or TV (1400), but the embodiments of the present specification are not limited thereto.

[0225] Each of the wearable device 1100, mobile device 1200, notebook 1300, and monitor or TV (1400) may include a display panel 100 and a display device 1000 according to the embodiments of this specification described in case parts 1005, 1010, 1015, 1020 and Figures 1 to 15.

[0226] For example, the display device according to the embodiments of the present specification may be applied to a mobile device, an image telephone, a smart watch, a watch phone, a wearable apparatus, a foldable apparatus, a rollable apparatus, a bendable apparatus, a flexible apparatus, a curved apparatus, a sliding apparatus, a variable apparatus, an electronic organizer, an electronic book, a portable multimedia player (PMP), a personal digital assistant (PDA), an MP3 player, a mobile medical device, a desktop PC, a laptop PC, a netbook computer, a workstation, a navigation system, a vehicle display device, a theater display device, a television, a wallpaper device, a signage device, a game device, a notebook, a monitor, a camera, a camcorder, and a home appliance.

[0227] A display device according to one or more embodiments of the present disclosure may be described as follows.

[0228] A display device according to one or more embodiments of the present specification may include a substrate including a display region and a non-display region, a first electrode disposed on the substrate, an inorganic light-emitting element disposed on the first electrode, and a first passivation layer disposed on the first electrode. The first electrode may include a first drive electrode disposed in the display region and a first dummy electrode disposed in the non-display region, and the first passivation layer may include a first opening disposed on the first dummy electrode.

[0229] According to one or more embodiments of the present disclosure, the semiconductor device may further include a plurality of insulating layers disposed on the substrate and a plurality of connecting electrodes disposed on the plurality of insulating layers, and the first electrode may be electrically connected to the plurality of connecting electrodes.

[0230] According to one or more embodiments herein, the plurality of insulating layers can include an organic material, and the first passivation layer can include an inorganic material.

[0231] According to one or more embodiments herein, the first opening in the first passivation layer may be disposed over the first drive electrode and the first dummy electrode.

[0232] According to one or more embodiments herein, a drive driver electrically coupled to the first drive electrode may be included.

[0233] According to one or more embodiments herein, the inorganic light emitting element can be electrically coupled to the first driving electrode by a eutectic bond.

[0234] According to one or more embodiments herein, an inorganic light emitting device may include an anode electrode, a light emitting structure disposed on the anode electrode, and a cathode electrode disposed on the light emitting structure.

[0235] According to one or more embodiments herein, the non-display area may include a first dummy area positioned outside the display area and a second dummy area positioned outside the first dummy area.

[0236] According to one or more embodiments herein, the display device may include a dummy light-emitting element disposed in the first dummy region.

[0237] According to one or more embodiments herein, the display device may include a dummy driving driver disposed in the first dummy region, and the dummy light-emitting element and the dummy driving driver may be electrically isolated.

[0238] According to one or more embodiments of the present disclosure, the display device may include a plurality of banks disposed between the plurality of insulating layers and the first driving electrode, and the inorganic light-emitting element may be disposed on the banks.

[0239] According to one or more embodiments herein, the first passivation layer in the non-display area may include second openings disposed between the plurality of banks.

[0240] According to one or more embodiments of the present disclosure, the plurality of connecting wires may include a plurality of first connecting wires arranged in the display area and a plurality of dummy connecting wires arranged in the non-display area, and the plurality of first connecting wires may be electrically connected to a pixel driving circuit, and the plurality of dummy connecting wires may be electrically isolated from the pixel driving circuit.

[0241] According to one or more embodiments of the present disclosure, the plurality of dummy interconnect lines may include a first dummy interconnect line 1-1 disposed at the bottom.

[0242] According to one or more embodiments of the present disclosure, the semiconductor device may further include a second passivation layer disposed on the first-1 dummy interconnection line, and the second passivation layer may include a third opening disposed on the first-1 dummy interconnection line.

[0243] According to one or more embodiments herein, the first electrode may include a first alignment key disposed on one of the plurality of banks, and the first passivation layer may include a fourth opening disposed on the first alignment key.

[0244] According to one or more embodiments herein, the non-display area may include a cutout area disposed outside the second dummy area. The non-display area may further include a second alignment key located in the cutout area. The first passivation layer may further include a fifth opening surrounding the second alignment key.

[0245] According to one or more embodiments herein, a first optical layer may be included around the periphery of the plurality of inorganic light emitting elements, and a second optical layer may be included around the periphery of the first optical layer.

[0246] According to one or more embodiments herein, the display device may include a second electrode disposed on the plurality of inorganic light emitting elements and a third optical layer disposed on the second electrode.

[0247] According to one or more embodiments herein, the third optical layer may include a black matrix disposed on the third optical layer.

[0248] According to one or more embodiments herein, the plurality of inorganic light-emitting elements may include an anode electrode, a first semiconductor layer disposed on the anode electrode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode electrode disposed on the second semiconductor layer.

[0249] According to one or more embodiments of the present disclosure, the light-emitting device may include a first electrode disposed below the plurality of inorganic light-emitting elements and electrically connecting the anode electrode, and a patterned layer disposed between the first electrode and the anode electrode, and the first electrode and the anode electrode may be electrically connected by a eutectic bond via the patterned layer.

[0250] A display device according to an embodiment of the present specification includes a substrate including a display area and a non-display area, a first electrode arranged on the substrate and including a first drive electrode arranged in the display area and a first dummy electrode arranged in the non-display area, a light-emitting element arranged on the first drive electrode, and a first passivation layer arranged on the first electrode, wherein the first passivation layer includes a first opening that overlaps with the first dummy electrode in the non-display area.

[0251] The contents of the specification, which describe the problem to be solved, the means for solving the problem, and the effects described above, do not specify the essential features of the claims, and therefore the scope of the claims is not limited by the matters described in the contents of the specification.

[0252] Although the embodiments of the present invention have been described in more detail above with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments and can be implemented in various modifications within the scope of the technical concept of the present invention. Therefore, the embodiments disclosed in the present invention are for illustrative purposes only and do not limit the technical concept of the present invention. Therefore, the embodiments described above should be understood to be illustrative in all respects and not restrictive. [Explanation of symbols]

[0253] 100 Display Panel 110 Substrate 116 First Passivation Layer 119 Second Passivation Layer 121, 122 connecting wiring 123 Dummy connection wiring AA display area BA bending area CE1 First drive electrode CE2 Second electrode DCE1 First dummy electrode ED light emitting element DED dummy light emitting element

Claims

1. a substrate including a display area and a non-display area; a first electrode disposed on the substrate; a light-emitting element disposed on the first electrode; a first passivation layer disposed on the first electrode; Including, the first electrodes include a first drive electrode arranged in the display area and a first dummy electrode arranged in the non-display area; The first passivation layer includes a first opening disposed above the first dummy electrode.

2. further comprising a plurality of insulating layers disposed on the substrate; 2. The display device according to claim 1, wherein the plurality of insulating layers are disposed below the first electrode.

3. the plurality of insulating layers include an organic material; The display device of claim 2 , wherein the first passivation layer includes an inorganic material.

4. The display device according to claim 1 , wherein the first opening of the first passivation layer is disposed above the first drive electrode and the first dummy electrode.

5. The display device of claim 1 , further comprising a driver electrically connected to the first driving electrode.

6. The display device of claim 5 , wherein the light emitting element is electrically connected to the first driving electrode by eutectic bonding.

7. The display device of claim 1 , wherein the light emitting device has a vertical structure including an anode electrode, a light emitting structure disposed on the anode electrode, and a cathode electrode disposed on the light emitting structure.

8. The display device according to claim 1 , wherein the non-display area includes a first dummy area arranged outside the display area and a second dummy area arranged outside the first dummy area.

9. The display device according to claim 8 , further comprising a dummy light-emitting element disposed in the first dummy region.

10. further including a dummy driver disposed in the first dummy region; The display device according to claim 9 , wherein the dummy light emitting element and the dummy driver are electrically insulated from each other.

11. a plurality of banks spaced apart from one another and disposed between the plurality of insulating layers and the first drive electrodes; The display device according to claim 2 , wherein the light emitting elements are arranged on the plurality of banks.

12. The display device of claim 11 , wherein the first passivation layer in the non-display area includes second openings disposed between the plurality of banks.

13. 11. The display device of claim 10, further comprising a plurality of first connecting wires arranged in the display area and a plurality of dummy connecting wires arranged in the non-display area.

14. 14. The display device of claim 13, wherein the plurality of dummy connection lines include a first dummy connection line arranged closest to the dummy driver.

15. a second passivation layer disposed on the first-1 dummy interconnect; 15. The display device according to claim 14, wherein the second passivation layer includes a third opening disposed on the first dummy interconnect line.

16. the first electrode includes a first align key disposed on one of the plurality of banks; the first passivation layer includes a fourth opening disposed over the first alignment key; The display device according to claim 11 , wherein the fourth opening is spaced apart from the first alignment key and surrounds the first alignment key.

17. the non-display area further includes a cutout area disposed outside the second dummy area; further comprising a second align key in the cutting area; The display device of claim 8 , wherein the first passivation layer further includes a fifth opening surrounding the second alignment key.

18. a first optical layer located around the light-emitting element; a second optical layer surrounding the first optical layer; Including, the first optical layer is disposed in the non-display area and overlaps the first opening of the first passivation layer; The display device according to claim 1 , wherein a solder pattern is disposed between the first optical layer and the first dummy electrode in the first opening.

19. a second electrode disposed on the light-emitting element; a third optical layer disposed on the second electrode; and a black matrix disposed on the third optical layer; The display device according to claim 1 , comprising:

20. a substrate including a display area and a non-display area; a first electrode disposed on the substrate, the first electrode including a first drive electrode disposed in the display area and a first dummy electrode disposed in the non-display area; a light-emitting element disposed on the first driving electrode; a first passivation layer disposed on the first electrode; Including, The first passivation layer includes a first opening that overlaps the first dummy electrode in the non-display area.

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