Semiconductor device and method of controlling semiconductor device

The semiconductor device with a variable resistor and control circuit adjusts resistance to stabilize output voltage and maintain phase margin, addressing fluctuations in load conditions.

JP2026029177APending Publication Date: 2026-02-20RENESAS ELECTRONICS CORP
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Patent Information

Application Number
JP2024131938
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-08-08
Publication Date
2026-02-20

AI Technical Summary

Technical Problem

Semiconductor devices with built-in linear regulators face challenges in maintaining phase margin stability due to fluctuations in primary power supply voltage, internal capacitance, and external resistance, leading to potential deterioration of performance.

Method used

A semiconductor device incorporating a linear regulator with a variable resistor, a detection circuit, and a control circuit that adjusts the resistance value based on detected output voltage to stabilize the output voltage and maintain phase margin.

Benefits of technology

The solution effectively stabilizes the output voltage and maintains phase margin even under varying load conditions, ensuring consistent performance.

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Abstract

To stabilize an output voltage of a linear regulator even when an operation state or a load condition varies.SOLUTION: The linear regulator 11 steps down a primary power supply voltage to a secondary voltage and outputs the secondary voltage. The variable resistor 16 is connected in series with the power supply wiring 12 with respect to the output voltage of the linear regulator 11. The ADC14 detects a voltage corresponding to the voltage outputted from the linear regulator 11. The control circuit 15 controls the resistance value of the variable resistor 16 based on the detected output voltage.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for controlling the semiconductor device, for example, a semiconductor device having a linear regulator and a method for controlling such a semiconductor device. [Background technology]

[0002] As a related technique, Patent Document 1 discloses a drive circuit for driving a capacitive load such as a liquid crystal panel. The drive circuit described in Patent Document 1 includes an operational amplifier, an operating state detection circuit, and a variable resistor. The operational amplifier amplifies an input signal and outputs the amplified signal to the capacitive load. The operating state detection circuit detects the operating state of the amplifier circuit relative to the capacitive load. The variable resistor is connected to the output of the amplifier circuit, and its resistance value is controlled according to the operating state detected by the operating state detection circuit.

[0003] The operating state detection circuit detects that the operating state is a driving state in which the capacitive load is charged or discharged when the output current of the operational amplifier is greater than a reference value. On the other hand, the operating state detection circuit detects that the operating state is a steady state in which the capacitive load is not charged or discharged when the output current of the operational amplifier is smaller than the reference value. The resistance of the variable resistor is controlled to different values ​​when the operating state is a driving state and a steady state. More specifically, when the operating state is a driving state, the resistance value of the variable resistor is controlled to a smaller value than when the operating state is a steady state. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-341018 Summary of the Invention [Problem to be solved by the invention]

[0005] Semiconductor devices such as Micro Controller Units (MCUs) have built-in linear regulators such as Low Drop Out (LDO) regulators. Linear regulators are required to have desired phase margin characteristics. The phase margin can be improved by inserting a VCL resistor in series into the power supply line between the linear regulator output and the external ISOVCL terminal.

[0006] However, the phase margin varies depending on the primary power supply voltage, internal capacitance, and external resistance. If the load conditions, such as the primary power supply voltage, internal capacitance, and external resistance, change after the semiconductor device is designed, the phase margin may deteriorate. Therefore, it is desirable for the semiconductor device to be able to maintain the phase margin even when the load conditions change.

[0007] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0008] According to one embodiment, there is provided a semiconductor device including: a linear regulator that outputs a secondary voltage; a variable resistor connected in series to an output voltage of the linear regulator; a detection circuit that detects the output voltage of the linear regulator; and a control circuit that controls a resistance value of the variable resistor based on the detected output voltage. [Effects of the Invention]

[0009] According to the embodiment, the output voltage of the linear regulator can be stabilized even when there are fluctuations in the operating state and load conditions. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram showing a configuration example of a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a waveform diagram showing an example of operating waveforms in the semiconductor device. [Figure 3]FIG. 3 is a flowchart showing an operation procedure when adjusting a phase margin in a semiconductor device. [Figure 4] FIG. 4 is a block diagram showing a configuration example of a semiconductor device according to the second embodiment of the present disclosure. [Figure 5] FIG. 5 is a waveform diagram showing an example of operating waveforms in the semiconductor device. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, with reference to the drawings, a detailed description will be given of an embodiment to which the above-mentioned means for solving the problems are applied. For clarity of explanation, the following description and drawings have been omitted and simplified as appropriate. In each drawing, the same elements are given the same reference numerals, and duplicate explanations are omitted as necessary.

[0012] In the following embodiments, when necessary for convenience, the description will be divided into multiple sections or embodiments, but unless otherwise specified, they are not unrelated to each other, and one is a partial or complete modification, application example, detailed explanation, or supplementary explanation of the other. Furthermore, in the following embodiments, when the number of elements, etc. (including the number, numerical value, amount, range, etc.) is mentioned, it is not limited to that specific number, and may be more or less than the specific number, unless otherwise specified or when it is clearly limited to a specific number in principle.

[0013] Furthermore, in the following embodiments, the components (including operational steps, etc.) are not necessarily essential unless otherwise specified or considered to be clearly essential in principle. Similarly, in the following embodiments, when referring to the shape or positional relationship of components, etc., it is intended to include those that are substantially similar or approximate to the shape, etc., unless otherwise specified or considered to be clearly not essential in principle. The same applies to the above numbers, etc. (including numbers, numerical values, amounts, and ranges).

[0014] [Embodiment 1] 1 is a block diagram showing a configuration example of a semiconductor device according to a first embodiment of the present disclosure. In this embodiment, a semiconductor device 10 includes a linear regulator 11, a power supply line 12, a monitor circuit 13, an analog-to-digital converter (ADC) 14, a control circuit 15, and a variable resistor 16. The semiconductor device 10 may be configured as, but is not limited to, an MCU or a System on a Chip (SoC).

[0015] The linear regulator 11 steps down the primary power supply voltage to a secondary voltage and outputs the stepped-down secondary voltage ISOVDD. As is well known, the linear regulator 11 has an internal control element. The linear regulator 11 maintains the output secondary voltage at a constant voltage by controlling the resistance of the internal control element according to the output voltage.

[0016] The output voltage of the linear regulator is supplied to a load via power supply wiring 12. The power supply wiring 12 includes, for example, wiring formed in a mesh pattern within a chip. The power supply wiring 12 is connected to, for example, one or more functional blocks formed in the semiconductor device 10.

[0017] The variable resistor 16 is connected in series with the power supply wiring 12 to the output voltage of the linear regulator 11. The variable resistor 16 includes a plurality of resistors connected in parallel with each other. The resistors may be switch elements such as Metal-Oxide-Semiconductor (MOS) transistors. The overall resistance value of the variable resistor 16 is variably controlled by changing the number of switch elements that are controlled to be ON.

[0018] The semiconductor device 10 has an external terminal 18, and the variable resistor 16 is inserted in series between the power supply wiring 12 and the external terminal 18. An external capacitance 19 can be connected to the external terminal 18. In the semiconductor device 10, the phase margin characteristics of the linear regulator 11 can be adjusted by the variable resistor 16 and the external capacitance 19.

[0019] The monitor circuit 13 generates a voltage that varies depending on the output voltage of the linear regulator 11. The monitor circuit 13 includes, for example, a voltage divider circuit. The voltage divider circuit includes, for example, a plurality of resistors connected in series between the primary power supply and ground. The ADC 14 generates a digital signal corresponding to the voltage generated by the monitor circuit 13. In this embodiment, the ADC 14 is used as a detection circuit for detecting the output voltage of the linear regulator 11.

[0020] The control circuit 15 generates a control signal to be output to the variable resistor 16 in accordance with the digital value output from the ADC 14. The control circuit 15 includes, for example, any logic circuit and sequential circuit. The control circuit 15 may include a programmable logic device (PLD) such as a field programmable gate array (FPGA). The control circuit 15 outputs a control signal individually to each resistor of the variable resistor 16. The control circuit 15 controls the resistance value of the variable resistor 16 by selectively turning on or off switch elements used as resistors in the variable resistor 16.

[0021] The control circuit 15 determines whether the output voltage of the linear regulator 11 is oscillating based on the digital value output from the ADC 14. The control circuit 15 compares the output voltage of the linear regulator 11 with a high (H)-side threshold and a low (L)-side threshold, where the H-side threshold is greater than the L-side threshold. More precisely, the control circuit 15 compares the digital value output from the ADC 14 with a first threshold corresponding to the H-side threshold and a second threshold corresponding to the L-side threshold. The control circuit 15 determines whether the output voltage is oscillating based on the comparison result.

[0022] For example, the control circuit 15 counts the number of times the output voltage of the linear regulator 11 fluctuates beyond the range between the H-side threshold and the L-side threshold during a predetermined oscillation determination period. Based on the counted number, the control circuit 15 determines whether the output voltage is oscillating. If the control circuit 15 determines that the output voltage is oscillating, it controls the resistance value of the variable resistor 16.

[0023] In this embodiment, the control circuit 15 controls the resistance value of the variable resistor 16 based on the digital value output from the ADC 14 when adjusting the phase margin. The adjustment of the phase margin does not need to be performed constantly during operation of the semiconductor device 10. The adjustment of the phase margin may be performed periodically or intermittently. The monitor circuit 13 may have a switch that switches the connection of the ADC 14 between the voltage divider circuit and the external input terminal of the semiconductor device 10. The switch connects the external input terminal to the ADC 14 during periods when the adjustment of the phase margin is not being performed. In this case, the ADC 14 generates a digital value corresponding to the voltage input from the external input terminal and outputs the generated digital value to a functional block (not shown).

[0024] 2 is a waveform diagram showing an example of an operating waveform in the semiconductor device 10. The ADC 14 detects the regulator output voltage, i.e., the voltage output from the linear regulator 11 to the power supply line 12. The ADC 14 detects the regulator output voltage at a predetermined sampling period. In the initial state, the control circuit 15 turns on all of the switch elements used as resistors in the variable resistor 16.

[0025] The control circuit 15 detects whether the output voltage of the linear regulator 11 is higher than the H-side threshold value, for example, based on the digital value output from the ADC 14. The control circuit 15 also detects whether the output voltage of the linear regulator 11 is lower than the L-side threshold value. During an oscillation determination period, the control circuit 15 counts the number of times the regulator output voltage is detected to be higher than the H-side threshold value and the number of times the regulator output voltage is detected to be lower than the L-side threshold value. If the counted number is greater than a predetermined number, the control circuit 15 detects a regulator error, i.e., that the linear regulator 11 is oscillating. In the example of FIG. 2, the regulator output voltage fluctuates beyond the range between the H-side threshold value and the L-side threshold value, and the control circuit 15 detects a regulator error at time t11.

[0026] When a regulator error is detected, the control circuit 15 increases the resistance value of the variable resistor 16. Here, the phase margin becomes more stable as the resistance increases, but load fluctuation tolerance decreases. For this reason, after detecting a regulator error, the control circuit 15 gradually increases the resistance value of the variable resistor 16. The control circuit 15 gradually increases the number of switch elements in the variable resistor 16 that are controlled to be OFF, thereby gradually increasing the resistance value of the variable resistor 16.

[0027] For example, the control circuit 15 controls the resistance value of the variable resistor 16 to three levels: "small," "medium," and "large." For example, immediately after a regulator error is detected, the control circuit 15 controls the resistance value of the variable resistor 16 to "small." When controlling the resistance value of the variable resistor 16 to "small," the control circuit 15 controls, for example, 10% of the total number of switch elements included in the variable resistor 16 to be turned off.

[0028] After controlling the resistance value of variable resistor 16 to "small," control circuit 15 determines whether the number of times the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold during the oscillation determination period is greater than a predetermined number. If the number of times the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold becomes equal to or less than the predetermined number, control circuit 15 cancels the regulator error. In the example of FIG. 2, control circuit 15 cancels the regulator error at time t12.

[0029] After controlling the resistance value of variable resistor 16 to "small," if the number of times the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold during an oscillation determination period exceeds a predetermined number, control circuit 15 controls the resistance value of variable resistor 16 to "medium." When controlling the resistance value of variable resistor 16 to "medium," control circuit 15 controls, for example, 50% of the total number of switch elements included in variable resistor 16 to be OFF. After controlling the resistance value of variable resistor 16 to "medium," control circuit 15 cancels the regulator error when fluctuations in the regulator output voltage subside.

[0030] After controlling the resistance value of variable resistor 16 to "medium," if the number of times the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold during an oscillation determination period exceeds a predetermined number, control circuit 15 controls the resistance value of variable resistor 16 to "high." When controlling the resistance value of variable resistor 16 to "high," control circuit 15 controls, for example, 90% of the total number of switch elements included in variable resistor 16 to be OFF. After controlling the resistance value of variable resistor 16 to "high," control circuit 15 cancels the regulator error if the fluctuation in the regulator output voltage subsides. Even when the resistance value of variable resistor 16 is controlled to "high," if the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold, control circuit 15 may determine that abnormal oscillation has occurred and issue a reset to semiconductor device 10.

[0031] During testing of the semiconductor device 10, an external power supply voltage may be supplied from the external terminal 18 to the power supply wiring 12. In such a case, all switch elements in the variable resistor 16 may be controlled to be ON to suppress a voltage drop across the variable resistor 16. For example, the semiconductor device 10 has an OR circuit between the control circuit 15 and the variable resistor 16. The OR circuit includes a plurality of OR gates, each corresponding to a switch element of the variable resistor 16. A control signal output from the control circuit 15 and a test mode signal are input to each OR gate. The test mode signal is normally negated to an L level. In this case, each OR gate outputs the control signal output from the control circuit 15 to the variable resistor 16. The test mode signal is asserted to an H level during testing of the semiconductor device 10. In this case, each OR gate outputs an H level signal, and all switch elements in the variable resistor 16 are controlled to be ON. By controlling all resistors in the variable resistor 16 to be ON during testing, it is possible to minimize a voltage drop across the variable resistor 16 due to the external power supply voltage supplied from the external terminal during testing.

[0032] Next, the operation procedure will be explained. Fig. 3 is a flowchart showing the operation procedure when adjusting the phase margin in the semiconductor device 10. In the semiconductor device 10, initial settings are performed (step S1). The initial settings include settings related to oscillation detection. In step S1, the control circuit 15 sets the output value of the ADC 14 corresponding to the H-side threshold and the output value of the ADC 14 corresponding to the L-side threshold. Also, the control circuit 15 sets a predetermined number of times for determining that oscillation is occurring. In step S1, the control circuit 15 sets the switch element of the variable resistor 16, which is controlled to be ON in the initial state.

[0033] The linear regulator 11 generates a secondary voltage from the primary power supply voltage to be output to the power supply wiring 12. The ADC 14 detects the regulator output voltage via the monitor circuit 13 (step S2). The control circuit 15 determines whether the linear regulator is oscillating or not based on the digital value output from the ADC 14 (step S3). In step S3, the control circuit 15 counts the number of times the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold. If the counted number is greater than a predetermined number, the control circuit 15 determines that the linear regulator 11 is oscillating.

[0034] If it is determined in step S3 that the linear regulator 11 is oscillating, the control circuit 15 changes the control signal output to the variable resistor 16 to change the resistance value of the variable resistor 16 (step S4). Thereafter, the process returns to step S2, and the regulator output voltage is detected. If it is determined in step S3 that the linear regulator 11 is not oscillating, the process returns to step S2, and the regulator output voltage is detected.

[0035] In this embodiment, the control circuit 15 controls the resistance value of the variable resistor 16 by changing the number of switch elements in the variable resistor 16 that are controlled to be ON, depending on the output voltage of the linear regulator 11. In this embodiment, even when there are fluctuations in the operating state or load conditions of the semiconductor device 10, such as changes in the primary power supply voltage or external resistor, or when the operating mode is transitioned, the control circuit 15 can adjust the resistance value of the variable resistor 16 depending on the fluctuations in the operating state or load conditions. Therefore, the semiconductor device 10 can stabilize the output voltage of the linear regulator 11.

[0036] [Embodiment 2] 4 is a block diagram showing a configuration example of a semiconductor device according to a second embodiment of the present disclosure. A semiconductor device 10a shown in FIG. 4 includes a ring oscillator 20. In the semiconductor device 10a, the ring oscillator 20 is used as a detection circuit for detecting the output voltage of a linear regulator 11. A control circuit 15 controls the resistance value of a variable resistor 16 using an output signal of the ring oscillator 20. Other configurations may be similar to those of the semiconductor device 10 according to the first embodiment.

[0037] The ring oscillator 20 is an oscillator that operates using the output voltage of the linear regulator 11. The period of the pulse signal output by the ring oscillator 20 varies depending on the output voltage of the linear regulator 11. The control circuit 15 counts the pulses of the pulse signal output from the ring oscillator 20 every predetermined period T. The pulse count in the predetermined period T increases as the output voltage of the linear regulator 11 in the predetermined period T increases. The control circuit 15 uses the pulse count to generate a control signal to be output to the variable resistor 16.

[0038] In this embodiment, the control circuit 15 determines whether the output voltage of the linear regulator 11 is oscillating based on the pulse count. The control circuit 15 compares the pulse count during a predetermined period T with an H-side pulse count threshold and an L-side pulse count threshold. The H-side pulse count threshold indicates the pulse count during the predetermined period T when the operating voltage of the ring oscillator 20 is the H-side threshold. The H-side pulse count threshold is also referred to as a first pulse count threshold. The L-side pulse count threshold indicates the pulse count during the predetermined period T when the operating voltage of the ring oscillator 20 is the L-side threshold. The L-side pulse count threshold is also referred to as a second pulse count threshold. The control circuit 15 determines whether the output voltage is oscillating based on the comparison result.

[0039] The control circuit 15 counts the number of times the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold during a predetermined oscillation determination period. Specifically, the control circuit 15 counts the number of times the pulse count is detected to be greater than the H-side pulse count threshold and the number of times the pulse count is detected to be less than the L-side pulse count threshold during the oscillation determination period. The oscillation determination period can be set to a period that is an integer multiple of the predetermined period T during which the number of pulses is counted. If the counted number is greater than the predetermined number, the control circuit 15 determines that the output voltage of the linear regulator 11 is oscillating. If the control circuit 15 determines that the output voltage is oscillating, it controls the resistance value of the variable resistor 16.

[0040] 5 is a waveform diagram showing an example of operating waveforms in the semiconductor device 10a. The ring oscillator 20 oscillates at a period corresponding to the regulator output voltage, i.e., the voltage output from the linear regulator 11 to the power supply line 12. The control circuit 15 counts the number of pulses of the pulse signal output from the ring oscillator 20 every predetermined period T.

[0041] Based on the pulse count, i.e., the number of counted pulses, the control circuit 15 detects whether the output voltage of the linear regulator 11 is higher than the H-side threshold. If the pulse count is greater than the H-side pulse count threshold, the control circuit 15 detects that the output voltage of the linear regulator 11 is higher than the H-side threshold. Also, based on the pulse count, the control circuit 15 detects whether the output voltage of the linear regulator 11 is lower than the L-side threshold. If the pulse count is less than the L-side pulse count threshold, the control circuit 15 detects that the output voltage of the linear regulator 11 is lower than the L-side threshold. The control circuit 15 counts the number of times the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold during a predetermined oscillation determination period.

[0042] If the count number during the oscillation determination period is greater than a predetermined number, the control circuit 15 detects a regulator error, i.e., that the linear regulator 11 is oscillating. In the example of Fig. 5, the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold, and the fluctuation of the pulse count during the predetermined period T is large. In the example of Fig. 5, the control circuit 15 detects a regulator error at time t21.

[0043] When a regulator error is detected, the control circuit 15 increases the resistance value of the variable resistor 16. The control of the resistance value of the variable resistor 16 may be similar to the control described in the first embodiment. For example, when a regulator error is detected, the control circuit 15 gradually increases the number of switch elements in the variable resistor 16 that are controlled to be OFF, thereby gradually increasing the resistance value of the variable resistor 16. When the number of times that the regulator output voltage fluctuates beyond the range between the H-side threshold and the L-side threshold becomes equal to or less than a predetermined number, the control circuit 15 cancels the regulator error. In the example of FIG. 5, the control circuit 15 cancels the regulator error at time t22.

[0044] In this embodiment, the control circuit 15 detects fluctuations in the output voltage of the linear regulator 11 in response to a signal output by the ring oscillator 20. Even with this configuration, the semiconductor device 10 can stabilize the output voltage of the linear regulator 11, similar to the first embodiment.

[0045] The invention made by the inventor has been specifically described above based on the embodiments, but it goes without saying that the present invention is not limited to the embodiments already described, and various modifications are possible within the scope of the gist of the invention. [Explanation of symbols]

[0046] 10: Semiconductor device 11: Linear regulator 12: Power wiring 13: Monitor circuit 14: ADC 15: Control circuit 16: Variable resistor 18: External terminal 19: External capacitance 20: Ring oscillator

Claims

1. a linear regulator that steps down a primary power supply voltage to a secondary voltage and outputs the secondary voltage; a variable resistor connected in series with a power supply wiring that supplies the output voltage of the linear regulator to one or more loads; a detection circuit for detecting the output voltage; a control circuit that controls the resistance value of the variable resistor based on the detected output voltage.

2. 2. The semiconductor device according to claim 1, wherein the control circuit determines whether the output voltage is oscillating based on the detected output voltage, and controls a resistance value of the variable resistor when it determines that the output voltage is oscillating.

3. 3. The semiconductor device according to claim 2, wherein the control circuit counts the number of times that the output voltage fluctuates beyond a range between a first threshold value and a second threshold value during a predetermined oscillation determination period, and determines whether the output voltage is oscillating based on the counted number of times.

4. 3. The semiconductor device according to claim 2, wherein said control circuit controls the resistance value of said variable resistor by increasing the resistance value of said variable resistor in a stepwise manner.

5. the variable resistor has a plurality of switch elements connected in parallel with each other, 2. The semiconductor device according to claim 1, wherein said control circuit controls the resistance value of said variable resistor by changing the number of said switch elements that are controlled to be ON.

6. 2. The semiconductor device according to claim 1, wherein said variable resistor is inserted in series between an external terminal and said power supply wiring.

7. 2. The semiconductor device according to claim 1, wherein said detection circuit includes an analog-to-digital converter that outputs a digital value corresponding to said output voltage.

8. 8. The semiconductor device according to claim 7, wherein the control circuit compares the digital value with a first threshold value and a second threshold value smaller than the first threshold value, determines whether the output voltage is oscillating based on a result of the comparison, and controls the resistance value of the variable resistor when it determines that the output voltage is oscillating.

9. 9. The semiconductor device according to claim 8, wherein the control circuit counts the number of times the digital value is determined to be greater than the first threshold value and the number of times the digital value is determined to be smaller than the second threshold value during a predetermined oscillation determination period, and determines that the output voltage is oscillating if the counted number of times is greater than a predetermined number.

10. 2. The semiconductor device according to claim 1, wherein said detection circuit includes an oscillator that oscillates at a period corresponding to said output voltage.

11. 11. The semiconductor device according to claim 10, wherein said control circuit counts pulses of the signal output from said oscillator during a predetermined period, and controls the resistance value of said variable resistor based on the number of counted pulses.

12. 12. The semiconductor device according to claim 11, wherein the control circuit compares the counted number of pulses with a first pulse count threshold and a second pulse count threshold that is smaller than the first pulse count threshold, determines whether the output voltage is oscillating based on a result of the comparison, and controls a resistance value of the variable resistor if it determines that the output voltage is oscillating.

13. 13. The semiconductor device according to claim 12, wherein the control circuit counts the number of times that the counted number of pulses is determined to be greater than the first pulse count threshold and the number of times that the counted number of pulses is determined to be less than the second pulse count threshold during a predetermined oscillation determination period, and determines that the output voltage is oscillating if the counted number is greater than a predetermined number.

14. a linear regulator for stepping down a primary power supply voltage to a secondary voltage, and outputting the secondary voltage from the linear regulator; Detecting the output voltage of the linear regulator; A method for controlling a semiconductor device, which controls a resistance value of a variable resistor connected in series with a power supply wiring that supplies the output voltage of the linear regulator to one or more loads based on the detected output voltage.

Citation Information

Patent Citations

  • Drive circuit, operating state detection circuit, and display device

    JP2005341018A