Power Conversion Device

Abstract

A power conversion device is provided that can suppress erroneous turn-on of each switching element by using the potential difference between the drain-source voltages of multiple switching elements generated by the reverse recovery of diodes connected inversely in parallel, and can also reduce the gate-source voltage and prevent the negative side from exceeding its withstand voltage. [Solution] A power conversion device comprising a first off-side connecting line and a second off-side connecting line that connect a first drive signal line and a second drive signal line to an off-side potential supply source, a first diode connected on the first off-side connecting line, a second diode connected on the second off-side connecting line, and a bypass circuit having one or two bypass switching elements that turn on and off the connection between the first off-side connecting line and the second off-side connecting line, and the bypass circuit having one or two attenuation mechanisms that attenuate the current flowing through the first off-side connecting line and the second off-side connecting line.

Description

[Technical Field]

[0001] The present disclosure relates to a power conversion device. [Background technology]

[0002] In power conversion devices used in electric powertrains, multiple switching elements such as IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are connected in parallel, and efforts are being made to increase the switching speed. By simultaneously switching the multiple parallel-connected switching elements, the power capacity of the power conversion device is increased.

[0003] When one of the parallel switching elements in the upper arm and the lower arm is turned on, a large potential fluctuation (dv / dt) occurs between the drain and source of the other parallel switching element, which is turned off. This potential fluctuation causes a current (C × dv / dt) to flow into the gate terminal via the parasitic capacitance C of the switching element. This increases the gate-source voltage of the switching element, and if the gate-source voltage exceeds the on threshold, the switching element will be turned on incorrectly, causing a short circuit between the upper and lower arms and possibly causing the switching element to fail.

[0004] Therefore, in the technology of Patent Document 1, an auxiliary switching element is provided between the gate and source of the main switching element, and when the main switching element is off, the auxiliary switching element is forcibly turned on, thereby connecting the gate and source of the main switching element with low impedance and preventing erroneous turn-on. Note that the auxiliary switching element is turned on and off in accordance with the on / off of the main switching element, and a fast-switching MOSFET is used for the auxiliary switching element to accommodate the higher speed and higher frequency of the main switching element. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-296119 Summary of the Invention [Problem to be solved by the invention]

[0006] The power conversion device of Patent Document 1 is a technology for turning on and off a single switching element. However, when multiple switching elements connected in parallel are simultaneously turned on and off, if the gate-source of each switching element is connected to a low impedance using a bidirectional element such as a MOSFET, the gate terminals of the multiple switching elements are also connected to a low impedance. The reverse recovery of the anti-parallel-connected diodes of each switching element charges the parasitic capacitance between the drain and source of each switching element, causing the drain-source voltage of each switching element to rise. Differences in the characteristics of the multiple switching elements connected in parallel and variations in the inductance of the peripheral connecting circuits cause differences in the recovery timing between the multiple switching elements, resulting in potential differences in the drain-source voltages of the multiple switching elements. This potential difference between the multiple switching elements causes a resonance phenomenon due to the inductance between the switching elements and their parasitic capacitance, and the inductance components of the gate line or source line that inputs a drive signal to the gate terminal. When part of this resonant current flows between the gate terminals of the multiple switching elements, the gate-source voltage of the switching elements rises. In other words, the lower the impedance between the gate terminals of multiple switching elements, the larger the current that flows in and the greater the rise in gate-source voltage, which can cause false turn-on and failure of the switching elements.

[0007] Therefore, in order to solve the above problem, the inventors are considering providing a diode in each bypass circuit of multiple switching elements connected in parallel, and arranging the multiple diodes opposite each other between the gate terminals of the multiple switching elements, thereby reducing the flowing resonant current and suppressing false turn-on due to resonance of the switching elements.

[0008] However, since a diode can only pass current in one direction, the charge on the gate terminal is only discharged, causing the gate-source voltage to drop and potentially exceeding the negative breakdown voltage.

[0009] Therefore, an object of the present disclosure is to provide a power conversion device having a plurality of switching elements connected in parallel, which can prevent erroneous turning-on of each switching element due to a potential difference between the drain-source voltages of the plurality of switching elements caused by reverse recovery of diodes connected in anti-parallel, and can prevent the gate-source voltage from decreasing and exceeding the withstand voltage on the negative side. [Means for solving the problem]

[0010] A first power conversion device according to the present disclosure includes: a first switching element and a second switching element connected in parallel, each of which functions as an anti-parallel connected diode; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a first drive signal line for inputting the drive signal to a gate terminal of the first switching element, and a second drive signal line for inputting the drive signal to a gate terminal of the second switching element; a first off-side connecting line connecting the first drive signal line and an off-side potential supply source that supplies a gate off potential of the drive signal; a first diode connected in series on the first off-side connecting line with its anode facing the first drive signal line and its cathode facing the off-side potential supply source; a second off-side connecting line connecting the second drive signal line and the off-side potential supply source; a second diode connected in series on the second off-side connecting line with its anode facing the second drive signal line and its cathode facing the off-side potential supply source; and a bypass circuit having one or two bypass switching elements that are turned on and off by the drive circuit and turn on and off the connection between the first off-side connecting line and the second off-side connecting line, The bypass circuit has one or two attenuation mechanisms that attenuate the current flowing through the first off-side connecting line and the second off-side connecting line.

[0011] A second power conversion device according to the present disclosure includes: a first switching element and a second switching element connected in parallel, each of which functions as an anti-parallel connected diode; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a first drive signal line for inputting the drive signal to a gate terminal of the first switching element, and a second drive signal line for inputting the drive signal to a gate terminal of the second switching element; a first off-side connecting line connecting the first drive signal line and an off-side potential supply source that supplies a gate off potential of the drive signal; a first diode connected in series on the first off-side connecting line with its anode facing the first drive signal line and its cathode facing the off-side potential supply source; a second off-side connecting line connecting the second drive signal line and the off-side potential supply source; a second diode connected in series on the second off-side connecting line with its anode facing the second drive signal line and its cathode facing the off-side potential supply source; and a bypass circuit having one or two bypass switching elements that are turned on and off by the drive circuit and turn on and off the connection between the first off-side connecting line and the second off-side connecting line, The first diode and the second diode are Zener diodes. [Effects of the Invention]

[0012] According to the first power conversion device of the present disclosure, by providing first and second diodes facing each other in the bypass circuit between the gate terminals of the first and second switching elements, a potential difference between the drain-source voltages of the first and second switching elements prevents current from flowing between the gate terminals via the bypass circuit, thereby preventing the gate-source voltage of the switching elements from rising and causing false turn-on. Meanwhile, due to the potential difference, current flows from the low-potential-side gate terminal through the low-potential-side off-side connecting line, the low-potential-side diode, and the bypass switching element to the off-side potential supply source, but the low-potential-side diode prevents reverse current from flowing, thereby reducing the low-potential-side gate-source voltage. When a forward current flows through the low-potential-side off-side connecting line, the current is attenuated by the attenuation mechanism, thereby reducing the amount of drop in the low-potential-side gate-source voltage and preventing it from exceeding the negative-side breakdown voltage.

[0013] According to a second power conversion device of the present disclosure, by providing first and second diodes facing each other in the bypass circuit between the gate terminals of the first and second switching elements, a potential difference between the drain-source voltages of the first and second switching elements prevents current from flowing between the gate terminals via the bypass circuit, thereby preventing the gate-source voltage of the switching elements from rising and causing erroneous turn-on. Meanwhile, due to the potential difference, current flows from the low-potential-side gate terminal through the low-potential-side off-side connecting line, the low-potential-side diode, and the bypass switching element to the off-side potential supply source. However, the low-potential-side diode prevents reverse current flow, causing the low-potential-side gate-source voltage to drop. However, if the gate-source voltage of the low-potential-side switching element reaches the Zener voltage of the Zener diode before exceeding the negative-side breakdown voltage, the Zener diode breaks down. The anode-cathode voltage of the Zener diode becomes a constant value of the Zener voltage, and current flows so that the anode-cathode voltage becomes the Zener voltage. Therefore, the gate-source voltage of the switching element on the low potential side is clipped to a voltage obtained by adding the negative gate-off potential and the negative Zener voltage, preventing the gate-source voltage from exceeding the negative side breakdown voltage. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a diagram illustrating an inverter configured by a plurality of power conversion devices according to a first embodiment. [Figure 2] 3 is a diagram illustrating a series circuit of an upper arm parallel switching element and a lower arm parallel switching element of a U phase according to the first embodiment. FIG. [Figure 3] 6 is a time chart showing the behavior of voltage and current in a first comparative example according to the first embodiment. [Figure 4] 3 is a diagram illustrating a power conversion device of a first comparative example according to the first embodiment. FIG. [Figure 5] FIG. 10 is a diagram illustrating a power conversion device of a second comparative example according to the first embodiment. [Figure 6]FIG. 10 is a diagram illustrating a current path of a second comparative example according to the first embodiment. [Figure 7] FIG. 10 is a diagram illustrating a current path of a second comparative example according to the first embodiment. [Figure 8] 10 is a time chart showing voltage behavior in a second comparative example according to the first embodiment. [Figure 9] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 10] 4 is a time chart showing voltage behavior according to the first embodiment. [Figure 11] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 12] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 13] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 14] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 15] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 16] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 17] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 18] FIG. 1 is a diagram illustrating a power conversion device according to a first embodiment. [Figure 19] FIG. 10 is a diagram illustrating a power conversion device according to a second embodiment. [Figure 20] FIG. 10 is a diagram illustrating a power conversion device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0015] 1. First Embodiment A power conversion device 1 according to embodiment 1 will be described with reference to the drawings. Each power conversion device 1 has a first switching element and a second switching element (hereinafter referred to as parallel switching elements) connected in parallel, each of which functions as an anti-parallel connected diode, a drive circuit 10 that turns on and off the first switching element and the second switching element, and a bypass circuit 215.

[0016] As shown in FIG. 1, in this embodiment, a plurality of power conversion devices 1 constitute an inverter 100 that drives an AC motor 109.

[0017] The AC motor 109 has a three-phase armature winding. The number of phases may be any number other than three. The AC motor 109 is a permanent magnet synchronous motor. The AC motor 109 may be a field winding synchronous motor or an induction motor. The power conversion device 1 may also be used in various power conversion devices such as a DC-DC converter.

[0018] The inverter 100 has a high-potential side electric wire 110 connected to the high-potential side of the DC power supply 101, and a low-potential side electric wire 111 connected to the low-potential side of the DC power supply 101. For each phase, the inverter 100 has a series circuit (leg) in which a high-potential side parallel switching element (upper arm) connected to the high-potential side electric wire 110 and a low-potential side parallel switching element (lower arm) connected to the low-potential side electric wire 111 are connected in series, and the connection point of the series connection is connected to the armature winding of the corresponding phase. Thus, the inverter 100 is composed of six power conversion devices 1.

[0019] Specifically, in the U-phase series circuit (leg), the U-phase high-potential side parallel switching element (upper arm) and the U-phase low-potential side parallel switching element (lower arm) are connected in series, with the junction of the two parallel switching elements connected to the U-phase armature winding. In the V-phase series circuit (leg), the V-phase high-potential side parallel switching element (upper arm) and the V-phase low-potential side parallel switching element (lower arm) are connected in series, with the junction of the two parallel switching elements connected to the V-phase armature winding. In the W-phase series circuit (leg), the W high-potential side parallel switching element (upper arm) and the W-phase low-potential side parallel switching element (lower arm) are connected in series, with the junction of the two parallel switching elements connected to the W-phase armature winding.

[0020] In this embodiment, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used for each switching element. The MOSFET has a parasitic diode connected in anti-parallel. Note that a self-extinguishing semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor) with a diode connected in anti-parallel may be used as the switching element. In other words, each switching element has the function of a diode connected in anti-parallel. A wide bandgap semiconductor such as SiC (Silicon Carbide) or GaN (Gallium Nitride) may be used as the semiconductor for each switching element.

[0021] Each switching element has a gate terminal (control terminal), a drain terminal (high potential side terminal), and a source terminal (low potential side terminal). A drive circuit 10 is provided to supply a drive signal to the gate terminal of each switching element. Each drive circuit 10 generates an on or off drive signal to turn each switching element on or off in response to an on or off control signal output from a control device 30. The control device 30 generates a control signal to turn each switching element on or off using a known control method, PWM control, etc., based on values ​​detected by each sensor (current sensor, voltage sensor, rotation angle sensor, etc.).

[0022] A smoothing capacitor 102 is connected between a high potential side electric wire 110 and a low potential side electric wire 111. A DC power supply 101 outputs a DC voltage to the inverter 100. The DC power supply 101 may be any device that outputs a DC voltage, such as a battery, a DC-DC converter, a diode rectifier, or a PWM rectifier.

[0023] <Generation of drain-source voltage difference due to misalignment of on / off timing> The potential difference between the drain-source voltages due to the difference in the on-timing of the first and second switching elements connected in parallel will be described using Figures 2 and 3. Figure 2 shows a schematic diagram of the U-phase series circuit (leg).

[0024] Each switching element has a drain terminal (high potential side terminal) and a source terminal (low potential side terminal). In each parallel switching element, the drain terminals of the first and second switching elements are connected by wiring, and the source terminals of the first and second switching elements are connected by wiring. In the parallel switching elements on the upper arm side, parasitic inductances L103a and L103b exist in the wiring between the drain terminals. Parasitic inductances also exist in the wiring between the source terminals, but are not shown here. In the parallel switching elements on the lower arm side, parasitic inductances L104a and L104b exist in the wiring between the source terminals. Parasitic inductances also exist in the wiring between the drain terminals, but are not shown here. In each switching element, parasitic capacitances exist between the drain and source, between the drain and gate, and between the gate and source.

[0025] The operation will be described when the first and second switching elements 103a and 103b on the upper arm side are off and the first and second switching elements 104a and 104b on the lower arm side change from off to on. When the first and second switching elements 104a and 104b on the lower arm side are off, current flows through the path indicated by the solid line in Figure 2 via the parasitic diodes of the first and second switching elements 103a and 103b on the upper arm. When the first and second switching elements 104a and 104b on the lower arm side are turned on, the current path gradually switches so that current flows through the path indicated by the dotted line in Figure 2.

[0026] 3 is a waveform diagram showing time variations in the drain-source voltages Vds1 and Vds2 and the drain currents Id1 and Id2 of the first and second switching elements 103a and 103b on the upper arm, respectively, after the first and second switching elements 104a and 104b on the lower arm are turned on. Assume that the parasitic inductances of the wiring are L103a ≠ L103b and L104a ≠ L104b. In this case, even if the first and second switching elements 104a and 104b on the lower arm are turned on at the same time, the parasitic inductances of the wiring, i.e., the difference in impedance, will cause a bias in the first and second drain currents Id1 and Id2.

[0027] For example, at time t0, the second drain current Id2 flowing through the parasitic diode of the second switching element 103b becomes smaller than the first drain current Id1 flowing through the parasitic diode of the first switching element 103a. Therefore, the second drain current Id2 flowing through the parasitic diode of the second switching element 103b becomes zero first, and reverse recovery occurs in the anti-parallel connected diode. Thereafter, the parasitic capacitance between the drain and source of the second switching element 103b is charged by reverse recovery, and the second drain-source voltage Vds2 rises.

[0028] On the other hand, because the parasitic diode of the first switching element 103a is in a conductive state, the first drain-source voltage Vds1 is approximately 0 V (VF). For example, at time t1 when Vds2 reaches its peak value, Vds1 is approximately 0, and therefore a potential difference (Vds2 - Vds1) occurs between the first drain-source voltage Vds1 and the second drain-source voltage Vds2.

[0029] That is, when the first and second switching elements 103a and 103b are turned off and drain currents flow through the anti-parallel-connected diodes of the first and second switching elements 103a and 103b, the drain currents of the anti-parallel-connected diodes become zero, and then reverse recovery occurs in each anti-parallel-connected diode. The reverse recovery of each anti-parallel-connected diode charges the parasitic capacitance between the drain and source of each switching element, causing the drain-source voltage of each switching element to rise. At this time, differences in the parasitic impedance of the wiring of each switching element cause deviations in the drain currents, resulting in differences in the timing at which the drain currents become zero and the timing at which the drain-source voltages rise, resulting in a potential difference in the drain-source voltages between the first and second switching elements.

[0030] 1-1. Resonance phenomenon in the first comparative example The resonance phenomenon between the switching elements caused by the drain-source voltage potential difference (Vds2-Vds1) between the first and second switching elements will be described with reference to Fig. 4. Fig. 4 is a partial circuit diagram of Fig. 2, showing first and second switching elements 103a and 103b on the upper arm side and a gate drive circuit of a first comparative example. Note that the gate drive circuit of this embodiment, which will be described later, is obtained by adding circuits to the gate drive circuit of the first comparative example, and therefore the gate drive circuit of the first comparative example has a basic configuration before improvement of the gate drive circuit of this embodiment.

[0031] The first and second switching elements 103a and 103b on the upper arm side have drain-source parasitic capacitances Cds1 and Cds2, drain-gate parasitic capacitances Cdg1 and Cdg2, and gate-source parasitic capacitances Cgs1 and Cgs2.

[0032] The drive circuit 10 functions as a gate drive circuit that outputs drive signals to turn on and off the first and second switching elements 103a and 103b on the upper arm side. The drive circuit 10 has a gate-on switching element 201 and a gate-off switching element 202 connected in series. The gate-on switching element 201 is an NPN transistor, and the gate-off switching element 202 is a PNP transistor, forming a push-pull circuit. A PMOS, an NMOS, or the like may be used as each switching element.

[0033] The collector terminal (high potential side terminal) of the gate-on switching element 201 is connected to an on-side potential supply source 213 that supplies a gate-on potential Vcc, and the emitter terminal (low potential side terminal) of the gate-off switching element 202 is connected to an off-side potential supply source 214 that supplies a gate-off potential Vee.

[0034] In this embodiment, the reference potential Vs of the first and second switching elements is connected between the gate-on potential Vcc and the gate-off potential Vee, and the gate-off potential Vee is a potential more negative than the reference potential Vs. The gate-on potential Vcc is a positive bias potential based on the reference potential Vs, and is a potential obtained by adding a predetermined positive offset potential to the reference potential Vs. The gate-off potential Vee is a negative bias potential based on the reference potential Vs, and is a potential obtained by subtracting the absolute value of a predetermined negative offset potential from the reference potential Vs.

[0035] The reference potential Vs is connected to the source terminals (low potential side terminals) of the first and second switching elements and varies depending on the potential of the source terminals. The gate-source voltage Vgs is the potential difference between the gate terminal and the potential of the source terminal and the reference potential Vs.

[0036] A control signal from a control device is input to the base terminals (control terminals) of the gate-on and gate-off switching elements 201, 202. When the control signal is on, the gate-on switching element 201 turns on and the gate-off switching element 202 turns off, and a drive signal of gate-on potential Vcc is output. When the control signal is off, the gate-on switching element 201 turns off and the gate-off switching element 202 turns on, and a drive signal of gate-off potential Vee is output.

[0037] A drive signal for gate-on potential Vcc is output from an ON-side output terminal 301, and a drive signal for gate-off potential Vee is output from an OFF-side output terminal 302. The ON-side output terminal 301 is connected to the emitter terminal (low potential side terminal) of the gate-on switching element 201, and the OFF-side output terminal 302 is connected to the collector terminal (high potential side terminal) of the gate-off switching element 202. Note that the ON-side output terminal 301 and the OFF-side output terminal 302 may be the same terminal.

[0038] A first drive signal line 210 is provided to input a drive signal of the drive circuit 10 to the gate terminal 103ag of the first switching element 103a, and a second drive signal line 211 is provided to input a drive signal to the gate terminal 103bg of the second switching element 103b. A first resistor for the drive signal is connected in series to a portion of the first drive signal line 210 closer to the drive circuit 10 than a connection with a first OFF-side connecting line 216a (described later). A second resistor for the drive signal is connected in series to a portion of the second drive signal line 211 closer to the drive circuit 10 than a connection with a second OFF-side connecting line 216b (described later).

[0039] In this example, the portion of the first drive signal line 210 on the drive circuit 10 side branches into an ON-side branch line 210a and an OFF-side branch line 210b to connect to the ON-side output terminal 301 and the OFF-side output terminal 302. Similarly, the portion of the second drive signal line 211 on the drive circuit 10 side branches into an ON-side branch line 211a and an OFF-side branch line 211b.

[0040] A first resistor 203a for an ON-side drive signal is connected in series to an ON-side branch line 210a of the first drive signal line 210, and a first resistor 204a for an OFF-side drive signal is connected in series to an OFF-side branch line 210b of the first drive signal line 210. A second resistor 203b for an ON-side drive signal is connected in series to an ON-side branch line 211a of the second drive signal line 211, and a second resistor 204b for an OFF-side drive signal is connected in series to an OFF-side branch line 211b of the second drive signal line 211. Resistors may be provided on each common line, and the first resistor 203a for an ON-side drive signal and the first resistor 204a for an OFF-side drive signal may have the same resistance, and the second resistor 203b for an ON-side drive signal and the second resistor 204b for an OFF-side drive signal may have the same resistance.

[0041] A bypass circuit 215 is provided that connects the first drive signal line 210 and the second drive signal line 211 to the OFF-side potential supply source 214. The bypass circuit 215 has a first OFF-side connection line 216a that connects the first drive signal line 210 to the OFF-side potential supply source 214 and a second OFF-side connection line 216b that connects the second drive signal line 211 to the OFF-side potential supply source 214. The first OFF-side connection line 216a is connected to a portion of the first drive signal line 210 that is closer to the gate terminal 103ag than the resistors 203a and 204a. The second OFF-side connection line 216b is connected to a portion of the second drive signal line 211 that is closer to the gate terminal 103bg than the resistors 203b and 204b. This allows each gate terminal to be connected to the OFF-side potential supply source 214 with low impedance via each OFF-side connection line, without going through the resistors of each drive signal line.

[0042] The bypass circuit 215 has two bypass switching elements 205a and 205b that turn on and off the connection between the first OFF-side connecting line 216a and the second OFF-side connecting line 216b. In this example, the first bypass switching element 205a is connected in series to the first OFF-side connecting line 216a, and the second bypass switching element 205b is connected in series to the second OFF-side connecting line 216b. Each of the bypass switching elements 205a and 205b is turned on and off by the drive circuit 10. Gate terminals of the bypass switching elements 205a and 205b are connected to control terminals 303 and 304 of the drive circuit 10. Each of the bypass switching elements 205a and 205b is a MOSFET. Note that other types of switching elements with fast switching speeds may also be used.

[0043] The drive circuit 10 outputs control signals to turn on the first and second bypass switching elements 205a and 205b when turning off the first and second switching elements 103a and 103b. For example, the drive circuit 10 outputs a control signal to turn on the first bypass switching element 205a when the first gate-source voltage Vgs1 of the first switching element 103a is equal to or lower than a threshold, and outputs a control signal to turn off the first bypass switching element 205a in other cases. The drive circuit 10 also outputs a control signal to turn on the second bypass switching element 205b when the second gate-source voltage Vgs2 of the second switching element 103b is equal to or lower than a threshold, and outputs a control signal to turn off the second bypass switching element 205b in other cases. Various voltage sensors (not shown), such as shunt resistors, are used to detect the potential difference Vgs between the gate terminal and the source terminal.

[0044] When the first bypass switching element 205a is turned on, the first OFF-side connecting line 216a can connect the gate terminal 103ag of the first switching element 103a to the OFF-side potential supply source 214 at low impedance. When the second bypass switching element 205b is turned on, the second OFF-side connecting line 216b can connect the gate terminal 103bg of the second switching element 103b to the OFF-side potential supply source 214 at low impedance.

[0045] As a result, when each switching element is turned off, the gate-source voltage of each switching element can be quickly reduced to the gate-off potential Vee of the off-side potential supply source 214, thereby speeding up the turn-off operation of each switching element.

[0046] However, unlike this embodiment, the first comparative example does not include the first and second diodes 206a and 206b described later, and therefore, as shown in FIG. 4, the gate terminal 103ag of the first switching element 103a and the gate terminal 103bg of the second switching element 103b are connected with low impedance via the connection path to the off-side potential supply source 214 by the first and second bypass switching elements 205a and 205b.

[0047] Then, due to the potential difference (Vds2-Vds1) in the drain-source voltage between the first and second switching elements described with reference to FIG. 3, a resonance phenomenon occurs in the connection path of the low impedance connection between the gate terminals of the first and second switching elements via the first and second bypass switching elements 205a, 205b, the parasitic inductances L103a, L103b of the wiring between the drain terminals of the first and second switching elements, and the parasitic capacitances of the first and second switching elements.

[0048] For example, at time t1 in Figure 3, Vds2 > Vds1, and a portion of the current generated by this potential difference flows from the drain terminal of the second switching element through parasitic inductances L103a and L103b in the wiring between the drain terminals of the first and second switching elements, parasitic capacitance Cdg1 between the drain and gate of the first switching element, and the low-impedance connection between the gate terminals of the first and second switching elements via first and second bypass switching elements 205a and 205b, and then into parasitic capacitance Cgs2 between the gate and source of the second switching element, as shown by the solid line in Figure 4. This causes the gate-source voltage Vgs2 of the second switching element to rise from the gate-off potential Vee and exceed the on-threshold, resulting in false on. Note that the lower the impedance of the connection between the gate terminals of the first and second switching elements, the larger the current that flows and the greater the rise in the gate-source voltage.

[0049] Here, as shown by the dotted lines in FIG. 4, there is also a connection path between the gate terminals of the first and second switching elements via second resistors 203a and 203b for the first and second ON-side drive signals and second resistors 204a and 204b for the first and second OFF-side drive signals.

[0050] 1-2. Second comparative example to prevent resonance phenomenon A second comparative example configured to prevent this resonance phenomenon will be described. A gate drive circuit according to the second comparative example is shown in FIG. 5. In addition to the configuration shown in FIG. 4, the bypass circuit 215 includes a first diode 206a connected in series on the first OFF-side connecting line 216a with its anode facing the first drive signal line 210 and its cathode facing the OFF-side potential supply source 214, and a second diode 206b connected in series on the second OFF-side connecting line 216b with its anode facing the second drive signal line 211 and its cathode facing the OFF-side potential supply source 216b. The gate drive circuit of the second comparative example also has the same basic configuration as the gate drive circuit of this embodiment before the improvements.

[0051] By providing the first diode 206a and the second diode 206b facing each other on the connection path between the gate terminals of the first and second switching elements, for example, at time t1 in FIG. 3, the second diode 206b is reverse-biased, blocking the current along the solid-line path in FIG. 4. That is, the gate terminals 103ag and 103bg of the first and second switching elements are connected to the off-side potential supply 214 with low impedance, while the connection between the gate terminals of the first and second switching elements is high impedance. This blocks the current between the gate terminals due to the drain-source voltage difference (Vds2-Vds1) between the first and second switching elements, suppressing an increase in the gate-source voltage and preventing false turn-on. Note that the gate terminals 103ag and 103bg of the first and second switching elements are also connected by the first and second drive signal lines 210 and 211 and by the connection path via resistors for the on-side and off-side drive signals, so there is still a possibility of false turn-on.

[0052] Furthermore, the gate-off potential Vee is a negative bias potential based on the reference potential Vs, and the gate-source voltage rises from the gate-off potential Vee. Therefore, even if the gate-source voltage rises, it is difficult for it to reach the on voltage, making it less likely to turn on accidentally.

[0053] Next, we will explain the problem with the second comparative example. For example, at time t1 in FIG. 3, Vds2 > Vds1. As shown by the solid line in FIG. 6, a portion of the current generated by this potential difference transfers charge from Vds2 to Vds1, passing through the gate-source of the first switching element 103a, the first diode 206a, and the first bypass switching element 205a, and then returning from the reference potential Vs to the second switching element 103b. At this time, the gate-source voltage Vgs1 of the first switching element 103a flows in a discharging direction. However, because the first diode 206a can only pass current in one direction due to its characteristics, the current path indicated by the dashed line in FIG. 7 does not exist. In other words, in the second comparative example, when a potential difference occurs, there is no current path returning to the second switching element 103b. Therefore, the gate-source voltage Vgs1 of the first switching element 103a is discharged, resulting in a drop in potential.

[0054] 8 is a waveform diagram showing temporal changes in the drain-source voltages Vds1 and Vds2 and the gate-source voltages Vgs1 and Vgs2 of the first and second switching elements 103a and 103b on the upper arm, respectively, after the first and second switching elements 104a and 104b on the lower arm are turned on, similar to FIG. Assume that the parasitic inductances of the wirings are equal to or different from L103a and L103b and equal to or different from L104a and L104b. In this case, even if the first and second switching elements 104a and 104b on the lower arm are turned on at the same time, the parasitic inductances, i.e., the impedances, of the wirings cause a bias in the first and second drain currents Id1 and Id2, resulting in a potential difference between the first and second drain-source voltages Vds2 and Vds1.

[0055] At time t2 in FIG. 8, Vds2>Vds1, and therefore the first gate-source voltage Vgs1 is discharged by the current path described in FIG. 6, and since current can only flow in the discharge direction, the gate-source voltage Vgs1 of the first switching element 103a drops and exceeds the withstand voltage on the negative side.

[0056] 1-3. Bypass circuit according to this embodiment <Installation of damping mechanism> A gate drive circuit according to this embodiment will be described. In this embodiment, as shown in Fig. 9, in addition to the configuration of the second comparative example in Fig. 5, a bypass circuit 215 has one or two attenuation mechanisms 207 that attenuate the current flowing through the first off-side connecting line 216a and the second off-side connecting line 216b.

[0057] That is, the bypass circuit 215 according to the present embodiment includes a first OFF-side connecting line 216a connecting the first drive signal line 210 and the OFF-side potential supply source 214, a first diode 206a connected in series on the first OFF-side connecting line 216a and passing a current from the first drive signal line 210 side to the OFF-side potential supply source 214 side, a second OFF-side connecting line 216b connecting the second drive signal line 211 and the OFF-side potential supply source 214, a second diode 206b passing a current from the second drive signal line 211 side to the OFF-side potential supply source 216b side, and two bypass switching elements 205a and 205b that are turned on and off by the drive circuit 10 and turn on and off the connection between the first OFF-side connecting line 216a and the second OFF-side connecting line 216b. The basic configuration of the bypass circuit 215 is the same as that of the first and second comparative examples described above. In this embodiment, the bypass circuit 215 has one or two attenuation mechanisms 207 that attenuate the current flowing through the first OFF-side connecting line 216a and the second OFF-side connecting line 216b.

[0058] With this configuration, due to the potential difference between the first and second drain-source voltages, a current flows from the low-potential-side gate terminal through the low-potential-side off-side connecting line, the low-potential-side diode, and the low-potential-side bypass switching element to the off-side potential supply source 214, but the low-potential-side diode prevents a reverse current from flowing, so the low-potential-side gate-source voltage drops. When a forward current flows through the low-potential-side off-side connecting line, the current is attenuated by the attenuation mechanism, so the amount of drop in the low-potential-side gate-source voltage can be reduced and it can be prevented from exceeding the negative-side breakdown voltage.

[0059] <Negative bias of gate-off potential Vee> As described above, in this embodiment, the reference potential Vs of the first and second switching elements is connected between the gate-on potential Vcc and the gate-off potential Vee, and the gate-off potential Vee is a potential more negative than the reference potential Vs. The reference potential Vs is connected to the source terminals (low-potential terminals) of the first and second switching elements, and the gate-source voltage Vgs is the potential difference of the gate terminal with respect to the reference potential Vs.

[0060] As described above, the reverse recovery of the anti-parallel diode of each switching element charges the drain-source parasitic capacitance Cds of each switching element, causing the drain-source voltage Vds of each switching element to rise. Then, due to the connection between the gate terminals via the first and second drive signal lines 210 and 211 and the resistors for the on-side and off-side drive signals, the gate-source voltage Vgs of the high-potential switching element may rise above the gate-off potential Vee, potentially causing false turn-on. By biasing the gate-off potential Vee more negatively than the reference potential Vs, false turn-on can be suppressed.

[0061] On the other hand, the gate-source voltage Vgs1 of the first switching element before it starts to decrease is at a gate-off potential Vee that is lower than the reference potential Vs, and the margin of the potential difference relative to the negative-side breakdown voltage is small. However, the attenuation mechanism 207 can reduce the amount of decrease in the gate-source voltage Vgs1, thereby preventing it from exceeding the negative-side breakdown voltage.

[0062] <Installation of attenuation resistor> In this embodiment, the one or two damping mechanisms 207 are one or two damping resistors 207 connected in series on the first off-side connecting line 216a and the second off-side connecting line 216b.

[0063] In the example of FIG. 9, a first attenuation resistor 207a is connected in series on a first OFF-side connecting line 216a, and a second attenuation resistor 207b is connected in series on a second OFF-side connecting line 216b.

[0064] Similar to FIG. 8, FIG. 10 is a waveform diagram showing the time variations in the drain-source voltages Vds1 and Vds2 and the gate-source voltages Vgs1 and Vgs2 of the first and second switching elements 103a and 103b on the upper arm side, respectively, after the first and second switching elements 104a and 104b on the lower arm side are turned on.

[0065] The first attenuation resistor 207a that attenuates the current flowing through the first OFF-side connecting line 216a can reduce the current flowing through the first OFF-side connecting line 216a from the gate terminal of the first switching element to the OFF-side potential supply source 214, as shown by the solid line in Fig. 6. Therefore, the amount of decrease in the gate-source voltage Vgs1 of the first switching element can be reduced more than in the case of Fig. 8, and the gate-source voltage Vgs1 can be prevented from exceeding the negative-side withstand voltage.

[0066] <Setting the attenuation resistance value> As described above, the bypass circuit 215 is provided to quickly reduce the gate-source voltage of each switching element to the gate-off potential Vee of the off-side potential supply source 214 when turning off each switching element, thereby speeding up the turn-off operation of each switching element. Therefore, if the resistance values ​​of the first and second attenuation resistors 207a and 207b are set too large, the rate at which the gate-source voltage decreases cannot be made sufficiently fast, and the turn-off operation of each switching element cannot be made sufficiently fast.

[0067] As described above, first resistors for drive signals (in this example, first resistors 203a and 204a for ON-side and OFF-side drive signals) are connected in series on a portion of the first drive signal line 210 closer to the drive circuit 10 than the connection portion with the first OFF-side connecting line 216a. Second resistors for drive signals (in this example, second resistors 203b and 204b for ON-side and OFF-side drive signals) are connected in series on a portion of the second drive signal line 211 closer to the drive circuit 10 than the connection portion with the second OFF-side connecting line 216b.

[0068] The resistance value of one or two attenuation resistors 207 is smaller than the resistance value of the first resistor for the drive signal and the resistance value of the second resistor for the drive signal. In the example of Fig. 9, the resistance value of the first attenuation resistor 207a is smaller than the resistance value of the first resistor for the drive signal (in this example, the first resistor 204a for the OFF-side drive signal), and the resistance value of the second attenuation resistor 207b is smaller than the resistance value of the second resistor for the drive signal (in this example, the second resistor 204b for the OFF-side drive signal).

[0069] According to this configuration, the impedance of the first and second OFF-side connecting lines 216a, 216b of the bypass circuit 215 can be made lower than the impedance of the first and second drive signal lines 210, 211 while attenuating the current flowing through each OFF-side connecting line by using one or two attenuation resistors, and the bypass circuit 215 can speed up the OFF operation of each switching element.

[0070] The first attenuation resistor 207a may be connected at any location as long as it is connected in series on the first off-side connecting line 216a, and the second attenuation resistor 207b may be connected at any location as long as it is connected in series on the second off-side connecting line 216b.

[0071] For example, as shown in FIG. 9, the first attenuation resistor 207a may be connected in series on the first off-side connecting line 216a closer to the off-side potential supply source 214 than the first bypass switching element 205a, and the first attenuation resistor 207b may be connected in series on the second off-side connecting line 216b closer to the off-side potential supply source 214 than the second bypass switching element 205b.

[0072] Alternatively, as shown in FIG. 11, the first attenuation resistor 207a may be connected in series on the first OFF-side connecting line 216a closer to the gate terminal 103ag than the first bypass switching element 205a and the first diode 206a, and the first attenuation resistor 207b may be connected in series on the second OFF-side connecting line 216b closer to the gate terminal 103bg than the second bypass switching element 205b and the second diode 206b.

[0073] Alternatively, as shown in FIGS. 12 and 13, the first attenuation resistor 207a may be connected in series on the first OFF-side connecting line 216a between the bypass switching element 205 and the first diode 206a, and the second attenuation resistor 207b may be connected in series on the second OFF-side connecting line 216b between the bypass switching element 205 and the second diode 206b.

[0074] 12 and 13, the bypass circuit 215 may have one bypass switching element 205 that turns on and off the connection between the first OFF-side connecting line 216a and the second OFF-side connecting line 216b. Specifically, the first OFF-side connecting line 216a and the second OFF-side connecting line 216b may be configured as a common OFF-side connecting line 216c on the OFF-side potential supply source 214 side. One bypass switching element 205 may be connected in series to the common OFF-side connecting line 216c. Furthermore, as shown in FIG. 13, one bypass switching element 205 may be incorporated into the drive circuit 10. Two bypass switching elements 205a, 205b may also be incorporated into the drive circuit 10. 14 and 15, a single attenuation resistor 207, which combines the first attenuation resistor 207a and the second attenuation resistor 207b, may be connected in series on the common off-side connection line 216c closer to the off-side potential supply source 214 than one or two bypass switching elements 205a, 205b.

[0075] Schottky barrier diodes with a small forward voltage (VF) may be used as the first and second diodes 206a and 206b. This reduces the voltage drop across the first and second diodes 206a and 206b, allowing the gate-source voltage Vgs of each switching element to approach the gate-off potential Vee, thereby enhancing the ability to prevent erroneous turn-on of each switching element. Furthermore, compared to typical diodes, Schottky diodes have almost no recovery, so no voltage surge occurs between the anode and cathode, eliminating the risk of damage to the drive circuit 10 and other components due to a recovery surge.

[0076] The smaller the junction capacitance Cak of the first and second diodes 206a and 206b is when a reverse bias is applied, the higher the impedance becomes, so a smaller junction capacitance Cak is desirable. When current flows between the gate terminals of the first and second switching elements, the junction capacitance Cak and the parasitic capacitance Cgs between the gate and source are connected in series. For example, if a diode with the same capacitance Cak as Cgs is connected, the combined capacitance of Cgs and Cak is halved compared to when no diode is connected, doubling the impedance and making it more difficult for current to flow. In other words, as long as Cak is smaller than Cgs, sufficient effect can be obtained.

[0077] <Attenuation due to a decrease in the gate-on potential of the bypass switching element> Alternatively, the one or two attenuation resistors 207 may not be provided. Instead, the drive circuit 10 may lower the gate-on potential supplied to the gate terminals of the one or two bypass switching elements 205 below a specified gate-on potential, causing the one or two bypass switching elements to function as one or two attenuation mechanisms 207. For example, the specified gate-on potential is a standard or recommended gate-on potential specified in the specifications of the bypass switching elements, or the gate-on potential Vcc of the drive signals supplied to the first and second switching elements.

[0078] Lowering the gate-on potential can reduce the drain current of the bypass switching element. Therefore, a target current for the low-potential-side off-side connecting line can be set so that the gate-source voltage of the low-potential-side switching element does not exceed the negative-side breakdown voltage, and the gate-on potential can be set so that the drain current becomes the target current. As a result, when a forward current flows through the low-potential-side off-side connecting line, the current is attenuated by the low-potential-side bypass switching element, so the amount of drop in the low-potential-side gate-source voltage can be reduced and the negative-side breakdown voltage can be prevented from being exceeded.

[0079] 16, when first and second bypass switching elements 205a, 205b are provided on the first and second OFF-side connecting lines 216a, 216b, the gate-on potential supplied to the gate terminal of the first bypass switching element 205a may be lowered below a specified gate-on potential, causing the first bypass switching element 205a to function as a first attenuation mechanism 207a that attenuates the current flowing through the first OFF-side connecting line 216a. Also, the gate-on potential supplied to the gate terminal of the second bypass switching element 205b may be lowered below a specified gate-on potential, causing the first bypass switching element 205a to function as a second attenuation mechanism 207b that attenuates the current flowing through the second OFF-side connecting line 216b.

[0080] For example, as shown in FIG. 17, when one bypass switching element 205 is provided on a common off-side connecting line 216c, the gate-on potential supplied to the gate terminal of the bypass switching element 205 may be lowered below a specified gate-on potential, so that the bypass switching element 205 functions as a single attenuation mechanism 207 that attenuates the current flowing through the first off-side connecting line 216a and the second off-side connecting line 216b.

[0081] <Setting the gate-off potential Vee = reference potential Vs> As shown in FIG. 18, the gate-off potential Vee may be equal to the reference potential Vs. The reference potential Vs is connected to the off-side potential supply source 214. This configuration reduces the effect of suppressing false turn-on, but by appropriately setting the resistance values ​​of the resistors for the on-side and off-side drive signals, false turn-on can be suppressed. Meanwhile, the gate-source voltage Vgs1 of the first switching element before it starts to decrease becomes the gate-off potential Vee, which is equal to the reference potential Vs, and the margin of potential difference relative to the negative-side breakdown voltage increases. Therefore, by reducing the resistance value of the attenuation resistor 207, the amount of current attenuation by the attenuation mechanism 207 can be reduced, and the turn-off operation of each switching element can be accelerated.

[0082] 2. Second Embodiment A power conversion device 1 according to a second embodiment will be described. Description of components similar to those of the first embodiment will be omitted. The basic configuration of the power conversion device 1 according to this embodiment is similar to that of the first embodiment, but differs from the first embodiment in that, as shown in FIG. 19 , the bypass circuit 215 does not have the attenuation mechanism 207, and Zener diodes are used as the first diode 206 a and the second diode 206 b.

[0083] As in the first embodiment, the bypass circuit 215 according to the present embodiment includes a first OFF-side connecting line 216a connecting the first drive signal line 210 and the OFF-side potential supply source 214, a first diode 206a connected in series on the first OFF-side connecting line 216a and passing a current from the first drive signal line 210 side to the OFF-side potential supply source 214 side, a second OFF-side connecting line 216b connecting the second drive signal line 211 and the OFF-side potential supply source 214, a second diode 206b passing a current from the second drive signal line 211 side to the OFF-side potential supply source 216b side, and two bypass switching elements 205a and 205b that are turned on and off by the drive circuit 10 and turn on and off the connection between the first OFF-side connecting line 216a and the second OFF-side connecting line 216b. These configurations are the same as those in the first embodiment, and therefore description thereof will be omitted.

[0084] Unlike the first embodiment, in the present embodiment, the first diode 206a and the second diode 206b are Zener diodes. Hereinafter, the first diode 206a will be referred to as the first Zener diode 206a, and the second diode 206b will be referred to as the second Zener diode 206b.

[0085] With this configuration, when the gate-source voltage Vgs of each switching element 103 reaches the Zener voltage Vz of the Zener diode 206 before exceeding the negative-side breakdown voltage Vbk, the Zener diode 206 breaks down, the anode-cathode voltage of the Zener diode 206 becomes the constant value of the Zener voltage Vz, and a current flows so that the anode-cathode voltage becomes the Zener voltage Vz. Therefore, the gate-source voltage Vgs is clipped to the voltage obtained by adding the negative gate-off potential Vee (Vee<0) and the negative Zener voltage Vz (Vz<0), and the gate-source voltage of the switching element can be prevented from exceeding the negative-side breakdown voltage Vbk (Vbk<0).

[0086] In this embodiment, the gate-off potential Vee is a potential that is more negative than the reference potential Vs. Therefore, the Zener voltage Vz is preferably set so that the sum of the absolute value of the negative gate-off potential Vee and the absolute value of the negative Zener voltage Vz (|Vee|+|Vz|) is smaller than the absolute value of the negative-side breakdown voltage Vbk of the first and second switching elements (|Vee|+|Vz|<|Vbk|).

[0087] According to this configuration, the voltage (Vee+Vz) obtained by adding the gate-off potential Vee and the negative Zener voltage Vz is between the gate-off potential Vee and the negative-side withstand voltage Vbk, and when the gate-source voltage Vgs becomes the gate-off potential Vee during normal switching element off, the Zener diode 206 does not break down. Instead, during reverse recovery of each anti-parallel connected diode, when the gate-source voltage Vgs falls below the gate-off potential Vee, the Zener diode 206 breaks down before reaching the negative-side withstand voltage Vbk.

[0088] For example, if the gate-off potential Vee is -3V and the negative withstand voltage Vbk is -10V, it may be set such that -7 < Vz < 0 so that |Vz| < |-10| - |-3| = 7.

[0089] Alternatively, when the gate-off potential Vee is the reference potential Vs, the absolute value of the Zener voltage Vz only needs to be smaller than the absolute value of the negative withstand voltage Vbk of the first and second switching elements (|Vz| < |Vbk|). According to this configuration, the voltage obtained by adding the 0V of the reference potential Vs and the negative Zener voltage Vz is between the 0V of the reference potential Vs and the negative withstand voltage Vbk. When the gate-source voltage Vgs becomes 0V of the reference potential Vs during the off state of a normal switching element, the Zener diode 206 does not break down. During the reverse recovery (recovery) of each anti-parallel diode, when the gate-source voltage Vgs is lower than 0V of the reference potential Vs, it breaks down before reaching the negative withstand voltage Vbk.

[0090] As shown in FIG. 20, similar to FIG. 12 of the embodiment, the first off-side connection line 216a and the second off-side connection line 216b may be constituted by a common off-side connection line 216c on the off-side potential supply source 214 side. And one bypass switching element 205 may be connected in series on the common off-side connection line 216c. Also, similar to FIG. 13 of Embodiment 1, one bypass switching element 205 may be incorporated in the drive circuit 10. Also, two bypass switching elements 205a, 205b may be incorporated in the drive circuit 10.

[0091] <Other Embodiments> (1) In the above embodiments, the configurations of the bypass circuit 215, drive circuit 10, etc. for the first and second switching elements 103a and 103b on the upper arm side have been described. However, a similar phenomenon occurs in any parallel switching element in which the drain-source voltage of the switching element rises due to reverse recovery of the anti-parallel connected diodes. Therefore, not only on the upper arm side, but also on the lower arm side and parallel switching elements for various applications, the same bypass circuit 215, drive circuit 10, etc. as on the upper arm side may be provided.

[0092] (2) Wide bandgap semiconductors such as SiC (Silicon Carbide) or GaN (Gallium Nitride) may be used as the semiconductors of the first and second switching elements. Using wide bandgap semiconductors increases the switching speed (dv / dt, di / dt) and reduces losses. The faster the switching speed, the greater the drain-source voltage difference between the switching elements, making them more susceptible to false turn-on and exceeding the negative-side breakdown voltage. Therefore, when the bypass circuit 215 and drive circuit 10 according to the present disclosure are used in parallel switching elements that use wide bandgap semiconductors, false turn-on can be suppressed while also preventing the negative-side breakdown voltage from being exceeded.

[0093] Summary of Aspects of the Disclosure Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) a first switching element and a second switching element connected in parallel, each of which functions as an anti-parallel connected diode; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a first drive signal line for inputting the drive signal to a gate terminal of the first switching element, and a second drive signal line for inputting the drive signal to a gate terminal of the second switching element; a first off-side connecting line connecting the first drive signal line and an off-side potential supply source that supplies a gate off potential of the drive signal; a first diode connected in series on the first off-side connecting line with its anode facing the first drive signal line and its cathode facing the off-side potential supply source; a second off-side connecting line connecting the second drive signal line and the off-side potential supply source; a second diode connected in series on the second off-side connecting line with its anode facing the second drive signal line and its cathode facing the off-side potential supply source; and a bypass circuit having one or two bypass switching elements that are turned on and off by the drive circuit and turn on and off the connection between the first off-side connecting line and the second off-side connecting line, The bypass circuit is a power conversion device having one or two attenuation mechanisms that attenuate the current flowing through the first off-side connecting line and the second off-side connecting line.

[0094] (Appendix 2) A power conversion device as described in Appendix 1, wherein the one or two damping mechanisms are one or two damping resistors connected in series on the first off-side connecting line and the second off-side connecting line.

[0095] (Appendix 3) a first resistor for a drive signal is connected in series on a portion of the first drive signal line closer to the drive circuit than a connection portion with the first OFF-side connecting line, and a second resistor for a drive signal is connected in series on a portion of the second drive signal line closer to the drive circuit than a connection portion with the second OFF-side connecting line, 3. The power conversion device according to claim 2, wherein a resistance value of one or two of the attenuation resistors is smaller than a resistance value of the first resistor for the drive signal and a resistance value of the second resistor for the drive signal.

[0096] (Appendix 4) The power conversion device according to claim 1, wherein the drive circuit reduces a gate-on potential supplied to a gate terminal of one or two of the bypass switching elements to be lower than a specified gate-on potential, thereby causing the one or two bypass switching elements to function as one or two of the attenuation mechanisms.

[0097] (Appendix 5) 5. The power conversion device according to claim 1, wherein the first diode and the second diode are Schottky barrier diodes.

[0098] (Appendix 6) 6. The power conversion device according to claim 1, wherein a gate-off potential of the drive signal is a potential that is more negative than a reference potential of the first switching element and the second switching element.

[0099] (Appendix 7) a first switching element and a second switching element connected in parallel, each of which functions as an anti-parallel connected diode; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a first drive signal line for inputting the drive signal to a gate terminal of the first switching element, and a second drive signal line for inputting the drive signal to a gate terminal of the second switching element; a first off-side connecting line connecting the first drive signal line and an off-side potential supply source that supplies a gate off potential of the drive signal; a first diode connected in series on the first off-side connecting line with its anode facing the first drive signal line and its cathode facing the off-side potential supply source; a second off-side connecting line connecting the second drive signal line and the off-side potential supply source; a second diode connected in series on the second off-side connecting line with its anode facing the second drive signal line and its cathode facing the off-side potential supply source; and a bypass circuit having one or two bypass switching elements that are turned on and off by the drive circuit and turn on and off the connection between the first off-side connecting line and the second off-side connecting line, The power conversion device, wherein the first diode and the second diode are Zener diodes.

[0100] (Appendix 8) the gate-off potential is a potential that is more negative than a reference potential of the first switching element and the second switching element, 8. The power conversion device according to claim 7, wherein the Zener voltage is set so that the sum of the absolute value of the gate-off potential and the absolute value of the Zener voltage of the Zener diode is smaller than the absolute value of a withstand voltage on the negative side of the gate-source voltages of the first switching element and the second switching element.

[0101] (Appendix 9) the gate-off potential is a reference potential of the first switching element and the second switching element, 8. The power conversion device according to claim 7, wherein the absolute value of the Zener voltage of the Zener diode is smaller than the absolute value of the withstand voltage on the negative side of the gate-source voltage of the first switching element and the second switching element.

[0102] (Appendix 10) The power conversion device according to any one of appendixes 1 to 9, wherein the first off-side connecting line and the second off-side connecting line are configured by a common connecting line on the off-side potential supply source side, and one of the bypass switching elements is connected in series to the common connecting line.

[0103] (Appendix 11) 11. The power conversion device according to claim 1, wherein the drive circuit outputs a control signal that turns on one or two of the bypass switching elements when turning off the first switching element and the second switching element.

[0104] (Appendix 12) 12. The power conversion device according to claim 1, wherein the first switching element and the second switching element are switching elements using wide bandgap semiconductors.

[0105] Although various exemplary embodiments and examples are described in this disclosure, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless variations not illustrated are contemplated within the scope of the technology disclosed in this disclosure specification. For example, this includes cases where at least one component is modified, added, or omitted, or where at least one component is extracted and combined with components of another embodiment. [Explanation of symbols]

[0106] 1: power conversion device, 10: drive circuit, 103a: first switching element, 103b: second switching element, 109: AC motor, 110: high potential side electric wire, 111: low potential side electric wire, 205: bypass switching element, 206a: first diode, 206b: second diode, 207: damping mechanism, 210: first drive signal line, 211: second drive signal line, 214: OFF side potential supply source, 215: bypass circuit, 216a: first OFF side connecting line, 216b: second OFF side connecting line, Vee: gate OFF potential, Vs: reference potential, Vz: Zener voltage

Claims

1. a first switching element and a second switching element connected in parallel, each of which functions as an anti-parallel connected diode; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a first drive signal line for inputting the drive signal to a gate terminal of the first switching element, and a second drive signal line for inputting the drive signal to a gate terminal of the second switching element; a first off-side connecting line connecting the first drive signal line and an off-side potential supply source that supplies a gate off potential of the drive signal; a first diode connected in series on the first off-side connecting line with its anode facing the first drive signal line and its cathode facing the off-side potential supply source; a second off-side connecting line connecting the second drive signal line and the off-side potential supply source; a second diode connected in series on the second off-side connecting line with its anode facing the second drive signal line and its cathode facing the off-side potential supply source; and a bypass circuit having one or two bypass switching elements that are turned on and off by the drive circuit and turn on and off the connection between the first off-side connecting line and the second off-side connecting line, The bypass circuit is a power conversion device having one or two attenuation mechanisms that attenuate the current flowing through the first off-side connecting line and the second off-side connecting line.

2. 2. The power conversion device according to claim 1, wherein the one or two damping mechanisms are one or two damping resistors connected in series on the first off-side connecting line and the second off-side connecting line.

3. a first resistor for a drive signal is connected in series on a portion of the first drive signal line closer to the drive circuit than a connection portion with the first OFF-side connecting line, and a second resistor for a drive signal is connected in series on a portion of the second drive signal line closer to the drive circuit than a connection portion with the second OFF-side connecting line, The power conversion device according to claim 2 , wherein a resistance value of one or two of the attenuation resistors is smaller than a resistance value of the first drive signal resistor and a resistance value of the second drive signal resistor.

4. 2. The power conversion device according to claim 1, wherein the drive circuit reduces a gate-on potential supplied to a gate terminal of one or two of the bypass switching elements to be lower than a specified gate-on potential, thereby causing the one or two bypass switching elements to function as one or two of the attenuation mechanisms.

5. The power conversion device according to claim 1 or 2, wherein the first diode and the second diode are Schottky barrier diodes.

6. The power conversion device according to claim 1 or 2, wherein a gate-off potential of the drive signal is a potential that is more negative than a reference potential of the first switching element and the second switching element.

7. a first switching element and a second switching element connected in parallel, each of which functions as an anti-parallel connected diode; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a drive circuit that outputs drive signals that turn on and off the first switching element and the second switching element; a first drive signal line for inputting the drive signal to a gate terminal of the first switching element, and a second drive signal line for inputting the drive signal to a gate terminal of the second switching element; a first off-side connecting line connecting the first drive signal line and an off-side potential supply source that supplies a gate off potential of the drive signal; a first diode connected in series on the first off-side connecting line with its anode facing the first drive signal line and its cathode facing the off-side potential supply source; a second off-side connecting line connecting the second drive signal line and the off-side potential supply source; a second diode connected in series on the second off-side connecting line with its anode facing the second drive signal line and its cathode facing the off-side potential supply source; and a bypass circuit having one or two bypass switching elements that are turned on and off by the drive circuit and turn on and off the connection between the first off-side connecting line and the second off-side connecting line, The power conversion device, wherein the first diode and the second diode are Zener diodes.

8. the gate-off potential is a potential that is more negative than a reference potential of the first switching element and the second switching element, The voltage obtained by adding the absolute value of the gate-off potential and the absolute value of the Zener voltage of the Zener diode is set to the Zener voltage such that it is smaller than the absolute value of the withstand voltage on the negative side of the gate-source voltage of the first switching element and the second switching element. The power conversion device according to claim 7.

9. the gate-off potential is a reference potential of the first switching element and the second switching element, The power conversion device according to claim 7, wherein the absolute value of the Zener voltage of the Zener diode is smaller than the absolute value of the withstand voltage on the negative side of the gate-source voltage of the first switching element and the second switching element.

10. 8. The power conversion device according to claim 1, wherein the first off-side connecting line and the second off-side connecting line are configured by a common connecting line on the off-side potential supply source side, and one of the bypass switching elements is connected in series to the common connecting line.

11. 8. The power conversion device according to claim 1, wherein the drive circuit outputs a control signal that turns on one or two of the bypass switching elements when turning off the first switching element and the second switching element.

12. The power conversion device according to claim 1 or 7, wherein the first switching element and the second switching element are switching elements using a wide bandgap semiconductor.

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