Indication device

Abstract

To provide a display device capable of expanding a light-emitting area. [Solution] The pixel includes a substrate including first to third subpixels, each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first conductive layer on the substrate, the first conductive layer including a first reflective electrode in the light-emitting region and non-light-emitting region of the first subpixel, and a first connection electrode in the non-light-emitting region of the second and third subpixels; a second conductive layer on the first conductive layer, the second reflective electrode in the light-emitting region of the second subpixel; a third conductive layer on the second conductive layer, the third reflective electrode in the light-emitting region and non-light-emitting region of the third subpixel, and a second connection electrode in the non-light-emitting region of the first and second subpixels; and anode electrodes disposed on the third conductive layer in the first to third subpixels, wherein in the non-light-emitting region of each subpixel, the second connection electrode of the first subpixel is connected to the first reflective electrode, the second connection electrode of the second subpixel is connected to the first connection electrode, and the third reflective electrode of the third subpixel is connected to the first connection electrode.

Description

[Technical Field]

[0001] The present specification relates to a display device. [Background technology]

[0002] 2. Description of the Related Art With the development of an information society, various demands for display devices that display images are increasing, and various types of display devices such as liquid crystal displays (LCDs) and organic light emitting diode displays (OLEDs) are being used.

[0003] Among display devices, organic light-emitting display devices are self-emitting devices that offer superior viewing angles and contrast ratios compared to liquid crystal displays (LCDs), and do not require a separate backlight, making them lightweight and thin, with advantages in terms of power consumption. Furthermore, organic light-emitting display devices can be driven with a low DC voltage, offering fast response speeds and particularly low manufacturing costs.

[0004] Recently, there has been an increasing demand for display devices that require Augmented Reality (AR) and Virtual Reality (VR) or equivalent levels of ultra-high resolution using such organic light emitting display devices. Summary of the Invention [Problem to be solved by the invention]

[0005] The problem to be solved by this specification is to provide a display device capable of expanding a light-emitting area.

[0006] Another problem to be solved by the present specification is to provide a display device capable of reducing the number of reflective electrodes or connection electrodes on contact portions that overlap with transistors, and minimizing steps at the contact portions.

[0007] Another problem to be solved by the present specification is to provide a display device that can minimize steps in contact portions and improve thickness variations of a common light-emitting layer on the contact portions, thereby improving the light efficiency and color variations of organic light-emitting elements.

[0008] The problem to be solved in this specification is not limited to the above, and other technical problems can be inferred from the following embodiments. [Means for solving the problem]

[0009] a second conductive layer on the first conductive layer, the second conductive layer including a second reflective electrode in the light-emitting region of the second subpixel; a third conductive layer on the second conductive layer, the second conductive layer including a third reflective electrode in the light-emitting region of the third subpixel and a second connection electrode in the non-light-emitting region of the first subpixel; and an anode electrode disposed on the third conductive layer in each of the first to third subpixels. In the first subpixel, the second connection electrode is connected to the first reflective electrode in the non-light-emitting region of the first subpixel; in the second subpixel, the second connection electrode is connected to the first connection electrode; and in the third subpixel, the third reflective electrode is connected to the first connection electrode in the non-light-emitting region of the third subpixel.

[0010] a second conductive layer on the first conductive layer, the second conductive layer including a second reflective electrode in the light-emitting region of the second subpixel; a third conductive layer on the second conductive layer, the third conductive layer including a third reflective electrode in the light-emitting region of the third subpixel; and anode electrodes disposed on the first to third conductive layers in the first to third subpixels, wherein the anode electrode is directly connected to the first reflective electrode in the non-light-emitting region of the first subpixel, the anode electrode is directly connected to the first connecting electrode in the non-light-emitting region of the second subpixel, and the third reflective electrode is directly connected to the first connecting electrode in the non-light-emitting region of the third subpixel.

[0011] Specific details of other embodiments are included in the detailed description and drawings.

[0012] According to the embodiment, the second connection electrode located in the same layer as the second reflective electrode is omitted in the non-emitting region of the first subpixel and the non-emitting region of the third subpixel. The anode electrode of the first subpixel is connected to the transistor via the third connection electrode and the first reflective electrode, and the anode electrode of the third subpixel is connected to the transistor via the third connection electrode and the first connection electrode. The second reflective electrode does not extend to the non-emitting region of the second subpixel, and the anode electrode of the second subpixel is connected to the transistor via the third connection electrode and the first connection electrode. In other words, by reducing the number of conductive layers (or electrodes) in the contact portion connected to the transistor, the step in the contact portion can be alleviated. This minimizes the thickness deviation of the common emitting layer in the contact portion.

[0013] According to the embodiment, since the thickness deviation of the common light emitting layer in the contact portion is minimized, there are advantages in that the light emitting efficiency of the organic light emitting element in the contact portion can be improved and abnormal color deviation can be minimized.

[0014] According to the embodiment, the number of contact parts connected to the transistor can be reduced, which has the advantage of enabling the area of ​​the light-emitting region to be expanded.

[0015] According to the embodiment, there is an advantage that the voltage of the second reflective electrode can be stabilized by connecting the second reflective electrode of the second sub-pixel to a low voltage power supply line or a reference voltage line.

[0016] According to the embodiment, it is possible to provide a display device with high color reproducibility by improving color deviation in non-light-emitting areas.

[0017] However, the effects obtained in this specification are not limited to the above effects, and other effects not mentioned will be clearly understood by those having ordinary knowledge in the technical field to which this specification pertains from the following description. [Brief explanation of the drawings]

[0018] [Figure 1] FIG. 1 is a plan view of a display device according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA' in FIG. [Figure 3] 2 is a plan view of the substrate, connecting film, and printed circuit board of FIG. 1. [Figure 4] FIG. 2 is a circuit diagram of a pixel according to an embodiment. [Figure 5] FIG. 2 is a plan view of the pixel in FIG. [Figure 6] FIG. 6 is a cross-sectional view taken along line BB' in FIG. 5. [Figure 7] FIG. 6 is a cross-sectional view taken along line CC' in FIG. 5. [Figure 8] FIG. 7 is a cross-sectional view of the organic light-emitting device according to FIG. [Figure 9]FIG. 7 is a cross-sectional view of an organic light-emitting device according to a modified example of FIG. [Figure 10] FIG. 10 is a plan view of a pixel according to another embodiment. [Figure 11] FIG. 10 is a plan view of a pixel according to another embodiment. [Figure 12] FIG. 12 is a cross-sectional view taken along the line DD' in FIG. [Figure 13] FIG. 10 is a plan view of a pixel according to another embodiment. [Figure 14] FIG. 14 is a cross-sectional view taken along line EE' in FIG. [Figure 15] FIG. 10 is a cross-sectional view of a display device according to another embodiment. [Figure 16] FIG. 10 is a cross-sectional view of a display device according to another embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0019] Hereinafter, embodiments will be described with reference to the drawings. In this specification, when a component (or a region, layer, portion, etc.) is referred to as being "on," "connected," or "coupled" to another component, this means that the component may be directly connected / coupled to the other component, or that a third component may be disposed between them.

[0020] The same reference numerals refer to the same components. In the drawings, the thickness, proportions, and dimensions of the components are exaggerated for the purpose of effectively explaining the technical contents. "And / or" includes all one or more combinations that can define the related configuration.

[0021] Terms such as "first," "second," etc. may be used to describe various components, but the components are not limited by these terms. These terms are used only to distinguish one component from another. For example, a first component may be referred to as a "second component," and similarly, a second component may be referred to as a "first component" without departing from the scope of the present embodiment. A singular expression includes a plural expression unless the context clearly dictates otherwise.

[0022] Terms such as "under," "below," "on," and "above" are used to describe the relative relationships of features shown in the drawings. These terms are relative concepts and are described with reference to the directions shown in the drawings.

[0023] The use of terms such as "comprises" or "having" is intended to specify the presence of any feature, number, step, operation, component, part, or combination thereof stated in the specification, and is to be understood as not precluding the possible presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0024] FIG. 1 is a plan view of a display device according to an embodiment.

[0025] 1, a display device 1 according to an embodiment may include a substrate 2 including a display area DA including a plurality of pixels 20 and a non-display area NDA surrounding the display area DA. The non-display area NDA may surround the display area DA and may be an area that does not include pixels 20 and where no image is generated, although embodiments herein are not limited thereto. The non-display area NDA may include a first pad area PA1 located on the other side of the display area DA in the second direction DR2.

[0026] Gate drivers GIP may be arranged in the non-display area NDA on both sides of the display area DA in the first direction DR1. The gate drivers GIP may be formed in the form of an integrated circuit on the substrate 2, but are not limited thereto, and may be formed in the form of a driver chip. Although FIG. 1 illustrates the gate drivers GIP arranged on both the left and right sides of the display area DA, the present invention is not limited thereto, and the gate drivers GIP may be arranged on only one of the left and right sides.

[0027] A connection film COF may be attached to the first pad area PA1. A data driver DIC may be disposed on the connection film COF. The data driver DIC may be provided in the form of a driver chip, but the embodiment of the present specification is not limited thereto. One end of the connection film COF may be connected to the first pad area PA1, and the other end may include a second pad area PA2. A printed circuit board PCB may be connected to the second pad area PA2 of the connection film COF.

[0028] A low potential voltage line VSSL may be disposed in the non-display area NDA, with one end and the other end of the low potential voltage line VSSL being connected to the connection film COF and surrounding the display area DA outside the gate driver GIP.

[0029] Fig. 2 is a cross-sectional view taken along line A-A' in Fig. 1. For convenience of explanation, Fig. 2 only shows the organic light-emitting element OLED on the substrate 2 of the display device 1 and the sealing layer 8 that seals the organic light-emitting element OLED.

[0030] 2, a connection film COF may be attached on a first pad area PA1 of the substrate 2. A data driver DIC may be disposed on the connection film COF. While FIG. 2 illustrates the data driver DIC disposed on the upper surface of the connection film COF, the present invention is not limited thereto, and the data driver DIC may be disposed on the lower surface of the connection film COF.

[0031] The non-display area NDA around the display area DA may be a bezel area.

[0032] The display device 1 may further include a first pad PAD1 on the first pad area PA1. The first pad PAD1 may be disposed in the same layer as one of the conductive layers of the thin film transistors 31, 32, and 33, the reflective electrodes 42a, 42b, and 42c, and the anode electrodes 42a, 42b, and 42c shown in FIG. 6 or 7, which will be described later, but the embodiment of the present specification is not limited thereto.

[0033] A lead electrode may be disposed on the lower surface of the connection film COF. Among the lead electrodes, a first lead electrode RE1 is shown. An anisotropic conductive film ACF may be disposed between the first lead electrode RE1 and the first pad PAD1. The anisotropic conductive film ACF may include a resin SR and conductive balls CB dispersed in the resin SR. The resin SR may include an organic material having adhesive properties. The first pad PAD1 and the first lead electrode RE1 may be electrically connected via the conductive balls CB. The resin SR contacts the side and lower surfaces of the first lead electrode RE1 and the side and upper surfaces of the first pad PAD1, and serves to bond the first pad PAD1 and the first lead electrode RE1.

[0034] A printed circuit board PCB may be connected to the second pad area PA2 of the connecting film COF.

[0035] FIG. 3 is a plan view of the substrate, connecting film, and printed circuit board of FIG.

[0036] 3, the substrate 2 includes a first pad area PA1, and a plurality of first pads may be arranged in the first pad area PA1. The first pads may include a first low potential pad PAD1_VSS, a first reference voltage pad PAD1_REF, a first data pad PAD1_DATA, etc., but the embodiments of the present specification are not limited thereto.

[0037] One end of the connecting film COF may be connected to the first pad area PA1. A plurality of first lead electrodes may be arranged on one end of the connecting film COF. The first lead electrodes may include a first low-potential lead electrode RE1_VSS, a first reference voltage lead electrode RE1_REF, a first data lead electrode RE1_DATA, etc., but the embodiments of the present specification are not limited thereto. The first low-potential lead electrode RE1_VSS and the first low-potential pad PAD1_VSS may be electrically connected, the first reference voltage lead electrode RE1_REF and the first reference voltage pad PAD1_REF may be electrically connected, and the first data lead electrode RE1_DATA and the first data pad PAD1_DATA may be electrically connected.

[0038] A data driver DIC may be disposed on the connection film COF, and the first low potential lead electrode RE1_VSS, the first reference voltage lead electrode RE1_REF, and the first data lead electrode RE1_DATA may be electrically connected to the data driver DIC.

[0039] The other end of the connecting film COF may be connected to the second pad area PA2. A printed circuit board PCB may include the second pad area PA2 and be connected to the other end of the connecting film COF. A plurality of second lead electrodes may be arranged on the other end of the connecting film COF. The second lead electrodes may include a second low potential lead electrode RE2_VSS, a second reference voltage lead electrode RE2_REF, a second data lead electrode RE2_DATA, etc., but the embodiments of the present specification are not limited thereto.

[0040] A plurality of second pads may be arranged in the second pad area PA2. The second pads may include a second low potential pad PAD2_VSS, a second reference voltage pad PAD2_REF, a second data pad PAD2_DATA, etc., but the embodiments of this specification are not limited thereto.

[0041] The second low potential lead electrode RE2_VSS and the second low potential pad PAD2_VSS may be electrically connected, the second reference voltage lead electrode RE2_REF and the second reference voltage pad PAD2_REF may be electrically connected, and the second data lead electrode RE2_DATA and the second data pad PAD2_DATA may be electrically connected.

[0042] The second low potential lead electrode RE2_VSS, the second reference voltage lead electrode RE2_REF, and the second data lead electrode RE2_DATA may be electrically connected to the data driver DIC, respectively.

[0043] The first low potential pad PAD1_VSS may be electrically connected to the low potential voltage line VSSL, the first reference voltage pad PAD1_REF may be electrically connected to the reference voltage line RL, and the first data pad PAD1_DATA may be electrically connected to the data line DL.

[0044] FIG. 4 is a circuit diagram of a pixel according to an embodiment.

[0045] FIG. 4 shows a circuit diagram of a pixel 20 according to an embodiment, and the circuit diagram of each of the sub-pixels 21, 22, and 23 in FIG. 5 is the same as the circuit diagram of the pixel 20 in FIG.

[0046] Each sub-pixel receives a data voltage VDATA via a digital-to-analog converter (DAC). A sensing voltage VSEN output from each sub-pixel is provided to an analog-to-digital converter (ADC). A high potential voltage EVDD and a low potential voltage EVSS are applied to each sub-pixel.

[0047] Each sub-pixel includes a scan transistor T2, a driving transistor T1, and a sensing transistor T3, and also includes a storage capacitor CST and an organic light emitting element OLED.

[0048] A first electrode (e.g., drain electrode) of the scan transistor T2 is connected to the data line DL and receives the data voltage VDATA. The data voltage VDATA is output from a data driver (see DIC in FIG. 3) and applied to the data line DL via a DAC. A second electrode (e.g., source electrode) of the scan transistor T2 is connected to one end of the storage capacitor CST and to the gate electrode of the drive transistor T1. A gate electrode of the scan transistor T2 is connected to the scan line and receives a scan signal SCAN. That is, when a gate signal of a gate-on level is applied via the scan signal SCAN, the scan transistor T2 is turned on and transfers the data voltage VDATA applied via the data line DL to one end of the storage capacitor CST.

[0049] One end of the storage capacitor CST is connected to the second electrode of the scan transistor T2. The other end of the storage capacitor CST is connected to the second electrode (e.g., drain electrode) of the sensing transistor T3, which is connected to the other end of the storage capacitor CST and the second electrode of the driving transistor T1. The storage capacitor CST can also be charged with a voltage corresponding to the difference between a voltage applied to one end and a reference voltage VREF applied to the other end via the switch SPRE and the sensing transistor T3. The reference voltage VREF is applied to a reference voltage line RL.

[0050] A first electrode (e.g., drain electrode) of the driving transistor T1 is configured to receive a high potential voltage EVDD, and a second electrode (e.g., source electrode) is connected to a first electrode (e.g., anode electrode) of the organic light emitting element OLED. A third electrode (e.g., gate electrode) of the driving transistor T1 is connected to one end of a storage capacitor CST. The driving transistor T1 can control the amount of driving current flowing through the organic light emitting element OLED according to the voltage provided to the gate electrode. That is, the current is determined by the voltage difference Vgs of the driving transistor T1 (or the storage voltage difference of the storage capacitor CST) and applied to the organic light emitting element OLED.

[0051] A first electrode (e.g., a source electrode) of the sensing transistor T3 is connected to the reference voltage line RL, a second electrode (e.g., a drain electrode) is connected to the other end of the storage capacitor CST, and a third electrode (e.g., a gate electrode) is applied with a sensing signal SENSE. That is, the sensing transistor T3 is turned on by the sensing signal SENSE output from the gate driver (see GIP in FIG. 1) and applies the reference voltage VREF to the other end of the storage capacitor CST. When the switches SPRE and SAM are both turned off and the sensing transistor T3 is turned on, the storage voltage of the storage capacitor CST is transferred to the capacitor connected to the reference voltage line RL, and the sensing voltage VSEN is stored in the capacitor of the reference voltage line RL.

[0052] When the switch SPRE is turned off and the switch SAM is turned on, the sensing voltage VSEN is output to the data driver (see DIC in FIG. 3) through the ADC.

[0053] Fig. 5 is a plan view of the pixel of Fig. 1. Fig. 6 is a cross-sectional view taken along line BB' in Fig. 5. Fig. 7 is a cross-sectional view taken along line CC' in Fig. 5.

[0054] 5 to 7, a display device 1 according to an embodiment includes a substrate 2, a first electrode 4, a common light-emitting layer 5, and a cathode electrode 6.

[0055] A plurality of sub-pixels 21, 22, and 23 are formed on the substrate 2. The plurality of sub-pixels 21, 22, and 23 can form one pixel (see 20 in FIG. 1). A plurality of pixels may be formed on the substrate 2.

[0056] The plurality of subpixels 21, 22, 23 include a first subpixel 21, a second subpixel 22, and a third subpixel 23. The first subpixel 21, the second subpixel 22, and the third subpixel 23 are arranged in order, such that the second subpixel 22 may be disposed adjacent to one side, for example, the left side, of the first subpixel 21, and the third subpixel 23 may be disposed adjacent to one side, for example, the left side, of the second subpixel 22.

[0057] Throughout this specification, when two subpixels are disposed adjacent to each other, it should be interpreted as meaning that there is no other subpixel disposed between the two subpixels.

[0058] The first sub-pixel 21 may be configured to emit red (R) light, the second sub-pixel 22 may be configured to emit green (G) light, and the third sub-pixel 23 may be configured to emit blue (B) light, but this is not necessarily limited to this.

[0059] 5, the pixel is illustrated as including only three sub-pixels 21, 22, and 23, but is not limited thereto, and the pixel may include four sub-pixels. When the pixel includes four sub-pixels, it may further include a fourth sub-pixel configured to emit white (W) light.

[0060] The first to third sub-pixels 21, 22, and 23 may be provided to have the same size. For example, the first to third sub-pixels 21, 22, and 23 may be provided to have the same width and height. Here, the width may refer to the horizontal direction (first direction DR1) based on FIG. 1, and the height may refer to the direction perpendicular to the width (second direction DR2) based on FIG. 1, but the embodiments of the present specification are not limited thereto.

[0061] Each of the sub-pixels 21, 22, and 23 may include a light-emitting region EA1, EA2, or EA3 and a non-light-emitting region NEA1, NEA2, or NEA3. The first sub-pixel 21 may include a first light-emitting region EA1 and a first non-light-emitting region NEA1 surrounding the first light-emitting region EA1. The second sub-pixel 22 may include a second light-emitting region EA2 and a second non-light-emitting region NEA2 surrounding the second light-emitting region EA2. The third sub-pixel 23 may include a third light-emitting region EA3 and a third non-light-emitting region NEA3 surrounding the third light-emitting region EA3. The light-emitting regions EA1, EA2, and EA3 may be the same as the regions of the anode electrodes 41a, 41b, and 41c exposed from the banks BK (described later), but the embodiments of the present specification are not limited thereto.

[0062] The first electrode 4 is patterned for each of the subpixels 21, 22, and 23. That is, one first electrode 4 is formed in the first subpixel 21, another first electrode 4 is formed in the second subpixel 22, and yet another first electrode 4 is formed in the third subpixel 23. The first electrode 4 can function as a positive electrode of the display device 1. The first electrode 4 may include a reflective electrode and an anode electrode. The anode electrode 41 and the reflective electrode 42 may be disposed for each of the subpixels 21, 22, and 23. The anode electrode 41 may include a first anode electrode 41a disposed in the first subpixel 21, a second anode electrode 41b disposed in the second subpixel 22, and a third anode electrode 41c disposed in the third subpixel 23. The reflective electrode 42 may include a first reflective electrode 42a disposed in the first subpixel 21, a second reflective electrode 42b disposed in the second subpixel 22, and a third reflective electrode 42c disposed in the third subpixel 23.

[0063] A bank BK, which will be described later, may be disposed on each of the anode electrodes 41a, 41b, and 41c. The bank BK is provided so as to cover the edges of the anode electrodes 41a, 41b, and 41c disposed in the first to third sub-pixels 21, 22, and 23, respectively, thereby separating the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23. The bank BK may be disposed in the non-light-emitting areas NEA1, NEA2, and NEA3.

[0064] The display device 1 can further improve the light extraction efficiency by using the microcavity characteristics by providing the reflective electrodes 42a, 42b, and 42c whose surface heights differ for each of the sub-pixels 21, 22, and 23.

[0065] The microcavity characteristic is a characteristic in which, when the distance between the reflective electrodes 42a, 42b, and 42c and the cathode electrode 6 becomes an integer multiple of half the wavelength (λ / 2) of the light emitted from the sub-pixels 21, 22, and 23, constructive interference occurs, amplifying the light, and when the reflection and re-reflection processes are repeated between the reflective electrodes 42a, 42b, and 42c and the cathode electrode 6, the degree of light amplification continues to increase, thereby improving the efficiency of light extraction.

[0066] The common light-emitting layer 5 may be configured to emit white light. For example, the common light-emitting layer 5 may be configured as a two-stack structure including a blue light-emitting layer, a yellow-green light-emitting layer, and a charge generation layer, or as a three-stack structure including a blue light-emitting layer, a green light-emitting layer, a red light-emitting layer, and a charge generation layer to emit white light. However, the common light-emitting layer 5 is not necessarily limited to this, and may be configured as a plurality of layers exceeding three stacks as long as it can emit white light.

[0067] The common light-emitting layer 5 may be formed so as to be provided as a common layer over the entire first to third sub-pixels 21, 22, and 23.

[0068] The cathode electrode 6 is for forming an electric field together with the anode electrodes 41a, 41b, and 41c, and can function as a negative electrode. The cathode electrode 6 is disposed on the upper surface of the common light-emitting layer 5 opposite to the lower surface of the common light-emitting layer 5 with which the anode electrodes 41a, 41b, and 41c are in contact, and may be provided as a common layer across the first to third sub-pixels 21, 22, and 23.

[0069] The cathode electrode 6 may be provided as a second electrode in the case of a top emission type, or as a first electrode containing a reflective material in the case of a bottom emission type. In the case of a top emission type, the cathode electrode 6 may be formed as a semi-transparent electrode to enhance light extraction efficiency using the microcavity characteristics. The display device 1 will be described using an example in which the cathode electrode 6 is formed as a semi-transparent electrode to enhance light extraction efficiency using the microcavity characteristics in a top emission type.

[0070] The color filter layer 9 is provided in each of the first to third sub-pixels 21, 22, and 23, and serves to block specific colors from the light emitted from the common light-emitting layer 5 of each of the sub-pixels 21, 22, and 23. The first color filter 91 provided in the first sub-pixel 21 may be provided to block light of colors other than red (R) light. In this case, the first color filter 91 may be provided as a red color filter. The second color filter 92 provided in the second sub-pixel 22 may be provided to block light of colors other than green (G) light. In this case, the second color filter 92 may be provided as a green color filter. The third color filter 93 provided in the third sub-pixel 23 may be provided to block light of colors other than blue (B) light. In this case, the third color filter 93 may be provided as a blue color filter. However, the embodiments of the present specification are not limited thereto.

[0071] The first to third color filters 91, 92, and 93 provided for the first to third sub-pixels 21, 22, and 23, respectively, may be provided to have the same size as the sub-pixel, or may be provided to be reduced or enlarged at a certain rate relative to the size of the sub-pixel.

[0072] Transistors 31, 32, and 33 may be arranged in the non-light-emitting areas NEA1, NEA2, and NEA3 of the subpixels 21, 22, and 23. For example, the transistors 31, 32, and 33 may overlap with the reflective electrodes 42a, 42b, and 42c arranged in the subpixels 21, 22, and 23. The transistors 31, 32, and 33 may be electrically connected to the reflective electrodes 42a, 42b, and 42c, respectively.

[0073] The laminated structure of the display device 1 according to one embodiment will be described in detail below.

[0074] A display device 1 according to one embodiment includes a substrate 2, an insulating layer 3, a first electrode 4, a bank BK, a common light-emitting layer 5, a cathode electrode 6, a capping layer 7, a sealing layer 8, and a color filter layer 9.

[0075] The substrate 2 may be a plastic film, a glass substrate, or a semiconductor substrate such as silicon.

[0076] The substrate 2 may be made of a transparent or opaque material. A first sub-pixel 21, a second sub-pixel 22, and a third sub-pixel 23 are provided on the substrate 2. The first sub-pixel 21 may be configured to emit red (R) light, the second sub-pixel 22 may be configured to emit blue (B) light, and the third sub-pixel 23 may be configured to emit green (G) light.

[0077] The display device 1 according to the embodiment is a so-called top emission type in which emitted light is emitted from above, and therefore, not only transparent materials but also opaque materials may be used as the material of the substrate 2. Color filters 91, 92, and 93 may be provided on the upper sides of the first to third sub-pixels 21, 22, and 23 from which the light is emitted, respectively, to transmit light of the above colors.

[0078] The insulating layer 3 is formed on the substrate 2. The insulating layer 3 may include an inorganic insulating material. The insulating layer 3 may include a first insulating layer 3a, a second insulating layer 3b on the first insulating layer 3a, and a third insulating layer 3c on the second insulating layer 3b.

[0079] A plurality of thin film transistors 31, 32, and 33, various signal wirings, and circuit elements including capacitors are provided for each of the sub-pixels 21, 22, and 23 within the insulating layer 3. The thin film transistors 31, 32, and 33 may be disposed within the first insulating layer 3a. The signal wirings may include gate lines, data lines, power supply lines, and reference voltage lines, and the thin film transistors 31, 32, and 33 may include switching transistors, driving transistors, and sensing transistors. Each of the sub-pixels 21, 22, and 23 is defined by the intersection of the gate lines and the data lines. The insulating layer 3 may surround the thin film transistors 31, 32, and 33.

[0080] The switching transistor is switched by a gate signal supplied to the gate line, and serves to supply a data voltage supplied from the data line to the driving transistor.

[0081] The driving transistor is switched by the data voltage supplied from the switching transistor, and serves to generate a data current from the power source supplied from the power line and supply the data current to the first electrode 4 .

[0082] The sensing transistor serves to sense the threshold voltage deviation of the driving transistor, which may cause image quality degradation, and supplies the current of the driving transistor to the reference voltage line in response to a sensing control signal supplied from the gate line or a separate sensing line.

[0083] The capacitor serves to maintain the data voltage supplied to the driving transistor for one frame, and is connected to the gate terminal and the source terminal of the driving transistor, respectively.

[0084] A first thin film transistor 31, a second thin film transistor 32, and a third thin film transistor 33 are disposed in the first insulating layer 3a for each of the sub-pixels 21, 22, and 23. The first thin film transistor 31 is connected to a first electrode 4 disposed on the first sub-pixel 21, and can apply a driving voltage to the first sub-pixel 21 to emit light of a color corresponding to the first sub-pixel 21. The first thin film transistor 31, the second thin film transistor 32, and the third thin film transistor 33 may be located in the same thin film transistor layer, although the embodiment herein is not limited thereto.

[0085] The second thin film transistor 32 is connected to the first electrode 4 disposed on the second sub-pixel 22, and can apply a driving voltage to the second sub-pixel 22 to make it emit light of a color corresponding to the second sub-pixel 22.

[0086] The third thin film transistor 33 is connected to the first electrode 4 disposed on the third sub-pixel 23, and can apply a driving voltage to the third sub-pixel 23 to make it emit light of a color corresponding to the third sub-pixel 23.

[0087] When a gate signal (or a scan signal) is input from a gate line (or a scan line) to each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23, the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 supply a predetermined current to the light-emitting layer in response to the data voltage of the data line using the respective transistors 31, 32, and 33. This allows the light-emitting layer of each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 to emit light at a predetermined brightness in response to the predetermined current.

[0088] The insulating layer 3 can protect the transistors 31, 32, and 33. The insulating layer 3 may be made of an inorganic insulator, but is not necessarily limited thereto, and may also be made of an organic insulator. For example, the insulating layer 3 may be made of an inorganic material such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (Al2O3), but the embodiments of the present specification are not limited thereto. The first insulating layer 3a, the second insulating layer 3b, and the third insulating layer 3c may be made of an inorganic material such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (Al2O3), but the embodiments of the present specification are not limited thereto.

[0089] A plurality of reflective electrode layers may be disposed on the insulating layer 3. The reflective electrode layers may include a first reflective electrode layer on the first insulating layer 3a, a second reflective electrode layer on the second insulating layer 3b, and a third reflective electrode layer on the third insulating layer 3c. The first reflective electrode layer may include a first reflective electrode 42a and a first connecting electrode 42a', the second reflective electrode layer may include a second reflective electrode 42b, and the third reflective electrode layer may include a third reflective electrode 42c and a second connecting electrode 42c'. The first reflective electrode 42a and the first connecting electrode 42a' may be disposed in the same layer and may contain the same material. The third reflective electrode 42c and the second connecting electrode 42c' may be disposed in the same layer and may contain the same material.

[0090] Each reflective electrode layer may include a reflective material for reflecting light. For example, the reflective material may be a metal, but is not limited thereto, and may be any other material capable of reflecting light. For example, the reflective material may include aluminum (Al) or silver (Ag), but the embodiments of the present specification are not limited thereto.

[0091] The reflective electrode 42 is disposed at a position relatively lower than the common light-emitting layer 5 that emits light, and can therefore reflect light emitted from the common light-emitting layer 5 upward. Here, "upward" refers to the direction in which a user can perceive light, and may refer to, for example, the side on which the encapsulation layer 8 or the color filter layer 9 is disposed. As a result, the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 have improved light efficiency compared to when the reflective electrode 42 is not provided, and the user can perceive a brighter, i.e., a clearer, image through the improved light efficiency.

[0092] In the first light-emitting area EA1 and the first non-light-emitting area NEA1 of the first sub-pixel 21, the first reflective electrode 42a may be disposed on the first insulating layer 3a, in the second light-emitting area EA2 and the second non-light-emitting area NEA2 of the second sub-pixel 22, the second reflective electrode 42b may be disposed on the first insulating layer 3a, and in the third light-emitting area EA3 and the third non-light-emitting area NEA3 of the third sub-pixel 23, the third reflective electrode 42c may be disposed on the first insulating layer 3a. In each of the non-light-emitting areas NEA1, NEA2, and NEA3, the first reflective electrode 42a and the first connecting electrode 42a′ may be electrically connected to each of the transistors 31, 32, and 33.

[0093] A second insulating layer 3b may be disposed on the first reflective electrode 42a and the first connecting electrode 42a'. The second insulating layer 3b may reflect the step caused by the thickness of the first reflective electrode 42a and the first connecting electrode 42a'.

[0094] A second reflective electrode 42b may be disposed on the second insulating layer 3b. The second reflective electrode 42b may be disposed in the second sub-pixel 22. The second reflective electrode 42b does not need to overlap with the second transistor 32.

[0095] A third insulating layer 3c may be disposed on the second reflective electrode 42b, and the third insulating layer 3c may reflect the step caused by the thickness of the second reflective electrode 42b.

[0096] A third reflective electrode 42c and a second connection electrode 42c' may be disposed on the third insulating layer 3c. The third reflective electrode 42c may be disposed in the third sub-pixel 23, and the second connection electrode 42c' may be disposed in the first and second sub-pixels 21 and 22, respectively. The third reflective electrode 42c may be connected to the first connection electrode 42a' in the third non-emitting area NEA3 of the third sub-pixel 23 via a first contact hole CT1. The second connection electrode 42c' may be connected to the first reflective electrode 42a and the first connection electrode 42a' in the non-emitting areas NEA1 and NEA2, respectively, via a first contact hole CT1. The second reflective electrode 42b may be in a floating state.

[0097] A trench portion TRP may be formed in the insulating layer 3. For example, the trench portion TRP may be formed in the non-light-emitting areas NEA1, NEA2, and NEA3. As shown in FIGS. 6 and 7, the trench portion TRP may be formed to penetrate a portion of the third insulating layer 3c and the second insulating layer 3b, but the embodiment of the present specification is not limited thereto. According to the display device 1 according to one embodiment, the trench portion TRP is formed between the adjacent sub-pixels 21, 22, and 23, thereby improving lateral leakage current (LLC) due to the common light-emitting layer 5 between the adjacent sub-pixels 21, 22, and 23.

[0098] 6, in the light-emitting areas EA1, EA2, and EA3, the distances between the reflective electrodes 42a, 42b, and 42c and the cathode electrode 6 may be different from one another. For example, the distance between the first reflective electrode 42a and the cathode electrode 6 may be the largest, the distance between the second reflective electrode 42b and the cathode electrode 6 may be the next largest, and the distance between the third reflective electrode 42c and the cathode electrode 6 may be the smallest.

[0099] The reason why the reflective electrodes 42a, 42b, and 42c are formed to have various separation distances (or resonance distances) from the cathode electrode 6 is that the light extraction efficiency of different colors can be improved through reflection and re-reflection between the reflective electrodes 42a, 42b, and 42c and the cathode electrode 6 according to the separation distance. Therefore, the light extraction efficiency of red light can be improved in the first sub-pixel 21, the light extraction efficiency of green light can be improved in the second sub-pixel 22, and the light extraction efficiency of blue light can be improved in the third sub-pixel 23.

[0100] The anode electrode 41 may include a first anode electrode 41a of the first sub-pixel 21, a second anode electrode 41b of the second sub-pixel 22, and a third anode electrode 41c of the third sub-pixel 23. The anode electrodes 41a, 41b, and 41c are disposed in the anode electrode layer, and may be disposed in the same layer and made of the same material.

[0101] In the third light-emitting area EA3 of the third sub-pixel 23, the third anode electrode 41c may be disposed directly on the third reflective electrode 42c. In the non-light-emitting areas NEA1 and NEA2 of the first and second sub-pixels 21 and 22, the anode electrodes 41a and 41b may be disposed directly on the second connecting electrode 42c'.

[0102] The anode electrodes 41a, 41b, and 41c may be electrically connected to the thin film transistors 31, 32, and 33 in the non-light-emitting areas NEA1, NEA2, and NEA3, respectively.

[0103] The anode electrodes 41a, 41b, and 41c may include a material with high light transmittance, such as, but not limited to, ITO, IZO, or TiN.

[0104] Banks BK may be disposed on the anode electrodes 41a, 41b, and 41c. The banks BK may be made of an inorganic material such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (Al2O3), but the embodiments of the present specification are not limited thereto. The banks BK may be disposed on the non-light-emitting areas NEA1, NEA2, and NEA3.

[0105] In the light-emitting areas EA1, EA2, and EA3, the bank BK may expose the top surfaces of the anode electrodes 41a, 41b, and 41c to define the light-emitting areas EA1, EA2, and EA3. As shown in Fig. 6, the bank BK may contact the top surfaces and side surfaces of the anode electrodes 41a, 41b, and 41c. As shown in Fig. 7, in the non-light-emitting areas NEA1, NEA2, and NEA3, the bank BK may cover the entire top surfaces of the anode electrodes 41a, 41b, and 41c, and in the light-emitting areas EA1, EA2, and EA3, the bank BK may expose the top surfaces of the anode electrodes 41a, 41b, and 41c.

[0106] The common light-emitting layer 5 is formed on the anode electrodes 41a, 41b, and 41c and the bank BK. The common light-emitting layer 5 can be in contact with the upper surfaces of the anode electrodes 41a, 41b, and 41c. The common light-emitting layer 5 can be in direct contact with the upper surfaces of the anode electrodes 41a, 41b, and 41c, the upper surface and side surfaces of the bank BK, and the upper surface of the insulating layer 3. The common light-emitting layer 5 may also be disposed to extend into the trench portion TRP.

[0107] An organic light emitting device OLED according to one embodiment may include a first electrode 4 (ANO), a cathode electrode 6 (CAT), and a common light emitting layer 5 between the first electrode 4 and the cathode electrode 6.

[0108] The common light-emitting layer 5 may be configured to emit white (W) light. To this end, the common light-emitting layer 5 may include a plurality of stacks emitting light of different colors. Specifically, the common light-emitting layer 5 may include a first stack, a second stack, and a charge generation layer (CGL) provided between the first stack and the second stack.

[0109] The cathode electrode 6 is formed on the common light-emitting layer 5. The cathode electrode 6 can function as a negative electrode (Cathode) of the display device 1. The cathode electrode 6 is formed on each of the sub-pixels 21, 22, 23 and between them, as well as on the common light-emitting layer 5.

[0110] In the display device 1 according to an embodiment, the cathode electrode 6 may be made of a semi-transparent electrode to realize high-efficiency white light in a top-emission system. This allows a microcavity effect to be obtained for each of the first to third sub-pixels 21, 22, and 23. The microcavity effect can be obtained by repeating reflection and re-reflection of light between the cathode electrode 6 and the reflective electrode 42, thereby improving light extraction efficiency.

[0111] On the other hand, the cathode electrode 6 is formed on the upper surface of the common light-emitting layer 5, and therefore can be formed to follow the profile of the common light-emitting layer 5. The common light-emitting layer 5 is formed in the light-emitting region to follow the profile of the first electrode 4, and therefore the cathode electrode 6 can be formed to follow the profile of the first electrode 4. In addition, the capping layer 7 on the cathode electrode 6 can also be formed to follow the profile of the cathode electrode 6.

[0112] The capping layer 7 may be made of, but is not limited to, an inorganic insulating material. The capping layer 7 is disposed on the cathode electrode 6 and can protect the organic light emitting element OLED.

[0113] The sealing layer 8 is formed on the cathode electrode 6 and serves to prevent external moisture from penetrating into the common light-emitting layer 5. The sealing layer 8 may be made of an inorganic insulator or may have a structure in which inorganic and organic insulators are alternately stacked, but is not necessarily limited thereto.

[0114] The color filter layer 9 is formed on the sealing layer 8. The color filter layer 9 may include a first red (R) color filter 91 provided in the first sub-pixel 21, a second green (G) color filter 92 provided in the second sub-pixel 22, and a third blue (B) color filter 93 provided in the third sub-pixel 23, but is not necessarily limited to this.

[0115] Fig. 8 is a cross-sectional view of the organic light-emitting device according to Fig. 6. Fig. 9 is a cross-sectional view of an organic light-emitting device according to a modified example of Fig. 6.

[0116] 1 to 8, the common light-emitting layer 5 may comprise a first stack EL1, a second stack EL2, and a first charge generation layer CGL1 disposed on the first electrode 4.

[0117] The first stack EL1 is provided on the first electrode 4, and may have a structure in which a hole injection layer HIL (Hole Injecting Layer), a hole transport layer HTL (Hole Transporting Layer), a blue (B) emitting layer (Emitting Layer: EML1), and an electron transport layer ETL (Electron Transporting Layer) are stacked in this order.

[0118] The first stack EL1 may also be disposed between the first subpixel 21 and the second subpixel 22, and between the second subpixel 22 and the third subpixel .

[0119] The first charge generation layer CGL1 serves to supply charges to the first stack EL1 and the second stack EL2. The first charge generation layer CGL1 may include an N-type charge generation layer for supplying electrons to the first stack EL1 and a P-type charge generation layer for supplying holes to the second stack EL2. The N-type charge generation layer may include a metal material as a dopant.

[0120] The second stack EL2 is provided on the first stack EL1 and may have a structure in which a hole transport layer HTL, a yellow green (YG) emitting layer (EML2), an electron transport layer ETL, and an electron injection layer EIL (Electron Injecting Layer) are stacked in order.

[0121] The second stack EL2 may also be disposed between the first subpixel 21 and the second subpixel 22, and between the second subpixel 22 and the third subpixel .

[0122] As a result, the common light-emitting layer 5 may be provided as a common layer across the first to third sub-pixels 21, 22, and 23, as shown in FIGS.

[0123] As shown in FIG. 9, the common light-emitting layer 5′ of the organic light-emitting element OLED according to one embodiment may include a first stack EL1, a second stack EL2, and a third stack EL3 provided on the first electrode 4, a first charge generation layer CGL1 between the first stack EL1 and the second stack EL2, and a second charge generation layer CGL2 between the second stack EL2 and the third stack EL3.

[0124] The first stack EL1 is provided on the first electrode 4, and may have a structure in which a hole injection layer HIL (Hole Injecting Layer), a hole transport layer HTL (Hole Transporting Layer), a blue (Blue: B) emitting layer EML1 (Emitting Layer), and an electron transport layer ETL (Electron Transporting Layer) are stacked in this order.

[0125] The first stack EL1 may also be disposed between the first subpixel 21 and the second subpixel 22, and between the second subpixel 22 and the third subpixel 23, that is, on the bank BK.

[0126] The first charge generation layer CGL1 serves to supply charges to the first stack EL1 and the second stack EL2. The first charge generation layer CGL1 may include an N-type charge generation layer for supplying electrons to the first stack EL1 and a P-type charge generation layer for supplying holes to the second stack EL2. The N-type charge generation layer may include a metal material as a dopant.

[0127] The second stack EL2 is provided on the first stack EL1, and may have a structure in which a hole transport layer HTL, a green (Green: G) light-emitting layer EML2 (Emitting Layer), and an electron transport layer ETL are stacked in this order.

[0128] The second stack EL2 may also be disposed between the first subpixel 21 and the second subpixel 22, and between the second subpixel 22 and the third subpixel 23, that is, on the bank BK.

[0129] The second charge generation layer CGL2 serves to supply charges to the second stack EL2 and the third stack EL3. The second charge generation layer CGL2 may include an N-type charge generation layer for supplying electrons to the second stack EL2 and a P-type charge generation layer for supplying holes to the third stack EL3. The N-type charge generation layer may include a metal material as a dopant.

[0130] The third stack EL3 is provided on the second stack EL2 and may have a structure in which a hole transport layer HTL, a red (Red:R) emitting layer EML3 (Emitting Layer), an electron transport layer ETL, and an electron injection layer EIL (Electron Injecting Layer) are stacked in this order.

[0131] As shown in FIGS. 1 to 9 , the charge generation layers CGL1 and CGL2 may also be disposed between the first subpixel 21 and the second subpixel 22 and between the second subpixel 22 and the third subpixel 23. Meanwhile, in the display device 1 according to an embodiment, the common light-emitting layer 5 is also disposed between the subpixels 21, 22, and 23. Therefore, when a subpixel emits light, side leakage current may occur through the charge generation layers CGL1 and CGL2 to the adjacent subpixels 21, 22, and 23. However, trench portions TRP may be formed between the subpixels 21, 22, and 23. The trench portions TRP increase the length of the common light-emitting layer 5 at the boundary between the subpixels 21, 22, and 23, thereby lengthening the current path. This prevents side leakage current from occurring. Furthermore, the common light-emitting layer 5 can be separated from the trench portions TRP, thereby preventing side leakage current from occurring.

[0132] Referring again to Figures 6 and 7, the cathode electrode 6 is formed on the common light-emitting layer 5, the sealing layer 8 is formed on the cathode electrode 6, and the color filter layer 9 is formed on the sealing layer 8.

[0133] Although not shown, a black matrix may be provided between the first to third color filters 91, 92, and 93 to prevent color mixture between the sub-pixels.

[0134] According to the display device 1 of one embodiment, the second reflective conductive layer does not need to be disposed in the region overlapping the contact portion (transistors 31, 32, and 33 in FIG. 7 ). That is, the second reflective electrode 42b does not need to be disposed in the contact portion. This allows the anode electrodes 41a, 41b, and 41c of the subpixels 21, 22, and 23 to be connected to the transistors 31, 32, and 33 via the third reflective conductive layer and the first reflective conductive layer. That is, the number of conductive layers (or electrodes) in the contact portion connected to the transistors 31, 32, and 33 can be reduced (the second reflective conductive layer can be omitted), and the step in the contact portion can be alleviated. This minimizes the thickness deviation of the common light-emitting layer 5 in the contact portion. For example, if three or more reflective conductive layers are disposed in the contact portion, the insulating layer 3 reflects the step caused by the thickness of the conductive layer (or electrode) disposed underneath, so the common light-emitting layer 5 may have a thickness deviation in the contact portion. In this case, a deviation may occur between the color emitted by the common light-emitting layer 5 on the contact portions of the non-light-emitting areas NEA1, NEA2, and NEA3 and the color emitted by the common light-emitting layer 5 of the light-emitting areas EA1, EA2, and EA3. Of course, although banks BK are arranged in the non-light-emitting areas NEA1, NEA2, and NEA3, some light may still pass through the banks BK. This may reduce the color purity of the sub-pixels 21, 22, and 23 when viewed from the outside, and may reduce the luminous efficiency of the organic light-emitting element OLED.

[0135] However, according to one embodiment, since the step at the contact portion is reduced, there are advantages in that the light emitting efficiency of the organic light emitting device OLED can be improved and abnormal color deviation can be minimized.

[0136] In addition, as shown in Figure 7, the number of conductive layers (or electrodes) on the contact parts that overlap with transistors 31, 32, and 33 can be reduced, and the number of contact holes can be reduced, which has the advantage of allowing the area of ​​the light-emitting regions EA1, EA2, and EA3 to be expanded.

[0137] Display devices according to other embodiments will be described below. In the following description of the embodiments, detailed and overlapping descriptions of configurations that are the same as or similar to those described with reference to FIGS. 1 to 9 will be omitted.

[0138] FIG. 10 is a plan view of a pixel according to another embodiment.

[0139] Referring to Figure 10, the display device 1_1 of this embodiment differs from the display device 1 of Figure 5 in that a fixed voltage is applied to the second reflective electrode 42b_1 of the reflective electrode 42_1 in the first electrode 4_1 of the second subpixel 22.

[0140] More specifically, a low-potential voltage line VSSL may be disposed in the non-display area NDA of the substrate 2 according to this embodiment. The second reflective electrode 42b_1 of the second sub-pixel 22 may be electrically connected to the low-potential voltage line VSSL via a second contact hole CT2. The arrangement of the sub-pixels 21, 22, and 23 according to this embodiment may be repeated along the second direction DR2. For example, the second reflective electrode 42b_1 of the second sub-pixel 22 located in the first row of FIG. 10 may be physically connected to the second reflective electrode 42b_1 of the second sub-pixel 22 located in the second row. That is, a low-potential voltage (see EVSS in FIG. 4) may be provided to the second reflective electrodes 42b_1 of all second sub-pixels 22 according to this embodiment.

[0141] In some embodiments, the second reflective electrode 42b_1 of the second subpixel 22 may be connected to a reference voltage line (see RL in FIG. 4), so that a reference voltage (VREF in FIG. 4) may be applied to the second reflective electrode 42b_1.

[0142] According to this embodiment, a fixed voltage (EVSS or VREF) is applied to the second reflective electrode 42b_1, which has the advantage of stabilizing the voltage of the second reflective electrode 42b_1 and preventing operational problems of the organic light-emitting element (see OLED in Figure 4) in advance.

[0143] Fig. 11 is a plan view of a pixel according to another embodiment, and Fig. 12 is a cross-sectional view taken along line DD' in Fig. 11.

[0144] 11 and 12, a first electrode 4_2 of a display device 1_2 according to this embodiment differs from the display device 1 according to FIGS. 5 and 7 in that it includes a reflective electrode 42_2.

[0145] More specifically, the reflective electrode 42_2 may include a second reflective electrode 42b_2, and the second reflective electrode 42b_2 may overlap the first connecting electrode 42a'_1 in the second sub-pixel 22. The area of ​​the second non-emitting area NEA2 of the second sub-pixel 22 may be larger than the area of ​​the second non-emitting area NEA2 in FIGS.

[0146] In the second sub-pixel 22, the first connection electrode 42a'_1 may be electrically connected to the second reflective electrode 42b_2 through a third contact hole CT3. A bank BK may cover the second reflective electrode 42b_2.

[0147] According to this embodiment, the second reflective electrode 42b_2 is electrically connected to the first connection electrode 42a'_1, which has the advantage of stabilizing the voltage of the second reflective electrode 42b_2 and preventing operational problems of the organic light emitting element OLED_2 in advance.

[0148] Fig. 13 is a plan view of a pixel according to another embodiment, and Fig. 14 is a cross-sectional view taken along line EE' in Fig. 13.

[0149] Referring to Figures 13 and 14, the anode electrodes 41a, 41b, 41c of each sub-pixel 21, 22, 23 of the display device 1_3 of this embodiment differ from the display device 1_2 of Figures 11 and 12 in that they are directly connected to the first reflective electrode 42a or the first connection electrodes 42a'_1, 42a'.

[0150] More specifically, in the first sub-pixel 21, the second connection electrode may be omitted, and the first anode electrode 41a may be directly connected to the first reflective electrode 42a through the first contact hole CT1, in the second sub-pixel 22, the third connection electrode may be omitted, and the second anode electrode 41b may be directly connected to the first connection electrode 42a'_1 through the first contact hole CT1, and the second reflective electrode 42b_2 may be directly connected to the first connection electrode 42a'_1 through the third contact hole CT3, and in the third sub-pixel 23, the third reflective electrode 42c may be directly connected to the first connection electrode 42a'1 through the first contact hole CT1.

[0151] According to the display device 1_3 of the embodiment, the second reflective conductive layer does not need to be disposed in the region overlapping with the contact portion (the transistors 31, 32, and 33 in FIG. 14 ). That is, the second reflective electrode 42b_2 does not need to be disposed in the contact portion. This allows the anode electrodes 41a, 41b, and 41c of the subpixels 21, 22, and 23 to be connected to the transistors 31, 32, and 33 via the first reflective conductive layer. That is, the number of conductive layers (or electrodes) in the contact portion connected to the transistors 31, 32, and 33 can be reduced (the second reflective conductive layer can be omitted), and the step in the contact portion can be alleviated. This minimizes the thickness deviation of the common light-emitting layer 5 in the contact portion. Furthermore, since the step in the contact portion is alleviated, there are advantages in that the luminous efficiency of the organic light-emitting element OLED_2 is improved and abnormal color deviation can be minimized.

[0152] Other details have already been explained with reference to FIGS. 11 and 12, so they will not be explained again below.

[0153] FIG. 15 is a cross-sectional view of a display device according to another embodiment.

[0154] Referring to Figure 15, the display device 1_4 of this embodiment differs from the display device 1_3 of Figure 14 in that the second reflective electrode 42b of the second sub-pixel 22 is maintained in a floating state and the third contact hole CT3 can be omitted.

[0155] In some embodiments, the second reflective electrode 42b of the second sub-pixel 22 is connected to the low potential voltage line VSSL as shown in FIG. 10, and the third contact hole CT3 can be omitted.

[0156] Other details have already been explained with reference to FIG. 14, so they will not be explained again below.

[0157] FIG. 16 is a cross-sectional view of a display device according to another embodiment.

[0158] Referring to FIG. 16, a display device 1_5 according to this embodiment differs from the display device 1 according to FIG. 6 in that it includes a common light-emitting layer 5_1.

[0159] More specifically, the common light-emitting layer 5_1 may be physically separated at the boundaries between adjacent sub-pixels 21, 22, 23.

[0160] For example, the common light-emitting layer 5_1 can be physically separated into non-light-emitting regions NEA1, NEA2, and NEA3. The common light-emitting layer 5_1 can be physically separated into non-light-emitting regions NEA1, NEA2, and NEA3 by trench portions TRP.

[0161] For example, the common light-emitting layer 5_1 can be divided into a portion arranged on the side surface of the insulating layer 3 of the non-light-emitting regions NEA1, NEA2, and NEA3 and the side surface of the bank BK, and a portion arranged on the upper surface of the insulating layer 3 where the trench portion TRP of the non-light-emitting regions NEA1, NEA2, and NEA3 is formed. The portions arranged on the side surface of the insulating layer 3 of the non-light-emitting regions NEA1, NEA2, and NEA3 and the side surface of the bank BK and the portion arranged on the upper surface of the insulating layer 3 where the trench portion TRP is formed can be physically separated.

[0162] According to the display device 1_5 of this embodiment, the common light-emitting layer 5_1 can be physically separated between adjacent sub-pixels 21, 22, and 23, and the common light-emitting layer 5_1 can be physically separated at the same level in each of the non-light-emitting areas NEA1, NEA2, and NEA3, thereby improving lateral leakage current (LLC) caused by the common light-emitting layer 5_1.

[0163] Other details have already been explained with reference to FIG. 6, so they will not be explained again below.

[0164] The display device according to various embodiments of the present disclosure can be described as follows.

[0165] a first conductive layer on the substrate, the first conductive layer including a first reflective electrode in the emissive region and the non-emissive region of the first subpixel, and a first connection electrode in the non-emissive region of the second and third subpixels; a second conductive layer on the first conductive layer, the second reflective electrode in the emissive region of the second subpixel; a third conductive layer on the second conductive layer, the third reflective electrode in the emissive region and the non-emissive region of the third subpixel, and a second connection electrode in the non-emissive region of the first and second subpixels; and anode electrodes disposed on the third conductive layer in the first to third subpixels, wherein the second connection electrode is connected to the first reflective electrode in the non-emissive region of the first subpixel, the second connection electrode is connected to the first connection electrode in the non-emissive region of the second subpixel, and the third reflective electrode is connected to the first connection electrode in the non-emissive region of the third subpixel.

[0166] In various embodiments of the display device herein, the second connection electrode may be directly connected to the first reflective electrode in the non-light-emitting region of the first subpixel, and the second connection electrode may be directly connected to the first connection electrode in the non-light-emitting region of the second subpixel.

[0167] In the display device according to various embodiments of the present specification, the third reflective electrode may be directly connected to the first connection electrode in the non-light-emitting region of the third sub-pixel.

[0168] In the display device according to various embodiments of the present specification, the anode electrode may be disposed directly on the second connection electrode in the non-light-emitting regions of the first sub-pixel and the second sub-pixel.

[0169] In the display device according to various embodiments of the present disclosure, the anode electrode may be disposed directly on the third reflective electrode in the light-emitting region and the non-light-emitting region of the third sub-pixel.

[0170] In the display device according to various embodiments of the present disclosure, the second reflective electrode may be floating.

[0171] In the display device according to various embodiments of the present specification, a fixed voltage may be applied to the second reflective electrode.

[0172] A display device according to various embodiments of the present specification may include a display region in which the first to third sub-pixels are arranged, and a non-display region surrounding the display region, and may further include a low-potential voltage line arranged in the non-display region, and the second reflective electrode may be electrically connected to the low-potential voltage line.

[0173] In the display devices according to various embodiments of the present specification, the first to third sub-pixels may be arranged along a first direction, the first to third sub-pixels may be repeatedly arranged along a second direction intersecting the first direction, and adjacent second sub-pixels in the second direction may share the second reflective electrode.

[0174] In the display device according to various embodiments of the present specification, the second reflective electrode may not overlap with the first connection electrode and the second connection electrode.

[0175] In the display device according to various embodiments herein, the second reflective electrode may overlap the first connection electrode in the second sub-pixel.

[0176] In the display device according to various embodiments of the present specification, the second reflective electrode may be connected to the first connection electrode.

[0177] A display device according to various embodiments of the present specification includes a substrate including first, second, and third subpixels, each including a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first conductive layer on the substrate, the first conductive layer including a first reflective electrode in the light-emitting region and the non-light-emitting region of the first subpixel and a first connecting electrode in the non-light-emitting region of the second and third subpixels; a second conductive layer on the first conductive layer, the second reflective electrode in the light-emitting region of the second subpixel; a third conductive layer on the second conductive layer, the third reflective electrode in the light-emitting region and the non-light-emitting region of the third subpixel; and anode electrodes disposed on the first to third conductive layers in the first to third subpixels, wherein the anode electrode is directly connected to the first reflective electrode in the non-light-emitting region of the first subpixel, the anode electrode is directly connected to the first connecting electrode in the non-light-emitting region of the second subpixel, and the third reflective electrode is directly connected to the first connecting electrode in the non-light-emitting region of the third subpixel.

[0178] In the display device according to various embodiments of the present disclosure, the anode electrode may be disposed directly on the third reflective electrode in the light-emitting region and the non-light-emitting region of the third sub-pixel.

[0179] In the display device according to various embodiments of the present disclosure, the second reflective electrode may be floating.

[0180] In the display device according to various embodiments of the present specification, a fixed voltage may be applied to the second reflective electrode.

[0181] A display device according to various embodiments of the present specification may include a display region in which the first to third sub-pixels are arranged, and a non-display region surrounding the display region, and may further include a low-potential voltage line arranged in the non-display region, and the second reflective electrode may be electrically connected to the low-potential voltage line.

[0182] In the display devices according to various embodiments of the present specification, the first to third sub-pixels may be arranged along a first direction, the first to third sub-pixels may be repeatedly arranged along a second direction intersecting the first direction, and adjacent second sub-pixels in the second direction may share the second reflective electrode.

[0183] In the display device according to various embodiments of the present specification, the second reflective electrode may not overlap with the first connection electrode and the second connection electrode.

[0184] In the display device according to various embodiments herein, in the second subpixel, the second reflective electrode may overlap the first connecting electrode and be connected to the first connecting electrode.

[0185] Although the embodiments have been described above with reference to the accompanying drawings, it will be understood that those skilled in the art to which this specification pertains may implement the above-described technical configuration in other specific forms without changing the technical spirit or essential features. Therefore, the above-described embodiments should be understood to be illustrative in all respects and not limiting. The scope of the embodiments is defined by the claims below rather than the detailed description. Furthermore, all modifications and variations derived from the meaning and scope of the claims and their equivalents should be construed as being within the scope of the embodiments. [Explanation of symbols]

[0186] 1:Display device 2: Circuit board 3: Insulation layer 4: 1st electrode 5: Common light-emitting layer 6: Cathode electrode 7: Capping layer 8: Sealing layer 9: Color filter layer BK: Bank

Claims

1. a substrate including first, second, and third sub-pixels, each of which includes a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first conductive layer including a first reflective electrode in the light-emitting region and the non-light-emitting region of the first sub-pixel on the substrate, and a first connection electrode in the non-light-emitting region of the second and third sub-pixels; a second conductive layer including a second reflective electrode in the light-emitting region of the second sub-pixel on the first conductive layer; a third conductive layer including a third reflective electrode in the light-emitting region and the non-light-emitting region of the third sub-pixel on the second conductive layer, and a second connection electrode in the non-light-emitting region of the first and second sub-pixels; an anode electrode disposed on the third conductive layer in each of the first to third sub-pixels; the second connection electrode is connected to the first reflective electrode in the non-light-emitting region of the first sub-pixel; the second connection electrode is connected to the first connection electrode in the non-light-emitting region of the second sub-pixel; the third reflective electrode is connected to the first connection electrode in the non-light-emitting region of the third sub-pixel.

2. 2. The display device according to claim 1, wherein in the non-light-emitting region of the first sub-pixel, the second connection electrode is directly connected to the first reflective electrode, and in the non-light-emitting region of the second sub-pixel, the second connection electrode is directly connected to the first connection electrode.

3. The display device according to claim 1 , wherein the third reflective electrode is directly connected to the first connection electrode in the non-light-emitting region of the third sub-pixel.

4. The display device according to claim 1 , wherein the anode electrode is disposed directly on the second connection electrode in the non-light-emitting regions of the first sub-pixel and the second sub-pixel.

5. The display device according to claim 1 , wherein the anode electrode is disposed directly on the third reflective electrode in the light-emitting region and the non-light-emitting region of the third sub-pixel.

6. The display device of claim 1 , wherein the second reflective electrode is floating.

7. The display device according to claim 1 , wherein a fixed voltage is applied to the second reflective electrode.

8. 8. The display device of claim 7, further comprising: a display region in which the first to third sub-pixels are arranged; a non-display region around the display region; and a low-potential voltage line arranged in the non-display region, wherein the second reflective electrode is electrically connected to the low-potential voltage line.

9. 9. The display device according to claim 8, wherein the first to third sub-pixels are arranged along a first direction, the first to third sub-pixels are repeatedly arranged along a second direction intersecting the first direction, and second sub-pixels adjacent to each other in the second direction share the second reflective electrode.

10. The display device according to claim 1 , wherein the second reflective electrode does not overlap the first connection electrode and the second connection electrode.

11. The display device according to claim 1 , wherein the second reflective electrode overlaps the first connecting electrode in the second sub-pixel.

12. The display device according to claim 11 , wherein the second reflective electrode is connected to the first connection electrode.

13. a substrate including first, second, and third sub-pixels, each of which includes a light-emitting region and a non-light-emitting region surrounding the light-emitting region; a first conductive layer including a first reflective electrode in the light-emitting region and the non-light-emitting region of the first sub-pixel on the substrate, and a first connection electrode in the non-light-emitting region of the second and third sub-pixels; a second conductive layer including a second reflective electrode in the light-emitting region of the second sub-pixel on the first conductive layer; a third conductive layer including a third reflective electrode in the light-emitting region and the non-light-emitting region of the third sub-pixel on the second conductive layer; anode electrodes disposed on the first to third conductive layers in the first to third sub-pixels; In a non-light-emitting region of the first sub-pixel, the anode electrode is directly connected to the first reflective electrode; In a non-light-emitting region of the second sub-pixel, the anode electrode is directly connected to the first connection electrode; In the non-light-emitting region of the third sub-pixel, the third reflective electrode is directly connected to the first connection electrode.

14. The display device according to claim 13 , wherein the anode electrode is disposed directly on the third reflective electrode in the light-emitting region and the non-light-emitting region of the third sub-pixel.

15. The display device of claim 13 , wherein the second reflective electrode is floating.

16. The display device according to claim 13 , wherein a fixed voltage is applied to the second reflective electrode.

17. 17. The display device of claim 16, further comprising: a display region in which the first to third sub-pixels are arranged; a non-display region around the display region; and a low-potential voltage line arranged in the non-display region, wherein the second reflective electrode is electrically connected to the low-potential voltage line.

18. 18. The display device of claim 17, wherein the first to third sub-pixels are arranged along a first direction, the first to third sub-pixels are repeatedly arranged along a second direction intersecting the first direction, and second sub-pixels adjacent to each other in the second direction share the second reflective electrode.

19. The display device according to claim 13 , wherein the second reflective electrode does not overlap the first connecting electrode.

20. The display device according to claim 13 , wherein in the second sub-pixel, the second reflective electrode overlaps the first connecting electrode and is connected to the first connecting electrode.

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