Encoding device, decoding device, and bitstream generating device

Abstract

Simplify processing and reduce processing delays. [Solution] A coding device (100) includes a circuit and a memory connected to the circuit, and when a limit on the number of times that context adaptive coding processes are performed allows multiple coefficient information flags to be context adaptively coded together, the circuit codes the multiple coefficient information flags using context adaptive coding and codes the residual values ​​of the coefficients using Golomb-Rice coding, and when the limit on the number of times that context adaptive coding processes are performed does not allow multiple coefficient information flags to be context adaptively coded together, the circuit skips coding the multiple coefficient information flags and codes the coefficient values ​​using Golomb-Rice coding, and when orthogonal transform is skipped, the circuit codes multiple absolute value flags using context adaptive coding, and when orthogonal transform is skipped, the multiple coefficient information flags include a flag indicating whether the coefficient is a positive value or a negative value.

Description

[Technical Field]

[0001] The present disclosure relates to video coding, such as systems, components, and methods for encoding and decoding moving images. [Background technology]

[0002] Video coding technology has progressed from H.261 and MPEG-1 to H.264 / AVC (Advanced Video Coding), MPEG-LA, H.265 / HEVC (High Efficiency Video Coding), and H.266 / VVC (Versatile Video Codec). With this progress, there is a constant need to provide improvements and optimizations in video coding technology to handle the ever-increasing amount of digital video data in various applications.

[0003] Non-Patent Document 1 relates to an example of a conventional standard related to the above-mentioned video coding technology. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] H.265(ISO / IEC 23008-2 HEVC) / HEVC(High Efficiency Video Coding) Summary of the Invention [Problem to be solved by the invention]

[0005] With regard to the above-mentioned encoding methods, it is desirable to propose new methods to improve encoding efficiency, improve image quality, reduce the amount of processing, reduce the circuit scale, or appropriately select elements or operations such as filters, block sizes, motion vectors, reference pictures or reference blocks.

[0006] The present disclosure provides a configuration or method that can contribute to one or more of, for example, improved coding efficiency, improved image quality, reduced processing amount, reduced circuit size, improved processing speed, and appropriate selection of elements or operations, etc. Note that the present disclosure may include a configuration or method that can contribute to benefits other than those described above. [Means for solving the problem]

[0007] For example, an encoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in both cases where orthogonal transforms using mutually different syntaxes are applied in residual encoding of a current block and where the orthogonal transform is skipped, if a limit on the number of times of context adaptive encoding allows multiple coefficient information flags related to coefficients included in the current block to be context adaptively encoded collectively, the circuit encodes the multiple coefficient information flags using the context adaptive encoding and encodes residual values ​​of the coefficients using Golomb-Rice coding; if the limit on the number of times of processing does not allow the multiple coefficient information flags to be context adaptively encoded collectively, the circuit skips encoding the multiple coefficient information flags and encodes the values ​​of the coefficients using the Golomb-Rice coding; if the orthogonal transform is skipped, the circuit encodes multiple absolute value flags related to the magnitude of the absolute value of the coefficients using the context adaptive encoding after encoding the multiple coefficient information flags and before encoding the residual values ​​of the coefficients; and if the orthogonal transform is skipped, the circuit encodes multiple absolute value flags related to the magnitude of the absolute value of the coefficients using the context adaptive encoding after encoding the multiple coefficient information flags and before encoding the residual values ​​of the coefficients; and if the orthogonal transform is skipped, the multiple coefficient information flags further include a flag indicating whether the coefficients have positive or negative values.

[0008] Some implementations of embodiments in the present disclosure may improve coding efficiency, simplify the encoding / decoding process, increase the encoding / decoding process speed, or efficiently select appropriate components / operations used in encoding and decoding, such as appropriate filters, block sizes, motion vectors, reference pictures, reference blocks, etc.

[0009] Further advantages and benefits of certain aspects of the present disclosure will become apparent from the specification and drawings. While such advantages and / or benefits may be obtained by several embodiments and features described in the specification and drawings, not all of them necessarily need to be provided to obtain one or more advantages and / or benefits.

[0010] These general or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, a recording medium, or any combination thereof. [Effects of the Invention]

[0011] A configuration or method according to an aspect of the present disclosure may contribute to, for example, one or more of improved coding efficiency, improved image quality, reduced processing amount, reduced circuit size, improved processing speed, and appropriate selection of elements or operations, etc. Note that a configuration or method according to an aspect of the present disclosure may also contribute to benefits other than those described above. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a block diagram showing a functional configuration of an encoding device according to an embodiment. [Figure 2] FIG. 2 is a flowchart showing an example of the overall encoding process performed by the encoding device. [Figure 3] FIG. 3 is a conceptual diagram showing an example of block division. [Figure 4A] FIG. 4A is a conceptual diagram showing an example of the configuration of a slice. [Figure 4B] FIG. 4B is a conceptual diagram showing an example of the configuration of a tile. [Figure 5A] FIG. 5A is a table showing the transform basis functions corresponding to various transform types. [Figure 5B] FIG. 5B is a conceptual diagram showing an example of SVT (Spatially Varying Transform). [Figure 6A]FIG. 6A is a conceptual diagram showing an example of the shape of a filter used in an ALF (adaptive loop filter). [Figure 6B] FIG. 6B is a conceptual diagram showing another example of the shape of the filter used in ALF. [Figure 6C] FIG. 6C is a conceptual diagram showing another example of the shape of the filter used in ALF. [Figure 7] FIG. 7 is a block diagram showing an example of a detailed configuration of a loop filter unit that functions as a DBF (deblocking filter). [Figure 8] FIG. 8 is a conceptual diagram showing an example of a deblocking filter having symmetric filter characteristics with respect to block boundaries. [Figure 9] FIG. 9 is a conceptual diagram for explaining block boundaries where deblocking filtering is performed. [Figure 10] FIG. 10 is a conceptual diagram showing an example of the Bs value. [Figure 11] FIG. 11 is a flowchart illustrating an example of processing performed by the prediction processing unit of the encoding device. [Figure 12] FIG. 12 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device. [Figure 13] FIG. 13 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device. [Figure 14] FIG. 14 is a conceptual diagram showing an example of 67 intra prediction modes in intra prediction according to the embodiment. [Figure 15] FIG. 15 is a flowchart showing an example of the flow of basic inter prediction processing. [Figure 16] FIG. 16 is a flowchart showing an example of motion vector derivation. [Figure 17] FIG. 17 is a flowchart showing another example of motion vector derivation. [Figure 18] FIG. 18 is a flowchart showing another example of motion vector derivation. [Figure 19]FIG. 19 is a flowchart showing an example of inter prediction in normal inter mode. [Figure 20] FIG. 20 is a flowchart showing an example of inter prediction in merge mode. [Figure 21] FIG. 21 is a conceptual diagram illustrating an example of a motion vector derivation process in merge mode. [Figure 22] FIG. 22 is a flowchart showing an example of FRUC (frame rate up conversion) processing. [Figure 23] FIG. 23 is a conceptual diagram for explaining an example of pattern matching (bilateral matching) between two blocks along a motion trajectory. [Figure 24] FIG. 24 is a conceptual diagram for explaining an example of pattern matching (template matching) between a template in a current picture and a block in a reference picture. [Figure 25A] FIG. 25A is a conceptual diagram illustrating an example of derivation of a motion vector for each sub-block based on motion vectors of a plurality of adjacent blocks. [Figure 25B] FIG. 25B is a conceptual diagram for explaining an example of derivation of a motion vector in sub-block units in the affine mode having three control points. [Figure 26A] FIG. 26A is a conceptual diagram for explaining the affine merge mode. [Figure 26B] FIG. 26B is a conceptual diagram for explaining an affine merge mode having two control points. [Figure 26C] FIG. 26C is a conceptual diagram for explaining an affine merge mode having three control points. [Figure 27] FIG. 27 is a flowchart showing an example of processing in the affine merge mode. [Figure 28A] FIG. 28A is a conceptual diagram illustrating an affine inter mode having two control points. [Figure 28B]FIG. 28B is a conceptual diagram for explaining an affine inter mode having three control points. [Figure 29] FIG. 29 is a flowchart showing an example of processing in the affine inter mode. [Figure 30A] FIG. 30A is a conceptual diagram illustrating an affine inter mode in which a current block has three control points and an adjacent block has two control points. [Figure 30B] FIG. 30B is a conceptual diagram illustrating an affine inter mode in which the current block has two control points and the adjacent block has three control points. [Figure 31A] FIG. 31A is a flowchart illustrating a merge mode including decoder motion vector refinement (DMVR). [Figure 31B] FIG. 31B is a conceptual diagram for explaining an example of the DMVR process. [Figure 32] FIG. 32 is a flowchart showing an example of generation of a predicted image. [Figure 33] FIG. 33 is a flowchart showing another example of generation of a predicted image. [Figure 34] FIG. 34 is a flowchart showing another example of generation of a predicted image. [Figure 35] FIG. 35 is a flowchart illustrating an example of a predictive image correction process using OBMC (overlapped block motion compensation) processing. [Figure 36] FIG. 36 is a conceptual diagram illustrating an example of the predicted image correction process using the OBMC process. [Figure 37] FIG. 37 is a conceptual diagram for explaining generation of predicted images of two triangles. [Figure 38] FIG. 38 is a conceptual diagram for explaining a model assuming uniform linear motion. [Figure 39]FIG. 39 is a conceptual diagram for explaining an example of a predicted image generating method using luminance correction processing by LIC (local illumination compensation) processing. [Figure 40] FIG. 40 is a block diagram showing an example of implementation of an encoding device. [Figure 41] FIG. 41 is a block diagram illustrating a functional configuration of a decoding device according to an embodiment. [Figure 42] FIG. 42 is a flowchart showing an example of the overall decoding process by the decoding device. [Figure 43] FIG. 43 is a flowchart illustrating an example of processing performed by the prediction processing unit of the decoding device. [Figure 44] FIG. 44 is a flowchart showing another example of the processing performed by the prediction processing unit of the decoding device. [Figure 45] FIG. 45 is a flowchart showing an example of inter prediction in normal inter mode in the decoding device. [Figure 46] FIG. 46 is a block diagram showing an example of implementation of a decoding device. [Figure 47] FIG. 47 is a flowchart showing a basic coefficient encoding method according to the first aspect. [Figure 48] FIG. 48 is a flowchart showing the basic first encoding method according to the first aspect. [Figure 49] FIG. 49 is a flowchart showing the basic second encoding method according to the first aspect. [Figure 50] FIG. 50 is a flowchart showing a coefficient encoding method according to a first example of the first aspect. [Figure 51] FIG. 51 is a flowchart showing a coefficient encoding method according to a second example of the first aspect. [Figure 52] FIG. 52 is a flowchart showing a coefficient encoding method according to a first example of the second aspect. [Figure 53] FIG. 53 is a flowchart showing a coefficient encoding method according to a second example of the second aspect. [Figure 54]FIG. 54 is a syntax diagram showing the first basic encoding method according to the third aspect. [Figure 55] FIG. 55 is a syntax diagram showing the basic second encoding method according to the third aspect. [Figure 56] FIG. 56 is a syntax diagram showing a second encoding method according to a first example of the third aspect. [Figure 57] FIG. 57 is a syntax diagram showing a second encoding method according to a second example of the third aspect. [Figure 58] FIG. 58 is a flowchart showing the operation of the encoding device according to the embodiment. [Figure 59] FIG. 59 is a flowchart showing the operation of the decoding device according to the embodiment. [Figure 60] FIG. 60 is a block diagram showing the overall configuration of a content supply system that realizes a content distribution service. [Figure 61] FIG. 61 is a conceptual diagram showing an example of a coding structure for scalable coding. [Figure 62] FIG. 62 is a conceptual diagram showing an example of a coding structure for scalable coding. [Figure 63] FIG. 63 is a conceptual diagram showing an example of a display screen of a web page. [Figure 64] FIG. 64 is a conceptual diagram showing an example of a display screen of a web page. [Figure 65] FIG. 65 is a block diagram showing an example of a smartphone. [Figure 66] FIG. 66 is a block diagram showing an example of the configuration of a smartphone. DETAILED DESCRIPTION OF THE INVENTION

[0013] For example, when encoding a block of an image, the encoding device may be able to convert the block into data that is easy to compress by applying an orthogonal transform to the block. On the other hand, when encoding a block of an image, the encoding device may be able to reduce processing delay by not applying an orthogonal transform to the block.

[0014] Furthermore, the characteristics of the blocks to which the orthogonal transform has been applied are different from the characteristics of the blocks to which the orthogonal transform has not been applied, and the coding method used for the blocks to which the orthogonal transform has been applied may be different from the coding method used for the blocks to which the orthogonal transform has not been applied.

[0015] However, if an inappropriate coding method is used for a block to which orthogonal transform has been applied, or if an inappropriate coding method is used for a block to which orthogonal transform has not been applied, there is a possibility that the amount of code will increase, or that processing delay will increase, etc. Furthermore, if the coding method used for the block to which orthogonal transform has been applied differs greatly from the coding method used for the block to which orthogonal transform has not been applied, there is a possibility that processing will become complicated and the circuit scale will increase.

[0016] Therefore, for example, an encoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, the circuit encodes a block of an image by limiting the number of times that context adaptive encoding processes are performed, and in encoding the block, a sub-block flag encoding process is performed by context adaptive encoding to encode a sub-block flag indicating whether or not a sub-block included in the block contains a non-zero coefficient, both when an orthogonal transform is applied to the block and when an orthogonal transform is not applied to the block, without including the number of times that processes are performed.

[0017] This may result in the sub-block flags being coded by context adaptive coding, regardless of whether or not orthogonal transform is applied and regardless of the limit on the number of times that context adaptive coding is performed. This may reduce the amount of coding. Furthermore, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, potentially reducing the circuit size.

[0018] Furthermore, for example, when an orthogonal transform is applied to the block, the circuit further performs a position parameter encoding process that encodes a parameter indicating the position of the first non-zero coefficient in the block in scan order using context adaptive encoding, without including it in the number of processing times.

[0019] As a result, when an orthogonal transform is applied, the parameter indicating the position of the first non-zero coefficient may be coded by the context adaptive coding, regardless of the limit on the number of processes of the context adaptive coding, which may reduce the amount of coding.

[0020] Furthermore, for example, when an orthogonal transform is applied to the block, the circuit further determines the limit range of the number of times of processing depending on the position of the first non-zero coefficient.

[0021] This may allow the limit on the number of processing iterations to be appropriately determined when orthogonal transform is applied, thereby allowing the balance between reducing the amount of coding and reducing processing delay to be appropriately adjusted.

[0022] Also, for example, a decoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, the circuit decodes a block of an image by limiting the number of times of context adaptive decoding processing, and in decoding the block, a sub-block flag decoding process is performed by context adaptive decoding to decode a sub-block flag indicating whether or not a sub-block included in the block contains a non-zero coefficient, both when an inverse orthogonal transform is applied to the block and when an inverse orthogonal transform is not applied to the block, without including the number of times of processing.

[0023] As a result, the sub-block flags may be decoded by context adaptive decoding regardless of whether inverse orthogonal transform is applied or regardless of the limit on the number of context adaptive decoding processes. Therefore, the amount of code may be reduced. Furthermore, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied becomes smaller, which may result in a smaller circuit size.

[0024] Furthermore, for example, when an inverse orthogonal transform is applied to the block, the circuit further performs a position parameter decoding process that decodes parameters indicating the position of the first non-zero coefficient in the block in scan order using context adaptive decoding, without including this in the number of processing times.

[0025] As a result, when an inverse orthogonal transform is applied, the parameter indicating the position of the first non-zero coefficient may be decoded by context adaptive decoding, regardless of the limit on the number of times that context adaptive decoding is performed, and therefore the amount of coding may be reduced.

[0026] Furthermore, for example, when an inverse orthogonal transform is applied to the block, the circuit further determines the limit range of the number of times of processing depending on the position of the first non-zero coefficient.

[0027] This may allow the limit on the number of processing iterations to be appropriately determined when inverse orthogonal transform is applied, thereby allowing the balance between reducing the amount of coding and reducing processing delay to be appropriately adjusted.

[0028] Furthermore, for example, an encoding method according to one aspect of the present disclosure encodes a block of an image by limiting the number of times that context adaptive encoding is performed, and in encoding the block, a sub-block flag encoding process that encodes a sub-block flag indicating whether or not a sub-block included in the block contains a non-zero coefficient using context adaptive encoding is performed without including it in the number of times that context adaptive encoding is performed, both when an orthogonal transform is applied to the block and when an orthogonal transform is not applied to the block.

[0029] This may result in the sub-block flags being coded by context adaptive coding, regardless of whether or not orthogonal transform is applied and regardless of the limit on the number of times that context adaptive coding is performed. This may reduce the amount of coding. Furthermore, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, potentially reducing the circuit size.

[0030] Furthermore, for example, a decoding method according to one aspect of the present disclosure decodes a block of an image by limiting the number of times that context adaptive decoding is performed, and in decoding the block, a sub-block flag decoding process that decodes a sub-block flag indicating whether or not a sub-block included in the block contains a non-zero coefficient by context adaptive decoding is performed without including it in the number of times of processing, both when an inverse orthogonal transform is applied to the block and when an inverse orthogonal transform is not applied to the block.

[0031] As a result, the sub-block flags may be decoded by context adaptive decoding regardless of whether inverse orthogonal transform is applied or regardless of the limit on the number of context adaptive decoding processes. Therefore, the amount of code may be reduced. Furthermore, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied becomes smaller, which may result in a smaller circuit size.

[0032] Also, for example, an encoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, in both cases where an orthogonal transform is applied to a block of an image to be encoded and where an orthogonal transform is not applied to the block, if the number of times of context adaptive encoding is within a limited range of the number of times of processing, the circuit encodes a coefficient information flag indicating an attribute of a coefficient included in the block by context adaptive encoding, and if the number of times of processing is not within the limited range of the number of times of processing, the circuit skips encoding of the coefficient information flag, and if the coefficient information flag is encoded, the circuit encodes residual value information for reconstructing the value of the coefficient using the coefficient information flag by Golomb-Rice coding, and if the encoding of the coefficient information flag is skipped, the circuit encodes the value of the coefficient by Golomb-Rice coding.

[0033] This may result in skipping the coding of the coefficient information flag according to the limit on the number of times that context adaptive coding processes are performed, regardless of whether or not orthogonal transform is applied. Therefore, an increase in processing delay may be suppressed, and an increase in the amount of code may be suppressed. Furthermore, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, resulting in a smaller circuit size.

[0034] Furthermore, for example, the coefficient information flag is a flag indicating whether the value of the coefficient is greater than 1 or not.

[0035] As a result, regardless of whether orthogonal transform is applied, coding of the coefficient information flag indicating whether the value of a coefficient is greater than 1 may be skipped in accordance with the limit on the number of times the context adaptive coding is performed. This may prevent an increase in processing delay and an increase in the amount of code.

[0036] Also, for example, a decoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, in both cases where an inverse orthogonal transform is applied to a block of an image to be decoded and where an inverse orthogonal transform is not applied to the block, if the number of context adaptive decoding processes is within a limited range of the number of processes, the circuit decodes a coefficient information flag indicating an attribute of a coefficient included in the block by context adaptive decoding, and if the number of processes is not within the limited range of the number of processes, skips decoding the coefficient information flag, and if the coefficient information flag is decoded, decodes residual value information for reconstructing a value of the coefficient using the coefficient information flag by Golomb-Rice decoding, and if the decoding of the coefficient information flag is skipped, decodes the value of the coefficient by Golomb-Rice decoding.

[0037] As a result, regardless of whether or not inverse orthogonal transform is applied, decoding of coefficient information flags may be skipped according to the limit on the number of times that context adaptive decoding is performed. Therefore, an increase in processing delay may be suppressed, and an increase in the amount of code may be suppressed. In addition, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied may be reduced, and the circuit scale may be reduced.

[0038] Furthermore, for example, the coefficient information flag is a flag indicating whether the value of the coefficient is greater than 1 or not.

[0039] As a result, regardless of whether inverse orthogonal transform is applied, decoding of the coefficient information flag indicating whether the value of a coefficient is greater than 1 may be skipped according to the limit on the number of times context adaptive decoding is performed. Therefore, an increase in processing delay may be suppressed, and an increase in the amount of code may be suppressed.

[0040] Furthermore, for example, in an encoding method according to one aspect of the present disclosure, in both cases where an orthogonal transform is applied to a block of an image to be encoded and where an orthogonal transform is not applied to the block, if the number of processing times of context adaptive encoding is within a limited range of the number of processing times, encoding a coefficient information flag indicating an attribute of a coefficient included in the block by context adaptive encoding, and if the number of processing times is not within the limited range of the number of processing times, skipping encoding of the coefficient information flag, if the coefficient information flag has been encoded, encoding residual value information for reconstructing the value of the coefficient using the coefficient information flag by Golomb-Rice encoding, and if encoding of the coefficient information flag is skipped, encoding the value of the coefficient by Golomb-Rice encoding.

[0041] This may result in skipping the coding of the coefficient information flag according to the limit on the number of times that context adaptive coding processes are performed, regardless of whether or not orthogonal transform is applied. Therefore, an increase in processing delay may be suppressed, and an increase in the amount of code may be suppressed. Furthermore, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, resulting in a smaller circuit size.

[0042] Furthermore, for example, a decoding method according to one aspect of the present disclosure, in both cases where an inverse orthogonal transform is applied to a block of an image to be decoded and where an inverse orthogonal transform is not applied to the block, if the number of times of context adaptive decoding is performed is within a limited range of the number of times of processing, decodes a coefficient information flag indicating an attribute of a coefficient included in the block by context adaptive decoding, and if the number of times of processing is not within the limited range of the number of times of processing, skips decoding of the coefficient information flag, and if the coefficient information flag is decoded, decodes residual value information for reconstructing the value of the coefficient using the coefficient information flag by Golomb-Rice decoding, and if decoding of the coefficient information flag is skipped, decodes the value of the coefficient by Golomb-Rice decoding.

[0043] As a result, regardless of whether or not inverse orthogonal transform is applied, decoding of coefficient information flags may be skipped according to the limit on the number of times that context adaptive decoding is performed. Therefore, an increase in processing delay may be suppressed, and an increase in the amount of code may be suppressed. In addition, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied may be reduced, and the circuit scale may be reduced.

[0044] Also, for example, an encoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, the circuit encodes a block of an image by limiting the number of times that context adaptive encoding is performed, and in encoding the block, when an orthogonal transform is not applied to the block, determines whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, encodes the plurality of coefficient information flags using context adaptive encoding, and the processing condition is a condition that the number of times that the number of times of processing is added to the number of the plurality of coefficient information flags is within the limited range of the number of times of processing.

[0045] This may enable a comprehensive determination of whether or not context adaptive coding can be used for multiple coefficient information flags when orthogonal transform is not applied. Therefore, processing may be simplified and processing delay may be reduced. Furthermore, when similar processing is performed on blocks to which orthogonal transform is applied, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, potentially reducing the circuit scale.

[0046] Furthermore, for example, the plurality of coefficient information flags include a coefficient information flag indicating whether or not the value of the coefficient is greater than three, and a coefficient information flag indicating whether or not the value of the coefficient is greater than five.

[0047] This may result in a comprehensive determination being made on a plurality of coefficient information flags, including a coefficient information flag indicating whether or not the coefficient value is greater than 3 and a coefficient information flag indicating whether or not the coefficient value is greater than 5. This may simplify the processing and reduce processing delays.

[0048] Furthermore, for example, the plurality of coefficient information flags further include a coefficient information flag indicating whether or not the value of the coefficient is greater than 7, and a coefficient information flag indicating whether or not the value of the coefficient is greater than 9.

[0049] This may enable a comprehensive determination to be made on a plurality of coefficient information flags, including four coefficient information flags: whether the coefficient value is greater than 3, whether the coefficient value is greater than 5, whether the coefficient value is greater than 7, and whether the coefficient value is greater than 9. This may simplify the processing and reduce processing delay.

[0050] Also, for example, a decoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, the circuit decodes a block of an image by limiting the number of times that context adaptive decoding is performed, and in decoding the block, when an inverse orthogonal transform is not applied to the block, determines whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, decodes the plurality of coefficient information flags by context adaptive decoding, and the processing condition is a condition that the number of times that the number of times of processing is added to the number of the plurality of coefficient information flags is within a limited range of the number of times of processing.

[0051] As a result, when inverse orthogonal transform is not applied, whether or not context adaptive decoding can be used may be comprehensively determined for multiple coefficient information flags. Therefore, processing may be simplified and processing delay may be reduced. Furthermore, when similar processing is performed on blocks to which inverse orthogonal transform is applied, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied may be reduced, and the circuit scale may be reduced.

[0052] Furthermore, for example, the plurality of coefficient information flags include a coefficient information flag indicating whether or not the value of the coefficient is greater than three, and a coefficient information flag indicating whether or not the value of the coefficient is greater than five.

[0053] This may result in a comprehensive determination being made on a plurality of coefficient information flags, including a coefficient information flag indicating whether or not the coefficient value is greater than 3 and a coefficient information flag indicating whether or not the coefficient value is greater than 5. This may simplify the processing and reduce processing delays.

[0054] Furthermore, for example, the plurality of coefficient information flags further include a coefficient information flag indicating whether or not the value of the coefficient is greater than 7, and a coefficient information flag indicating whether or not the value of the coefficient is greater than 9.

[0055] This may enable a comprehensive determination to be made on a plurality of coefficient information flags, including four coefficient information flags: whether the coefficient value is greater than 3, whether the coefficient value is greater than 5, whether the coefficient value is greater than 7, and whether the coefficient value is greater than 9. This may simplify the processing and reduce processing delay.

[0056] Furthermore, for example, an encoding method according to one aspect of the present disclosure encodes a block of an image by limiting the number of times that context adaptive encoding is performed, and in encoding the block, when an orthogonal transform is not applied to the block, determines whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, encodes the plurality of coefficient information flags using context adaptive encoding, and the processing condition is a condition that the number of times that the number of times of processing is added to the number of the plurality of coefficient information flags is within a limited range of the number of times of processing.

[0057] This may enable a comprehensive determination of whether or not context adaptive coding can be used for multiple coefficient information flags when orthogonal transform is not applied. Therefore, processing may be simplified and processing delay may be reduced. Furthermore, when similar processing is performed on blocks to which orthogonal transform is applied, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, potentially reducing the circuit scale.

[0058] Furthermore, for example, a decoding method according to one aspect of the present disclosure decodes a block of an image by limiting the number of times that context adaptive decoding is performed, and in decoding the block, when an inverse orthogonal transform is not applied to the block, determines whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, decodes the plurality of coefficient information flags by context adaptive decoding, and the processing condition is a condition that the number of times of processing when the number of the plurality of coefficient information flags is added to the number of times of processing is within a limited range of the number of times of processing.

[0059] As a result, when inverse orthogonal transform is not applied, whether or not context adaptive decoding can be used may be comprehensively determined for multiple coefficient information flags. Therefore, processing may be simplified and processing delay may be reduced. Furthermore, when similar processing is performed on blocks to which inverse orthogonal transform is applied, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied may be reduced, and the circuit scale may be reduced.

[0060] Also, for example, an encoding device according to one aspect of the present disclosure includes a division unit, an intra prediction unit, an inter prediction unit, a prediction control unit, a transformation unit, a quantization unit, an entropy encoding unit, and a loop filter unit.

[0061] The division unit divides a current picture into a plurality of blocks, the intra prediction unit performs intra prediction to generate the predicted image of a current block in the current picture using a reference image in the current picture, and the inter prediction unit performs inter prediction to generate the predicted image of the current block in the current picture using a reference image in a reference picture different from the current picture.

[0062] The prediction control unit controls intra prediction performed by the intra prediction unit and inter prediction performed by the inter prediction unit. The transform unit transforms a prediction residual signal between the predicted image generated by the intra prediction unit or the inter prediction unit and an image of the block to be coded to generate a transform coefficient signal of the block to be coded. The quantization unit quantizes the transform coefficient signal. The entropy coding unit codes the quantized transform coefficient signal. The loop filter unit applies a filter to the block to be coded.

[0063] Also, for example, in operation, the entropy coding unit codes blocks of an image by limiting the number of times that context adaptive coding is performed, and in coding the blocks, a sub-block flag coding process is performed by context adaptive coding to code sub-block flags indicating whether or not a sub-block included in the block contains a non-zero coefficient, both when an orthogonal transform is applied to the block and when an orthogonal transform is not applied to the block, without including the number of times that the process is performed.

[0064] Furthermore, for example, in operation, the entropy coding unit encodes a coefficient information flag indicating an attribute of a coefficient included in the block by context adaptive coding when the number of times of processing for context adaptive coding is within a limited range of the number of times of processing, both when an orthogonal transform is applied to a block of an image to be coded and when an orthogonal transform is not applied to the block, and skips coding of the coefficient information flag when the number of times of processing is not within the limited range of the number of times of processing, and when the coefficient information flag is coded, encodes residual value information for reconstructing the value of the coefficient using the coefficient information flag by Golomb-Rice coding, and when coding of the coefficient information flag is skipped, encodes the value of the coefficient by Golomb-Rice coding.

[0065] Further, for example, in operation, the entropy coding unit codes a block of an image by limiting the number of times that context adaptive coding is performed, and in coding the block, when an orthogonal transform is not applied to the block, determines whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, codes the plurality of coefficient information flags by context adaptive coding, and the processing condition is a condition that the number of times that the number of times of processing is added to the number of the plurality of coefficient information flags is within a limited range of the number of times of processing.

[0066] Also, for example, a decoding device according to one aspect of the present disclosure is a decoding device that decodes moving images using predicted images, and includes an entropy decoding unit, an inverse quantization unit, an inverse transform unit, an intra prediction unit, an inter prediction unit, a prediction control unit, an addition unit (reconstruction unit), and a loop filter unit.

[0067] The entropy decoding unit decodes a quantized transform coefficient signal of a block to be decoded in a picture to be decoded that constitutes the video. The inverse quantization unit inversely quantizes the quantized transform coefficient signal. The inverse transform unit inversely transforms the transform coefficient signal to obtain a prediction residual signal of the block to be decoded.

[0068] The intra prediction unit performs intra prediction to generate the predicted image of the block to be decoded using a reference image in the current picture. The inter prediction unit performs inter prediction to generate the predicted image of the block to be decoded using a reference image in a reference picture different from the current picture. The prediction control unit controls the intra prediction performed by the intra prediction unit and the inter prediction performed by the inter prediction unit.

[0069] The adder reconstructs an image of the block to be decoded by adding the predicted image generated by the intra prediction unit or the inter prediction unit and the prediction residual signal. The loop filter unit applies a filter to the block to be decoded.

[0070] Also, for example, in operation, the entropy decoding unit decodes blocks of an image by limiting the number of times that context adaptive decoding is performed, and in decoding the blocks, a sub-block flag decoding process is performed by context adaptive decoding to decode a sub-block flag indicating whether or not a sub-block included in the block contains a non-zero coefficient, both when an inverse orthogonal transform is applied to the block and when an inverse orthogonal transform is not applied to the block, without including the number of times that the process is performed.

[0071] Furthermore, for example, in operation, in both cases where an inverse orthogonal transform is applied to a block of an image to be decoded and where an inverse orthogonal transform is not applied to the block, if the number of times of context adaptive decoding is performed is within a limited range of the number of times of processing, the entropy decoding unit decodes a coefficient information flag indicating an attribute of a coefficient included in the block by context adaptive decoding, and if the number of times of processing is not within the limited range of the number of times of processing, skips decoding of the coefficient information flag, and if the coefficient information flag is decoded, decodes residual value information for reconstructing the value of the coefficient using the coefficient information flag by Golomb-Rice decoding, and if decoding of the coefficient information flag is skipped, decodes the value of the coefficient by Golomb-Rice decoding.

[0072] Also, for example, in operation, the entropy decoding unit decodes a block of an image by limiting the number of times that context adaptive decoding is performed, and in decoding the block, when an inverse orthogonal transform is not applied to the block, determines whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, decodes the plurality of coefficient information flags by context adaptive decoding, and the processing condition is a condition that the number of times that the number of times of processing is added to the number of the plurality of coefficient information flags is within a limited range of the number of times of processing.

[0073] Furthermore, these comprehensive or specific aspects may be realized as a system, an apparatus, a method, an integrated circuit, a computer program, or a non-transitory recording medium such as a computer-readable CD-ROM, or may be realized as any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium.

[0074] Hereinafter, embodiments will be described in detail with reference to the drawings. Note that the embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, the arrangement and connection of the components, steps, and the relationship and order of the steps shown in the following embodiments are merely examples and are not intended to limit the scope of the claims.

[0075] Hereinafter, embodiments of an encoding device and a decoding device will be described. The embodiments are examples of encoding devices and decoding devices to which the processes and / or configurations described in each aspect of the present disclosure can be applied. The processes and / or configurations can also be implemented in encoding devices and decoding devices different from the embodiments. For example, with regard to the processes and / or configurations applied to the embodiments, any of the following may be implemented.

[0076] (1) Any of the multiple components of the encoding device or decoding device of the embodiments described in each aspect of the present disclosure may be replaced or combined with other components described in any of the aspects of the present disclosure.

[0077] (2) In the encoding device or decoding device of the embodiment, the functions or processes performed by some of the multiple components of the encoding device or decoding device may be changed in any way, such as by adding, replacing, or deleting a function or process. For example, any function or process may be replaced with or combined with another function or process described in any of the aspects of the present disclosure.

[0078] (3) In the method implemented by the encoding device or decoding device of the embodiment, some of the processes included in the method may be arbitrarily modified, such as by addition, replacement, deletion, etc. For example, any process in the method may be replaced with or combined with another process described in any of the aspects of the present disclosure.

[0079] (4) Some of the components constituting the encoding device or decoding device of the embodiment may be combined with components described in any of the aspects of the present disclosure, or may be combined with components having some of the functions described in any of the aspects of the present disclosure, or may be combined with components that perform some of the processing performed by the components described in any of the aspects of the present disclosure.

[0080] (5) A component having part of the functionality of the encoding device or decoding device of an embodiment, or a component that performs part of the processing of the encoding device or decoding device of an embodiment, may be combined or replaced with a component described in any of the aspects of the present disclosure, a component having part of the functionality described in any of the aspects of the present disclosure, or a component that performs part of the processing described in any of the aspects of the present disclosure.

[0081] (6) In the method implemented by the encoding device or decoding device of the embodiment, any of the multiple processes included in the method may be replaced or combined with the process described in any of the aspects of the present disclosure or any similar process.

[0082] (7) Some of the processes included in the method implemented by the encoding device or decoding device of the embodiments may be combined with the processes described in any of the aspects of the present disclosure.

[0083] (8) The implementation of the processes and / or configurations described in each aspect of the present disclosure is not limited to the encoding device or decoding device of the embodiments. For example, the processes and / or configurations may be implemented in a device used for a purpose other than the video encoding or video decoding disclosed in the embodiments.

[0084] [Encoding device] First, a coding device according to an embodiment will be described. Fig. 1 is a block diagram showing the functional configuration of a coding device 100 according to an embodiment. The coding device 100 is a video coding device that codes a video on a block-by-block basis.

[0085] As shown in FIG. 1, the encoding device 100 is a device that encodes an image on a block-by-block basis, and includes a division unit 102, a subtraction unit 104, a transformation unit 106, a quantization unit 108, an entropy encoding unit 110, an inverse quantization unit 112, an inverse transformation unit 114, an addition unit 116, a block memory 118, a loop filter unit 120, a frame memory 122, an intra prediction unit 124, an inter prediction unit 126, and a prediction control unit 128.

[0086] The encoding device 100 is realized by, for example, a general-purpose processor and memory. In this case, when a software program stored in the memory is executed by the processor, the processor functions as the division unit 102, the subtraction unit 104, the transformation unit 106, the quantization unit 108, the entropy coding unit 110, the inverse quantization unit 112, the inverse transformation unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128. Alternatively, the encoding device 100 may be realized as one or more dedicated electronic circuits corresponding to the division unit 102, the subtraction unit 104, the transformation unit 106, the quantization unit 108, the entropy coding unit 110, the inverse quantization unit 112, the inverse transformation unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.

[0087] Below, the overall processing flow of the encoding device 100 will be explained, followed by an explanation of each component included in the encoding device 100.

[0088] [Overall encoding process flow] FIG. 2 is a flowchart showing an example of the overall encoding process performed by the encoding device 100.

[0089] First, the division unit 102 of the encoding device 100 divides each picture included in an input image, which is a moving image, into a plurality of fixed-size blocks (e.g., 128×128 pixels) (step Sa_1). Then, the division unit 102 selects a division pattern (also referred to as a block shape) for the fixed-size blocks (step Sa_2). That is, the division unit 102 further divides the fixed-size blocks into a plurality of blocks constituting the selected division pattern. Then, the encoding device 100 performs the processes of steps Sa_3 to Sa_9 on each of the plurality of blocks (i.e., the block to be encoded).

[0090] That is, the prediction processing unit consisting of all or part of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128 generates a prediction signal (also called a prediction block) of the block to be coded (also called a current block) (step Sa_3).

[0091] Next, the subtraction unit 104 generates a difference between the current block to be coded and the predicted block as a prediction residual (also called a difference block) (step Sa_4).

[0092] Next, the transform unit 106 and the quantization unit 108 perform transform and quantization on the difference block to generate a plurality of quantized coefficients (step Sa_5). Note that a block made up of a plurality of quantized coefficients is also called a coefficient block.

[0093] Next, the entropy coding unit 110 performs coding (specifically, entropy coding) on ​​the coefficient block and prediction parameters related to generation of the prediction signal to generate a coded signal (step Sa_6). The coded signal is also called a coded bitstream, a compressed bitstream, or a stream.

[0094] Next, the inverse quantization unit 112 and the inverse transform unit 114 perform inverse quantization and inverse transform on the coefficient block to reconstruct a plurality of prediction residuals (that is, difference blocks) (step Sa_7).

[0095] Next, the adder 116 reconstructs the current block into a reconstructed image (also referred to as a reconstructed block or a decoded image block) by adding the predicted block to the restored differential block (step Sa_8). In this way, a reconstructed image is generated.

[0096] When this reconstructed image is generated, the loop filter unit 120 performs filtering on the reconstructed image as needed (step Sa_9).

[0097] Then, the encoding device 100 determines whether or not encoding of the entire picture is complete (step Sa_10), and if it determines that encoding is not complete (No in step Sa_10), repeats the processing from step Sa_2.

[0098] In the above example, the encoding device 100 selects one division pattern for fixed-size blocks and encodes each block according to that division pattern, but it may also encode each block according to each of a plurality of division patterns. In this case, the encoding device 100 may evaluate the cost for each of the plurality of division patterns and select, for example, the coded signal obtained by coding according to the division pattern with the smallest cost as the coded signal to be output.

[0099] As shown in the figure, the processes of steps Sa_1 to Sa_10 are performed sequentially by the encoding device 100. Alternatively, some of the processes may be performed in parallel, or the order of the processes may be changed.

[0100] [Divided part] The division unit 102 divides each picture included in the input video into multiple blocks and outputs each block to the subtraction unit 104. For example, the division unit 102 first divides the picture into blocks of a fixed size (e.g., 128x128). Other fixed block sizes may be adopted. These fixed-size blocks are sometimes called coding tree units (CTUs). The division unit 102 then divides each of the fixed-size blocks into blocks of a variable size (e.g., 64x64 or less) based on, for example, recursive quadtree and / or binary tree block division. That is, the division unit 102 selects a division pattern. These variable-size blocks are sometimes called coding units (CUs), prediction units (PUs), or transform units (TUs). Note that in various processing examples, CUs, PUs, and TUs do not need to be distinguished from one another, and some or all of the blocks in a picture may serve as the processing units of CUs, PUs, and TUs.

[0101] 3 is a conceptual diagram showing an example of block division in an embodiment, in which solid lines represent block boundaries based on quadtree block division, and dashed lines represent block boundaries based on binary tree block division.

[0102] Here, the block 10 is a square block of 128x128 pixels (128x128 block). This 128x128 block 10 is first divided into four square 64x64 blocks (quadtree block division).

[0103] The top-left 64x64 block is further divided vertically into two rectangular 32x64 blocks, and the left 32x64 block is further divided vertically into two rectangular 16x64 blocks (binary tree block division). As a result, the top-left 64x64 block is divided into two 16x64 blocks 11 and 12 and a 32x64 block 13.

[0104] The top right 64x64 block is divided horizontally into two rectangular 64x32 blocks 14 and 15 (binary tree block division).

[0105] The lower-left 64x64 block is divided into four square 32x32 blocks (quadtree block decomposition). Of the four 32x32 blocks, the upper-left and lower-right blocks are further divided. The upper-left 32x32 block is divided vertically into two rectangular 16x32 blocks, and the right 16x32 block is further divided horizontally into two 16x16 blocks (binary tree block decomposition). The lower-right 32x32 block is divided horizontally into two 32x16 blocks (binary tree block decomposition). As a result, the lower-left 64x64 block is divided into 16x32 block 16, two 16x16 blocks 17 and 18, two 32x32 blocks 19 and 20, and two 32x16 blocks 21 and 22.

[0106] The bottom right 64x64 block 23 is not split.

[0107] As described above, in Fig. 3, block 10 is divided into 13 variable-sized blocks 11 to 23 based on recursive quad-tree and binary tree block division. This type of division is sometimes called QTBT (quad-tree plus binary tree) division.

[0108] In Fig. 3, one block is divided into four or two blocks (quadtree or binary tree block division), but the division is not limited to this. For example, one block may be divided into three blocks (ternary tree block division). Division including such ternary tree block division is sometimes called MBT (multi type tree) division.

[0109] [Picture Composition Slice / Tile] In order to decode pictures in parallel, the pictures may be organized in slice units or tile units. Pictures organized in slice units or tile units may be organized by the division unit 102.

[0110] A slice is a basic coding unit that constitutes a picture. A picture is made up of, for example, one or more slices. A slice is made up of one or more consecutive Coding Tree Units (CTUs).

[0111] FIG. 4A is a conceptual diagram illustrating an example of a slice configuration. For example, a picture includes 11 x 8 CTUs and is divided into four slices (slices 1-4). Slice 1 consists of 16 CTUs, slice 2 consists of 21 CTUs, slice 3 consists of 29 CTUs, and slice 4 consists of 22 CTUs. Each CTU in the picture belongs to one of the slices. The shape of a slice is determined by dividing the picture horizontally. Slice boundaries do not need to be at the edges of the screen and can be anywhere within the boundaries of CTUs within the screen. The processing order (encoding order or decoding order) of CTUs within a slice is, for example, raster scan order. Each slice also includes header information and coded data. The header information may describe slice characteristics such as the address of the CTU at the beginning of the slice and the slice type.

[0112] A tile is a rectangular unit that makes up a picture. Each tile may be assigned a number called a TileId in raster scan order.

[0113] FIG. 4B is a conceptual diagram illustrating an example of a tile configuration. For example, a picture includes 11×8 CTUs and is divided into four rectangular tiles (tiles 1-4). When tiles are used, the processing order of the CTUs is changed compared to when tiles are not used. When tiles are not used, multiple CTUs in a picture are processed in raster scan order. When tiles are used, at least one CTU in each of multiple tiles is processed in raster scan order. For example, as shown in FIG. 4B, the processing order of the multiple CTUs included in tile 1 is from the left end of the first row of tile 1 to the right end of the first row of tile 1, and then from the left end of the second row of tile 1 to the right end of the second row of tile 1.

[0114] It should be noted that one tile may include one or more slices, and one slice may include one or more tiles.

[0115] [Subtraction section] The subtraction unit 104 subtracts a prediction signal (a prediction sample input from a prediction control unit 128 described below) from the original signal (original sample) input from the division unit 102, for each block divided by the division unit 102. That is, the subtraction unit 104 calculates a prediction error (also referred to as a residual) of a block to be coded (hereinafter referred to as a current block). Then, the subtraction unit 104 outputs the calculated prediction error (residual) to the conversion unit 106.

[0116] The original signal is an input signal to the encoding device 100, and is a signal representing an image of each picture constituting a moving image (for example, a luminance (luma) signal and two color difference (chroma) signals). Hereinafter, the signal representing an image may also be referred to as a sample.

[0117] [Conversion section] The transform unit 106 transforms the spatial domain prediction errors into frequency domain transform coefficients and outputs the transform coefficients to the quantization unit 108. Specifically, the transform unit 106 performs, for example, a predetermined discrete cosine transform (DCT) or discrete sine transform (DST) on the spatial domain prediction errors. The predetermined DCT or DST may be determined in advance.

[0118] The transform unit 106 may adaptively select a transform type from among a plurality of transform types and transform the prediction errors into transform coefficients using a transform basis function corresponding to the selected transform type. Such a transform is sometimes called an explicit multiple core transform (EMT) or an adaptive multiple transform (AMT).

[0119] The multiple transform types include, for example, DCT-II, DCT-V, DCT-VIII, DST-I, and DST-VII. Fig. 5A is a table showing transform basis functions corresponding to example transform types. In Fig. 5A, N represents the number of input pixels. Selection of a transform type from among these multiple transform types may depend, for example, on the type of prediction (intra prediction or inter prediction) or the intra prediction mode.

[0120] Such information indicating whether EMT or AMT is applied (e.g., referred to as an EMT flag or an AMT flag) and information indicating the selected transformation type are usually signaled at the CU level, but the signaling of this information does not need to be limited to the CU level and may be at other levels (e.g., the bit sequence level, picture level, slice level, tile level, or CTU level).

[0121] Furthermore, the transform unit 106 may retransform the transform coefficients (transform results). Such retransformation may be referred to as an adaptive secondary transform (AST) or a non-separable secondary transform (NSST). For example, the transform unit 106 performs retransformation for each sub-block (e.g., 4x4 sub-block) included in a block of transform coefficients corresponding to intra-prediction errors. Information indicating whether to apply NSST and information regarding the transform matrix used for NSST are typically signaled at the CU level. Note that signaling of this information does not need to be limited to the CU level, and may also be at other levels (e.g., the sequence level, picture level, slice level, tile level, or CTU level).

[0122] Separable transformation and non-separable transformation may be applied to the transformation unit 106. Separable transformation is a method of separating the input into directions for the number of dimensions and performing transformation multiple times, and non-separable transformation is a method of treating two or more dimensions of a multi-dimensional input as one dimension and performing transformation all at once.

[0123] For example, an example of a non-separable transformation is when the input is a 4x4 block, it is treated as a single array with 16 elements, and a 16x16 transformation matrix is ​​used to perform transformation processing on that array.

[0124] Another example of a non-separable transformation is a transformation (hypercube givens transform) in which a 4x4 input block is treated as a single array with 16 elements, and then a givens rotation is performed multiple times on the array.

[0125] In the transform performed by transform unit 106, the type of basis used for transforming into the frequency domain can be switched depending on the region within the CU. One example is SVT (Spatially Varying Transform). In SVT, as shown in FIG. 5B, a CU is divided into two equal parts horizontally or vertically, and only one of the regions is transformed into the frequency domain. The type of transform basis can be set for each region, and for example, DST7 and DCT8 are used. In this example, only one of the two regions within the CU is transformed and the other is not, but both regions may also be transformed. Furthermore, the division method can be more flexible, such as not only dividing into two equal parts, but also into four equal parts, or by separately encoding information indicating the division and signaling it in the same way as the CU division. SVT is also sometimes called SBT (Sub-block Transform).

[0126] [Quantization section] The quantization unit 108 quantizes the transform coefficients output from the transform unit 106. Specifically, the quantization unit 108 scans the transform coefficients of the current block in a predetermined scanning order and quantizes the transform coefficients based on quantization parameters (QP) corresponding to the scanned transform coefficients. The quantization unit 108 then outputs the quantized transform coefficients of the current block (hereinafter referred to as quantized coefficients) to the entropy coding unit 110 and the inverse quantization unit 112. The predetermined scanning order may be determined in advance.

[0127] The predetermined scanning order is an order for quantizing / dequantizing transform coefficients. For example, the predetermined scanning order may be defined as an ascending order of frequency (from low frequency to high frequency) or a descending order (from high frequency to low frequency).

[0128] The quantization parameter (QP) is a parameter that defines the quantization step (quantization width). For example, as the value of the quantization parameter increases, the quantization step also increases. In other words, as the value of the quantization parameter increases, the quantization error also increases.

[0129] In addition, a quantization matrix may be used for quantization. For example, several types of quantization matrices may be used corresponding to frequency transform sizes such as 4x4 and 8x8, prediction modes such as intra prediction and inter prediction, and pixel components such as luma and chroma. Note that quantization refers to digitizing values ​​sampled at predetermined intervals by associating them with predetermined levels, and in this technical field, it may be referred to using other expressions such as rounding, scaling, or the like, or rounding, rounding, or scaling may be adopted. The predetermined intervals and levels may be predetermined.

[0130] There are two methods for using a quantization matrix: one is to use a quantization matrix that is directly set on the encoding device side, and the other is to use a default quantization matrix (default matrix). By directly setting a quantization matrix on the encoding device side, it is possible to set a quantization matrix that corresponds to the characteristics of the image. However, this has the disadvantage that the amount of code increases due to the encoding of the quantization matrix.

[0131] On the other hand, there is also a method that does not use a quantization matrix and quantizes the coefficients of both high-frequency components and low-frequency components in the same way. Note that this method is equivalent to using a quantization matrix in which all coefficients have the same value (a flat matrix).

[0132] Quantization matrices may be specified, for example, in an SPS (Sequence Parameter Set) or a PPS (Picture Parameter Set). An SPS contains parameters used for a sequence, and a PPS contains parameters used for a picture. SPS and PPS are sometimes simply referred to as parameter sets.

[0133] [Entropy coding section] The entropy coding unit 110 generates a coded signal (coded bitstream) based on the quantized coefficients input from the quantization unit 108. Specifically, the entropy coding unit 110, for example, binarizes the quantized coefficients, arithmetically codes the binary signal, and outputs a compressed bitstream or sequence.

[0134] [Dequantization section] The inverse quantization unit 112 inverse quantizes the quantized coefficients input from the quantization unit 108. Specifically, the inverse quantization unit 112 inverse quantizes the quantized coefficients of the current block in a predetermined scanning order. The inverse quantization unit 112 then outputs the inverse quantized transform coefficients of the current block to the inverse transform unit 114. The predetermined scanning order may be determined in advance.

[0135] [Inverse conversion section] The inverse transform unit 114 restores prediction errors (residuals) by inverse transforming the transform coefficients input from the inverse quantization unit 112. Specifically, the inverse transform unit 114 restores prediction errors of the current block by performing an inverse transform on the transform coefficients corresponding to the transform performed by the transform unit 106. Then, the inverse transform unit 114 outputs the restored prediction errors to the adder unit 116.

[0136] Note that the restored prediction error usually loses information due to quantization, and therefore does not match the prediction error calculated by the subtraction unit 104. In other words, the restored prediction error usually contains a quantization error.

[0137] [Addition section] The adder 116 reconstructs a current block by adding the prediction error input from the inverse transformer 114 and the prediction sample input from the prediction control unit 128. The adder 116 then outputs the reconstructed block to the block memory 118 and the loop filter unit 120. The reconstructed block is sometimes called a local decoded block.

[0138] [Block Memory] The block memory 118 is a storage unit for storing, for example, blocks referenced in intra prediction and in a picture to be coded (referred to as a current picture). Specifically, the block memory 118 stores the reconstructed blocks output from the adder 116.

[0139] [Frame memory] The frame memory 122 is a storage unit for storing, for example, reference pictures used in inter prediction, and is sometimes called a frame buffer. Specifically, the frame memory 122 stores the reconstructed blocks filtered by the loop filter unit 120.

[0140] [Loop filter section] The loop filter unit 120 applies a loop filter to the block reconstructed by the adder 116 and outputs the filtered reconstructed block to the frame memory 122. The loop filter is a filter (in-loop filter) used within the encoding loop, and includes, for example, a deblocking filter (DF or DBF), a sample adaptive offset (SAO), and an adaptive loop filter (ALF).

[0141] ALF applies a least squares error filter to remove coding artifacts, for example, for each 2x2 sub-block in the current block, one filter selected from multiple filters based on local gradient direction and activity.

[0142] Specifically, first, sub-blocks (e.g., 2x2 sub-blocks) are classified into a plurality of classes (e.g., 15 or 25 classes). The sub-blocks are classified based on the gradient direction and activity. For example, a classification value C (e.g., C=5D+A) is calculated using a gradient direction value D (e.g., 0 to 2 or 0 to 4) and a gradient activity value A (e.g., 0 to 4). Then, the sub-blocks are classified into a plurality of classes based on the classification value C.

[0143] The gradient direction value D is derived by, for example, comparing gradients in multiple directions (e.g., horizontal, vertical, and two diagonal directions), and the gradient activity value A is derived by, for example, adding gradients in multiple directions and quantizing the sum.

[0144] Based on the result of such classification, a filter for the sub-block is determined from among a plurality of filters.

[0145] The filter shape used in ALF is, for example, a circularly symmetric shape. FIGS. 6A to 6C are diagrams showing several examples of filter shapes used in ALF. FIG. 6A shows a 5x5 diamond-shaped filter, FIG. 6B shows a 7x7 diamond-shaped filter, and FIG. 6C shows a 9x9 diamond-shaped filter. Information indicating the filter shape is usually signaled at the picture level. Note that signaling of the information indicating the filter shape does not need to be limited to the picture level, and may be at other levels (e.g., sequence level, slice level, tile level, CTU level, or CU level).

[0146] Whether to turn on or off ALF may be determined, for example, at the picture level or the CU level. For example, whether to apply ALF for luminance may be determined at the CU level, and whether to apply ALF for chrominance may be determined at the picture level. Information indicating whether ALF is on or off is usually signaled at the picture level or the CU level. Note that signaling of information indicating whether ALF is on or off does not need to be limited to the picture level or the CU level, and may be at another level (for example, the sequence level, the slice level, the tile level, or the CTU level).

[0147] The coefficient sets of multiple selectable filters (e.g., up to 15 or 25 filters) are typically signaled at the picture level, although the signaling of coefficient sets need not be limited to the picture level and may be at other levels (e.g., sequence level, slice level, tile level, CTU level, CU level, or sub-block level).

[0148] [Loop filter section > Deblocking filter] In the deblocking filter, the loop filter unit 120 applies a filter to the block boundaries of the reconstructed image to reduce distortion at those block boundaries.

[0149] FIG. 7 is a block diagram showing an example of a detailed configuration of the loop filter unit 120 that functions as a deblocking filter.

[0150] The loop filter unit 120 includes a boundary determination unit 1201 , a filter determination unit 1203 , a filter processing unit 1205 , a processing determination unit 1208 , a filter characteristics determination unit 1207 , and switches 1202 , 1204 and 1206 .

[0151] The boundary determination unit 1201 determines whether a pixel to be deblocking filtered (i.e., a target pixel) is located near a block boundary, and outputs the determination result to the switch 1202 and the processing determination unit 1208.

[0152] If the boundary determination unit 1201 determines that the target pixel is located near a block boundary, the switch 1202 outputs the image before filtering to the switch 1204. Conversely, if the boundary determination unit 1201 determines that the target pixel is not located near a block boundary, the switch 1202 outputs the image before filtering to the switch 1206.

[0153] The filter determination unit 1203 determines whether to perform deblocking filtering on the target pixel based on the pixel value of at least one surrounding pixel around the target pixel, and outputs the determination result to the switch 1204 and the processing determination unit 1208.

[0154] When the filter determination unit 1203 determines that deblocking filtering is to be performed on the target pixel, the switch 1204 outputs the pre-filtering image acquired via the switch 1202 to the filter processing unit 1205. Conversely, when the filter determination unit 1203 determines that deblocking filtering is not to be performed on the target pixel, the switch 1204 outputs the pre-filtering image acquired via the switch 1202 to the switch 1206.

[0155] When the filter processing unit 1205 acquires an unfiltered image via the switches 1202 and 1204, it performs deblocking filtering on the target pixel using the filter characteristics determined by the filter characteristics determination unit 1207. Then, the filter processing unit 1205 outputs the filtered pixel to the switch 1206.

[0156] The switch 1206 selectively outputs pixels that have not been subjected to deblocking filtering and pixels that have been subjected to deblocking filtering by the filter processing unit 1205 under the control of the processing determination unit 1208 .

[0157] The processing determination unit 1208 controls the switch 1206 based on the respective determination results of the boundary determination unit 1201 and the filter determination unit 1203. That is, when the boundary determination unit 1201 determines that the target pixel is located near a block boundary and the filter determination unit 1203 determines that the target pixel should be subjected to deblocking filtering, the processing determination unit 1208 causes the switch 1206 to output a pixel that has been subjected to deblocking filtering. In addition, in cases other than those described above, the processing determination unit 1208 causes the switch 1206 to output a pixel that has not been subjected to deblocking filtering. By repeatedly outputting pixels in this manner, a filtered image is output from the switch 1206.

[0158] FIG. 8 is a conceptual diagram showing an example of a deblocking filter having symmetric filter characteristics with respect to block boundaries.

[0159] In deblocking filtering, for example, pixel values ​​and quantization parameters are used to select one of two deblocking filters with different characteristics, namely, a strong filter and a weak filter. In the strong filter, when pixels p0 to p2 and pixels q0 to q2 exist on either side of a block boundary as shown in Figure 8, the pixel values ​​of pixels q0 to q2 are changed to pixel values ​​q'0 to q'2 by performing the calculation shown in the following equation, for example:

[0160] q'0=(p1+2×p0+2×q0+2×q1+q2+4) / 8 q'1=(p0+q0+q1+q2+2) / 4 q'2=(p0+q0+q1+3×q2+2×q3+4) / 8

[0161] In the above equations, p0-p2 and q0-q2 are the pixel values ​​of pixels p0-p2 and q0-q2, respectively. q3 is the pixel value of pixel q3, which is adjacent to pixel q2 on the opposite side of the block boundary. The coefficients used in the deblocking filter process on the right side of each equation above are the filter coefficients.

[0162] Furthermore, in the deblocking filter process, clipping may be performed to prevent the pixel value after calculation from exceeding a threshold. In this clipping process, the pixel value after calculation using the above formula is clipped to "the pixel value to be calculated ±2 × the threshold" using a threshold determined from the quantization parameter. This prevents excessive smoothing.

[0163] Fig. 9 is a conceptual diagram for explaining block boundaries where deblocking filtering is performed, and Fig. 10 is a conceptual diagram showing an example of a Bs value.

[0164] The block boundary where deblocking filtering is performed is, for example, the boundary of a PU (Prediction Unit) or TU (Transform Unit) of an 8x8 pixel block as shown in Figure 9. Deblocking filtering can be performed in units of four rows or four columns. First, the Boundary Strength (Bs) value is determined for block P and block Q shown in Figure 9 as shown in Figure 10.

[0165] Whether or not to perform deblocking filter processing of different strengths on block boundaries belonging to the same image is determined according to the Bs value in FIG. 10. Deblocking filter processing on the color difference signal is performed when the Bs value is 2. Deblocking filter processing on the luminance signal is performed when the Bs value is 1 or greater and a predetermined condition is satisfied. The predetermined condition may be determined in advance. Note that the conditions for determining the Bs value are not limited to those shown in FIG. 10 and may be determined based on other parameters.

[0166] [Prediction processing unit (intra prediction unit, inter prediction unit, prediction control unit)] 11 is a flowchart showing an example of processing performed in the prediction processing unit of the encoding device 100. The prediction processing unit is made up of all or some of the components of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.

[0167] The prediction processing unit generates a predicted image of the current block (step Sb_1). This predicted image is also called a predicted signal or a predicted block. The predicted signal may be, for example, an intra-prediction signal or an inter-prediction signal. Specifically, the prediction processing unit generates the predicted image of the current block using a reconstructed image already obtained by generating a predicted block, generating a difference block, generating a coefficient block, restoring the difference block, and generating a decoded image block.

[0168] The reconstructed image may be, for example, an image of a reference picture or an image of an encoded block in a current picture, which is a picture that includes the current block. The encoded block in the current picture may be, for example, a neighboring block of the current block.

[0169] FIG. 12 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device 100.

[0170] The prediction processing unit generates a predicted image using a first method (step Sc_1a), generates a predicted image using a second method (step Sc_1b), and generates a predicted image using a third method (step Sc_1c). The first method, the second method, and the third method are different methods for generating predicted images, and may be, for example, an inter-prediction method, an intra-prediction method, or another prediction method. These prediction methods may use the reconstructed image described above.

[0171] Next, the prediction processing unit selects one of the multiple predicted images generated in steps Sc_1a, Sc_1b, and Sc_1c (step Sc_2). This predicted image selection, i.e., the selection of a method or mode for obtaining a final predicted image, may be performed by calculating a cost for each generated predicted image and based on the calculated cost. Alternatively, the predicted image selection may be performed based on parameters used in the encoding process. The encoding device 100 may signal information for identifying the selected predicted image, method, or mode in an encoding signal (also referred to as an encoded bitstream). The information may be, for example, a flag. This allows the decoding device to generate a predicted image according to the method or mode selected by the encoding device 100 based on the information. Note that in the example shown in FIG. 12, the prediction processing unit generates predicted images using each method and then selects one of the predicted images. However, before generating the predicted images, the prediction processing unit may select a method or mode based on parameters used in the encoding process and generate predicted images according to the selected method or mode.

[0172] For example, the first and second methods may be intra prediction and inter prediction, respectively, and the prediction processing unit may select a final predicted image for the current block from predicted images generated according to these prediction methods.

[0173] FIG. 13 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device 100.

[0174] First, the prediction processing unit generates a predicted image by intra prediction (step Sd_1a), and generates a predicted image by inter prediction (step Sd_1b). Note that the predicted image generated by intra prediction is also called an intra predicted image, and the predicted image generated by inter prediction is also called an inter predicted image.

[0175] Next, the prediction processing unit evaluates each of the intra-predicted image and the inter-predicted image (step Sd_2). This evaluation may use a cost. That is, the prediction processing unit calculates a cost C of each of the intra-predicted image and the inter-predicted image. This cost C can be calculated using an RD optimization model formula, for example, C=D+λ×R. In this formula, D is the coding distortion of the predicted image, and is expressed, for example, by the sum of absolute differences between pixel values ​​of the current block and pixel values ​​of the predicted image. Furthermore, R is the generated code amount of the predicted image, and specifically, the code amount required for encoding motion information and the like for generating the predicted image. Furthermore, λ is, for example, Lagrange's undetermined multiplier.

[0176] Then, the prediction processing unit selects the predicted image with the smallest calculated cost C from the intra-predicted image and the inter-predicted image as the final predicted image of the current block (step Sd_3). That is, a prediction method or mode for generating a predicted image of the current block is selected.

[0177] [Intra prediction section] The intra prediction unit 124 generates a prediction signal (intra prediction signal) by performing intra prediction (also referred to as intra-picture prediction) of the current block with reference to blocks in the current picture stored in the block memory 118. Specifically, the intra prediction unit 124 generates the intra prediction signal by performing intra prediction with reference to samples (e.g., luminance values, chrominance values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 128.

[0178] For example, the intra prediction unit 124 performs intra prediction using one of a plurality of predetermined intra prediction modes. The plurality of intra prediction modes typically includes one or more non-directional prediction modes and a plurality of directional prediction modes. The plurality of predetermined modes may be predetermined.

[0179] The one or more non-directional prediction modes include, for example, a planar prediction mode and a DC prediction mode defined in the H.265 / HEVC standard.

[0180] The multiple directional prediction modes include, for example, the 33 prediction modes defined in the H.265 / HEVC standard. Note that the multiple directional prediction modes may also include 32 prediction modes in addition to the 33 directions (a total of 65 directional prediction modes). Figure 14 is a conceptual diagram showing all 67 intra prediction modes (two non-directional prediction modes and 65 directional prediction modes) that can be used in intra prediction. Solid arrows represent the 33 directions defined in the H.265 / HEVC standard, and dashed arrows represent the additional 32 directions (the two non-directional prediction modes are not shown in Figure 14).

[0181] In various processing examples, a luminance block may be referenced in intra prediction of a chrominance block. That is, the chrominance component of the current block may be predicted based on the luminance component of the current block. Such intra prediction may be referred to as CCLM (cross-component linear model) prediction. An intra prediction mode of the chrominance block that references such a luminance block (e.g., referred to as a CCLM mode) may be added as one of the intra prediction modes of the chrominance block.

[0182] The intra prediction unit 124 may correct pixel values ​​after intra prediction based on gradients of reference pixels in the horizontal / vertical directions. Intra prediction involving such correction is sometimes called PDPC (position dependent intra prediction combination). Information indicating whether PDPC is applied (e.g., called a PDPC flag) is usually signaled at the CU level. Note that signaling of this information does not need to be limited to the CU level, and may be at other levels (e.g., sequence level, picture level, slice level, tile level, or CTU level).

[0183] [Inter prediction section] The inter prediction unit 126 generates a prediction signal (inter prediction signal) by performing inter prediction (also referred to as inter prediction) on the current block with reference to a reference picture stored in the frame memory 122 that is different from the current picture. The inter prediction is performed in units of the current block or a current sub-block (e.g., a 4x4 block) within the current block. For example, the inter prediction unit 126 performs motion estimation for the current block or current sub-block within the reference picture to find a reference block or sub-block that best matches the current block or current sub-block. The inter prediction unit 126 then obtains motion information (e.g., a motion vector) that compensates for the movement or change from the reference block or sub-block to the current block or sub-block. The inter prediction unit 126 performs motion compensation (or motion prediction) based on the motion information to generate an inter prediction signal for the current block or sub-block. The inter prediction unit 126 outputs the generated inter prediction signal to the prediction control unit 128.

[0184] The motion information used for motion compensation may be signaled as an inter prediction signal in various forms, such as a motion vector, or as a difference between a motion vector and a motion vector predictor.

[0185] [Basic flow of inter prediction] FIG. 15 is a flowchart showing an example of the basic flow of inter prediction.

[0186] The inter prediction unit 126 first generates a predicted image (steps Se_1 to Se_3). Next, the subtraction unit 104 generates a difference between the current block and the predicted image as a prediction residual (step Se_4).

[0187] Here, in generating a predicted image, the inter prediction unit 126 determines a motion vector (MV) of the current block (steps Se_1 and Se_2) and performs motion compensation (step Se_3) to generate the predicted image. In determining an MV, the inter prediction unit 126 determines the MV by selecting a candidate motion vector (candidate MV) (step Se_1) and deriving the MV (step Se_2). The selection of a candidate MV is performed, for example, by selecting at least one candidate MV from a candidate MV list. In deriving an MV, the inter prediction unit 126 may further select at least one candidate MV from the at least one candidate MV and determine the selected at least one candidate MV as the MV of the current block. Alternatively, the inter prediction unit 126 may determine the MV of the current block by searching, for each of the selected at least one candidate MV, a region of a reference picture indicated by the candidate MV. Note that searching the region of this reference picture may be referred to as motion estimation.

[0188] In the above example, steps Se_1 to Se_3 are performed by the inter prediction unit 126, but the processing of step Se_1 or step Se_2, for example, may be performed by another component included in the encoding device 100.

[0189] [Motion vector derivation flow] FIG. 16 is a flowchart showing an example of motion vector derivation.

[0190] The inter prediction unit 126 derives the MV of the current block in a mode in which motion information (e.g., MV) is coded. In this case, for example, the motion information is coded as a prediction parameter and signaled. That is, the coded motion information is included in a coded signal (also called a coded bitstream).

[0191] Alternatively, the inter prediction unit 126 derives the MV in a mode in which motion information is not coded. In this case, the motion information is not included in the coded signal.

[0192] Here, MV derivation modes may include normal inter mode, merge mode, FRUC mode, and affine mode, which will be described later. Among these modes, modes that encode motion information include normal inter mode, merge mode, and affine mode (specifically, affine inter mode and affine merge mode). Note that the motion information may include not only MV but also predicted motion vector selection information, which will be described later. Also, modes that do not encode motion information include FRUC mode. The inter prediction unit 126 selects a mode for deriving the MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.

[0193] FIG. 17 is a flowchart showing another example of motion vector derivation.

[0194] The inter prediction unit 126 derives the MV of the current block in a differential MV encoding mode. In this case, for example, the differential MV is encoded as a prediction parameter and signaled. That is, the encoded differential MV is included in the encoded signal. This differential MV is the difference between the MV of the current block and its predicted MV.

[0195] Alternatively, the inter prediction unit 126 derives the MV in a mode in which the differential MV is not coded. In this case, the coded differential MV is not included in the coded signal.

[0196] As described above, MV derivation modes include normal inter, merge mode, FRUC mode, and affine mode, which will be described later. Among these modes, modes that encode differential MVs include normal inter mode and affine mode (specifically, affine inter mode). Modes that do not encode differential MVs include FRUC mode, merge mode, and affine mode (specifically, affine merge mode). The inter prediction unit 126 selects a mode for deriving the MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.

[0197] [Motion vector derivation flow] 18 is a flowchart showing another example of motion vector derivation. MV derivation modes, i.e., inter prediction modes, include a plurality of modes, roughly divided into a mode in which a differential MV is coded and a mode in which a differential motion vector is not coded. Modes in which a differential MV is not coded include merge mode, FRUC mode, and affine mode (specifically, affine merge mode). Details of these modes will be described later, but simply put, merge mode is a mode in which the MV of the current block is derived by selecting a motion vector from a surrounding coded block, and FRUC mode is a mode in which the MV of the current block is derived by searching between coded regions. Furthermore, affine mode is a mode in which, assuming affine transformation, the motion vector of each of a plurality of sub-blocks constituting the current block is derived as the MV of the current block.

[0198] Specifically, as shown in the figure, when the inter prediction mode information indicates 0 (0 in Sf_1), the inter prediction unit 126 derives a motion vector using merge mode (Sf_2). Also, when the inter prediction mode information indicates 1 (1 in Sf_1), the inter prediction unit 126 derives a motion vector using FRUC mode (Sf_3). Also, when the inter prediction mode information indicates 2 (2 in Sf_1), the inter prediction unit 126 derives a motion vector using affine mode (specifically, affine merge mode) (Sf_4). Also, when the inter prediction mode information indicates 3 (3 in Sf_1), the inter prediction unit 126 derives a motion vector using a mode for encoding a differential MV (for example, normal inter mode) (Sf_5).

[0199] [MV Derivation > Normal Intermode] The normal inter mode is an inter prediction mode in which the MV of the current block is derived based on a block similar to the image of the current block from the region of the reference picture indicated by the candidate MV. In addition, in this normal inter mode, the differential MV is coded.

[0200] FIG. 19 is a flowchart showing an example of inter prediction in normal inter mode.

[0201] The inter prediction unit 126 first obtains multiple candidate MVs for the current block based on information such as MVs of multiple coded blocks temporally or spatially surrounding the current block (step Sg_1). That is, the inter prediction unit 126 creates a candidate MV list.

[0202] Next, the inter prediction unit 126 extracts N candidate MVs (N is an integer equal to or greater than 2) from the plurality of candidate MVs acquired in step Sg_1 as motion vector predictor candidates (also referred to as predicted MV candidates) according to a predetermined priority order (step Sg_2). Note that the priority order may be predetermined for each of the N candidate MVs.

[0203] Next, the inter prediction unit 126 selects one motion vector predictor candidate from the N motion vector predictor candidates as a motion vector predictor (also referred to as a predicted MV) of the current block (step Sg_3). At this time, the inter prediction unit 126 encodes motion vector predictor selection information for identifying the selected motion vector predictor into a stream. Note that the stream is the above-mentioned coded signal or coded bitstream.

[0204] Next, the inter prediction unit 126 derives the motion vector (MV) of the current block by referring to the coded reference picture (step Sg_4). At this time, the inter prediction unit 126 further encodes the difference between the derived motion vector and the predicted motion vector as a differential motion vector into a stream. Note that the coded reference picture is a picture made up of multiple blocks reconstructed after coding.

[0205] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture to generate a predicted image of the current block (step Sg_5). Note that the predicted image is the above-mentioned inter prediction signal.

[0206] Furthermore, information indicating the inter prediction mode (normal inter mode in the above example) used to generate the predicted image, which is included in the coded signal, is coded as, for example, a prediction parameter.

[0207] The candidate MV list may be used in common with lists used in other modes. Furthermore, processing related to the candidate MV list may be applied to processing related to lists used in other modes. Examples of processing related to this candidate MV list include extracting or selecting candidate MVs from the candidate MV list, sorting the candidate MVs, or deleting candidate MVs.

[0208] [MV Derivation > Merge Mode] Merge mode is an inter prediction mode in which a candidate MV is derived from a candidate MV list as the MV for the current block.

[0209] FIG. 20 is a flowchart showing an example of inter prediction in merge mode.

[0210] The inter prediction unit 126 first obtains multiple candidate MVs for the current block based on information such as MVs of multiple coded blocks temporally or spatially surrounding the current block (step Sh_1). That is, the inter prediction unit 126 creates a candidate MV list.

[0211] Next, the inter prediction unit 126 derives the MV of the current block by selecting one candidate MV from the multiple candidate MVs obtained in step Sh_1 (step Sh_2). At this time, the inter prediction unit 126 encodes MV selection information for identifying the selected candidate MV into the stream.

[0212] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture to generate a predicted image of the current block (step Sh_3).

[0213] Furthermore, information indicating the inter prediction mode (merge mode in the above example) used to generate the predicted image, which is included in the coded signal, is coded as, for example, a prediction parameter.

[0214] FIG. 21 is a conceptual diagram illustrating an example of a motion vector derivation process for a current picture in merge mode.

[0215] First, a prediction MV list is generated in which prediction MV candidates are registered. The prediction MV candidates include spatially adjacent prediction MVs, which are MVs held by multiple coded blocks spatially located around the target block, temporally adjacent prediction MVs, which are MVs held by blocks in the vicinity of the target block projected onto the coded reference picture, joint prediction MVs, which are MVs generated by combining the MV values ​​of the spatially adjacent prediction MVs and the temporally adjacent prediction MVs, and zero prediction MVs, which are MVs with a value of zero.

[0216] Next, one predicted MV is selected from the plurality of predicted MVs registered in the predicted MV list, and is determined as the MV for the target block.

[0217] Furthermore, the variable length coding unit encodes merge_idx, which is a signal indicating which predicted MV has been selected, into the stream.

[0218] Note that the predicted MVs registered in the predicted MV list described in Figure 21 are just an example, and the number may be different from the number shown in the figure, the configuration may not include some of the types of predicted MVs shown in the figure, or the configuration may include predicted MVs other than the types of predicted MVs shown in the figure.

[0219] The final MV may be determined by performing a DMVR (decoder motion vector refinement) process, which will be described later, using the MV of the current block derived in the merge mode.

[0220] Note that the prediction MV candidates are the above-mentioned candidate MVs, and the prediction MV list is the above-mentioned candidate MV list. The candidate MV list may also be referred to as a candidate list. Furthermore, merge_idx is MV selection information.

[0221] [MV derivation > FRUC mode] The motion information may be derived on the decoding device side without being signaled from the encoding device side. As described above, the merge mode defined in the H.265 / HEVC standard may be used. Alternatively, the motion information may be derived by performing motion estimation on the decoding device side. In an embodiment, the motion estimation is performed on the decoding device side without using pixel values ​​of the current block.

[0222] Here, a mode in which motion estimation is performed on the decoding device side will be described. This mode in which motion estimation is performed on the decoding device side is sometimes called a pattern matched motion vector derivation (PMMVD) mode or a frame rate up-conversion (FRUC) mode.

[0223] FIG. 22 shows an example of the FRUC process in the form of a flowchart. First, a list of multiple candidates (i.e., a candidate MV list, which may be common to the merge list) each having a predicted motion vector (MV) is generated with reference to the motion vectors of coded blocks spatially or temporally adjacent to the current block (step Si_1). Next, a best candidate MV is selected from the multiple candidate MVs registered in the candidate MV list (step Si_2). For example, an evaluation value of each candidate MV included in the candidate MV list is calculated, and one candidate MV is selected based on the evaluation value. Then, a motion vector for the current block is derived based on the motion vector of the selected candidate (step Si_4). Specifically, for example, the motion vector of the selected candidate (best candidate MV) is derived as is as the motion vector for the current block. Alternatively, for example, the motion vector for the current block may be derived by performing pattern matching in a peripheral area of ​​a position in a reference picture corresponding to the motion vector of the selected candidate. That is, a search is performed on the area surrounding the best candidate MV using pattern matching and evaluation values ​​in the reference picture, and if an MV with a better evaluation value is found, the best candidate MV is updated to that MV and used as the final MV for the current block. It is also possible to configure the system without performing the process of updating to an MV with a better evaluation value.

[0224] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture, thereby generating a predicted image of the current block (step Si_5).

[0225] The same processing may be performed when processing is performed in sub-block units.

[0226] The evaluation value may be calculated by various methods. For example, a reconstructed image of a region in a reference picture corresponding to the motion vector is compared with a reconstructed image of a predetermined region (which may be, for example, a region in another reference picture or a region of an adjacent block in the current picture, as shown below). The predetermined region may be predetermined.

[0227] Then, the difference between the pixel values ​​of the two reconstructed images may be calculated and used as an evaluation value for the motion vector. Note that the evaluation value may be calculated using other information in addition to the difference value.

[0228] Next, an example of pattern matching will be described in detail. First, one candidate MV included in a candidate MV list (e.g., a merge list) is selected as a starting point for search by pattern matching. For example, first pattern matching or second pattern matching can be used as pattern matching. The first pattern matching and the second pattern matching are sometimes called bilateral matching and template matching, respectively.

[0229] [MV derivation > FRUC > Bilateral matching] In the first pattern matching, pattern matching is performed between two blocks in two different reference pictures that are along the motion trajectory of the current block. Therefore, in the first pattern matching, an area in another reference picture that is along the motion trajectory of the current block is used as a predetermined area for calculating the evaluation value of the candidate. The predetermined area may be determined in advance.

[0230] 23 is a conceptual diagram illustrating an example of first pattern matching (bilateral matching) between two blocks in two reference pictures along a motion trajectory. As shown in FIG. 23, in the first pattern matching, two motion vectors (MV0, MV1) are derived by searching for a pair of blocks that best match among pairs of two blocks in two different reference pictures (Ref0, Ref1) along the motion trajectory of a current block (Cur block). Specifically, for the current block, a difference is derived between a reconstructed image at a specified position in a first coded reference picture (Ref0) specified by a candidate MV and a reconstructed image at a specified position in a second coded reference picture (Ref1) specified by a symmetric MV obtained by scaling the candidate MV by the display time interval, and an evaluation value is calculated using the obtained difference value. It is possible to select the candidate MV with the best evaluation value among multiple candidate MVs as the final MV, which can lead to good results.

[0231] Under the assumption of continuous motion trajectories, motion vectors (MV0, MV1) pointing to two reference blocks are proportional to the temporal distances (TD0, TD1) between a current picture (CurPic) and two reference pictures (Ref0, Ref1). For example, if the current picture is located between two reference pictures temporally and the temporal distances from the current picture to the two reference pictures are equal, the first pattern matching derives bidirectional motion vectors that are mirror-symmetric.

[0232] [MV derivation > FRUC > template matching] In the second pattern matching (template matching), pattern matching is performed between a template in the current picture (a block adjacent to the current block in the current picture (e.g., an upper and / or left adjacent block)) and a block in the reference picture. Therefore, in the second pattern matching, the block adjacent to the current block in the current picture is used as a predetermined area for calculating the evaluation value of the above-mentioned candidate.

[0233] 24 is a conceptual diagram for explaining an example of pattern matching (template matching) between a template in a current picture and a block in a reference picture. As shown in FIG. 24, in the second pattern matching, a motion vector of a current block is derived by searching a reference picture (Ref0) for a block that best matches a block adjacent to a current block (Cur block) in the current picture (Cur Pic). Specifically, a difference is derived between a reconstructed image of both or either of the coded areas adjacent to the left and / or above the current block and a reconstructed image at the same position in the coded reference picture (Ref0) specified by a candidate MV, an evaluation value is calculated using the obtained difference value, and the candidate MV with the best evaluation value among the multiple candidate MVs can be selected as the best candidate MV.

[0234] Information indicating whether such a FRUC mode is applied (e.g., referred to as an FRUC flag) may be signaled at the CU level. Also, when the FRUC mode is applied (e.g., when the FRUC flag is true), information indicating an applicable pattern matching method (first pattern matching or second pattern matching) may be signaled at the CU level. Note that signaling of this information does not need to be limited to the CU level, and may be at other levels (e.g., the sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0235] [MV Derivation > Affine Mode] Next, we will explain the affine mode, which derives a motion vector for each sub-block based on the motion vectors of multiple neighboring blocks. This mode is sometimes called an affine motion compensation prediction mode.

[0236] FIG. 25A is a conceptual diagram illustrating an example of derivation of a motion vector for each sub-block based on the motion vectors of multiple adjacent blocks. In FIG. 25A, the current block includes 16 4x4 sub-blocks. Here, a motion vector v0 of the upper left corner control point of the current block is derived based on the motion vectors of the adjacent blocks, and similarly, a motion vector v1 of the upper right corner control point of the current block is derived based on the motion vectors of the adjacent sub-blocks. Then, the two motion vectors v0 and v1 may be projected according to the following equation (1A), and the motion vectors (v x ,v y ) may be derived.

[0237]

number

[0238] Here, x and y respectively represent the horizontal and vertical positions of the sub-block, and w represents a predetermined weighting factor, which may be determined in advance.

[0239] Such information indicating the affine mode (e.g., called an affine flag) may be signaled at the CU level. Note that the signaling of the information indicating the affine mode does not need to be limited to the CU level, and may be at other levels (e.g., the sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0240] In addition, such affine modes may include several modes that differ in the method of deriving the motion vectors of the top-left and top-right corner control points. For example, the affine mode includes two modes: affine inter (also called affine normal inter) mode and affine merge mode.

[0241] [MV Derivation > Affine Mode] FIG. 25B is a conceptual diagram illustrating an example of derivation of motion vectors for each sub-block in an affine mode having three control points. In FIG. 25B, the current block includes 16 4x4 sub-blocks. Here, a motion vector v0 for the upper left corner control point of the current block is derived based on the motion vector of an adjacent block. Similarly, a motion vector v1 for the upper right corner control point of the current block is derived based on the motion vector of the adjacent block, and a motion vector v2 for the lower left corner control point of the current block is derived based on the motion vector of the adjacent block. Then, the three motion vectors v0, v1, and v2 may be projected using the following equation (1B), and the motion vectors (v x ,v y ) may be derived.

[0242]

number

[0243] Here, x and y respectively indicate the horizontal and vertical positions of the center of the sub-block, w indicates the width of the current block, and h indicates the height of the current block.

[0244] Affine modes with different numbers of control points (e.g., two and three) may be switched and signaled at the CU level. Note that information indicating the number of control points of the affine mode used at the CU level may also be signaled at other levels (e.g., sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0245] In addition, the affine mode having such three control points may include several modes that differ in the method of deriving the motion vectors of the upper-left, upper-right, and lower-left corner control points. For example, the affine mode includes two modes: affine inter (also called affine normal inter) mode and affine merge mode.

[0246] [MV Derivation > Affine Merge Mode] 26A, 26B, and 26C are conceptual diagrams for explaining the affine merge mode.

[0247] In affine merge mode, as shown in Figure 26A, for example, among the coded blocks A (left), B (top), C (top right), D (bottom left) and E (top left) adjacent to the current block, the predicted motion vectors of each control point of the current block are calculated based on a plurality of motion vectors corresponding to the blocks coded in affine mode. Specifically, these blocks are examined in the order of coded block A (left), B (top), C (top right), D (bottom left) and E (top left), and the first valid block coded in affine mode is identified. Based on a plurality of motion vectors corresponding to this identified block, the predicted motion vector of the control point of the current block is calculated.

[0248] For example, as shown in Figure 26B, when block A adjacent to the left of the current block is coded in affine mode with two control points, motion vectors v3 and v4 are derived by projecting them to the positions of the upper left and upper right corners of the coded block including block A. Then, from the derived motion vectors v3 and v4, a predicted motion vector v0 of the control point at the upper left corner of the current block and a predicted motion vector v1 of the control point at the upper right corner are calculated.

[0249] For example, as shown in Figure 26C, when the block A adjacent to the left of current block is coded in the affine mode with three control points, derive the motion vectors v3, v4 and v5 that are projected to the upper left corner, upper right corner and lower left corner positions of the coded block that includes block A.Then, from the derived motion vectors v3, v4 and v5, calculate the predicted motion vector v0 of the control point at the upper left corner of current block, the predicted motion vector v1 of the control point at the upper right corner and the predicted motion vector v2 of the control point at the lower left corner.

[0250] Note that this motion vector predictor derivation method may be used to derive motion vector predictors for the control points of the current block in step Sj_1 of FIG. 29, which will be described later.

[0251] FIG. 27 is a flowchart showing an example of the affine merge mode.

[0252] In the affine merge mode, as shown in the figure, first, the inter prediction unit 126 derives prediction MVs for each control point of the current block (step Sk_1). The control points are the upper left and upper right corners of the current block as shown in Figure 25A, or the upper left, upper right, and lower left corners of the current block as shown in Figure 25B.

[0253] That is, the inter prediction unit 126 examines the coded blocks in the order of block A (left), block B (top), block C (top right), block D (bottom left) and block E (top left), as shown in Figure 26A, and identifies the first valid block coded in affine mode.

[0254] Then, when block A is identified and has two control points, as shown in Figure 26B, the inter prediction unit 126 calculates the motion vector v0 of the control point in the upper left corner of the current block and the motion vector v1 of the control point in the upper right corner from the motion vectors v3 and v4 of the upper left corner and upper right corner of the coded block including block A. For example, the inter prediction unit 126 calculates the predicted motion vector v0 of the control point in the upper left corner of the current block and the predicted motion vector v1 of the control point in the upper right corner by projecting the motion vectors v3 and v4 of the upper left corner and upper right corner of the coded block onto the current block.

[0255] Alternatively, when block A is identified and block A has three control points, as shown in Figure 26C, the inter prediction unit 126 calculates the motion vector v0 of the control point of the upper left corner, the motion vector v1 of the control point of the upper right corner, and the motion vector v2 of the control point of the lower left corner of the current block from the motion vectors v3, v4, and v5 of the upper left corner, upper right corner, and lower left corner of the coded block including block A. For example, the inter prediction unit 126 calculates the predicted motion vector v0 of the control point of the upper left corner, the predicted motion vector v1 of the control point of the upper right corner, and the motion vector v2 of the control point of the lower left corner of the current block by projecting the motion vectors v3, v4, and v5 of the upper left corner, upper right corner, and lower left corner of the coded block onto the current block.

[0256] Next, the inter prediction unit 126 performs motion compensation on each of the multiple sub-blocks included in the current block. That is, for each of the multiple sub-blocks, the inter prediction unit 126 calculates the motion vector of the sub-block as an affine MV using two predicted motion vectors v0 and v1 and the above-mentioned formula (1A), or three predicted motion vectors v0, v1, and v2 and the above-mentioned formula (1B) (step Sk_2). Then, the inter prediction unit 126 performs motion compensation on the sub-block using the affine MVs and coded reference pictures (step Sk_3). As a result, motion compensation is performed on the current block, and a predicted image of the current block is generated.

[0257] [MV Derivation > Affine Intermode] FIG. 28A is a conceptual diagram illustrating an affine inter mode having two control points.

[0258] In this affine inter mode, as shown in Figure 28A, a motion vector selected from the motion vectors of coded blocks A, B, and C adjacent to the current block is used as the predicted motion vector v0 for the control point in the upper left corner of the current block. Similarly, a motion vector selected from the motion vectors of coded blocks D and E adjacent to the current block is used as the predicted motion vector v1 for the control point in the upper right corner of the current block.

[0259] FIG. 28B is a conceptual diagram for explaining an affine inter mode having three control points.

[0260] In this affine inter mode, as shown in Figure 28B, a motion vector selected from the motion vectors of coded blocks A, B, and C adjacent to the current block is used as the predicted motion vector v0 of the control point in the upper left corner of the current block.Similarly, a motion vector selected from the motion vectors of coded blocks D and E adjacent to the current block is used as the predicted motion vector v1 of the control point in the upper right corner of the current block.Furthermore, a motion vector selected from the motion vectors of coded blocks F and G adjacent to the current block is used as the predicted motion vector v2 of the control point in the lower left corner of the current block.

[0261] FIG. 29 is a flowchart showing an example of the affine inter mode.

[0262] As shown in the figure, in the affine inter mode, first, the inter prediction unit 126 derives predicted MVs (v0, v1) or (v0, v1, v2) of two or three control points of the current block (step Sj_1). The control points are the upper left corner, upper right corner, or lower left corner of the current block, as shown in Figure 25A or 25B.

[0263] That is, the inter prediction unit 126 derives the predicted motion vector (v0, v1) or (v0, v1, v2) of the control point of the current block by selecting the motion vector of any of the coded blocks near each control point of the current block shown in Figure 28A or 28B. At this time, the inter prediction unit 126 codes predicted motion vector selection information for identifying the two selected motion vectors into a stream.

[0264] For example, the inter prediction unit 126 may use cost evaluation or the like to determine which block's motion vector from the coded blocks adjacent to the current block to select as the predicted motion vector for the control point, and may write a flag indicating which predicted motion vector has been selected in the bitstream.

[0265] Next, the inter prediction unit 126 performs motion search (steps Sj_3 and Sj_4) while updating each predicted motion vector selected or derived in step Sj_1 (step Sj_2). That is, the inter prediction unit 126 calculates the motion vector of each sub-block corresponding to the predicted motion vector to be updated as an affine MV using the above-mentioned formula (1A) or (1B) (step Sj_3). Then, the inter prediction unit 126 performs motion compensation for each sub-block using the affine MVs and coded reference pictures (step Sj_4). As a result, the inter prediction unit 126 determines, for example, the predicted motion vector that obtains the smallest cost in the motion search loop as the motion vector of the control point (step Sj_5). At this time, the inter prediction unit 126 further encodes the difference values ​​between the determined MVs and the predicted motion vectors into a stream as differential MVs.

[0266] Finally, the inter prediction unit 126 performs motion compensation on the current block using the determined MV and the coded reference picture, thereby generating a predicted image of the current block (step Sj_6).

[0267] [MV Derivation > Affine Intermode] When affine modes with different numbers of control points (for example, two and three) are switched and signaled at the CU level, the number of control points may differ between the coded block and the current block. Figures 30A and 30B are conceptual diagrams for explaining a method of deriving a predicted vector for a control point when the number of control points differs between the coded block and the current block.

[0268] For example, as shown in Figure 30A, when current block has three control points, which are upper left corner, upper right corner and lower left corner, and the block A adjacent to the left of current block is coded in affine mode with two control points, derive motion vectors v3 and v4 that are projected to the upper left corner and upper right corner positions of the coded block including block A.Then, from the derived motion vectors v3 and v4, calculate the predicted motion vector v0 of the control point at the upper left corner of current block and the predicted motion vector v1 of the control point at the upper right corner.Furthermore, from the derived motion vectors v0 and v1, calculate the predicted motion vector v2 of the control point at the lower left corner.

[0269] For example, as shown in Figure 30B, if current block has two control points at the upper left corner and the upper right corner, and the block A adjacent to the left of current block is coded in affine mode with three control points, then derive motion vectors v3, v4 and v5 that are projected to the upper left corner, upper right corner and lower left corner positions of the coded block including block A.Then, from the derived motion vectors v3, v4 and v5, calculate the predicted motion vector v0 of the control point at the upper left corner of current block and the predicted motion vector v1 of the control point at the upper right corner.

[0270] This motion vector predictor derivation method may be used to derive the motion vector predictor for each control point of the current block in step Sj_1 of FIG.

[0271] [MV Derivation > DMVR] FIG. 31A is a flowchart showing the relationship between merge mode and DMVR.

[0272] The inter prediction unit 126 derives a motion vector for the current block in merge mode (step Sl_1). Next, the inter prediction unit 126 determines whether or not to search for a motion vector, i.e., perform motion search (step Sl_2). Here, if the inter prediction unit 126 determines not to perform motion search (No in step Sl_2), it determines the motion vector derived in step Sl_1 as the final motion vector for the current block (step Sl_4). That is, in this case, the motion vector for the current block is determined in merge mode.

[0273] On the other hand, if it is determined in step Sl_1 that a motion search is to be performed (Yes in step Sl_2), the inter prediction unit 126 derives a final motion vector for the current block by searching a peripheral area of ​​the reference picture indicated by the motion vector derived in step Sl_1 (step Sl_3). That is, in this case, the motion vector of the current block is determined by DMVR.

[0274] FIG. 31B is a conceptual diagram for explaining an example of DMVR processing for determining an MV.

[0275] First, the optimal MVP set for the current block (for example, in merge mode) is set as the candidate MV. Then, reference pixels are identified from the first reference picture (L0), which is an encoded picture in the L0 direction, according to the candidate MV (L0). Similarly, reference pixels are identified from the second reference picture (L1), which is an encoded picture in the L1 direction, according to the candidate MV (L1). A template is generated by averaging these reference pixels.

[0276] Next, the template is used to search the surrounding areas of the candidate MVs in the first reference picture (L0) and the second reference picture (L1), and the MV with the smallest cost is determined as the final MV. Note that the cost value may be calculated using, for example, the difference value between each pixel value of the template and each pixel value of the search area, the candidate MV value, etc.

[0277] Typically, the encoding device and the decoding device described below basically have the same configuration and operation for the processing described here.

[0278] Any processing may be used, not limited to the processing example described here, as long as it is a processing that can search around the candidate MVs and derive the final MV.

[0279] [Motion Compensation > BIO / OBMC] Motion compensation includes modes in which a predicted image is generated and then corrected, such as BIO and OBMC, which will be described later.

[0280] FIG. 32 is a flowchart showing an example of generation of a predicted image.

[0281] The inter prediction unit 126 generates a predicted image (step Sm_1) and corrects the predicted image using, for example, one of the modes described above (step Sm_2).

[0282] FIG. 33 is a flowchart showing another example of generation of a predicted image.

[0283] The inter prediction unit 126 determines a motion vector of the current block (step Sn_1). Next, the inter prediction unit 126 generates a predicted image (step Sn_2) and determines whether or not to perform correction processing (step Sn_3). Here, if the inter prediction unit 126 determines to perform correction processing (Yes in step Sn_3), it corrects the predicted image to generate a final predicted image (step Sn_4). On the other hand, if the inter prediction unit 126 determines not to perform correction processing (No in step Sn_3), it outputs the predicted image as the final predicted image without correcting it (step Sn_5).

[0284] Furthermore, motion compensation has a mode in which luminance is corrected when generating a predicted image, such as LIC, which will be described later.

[0285] FIG. 34 is a flowchart showing another example of generation of a predicted image.

[0286] The inter prediction unit 126 derives a motion vector of the current block (step So_1). Next, the inter prediction unit 126 determines whether or not to perform luminance correction processing (step So_2). Here, if the inter prediction unit 126 determines to perform luminance correction processing (Yes in step So_2), it generates a predicted image while performing luminance correction (step So_3). That is, the predicted image is generated by LIC. On the other hand, if the inter prediction unit 126 determines not to perform luminance correction processing (No in step So_2), it generates a predicted image by normal motion compensation without performing luminance correction (step So_4).

[0287] [Motion Compensation > OBMC] An inter-prediction signal may be generated using not only the motion information of the current block obtained by motion estimation but also the motion information of the neighboring blocks. Specifically, the inter-prediction signal may be generated for each sub-block in the current block by weighting and adding a prediction signal based on the motion information obtained by motion estimation (in the reference picture) and a prediction signal based on the motion information of the neighboring blocks (in the current picture). Such inter-prediction (motion compensation) may be called OBMC (overlapped block motion compensation).

[0288] In the OBMC mode, information indicating the size of a sub-block for OBMC (e.g., referred to as an OBMC block size) may be signaled at the sequence level. Furthermore, information indicating whether the OBMC mode is applied (e.g., referred to as an OBMC flag) may be signaled at the CU level. Note that the signaling level of this information is not limited to the sequence level and the CU level, and may be other levels (e.g., the picture level, slice level, tile level, CTU level, or sub-block level).

[0289] An example of the OBMC mode will now be described in more detail. Figures 35 and 36 are a flowchart and a conceptual diagram for explaining an outline of the predictive image correction process using the OBMC process.

[0290] First, as shown in Fig. 36, a predicted image (Pred) is obtained by normal motion compensation using a motion vector (MV) assigned to a current block to be processed. In Fig. 36, the arrow "MV" indicates a reference picture, indicating what the current block of the current picture refers to in order to obtain a predicted image.

[0291] Next, the motion vector (MV_L) already derived for the coded left adjacent block is applied (reused) to the current block to obtain a predicted image (Pred_L). The motion vector (MV_L) is indicated by an arrow "MV_L" pointing from the current block to the reference picture. The first correction of the predicted image is then performed by superimposing the two predicted images Pred and Pred_L. This has the effect of blending the boundaries between the adjacent blocks.

[0292] Similarly, a motion vector (MV_U) already derived for the coded upper adjacent block is applied (reused) to the current block to obtain a predicted image (Pred_U). The motion vector (MV_U) is indicated by an arrow "MV_U" pointing from the current block to the reference picture. The predicted image Pred_U is then superimposed on the predicted image (e.g., Pred and Pred_L) that has undergone the first correction, thereby performing a second correction of the predicted image. This has the effect of blending the boundaries between adjacent blocks. The predicted image obtained by the second correction is the final predicted image of the current block, with the boundaries with the adjacent blocks blended (smoothed).

[0293] Note that the above example is a two-pass correction method using the left-adjacent and above-adjacent blocks, but the correction method may also be a three-pass or more-pass correction method using the right-adjacent and / or below-adjacent blocks.

[0294] The area to be superimposed does not have to be the pixel area of ​​the entire block, but may be only a part of the area near the block boundary.

[0295] Here, the OBMC predicted image correction process has been described, in which additional predicted images Pred_L and Pred_U are superimposed from one reference picture to obtain one predicted image Pred. However, when a predicted image is corrected based on multiple reference pictures, the same process may be applied to each of the multiple reference pictures. In such a case, the OBMC image correction based on multiple reference pictures is performed to obtain a corrected predicted image from each reference picture, and then the obtained multiple corrected predicted images are further superimposed to obtain a final predicted image.

[0296] In OBMC, the unit of the current block may be a prediction block unit or a sub-block unit obtained by further dividing the prediction block.

[0297] One method for determining whether to apply OBMC processing is to use obmc_flag, which is a signal indicating whether to apply OBMC processing. As a specific example, the encoding device may determine whether the current block belongs to an area with complex motion. If the current block belongs to an area with complex motion, the encoding device sets the value of obmc_flag to 1 and applies OBMC processing to perform encoding. If the current block does not belong to an area with complex motion, the encoding device sets the value of obmc_flag to 0 and performs encoding of the block without applying OBMC processing. Meanwhile, the decoding device decodes obmc_flag described in a stream (e.g., a compressed sequence) and switches whether to apply OBMC processing depending on the value, and performs decoding.

[0298] In the above example, the inter prediction unit 126 generates one rectangular predicted image for the rectangular current block. However, the inter prediction unit 126 may generate multiple predicted images of shapes other than a rectangle for the rectangular current block and combine the multiple predicted images to generate a final rectangular predicted image. The shape other than a rectangle may be, for example, a triangle.

[0299] FIG. 37 is a conceptual diagram for explaining generation of predicted images of two triangles.

[0300] The inter prediction unit 126 generates a triangular predicted image by performing motion compensation on a first partition of a triangle in the current block using a first MV of the first partition. Similarly, the inter prediction unit 126 generates a triangular predicted image by performing motion compensation on a second partition of a triangle in the current block using a second MV of the second partition. The inter prediction unit 126 then combines these predicted images to generate a predicted image that is the same rectangle as the current block.

[0301] In the example shown in Figure 37, the first and second partitions are each triangular, but they may also be trapezoidal, or may have different shapes. Furthermore, in the example shown in Figure 37, the current block is made up of two partitions, but it may also be made up of three or more partitions.

[0302] The first and second partitions may overlap, i.e., the first and second partitions may include the same pixel area. In this case, a predicted image for the current block may be generated using a predicted image for the first partition and a predicted image for the second partition.

[0303] Furthermore, although this example shows an example in which predicted images are generated by inter prediction for both of the two partitions, predicted images may be generated by intra prediction for at least one partition.

[0304] [Motion Compensation > BIO] Next, we will explain how to derive motion vectors. First, we will explain a mode in which motion vectors are derived based on a model that assumes uniform linear motion. This mode is sometimes called BIO (bi-directional optical flow) mode.

[0305] Figure 38 is a conceptual diagram for explaining a model assuming uniform linear motion. In Figure 38, (vx, vy) indicate a velocity vector, and τ0 and τ1 indicate the temporal distances between the current picture (Cur Pic) and two reference pictures (Ref0, Ref1), respectively. (MVx0, MVy0) indicate the motion vector corresponding to reference picture Ref0, and (MVx1, MVy1) indicate the motion vector corresponding to reference picture Ref1.

[0306] In this case, under the assumption of uniform linear motion of the velocity vector (vx, vy), (MVx0, MVy0) and (MVx1, MVy1) can be expressed as (vxτ0, vyτ0) and (-vxτ1, -vyτ1), respectively, and the following optical flow equation (2) may be adopted.

[0307]

number

[0308] Here, I(k) denotes the luminance value of reference image k (k=0, 1) after motion compensation. This optical flow equation indicates that the sum of (i) the time derivative of the luminance value, (ii) the product of the horizontal velocity and the horizontal component of the spatial gradient of the reference image, and (iii) the product of the vertical velocity and the vertical component of the spatial gradient of the reference image is equal to zero. Based on a combination of this optical flow equation and Hermite interpolation, block-based motion vectors obtained from a merge list or the like may be corrected pixel by pixel.

[0309] Note that the decoding device may derive motion vectors using a method other than that based on a model assuming constant-velocity linear motion. For example, a motion vector may be derived for each sub-block based on the motion vectors of multiple adjacent blocks.

[0310] [Motion Compensation > LIC] Next, an example of a mode for generating a predicted image (prediction) using LIC (local illumination compensation) processing will be described.

[0311] FIG. 39 is a conceptual diagram illustrating an example of a predicted image generating method using luminance correction processing by LIC processing.

[0312] First, the MV is derived from the coded reference picture to obtain the reference image corresponding to the current block.

[0313] Next, information indicating how the luminance values ​​of the current block have changed between the reference picture and the current picture is extracted. This extraction is performed based on the luminance pixel values ​​of the coded left-adjacent reference area (peripheral reference area) and the coded upper-adjacent reference area (peripheral reference area) in the current picture, and the luminance pixel values ​​at the equivalent positions in the reference picture specified by the derived MV. Then, the information indicating how the luminance values ​​have changed is used to calculate luminance correction parameters.

[0314] A predicted image for the current block is generated by performing luminance correction processing that applies the luminance correction parameters to a reference image in a reference picture specified by the MV.

[0315] The shape of the peripheral reference area in FIG. 39 is an example, and other shapes may be used.

[0316] Although the process of generating a predicted image from one reference picture has been described here, the same applies when generating a predicted image from multiple reference pictures, and a luminance correction process may be performed on the reference images obtained from each reference picture in the same manner as described above before generating a predicted image.

[0317] As a method for determining whether to apply LIC processing, for example, there is a method using lic_flag, which is a signal indicating whether to apply LIC processing. As a specific example, an encoding device determines whether the current block belongs to an area where a luminance change occurs, and if it belongs to an area where a luminance change occurs, sets the value of lic_flag to 1 and performs encoding by applying LIC processing, and if it does not belong to an area where a luminance change occurs, sets the value of lic_flag to 0 and performs encoding without applying LIC processing. On the other hand, a decoding device may decode lic_flag described in the stream and switch whether to apply LIC processing depending on the value and perform decoding.

[0318] Another method for determining whether to apply LIC processing is to determine whether LIC processing has been applied to neighboring blocks.As a specific example, when the current block is in merge mode, it is determined whether the neighboring coded blocks selected when deriving MV in merge mode processing have been coded using LIC processing.Depending on the result, whether to apply LIC processing is switched and coding is performed.In this example, the same processing is also applied to the processing on the decoding device side.

[0319] The LIC processing (luminance correction processing) has been described with reference to FIG. 39, and will be described in detail below.

[0320] First, the inter prediction unit 126 derives a motion vector for obtaining a reference image corresponding to the current block from a reference picture that is an already-encoded picture.

[0321] Next, the inter prediction unit 126 uses the luminance pixel values ​​of the coded surrounding reference areas adjacent to the left and above the current block to extract information indicating how the luminance values ​​have changed between the reference picture and the current picture to calculate luminance correction parameters, using the luminance pixel values ​​of the coded surrounding reference areas adjacent to the left and above and the luminance pixel values ​​at the equivalent positions in the reference picture specified by the motion vector. For example, the luminance pixel value of a pixel in the surrounding reference area in the current picture to be coded is set to p0, and the luminance pixel value of a pixel in the surrounding reference area in the reference picture at the equivalent position to the pixel is set to p1. The inter prediction unit 126 calculates coefficients A and B that optimize A×p1+B=p0 as luminance correction parameters for multiple pixels in the surrounding reference areas.

[0322] Next, the inter prediction unit 126 performs luminance correction processing on a reference image in a reference picture specified by the motion vector using the luminance correction parameter, thereby generating a predicted image for the block to be coded. For example, the luminance pixel value in the reference image is set to p2, and the luminance pixel value of the predicted image after the luminance correction processing is set to p3. The inter prediction unit 126 generates a predicted image after the luminance correction processing by calculating A×p2+B=p3 for each pixel in the reference image.

[0323] Note that the shape of the surrounding reference area in FIG. 39 is an example, and other shapes may be used. Also, a part of the surrounding reference area shown in FIG. 39 may be used. For example, an area including a predetermined number of pixels thinned out from each of the upper adjacent pixels and the left adjacent pixels may be used as the surrounding reference area. Also, the surrounding reference area is not limited to an area adjacent to the encoding target block, but may be an area not adjacent to the encoding target block. The predetermined number of pixels may be determined in advance.

[0324] 39, the surrounding reference areas in the reference picture are areas specified by the motion vector of the current picture from the surrounding reference areas in the current picture, but may be areas specified by another motion vector. For example, the other motion vector may be the motion vector of the surrounding reference areas in the current picture.

[0325] Although the operation of the encoding device 100 has been described above, the operation of the decoding device 200 is typically similar.

[0326] The LIC process may be applied to color differences instead of just luminance. In this case, correction parameters may be derived individually for each of Y, Cb, and Cr, or a common correction parameter may be used for any of them.

[0327] Alternatively, the LIC process may be applied to each sub-block. For example, the correction parameters may be derived using the surrounding reference regions of the current sub-block and the surrounding reference regions of the reference sub-blocks in the reference picture specified by the MV of the current sub-block.

[0328] [Predictive control unit] The prediction control unit 128 selects either an intra-prediction signal (a signal output from the intra-prediction unit 124) or an inter-prediction signal (a signal output from the inter-prediction unit 126), and outputs the selected signal as a prediction signal to the subtraction unit 104 and the addition unit 116.

[0329] As shown in FIG. 1 , in various exemplary encoding devices, the prediction control unit 128 may output prediction parameters to be input to the entropy coding unit 110. The entropy coding unit 110 may generate an encoded bitstream (or sequence) based on the prediction parameters input from the prediction control unit 128 and the quantization coefficients input from the quantization unit 108. The prediction parameters may be used by a decoding device. The decoding device may receive and decode the encoded bitstream and perform the same prediction process as that performed by the intra predictor 124, the inter predictor 126, and the prediction control unit 128. The prediction parameters may include a selected prediction signal (e.g., a motion vector, a prediction type, or a prediction mode used by the intra predictor 124 or the inter predictor 126) or any index, flag, or value based on or indicating the prediction process performed by the intra predictor 124, the inter predictor 126, and the prediction control unit 128.

[0330] [Example of an encoding device implementation] 40 is a block diagram showing an implementation example of the encoding device 100. The encoding device 100 includes a processor a1 and a memory a2. For example, several components of the encoding device 100 shown in FIG. 1 are implemented by the processor a1 and the memory a2 shown in FIG.

[0331] The processor a1 is a circuit that performs information processing and is a circuit that can access the memory a2. For example, the processor a1 is a dedicated or general-purpose electronic circuit that encodes moving images. The processor a1 may be a processor such as a CPU. The processor a1 may also be a collection of multiple electronic circuits. For example, the processor a1 may fulfill the roles of multiple components among the multiple components of the encoding device 100 shown in FIG. 1 etc.

[0332] The memory a2 is a dedicated or general-purpose memory that stores information for the processor a1 to encode video. The memory a2 may be an electronic circuit and may be connected to the processor a1. The memory a2 may also be included in the processor a1. The memory a2 may also be a collection of multiple electronic circuits. The memory a2 may also be a magnetic disk, an optical disk, or the like, and may also be expressed as storage, a recording medium, or the like. The memory a2 may also be a non-volatile memory or a volatile memory.

[0333] For example, the memory a2 may store a video to be encoded, or a bit string corresponding to the encoded video, or may store a program for the processor a1 to encode the video.

[0334] Furthermore, for example, the memory a2 may serve as a component for storing information among the multiple components of the encoding device 100 shown in Fig. 1 etc. For example, the memory a2 may serve as the block memory 118 and the frame memory 122 shown in Fig. 1. More specifically, the memory a2 may store reconstructed blocks, reconstructed pictures, etc.

[0335] Note that not all of the components shown in Fig. 1 etc. may be implemented, and not all of the processes described above may be performed, in the encoding device 100. Some of the components shown in Fig. 1 etc. may be included in another device, and some of the processes described above may be performed by another device.

[0336] [Decryption device] Next, a description will be given of a decoding device capable of decoding, for example, a coded signal (coded bitstream) output from the above coding device 100. Fig. 41 is a block diagram showing the functional configuration of a decoding device 200 according to an embodiment. The decoding device 200 is a video decoding device that decodes video on a block-by-block basis.

[0337] As shown in FIG. 41, the decoding device 200 includes an entropy decoding unit 202, an inverse quantization unit 204, an inverse transform unit 206, an addition unit 208, a block memory 210, a loop filter unit 212, a frame memory 214, an intra prediction unit 216, an inter prediction unit 218, and a prediction control unit 220.

[0338] The decoding device 200 is realized by, for example, a general-purpose processor and memory. In this case, when a software program stored in the memory is executed by the processor, the processor functions as the entropy decoding unit 202, the inverse quantization unit 204, the inverse transform unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220. Alternatively, the decoding device 200 may be realized as one or more dedicated electronic circuits corresponding to the entropy decoding unit 202, the inverse quantization unit 204, the inverse transform unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.

[0339] Below, the overall processing flow of the decoding device 200 will be explained, and then each component included in the decoding device 200 will be explained.

[0340] [Overall flow of decryption process] FIG. 42 is a flowchart showing an example of the overall decoding process performed by the decoding device 200.

[0341] First, the entropy decoding unit 202 of the decoding device 200 identifies a division pattern for fixed-size blocks (e.g., 128×128 pixels) (step Sp_1). This division pattern is the division pattern selected by the encoding device 100. Then, the decoding device 200 performs the processes of steps Sp_2 to Sp_6 on each of the multiple blocks that make up the division pattern.

[0342] That is, the entropy decoding unit 202 decodes (specifically, entropy decodes) the coded quantized coefficients and prediction parameters of the block to be decoded (also referred to as the current block) (step Sp_2).

[0343] Next, the inverse quantization unit 204 and the inverse transform unit 206 perform inverse quantization and inverse transform on the plurality of quantized coefficients to reconstruct a plurality of prediction residuals (that is, difference blocks) (step Sp_3).

[0344] Next, a prediction processing unit including all or part of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 generates a prediction signal (also called a prediction block) of the current block (step Sp_4).

[0345] Next, the adder 208 reconstructs the current block into a reconstructed image (also called a decoded image block) by adding the predicted block to the difference block (step Sp_5).

[0346] Then, when this reconstructed image is generated, the loop filter unit 212 performs filtering on the reconstructed image (step Sp_6).

[0347] Then, the decoding device 200 determines whether or not the decoding of the entire picture is completed (step Sp_7), and if it determines that the decoding is not completed (No in step Sp_7), it repeats the processing from step Sp_1.

[0348] As shown in the figure, the processes of steps Sp_1 to Sp_7 are performed sequentially by the decoding device 200. Alternatively, some of these processes may be performed in parallel, or the order of the processes may be changed.

[0349] [Entropy Decoding] The entropy decoding unit 202 entropy-decodes the coded bitstream. Specifically, for example, the entropy decoding unit 202 arithmetically decodes the coded bitstream into a binary signal. Then, the entropy decoding unit 202 debinarizes the binary signal. The entropy decoding unit 202 outputs quantized coefficients to the inverse quantization unit 204 on a block-by-block basis. The entropy decoding unit 202 may output prediction parameters included in the coded bitstream (see FIG. 1 ) to the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 in the embodiment. The intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 can perform the same prediction processing as the processing performed by the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128 on the coding device side.

[0350] [Dequantization section] The inverse quantization unit 204 inverse quantizes the quantized coefficients of a block to be decoded (hereinafter referred to as a current block) that is input from the entropy decoding unit 202. Specifically, the inverse quantization unit 204 inverse quantizes each quantized coefficient of the current block based on a quantization parameter corresponding to the quantized coefficient. The inverse quantization unit 204 then outputs the inverse quantized coefficients (i.e., transform coefficients) of the current block to the inverse transform unit 206.

[0351] [Inverse conversion section] The inverse transform unit 206 restores the prediction error by inverse transforming the transform coefficients input from the inverse quantization unit 204 .

[0352] For example, if the information interpreted from the encoded bitstream indicates that EMT or AMT is to be applied (e.g., the AMT flag is true), the inverse transform unit 206 inverse transforms the transform coefficients of the current block based on the interpreted information indicating the transform type.

[0353] Also, for example, if the information decoded from the coded bitstream indicates that NSST is to be applied, then inverse transform unit 206 applies an inverse re-transform to the transform coefficients.

[0354] [Addition section] The adder 208 reconstructs the current block by adding the prediction error input from the inverse transformer 206 and the prediction sample input from the prediction control unit 220. The adder 208 then outputs the reconstructed block to the block memory 210 and the loop filter unit 212.

[0355] [Block Memory] The block memory 210 is a storage unit for storing blocks that are referenced in intra prediction and are in a picture to be decoded (hereinafter referred to as a current picture). Specifically, the block memory 210 stores the reconstructed blocks output from the adder 208.

[0356] [Loop filter section] The loop filter unit 212 applies a loop filter to the block reconstructed by the adder unit 208, and outputs the filtered reconstructed block to a frame memory 214, a display device, or the like.

[0357] If the information indicating ALF on / off read from the encoded bitstream indicates that ALF is on, one filter is selected from multiple filters based on the local gradient direction and activity, and the selected filter is applied to the reconstructed block.

[0358] [Frame memory] The frame memory 214 is a storage unit for storing reference pictures used in inter prediction, and is sometimes called a frame buffer. Specifically, the frame memory 214 stores the reconstructed blocks filtered by the loop filter unit 212.

[0359] [Prediction processing unit (intra prediction unit, inter prediction unit, prediction control unit)] 43 is a flowchart showing an example of processing performed in the prediction processing unit of the decoding device 200. Note that the prediction processing unit is made up of all or some of the components of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.

[0360] The prediction processing unit generates a predicted image of the current block (step Sq_1). This predicted image is also called a predicted signal or a predicted block. The predicted signal may be, for example, an intra-prediction signal or an inter-prediction signal. Specifically, the prediction processing unit generates the predicted image of the current block using a reconstructed image already obtained by generating a predicted block, generating a difference block, generating a coefficient block, restoring the difference block, and generating a decoded image block.

[0361] The reconstructed image may be, for example, an image of a reference picture or an image of a decoded block in a current picture, which is a picture that includes the current block. The decoded block in the current picture may be, for example, a neighboring block of the current block.

[0362] FIG. 44 is a flowchart showing another example of the processing performed by the prediction processing unit of the decoding device 200.

[0363] The prediction processing unit determines a method or mode for generating a predicted image (step Sr_1). For example, this method or mode may be determined based on prediction parameters, etc.

[0364] When the prediction processing unit determines that the first method is the mode for generating a predicted image, it generates the predicted image according to the first method (step Sr_2a). When the prediction processing unit determines that the second method is the mode for generating a predicted image, it generates the predicted image according to the second method (step Sr_2b). When the prediction processing unit determines that the third method is the mode for generating a predicted image, it generates the predicted image according to the third method (step Sr_2c).

[0365] The first, second, and third methods are different methods for generating a predicted image, and may be, for example, an inter-prediction method, an intra-prediction method, or other prediction methods. These prediction methods may use the reconstructed image described above.

[0366] [Intra prediction section] The intra prediction unit 216 generates a prediction signal (intra prediction signal) by performing intra prediction based on the intra prediction mode interpreted from the encoded bitstream, by referring to blocks in the current picture stored in the block memory 210. Specifically, the intra prediction unit 216 generates the intra prediction signal by performing intra prediction by referring to samples (e.g., luminance values, chrominance values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 220.

[0367] Note that, when an intra prediction mode that references a luminance block in intra prediction of a chrominance block is selected, the intra prediction unit 216 may predict the chrominance component of the current block based on the luminance component of the current block.

[0368] Furthermore, when information interpreted from the coded bitstream indicates the application of PDPC, the intra prediction unit 216 corrects pixel values ​​after intra prediction based on the gradients of reference pixels in the horizontal and vertical directions.

[0369] [Inter prediction section] The inter prediction unit 218 predicts the current block by referring to a reference picture stored in the frame memory 214. The prediction is performed in units of the current block or sub-blocks (e.g., 4x4 blocks) within the current block. For example, the inter prediction unit 218 generates an inter prediction signal of the current block or sub-block by performing motion compensation using motion information (e.g., motion vectors) interpreted from the coded bitstream (e.g., prediction parameters output from the entropy decoding unit 202), and outputs the inter prediction signal to the prediction control unit 220.

[0370] If the information interpreted from the encoded bitstream indicates that the OBMC mode is to be applied, the inter prediction unit 218 generates an inter prediction signal using not only the motion information of the current block obtained by motion estimation, but also the motion information of neighboring blocks.

[0371] Furthermore, if the information interpreted from the coded bitstream indicates that the FRUC mode is to be applied, the inter prediction unit 218 derives motion information by performing motion search according to the pattern matching method (bilateral matching or template matching) interpreted from the coded bitstream. Then, the inter prediction unit 218 performs motion compensation (prediction) using the derived motion information.

[0372] Furthermore, when the BIO mode is applied, the inter prediction unit 218 derives a motion vector based on a model assuming constant-velocity linear motion. Furthermore, when information interpreted from the coded bitstream indicates that the affine motion compensation prediction mode is to be applied, the inter prediction unit 218 derives a motion vector for each sub-block based on the motion vectors of multiple adjacent blocks.

[0373] [MV Derivation > Normal Intermode] If the information interpreted from the encoded bitstream indicates that normal inter mode is to be applied, the inter prediction unit 218 derives an MV based on the information interpreted from the encoded bitstream and performs motion compensation (prediction) using the MV.

[0374] FIG. 45 is a flowchart showing an example of inter prediction in the normal inter mode in the decoding device 200.

[0375] The inter prediction unit 218 of the decoding device 200 performs motion compensation on each block. The inter prediction unit 218 obtains multiple candidate MVs for the current block based on information such as the MVs of multiple decoded blocks temporally or spatially surrounding the current block (step Ss_1). That is, the inter prediction unit 218 creates a candidate MV list.

[0376] Next, the inter prediction unit 218 extracts N candidate MVs (N is an integer equal to or greater than 2) from the plurality of candidate MVs acquired in step Ss_1 as motion vector predictor candidates (also referred to as predicted MV candidates) according to a predetermined priority order (step Ss_2). Note that the priority order may be predetermined for each of the N predicted MV candidates.

[0377] Next, the inter prediction unit 218 decodes the predicted motion vector selection information from the input stream (i.e., the encoded bitstream), and uses the decoded predicted motion vector selection information to select one predicted MV candidate from the N predicted MV candidates as the predicted motion vector (also called predicted MV) of the current block (step Ss_3).

[0378] Next, the inter prediction unit 218 decodes the differential MV from the input stream and derives the MV of the current block by adding the differential value of the decoded differential MV to the selected predicted motion vector (step Ss_4).

[0379] Finally, the inter prediction unit 218 performs motion compensation on the current block using the derived MV and the decoded reference picture to generate a predicted image of the current block (step Ss_5).

[0380] [Predictive control unit] The prediction control unit 220 selects either the intra prediction signal or the inter prediction signal, and outputs the selected signal as a prediction signal to the adder 208. Overall, the configurations, functions, and processing of the prediction control unit 220, the intra prediction unit 216, and the inter prediction unit 218 on the decoding device side may correspond to the configurations, functions, and processing of the prediction control unit 128, the intra prediction unit 124, and the inter prediction unit 126 on the encoding device side.

[0381] [Example of implementation of a decryption device] 46 is a block diagram showing an implementation example of the decoding device 200. The decoding device 200 includes a processor b1 and a memory b2. For example, several components of the decoding device 200 shown in FIG. 41 are implemented by the processor b1 and the memory b2 shown in FIG.

[0382] The processor b1 is a circuit that performs information processing and is a circuit that can access the memory b2. For example, the processor b1 is a dedicated or general-purpose electronic circuit that decodes coded video (i.e., a coded bitstream). The processor b1 may be a processor such as a CPU. The processor b1 may also be a collection of multiple electronic circuits. For example, the processor b1 may fulfill the roles of multiple components among the multiple components of the decoding device 200 shown in FIG. 41 etc.

[0383] The memory b2 is a dedicated or general-purpose memory that stores information for the processor b1 to decode the coded bitstream. The memory b2 may be an electronic circuit and may be connected to the processor b1. The memory b2 may also be included in the processor b1. The memory b2 may also be a collection of multiple electronic circuits. The memory b2 may also be a magnetic disk, an optical disk, or the like, and may also be expressed as a storage or a recording medium. The memory b2 may also be a non-volatile memory or a volatile memory.

[0384] For example, the memory b2 may store a video or an encoded bitstream, or may store a program for the processor b1 to decode the encoded bitstream.

[0385] Furthermore, for example, memory b2 may serve as a component for storing information among the multiple components of decoding device 200 shown in Fig. 41 etc. Specifically, memory b2 may serve as the block memory 210 and frame memory 214 shown in Fig. 41. More specifically, memory b2 may store reconstructed blocks, reconstructed pictures, etc.

[0386] Note that not all of the components shown in Figure 41 etc. may be implemented, and not all of the above-described processes may be performed, in the decoding device 200. Some of the components shown in Figure 41 etc. may be included in another device, and some of the above-described processes may be executed by another device.

[0387] [Definition of each term] As an example, each term may be defined as follows:

[0388] A picture is an array of luma samples in monochrome format, or two corresponding arrays of luma samples and chroma samples in 4:2:0, 4:2:2 and 4:4:4 color formats. A picture may be a frame or a field.

[0389] A frame is a composition of a top field from which a number of sample rows 0, 2, 4, . . . occur, and a bottom field from which a number of sample rows 1, 3, 5, .

[0390] A slice is an integer number of coding tree units contained in one independent slice segment and all subsequent dependent slice segments (if any) that precede the next independent slice segment (if any) within the same access unit.

[0391] A tile is a rectangular region of multiple coding tree blocks within a particular tile column and a particular tile row in a picture. A tile may also be a rectangular region of a frame that is intended to be independently decoded and coded, although loop filters across tile edges may still be applied.

[0392] A block is an MxN (N rows and M columns) array of samples or an MxN array of transform coefficients. A block may also be a square or rectangular region of pixels consisting of one luma and two chroma matrices.

[0393] A CTU (coding tree unit) may be a coding tree block of luma samples for a picture with a three-sample arrangement, or two corresponding coding tree blocks of chroma samples, or a coding tree block of samples for either a monochrome picture or a picture coded using a syntax structure used to code three separate color planes and samples.

[0394] A superblock may comprise one or two mode information blocks, or may be a square block of 64x64 pixels that can be recursively divided into four 32x32 blocks and further divided.

[0395] [First aspect of coefficient coding] Fig. 47 is a flowchart showing a basic coefficient coding method according to the first aspect. Specifically, Fig. 47 shows a coefficient coding method for a region in which a prediction residual is obtained by intra coding or inter coding. In the following description, operations performed by the coding device 100 are shown. The decoding device 200 may perform operations corresponding to the operations performed by the coding device 100. For example, the decoding device 200 may perform inverse orthogonal transform and decoding corresponding to the orthogonal transform and coding performed by the coding device 100.

[0396] 47 shows last_sig_coeff, subblock_flag, thres, and CCB. last_sig_coeff is a parameter representing the coordinate position where a non-zero coefficient first appears when scanning within a block. subblock_flag is a flag representing whether there is a non-zero coefficient in a 4x4 subblock (also called 16 transform coefficient levels). subblock_flag is also expressed as coded_sub_block_flag or subblock flag.

[0397] thres is a constant determined for each block. thres may be determined in advance. thres may have a different value depending on the size of the block, or may be the same value regardless of the size of the block. thres may have a different value depending on whether or not an orthogonal transform is applied. thres may be determined depending on the coordinate position determined in the block by last_sig_coeff.

[0398] CCB represents the number of bins coded in the context mode of CABAC (Context-Adaptive Binary Arithmetic Coding). In other words, CCB represents the number of coding processes based on the CABAC context mode. The context mode is also called the regular mode. Here, coding based on the CABAC context mode is called CABAC coding or context-adaptive coding. Also, coding based on the CABAC bypass mode is called bypass coding. The bypass coding process is lighter than the CABAC coding process.

[0399] CABAC coding is a process of converting a bin string obtained by binarizing a signal to be coded into a coded bit string based on the occurrence probability of 0 and 1 for each bin. Note that CCB may count the number of all flags used in residual coefficient coding, or may count the number of some of the flags used in residual coefficient coding. Bypass coding is a process of encoding 1 bin in a bin string as 1 bit in a coded bit string without using the variable occurrence probability of 0 and 1 for each bin (in other words, using a fixed probability).

[0400] For example, the encoding device 100 compares the CCB value with the threshold value to determine the coefficient encoding method.

[0401] Specifically, in FIG. 47, first, CCB is initialized to 0 (S101). Then, it is determined whether or not an orthogonal transform is applied to the block (S102). If an orthogonal transform is applied to the block (Yes in S102), the encoding device 100 encodes last_sig_coeff (S131). Then, the encoding device 100 performs loop processing for each sub-block (S141 to S148).

[0402] In the loop process for each subblock (S141 to S148), the encoding device 100 encodes the subblock_flag for that subblock. If the subblock_flag is not 0 (Yes in S146), the encoding device 100 encodes the 16 coefficients in that subblock using a first encoding method (to be described later) (S147).

[0403] Furthermore, if orthogonal transform is not applied to the block (No in S102), the encoding device 100 performs loop processing for each sub-block (S121 to S128).

[0404] In the loop processing for each subblock (S121 to S128), the encoding device 100 determines whether CCB is less than or equal to thres (S122). If CCB is less than or equal to thres (Yes in S122), the encoding device 100 encodes subblock_flag using CABAC encoding (S123). Then, the encoding device 100 counts up CCB (S124). If not (No in S122), the encoding device 100 encodes subblock_flag using bypass encoding (S125).

[0405] If subblock_flag is different from 0 (Yes in S126), encoding device 100 encodes the 16 coefficients in the subblock using a second encoding method, which will be described later (S127).

[0406] When orthogonal transform is not applied to a block, for example, orthogonal transform may be skipped. The CCB is also used in the first and second encoding methods. The CCB may be initialized on a sub-block basis. In this case, thres may be a value that changes for each sub-block, rather than a fixed value for the block.

[0407] Here, the CCB is counted up from 0 and it is determined whether it has reached thres, but the CCB may also be counted down from thres (or a specific value) and it may be determined whether it has reached 0.

[0408] Fig. 48 is a flowchart showing details of the first encoding method shown in Fig. 47. In the first encoding method, multiple coefficients in a sub-block are encoded. At this time, a first loop process (S151 to S156) is performed for each coefficient information flag of each coefficient in the sub-block, and a second loop process (S161 to S165) is performed for each coefficient in the sub-block.

[0409] In the first loop (S151 to S156), one or more coefficient information flags each indicating one or more attributes of a coefficient are sequentially coded. The one or more coefficient information flags may include sig_flag, gt1_flag, parity_flag, and gt3_flag, which will be described later. The one or more coefficient information flags are sequentially coded using CABAC coding, so long as CCB does not exceed threshold, and CCB is counted up by one each time coding is performed. After CCB exceeds threshold, the coefficient information flags are not coded.

[0410] That is, in the first loop process (S151 to S156), the encoding device 100 determines whether CCB is less than or equal to thres (S152). If CCB is less than or equal to thres (Yes in S152), the encoding device 100 encodes the coefficient information flag using CABAC encoding (S153). Then, the encoding device 100 counts up CCB (S154). If CCB is not less than or equal to thres (No in S152), the encoding device 100 ends the first loop process (S151 to S156).

[0411] In the second loop processing (S161 to S165), for coefficients whose coefficient information flags have been coded, the remainder, which is the remaining value not expressed by the coefficient information flag (i.e., the remaining value for reconstructing the coefficient value using the coefficient information flag), is coded using Golomb-Rice coding. Coefficients whose coefficient information flags have not been coded are coded using Golomb-Rice coding as they are. Note that the remainder may be coded using another coding method instead of Golomb-Rice coding.

[0412] That is, in the second loop processing (S161 to S165), the encoding device 100 determines whether or not the coefficient information flag corresponding to the coefficient to be processed has been coded (S162). If the coefficient information flag has been coded (Yes in S162), the encoding device 100 codes the remainder using Golomb-Rice coding (S163). If the coefficient information flag has not been coded (No in S162), the encoding device 100 codes the value of the coefficient using Golomb-Rice coding (S164).

[0413] Although the number of loop processes is two here, the number of loop processes may be different from two.

[0414] The above-mentioned sig_flag is a flag indicating whether AbsLevel is non-zero. AbsLevel is the value of a coefficient, more specifically, the absolute value of the coefficient. gt1_flag is a flag indicating whether AbsLevel is greater than 1. parity_flag is a flag indicating the first bit of AbsLevel, and is a flag indicating whether AbsLevel is odd or even. gt3_flag is a flag indicating whether AbsLevel is greater than 3.

[0415] The gt1_flag and gt3_flag may be expressed as abs_gt1_flag and abs_gt3_flag, respectively. Furthermore, for example, the value of (Abslevel-4) / 2 may be coded using Golomb-Rice coding as the remainder described above.

[0416] One or more coefficient information flags other than the one or more coefficient information flags may be coded. For example, some coefficient information flags may not be coded. A coefficient information flag included in the one or more coefficient information flags may be replaced with a coefficient information flag or parameter having another meaning.

[0417] Fig. 49 is a flowchart showing details of the second encoding method shown in Fig. 47. In the second encoding method, a plurality of coefficients in a sub-block are encoded. At this time, a first loop process (S171 to S176) is performed for each coefficient information flag of each coefficient in the sub-block, and a second loop process (S181 to S185) is performed for each coefficient in the sub-block.

[0418] In the first loop (S171 to S176), one or more coefficient information flags each indicating one or more attributes of a coefficient are sequentially coded. The one or more coefficient information flags may include sig_flag, sign_flag, gt1_flag, parity_flag, gt3_flag, gt5_flag, gt7_flag, and gt9_flag.

[0419] Here, sign_flag is a flag indicating the positive or negative sign of the coefficient. gt5_flag is a flag indicating whether AbsLevel is greater than 5. gt7_flag is a flag indicating whether AbsLevel is greater than 7. gt9_flag is a flag indicating whether AbsLevel is greater than 9. gt5_flag, gt7_flag, and gt9_flag may be expressed as abs_gt5_flag, abs_gt7_flag, and abs_gt9_flag, respectively. Furthermore, flags indicating whether AbsLevel is greater than x (x is an integer equal to or greater than 1) may be collectively expressed as gtx_flag or abs_gtx_flag. AbsLevel is, for example, the absolute value of the transform coefficient level.

[0420] Note that one or more coefficient information flags other than the one or more coefficient information flags may be coded. For example, some coefficient information flags may not be coded. The coefficient information flags included in the one or more coefficient information flags may be replaced with coefficient information flags or parameters having other meanings.

[0421] The coefficient information flags are sequentially coded by CABAC coding. Each coding step counts up the CCB by one. After the CCB exceeds the threshold, the coefficient information flags are coded by bypass coding.

[0422] That is, in the first loop process (S171 to S176), the encoding device 100 determines whether CCB is less than or equal to thres (S172). If CCB is less than or equal to thres (Yes in S172), the encoding device 100 encodes the coefficient information flag using CABAC encoding (S173). Then, the encoding device 100 counts up CCB (S174). If CCB is not less than or equal to thres (No in S172), the encoding device 100 encodes the coefficient information flag using bypass encoding (S175).

[0423] The syntax of the second loop process in Fig. 49 does not change before and after CCB exceeds thres. That is, whether the coefficient information flag is coded by CABAC coding or by bypass coding, the same processing is performed in the second loop process (S181 to S185).

[0424] Specifically, in the second loop process (S181 to S185), the encoding device 100 encodes remainder, which is a remaining value not represented by the coefficient information flag (i.e., a remaining value for reconstructing the coefficient value using the coefficient information flag), by Golomb-Rice coding (S183). Note that remainder may be encoded by using another coding method instead of Golomb-Rice coding.

[0425] Although the number of loop processes is two here, the number of loop processes may be different from two.

[0426] As shown in Figures 47, 48, and 49, in the basic operation of this embodiment, there is a flag that is included in the limit on the number of CABAC encoding processes depending on whether or not orthogonal transform is applied. Also, the coefficient coding syntax is different between when orthogonal transform is applied and when orthogonal transform is not applied. This may require separate circuits to be prepared for each case. Therefore, the circuit configuration may become complicated.

[0427] [First Example of First Aspect of Coefficient Encoding] Fig. 50 is a flowchart showing a coefficient coding method according to a first example of the first aspect. In the example of Fig. 50, the post-processing of last_sig_coeff (S132) and the processing of subblock_flag (S142 to S145) are different from the example of Fig. 47.

[0428] In Fig. 47, when orthogonal transform is applied, CCB is counted up for sig_flag, parity_flag, and gtX_flag (X = 1, 3). In the example of Fig. 50, CCB is also counted up for last_sig_coeff and subblock_flag. On the other hand, the processing flow when orthogonal transform is not applied is the same as the example of Fig. 47.

[0429] That is, in the example of FIG. 50, the encoding device 100 encodes last_sig_coeff (S131), and then adds the number of CABAC encoding processes in encoding last_sig_coeff to the CCB (S132).

[0430] Furthermore, before encoding subblock_flag, encoding apparatus 100 determines whether CCB is less than or equal to thres (S142). If CCB is less than or equal to thres (Yes in S142), encoding apparatus 100 encodes subblock_flag using CABAC encoding (S143). Then, encoding apparatus 100 adds 1 to CCB (S144). On the other hand, if CCB is not less than or equal to thres (No in S142), encoding apparatus 100 encodes subblock_flag using bypass encoding (S145).

[0431] [Effect of the first example of the first aspect of coefficient coding] According to the example of Figure 50, it may be possible to standardize the subblock_flag coding process flow between cases where orthogonal transform is performed and cases where orthogonal transform is not performed. Therefore, some circuits may be shared between cases where orthogonal transform is performed and cases where orthogonal transform is not performed, and the circuit scale may be reduced. As a result, multiple process flows that differ depending on whether or not orthogonal transform is performed may be the same except for the presence or absence of last_sig_coeff.

[0432] For example, even if the number of times of CABAC encoding is limited at the block level, in the example of Fig. 47, after CCB reaches thres, subblock_flag is encoded by CABAC encoding. On the other hand, in the example of Fig. 50, after CCB reaches thres, subblock_flag is not encoded by CABAC encoding. This may result in the number of times of CABAC encoding being appropriately limited to thres.

[0433] The number of CABAC encoding processes in last_sig_coeff does not have to be included in the CCB. Also, thres may be determined depending on the coordinate position determined in the block by last_sig_coeff.

[0434] Furthermore, the encoding device 100 may determine and encode the value of subblock_flag as 1 after the CCB exceeds thres. If it is determined that the value of subblock_flag is always 1 after the CCB exceeds thres, the encoding device 100 may not encode the subblock_flag after the CCB exceeds thres.

[0435] Furthermore, even when orthogonal transform is not applied, encoding device 100 may determine and encode subblock_flag to always be 1 after CCB exceeds thres. Also in this case, if it is determined that subblock_flag is always 1 after CCB exceeds thres, encoding device 100 may not need to encode subblock_flag after CCB exceeds thres.

[0436] [Second Example of the First Aspect of Coefficient Coding] 51 is a flowchart showing a coefficient coding method according to a second example of the first aspect. In the example of FIG. 51, the process of subblock_flag (S123) is different from the example of FIG.

[0437] In Fig. 47, when orthogonal transform is not applied, CCB is counted up for sig_flag, parity_flag, gtX_flag (X = 1, 3, 5, 7, 9), and subblock_flag. In the example of Fig. 51, CCB is not counted up for subblock_flag. On the other hand, the processing flow when orthogonal transform is applied is the same as the example of Fig. 47.

[0438] That is, in the example of FIG. 51, the encoding apparatus 100 always encodes the subblock_flag using CABAC encoding without counting up the CCB, regardless of whether the CCB exceeds the threshold (S123).

[0439] [Effect of the second example of the first aspect of coefficient coding] According to the example of Figure 51, it may be possible to standardize the coding process of subblock_flag between cases where orthogonal transform is performed and cases where orthogonal transform is not performed. Therefore, some circuits may be shared between cases where orthogonal transform is performed and cases where orthogonal transform is not performed, and the circuit scale may be reduced. As a result, multiple processing flows that differ depending on whether or not orthogonal transform is performed may be the same except for the presence or absence of last_sig_coeff.

[0440] Furthermore, the processing in FIG. 51 is simpler than that in FIG. 50. Therefore, the circuit scale may be reduced. Furthermore, it is assumed that the frequency of occurrence of 0 or 1 for subblock_flag is likely to be biased depending on the surrounding circumstances. Therefore, in CABAC encoding of subblock_flag, it is assumed that the reduction in the code amount is large relative to the increase in processing delay. Therefore, it is useful to perform CABAC encoding of subblock_flag without imposing a limit on the number of CABAC encoding processes.

[0441] The number of CABAC encoding processes for last_sig_coeff may be included in the CCB. Also, thres may be determined depending on the coordinate position determined in the block by last_sig_coeff.

[0442] [Second aspect of coefficient coding] [First Example of the Second Aspect of Coefficient Coding] Fig. 52 is a flowchart showing a coefficient coding method according to a first example of the second aspect. The example of Fig. 52 differs from the example of Fig. 47 in that even when orthogonal transform is not applied to the block, 16 coefficients in a sub-block are coded by the first coding method (S127a).

[0443] That is, in the example of Fig. 52, when orthogonal transform is not applied to a block, coding apparatus 100 codes 16 coefficients in a sub-block using the first coding method shown in Fig. 48 rather than the second coding method shown in Fig. 49 (S127a). That is, whether or not orthogonal transform is applied, coding apparatus 100 codes 16 coefficients in a sub-block using the first coding method shown in Fig. 48 rather than the second coding method shown in Fig. 49.

[0444] More specifically, the encoding device 100, regardless of whether or not orthogonal transform is performed, does not use bypass coding and skips coding of the coefficient information flag when CCB exceeds threshold in the first loop processing according to the first encoding method shown in Fig. 48. Then, in the second loop processing, if the coefficient information flag corresponding to the coefficient to be processed has not been coded, the encoding device 100 codes the value of the coefficient by Golomb-Rice coding without using the coefficient information flag.

[0445] Note that the syntax for encoding the coefficient information flags in the first loop process in Fig. 48 may differ depending on whether or not an orthogonal transform is applied. For example, some or all of one or more coefficient information flags when an orthogonal transform is applied may be different from one or more coefficient information flags when an orthogonal transform is not applied.

[0446] [Effect of the first example of the second aspect of coefficient coding] In the example of Fig. 52, even if the coding syntax of the coefficient information flag differs depending on whether or not orthogonal transform is performed, there is a possibility that the coding syntax of the 16 coefficients in the sub-block after CCB exceeds threshold, regardless of whether or not orthogonal transform is performed. As a result, there is a possibility that some circuits are shared between the case where orthogonal transform is applied and the case where orthogonal transform is not applied, and there is a possibility that the circuit scale is reduced.

[0447] In addition, after the CCB exceeds the threshold, the coefficients are coded without being divided into the coefficient information flag coded by the bypass coding and the residual value information coded by the Golomb-Rice coding. Therefore, the increase in the amount of information may be suppressed, and the increase in the amount of code may be suppressed.

[0448] [Second Example of the Second Aspect of Coefficient Coding] Fig. 53 is a flowchart showing a coefficient coding method according to a second example of the second aspect. The example of Fig. 53 differs from the example of Fig. 47 in that even when an orthogonal transform is applied to a block, 16 coefficients in a sub-block are coded by the second coding method (S147a).

[0449] That is, in the example of Fig. 53, when an orthogonal transform is applied to a block, coding apparatus 100 codes 16 coefficients in a sub-block using the second coding method shown in Fig. 49 rather than the first coding method shown in Fig. 48 (S147a). That is, whether an orthogonal transform is applied or not, coding apparatus 100 codes 16 coefficients in a sub-block using the second coding method shown in Fig. 49 rather than the first coding method shown in Fig. 48.

[0450] More specifically, the encoding device 100, regardless of whether or not orthogonal transform is performed, does not skip encoding and encodes the coefficient information flag by bypass encoding when CCB exceeds threshold in the first loop processing according to the second encoding method shown in Fig. 49. Then, in the second loop processing, the encoding device 100 encodes remainder, which depends on the coefficient information flag, by Golomb-Rice encoding.

[0451] Note that the syntax for encoding the coefficient information flags in the first loop process in Fig. 49 may differ depending on whether orthogonal transform is applied or not. For example, some or all of one or more coefficient information flags when orthogonal transform is applied may be different from one or more coefficient information flags when orthogonal transform is not applied.

[0452] [Effect of the second example of the second aspect of coefficient coding] In the example of Fig. 53, even if the coding syntax of the coefficient information flag differs depending on whether or not orthogonal transform is performed, there is a possibility that the coding syntax of the 16 coefficients in the sub-block after CCB exceeds threshold, regardless of whether or not orthogonal transform is performed. As a result, there is a possibility that some circuits are shared between the case where orthogonal transform is applied and the case where orthogonal transform is not applied, and there is a possibility that the circuit scale is reduced.

[0453] [Third aspect of coefficient coding] Fig. 54 is a syntax diagram showing a basic first encoding method according to the third aspect. The syntax shown in Fig. 54 corresponds to an example of the syntax of the first encoding method shown in Fig. 47. Basically, the first encoding method is used when orthogonal transform is applied.

[0454] Here, the coefficient information flags and parameters are the same as those shown in the first aspect. Note that the multiple coefficient information flags shown here are just an example, and multiple other coefficient information flags may be coded. For example, some coefficient information flags may not be coded. Furthermore, the coefficient information flags shown here may be replaced with coefficient information flags or parameters having other meanings.

[0455] The first for loop in the example of Fig. 54 corresponds to the first loop processing in the example of Fig. 48. In this first for loop, if a CCB remains, that is, if the CCB does not exceed a threshold, coefficient information flags such as sig_flag are coded by CABAC coding. If no CCB remains, the coefficient information flags are not coded. Note that the second example of the second aspect may be applied to this example. That is, if no CCB remains, the coefficient information flags may be coded by bypass coding.

[0456] The second for loop from the top and the third for loop from the top correspond to the second loop processing in the example of FIG. 48. In the second for loop from the top, residual values ​​for coefficients whose coefficient information flags are coded are coded using Golomb-Rice coding. In the third for loop from the top, residual values ​​for coefficients whose coefficient information flags are not coded are coded using Golomb-Rice coding. Note that by applying the second example of the second aspect to this example, residual values ​​may always be coded using Golomb-Rice coding.

[0457] In the fourth for loop from the top, sign_flag is encoded using bypass encoding.

[0458] The syntax described in this embodiment may be applied to each of the examples in Figures 47, 48, 50, 51, and 52.

[0459] Fig. 55 is a syntax diagram showing a basic second encoding scheme according to the third aspect. The syntax shown in Fig. 55 corresponds to an example of the syntax of the second encoding scheme in Fig. 47. Basically, the second encoding scheme is used when no orthogonal transform is applied.

[0460] Note that the multiple coefficient information flags shown here are just an example, and multiple other coefficient information flags may be coded. For example, some coefficient information flags may not be coded. Furthermore, the coefficient information flags shown here may be replaced with coefficient information flags or parameters having other meanings.

[0461] The first five for loops in the example of Fig. 55 correspond to the first loop processing in the example of Fig. 49. In these first five for loops, if a CCB remains, that is, if the CCB does not exceed a threshold, coefficient information flags such as sig_flag are coded using CABAC coding. If no CCB remains, the coefficient information flags are coded using bypass coding. Note that the first example of the second aspect may be applied to this example. In other words, if no CCB remains, the coefficient information flags do not need to be coded.

[0462] The sixth for loop from the top corresponds to the second loop process in the example of FIG. 49. In the sixth for loop from the top, the residual value is coded using Golomb-Rice coding. Note that the first example of the second aspect may be applied to this example. That is, the residual value may be coded using Golomb-Rice coding for coefficients whose coefficient information flags are coded. Furthermore, the coefficients whose coefficient information flags are not coded may be coded using Golomb-Rice coding.

[0463] The syntax described in this embodiment may be applied to each of the examples in Figures 47, 49, 50, 51, and 53.

[0464] When orthogonal transform is not applied (FIG. 55), the number of loop processes for encoding coefficient information flags is greater than when orthogonal transform is applied (FIG. 54). Therefore, when orthogonal transform is not applied, the amount of hardware processing may increase compared to when orthogonal transform is applied. Also, since the coefficient encoding syntax differs depending on whether orthogonal transform is applied, it may be necessary to prepare separate circuits. Therefore, the circuit may become complex.

[0465] [First Example of the Third Aspect of Coefficient Coding] Fig. 56 is a syntax diagram showing a second encoding method according to a first example of the third aspect. The syntax shown in Fig. 56 corresponds to an example of the second encoding method in Fig. 47. The syntax shown in Fig. 54 may be used for the first encoding method in Fig. 47. Note that this example may be combined with other examples of the third aspect, or may be combined with other aspects.

[0466] The first for loop in the example of Fig. 56 corresponds to the first loop processing in the example of Fig. 49. In this first for loop, if eight or more CCBs remain, that is, if the CCB with eight added does not exceed the threshold, up to eight coefficient information flags are coded using CABAC coding according to the coefficients, and the CCBs are counted up up to eight times. If eight or more CCBs remain, that is, if the CCB with eight added exceeds the threshold, eight coefficient information flags are coded using bypass coding according to the coefficients.

[0467] In other words, before the eight coefficient information flags are coded, it is comprehensively determined whether the eight coefficient information flags can be coded by CABAC coding, and if the eight coefficient information flags can be coded by CABAC coding, up to eight coefficient information flags are coded by CABAC coding.

[0468] In addition, the first example of the second aspect may be applied to this example. That is, if there are not eight or more CCBs remaining, eight coefficient information flags may not be coded. That is, in this case, the eight coefficient information flags may not be coded by bypass coding, and coding of the eight coefficient information flags may be skipped.

[0469] 56, encoding of one or more of the eight coefficient information flags may be omitted depending on the value of the coefficient. For example, when sig_flag is 0, encoding of the remaining seven coefficient information flags may be omitted.

[0470] The second for loop from the top corresponds to the second loop processing in the example of FIG. 49. In the second for loop from the top, the residual value is coded using Golomb-Rice coding. Note that the first example of the second aspect may be applied to this example. That is, the residual value may be coded using Golomb-Rice coding for coefficients for which eight coefficient information flags are coded, and the coefficients for which eight coefficient information flags are not coded may be coded using Golomb-Rice coding.

[0471] The multiple coefficient information flags shown here are just an example, and multiple other coefficient information flags may be coded. For example, some coefficient information flags may not be coded. Furthermore, the coefficient information flags shown here may be replaced with coefficient information flags or parameters having other meanings.

[0472] Also, the example of Figure 55 may be combined with the example of Figure 56. For example, in the example of Figure 55, before four coefficient information flags such as sig_flag and sign_flag are coded, it may be comprehensively determined whether or not the four coefficient information flags can be coded by CABAC coding.

[0473] [Effect of the first example of the third aspect of coefficient coding] In the example of Fig. 56, all coefficient information flags to be coded by CABAC coding are coded in one loop process. That is, compared with the example of Fig. 55, the example of Fig. 56 has fewer loop processes. Therefore, the amount of processing can be reduced.

[0474] Furthermore, the number of loop processes for encoding multiple coefficient information flags by CABAC encoding is the same between the example of Figure 54 and the example of Figure 56. Therefore, compared with the combination of the example of Figure 54 and the example of Figure 55, the combination of the example of Figure 54 and the example of Figure 56 may require fewer changes to the circuit.

[0475] Furthermore, before multiple coefficient information flags are coded, it is comprehensively determined whether or not the multiple coefficient information flags can be coded using CABAC coding, which may simplify processing and reduce processing delay.

[0476] In addition, whether or not the multiple coefficient information flags can be coded by CABAC coding may be comprehensively determined before coding the multiple coefficient information flags, both in the case where orthogonal transform is applied and in the case where orthogonal transform is not applied. This may further reduce the difference between the coding method used for the block to which orthogonal transform is applied and the coding method used for the block to which orthogonal transform is not applied, and may further reduce the circuit scale.

[0477] In the example of Figure 56, sig_flag to abs_gt9_flag are included in one loop, but the encoding method is not limited to this. Multiple loops (for example, two loops) may be used, and it may be determined comprehensively for each loop whether multiple coefficient information flags can be encoded by CABAC encoding. Although the amount of processing increases compared to one loop, the effect of reducing processing can be similarly obtained compared to the example of Figure 55.

[0478] [Second Example of the Third Aspect of Coefficient Coding] Fig. 57 is a syntax diagram showing a second encoding method according to a second example of the third aspect. The syntax shown in Fig. 57 corresponds to an example of the second encoding method in Fig. 47. The syntax shown in Fig. 54 may be used for the first encoding method in Fig. 47. Note that this example may be combined with other examples of the third aspect, or may be combined with other aspects.

[0479] The first for loop in the example of Fig. 57 corresponds to the first loop processing in the example of Fig. 49. In this first for loop, if seven or more CCBs remain, that is, if the CCB with seven added does not exceed the threshold, up to seven coefficient information flags are coded using CABAC coding according to the coefficients, and the CCBs are counted up up to seven times. If seven or more CCBs remain, that is, if the CCB with seven added exceeds the threshold, seven coefficient information flags are coded using bypass coding according to the coefficients.

[0480] In other words, before the seven coefficient information flags are coded, it is comprehensively determined whether the seven coefficient information flags can be coded by CABAC coding, and if the seven coefficient information flags can be coded by CABAC coding, the seven coefficient information flags are coded by CABAC coding.

[0481] In addition, the first example of the second aspect may be applied to this example. That is, if there are not 7 or more CCBs remaining, the seven coefficient information flags may not be coded. That is, in this case, the seven coefficient information flags may not be coded by bypass coding, and the coding of the seven coefficient information flags may be skipped.

[0482] 57, encoding of one or more of the seven coefficient information flags may be omitted depending on the value of the coefficient. For example, when sig_flag is 0, encoding of the remaining six coefficient information flags may be omitted.

[0483] The second for loop from the top corresponds to the second loop processing in the example of FIG. 49. In the second for loop from the top, the residual values ​​are coded using Golomb-Rice coding. Note that the first example of the second aspect may be applied to this example. That is, the residual values ​​of coefficients for which seven coefficient information flags are coded may be coded using Golomb-Rice coding, and the coefficients for which seven coefficient information flags are not coded may be coded using Golomb-Rice coding.

[0484] In the third for loop from the top, if a CCB remains, that is, if the CCB does not exceed the threshold, sign_flag is coded using CABAC coding, and the CCB is counted up. If no CCB remains, sign_flag is coded using bypass coding. Note that, as in the example of Figure 54, sign_flag may always be coded using bypass coding.

[0485] The multiple coefficient information flags shown here are just an example, and multiple other coefficient information flags may be coded. For example, some coefficient information flags may not be coded. Furthermore, the coefficient information flags shown here may be replaced with coefficient information flags or parameters having other meanings.

[0486] Also, the example of Figure 55 may be combined with the example of Figure 57. For example, in the example of Figure 55, before four coefficient information flags such as sig_flag and sign_flag are coded, it may be comprehensively determined whether or not the four coefficient information flags can be coded by CABAC coding.

[0487] [Effect of the second example of the third aspect of coefficient coding] As in the example of Fig. 56, in the example of Fig. 57, multiple coefficient information flags (specifically, abs_gt3_flag, abs_gt5_flag, etc.) for expressing the magnitude of a coefficient compared with a threshold are coded in one loop process. Therefore, compared with the example of Fig. 55, the example of Fig. 57 has fewer loop processes. Therefore, the amount of processing can be reduced.

[0488] Compared with the example of Figure 56, the example of Figure 57 has more loop processes for encoding multiple coefficient information flags. However, compared with the example of Figure 56, the example of Figure 57 has some similarities to the example of Figure 54. For example, sign_flag is encoded last. Therefore, compared with the combination of the example of Figure 54 and the example of Figure 56, the combination of the example of Figure 54 and the example of Figure 57 may require fewer changes to the circuit.

[0489] Furthermore, before multiple coefficient information flags are coded, it is comprehensively determined whether or not the multiple coefficient information flags can be coded using CABAC coding, which may simplify processing and reduce processing delay.

[0490] In addition, whether or not the multiple coefficient information flags can be coded by CABAC coding may be comprehensively determined before coding the multiple coefficient information flags, both in the case where orthogonal transform is applied and in the case where orthogonal transform is not applied. This may further reduce the difference between the coding method used for the block to which orthogonal transform is applied and the coding method used for the block to which orthogonal transform is not applied, and may further reduce the circuit scale.

[0491] In the example of Figure 57, sig_flag to abs_gt9_flag are included in one loop, but the encoding method is not limited to this. Multiple loops (for example, two loops) may be used, and for each loop, it may be comprehensively determined whether multiple coefficient information flags can be encoded by CABAC encoding. Although the amount of processing increases compared to one loop, the effect of reducing processing can be similarly obtained compared to the example of Figure 55.

[0492] [Modification of coefficient coding] Any of the above-described aspects and examples of coefficient coding may be combined. Furthermore, any of the above-described aspects and examples of coefficient coding and any of their combinations may be applied to a luminance block or a chrominance block. In this case, different thresholds may be used for the luminance block and the chrominance block.

[0493] Furthermore, for a block to which orthogonal transform is not applied but to which BDPCM (Block-based Delta Pulse Code Modulation) is applied, any of the above-mentioned multiple aspects, multiple examples, and multiple combinations of these may be used. In a block to which BDPCM is applied, the amount of information is reduced by subtracting each residual signal in the block from the residual signal adjacent to that residual signal vertically or horizontally.

[0494] Furthermore, any of the above-described multiple aspects, multiple examples, and any multiple combinations of these regarding coefficient coding may be used for a chrominance block, which is a block to which BDPCM is applied.

[0495] Furthermore, for a block to which ISP (Intra Sub-Partitions) is applied, any of the above-mentioned multiple aspects, multiple examples, and multiple arbitrary combinations of these may be used. In ISP, an intra block is divided vertically or horizontally, and intra prediction of each sub-block is performed using pixel values ​​of sub-blocks adjacent to that sub-block.

[0496] Furthermore, any of the above-described multiple aspects, multiple examples, and any multiple combinations thereof regarding coefficient coding may be used for a chrominance block to which the ISP is applied.

[0497] Furthermore, when chroma joint coding is used as the coding mode for the chroma block, any of the above-described multiple aspects, multiple examples, and any multiple combinations thereof regarding coefficient coding may be used. Here, chroma joint coding is a coding method that derives a Cr value from a Cb value.

[0498] Furthermore, the value of thres when orthogonal transform is applied may be twice the value of thres when orthogonal transform is not applied. Alternatively, the value of thres when orthogonal transform is not applied may be twice the value of thres when orthogonal transform is applied.

[0499] Furthermore, only when chrominance joint coding is used, the CCB thres value when orthogonal transform is applied may be twice the CCB thres value when orthogonal transform is not applied. Alternatively, only when chrominance joint coding is used, the CCB thres value when orthogonal transform is not applied may be twice the CCB thres value when orthogonal transform is applied.

[0500] Furthermore, in the above-described aspects and examples of coefficient coding, the scanning order of multiple coefficients in a block to which no orthogonal transform is applied may be the same as the scanning order of multiple coefficients in a block to which an orthogonal transform is applied.

[0501] Although some examples of syntax are shown in the third aspect and in the examples of the third aspect, the syntax to be applied is not limited to these examples. For example, in the aspects different from the third aspect and in the examples thereof, a syntax different from any of the syntaxes shown in the third aspect and its examples may be used. Various syntaxes for encoding 16 coefficients may be applied.

[0502] In addition, although a processing flow of encoding is shown in multiple aspects and examples of coefficient encoding, the processing flow of decoding is basically the same as the processing flow of encoding, except for whether a bitstream is sent or received. For example, the decoding device 200 may perform inverse orthogonal transform and decoding corresponding to the orthogonal transform and encoding performed by the encoding device 100.

[0503] Furthermore, the flowcharts relating to the multiple aspects and examples of coefficient coding are merely examples, and new conditions or processes may be added to, deleted from, or changed in the flowcharts.

[0504] Here, the coefficients are values ​​constituting an image such as a block or sub-block. Specifically, the multiple coefficients constituting the image may be obtained from multiple pixel values ​​of the image via an orthogonal transform. Alternatively, the multiple coefficients constituting the image may be obtained from multiple pixel values ​​of the image without an orthogonal transform. In other words, the multiple coefficients constituting the image may be multiple pixel values ​​of the image themselves. Furthermore, each pixel value may be a pixel value of the original image or a value of a prediction residual. Furthermore, the coefficients may be quantized.

[0505] [Representative example of configuration and processing] A typical example of the configuration and processing of the encoding device 100 and decoding device 200 shown above is shown below.

[0506] Figure 58 is a flowchart showing the operation of the encoding device 100. For example, the encoding device 100 includes a circuit and a memory connected to the circuit. The circuit and memory included in the encoding device 100 may correspond to the processor a1 and memory a2 shown in Figure 40. The circuit of the encoding device 100 performs the operation shown in Figure 58. Specifically, in operation, the circuit of the encoding device 100 encodes a block of an image (S211).

[0507] In one example, the circuit of the encoding device 100 may encode a block of an image by limiting the number of times that context adaptive encoding is performed. Then, in both cases where an orthogonal transform is applied to the block and where an orthogonal transform is not applied to the block, the sub-block flag encoding process may be performed without being included in the number of times that the process is limited.

[0508] Here, the sub-block flag coding process is a process of coding, by context adaptive coding, a sub-block flag that indicates whether or not a sub-block included in a block includes a non-zero coefficient.

[0509] This may result in the sub-block flags being coded by context adaptive coding, regardless of whether or not orthogonal transform is applied and regardless of the limit on the number of times that context adaptive coding is performed. This may reduce the amount of coding. Furthermore, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, potentially reducing the circuit size.

[0510] Furthermore, when an orthogonal transform is applied to a block, the circuit of the encoding device 100 may perform a position parameter encoding process without including it in the number of processes subject to the limit. Here, the position parameter encoding process is a process of encoding parameters indicating the position of the first non-zero coefficient in scan order in the block using context adaptive coding.

[0511] As a result, when an orthogonal transform is applied, the parameter indicating the position of the first non-zero coefficient may be coded by the context adaptive coding, regardless of the limit on the number of processes of the context adaptive coding, which may reduce the amount of coding.

[0512] Furthermore, when an orthogonal transform is applied to a block, the circuit of the encoding device 100 may determine the limit range of the number of times of processing based on the position of the first non-zero coefficient. This may allow the limit number of times of processing to be appropriately determined when an orthogonal transform is applied. Therefore, it may be possible to appropriately adjust the balance between reducing the amount of coding and reducing processing delay.

[0513] In another example, the circuitry of the encoding device 100 may operate as follows both when an orthogonal transform is applied to a block of an image to be encoded and when an orthogonal transform is not applied to the block.

[0514] Specifically, in both of these cases, if the number of processing times of context adaptive coding is within the limited range of the number of processing times, the circuit of the encoding device 100 may encode the coefficient information flag by context adaptive coding. Also, in both of these cases, if the number of processing times of context adaptive coding is not within the limited range of the number of processing times, the circuit of the encoding device 100 may skip encoding the coefficient information flag. Here, the coefficient information flag indicates the attribute of the coefficient included in the block.

[0515] Then, when the coefficient information flag is coded, the circuit of the coding device 100 may code the residual value information by Golomb-Rice coding. Here, the residual value information is information for reconstructing the value of the coefficient using the coefficient information flag. Furthermore, when coding of the coefficient information flag is skipped, the circuit of the coding device 100 may code the value of the coefficient by Golomb-Rice coding.

[0516] This may result in skipping the coding of the coefficient information flag according to the limit on the number of times that context adaptive coding processes are performed, regardless of whether or not orthogonal transform is applied. Therefore, an increase in processing delay may be suppressed, and an increase in the amount of code may be suppressed. Furthermore, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, resulting in a smaller circuit size.

[0517] Furthermore, the coefficient information flag may be a flag indicating whether or not the value of a coefficient is greater than 1. This may result in skipping the coding of the coefficient information flag indicating whether or not the value of a coefficient is greater than 1, depending on the limited number of times the context adaptive coding is performed, regardless of whether or not an orthogonal transform is applied. This may prevent an increase in processing delay and an increase in the amount of code.

[0518] In yet another example, the circuit of the encoding device 100 may encode a block of an image by limiting the number of times that context adaptive encoding is performed. Then, when an orthogonal transform is not applied to the block, it may determine whether a processing condition is satisfied for multiple coefficient information flags that respectively indicate multiple attributes of coefficients included in the block. Then, when it is determined that the processing condition is satisfied, the multiple coefficient information flags may be encoded by context adaptive encoding.

[0519] Here, the processing condition is a condition that the number of processing times when the number of coefficient information flags is added to the number of processing times is within a limit range of the number of processing times.

[0520] This may enable a comprehensive determination of whether or not context adaptive coding can be used for multiple coefficient information flags when orthogonal transform is not applied. Therefore, processing may be simplified and processing delay may be reduced. Furthermore, when similar processing is performed on blocks to which orthogonal transform is applied, the difference between the coding method used for blocks to which orthogonal transform is applied and the coding method used for blocks to which orthogonal transform is not applied may be reduced, potentially reducing the circuit scale.

[0521] Furthermore, the multiple coefficient information flags may include a coefficient information flag indicating whether or not the coefficient value is greater than 3, and a coefficient information flag indicating whether or not the coefficient value is greater than 5. This may enable a comprehensive determination to be made on multiple coefficient information flags including a coefficient information flag indicating whether or not the coefficient value is greater than 3, and a coefficient information flag indicating whether or not the coefficient value is greater than 5. This may simplify the processing and reduce processing delays.

[0522] The multiple coefficient information flags may include a coefficient information flag indicating whether or not the coefficient value is greater than 7, and a coefficient information flag indicating whether or not the coefficient value is greater than 9. This may enable a comprehensive determination to be made on multiple coefficient information flags including four coefficient information flags indicating whether or not the coefficient value is greater than 3, whether or not the coefficient value is greater than 5, whether or not the coefficient value is greater than 7, and whether or not the coefficient value is greater than 9. This may simplify the processing and reduce processing delays.

[0523] The above operations performed by the circuitry of the encoding device 100 may be performed by the entropy encoding unit 110 of the encoding device 100.

[0524] Figure 59 is a flowchart showing the operation of the decoding device 200. For example, the decoding device 200 includes a circuit and a memory connected to the circuit. The circuit and memory included in the decoding device 200 may correspond to the processor b1 and memory b2 shown in Figure 46. The circuit of the decoding device 200 performs the operation shown in Figure 59. Specifically, in operation, the circuit of the decoding device 200 decodes a block of an image (S221).

[0525] In one example, the circuit of the decoding device 200 may decode a block of an image by limiting the number of context adaptive decoding operations, and the sub-block flag decoding operation may be performed without being included in the limited number of operations both when an inverse orthogonal transform is applied to the block and when an inverse orthogonal transform is not applied to the block.

[0526] Here, the sub-block flag decoding process is a process of decoding a sub-block flag, which indicates whether or not a sub-block included in a block includes a non-zero coefficient, by context adaptive decoding.

[0527] As a result, the sub-block flags may be decoded by context adaptive decoding regardless of whether inverse orthogonal transform is applied or regardless of the limit on the number of context adaptive decoding processes. Therefore, the amount of code may be reduced. Furthermore, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied becomes smaller, which may result in a smaller circuit size.

[0528] Furthermore, when an inverse orthogonal transform is applied to a block, the circuit of the decoding device 200 may perform a position parameter decoding process without including it in the number of processes subject to limitation. Here, the position parameter decoding process is a process of decoding parameters indicating the position of the first non-zero coefficient in scan order in the block by context adaptive decoding.

[0529] As a result, when an inverse orthogonal transform is applied, the parameter indicating the position of the first non-zero coefficient may be decoded by context adaptive decoding, regardless of the limit on the number of times that context adaptive decoding is performed, and therefore the amount of coding may be reduced.

[0530] Furthermore, when an inverse orthogonal transform is applied to a block, the circuit of the decoding device 200 may determine the limit range of the number of times of processing based on the position of the first non-zero coefficient. This may allow the limit number of times of processing to be appropriately determined when an inverse orthogonal transform is applied. Therefore, it may be possible to appropriately adjust the balance between reducing the amount of coding and reducing processing delay.

[0531] In another example, the circuitry of the decoding device 200 may operate as follows both when an inverse orthogonal transform is applied to a block of an image to be decoded and when an inverse orthogonal transform is not applied to the block.

[0532] Specifically, in both of these cases, if the number of times the context adaptive decoding process is performed is within the limited range, the circuit of the decoding device 200 may decode the coefficient information flag by context adaptive decoding. Also, in both of these cases, if the number of times the context adaptive decoding process is performed is not within the limited range, the circuit of the decoding device 200 may skip decoding the coefficient information flag. Here, the coefficient information flag indicates the attribute of the coefficient included in the block.

[0533] Then, when the coefficient information flag is decoded, the circuit of the decoding device 200 may decode the residual value information by Golomb-Rice decoding. Here, the residual value information is information for reconstructing the value of the coefficient using the coefficient information flag. Furthermore, when the decoding of the coefficient information flag is skipped, the circuit of the decoding device 200 may decode the value of the coefficient by Golomb-Rice decoding.

[0534] As a result, regardless of whether or not inverse orthogonal transform is applied, decoding of coefficient information flags may be skipped according to the limit on the number of times that context adaptive decoding is performed. Therefore, an increase in processing delay may be suppressed, and an increase in the amount of code may be suppressed. In addition, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied may be reduced, and the circuit scale may be reduced.

[0535] Furthermore, the coefficient information flag may be a flag indicating whether or not the value of a coefficient is greater than 1. This may result in skipping the decoding of the coefficient information flag indicating whether or not the value of a coefficient is greater than 1, depending on the limited number of times that context adaptive decoding is performed, regardless of whether inverse orthogonal transform is applied. This may prevent an increase in processing delay and an increase in the amount of code.

[0536] In yet another example, the circuit of the decoding device 200 may decode a block of an image by limiting the number of times that context adaptive decoding is performed. Then, when an inverse orthogonal transform is not applied to the block, it may determine whether a processing condition is satisfied for multiple coefficient information flags that respectively indicate multiple attributes of coefficients included in the block. Then, when it is determined that the processing condition is satisfied, the multiple coefficient information flags may be decoded by context adaptive decoding.

[0537] Here, the processing condition is a condition that the number of processing times when the number of coefficient information flags is added to the number of processing times is within a limit range of the number of processing times.

[0538] As a result, when inverse orthogonal transform is not applied, whether or not context adaptive decoding can be used may be comprehensively determined for multiple coefficient information flags. Therefore, processing may be simplified and processing delay may be reduced. Furthermore, when similar processing is performed on blocks to which inverse orthogonal transform is applied, the difference between the decoding method used for blocks to which inverse orthogonal transform is applied and the decoding method used for blocks to which inverse orthogonal transform is not applied may be reduced, and the circuit scale may be reduced.

[0539] Furthermore, the multiple coefficient information flags may include a coefficient information flag indicating whether or not the coefficient value is greater than 3, and a coefficient information flag indicating whether or not the coefficient value is greater than 5. This may enable a comprehensive determination to be made on multiple coefficient information flags including a coefficient information flag indicating whether or not the coefficient value is greater than 3, and a coefficient information flag indicating whether or not the coefficient value is greater than 5. This may simplify the processing and reduce processing delays.

[0540] The multiple coefficient information flags may include a coefficient information flag indicating whether or not the coefficient value is greater than 7, and a coefficient information flag indicating whether or not the coefficient value is greater than 9. This may enable a comprehensive determination to be made on multiple coefficient information flags including four coefficient information flags indicating whether or not the coefficient value is greater than 3, whether or not the coefficient value is greater than 5, whether or not the coefficient value is greater than 7, and whether or not the coefficient value is greater than 9. This may simplify the processing and reduce processing delays.

[0541] The above operations performed by the circuitry of the decoding device 200 may be performed by the entropy decoding unit 202 of the decoding device 200.

[0542] [Other examples] The encoding device 100 and the decoding device 200 in each of the above-described examples may be used as an image encoding device and an image decoding device, or as a video encoding device and a video decoding device, respectively.

[0543] Furthermore, the encoding device 100 and the decoding device 200 may perform only some of the above-described operations, and other devices may perform other operations. Furthermore, the encoding device 100 and the decoding device 200 may include only some of the above-described components, and other devices may include other components.

[0544] Furthermore, at least some of the above-described examples may be used as an encoding method or a decoding method, or may be used as another method.

[0545] Each component may be implemented by dedicated hardware or by executing a software program suitable for that component. Each component may be implemented by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0546] Specifically, each of the encoding device 100 and the decoding device 200 may include a processing circuitry and a storage device electrically connected to and accessible from the processing circuitry. For example, the processing circuitry corresponds to the processor a1 or b1, and the storage device corresponds to the memory a2 or b2.

[0547] The processing circuit includes at least one of dedicated hardware and a program execution unit, and executes processing using a storage device. If the processing circuit includes a program execution unit, the storage device stores the software program executed by the program execution unit.

[0548] Here, the software for realizing the encoding device 100 or the decoding device 200 described above is the following program.

[0549] For example, this program may cause a computer to execute an encoding method in which a block of an image is encoded by limiting the number of times that context adaptive encoding is performed, and in encoding the block, a sub-block flag encoding process is performed by context adaptive encoding to encode a sub-block flag indicating whether or not a sub-block included in the block contains a non-zero coefficient, both when an orthogonal transform is applied to the block and when an orthogonal transform is not applied to the block, without including the number of times that the process is performed.

[0550] Furthermore, for example, this program may cause a computer to execute a decoding method in which a block of an image is decoded by limiting the number of times of context adaptive decoding, and in decoding the block, a sub-block flag decoding process is performed by context adaptive decoding to decode a sub-block flag indicating whether or not a sub-block included in the block contains a non-zero coefficient, both when an inverse orthogonal transform is applied to the block and when an inverse orthogonal transform is not applied to the block, without including the number of times of processing.

[0551] Furthermore, for example, this program may cause a computer to execute an encoding method in which, both when an orthogonal transform is applied to a block of an image to be encoded and when an orthogonal transform is not applied to the block, if the number of times the context adaptive encoding is performed is within a limited range of the number of times the processing is performed, encoding a coefficient information flag indicating an attribute of a coefficient included in the block by context adaptive encoding; if the number of times the processing is performed is not within the limited range of the number of times the processing is performed, encoding the coefficient information flag; if the coefficient information flag has been encoded, encoding residual value information for reconstructing the value of the coefficient using the coefficient information flag by Golomb-Rice coding; and if the encoding of the coefficient information flag has been skipped, encoding the value of the coefficient by Golomb-Rice coding.

[0552] Furthermore, for example, this program may cause a computer to execute a decoding method in which, both in a case where an inverse orthogonal transform is applied to a block of an image to be decoded and in a case where an inverse orthogonal transform is not applied to the block, if the number of times of context adaptive decoding is within a limited range of the number of times of processing, a coefficient information flag indicating an attribute of a coefficient included in the block is decoded by context adaptive decoding, if the number of times of processing is not within the limited range of the number of times of processing, the decoding of the coefficient information flag is skipped, if the coefficient information flag is decoded, residual value information for reconstructing the value of the coefficient using the coefficient information flag is decoded by Golomb-Rice decoding, and if the decoding of the coefficient information flag is skipped, the value of the coefficient is decoded by Golomb-Rice decoding.

[0553] Furthermore, for example, this program may cause a computer to execute an encoding method that encodes a block of an image by limiting the number of times that context adaptive encoding is performed, and in encoding the block, when an orthogonal transform is not applied to the block, determines whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, encodes the plurality of coefficient information flags by context adaptive encoding, wherein the processing condition is a condition that the number of times that the number of times of processing is added to the number of the plurality of coefficient information flags is within a limited range of the number of times of processing.

[0554] Furthermore, for example, the program may cause a computer to execute a decoding method in which the number of times that context adaptive decoding is performed is limited and a block of an image is decoded, and in the decoding of the block, when an inverse orthogonal transform is not applied to the block, whether a processing condition is satisfied for a plurality of coefficient information flags that respectively indicate a plurality of attributes of coefficients included in the block, and if it is determined that the processing condition is satisfied, the plurality of coefficient information flags are decoded by context adaptive decoding, and the processing condition is a condition that the number of times that the number of times of processing is added to the number of the plurality of coefficient information flags is within a limited range of the number of times of processing.

[0555] Furthermore, each component may be a circuit, as described above. These circuits may form a single circuit as a whole, or each may be a separate circuit. Furthermore, each component may be realized by a general-purpose processor or a dedicated processor.

[0556] Furthermore, a process performed by a specific component may be performed by another component. The order in which the processes are performed may be changed, or multiple processes may be performed in parallel. Furthermore, the encoding / decoding device may include the encoding device 100 and the decoding device 200.

[0557] Furthermore, the ordinal numbers such as first and second used in the description may be changed as appropriate. Furthermore, new ordinal numbers may be assigned to components, or ordinal numbers may be removed.

[0558] Although the aspects of the encoding device 100 and the decoding device 200 have been described above based on a number of examples, the aspects of the encoding device 100 and the decoding device 200 are not limited to these examples. As long as they do not deviate from the spirit of the present disclosure, various modifications conceivable by those skilled in the art to each example, or configurations constructed by combining components of different examples, may also be included within the scope of the aspects of the encoding device 100 and the decoding device 200.

[0559] One or more aspects disclosed herein may be implemented in combination with at least a part of other aspects of the present disclosure. Also, some processes shown in the flowcharts of one or more aspects disclosed herein, some configurations of devices, some syntax, etc. may be implemented in combination with other aspects.

[0560] [Implementation and Application] In each of the above embodiments, each of the functional or operational blocks can usually be realized by an MPU (micro processing unit), memory, etc. Furthermore, the processing by each of the functional blocks may be realized as a program execution unit such as a processor that reads and executes software (programs) recorded on a recording medium such as a ROM. The software may be distributed. The software may be recorded on various recording media such as semiconductor memory. It is also possible to realize each functional block by hardware (dedicated circuitry). Various combinations of hardware and software may be employed.

[0561] The processing described in each embodiment may be realized by centralized processing using a single device (system), or may be realized by distributed processing using multiple devices. Furthermore, the processor that executes the program may be a single processor or multiple processors. In other words, centralized processing or distributed processing may be performed.

[0562] The aspects of the present disclosure are not limited to the above examples, and various modifications are possible, and these modifications are also included within the scope of the aspects of the present disclosure.

[0563] Furthermore, here, application examples of the video coding method (image coding method) or video decoding method (image decoding method) shown in each of the above embodiments and various systems implementing the application examples will be described. Such systems may be characterized by having an image coding device using the image coding method, an image decoding device using the image decoding method, or an image coding / decoding device including both. Other configurations of such systems can be appropriately changed depending on the situation.

[0564] [Usage example] 60 is a diagram showing the overall configuration of an appropriate content supply system ex100 that realizes a content distribution service. The area where communication services are provided is divided into cells of a desired size, and base stations ex106, ex107, ex108, ex109, and ex110, which are fixed wireless stations in the illustrated example, are installed in each cell.

[0565] In this content supply system ex100, devices such as a computer ex111, a game console ex112, a camera ex113, a home appliance ex114, and a smartphone ex115 are connected to the Internet ex101 via an Internet service provider ex102 or a communication network ex104 and base stations ex106 to ex110. The content supply system ex100 may connect any combination of the above devices. In various implementations, the devices may be connected to each other directly or indirectly via a telephone network or short-range wireless communication, without the intervention of the base stations ex106 to ex110. Furthermore, the streaming server ex103 may be connected to devices such as the computer ex111, the game console ex112, the camera ex113, the home appliance ex114, and the smartphone ex115 via the Internet ex101, etc. Furthermore, the streaming server ex103 may be connected to a terminal in a hotspot on an airplane ex117, etc., via a satellite ex116.

[0566] Note that wireless access points, hotspots, etc. may be used instead of the base stations ex106 to ex110. Furthermore, the streaming server ex103 may be directly connected to the communication network ex104 without going through the Internet ex101 or the Internet service provider ex102, or may be directly connected to an airplane ex117 without going through a satellite ex116.

[0567] The camera ex113 is a device capable of taking still images and videos, such as a digital camera. The smartphone ex115 is a smartphone, mobile phone, or PHS (Personal Handy-phone System) compatible with mobile communication systems such as 2G, 3G, 3.9G, 4G, and the upcoming 5G.

[0568] The home appliance ex114 is a refrigerator or an appliance included in a home fuel cell cogeneration system.

[0569] In the content supply system ex100, a terminal having a photographing function is connected to a streaming server ex103 via a base station ex106 or the like, thereby enabling live streaming and the like. In live streaming, a terminal (such as a computer ex111, a game console ex112, a camera ex113, a home appliance ex114, a smartphone ex115, or a terminal on an airplane ex117) may perform the encoding process described in each of the above embodiments on still image or video content captured by a user using the terminal, may multiplex the video data obtained by encoding with audio data obtained by encoding audio corresponding to the video, and may transmit the obtained data to the streaming server ex103. In other words, each terminal functions as an image encoding device according to one aspect of the present disclosure.

[0570] Meanwhile, the streaming server ex103 streams the transmitted content data to the requesting client. The client may be a computer ex111, a game console ex112, a camera ex113, a home appliance ex114, a smartphone ex115, or a terminal on an airplane ex117, which is capable of decoding the encoded data. Each device that receives the distributed data may decode and play the received data. That is, each device may function as an image decoding device according to one aspect of the present disclosure.

[0571] [Distributed processing] The streaming server ex103 may also be multiple servers or multiple computers that process, record, and distribute data in a distributed manner. For example, the streaming server ex103 may be implemented as a CDN (Content Delivery Network), where content distribution is achieved through a network connecting numerous edge servers distributed around the world. In a CDN, a physically nearby edge server can be dynamically assigned depending on the client. Content is then cached and distributed to that edge server, thereby reducing latency. Furthermore, when certain types of errors occur or communication conditions change due to increased traffic, processing can be distributed among multiple edge servers, the distribution entity can be switched to another edge server, or distribution can be continued by bypassing the failed portion of the network, thereby achieving high-speed and stable distribution.

[0572] In addition to the distributed processing of the distribution itself, the encoding of captured data can be performed on each device, on the server side, or shared among devices. For example, encoding generally involves two processing loops. The first loop detects the image complexity or code size for each frame or scene. The second loop maintains image quality while improving encoding efficiency. For example, a device can perform the first encoding process, and the server that receives the content can perform the second encoding process, thereby improving content quality and efficiency while reducing the processing load on each device. In this case, if there is a request for near-real-time reception and decoding, the data encoded by a device can be received and played back on another device, enabling more flexible real-time distribution.

[0573] As another example, the camera ex113 or the like extracts features (quantities of features or characteristics) from an image, compresses the data related to the features as metadata, and transmits the compressed data to the server. The server performs compression according to the meaning of the image (or the importance of the content), for example, by determining the importance of an object from the features and switching the quantization precision accordingly. The feature data is particularly effective in improving the accuracy and efficiency of motion vector prediction when the server recompresses the image. Alternatively, the terminal may perform simple encoding such as VLC (variable length coding), and the server may perform encoding with a heavy processing load such as CABAC (context-adaptive binary arithmetic coding).

[0574] As another example, in a stadium, shopping mall, factory, etc., there may be multiple pieces of video data that have been shot by multiple terminals of almost the same scene. In this case, using the multiple terminals that shot the video and, as necessary, other terminals and servers that did not shoot the video, encoding processes are assigned to each of them, for example, in units of GOPs (Group of Pictures), pictures, or tiles obtained by dividing a picture, for distributed processing. This reduces delays and achieves better real-time performance.

[0575] Since multiple video data are of nearly the same scene, the server may manage and / or instruct the video data shot by each terminal to be mutually referential. The server may also receive encoded data from each terminal and change the reference relationships between multiple data, or correct or replace the pictures themselves and re-encode them. This allows for the generation of streams with improved quality and efficiency for each piece of data.

[0576] Furthermore, the server may perform transcoding to change the encoding format of the video data before distributing it. For example, the server may convert an MPEG-based encoding format into a VP-based encoding format (e.g., VP9), or convert H.264 to H.265.

[0577] In this way, the encoding process can be performed by a terminal or one or more servers. Therefore, although the following uses terms such as "server" or "terminal" to refer to the entity performing the process, some or all of the processing performed by the server may be performed by the terminal, and some or all of the processing performed by the terminal may be performed by the server. The same applies to the decoding process.

[0578] [3D, multi-angle] Images or videos of different scenes or the same scene taken from different angles by multiple devices such as cameras ex113 and / or smartphones ex115 that are approximately synchronized with each other are increasingly being integrated for use. The videos taken by each device can be integrated based on the relative positions of the devices acquired separately or on areas where feature points in the videos match.

[0579] The server may not only encode 2D video, but also encode still images automatically or at a time specified by the user based on scene analysis of the video and transmit them to the receiving terminal. Furthermore, if the server can acquire the relative positional relationship between the capturing terminals, it can generate a 3D shape of the scene based on not only the 2D video but also images of the same scene captured from different angles. The server may separately encode 3D data generated by point clouds, etc., or may select or reconstruct images to be transmitted to the receiving terminal from images captured by multiple terminals based on the results of recognizing or tracking people or objects using the 3D data.

[0580] In this way, a user can enjoy a scene by arbitrarily selecting each video corresponding to each shooting device, or can enjoy content in which a video from a selected viewpoint is cut out from 3D data reconstructed using multiple images or videos. Furthermore, together with the video, sound may also be collected from multiple different angles, and the server may multiplex the sound from a specific angle or space with the corresponding video and transmit the multiplexed video and sound.

[0581] In recent years, content that associates the real world with a virtual world, such as Virtual Reality (VR) and Augmented Reality (AR), has also become popular. In the case of VR images, the server creates viewpoint images for the right eye and left eye, and may perform encoding that allows reference between the viewpoint images using Multi-View Coding (MVC) or the like, or may encode them as separate streams without mutual reference. When decoding the separate streams, it is preferable to play them in synchronization with each other so that a virtual three-dimensional space is reproduced according to the user's viewpoint.

[0582] In the case of AR images, the server may superimpose virtual object information in the virtual space onto camera information in the real space based on the 3D position or the movement of the user's viewpoint. The decoding device may acquire or store virtual object information and 3D data, generate a 2D image according to the movement of the user's viewpoint, and smoothly connect the images to create superimposed data. Alternatively, the decoding device may send the user's viewpoint movement to the server in addition to a request for virtual object information. The server may create superimposed data based on the viewpoint movement received from the 3D data stored on the server, encode the superimposed data, and distribute it to the decoding device. Note that the superimposed data typically has an α value indicating transparency in addition to RGB. The server may set the α value of parts other than the object created from the 3D data to 0, for example, to encode the parts in a transparent state. Alternatively, the server may generate data by setting a predetermined RGB value as the background, like a chromakey, and using the background color for parts other than the object. The predetermined RGB value may be predetermined.

[0583] Similarly, the decoding of distributed data may be performed by the client (e.g., a terminal), by the server, or by both parties. As an example, a terminal may first send a reception request to a server, and then another terminal may receive and decode content according to the request, and then transmit the decoded signal to a device with a display. By distributing the processing and selecting appropriate content regardless of the performance of the communication-capable terminals themselves, it is possible to reproduce data with high image quality. As another example, large-sized image data may be received on a TV or the like, and only a portion of the picture, such as a tile into which the picture is divided, may be decoded and displayed on the viewer's personal device. This allows the viewer to share the overall picture while checking their own area of ​​responsibility or an area they wish to view in more detail.

[0584] In situations where multiple short-, medium-, or long-range wireless communications are available, both indoors and outdoors, it may be possible to seamlessly receive content using distribution system standards such as MPEG-DASH. Users may freely select and switch between decoding and display devices, such as their own devices and indoor / outdoor displays, in real time. Decoding can also be performed by switching between decoding and display devices using location information. This allows information to be mapped and displayed on a part of the wall or ground of a neighboring building with an embedded display device while the user is moving toward their destination. It is also possible to switch the bit rate of received data based on the accessibility of the encoded data on the network, such as if the encoded data is cached on a server that can be quickly accessed from the receiving device or copied to an edge server in a content delivery service.

[0585] [Scalable Coding] Regarding content switching, we will explain it using a scalable stream, as shown in Figure 61, compressed and encoded using the video encoding method described in each of the above embodiments. The server may have multiple streams with the same content but different qualities as individual streams. Alternatively, the server may switch content by taking advantage of the characteristics of a temporally / spatially scalable stream, which is achieved by encoding the content separately into layers, as shown in the figure. In other words, the decoding side determines which layer to decode based on internal factors such as performance and external factors such as communication bandwidth, allowing the decoding side to freely switch between low-resolution and high-resolution content. For example, if a user wants to continue watching a video they were watching on their smartphone ex115 while on the go on a device such as an Internet TV after returning home, the device can simply decode the same stream up to a different layer, thereby reducing the burden on the server.

[0586] Furthermore, as described above, pictures are coded for each layer, and in addition to the configuration in which scalability is achieved by an enhancement layer above the base layer, the enhancement layer may include meta-information based on image statistics, etc. The decoding side may generate high-quality content by super-resolving pictures in the base layer based on the meta-information. Super-resolution may improve the signal-to-noise ratio while maintaining and / or expanding the resolution. The meta-information may include information for specifying linear or non-linear filter coefficients used in super-resolution processing, or information for specifying parameter values ​​in filter processing, machine learning, or least-squares calculations used in super-resolution processing.

[0587] Alternatively, a configuration may be provided in which a picture is divided into tiles or the like according to the meaning of objects in the image. The decoding side selects tiles to decode, thereby decoding only a portion of the area. Furthermore, by storing the object's attributes (such as a person, a car, or a ball) and its position in the video (such as a coordinate position in the same image) as meta information, the decoding side can identify the position of a desired object based on the meta information and determine the tile containing the object. For example, as shown in Figure 62, the meta information may be stored using a data storage structure different from pixel data, such as an SEI (supplemental enhancement information) message in HEVC. This meta information indicates, for example, the position, size, or color of the main object.

[0588] Meta information may be stored in units consisting of multiple pictures, such as streams, sequences, or random access units. The decoding side can obtain the time when a specific person appears in the video, and by combining the picture-by-picture information with the time information, it can identify the picture in which the object exists and determine the position of the object within the picture.

[0589] [Webpage optimization] FIG. 63 is a diagram showing an example of a display screen of a web page on a computer ex111 or the like. FIG. 64 is a diagram showing an example of a display screen of a web page on a smartphone ex115 or the like. As shown in FIGS. 63 and 64, a web page may include multiple link images that are links to image content, and the appearance of the link images may differ depending on the device on which the page is viewed. When multiple link images are visible on the screen, the display device (decoding device) may display a still image or I-picture included in each content as a link image, or may display a video such as a GIF animation using multiple still images or I-pictures, or may receive only the base layer and decode and display the video until the user explicitly selects the link image, or until the link image approaches the center of the screen or until the entire link image is within the screen.

[0590] When a link image is selected by a user, the display device performs decoding, for example, giving top priority to the base layer. Note that if the HTML constituting the web page contains information indicating that the content is scalable, the display device may also decode up to the enhancement layer. Furthermore, to ensure real-time performance, before selection or when the communication bandwidth is very limited, the display device decodes and displays only forward-referenced pictures (I pictures, P pictures, and forward-reference-only B pictures), thereby reducing the delay between the decoding time of the first picture and the display time (the delay from the start of content decoding to the start of display). Furthermore, the display device may intentionally ignore the picture reference relationships and roughly decode all B and P pictures using forward reference, and then perform normal decoding as the number of received pictures increases over time.

[0591] [Autonomous driving] Furthermore, when transmitting and receiving still image or video data such as 2D or 3D map information for automatic driving or driving assistance of a vehicle, the receiving terminal may receive weather or construction information as meta information in addition to image data belonging to one or more layers, and may associate and decode these. Note that the meta information may belong to a layer, or may simply be multiplexed with the image data.

[0592] In this case, since a vehicle, drone, or airplane including a receiving terminal is moving, the receiving terminal can transmit location information of the receiving terminal, thereby realizing seamless reception and decoding while switching between base stations ex106 to ex110. Furthermore, the receiving terminal can dynamically switch how much meta information to receive or how much to update map information depending on the user's selection, the user's situation, and / or the state of the communication bandwidth.

[0593] In the content supply system ex100, the client can receive, decode, and play back encoded information sent by a user in real time.

[0594] [Distribution of personal content] Furthermore, the content supply system ex100 allows not only high-quality, long-duration content from video distribution companies, but also low-quality, short-duration content from individuals via unicast or multicast. It is expected that such personal content will continue to increase in the future. To improve the quality of personal content, the server may perform editing before encoding. This can be achieved, for example, using the following configuration.

[0595] During shooting, either in real time or after accumulating and shooting, the server performs recognition processing such as detecting shooting errors, scene search, semantic analysis, and object detection from the original image data or encoded data. Based on the recognition results, the server manually or automatically corrects out-of-focus or camera shake, deletes less important scenes such as scenes with lower brightness or out-of-focus compared to other pictures, emphasizes object edges, changes color, and performs other editing. The server then encodes the edited data based on the editing results. It is also known that viewing rates decrease if the shooting time is too long. Therefore, the server may automatically clip not only less important scenes as described above but also scenes with little movement, based on the image processing results, so that the content falls within a specific time range depending on the shooting time. Alternatively, the server may generate and encode a digest based on the results of the semantic analysis of the scenes.

[0596] Personal content may contain content that, if left as is, violates copyright, moral rights, or portrait rights, and may cause the scope of sharing to exceed the intended scope, resulting in inconvenience to individuals. Therefore, for example, the server may intentionally defocus images of people's faces on the periphery of the screen or the interior of a house before encoding. Furthermore, the server may recognize whether the image to be encoded contains the face of a person other than a pre-registered person, and if so, perform processing such as blurring the face. Alternatively, as pre- or post-processing before encoding, the user may specify a person or background area they wish to modify in the image for copyright or other reasons. The server may replace the specified area with another image or blur the focus. If the image contains a person, the server may track the person in the video and replace the image of the person's face.

[0597] Because viewing personal content with small data volumes requires real-time performance, the decoding device may first receive the base layer as a top priority and decode and play it back, depending on the bandwidth. The decoding device may also receive the enhancement layer during this time, and if the content is played back more than once, such as when playback is looped, play back high-quality video including the enhancement layer. A stream that has undergone scalable encoding in this way can provide an experience in which the video appears rough when not selected or when viewing begins, but gradually becomes smoother and the image quality improves. In addition to scalable encoding, a similar experience can also be provided by configuring a single stream consisting of a rough stream played the first time and a second stream that is encoded with reference to the first video.

[0598] [Other application examples] Furthermore, these encoding or decoding processes are generally performed by an LSI ex500 possessed by each terminal. The LSI (large scale integration circuitry) ex500 (see FIG. 60) may be a single chip or may be configured with multiple chips. It is also possible to incorporate video encoding or decoding software into some kind of recording medium (such as a CD-ROM, flexible disk, or hard disk) that can be read by a computer ex111 or the like, and perform the encoding or decoding process using that software. Furthermore, if the smartphone ex115 is equipped with a camera, video data captured by the camera may be transmitted. This video data may be data encoded by the LSI ex500 possessed by the smartphone ex115.

[0599] The LSIex500 may be configured to download and activate application software. In this case, the terminal first determines whether it supports the content encoding method or has the capability to execute a specific service. If the terminal does not support the content encoding method or does not have the capability to execute a specific service, the terminal may download a codec or application software and then acquire and play the content.

[0600] Furthermore, at least one of the video encoding device (image encoding device) or video decoding device (image decoding device) of each of the above embodiments can be incorporated into a digital broadcasting system, not limited to the content supply system ex100 via the Internet ex101. Since multiplexed data in which video and audio are multiplexed is transmitted and received over broadcast radio waves using a satellite or the like, the content supply system ex100 is more suited to multicast than the content supply system ex100, which is more suited to unicast, but similar applications are possible with regard to encoding and decoding processes.

[0601] [Hardware configuration] FIG. 65 is a diagram illustrating further details of the smartphone ex115 illustrated in FIG. 60. FIG. 66 is a diagram illustrating an example configuration of the smartphone ex115. The smartphone ex115 includes an antenna ex450 for transmitting and receiving radio waves to and from the base station ex110, a camera unit ex465 capable of capturing video and still images, and a display unit ex458 for displaying video captured by the camera unit ex465 and decoded data of the video and other images received by the antenna ex450. The smartphone ex115 further includes an operation unit ex466 such as a touch panel, an audio output unit ex457 such as a speaker for outputting voice or sound, an audio input unit ex456 such as a microphone for inputting voice, a memory unit ex467 capable of storing encoded data or decoded data such as captured video or still images, recorded voice, received video or still images, and email, and a slot unit ex464 that serves as an interface with a SIM ex468 for identifying users and authenticating access to various data, including networks. In addition, an external memory may be used instead of the memory unit ex467.

[0602] A main control unit ex460 that can comprehensively control the display unit ex458 and operation unit ex466, etc., is connected to a power supply circuit unit ex461, an operation input control unit ex462, a video signal processing unit ex455, a camera interface unit ex463, a display control unit ex459, a modulation / demodulation unit ex452, a multiplexing / separation unit ex453, an audio signal processing unit ex454, a slot unit ex464, and a memory unit ex467 via a synchronization bus ex470.

[0603] When the power key is turned on by a user, the power supply circuit unit ex461 starts up the smartphone ex115 into an operational state and supplies power to each unit from the battery pack.

[0604] The smartphone ex115 processes calls, data communications, and other communications under the control of a main control unit ex460, which includes a CPU, ROM, RAM, and other components. During a call, the audio signal collected by the audio input unit ex456 is converted to a digital audio signal by the audio signal processing unit ex454, which then performs spectrum spread processing on the modulation / demodulation unit ex452. The resulting signal is then transmitted via the antenna ex450. The received data is then amplified, subjected to frequency conversion and analog-to-digital conversion, subjected to spectrum despreading processing on the modulation / demodulation unit ex452, and converted to an analog audio signal by the audio signal processing unit ex454, which then outputs the resulting signal from the audio output unit ex457. During data communications, text, still images, or video data can be transmitted via the operation input control unit ex462 under the control of the main control unit ex460, based on the operation of the main unit's operation unit ex466, etc. Similar transmission and reception processing is performed. When transmitting video, still images, or video and audio in data communication mode, the video signal processing unit ex455 compresses and encodes the video signal stored in the memory unit ex467 or the video signal input from the camera unit ex465 using the video encoding method described in each of the above embodiments, and sends the encoded video data to the multiplexing / demultiplexing unit ex453. The audio signal processing unit ex454 encodes the audio signal collected by the audio input unit ex456 while the video or still image is being captured by the camera unit ex465, and sends the encoded audio data to the multiplexing / demultiplexing unit ex453. The multiplexing / demultiplexing unit ex453 multiplexes the encoded video data and encoded audio data using a predetermined method, and modulates and converts the multiplexed video data and audio data in the modulation / demodulation unit (modulation / demodulation circuit unit) ex452 and the transmission / reception unit ex451, before transmitting the multiplexed video data and audio data via the antenna ex450. The predetermined method may be determined in advance.

[0605] In the case of receiving video attached to an e-mail or chat, or video linked to a web page, for example, the multiplexed data received via the antenna ex450 is decoded by the multiplexing / demultiplexing unit ex453, which separates the multiplexed data into a video data bitstream and an audio data bitstream. The multiplexing / demultiplexing unit ex453 then demultiplexes the multiplexed data, and supplies the encoded video data to the video signal processing unit ex455 and the encoded audio data to the audio signal processing unit ex454 via the synchronization bus ex470. The video signal processing unit ex455 decodes the video signal using a video decoding method corresponding to the video encoding method described in each of the above embodiments, and displays the video or still images contained in the linked video file on the display unit ex458 via the display control unit ex459. The audio signal processing unit ex454 decodes the audio signal, and audio is output from the audio output unit ex457. As real-time streaming becomes increasingly common, audio playback may be socially inappropriate depending on the user's circumstances. Therefore, it is preferable that the initial setting be a configuration in which only the video data is played without playing the audio signal, and audio may be played in sync only when the user performs an operation such as clicking on the video data.

[0606] Although the smartphone ex115 has been used as an example, other implementations of the terminal are possible, such as a transmitting / receiving terminal having both an encoder and a decoder, a transmitting terminal having only an encoder, and a receiving terminal having only a decoder. In the digital broadcasting system, multiplexed data in which audio data is multiplexed onto video data is received or transmitted. However, in addition to audio data, text data related to the video may also be multiplexed into the multiplexed data. Furthermore, the video data itself may be received or transmitted instead of the multiplexed data.

[0607] While the main control unit ex460, which includes a CPU, has been described as controlling the encoding and decoding processes, various terminals often include a GPU. Therefore, a configuration in which a memory shared by the CPU and GPU, or a memory with addresses managed for common use, is also possible, leveraging the GPU's performance to process a large area at once. This shortens encoding time, ensures real-time performance, and achieves low latency. It is particularly efficient to perform motion estimation, deblocking filtering, SAO (Sample Adaptive Offset), and transformation and quantization processes at a picture level or other unit in the GPU rather than the CPU. [Industrial Applicability]

[0608] The present disclosure is applicable to, for example, television receivers, digital video recorders, car navigation systems, mobile phones, digital cameras, digital video cameras, video conference systems, electronic mirrors, and the like. [Explanation of symbols]

[0609] 100 Encoding device 102 Division 104 Subtraction section 106 Conversion unit 108 Quantization section 110 Entropy coding unit 112, 204 Inverse quantization section 114, 206 Inverse conversion unit 116, 208 Addition section 118, 210 block memory 120, 212 Loop filter section 122, 214 frame memory 124, 216 Intra prediction section 126, 218 Inter prediction section 128, 220 Predictive control section 200 Decryption Device 202 Entropy Decoding Unit 1201 Boundary determination section 1202, 1204, and 1206 switches 1203 Filter decision unit 1205 Filter processing section 1207 Filter characteristic determination section 1208 Processing decision unit a1, b1 processor a2, b2 memory

Claims

1. The circuit and a memory connected to the circuit; In the residual coding of the current block, both when orthogonal transforms using different syntaxes are applied and when the orthogonal transforms are skipped, When a limit on the number of times of context adaptive coding allows multiple coefficient information flags related to coefficients included in the current block to be context adaptively coded collectively, the circuit codes the multiple coefficient information flags using the context adaptive coding and codes residual values ​​of the coefficients using Golomb-Rice coding; If the processing count limit does not allow the plurality of coefficient information flags to be collectively subjected to the context adaptive coding, the circuit skips the coding of the plurality of coefficient information flags and encodes the values ​​of the coefficients by the Golomb-Rice coding; When the orthogonal transform is skipped, the circuit encodes a plurality of absolute value flags related to the magnitude of the absolute value of the coefficient by the context adaptive coding after encoding the plurality of coefficient information flags and before encoding the residual value of the coefficient; When the orthogonal transform is skipped, the plurality of coefficient information flags further include a flag indicating whether the coefficient has a positive value or a negative value. Encoding device.

2. The circuit and a memory connected to the circuit; In the residual decoding of the current block, in both the case where an inverse orthogonal transform using a different syntax is applied and the case where the inverse orthogonal transform is skipped, When a limit on the number of times of context adaptive decoding allows multiple coefficient information flags related to coefficients included in the current block to be context adaptively decoded collectively, the circuit decodes the multiple coefficient information flags by the context adaptive decoding and decodes residual values ​​of the coefficients by Golomb-Rice decoding; When the processing count limit does not allow the context adaptive decoding of the plurality of coefficient information flags collectively, the circuit skips decoding the plurality of coefficient information flags and decodes the values ​​of the coefficients by the Golomb-Rice decoding; When the inverse orthogonal transform is skipped, the circuit decodes, after decoding the coefficient information flags and before decoding the residual values ​​of the coefficients, a plurality of absolute value flags related to the magnitudes of the absolute values ​​of the coefficients by the context adaptive decoding; When the inverse orthogonal transform is skipped, the plurality of coefficient information flags further include a flag indicating whether the coefficient has a positive value or a negative value. Decryption device.

3. The circuit and a memory connected to the circuit; The circuit, in operation, generating information for causing a decoding device to perform residual decoding of the current block; including said information in a bitstream; In the residual decoding of the current block, in both a case where inverse orthogonal transforms using different syntaxes are applied and a case where the inverse orthogonal transform is skipped, When a limit on the number of times of context adaptive decoding allows multiple coefficient information flags related to coefficients included in the current block to be context adaptively decoded collectively, the multiple coefficient information flags are decoded by the context adaptive decoding, and residual values ​​of the coefficients are decoded by Golomb-Rice decoding; When the processing count limit does not allow the context adaptive decoding of the plurality of coefficient information flags collectively, decoding of the plurality of coefficient information flags is skipped, and the value of the coefficient is decoded by the Golomb-Rice decoding; When the inverse orthogonal transform is skipped, after decoding the plurality of coefficient information flags and before decoding the residual values ​​of the coefficients, a plurality of absolute value flags related to magnitudes of absolute values ​​of the coefficients are decoded by the context adaptive decoding; When the inverse orthogonal transform is skipped, the plurality of coefficient information flags further include a flag indicating whether the coefficient has a positive value or a negative value. Bitstream generator.

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