Method for manufacturing a wiring board

Abstract

To provide a wiring board having via conductors with good connection reliability. [Solution] A wiring board according to an embodiment includes forming a first insulating layer (111) that covers the top surface of a conductor layer (121), forming a second insulating layer (112) that covers the top surface of the first insulating layer (111), forming a through hole (11a) that penetrates the second insulating layer (112) and the first insulating layer (111) by irradiating with laser light to expose the conductor layer (121), forming a metal film layer (12a) on the inner surface of the through hole (11a), and filling the through hole (11a) with a plating film layer (12b) to form a via conductor (13). The second insulating layer (112) contains an inorganic filler (F), and the first insulating layer (111) is formed without containing an inorganic filler.

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a wiring board. [Background technology]

[0002] Patent Document 1 discloses a method for manufacturing a wiring board. Two insulating layers (a support insulating layer and a covering insulating layer) are provided between two conductor layers (e.g., a second conductor layer and a first conductor layer) connected by a via conductor. The covering insulating layer and the supporting insulating layer each contain an inorganic filler. The covering insulating layer is formed so as to directly cover the conductor layer that forms the bottom of the via conductor. The inorganic filler content of the covering insulating layer is greater than the inorganic filler content of the supporting insulating layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-219478 Summary of the Invention [Problem to be solved by the invention]

[0004] In the method for manufacturing a wiring board disclosed in Patent Document 1, the inorganic filler content of the covering insulating layer is higher than that of the supporting insulating layer. This is likely to result in the inorganic filler remaining in the via holes for the via conductors formed in the covering insulating layer and the supporting insulating layer. This may make it difficult to achieve reliable connections between the via conductors, which are formed by filling the via holes, and the conductor layer. [Means for solving the problem]

[0005] A method for manufacturing a wiring board of the present invention includes forming a first insulating layer covering an upper surface of a conductor layer, forming a second insulating layer covering an upper surface of the first insulating layer, forming a through hole penetrating the second insulating layer and the first insulating layer by irradiating with laser light to expose the conductor layer, forming a metal film layer on the inner surface of the through hole, and filling the through hole with a plating film layer to form a via conductor. The second insulating layer contains an inorganic filler, and the first insulating layer is formed without containing an inorganic filler.

[0006] According to an embodiment of the present invention, the first insulating layer that directly covers the conductor layer does not contain inorganic filler, which reduces the risk of inorganic filler remaining in the through hole, and it is believed that a wiring board including a via conductor with high connection reliability with the conductor layer can be provided. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a cross-sectional view of an example of a wiring substrate manufactured by a manufacturing method according to an embodiment. [Figure 2] An enlarged view of region II in Figure 1. [Figure 3A] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3B] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3C] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3D] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3E] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3F] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3G] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3H] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3I] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3J] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3K] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3L] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. [Figure 3M] 5A to 5C are cross-sectional views showing an example of a method for manufacturing a wiring board according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] A wiring board manufactured by a wiring board manufacturing method according to an embodiment will be described with reference to the drawings. FIG. 1 shows a cross-sectional view of a wiring board 1, which is an example of a wiring board to be manufactured. Note that the illustrated wiring board 1 is merely an example of a wiring board manufactured by the manufacturing method according to an embodiment. The layered structure of the manufactured wiring board and the number of conductor layers and insulating layers are not limited to the layered structure of the wiring board 1 shown in FIG. 1 and the number of conductor layers and insulating layers included in the wiring board 1. Furthermore, the referenced drawings are not intended to show the exact proportions of the components, but are drawn to facilitate understanding of the features of the present invention.

[0009] The wiring board 1 has two surfaces (a first surface 1F and a second surface 1B opposite the first surface 1F) that are perpendicular to its thickness direction. The wiring board 1 has insulating layers 11 and conductor layers 12 that are alternately stacked. The insulating layer 11 has a two-layer structure including a first insulating layer 111 and a second insulating layer 112. The conductor layers 12 that face each other across the insulating layer 11 are connected by via conductors 13 that penetrate the first insulating layer 111 and the second insulating layer 112. In the illustrated example, the conductor layer 12 that constitutes a part of the first surface 1F is formed in a pattern having a plurality of conductor pads 12fp. The conductor layer 12 that constitutes a part of the second surface 1B is formed in a pattern having a plurality of conductor pads 12bp.

[0010] 1, the first surface 1F side of the wiring board 1 will be referred to as the "top" or "upper side," and the second surface 1B side of the wiring board 1 will be referred to as the "bottom" or "lower side." Furthermore, in each component that makes up the wiring board 1, the surface facing the first surface 1F side of the wiring board 1 will also be referred to as the "top surface," and the surface facing the second surface 1B side of the wiring board 1 will also be referred to as the "bottom surface."

[0011] The first insulating layer 111 and the second insulating layer 112 constituting the insulating layer 11 may each be formed using a thermosetting insulating resin such as an epoxy resin or a phenolic resin. The second insulating layer 112 contains an inorganic filler such as fine particles made of silica (SiO2), alumina, or mullite, while the first insulating layer 111 is formed without containing an inorganic filler.

[0012] Examples of conductors constituting the conductor layer 12 and the via conductors 13 include copper and nickel, and copper is preferably used. The conductor layer 12 and the via conductors 13 have a multilayer structure. The conductor layer 12 and the via conductors 13 have a two-layer structure including a metal film layer 12a, which is preferably a sputtered film layer or an electroless copper plating film layer containing copper or a copper alloy, and a plating film layer 12b, which is preferably an electrolytic copper plating film layer.

[0013] Via conductors 13 that penetrate insulating layer 11 (first insulating layer 111 and second insulating layer 112) in the thickness direction are formed by filling through holes 11a that penetrate insulating layer 11 with a conductor. In the example shown in Fig. 1, via conductors 13 are formed integrally with conductor layer 12 provided thereon. Therefore, via conductors 13 and conductor layer 12 are formed by the same metal film layer 12a and plating film layer 12b.

[0014] In the example of FIG. 1, the wiring board 1 includes a solder resist layer Rf formed on the uppermost insulating layer 11 and conductor layer 12, and a solder resist layer Rb formed below the lowermost insulating layer 11 and conductor layer 12. The solder resist layers Rf and Rb are formed using, for example, photosensitive polyimide resin or epoxy resin. An opening Rfa is formed in the solder resist layer Rf, and the conductor pad 12fp is exposed from the opening Rfa. An opening Rba is formed in the solder resist layer Rb, and the conductor pad 12bp is exposed from the opening Rba.

[0015] In the wiring board 1, the thickness of the conductor layer 12 is, for example, 2 μm to 8 μm. The conductor layer 12 included in the wiring board 1 is patterned to have a predetermined conductor pattern and may have relatively fine, high-density circuit wiring. When the conductor layer 12 is formed to include relatively fine wiring, it may be preferable that the via conductors 13 connecting the opposing conductor layers 12 with one insulating layer 11 interposed therebetween have a relatively small diameter and are formed at a fine pitch. When via conductors 13 with a relatively small diameter are formed, small-diameter through holes 11a may be formed.

[0016] Specifically, the diameter of through hole 11a (the diameter of via conductor 13) may be, for example, 5 μm or more and 30 μm or less. Although the term "diameter" is used, the planar shapes of through hole 11a and via conductor 13 are not necessarily limited to circular. The term "diameter" used with respect to through hole 11a and via conductor 13 means the distance between the longest two points on the periphery of through hole 11a and via conductor 13 on the upper surface of insulating layer 11 (i.e., the upper surface of second insulating layer 112) through which through hole 11a and via conductor 13 penetrate.

[0017] Next, the configuration of the two-layer insulating layer 11 included in the wiring board 1 will be described in detail with reference to Fig. 2. For ease of explanation, in the description with reference to Fig. 2, the lowermost conductor layer among the conductor layers shown in Fig. 2 will be referred to as a first conductor layer 121, and the conductor layer formed above the first conductor layer 121 with one insulating layer 11 interposed therebetween will be referred to as a second conductor layer 122.

[0018] Fig. 2 shows an enlarged view of region II surrounded by a dashed line in Fig. 1. As described with reference to Fig. 1, insulating layer 11 constituting wiring board 1 has a two-layer structure including first insulating layer 111 and second insulating layer 112. Second insulating layer 112 contains inorganic filler F, while first insulating layer 111 is formed without containing inorganic filler.

[0019] Specifically, as shown in the figure, first insulating layer 111 is formed so as to directly cover the upper surface of first conductor layer 121, and second insulating layer 112 is formed so as to directly cover the upper surface of first insulating layer 111. Second insulating layer 112 containing inorganic filler F is not in contact with the upper surface of first conductor layer 121. Therefore, the lower side of the inner wall surface of through hole 11a penetrating insulating layer 11 (near the bottom surface of through hole 11a formed by the upper surface of first conductor layer 121) is made up of first insulating layer 111 which does not contain inorganic filler, and the upper side is made up of second insulating layer 112 which contains inorganic filler F.

[0020] As will be described in detail later in the description of the manufacturing method of the wiring board, the configuration in which first insulating layer 111, which does not contain inorganic filler, directly covers the upper surface of first conductor layer 121 can reduce the risk of inorganic filler remaining in through hole 11a that is formed. Therefore, via conductor 13 filling through hole 11a can be well adhered at its bottom to the upper surface of first conductor layer 121. That is, in wiring board 1, highly reliable connection of via conductor 13 to first conductor layer 121 is achieved.

[0021] The thicknesses of the first insulating layer 111 and the second insulating layer 112 are selected from the viewpoint of reducing the possibility of inorganic filler remaining in the through holes 11a and achieving high connection reliability between the via conductors 13 and the first conductive layer 121. The ratio of the shortest distance d between the upper surface of the first conductive layer 121 and the upper surface of the first insulating layer 111 to the shortest distance D between the upper surfaces of the first conductive layer 121 and the second insulating layer 112 is preferably, for example, 0.1 or more and 0.5 or less. For example, the shortest distance d between the upper surfaces of the first conductive layer 121 and the first insulating layer 111 may have a value of 1 μm or more and 5 μm or less. From the same viewpoint, the filler content in the second insulating layer 112 is preferably, for example, 65 mass % or more and 80 mass % or less, and the maximum particle size of the inorganic filler F contained in the second insulating layer 112 is preferably 3 μm or less. While reducing the possibility of inorganic filler remaining in the through hole 11a, the inorganic filler F in the insulating layer 11 can achieve desired effects such as improving thermal properties such as the coefficient of thermal expansion, improving electromagnetic properties such as the dielectric constant, and improving mechanical properties such as toughness.

[0022] 3A to 3M, a method for manufacturing a wiring board according to an embodiment will be described using, as an example, the case where wiring board 1 shown in Fig. 1 is manufactured. Note that, unless otherwise specified, each component formed in the manufacturing method described below can be formed using the material exemplified as the material of the corresponding component in the description of wiring board 1 in Fig. 1.

[0023] In the following description of the manufacturing method for wiring board 1, the side closer to the core material GS constituting the support substrate SP will be referred to as the "bottom" or "lower side," and the side farther from the core material GS will be referred to as the "top" or "upper side." Therefore, the surface of each element constituting wiring board 1 that faces the support substrate SP will be referred to as the "lower surface," and the surface facing away from the support substrate SP will also be referred to as the "upper surface." Also, in the description of the manufacturing method, for ease of explanation, as in the description of the wiring board with reference to FIG. 2, the conductor layer closest to the support substrate SP will be referred to as the first conductor layer 121, and the conductor layer formed one layer above the first conductor layer 121 will be referred to as the second conductor layer 122.

[0024] First, as shown in FIG. 3A, a support substrate SP is prepared. In the wiring substrate manufacturing method of this embodiment, the support substrate SP used has excellent flatness on two surfaces perpendicular to its thickness direction. The support substrate SP includes a core material GS, such as a glass substrate, a first metal film layer ML1 laminated on both surfaces of the core material GS, and a second metal film layer ML2 laminated on the first metal film layer ML1 via an adhesive layer AL. The first and second metal film layers ML1 and ML2 are metal film layers formed by, for example, electroless plating or sputtering. Although the first and second metal film layers ML1 and ML2 are depicted as single layers in the illustration, they may include multiple layers. For example, the first and second metal film layers ML1 and ML2 may each have a two-layer structure composed of a titanium layer and a copper layer. The adhesive layer AL may include, for example, an azobenzene-based polymer adhesive that can be attached and detached by light irradiation. The support substrate SP may include a silicon substrate, a metal substrate, or a ceramic substrate as a core material GS in addition to a glass substrate.

[0025] Next, as shown in FIG. 3B, a first conductor layer 121 having a plurality of conductor pads 12bp is formed on the support substrate SP. In forming the first conductor layer 121 in contact with the support substrate SP, for example, a plating resist is formed on the second metal film layer ML2, and openings corresponding to the formation areas of the pattern of the conductor pads 12bp are formed in the plating resist by, for example, photolithography. Next, a plating film layer is formed in the openings by electrolytic plating using the second metal film layer ML2 as a seed layer. After the plating film layer is formed, the plating resist is removed, resulting in the state shown in FIG. 3B.

[0026] 3C, insulating layer 11 having a two-layer structure of first insulating layer 111 and second insulating layer 112 is formed on first conductor layer 121. In forming insulating layer 11, for example, a two-layer insulating resin molded into a film is laminated on first conductor layer 121 and cured by applying pressure and heat. Thermosetting insulating resins such as epoxy resins and phenolic resins can be used as the insulating resin.

[0027] Specifically, the insulating resin molded into a film has a two-layer structure consisting of a second insulating layer 112 containing an inorganic filler F such as fine particles made of silica (SiO2), alumina, or mullite, and a first insulating layer 111 containing no inorganic filler. This two-layer film-like insulating resin is laminated on the first conductor layer 121 with the first insulating layer 111 facing downward (i.e., so that the first insulating layer 111 directly covers the first conductor layer 121) and cured. Note that the first insulating layer 111 and the second insulating layer 112 may be laminated separately. The second insulating layer 112 may be formed by laminating an insulating resin containing no inorganic filler on the first conductor layer 121 and curing it, and then laminating an insulating resin containing the inorganic filler F on the first insulating layer 111 and curing it.

[0028] The first insulating layer 111 and the second insulating layer 112 may be formed so that the ratio of the shortest distance d between the upper surface of the first conductor layer 121 and the upper surface of the first insulating layer 111 to the shortest distance D between the upper surface of the first conductor layer 121 and the upper surface of the second insulating layer 112 is, for example, 0.1 or more and 0.5 or less. The first insulating layer 111 may be formed so that the shortest distance d between the upper surface of the first conductor layer 121 and the upper surface of the first insulating layer 111 is, for example, 1 μm or more and 5 μm or less. The second insulating layer 112 is formed so that the inorganic filler content is, for example, 65 mass % or more and 80 mass % or less. For example, the maximum particle size of the inorganic filler F contained in the second insulating layer 112 is 3 μm or less.

[0029] 3C and 3D to 3M, which will be referred to below, show stacks formed on one surface of the support substrate SP, and do not show stacks that may be formed on the opposite surface. However, the opposite surface of the support substrate SP may also have stacks in the same manner and number, or may have conductor layers and insulating layers in a manner and number different from those on one surface, or may not have such conductor layers and insulating layers.

[0030] Next, as shown in FIG. 3D, through holes 11a are formed by irradiating the upper surface of insulating layer 11 with, for example, ultraviolet (UV) laser light at positions where via conductors 13 (see FIG. 1) are to be formed. The UV laser light may have a wavelength of 100 nm or more and 500 nm or less. The formation of through holes 11a by irradiating with laser light may be performed by irradiating the upper surface of second insulating layer 112 with laser light while protecting the upper surface by covering it with a protective film (not shown) such as a polyethylene naphthalate (PEN) film. Through holes 11a are formed that penetrate the protective film and insulating layer 11. Through holes 11a may be formed so that their diameter at the surface of insulating layer 11 (upper surface of second insulating layer 112) is, for example, 5 μm or more and 30 μm or less.

[0031] When forming the through hole 11a in the insulating layer 11, the insulating resin constituting the second insulating layer 112 and the first insulating layer 111 at the position where the through hole 11a is to be formed is removed by ablation with laser light. At this time, the inorganic filler F contained in the second insulating layer 112 can also be removed by ablation with laser light. When the insulating layer 11 is composed of a single layer containing inorganic filler, the inorganic filler near the bottom of the through hole 11a that should be removed may not be completely removed due to insufficient energy of the laser light, and may remain in the through hole 11a. Residual inorganic filler in the through hole 11a can cause poor adhesion between the metal film layer 12a (see FIG. 3E) formed on the inner surface of the through hole 11a and the first conductor layer 121. However, in the method for manufacturing a wiring board according to the embodiment, the first insulating layer 111 that directly covers the first conductor layer 121 does not contain inorganic filler. Therefore, inorganic filler is unlikely to remain in the formed through hole 11a.

[0032] In particular, by setting the ratio of distance d to distance D, the value of distance d, the inorganic filler content of second insulating layer 112, and the maximum particle size of inorganic filler F contained in second insulating layer 112 to the above-mentioned values, the residue of inorganic filler in through hole 11a can be more effectively suppressed.

[0033] 3E, a metal film layer 12a is formed on the inner wall of the through hole 11a and the surface of the second insulating layer 112, for example, by sputtering. In forming the metal film layer 12a, copper or a copper alloy is used as a sputtering target, and the metal film layer 12a can be formed as a sputtered film containing copper or a copper alloy. Note that if a protective film is provided on the surface of the second insulating layer 112 when the through hole 11a is formed, the protective film can be peeled off and removed before the metal film layer 12a is formed.

[0034] When the insulating layer 11 is composed of a single layer containing an inorganic filler, a relatively long desmear process may be required to remove the inorganic filler remaining in the through hole 11a. On the other hand, in the manufacturing method of the embodiment, as described above, the occurrence of inorganic filler remaining in the through hole 11a during the formation of the through hole 11a is suppressed. Therefore, even if the metal film layer 12a is formed without desmearing the through hole 11a after the formation of the through hole 11a, it is believed that good adhesion can be achieved between the metal film layer 12a and the inner surface of the through hole 11a. The metal film layer 12a can be formed without desmearing the through hole 11a after the formation of the through hole 11a. When the desmear process is performed after the formation of the through hole 11a, the desmear process can be completed in a relatively short time because there is little risk of inorganic filler remaining in the through hole 11a.

[0035] As described above, the metal film layer 12a can be formed by sputtering. When the insulating layer 11 is composed of a single layer containing an inorganic filler, it is considered that uniform deposition of the metal film layer 12a on the bottom surface of the through hole 11a by sputtering may be difficult due to the influence of the inorganic filler protruding inward from the inner wall surface near the bottom of the through hole 11a. In contrast, in the method for manufacturing a wiring board according to the embodiment, the inner wall surface near the bottom of the through hole 11a is composed of the first insulating layer 111 that does not contain inorganic filler, and therefore, it is considered that a more uniform metal film layer 12a can be formed on the bottom surface of the through hole 11a. It is considered that better adhesion can be achieved between the metal film layer 12a and the bottom surface of the through hole 11a.

[0036] 3F, a dry film resist containing, for example, a photosensitive epoxy resin is adhered onto the metal film layer 12a to form a resist layer RL. Subsequently, the resist layer RL is exposed to light and developed to form a resist pattern having openings RLo corresponding to the conductor pattern of the second conductor layer 122 (see FIG. 1) to be formed on the second insulating layer 112.

[0037] 3G, a plating film layer 12b is formed in the opening RLo of the resist layer RL by electrolytic plating using the metal film layer 12a as a power supply layer. The inside of the through hole 11a is completely filled with the plating film layer 12b, forming a via conductor 13. Due to good adhesion between the metal film layer 12a and the first conductor layer 121, the bottom surface of the formed via conductor 13 is connected to the first conductor layer 121 with high reliability.

[0038] Next, the resist layer RL is removed using a stripping solution. Removal of the resist layer RL exposes the side surfaces of the plating film layer 12b. After the resist layer RL is removed, the portions of the metal film layer 12a that are not covered by the plating film layer 12b are removed by etching. As shown in FIG. 3H, a second conductor layer 122 having a two-layer structure consisting of the metal film layer 12a and the plating film layer 12b is formed.

[0039] Next, as shown in Figure 3I, the above-mentioned formation processes of the first insulating layer 111, the second insulating layer 112, and the second conductor layer 122 are repeated on the second conductor layer 122 and the insulating layer 11 (second insulating layer 112) exposed from the conductor pattern of the second conductor layer 122, thereby forming the insulating layer 11 and the conductor layer 12.

[0040] 3J, a desired number of insulating layers 11 and conductor layers 12 are stacked by a method similar to the method for forming the above-described insulating layer 11 and second conductor layer 122. The uppermost conductor layer 12 is formed into a pattern including conductor pads 12fp.

[0041] Next, as shown in FIG. 3K, a solder resist layer Rf is formed by forming a photosensitive epoxy resin or polyimide resin layer on the surfaces of the insulating layer 11 and the conductor layer 12, and openings Rfa that define the conductor pads 12fp are formed using photolithography techniques.

[0042] Next, as shown in FIG. 3L, the support substrate SP is removed. The lower surface of the second metal film layer ML2 below the conductor pad 12bp is exposed. In removing the support substrate SP, the adhesive layer AL is softened by, for example, being irradiated with laser light, and then the second metal film layer ML2 of the support substrate SP is peeled off from the adhesive layer AL.

[0043] Next, the second metal film layer ML2 is removed by etching, exposing the lower surfaces of the conductor pads 12bp and the first insulating layer 111. A solder resist layer Rb is formed on the lower surfaces of the conductor pads 12bp and the first insulating layer 111 by forming a photosensitive epoxy resin or polyimide resin layer on the surfaces of the first insulating layer 111 and the first conductor layer 121. Openings Rba that define the conductor pads 12bp are formed in the solder resist layer Rb by photolithography. This completes the manufacture of the wiring board 1.

[0044] The method for manufacturing a wiring board according to the embodiment is not limited to the method described with reference to Figures 3A to 3M, and the conditions and order of steps may be changed as desired. The method for manufacturing a wiring board according to the embodiment may include at least forming a first insulating layer that does not contain inorganic filler so as to cover the top surface of a conductor layer, forming a second insulating layer that contains inorganic filler so as to cover the top surface of the first insulating layer, and forming a through hole that penetrates the second insulating layer and the first insulating layer by irradiating with laser light to expose the conductor layer. Depending on the structure of the wiring board to be manufactured, some steps may be omitted, or other steps may be added. [Explanation of symbols]

[0045] 1. Wiring board 11 Insulating layer 12 Conductor layer 13 Via conductor 111 First insulating layer 112 Second insulating layer 121 First conductor layer 122 Second conductor layer 12a Metal film layer 12b Plating film layer 1F, 1st floor 1B 2nd side F. Inorganic filler Rf, Rb solder resist layer

Claims

1. forming a first insulating layer covering an upper surface of the conductor layer; forming a second insulating layer covering an upper surface of the first insulating layer; forming a through hole that penetrates the second insulating layer and the first insulating layer and exposes the conductor layer by irradiating a laser beam; forming a metal film layer on the inner surface of the through hole; filling the through hole with a plating film layer to form a via conductor; A method for manufacturing a wiring substrate, comprising: the second insulating layer contains an inorganic filler; The first insulating layer is formed without containing an inorganic filler.

2. 2. The method for manufacturing a wiring board according to claim 1, wherein the laser light is a UV laser light.

3. 2. The method for manufacturing a wiring board according to claim 1, wherein the metal film layer is formed after the through hole is formed without desmearing the inner surface of the through hole.

4. 2. A method for manufacturing a wiring board according to claim 1, wherein the ratio of the shortest distance between the top surface of the conductor layer and the top surface of the first insulating layer to the shortest distance between the top surface of the conductor layer and the top surface of the second insulating layer is 0.1 or more and 0.5 or less.

5. 2. The method for manufacturing a wiring board according to claim 1, wherein the shortest distance between the upper surface of the conductor layer and the upper surface of the first insulating layer is 1 [mu]m or more and 5 [mu]m or less.

6. 2. The method for manufacturing a wiring board according to claim 1, wherein the content of the inorganic filler in the second insulating layer is 65% by mass or more and 80% by mass or less.

7. 2. The method for manufacturing a wiring board according to claim 1, wherein the maximum particle size of the inorganic filler contained in the second insulating layer is 3 [mu]m or less.

8. 2. The method for manufacturing a wiring board according to claim 1, wherein the metal film layer is formed by sputtering.

9. 2. The method for manufacturing a wiring board according to claim 1, wherein the through-holes are formed so that the diameter of the through-holes is 5 [mu]m or more and 30 [mu]m or less.

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