Magnetic disk drive

Abstract

The present invention provides a magnetic disk device that can efficiently record parity and has excellent error correction capabilities for user data on the disk. [Solution] The magnetic disk device comprises a disk DK, a write head WHD, a volatile buffer memory 80, a parity generation unit, a write processing unit 62, an error correction unit 64, a storage processing unit 65, and a normal correction limit prediction unit 66. The parity generation unit generates a first normal parity and a first strong parity based on first user data, and generates a second normal parity and a second strong parity based on second user data. The storage processing unit 65 overwrites the first recording area of ​​the buffer memory with the second strong parity if the first prediction information is normal information, and if the first prediction information changes to abnormal information, it leaves the first strong parity in the first recording area and stores the second strong parity in the second recording area of ​​the buffer memory.

Description

Technical Field

[0001] Embodiments of the present invention relate to a magnetic disk drive.

Background Art

[0002] As magnetic disk drives, there are known a magnetic disk drive of a Conventional Magnetic Recording (CMR) format (or conventional recording format) that writes a plurality of tracks at intervals in the radial direction of the disk, a magnetic disk drive of a Shingled Magnetic Recording (SMR) format that overwrites a plurality of tracks in the radial direction of the disk, and a magnetic disk drive of a hybrid recording format that selects and executes the CMR format and the SMR format.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present embodiment provides a magnetic disk drive capable of efficiently recording parity and having an excellent ability to correct errors in user data on the disk.

Means for Solving the Problems

[0005] A magnetic disk device according to one embodiment is described as follows: A disk having a user data area in the recording layer, the first data track and the second data track each containing a plurality of target sectors on which data is to be written, A write head for writing data to the recording layer of the disk, Volatile buffer memory and parity generation unit, A write processing unit capable of performing a write operation to write data to the recording layer, An error correction unit that performs error correction on the data of corrupted target sectors among the plurality of target sectors of the first data track and the second data track that are determined to have corrupted data, Storage processing unit, It includes a normal correction limit prediction unit, The aforementioned light processing unit, During the first write period, first user data is written to multiple target sectors of the first data track to form multiple user data sectors, and first normal parity is written to one or more target sectors of the first data track to form one or more parity sectors. During the second write period following the first write period, second user data is written to multiple target sectors of the second data track to form multiple user data sectors, and second normal parity is written to one or more target sectors of the second data track to form one or more parity sectors. The parity generation unit is, Based on the first user data, a first normal parity and a first strong parity are generated to error correct the first corrupted data of one or more corrupted sectors of the first data track, wherein the ability of the first strong parity to error correct the first corrupted data is higher than the ability of the first normal parity to error correct the first corrupted data. Based on the second user data, a second normal parity and a second strong parity are generated to error correct the second corrupted data of one or more corrupted sectors of the second data track, wherein the ability of the second strong parity to error correct the second corrupted data is higher than the ability of the second normal parity to error correct the second corrupted data. The storage processing unit stores the first strong parity in the buffer memory, and then stores the second strong parity in the buffer memory. The normal correction limit prediction unit generates first prediction information, which is information that predicts whether the first normal error correction of the first corrupted data using the first normal parity by the error correction unit will reach its limit after the second user data and the second normal parity have been written to the second data track. The storage processing unit, If the first prediction information is normal information that predicts the first normal error correction will not reach its limit, the recording area of ​​the buffer memory that stores the strong parity is maintained, the second strong parity is stored in the first recording area of ​​the buffer memory where the first strong parity is stored, and the second strong parity is overwritten in the first recording area. If the first prediction information is replaced by abnormal information that predicts the first normal error correction has reached its limit, the recording area in the buffer memory that stores the strong parity is changed, the first strong parity is left in the first recording area, and the second strong parity is stored in a second recording area in the buffer memory that is different from the first recording area. [Brief explanation of the drawing]

[0006] [Figure 1] Figure 1 is a block diagram showing the configuration of a magnetic disk device according to one embodiment. [Figure 2] Figure 2 is a perspective view showing a part of the magnetic disk drive described above, and shows multiple disks and multiple heads. [Figure 3]Figure 3 is a schematic diagram showing an example of the arrangement of multiple servo areas and multiple data areas on a single disk according to the above embodiment. [Figure 4] Figure 4 is a schematic diagram showing the three tracks in the user data area where the disk recording process shown in Figure 3 takes place, as well as the write head. [Figure 5] Figure 5 is a schematic diagram showing the three tracks of the media cache where the normal recording process of the disk shown in Figure 3 takes place, as well as the write head. [Figure 6] Figure 6 is a schematic diagram illustrating an example of data writing to a disk. [Figure 7] Figure 7 is a schematic diagram showing two bands and one guard band from the user data area shown in Figure 6. [Figure 8] Figure 8 is a schematic diagram showing three sectors of one track in the band shown in Figure 6. [Figure 9] Figure 9 is a schematic diagram showing the two bands and one guard band shown in Figure 7, and is a diagram for illustrating multiple target sectors and multiple unused sectors. [Figure 10] Figure 10 is a schematic diagram showing five data tracks among the recording layers of the disk shown in Figure 2. [Figure 11] Figure 11 is a block diagram showing a part of the configuration of the magnetic disk drive described above, including the configuration of the write channel. [Figure 12] Figure 12 is a schematic diagram showing an example of the first and second tracks, assuming that the magnetic disk device does not have the function to perform track-level error correction on the track data; it is a diagram for explaining the write process to the first and second tracks; it is a diagram for explaining the state in which the write process to the second track is continued until the sector-level error correction to the first track reaches its limit; and it is a diagram that shows the change in BER for the first track and the change in BER with respect to positioning error, respectively, in graph form. [Figure 13]FIG. 13 is a schematic diagram showing an example of the first track and the second track when it is assumed that the magnetic disk device does not have a function of performing track unit error correction on the data of the track. It is a diagram for explaining the write process for the first track and the second track, in which the determination value is set to a write off-track slice smaller (stricter) than the track margin, and when it is detected that the positioning error has become equal to or greater than the write off-track slice, the write process for the second track is terminated. It is a diagram for explaining the state, and it is a diagram showing the change in BER for the first track and the change in BER for the positioning error in graphs, respectively. [Figure 14] FIG. 14 is a schematic diagram showing an example of the first track and the second track of the magnetic disk device having a function of performing track unit error correction on the data of the track. It is a diagram for explaining the write process for the first track and the second track, in which the determination value is set to a write off-track slice larger (looser) than the track margin, and even after the normal error correction for the track unit for the first track reaches the limit, the write process for the second track is continued. It is a diagram for explaining the state, and it is a diagram showing the change in BER for the first track and the change in BER for the positioning error in graphs, respectively. [Figure 15] FIG. 15 is a flowchart showing the write process method according to the above embodiment, and is a diagram showing together the generation of strong parity and the storage of strong parity. [Figure 16] FIG. 16 is a flowchart showing the write process method for the nth data track in the write process method according to the above embodiment, and is a diagram showing together the method of storing strong parity in the buffer memory. [Figure 17] FIG. 17 is a flowchart showing the write process method following FIG. 16, and is a diagram showing together the above storage method. [Figure 18] FIG. 18 is a flowchart showing a method of saving strong parity in a non-volatile memory during the first idle period in the above embodiment. [Figure 19]Figure 19 is a flowchart showing a method for saving valuable parity data to non-volatile memory in the event of a loss of main power supply, according to the above embodiment. [Figure 20] Figure 20 is a schematic diagram showing five data tracks among the recording layers of the disk shown in Figure 10. It illustrates the state in which data is being written sequentially to the (n-2)th data track, the (n-1)th data track, and the nth data track, illustrating how the write process is performed ideally without positioning errors. [Figure 21A] Figure 21A is a table showing the recording area of ​​the buffer memory, and is intended to explain the method of storing strong parity in the buffer memory corresponding to the write operation in Figure 20. It shows the state in which the first strong parity is stored in the selected first recording area and the selected first recording area is still selected. [Figure 21B] Figure 21B, following Figure 21A, is a table showing the recording areas of the buffer memory. It illustrates what happens when the selected recording area in the buffer memory is advanced by one after the second strong parity has been overwritten in the first selected recording area. [Figure 21C] Figure 21C, following Figure 21B, is a table showing the recording areas of the buffer memory, and is intended to explain the situation when the selected recording area in the buffer memory is moved back one notch. [Figure 22] Figure 22 is a schematic diagram showing five data tracks among the recording layers of the disk shown in Figure 10. It illustrates the state in which data is being written sequentially to the (n-2)th data track, the (n-1)th data track, and the nth data track. This diagram illustrates how the write operation is being performed to the nth data track when the positioning error exceeds the first off-track slice. [Figure 23A] Figure 23A is a table showing the recording areas of the buffer memory, and is intended to explain the method of storing strong parity in the buffer memory corresponding to the write operation in Figure 22. It is intended to explain what happens when the selected recording area in the buffer memory is advanced by one after the first strong parity has been stored in the first selected recording area. [Figure 23B] Figure 23B, following Figure 23A, is a table showing the recording areas of the buffer memory. It illustrates the process of storing the second strong parity in the currently selected second recording area, and then advancing the selected recording area in the buffer memory by one. [Figure 23C] Figure 23C, following Figure 23B, is a table showing the recording areas of the buffer memory, and is intended to explain the situation when the selected recording area in the buffer memory is moved back one notch. [Figure 24] Figure 24 is a schematic diagram showing five data tracks among the recording layers of the disk shown in Figure 10. It illustrates the state in which data is being written sequentially to the (n-2)th data track, the (n-1)th data track, and the nth data track. This diagram illustrates how the write operation is being performed to the nth data track when the positioning error exceeds the second off-track slice. [Figure 25A] Figure 25A is a table showing the recording area of ​​the buffer memory, and is intended to explain the method of storing strong parity in the buffer memory corresponding to the write operation in Figure 24. It shows the state in which the first strong parity is stored in the selected first recording area and the selected first recording area is still selected. [Figure 25B] Figure 25B, following Figure 25A, is a table showing the recording areas of the buffer memory. It illustrates the process of storing the second strong parity in the first selected recording area, and then advancing the selected recording area in the buffer memory by one. [Figure 25C] Figure 25C, following Figure 25B, is a table showing the recording areas of the buffer memory, and illustrates the state in which the second recording area, which was selected in the buffer memory, remains selected. [Modes for carrying out the invention]

[0007] The following describes in detail a magnetic disk device 1 according to one embodiment, with reference to the drawings. Let's clarify this. First, let's describe the configuration of the magnetic disk drive 1. Figure 1 is a block diagram showing the configuration of the magnetic disk drive 1 according to this embodiment. In this embodiment, the magnetic disk drive 1 is a hybrid recording type magnetic disk drive that can select and execute both normal recording and tile recording. However, the technology described later may be applied to a tile recording type magnetic disk drive or a normal recording type magnetic disk drive.

[0008] As shown in Figure 1, the magnetic disk drive 1 comprises a plurality of disks (magnetic disks) DK as recording media, for example, 1 to 10 disks, a main power supply 5, a spindle motor (SPM) 20 as a drive motor, a head stack assembly 22, a driver IC 120, a head amplifier integrated circuit (hereinafter referred to as head amplifier IC or preamplifier) ​​130, a volatile memory 70, a buffer memory (buffer) 80, a non-volatile memory 90, and a system controller 110 which is a single-chip integrated circuit. The magnetic disk drive 1 is also connected to a host system (hereinafter simply referred to as host) 100.

[0009] Each disk DK is formed, for example, with a diameter of 97 mm (3.8 inches) and has a recording layer (magnetic recording layer) on both sides. In this embodiment, the magnetic disk device 1 is equipped with 1 to 11 disks DK, but the number of disks DK is not limited to these.

[0010] The head stack assembly 22 can move the head HD mounted on the arm 30 to a target position on the disk DK, i.e., seek, by driving the voice coil motor (hereinafter referred to as VCM) 24. The VCM 24 functions as an actuator. Disk DK has two areas allocated to its writable data: a user data area U, which is accessible to users, and a system area S, which is used to write information necessary for system management.

[0011] The head HD records and plays back information to and from the disk DK. The head HD consists of a slider as its main body, and includes a write head WHD and a read head RHD mounted on the slider. The write head WHD writes data to the recording layer of the disk DK. The read head RHD reads data from the data track of the recording layer of the disk DK.

[0012] Sometimes the "center of the head HD" is referred to as "head HD," the "center of the light head WHD" as "light head WHD," and the "center of the read head RHD" as "read head RHD." Sometimes the "center of the light head WHD" is simply referred to as "head HD," and sometimes the "center of the read head RHD" is simply referred to as "head HD."

[0013] The driver IC 120 controls the driving of the SPM20 and VCM24 according to the control of the system controller 110 (specifically, the MPU 60, which will be described later). The SPM20 supports and rotates multiple disk DKs.

[0014] The head amplifier IC 130 includes a read amplifier and a write driver. The read amplifier amplifies the read signal read from the disk DK and outputs it to the system controller 110 (specifically, the read / write (R / W) channel 140, which will be described later). The write driver outputs a write current to the head HD corresponding to the signal output from the R / W channel 140.

[0015] The volatile memory 70 is a semiconductor memory in which the data stored is lost when the power supply is cut off. The volatile memory 70 stores data necessary for processing in each part of the magnetic disk device 1. The volatile memory 70 is a random access memory (RAM). For example, the volatile memory 70 is a DRAM (Dynamic Random Access Memory). However, the volatile memory 70 may also be an SDRAM (Synchronous Dynamic Random Access Memory).

[0016] The buffer memory 80 is a semiconductor memory that temporarily records data transmitted and received between the magnetic disk device 1 and the host 100. The buffer memory 80 may be integrated with the volatile memory 70. The buffer memory 80 is a volatile RAM. Examples of buffer memory 80 include DRAM, SRAM (Static Random Access Memory), SDRAM, FeRAM (Ferroelectric Random Access Memory), and MRAM (Magnetoresistive Random Access Memory).

[0017] The buffer memory 80 includes an area used as a write cache 81 and an area used as a read cache 82, and temporarily stores commands received from the host 100. The buffer memory 80 further includes a recording area 83. Write data, including write commands and user data corresponding to the write commands, is written to the write cache 81, and the write cache 81 temporarily stores the write data. Read commands are written to the read cache 82, and the read cache 82 temporarily stores the read commands.

[0018] Non-volatile memory 90 is a semiconductor memory that retains stored data even when the power supply is cut off. Non-volatile memory 90 is, for example, a NAND-type flash read-only memory (FROM). However, non-volatile memory 90 may also be a NOR-type FROM.

[0019] The system controller (controller) 110 is implemented, for example, using a large-scale integrated circuit (LSI) called a System-on-a-Chip (SoC), in which multiple elements are integrated onto a single chip. The system controller 110 includes a read / write (R / W) channel 140, a hard disk controller (HDC) 150, and a microprocessor (MPU) 60. The system controller 110 is electrically connected to a driver IC 120, a head amplifier IC 130, a volatile memory 70, a buffer memory 80, a non-volatile memory 90, and a host 100.

[0020] The R / W channel 140 performs signal processing for read data transferred from disk DK to host 100 and write data transferred from host 100, in response to instructions from the MPU 60, which will be described later. The R / W channel 140 has a circuit or function for modulating the write data. The R / W channel 140 also has a circuit or function for measuring the signal quality of the read data. The R / W channel 140 is electrically connected to, for example, the head amplifier IC 130, HDC 150, MPU 60, etc.

[0021] The HDC150 controls data transfer between the host 100 and the R / W channel 140 in response to instructions from the MPU60, which will be described later. The HDC150 is electrically connected to, for example, the R / W channel 140, the MPU60, the volatile memory 70, the buffer memory 80, the non-volatile memory 90, etc.

[0022] The HDC150 has a gate generation unit. The gate generation unit generates various gates, such as write gates, read gates, and servo gates, in response to commands from the host 100, instructions from the MPU 60, etc., and outputs them to the R / W channel 140, for example, the gate detection unit. Hereinafter, "raising a predetermined gate" may be referred to as "asserting a predetermined gate." Similarly, "lowering a predetermined gate" may be referred to as "negating a predetermined gate." "Asserting a predetermined gate" and "negating a predetermined gate" may also include the meaning of "generating a predetermined gate." The gate generation unit may be included in the R / W channel 140 or the MPU 60.

[0023] The R / W channel 140 has a gate detection unit. The gate detection unit detects whether various gates, such as a light gate, read gate, or servo gate, are in an asserted or negated state. For example, the gate detection unit executes the write process when it detects that the write gate is asserted, and pauses (stops) the write process when it detects that the write gate is negated. In addition, the gate detection unit executes read processing when it detects that a read gate is asserted, and stops read processing when it detects that a read gate is negated. The gate detection unit executes servo read processing when it detects that a servo gate is asserted, and stops servo read processing when it detects that a servo gate is negated. The gate detection unit may be located within the HDC150 or MPU60.

[0024] The MPU60 is a control unit that controls various parts of the magnetic disk drive 1 and is the main controller. The MPU60 controls the VCM24 via the driver IC120 and performs servo control to position the head HD. The MPU60 controls the write operation of data to the disk DK and selects the storage location for the write data transferred from the host 100. The MPU60 also controls the read operation of data from the disk DK and controls the processing of the read data transferred from the disk DK to the host 100. The MPU60 is connected to various parts of the magnetic disk drive 1. For example, the MPU60 is electrically connected to the driver IC120, R / W channel 140, HDC150, etc.

[0025] The MPU 60 includes a read / write processing unit 61, an error correction unit 64, a storage processing unit 65, a normal correction limit prediction unit 66, a command execution unit 67, a decision unit 68, a management unit 69A, a data protection processing unit 69B, and the like. The MPU 60 executes the processing of each of these units, such as the read / write processing unit 61, the error correction unit 64, the storage processing unit 65, the normal correction limit prediction unit 66, the command execution unit 67, the decision unit 68, the management unit 69A, and the data protection processing unit 69B, on the firmware. The MPU 60 may also include each of these units as a circuit.

[0026] The read / write processing unit 61 includes a write processing unit 62 and a read processing unit 63. According to commands from the host 100, the write processing unit 62 controls the data writing process, and the read processing unit 63 controls the data reading process, causing the read head RHD to read data from the disk DK. The write processing unit 62 is capable of performing a write operation to write data to the recording layer of the disk DK. The read / write processing unit 61 controls the VCM24 via the driver IC 120 to position the head HD at a target position (a predetermined radius position) on the disk DK and perform a read or write operation.

[0027] The main power supply 5, which is the power source for the magnetic disk drive 1, is connected to the driver IC 120, head amplifier IC 130, R / W channel 140, HDC 150, MPU 60, volatile memory 70, non-volatile memory 90, and buffer memory 80. The driver IC 120, head amplifier IC 130, R / W channel 140, HDC 150, MPU 60, volatile memory 70, non-volatile memory 90, and buffer memory 80 are powered by the power supplied from the main power supply 5. The SPM 20 and VCM 24 are powered by the power supplied from the main power supply 5 via the driver IC 120.

[0028] The error correction unit 64 can perform error correction on data in corrupted sectors (defective target sectors, described later) that are determined to have corrupted data among multiple sectors (multiple target sectors, described later) in each of the multiple data tracks of the recording layer of the disk DK. The error correction unit 64 has the function of performing error correction on a track-by-track basis. Track-by-track error correction is also called track-by-track error correction, track ECC (Error Checking and Correcting), etc.

[0029] Even if one or more corrupted sectors occur in the data track during the write process, the error correction unit 64 can perform error correction (normal error correction, described later) on the data of the one or more corrupted sectors based on the user data and parity (normal parity, described later) read from the data track, restore the data track, and rewrite the restored data to the data track. This allows for the occurrence of corrupted sectors in the data track during the write process. Since the write process becomes more difficult to complete, a decrease in the write performance of the magnetic disk device 1 can be suppressed.

[0030] The error correction unit 64 can use not only normal parity but also parity with a higher ability to correct errors in the data of the damaged sector (the powerful parity described later) than normal parity. Even if it is not possible to perform normal error correction on the data of one or more damaged sectors based on the user data read from the data track and normal parity, the error correction unit 64 can perform error correction (the powerful error correction described later) on one or more damaged data based on the user data read from the data track, normal parity, and powerful parity, restore the data on the data track, and rewrite the restored data to the data track. This makes it more tolerable for damaged sectors to occur on the data track during the write process. It makes it more difficult to terminate the write process and further suppresses the deterioration of the write performance of the magnetic disk device 1.

[0031] The storage processing unit 65 can store the generated strong parity in the buffer memory 80.

[0032] Here, among the multiple data tracks in the recording layer of disk DK, three data tracks adjacent in the radial direction d1 are designated as the first data track, the second data track, and the third data track. Then, the first user data and the first normal parity are written to the first data track, followed by the second user data and the second normal parity being written to the second data track, and then the third user data and the third normal parity being written to the third data track.

[0033] The normal correction limit prediction unit 66 can generate first prediction information, which is information that predicts whether the first normal error correction of one or more corrupted data points on the first data track using the first normal parity by the error correction unit 64 will reach its limit after the second user data and the second normal parity have been written to the second data track. From the first prediction information, it is possible to determine whether the first data track has been overwritten during the write process targeting the second data track, and to predict whether data corruption will occur in the first data track.

[0034] The normal correction limit prediction unit 66 can generate second prediction information, which is information that predicts whether the second normal error correction of one or more corrupted data points on the second data track using the second normal parity by the error correction unit 64 will reach its limit after the second user data and the second normal parity have been written to the second data track. From the second prediction information, it is possible to determine whether the second data track has been excessively overwritten to the third data track during the write operation targeting the second data track, and to predict whether the data on the second data track will be corrupted during the write operation targeting the third data track.

[0035] The command execution unit 67 can execute write commands and read commands recorded in the buffer memory 80.

[0036] The determination unit 68 can determine whether or not there are any unexecuted commands in the buffer memory 80. For example, the determination unit 68 can determine that there is a first idle period in which there are no unexecuted commands in the buffer memory 80. The determination unit 68 can also determine that there is a second idle period after the first idle period in which there are no unexecuted commands in the buffer memory 80.

[0037] The management unit 69A can include the promising parity stored in the recording area 83 of the buffer memory 80 before it is saved to the non-volatile memory 90 as a target for protection, and exclude the promising parity after it has been saved to the non-volatile memory 90 from protection.

[0038] The data protection processing unit 69B can save the valuable parity data managed by the management unit 69A as protected data to the non-volatile memory 90 when the main power supply 5 is lost. The data protection processing unit 69B can perform power loss protection (PLP) processing to guarantee the valuable parity data to be protected in the buffer memory 80. In addition, the data protection processing unit 69B can also perform PLP processing to guarantee the write data in the buffer memory 80.

[0039] As described above, since PLP processing guarantees the strong parity of buffer memory 80, the data on data tracks in the recording layer of disk DK that require strong error correction are indirectly guaranteed. In addition, the amount of data that can be stored in buffer memory 80 can be increased by saving the data to non-volatile memory 90. Furthermore, the saving of the strong parity of buffer memory 80 to non-volatile memory 90 may be performed not only when the main power supply 5 is lost, but also during idle periods.

[0040] In this case, it is preferable for the management unit 69A to include the strong parity of the buffer memory 80 after it has been saved to the non-volatile memory 90 as a target for protection. This allows for direct and indirect protection of the strong parity in both the buffer memory 80 and the non-volatile memory 90. However, the strong parity of buffer memory 80 that has become used up due to the execution of strong error correction may be excluded from protection and may be overwritten.

[0041] Next, we will explain the processing procedure of the data protection processing unit 69B when the main power supply 5 is restored, and the effects of the above processing procedure. When the main power supply 5 is restored after being lost, the data protection processing unit 69B can process as follows: The data protection processing unit 69B can write the strong parity saved in the non-volatile memory 90 to the buffer memory 80 and restore the strong parity in the buffer memory 80. As a result, the magnetic disk device 1 can perform strong error correction using the strong parity restored in the buffer memory 80. In addition, the data protection processing unit 69B can also write the written data saved in the non-volatile memory 90 to the buffer memory 80 and restore the written data in the buffer memory 80. As a result, the magnetic disk device 1 can continue processing using the written data restored in the buffer memory 80.

[0042] Figure 2 is a perspective view showing a part of the magnetic disk drive 1, and shows multiple disks DK and multiple heads HD. As shown in Figure 2, the direction in which the disk DK rotates in the circumferential direction is called the rotation direction d3. In the example shown in Figure 2, the rotation direction d3 is shown as counterclockwise, but it may also be in the opposite direction (clockwise). Furthermore, the direction of travel d2 of the head HD relative to the disk DK is opposite to the rotation direction d3. The direction of travel d2 is the direction in which the head HD sequentially writes and reads data relative to the disk DK in the circumferential direction, that is, the direction in which the head HD moves relative to the disk DK in the circumferential direction.

[0043] The magnetic disk drive 1 comprises i disks, numbered DK1 to DKi, and j heads, numbered HD1 to HDj. In this embodiment, the number of heads HD is twice the number of disks DK (j = 2 × i). Disks DK1 through DKi are mounted coaxially and stacked with a gap between them. Disks DK1 through DKi have the same diameter. Here, terms such as “same,” “identical,” “matching,” and “equivalent” include not only the meaning of being exactly the same, but also the meaning of being different to the extent that they can be considered substantially the same. Note that the diameters of disks DK1 through DKi may differ from each other.

[0044] Each disk DK has recording layers L on both sides. For example, disk DK1 has a first recording layer La1 and a second recording layer Lb1 on the opposite side of the first recording layer La1. Disk DK2 has a first recording layer La2 and a second recording layer Lb2 on the opposite side of the first recording layer La2. Disk DKi has a first recording layer Lai and a second recording layer Lbi on the opposite side of the first recording layer Lai. Each first recording layer La may also be referred to as the front or recording surface. Each second recording layer Lb may also be referred to as the back or recording surface. However, each first recording layer La is sometimes referred to as the back surface. In this case, each second recording layer Lb is sometimes referred to as the front surface.

[0045] Each recording layer L has a user data area U and a system area S. The first recording layer La1 has a user data area Ua1 and a system area Sa1. The second recording layer Lb1 has a user data area Ub1 and a system area Sb1. The first recording layer La2 has a user data area Ua2 and a system area Sa2. The second recording layer Lb2 has a user data area Ub2 and a system area Sb2. The first recording layer Lai has a user data area Uai and a system area Sai. The second recording layer Lbi has a user data area Ubi and a system area Sbi.

[0046] Within the user data area Ua1 (first recording layer La1), the track enclosed by the double dashed lines in the diagram is designated as track Ta1. Within the user data area Ub1 (second recording layer Lb1), the track located on the opposite side of track Ta1 is designated as track Tb1. In the user data area Ua2 (first recording layer La2), the track enclosed by the double dashed lines in the diagram is designated as track Tc1. In the user data area Ub2 (second recording layer Lb2), the track located on the opposite side of track Tc1 is designated as track Td1. Within the user data area Uai (first recording layer Lai), the track enclosed by the double dashed lines in the diagram is designated as track Te1. Within the user data area Ubi (second recording layer Lbi), the track located on the opposite side of track Te1 is designated as track Tf1. In this embodiment, tracks Ta1, Tb1, Tc1, Td1, Te1, and Tf1 are located on the same cylinder.

[0047] The head HD faces the disk DK. In this embodiment, one head HD faces each recording layer L of the disk DK. For example, head HD1 faces the first recording layer La1 of disk DK1, writes data to the first recording layer La1, and reads data from the first recording layer La1. Head HD2 faces the second recording layer Lb1 of disk DK1, writes data to the second recording layer Lb1, and reads data from the second recording layer Lb1.

[0048] Head HD3 faces the first recording layer La2 of disk DK2, writes data to the first recording layer La2, and reads data from the first recording layer La2. Head HD4 faces the second recording layer Lb2 of disk DK2, writes data to the second recording layer Lb2, and reads data from the second recording layer Lb2. Head HDj-1 faces the first recording layer Lai of disk DKi, writes data to the first recording layer Lai, and reads data from the first recording layer Lai. Head HDj faces the second recording layer Lbi of disk DKi, writes data to the second recording layer Lbi, and reads data from the second recording layer Lbi.

[0049] Figure 3 is a schematic diagram showing an example of the arrangement of multiple servo regions SV and multiple data regions DTR on a single disk DK according to this embodiment. As shown in Figure 3, in the radial direction d1 of the disk DK, the direction toward the outer circumference of the disk DK is referred to as the outward direction (outside), and the direction opposite to the outward direction is referred to as the inward direction (inside). In Figure 3, the user data area U is divided into an inner circumference area IR located in the inward direction, an outer circumference area OR located in the outward direction, and a middle circumference area MR located between the inner circumference area IR and the outer circumference area OR.

[0050] The disk DK has multiple servo regions SV and multiple data regions DTR. The multiple servo regions SV may, for example, extend radially in the radial direction of the disk DK and be discretely arranged at predetermined intervals in the circumferential direction. The multiple servo regions SV may, for example, extend linearly from the inner circumference to the outer circumference and be discretely arranged at predetermined intervals in the circumferential direction. The multiple servo regions SV may, for example, extend spirally from the inner circumference to the outer circumference and be discretely arranged at predetermined intervals in the circumferential direction. Alternatively, the multiple servo regions SV may, for example, be arranged in an island-like manner in the radial direction and discretely arranged at predetermined intervals in the circumferential direction.

[0051] Hereafter, a single servo region SV on a given track may be referred to as a "servo sector." Furthermore, a "servo region SV" may also be referred to as a "servo sector SV." A servo sector contains servo data. Hereafter, the "arrangement of several servo data that constitute a servo sector" may be referred to as a "servo pattern." Furthermore, the "servo data written to a servo sector" may also be referred to as a "servo sector."

[0052] Multiple data areas DTR are each positioned between multiple servo areas SV. For example, a data area DTR corresponds to the area between two consecutive servo areas SV in the circumferential direction. Hereinafter, one data area DTR in a given track may be referred to as a "data sector." Note that a "data area DTR" may also be referred to as a "data sector DTR." A data sector contains user data. Note that "user data written to a data sector" may also be referred to as a "data sector." A "data sector" may also be referred to as "user data." Furthermore, a "pattern composed of several data" may also be referred to as a "data pattern." In the example shown in Figure 3, the data pattern of a given track consists of multiple servo data (servo sectors) and multiple user data (data sectors).

[0053] The servo region SV has multiple zone servo regions ZSV, etc. In addition to the zone servo regions ZSV, the servo region SV may also include a region containing a gap (the circumferential positional difference between two zone servo regions), a region containing servo data, and a data region DTR, etc. The multiple zone servo regions ZSV are discretely arranged along the radial direction d1. Each of the multiple zone servo regions ZSV extends radially along d1.

[0054] A single zone servo area (servo area) ZSV on a given track may be referred to as a "zone servo sector" or "servo sector." Furthermore, a "zone servo area (servo area) ZSV" may also be referred to as a "zone servo sector ZSV" or "servo sector ZSV." The "servo data written to a zone servo sector" may also be referred to as a "zone servo sector" or "servo sector." Hereafter, the "arrangement of several servo data that constitute a zone servo sector" may be referred to as a "zone servo pattern" or "servo pattern." Hereafter, a single servo area SV on a given track may also be referred to as a "zone pattern sector."

[0055] Note that the “servo area SV” may also be referred to as the “zone pattern sector.” The “at least one piece of data written to the zone pattern sector” may also be referred to as the “zone pattern sector.” A zone pattern sector includes at least one zone servo sector. Hereinafter, the “data pattern of the zone pattern sector” may also be referred to as the “zone data pattern.”

[0056] In the example shown in Figure 3, the servo region SV has zone servo regions ZSV0, ZSV1, and ZSV2. The zone servo regions ZSV0, ZSV1, and ZSV2 are arranged in a staggered pattern in the radial direction. The zone servo regions ZSV0, ZSV1, and ZSV2 may also be arranged in a stepped pattern in the radial direction.

[0057] Zone servo region ZSV2 is located on the inner circumference side of zone servo region ZSV1. Zone servo region ZSV0 is located on the outer circumference side of zone servo region ZSV1. For example, zone servo region ZSV2 is arranged from the inner circumference region IR to the middle circumference region MR, zone servo region ZSV1 is arranged from the inner circumference region IR to the outer circumference region OR, and zone servo region ZSV0 is arranged from the middle circumference region MR to the outer circumference region OR. Hereinafter, in a given servo region SV, a predetermined radial region in which multiple zone servo regions ZSV are arranged in the circumferential direction may be referred to as a zone servo boundary region, a double servo region, or a double zone servo region ZB.

[0058] In the example shown in Figure 3, the main servo region SVO and the secondary servo region SVE are arranged alternately with spacing in the circumferential direction. For example, one secondary servo region SVE is placed between two main servo regions SVO that are spaced apart and arranged consecutively in the circumferential direction. In other words, one secondary servo region SVE is placed between two main servo regions SVO that are spaced apart and arranged consecutively in the circumferential direction. For example, if all servo regions SV of disk DK are assigned sequential numbers, the main servo region SVO corresponds to the odd-numbered servo region SV, and the secondary servo region SVE corresponds to the even-numbered servo region SV. Note that two or more secondary servo regions SVE may be placed between two main servo regions SVO that are spaced apart and arranged consecutively in the circumferential direction.

[0059] The main servo region SVO and the secondary servo region SVE may consist, for example, only of a servo region that reads and demodulates servo data overall (hereinafter sometimes referred to as the normal servo region). Hereinafter, "reading and demodulating servo data" may be referred to as "servo reading". The main servo region SVO and the secondary servo region SVE may consist, for example, of a normal servo region and a servo region that servo reads a range of servo data in the circumferential direction that is smaller than the range of servo data read in the normal servo region (hereinafter sometimes referred to as the short servo region).

[0060] The media cache M is allocated to disk DK. However, the media cache M does not necessarily have to be located on disk DK. By using the multiple servo data mentioned above, it is possible to derive, for example, the positioning error of the head HD (e.g., the light head WHD).

[0061] In this embodiment, the case where the disk DK has 3 zones was described as an example, but the number of zones in the disk DK can be changed in various ways. The number of zones in the disk DK may be 30 to 40. Furthermore, each zone has multiple bands. For example, each zone may have several hundred bands.

[0062] Figure 4 is a schematic diagram showing the three tracks STR of the user data area U where the tile recording process of disk DK shown in Figure 3 takes place, and the write head WHD. The user data area U is a tile recording area. Within the user data area U, sequential writing of data on a band-by-band basis is permitted; in other words, tile recording is permitted.

[0063] As shown in Figure 4, the write head WHD can sequentially write data to disk DK in the direction of travel d2. The read head RHD shown in Figure 3 can also sequentially read data written to disk DK in the direction of travel d2.

[0064] In a direction parallel to the radial direction d1, the direction in which multiple data tracks, or multiple track STRs, are recorded consecutively, that is, the direction in which the next track STR to be written is superimposed on the track STR that was written one step earlier in the radial direction d1, is called the overwriting direction or recording progress direction. In band BAe shown in Figure 4, the overwriting direction d5 is inward, but the overwriting direction may also be outward. For example, the overlay direction applied to multiple bands BA (multiple zones Z) located on the outer circumference side of a specific radial position may be opposite to the overlay direction applied to multiple bands BA (multiple zones Z) located on the inner circumference side of the specific radial position.

[0065] Band BAe has multiple tracks STR, including tracks STRe, STRe+1, and STRe+2. Tracks STRe, STRe+1, and STRe+2 are written sequentially in the writing direction d5 in the order they are described. Of tracks STRe, STRe+1, and STRe+2, track STRe is the track to which data is written first, and track STRe+2 is the track to which data is written last.

[0066] Track STRe has a track center STCe at the center of radial d1 when no other tracks are overlapping it. Track STRe+1 has a track center STCe+1 at the center of radial d1 when no other tracks are overlapping it. Track STRe+2 has a track center STCe+2 at the center of radial d1 when no other tracks are overlapping it.

[0067] In the example shown in Figure 4, tracks STRe, STRe+1, and STRe+2 are lit with a pitch (tile recording track pitch) STP. The track center STCe of track STRe and the track center STCe+1 of track STRe+1 are separated by a pitch STP in the radial direction d1. The track center STCe+1 of track STRe+1 and the track center STCe+2 of track STRe+2 are separated by a pitch STP in the radial direction d1. Tracks STRe through STRe+2 may be lit with different pitches.

[0068] The radial width d1 of the area within track STRe where track STRe+1 is not superimposed is the same as the radial width d1 of the area within track STRe+1 where track STRe+2 is not superimposed. However, the radial width d1 of the area within track STRe where track STRe+1 is not superimposed is different from the radial width d1 of the area within track STRe+1 where track STRe+2 is not superimposed.

[0069] In Figure 4, for the sake of explanation, each track STR is shown as a rectangle, but in reality, each track STR is curved along the circumference. Furthermore, each track STR may be wavy, extending circumferentially while fluctuating radially d1. Note that in Figure 4, three track STRs are superimposed, but two track STRs may be superimposed, or more than three track STRs may be superimposed.

[0070] The write processing unit 62 can select a tile recording format in which data is written to multiple tracks STR in the overlay direction d5 and cause the write head WHD to write data to each band BA. In the example shown in Figure 4, the write processing unit 62 sequentially records data to tracks STRe to STRe+2 in the band BAe with a pitch STP toward the inward direction (overlay direction d5). Since the user data area U is an area where data is written in the tile recording format, the recording density of the user data area U can be improved.

[0071] The light processing unit 62 lights track STre+1 inward of track STre with pitch STP, overwriting track STre+1 onto a portion of the inner circumference of track STre. The light processing unit 62 lights track STre+2 inward of track STre+1 with pitch STP, overwriting track STre+2 onto a portion of the inner circumference of track STre+1.

[0072] Figure 5 is a schematic diagram showing the three tracks CTR and the write head WHD of the media cache M where the normal recording process of disk DK shown in Figure 3 takes place. The media cache M and the system area S shown in Figure 3 are normal recording areas. Random data writing is permitted in the media cache M and system area S; in other words, normal recording is permitted.

[0073] As shown in Figure 5, the media cache M has multiple tracks CTR, including tracks CTRe, CTRe+1, and CTRe+2. Each of the multiple tracks CTR is a data track. For example, the radial width d1 (track width) of tracks CTRe, CTRe+1, and CTRe+2 is the same. However, the track widths of tracks CTRe to CTRe+2 may be different from each other.

[0074] Track CTRe has a track center CTCe at the center of radial d1, track CTRe+1 has a track center CTCe+1 at the center of radial d1, and track CTRe+2 has a track center CTCe+2 at the center of radial d1. In the example shown in Figure 5, tracks CTRe, CTRe+1, and CTRe+2 are written at pitch (normal recording track pitch) CTP. The track center CTCe of track CTRe and the track center CTCe+1 of track CTRe+1 are separated by pitch CTP. The track center CTCe+1 of track CTRe+1 and the track center CTCe+2 of track CTRe+2 are separated by pitch CTP.

[0075] Tracks CTRe and CTRe+1 are separated by a gap GP. Tracks CTRe+1 and CTRe+2 are separated by a gap GP. Tracks CTRe to CTRe+2 may be lit at different pitches. In Figure 5, for the sake of explanation, each track CTR is shown as a rectangle, but in reality, each track CTR is curved along the circumference. Furthermore, each track CTR may be wavy, extending circumferentially while fluctuating in the radial direction d1.

[0076] The write processing unit 62 can select a normal recording format in which data is written to multiple tracks CTR at intervals in the radial direction d1 of the disk DK and perform the write process. In the example shown in Figure 5, the write processing unit 62 positions the write head WHD on the track center CTCe in a predetermined area of ​​the disk DK and performs normal recording on track CTRe or a predetermined sector of track CTRe.

[0077] The write processing unit 62 positions the write head WHD at track center CTCe+1, which is located inward from track center CTCe of track CTRe by a pitch CTP, and normally records track CTRe+1 or a predetermined sector of track CTRe+1. The write processing unit 62 positions the write head WHD at track center CTCe+2, which is located inward from track center CTCe+1 of track CTRe+1 by a pitch CTP, and normally records track CTRe+2 or a predetermined sector of track CTRe+2.

[0078] The write processing unit 62 may sequentially record tracks CTRe, CTRe+1, and CTRe+2 in a predetermined area of ​​disk DK, or it may randomly record them in predetermined sectors of track CTRe, track CTRe+1, and track CTRe+2.

[0079] Figure 6 is a schematic diagram illustrating an example of data writing in disk DK. Tracks STR and CTR are data tracks, respectively. As shown in Figure 6, the user data area U has bands BAa, BAb, and BAc. Bands BAa, BAb, and BAc belong to the same zone Ze. In zone Ze, bands BAa, BAb, and BAc are arranged intermittently in the overlay direction in the order they are described.

[0080] Bands BAa and BAb are adjacent in the radial direction d1, and bands BAb and BAc are adjacent in the radial direction d1. Band BAa contains x tracks: STRa0, STRa1, STRa2, ..., STRa(x-3), STRa(x-2), and STRa(x-1). Tracks STRa0 through STRa(x-1) are recorded in the order listed above in the overwriting direction d5. In band BAa, track STRa0 corresponds to the first track on which data is written, and track STRa(x-1) corresponds to the last track on which data is written.

[0081] Band BAb contains x tracks: STRb0, STRb1, STRb2, ..., STRb(x-3), STRb(x-2), and STRb(x-1). Tracks STRb0 through STRb(x-1) are recorded in the order listed above in the overlay direction d5. In band BAb, track STRb0 corresponds to the first track on which data is written, and track STRb(x-1) corresponds to the last track on which data is written.

[0082] Band BAc contains x tracks: STRc0, STRc1, STRc2, ..., STRc(x-3), STRc(x-2), and STRc(x-1). Tracks STRc0 through STRc(x-1) are recorded in the order listed above in the overlay direction d5. In band BAc, track STRc0 corresponds to the first track on which data is written, and track STRc(x-1) corresponds to the last track on which data is written.

[0083] Each band BA belonging to the same zone Z has the same number of track STRs. For example, each band BA belonging to zone Ze has the same number of track STRs. In other words, the number of track STRs that each band BA has is fixed for each zone Z. In this example, each band BA belonging to zone Ze has x track STRs.

[0084] Figure 6 shows tracks CTR(x-2) and CTR(x-1). In Figure 6, tracks CTR(x-2) and CTR(x-1) are normally recorded in the media cache M or system area S. Tracks CTR(x-2) and CTR(x-1) are adjacent in the radial direction d1.

[0085] Figure 7 is a schematic diagram showing two bands BAa and BAb and one guard band GB within the user data area U shown in Figure 6. As shown in Figure 7, unlike the normal recording method, the tile recording method has the characteristic of overwriting a portion of track STR, so the MPU60 manages the track groups of the user data area U in units called bands.

[0086] Generally, a guard band GB is provided between adjacent bands BA in the radial direction d1. The guard band GB includes a guard track GTR. Unlike this embodiment, the guard band GB may include multiple guard tracks GTR. The guard band GB plays a role in suppressing interference between adjacent bands BA. The guard band GB makes it possible to perform sequential recording in units of one band BA. In addition, the guard band GB makes it possible to separate the range (band BA) to be written sequentially.

[0087] For example, the track centers STCa(x-3) of track STRa(x-3), STCa(x-2) of track STRa(x-2), STCa(x-1) of track STRa(x-1), GTC of guard track GTR, STCb0 of track STRb0, STCb1 of track STRb1, and STCb2 of track STRb2 are all positioned at equal pitches in the overlapping direction d5.

[0088] With the exception of the guard band GB, the recording capacity of each band BA in the user data area U is usually predetermined based on the user's requirements. The MPU60 can record the same amount of data in each band BA. Generally, the recording capacity of each band BA is 128 MiB or 256 MiB.

[0089] Figure 8 is a schematic diagram showing three sectors SCe, SC(e+1), and SC(e+2) of track STRa0 in band BAa shown in Figure 6. As shown in Figure 8, each track STR has multiple sectors SC. Track STRa1 has multiple sectors SC, including sectors SCe, SC(e+1), and SC(e+2). Each track STR belonging to the same zone Z has the same number of sectors SC. In this embodiment, each track STR belonging to zone Ze has y sectors SC.

[0090] Each sector SC has a length Ls in the circumferential direction of disk DK. Each sector SC may also be a split sector, divided by a servo sector SV. In this case, the length of sector SC does not have to be Ls. The light head (WHD) is a magnetic head for energy-assisted magnetic recording (EAMR). In this embodiment, the light head (WHD) is configured to utilize energy other than magnetic energy, but it is not limited to this configuration; the light head (WHD) may be a magnetic head that is not configured to perform energy-assisted recording.

[0091] Figure 9 is a schematic diagram showing the two bands BAa and BAb shown in Figure 7, and one guard band GB, and is a diagram for explaining multiple target sectors RSC and multiple unused sectors VSC. In Figure 9, for illustrative purposes, each track STR is shown as a rectangle; however, in reality, each track STR is curved along the circumference. Also, while multiple track STRs are shown aligned in the overlapping direction d5 without overlapping, in reality, multiple track STRs overlap while aligned in the overlapping direction d5. Furthermore, in the figure, the target sector RSC is marked with a dot pattern. Unused sector VSC is represented as blank.

[0092] As shown in Figure 9, the band number of band BAa is denoted as "a" and the band number of band BAb is denoted as "b". The track numbers of each band BA are denoted as "0" to "x-1". The sector numbers of each track STR are denoted as "0" to "y-1". Hereafter, the sector SC of each band BA may be identified using the following code "SC(track number, sector number)".

[0093] In this embodiment, band BAa is a band adjacent to band BAb and is positioned above band BAb in the overlay direction d5. Each track STR in band BAa contains G target sector RSCs (one or more target sector RSCs) on which valid data has been written. For example, track STRa0 has y target sector RSCs (G=y). All sector SCs in track STRa0 are target sector RSCs. Track STRa(x-1) has 5 target sector RSCs (G=5). The remaining sector SCs in track STRa(x-1) are unused sector VSCs on which no valid data has been written. From the above, the number of target sector RSCs in track STRa0 is different from the number of target sector RSCs in track STRa(x-1).

[0094] In each band BA of Zone Ze, all sector SCs of the x-1 tracks STR from 0 to x-2 are target sector RSCs and recording sector USCs with valid data written to them. In the x-1 track STR of each band BA in Zone Ze, the five sector SCs from 0 to 4 are target sector RSCs and recording sector USCs. On the other hand, in the x-1 track STR, the remaining sector SCs from 5 to y-1 are unused sector VSCs with no valid data written to them.

[0095] Figure 10 is a schematic diagram showing the five tracks STR(n-2), STR(n-1), STR(n), STR(n+1), and STR(n+2) of the recording layer La1 of disk DK1 shown in Figure 2. In Figure 10, each track STR is shown as a rectangle, but in reality, each track STR is curved along the circumference.

[0096] As shown in Figure 10, the recording layer La1 includes five data tracks STR(n-2) to STR(n+2) which are five data tracks consecutive in the radial direction d1. Each track STR includes multiple sectors SC0 to SC(y-1). In this embodiment, the multiple sectors SC0 to SC(y-1) of tracks STR(n-2) to STR(n+2) are multiple target sectors RSC, each of which data is written.

[0097] Here, we focus on tracks STR(n-1) through STR(n+1). In the following explanation, track STR(n-1) will be referred to as the first track STR(n-1), track STRn as the second track STRn, and track STR(n+1) as the third track STR(n+1).

[0098] In a direction parallel to the radial direction d1, the second track STRn is located in the second direction Db relative to the first track STR(n-1). The third track STR(n+1) is located in the second direction Db relative to the second track STRn. The write processing unit 62 can select a tile recording format in which data is sequentially written to the first track STR(n-1), the second track STRn, and the third track STR(n+1) superimposed on the second direction Db, and then execute the write process.

[0099] The write processing unit 62 writes first user data to multiple target sectors RSC of the first track STR(n-1) during the first write period to form multiple user data sectors, and writes first normal parity to the remaining one or more target sectors RSC of the first track STR(n-1) to form one or more parity sectors. In the first track STR(n-1) of this embodiment, the multiple target sectors RSC0 to RSC(y-2) are each user data sectors, and the target sector RSC(y-1) is the parity sector.

[0100] The write processing unit 62 writes second user data to multiple target sectors RSC of the second track STRn during the second write period following the first write period, creating multiple user data sectors, and writes second normal parity to the remaining one or more target sectors RSC of the second track STRn, creating one or more parity sectors. In the second track STRn of this embodiment, the multiple target sectors RSC0 to RSC(y-2) are each user data sectors, and the target sector RSC(y-1) is the parity sector.

[0101] The write processing unit 62 writes third user data to multiple target sectors RSC of the third track STR(n+1) during the third write period following the second write period, creating multiple user data sectors, and writes third normal parity to the remaining one or more target sectors RSC of the third track STR(n+1), creating one or more parity sectors. In the third track STR(n+1) of this embodiment, the multiple target sectors RSC0 to RSC(y-2) are each user data sectors, and the target sector RSC(y-1) is the parity sector.

[0102] Figure 11 is a block diagram showing a part of the configuration of the magnetic disk drive 1, including the configuration of the write channel 4W. As shown in Figure 11, the write channel 4W of the R / W channel 140 includes an RLL (Run Length Limited) encoder 4W1, an LDPC (Low Density Parity Check) encoder 4W2, a volatile memory 4W3, and a parity generation unit 4W4.

[0103] The RLL encoder 4W1 and LDPC encoder 4W2 function as data processing units that process the received data. In this embodiment, the data processing units perform the encoding of the received data. The received data is RLL encoded by the RLL encoder 4W1 and LDPC encoded by the LDPC encoder 4W2. The parity generation unit 4W4 is configured to perform an XOR operation on the data processed by the data processing units (RLL encoder 4W1 and LDPC encoder 4W2).

[0104] The volatile memory 4W3 inside the write channel 4W receives data processed by the data processing unit and data XORed by the parity generation unit 4W4. The volatile memory 4W3 is RAM.

[0105] The parity generation unit 4W4 can generate a first normal parity and a first strong parity, respectively, for error correction of first corrupted data in one or more corrupted sectors of the first track STR(n-1), based on first user data to be written to the first track STR(n-1). The ability of the first strong parity to error correct the first corrupted data is higher than the ability of the first normal parity to error correct the first corrupted data.

[0106] The parity generation unit 4W4 can generate a second normal parity and a second strong parity, respectively, for error correction of second corrupted data in one or more corrupted sectors of the second track STRn, based on second user data to be written to the second track STRn. The ability of the second strong parity to error correct the second corrupted data is higher than the ability of the second normal parity to error correct the second corrupted data.

[0107] The parity generation unit 4W4 can generate a third normal parity and a third strong parity, respectively, for error correction of third corrupted data in one or more corrupted sectors of the third track STR(n+1), based on third user data to be written to the third track STR(n+1). The ability of the third strong parity to error correct the third corrupted data is higher than the ability of the third normal parity to error correct the third corrupted data.

[0108] The data length of the first strong parity is longer than the data length of the first normal parity written to one or more parity sectors of the first track STR(n-1), and shorter than the data length of the first user data written to multiple user data sectors of the first track STR(n-1). The data length of the second most likely parity is longer than the data length of the second normal parity written to one or more parity sectors of the second track STRn, and shorter than the data length of the second user data written to multiple user data sectors of the second track STRn. The data length of the third strong parity is longer than the data length of the third normal parity written to one or more parity sectors of the third track STR(n+1), and shorter than the data length of the third user data written to multiple user data sectors of the third track STR(n+1).

[0109] The data processed by the data processing unit and the data XORed by the parity generation unit 4W4 are temporarily held in the volatile memory 4W3. For example, of the data in the volatile memory 4W3, user data and normal parity are transferred to the volatile memory 70, and strong parity is stored in the recording area 83. The storage processing unit 65 can store the strong parity in the buffer memory 80 in the order in which it was generated. For example, the storage processing unit 65 can store the first strong parity in the buffer memory 80, then the second strong parity, and then the third strong parity.

[0110] Here, when writing data to the second track STRn, the second user data and second normal parity are re-transferred from volatile memory 70 to volatile memory 4W3, sent to the write head WHD via the preamplifier 3W of the head amplifier IC 130, and written to the second track STRn. Note that the destination of the user data and normal parity is not limited to volatile memory 70, but may be a storage medium or storage area other than volatile memory 70. Alternatively, the data may be sent to the light head WHD via the preamplifier 3W without transferring user data and normal parity from the volatile memory 4W3 to the volatile memory 70.

[0111] Next, we compare the case where the magnetic disk device 1 does not have the function to perform track-by-track error correction on the data of track STR with the case where it does have the function to perform the above-mentioned track-by-track error correction.

[0112] Figure 12 is a schematic diagram showing an example of a first track STR(n-1) and a second track STRn, assuming that the magnetic disk device 1 does not have the function to perform track-level error correction on the data of track STR. It is a diagram for explaining the write process to the first track STR(n-1) and the second track STRn. It is a diagram for explaining the state in which the write process to the second track STRn is continued until the sector-level error correction for the first track STR(n-1) reaches its limit. It is a diagram that shows the change in the bit error rate (BER) for the first track STR(n-1) and the change in BER with respect to the position error (PE) as graphed, respectively. In the explanation using Figure 12, the magnetic disk drive 1 will be described as not having the error correction unit 64 shown in Figure 1. Also, in Figure 12, for the sake of explanation, the first track STR(n-1), etc., is depicted as having a linear circumferential direction.

[0113] As shown in Figure 12, the write operation for the first track STR(n-1) is performed ideally without positioning error PE (PE ≈ 0, or PE = 0). If the magnetic disk device 1 is affected by external vibrations during the write operation, a positioning error PE occurs when positioning the write head WHD. The positioning error PE is the amount of deviation of the write head WHD from the target position in the radial direction d1. By setting the track margin TM, it is possible to determine the acceptable range within which it is guaranteed that data on adjacent tracks can be read.

[0114] For example, if a write operation is performed on the second track STRn, and the target sectors RSCe, RSC(e+1), and RSC(e+2) of the first track STR(n-1) are adjacent to the light head WHD in the radial direction d1 during the period when the positioning error PE exceeds the track margin TM, then the data in the target sectors RSCe, RSC(e+1), and RSC(e+2) of the first track STR0 is judged (expected) to be corrupted. A lower BER for the data is desirable, but the BER of the data in the target sectors RSCe, RSC(e+1), and RSC(e+2) of the first track STR(n-1) exceeds the threshold BERTH. As can be seen from the graph on the right side of Figure 12, the larger the positioning error PE, the greater the negative impact of ATI (Adjacent Track Interference), and the BER of the data for the first track STR(n-1), which is excessively affected by the negative impact of ATI, becomes excessively high.

[0115] Therefore, among the multiple target sector RSCs of the first track STR(n-1), target sector RSCe, target sector RSC(e+1), and target sector RSC(e+2) are determined to be corrupted sector CSC1, target sector CSC2, and target sector CSC3. This can lead to a deterioration in the quality of the signal obtained by reading the data from corrupted sectors CSC1 to CSC3, or the erasure of the data from corrupted sectors CSC1 to CSC3.

[0116] In the example illustrated with Figure 12, the magnetic disk drive 1 does not have the function to perform track-level error correction on the data of track TR. Therefore, target sectors RSCe, RSC(e+1), and RSC(e+2) remain as corrupted sectors CSC1, CSC2, and CSC3.

[0117] In Figure 12, it is assumed that all target sector RSCs of track STR have a common track margin TM. However, the above setting of track margin TM is just an example, and the track margin TM may be different for each target sector RSC.

[0118] Figure 13 is a schematic diagram showing an example of a first track STR(n-1) and a second track STRn, assuming that the magnetic disk device 1 does not have the function to perform track-level error correction on the data of track STR. It is a diagram to explain the write process for the first track STR(n-1) and the second track STRn. It is a diagram to explain the state in which the write process for the second track STRn is terminated when the judgment value is set to a write-off track slice WOS1 that is smaller (stricter) than the track margin TM and the positioning error PE is detected to be greater than or equal to the write-off track slice WOS1. It is a diagram that shows the change in BER for the first track STR(n-1) and the change in BER for the positioning error PE in graph form. In Figure 13, for the sake of explanation, the first track STR(n-1), etc., is depicted as having a linear circumferential direction. In the explanation using Figure 13, the magnetic disk drive 1 is described as not having the error correction unit 64 shown in Figure 1.

[0119] As shown in Figure 13, the write operation on the first track STR(n-1) is ideally performed without positioning error PE (PE ≈ 0, or PE = 0). To prevent or suppress write operations when the positioning error PE exceeds the track margin TM, the magnetic disk device 1 has a write-off track slice WOS1.

[0120] During the period when data is being written to the second track STRn, if it is determined that the positioning error PE exceeds the write-off track slice WOS1, the writing of data to the second track STRn can be paused. Among the plurality of target sectors RSC of the second track STRn, the remaining target sectors RSC for which the writing of data has been postponed become empty sectors ESC where no data has been written. By avoiding a situation where the positioning error PE exceeds the track margin TM, the occurrence of damaged target sectors CSC in the first track STR(n - 1) can be prevented.

[0121] Note that the track STR has servo sectors in addition to the sector SC which is a data sector. In a track STR, generally, data sectors and servo sectors are arranged alternately. The write head WHD can derive the positioning error PE together with the servo sectors. Therefore, generally, the positioning error PE is information obtained intermittently.

[0122] In order for PE > TM not to occur, it is necessary to set the write-off track slice WOS1 such that WOS1 ≤ TM. In order to avoid a situation where PE > TM, it is desirable to set the write-off track slice WOS1 such that WOS1 < TM. Thereby, before the positioning error PE exceeds the track margin TM, the writing process for the second track STRn can be terminated, and a situation where the quality of the data in the first track STR(n - 1) deteriorates can be avoided.

[0123] However, it should be noted that setting the write-off track slice WOS1 to a small value will cause the write process to terminate more easily, leading to a decrease in the write performance of the magnetic disk drive 1. In the case of the magnetic disk drive 1, which does not have a function to perform track-level error correction, if the write process to the second track STRn is paused, a write retry process will be executed, which will wait for the disk DK to rotate until PE ≤ WOS1 is obtained, and then resume the write process to the second track STRn. The write retry process can change the empty sector ESC of the second track STRn to the recording sector USC, thus avoiding a situation where the utilization efficiency of the second track STRn remains low.

[0124] In Figure 13, it is assumed that all target sector RSCs of track STR have a common write-off track slice WOS1. However, the above setting of write-off track slice WOS1 is just an example, and the write-off track slice WOS1 may be different for each target sector RSC.

[0125] Figure 14 is a schematic diagram showing an example of a first track STR(n-1) and a second track STRn of a magnetic disk drive 1 that has a function to perform track-level error correction on the data of track STR. It is a diagram for explaining the write process for the first track STR(n-1) and the second track STRn. It is a diagram for explaining a state in which the write-off track slice WOS1 is set to a value greater than (looser than) the track margin TM, and write processing for the second track STRn continues even after track-level error correction for the first track STR(n-1) has reached its limit. The diagram shows graphs of the change in BER for the first track STR(n-1) and the change in BER for the positioning error PE, respectively. In Figure 14, for the sake of explanation, the first track STR(n-1), etc., is drawn assuming that the circumferential direction is linear.

[0126] As shown in Figure 14, the light operation on the first track STR(n-1) is performed ideally without positioning error PE (PE≈0, or PE=0). The magnetic disk device 1 is equipped with an error correction unit 64. When a corrupted sector CSC occurs on track STR, the read processing unit 63, together with the head amplifier IC 130, can detect that a corrupted sector CSC has occurred on track STR, and the error correction unit 64 can perform normal error correction processing to recover the data of the corrupted sector CSC. For example, if a corrupted sector CSC occurs on the first track STR(n-1), the error correction unit 64 recovers the data of the corrupted sector CSC based on the first user data of multiple target sector RSCs on the first track STR(n-1) and the parity of the parity sector.

[0127] The above parity sector is generated based on the data of multiple target sector RSCs of the first track STR(n-1) and can be provided in a portion of the multiple target sector RSCs of the first track STR(n-1). For example, target sector RSC(y-1) of the first track STR(n-1) can be used as the parity sector. However, the above parity sector may also be provided in tracks other than the first track STR(n-1), such as STR and CTR. Alternatively, the above parity sector may be provided in memory other than disk DK (for example, non-volatile memory 90).

[0128] As described above, even if a corrupted sector CSC occurs on the first track STR(n-1), the error correction unit 64 can perform normal error correction processing to recover the data of the corrupted sector CSC, thus allowing the occurrence of a corrupted sector CSC on the first track STR(n-1). In the magnetic disk device 1 equipped with the error correction unit 64, the write-off track slice WOS1 can be set such that WOS1 ≥ TM.

[0129] However, even if the error correction unit 64 performs normal error correction on a track-by-track basis, there may be cases where it cannot correct the corrupted data. In such cases, the error correction unit 64 can correct the corrupted data by performing effective error correction on a track-by-track basis.

[0130] Since strong parity is used for strong error correction, if strong error correction is planned, the corresponding strong parity must be stored in buffer memory 80. In this case, it is desirable to efficiently record the strong parity.

[0131] Therefore, after the second user data and the second normal parity have been written to the second track STRn, the normal correction limit prediction unit 66 generates first prediction information, which is information that predicts whether the first normal error correction of the first corrupted data on the first track STR(n-1) using the first normal parity by the error correction unit 64 will reach its limit.

[0132] If the first prediction information is normal information that predicts that the first normal error correction will not reach its limit, the storage processing unit 65 maintains the recording area in the buffer memory 80 where the strong parity is stored, stores the second strong parity in the first recording area in the buffer memory 80 where the first strong parity is stored, and can overwrite the first recording area with the second strong parity. If it is not necessary to perform strong error correction on the data of the first track STR(n-1) using the first strong parity, the first strong parity can be deleted from the buffer memory 80, and the first strong parity can be updated with the second strong parity in the buffer memory 80. This can contribute to the efficient recording of strong parity.

[0133] On the other hand, if the first prediction information is replaced with abnormal information that predicts the first normal error correction has reached its limit, the storage processing unit 65 can change the recording area in the buffer memory 80 where the strong parity is stored, leaving the first strong parity in the first recording area and storing the second strong parity in a second recording area in the buffer memory that is different from the first recording area. If it is necessary to perform strong error correction on the data of the first track STR(n-1) using the first strong parity, the first strong parity can be left in the buffer memory 80.

[0134] As shown in Figures 10 and 14, the normal correction limit prediction unit 66 generates second prediction information, which is information that predicts whether the second normal error correction of the second corrupted data on the second track STRn using the second normal parity by the error correction unit 64 will reach its limit after the second user data and the second normal parity have been written to the second track STRn.

[0135] If the second prediction information is normal information that predicts that the second normal error correction will not reach its limit, the storage processing unit 65 maintains the recording area in the buffer memory 80 where the strong parity is stored, stores the third strong parity in the first recording area in the buffer memory 80 where the second strong parity is stored, and can overwrite the first recording area with the third strong parity. If it is not necessary to perform strong error correction on the data of the second track STRn using the second strong parity, the second strong parity can be deleted from the buffer memory 80, and the second strong parity can be updated with the third strong parity in the buffer memory 80. This can contribute to the efficient recording of strong parity.

[0136] On the other hand, if the second prediction information is replaced by abnormal information that predicts the second normal error correction has reached its limit, the storage processing unit 65 can change the recording area in the buffer memory 80 that stores the strong parity, leave the second strong parity in the first recording area, and set a second recording area in the buffer memory 80 that is different from the first recording area as the recording area that stores the third strong parity.

[0137] Alternatively, the storage processing unit 65 may leave the second strong parity in the second recording area of ​​the buffer memory 80 and set a third recording area of ​​the buffer memory 80, which is different from the first and second recording areas, as the recording area for storing the third strong parity. If it is necessary to perform strong error correction on the data of the second track STRn using a second strong parity, the second strong parity can be stored in buffer memory 80.

[0138] Next, we will explain the cases in which the first prediction information becomes normal information and the cases in which the first prediction information changes to abnormal information. In a direction parallel to the radial direction d1, the first track STR(n-1) is located in the first direction Da relative to the second track STRn.

[0139] During the second write period in which data is written to the second track STRn, the normal correction limit prediction unit 66 can determine whether the position of the light head WHD extends beyond the first limit radius position PO1 in the first direction Da. Here, the first limit radius position PO1 is the position offset by the light-off track slice WOS1 in the first direction Da from the track center STCn of the second track STRn.

[0140] As a result, if the position of the light head WHD does not extend beyond the first limit radius position PO1 in the first direction Da, the first prediction information will be normal information. On the other hand, if the position of the light head WHD extends beyond the first limit radius position PO1 in the first direction Da, the first prediction information will change to abnormal information.

[0141] Next, we will explain the cases in which the second prediction information becomes normal information and the cases in which the second prediction information changes to abnormal information. In a direction parallel to the radial direction d1, the third track STR(n+1) is located in the second direction Db, which is opposite to the first direction Da when viewed from the second track STRn.

[0142] During the second write period in which data is written to the second track STRn, the normal correction limit prediction unit 66 can determine whether the position of the light head WHD extends beyond the second limit radius position PO2 in the second direction Db. Here, the second limit radius position PO2 is the position offset from the track center STCn of the second track STRn by the light-off track slice WOS2 in the second direction Db.

[0143] As a result, if the position of the light head WHD does not extend beyond the second limit radius position PO2 in the second direction Db, the second prediction information will be normal. On the other hand, if the position of the light head WHD extends beyond the second limit radius position PO2 in the second direction Db, the second prediction information will change to abnormal information.

[0144] Next, we will explain the boundary conditions between the above-mentioned normal information and the above-mentioned abnormal information, focusing on the total amount of overhang of the right head WHD. During the second write period, the normal correction limit prediction unit 66 calculates the excess amount by which the position of the write head WHD extends beyond the first reference radius position in the first direction Da each time data is written to each target sector RSC of the second track STRn, and can update the total of the above excess amounts during the second write period.

[0145] Until the above sum reaches the first reference value, the first prediction information is normal information. In that case, even if corrupted data occurs in the first track STR(n-1), the error correction unit 64 can perform normal error correction on a track-by-track basis to correct the corrupted data in track STR(n-1). On the other hand, when the above total reaches the first reference value, the first prediction information is replaced with abnormal information. In that case, the error correction unit 64 can perform error correction on a track-by-track basis, thereby correcting the corrupted data in track STR(n-1).

[0146] Next, we will explain the boundary conditions between the above-mentioned normal information and the above-mentioned abnormal information, focusing on the number of corrupted sectors CSC in track STR. During the second write period, the normal correction limit prediction unit 66 can manage the number of one or more corrupted sectors CSC in the first track STR(n-1).

[0147] Until the above number reaches the first threshold, the first predicted information is the normal information. In that case, even if corrupted data occurs in the first track STR(n-1), the error correction unit 64 can perform normal error correction on a track-by-track basis to correct the corrupted data in track STR(n-1). On the other hand, when the above number reaches the first threshold, the first prediction information is replaced with abnormal information. In that case, the error correction unit 64 can perform error correction on a track-by-track basis, thereby correcting the corrupted data in track STR(n-1).

[0148] For example, if the first threshold is "5" (5 items), then when 4 or fewer corrupted data items occur in the first track STR(n-1), the error correction unit 64 should select normal error correction on a track-by-track basis. Then, when 5 or more corrupted data items occur in the first track STR(n-1), the error correction unit 64 should select strong error correction on a track-by-track basis.

[0149] Next, the operation of the write processing unit 62, the parity generation unit 4W4, and the storage processing unit 65 when sequentially writing data to multiple tracks STR will be described. Figure 15 is a flowchart showing the write processing method according to this embodiment, and it also shows the generation of strong parity and the storage of strong parity. As shown in Figure 15, when the write process starts, first in step ST1a, normal parity and strong parity are generated based on the user data to be written to the selected data track, the user data and normal parity are written to the selected data track, and the strong parity is stored in the buffer memory 80.

[0150] For example, when the first track STR(n-1) in Figure 10 is selected, the parity generation unit 4W4 generates a first normal parity and a first strong parity based on the first user data to be written to the first track STR(n-1), the write processing unit 62 writes the first user data and the first normal parity to the first track STR(n-1), and the storage processing unit 65 stores the first strong parity in the buffer memory 80.

[0151] Next, in step ST2a, it is determined whether to continue writing data to the data track adjacent to the selected data track in the overwriting direction d5. For example, the write processing unit 62 determines whether to continue writing data to the second track STRn. If data writing is not to be continued (step ST2a, NO), the write process is terminated.

[0152] On the other hand, if data writing continues (step ST2a, YES), the process moves to step ST3a, where an adjacent data track is selected as the next target for data writing. For example, the write processing unit 62 selects the second track STRn as the next target for data writing and moves to step ST1a. If you want to continue writing data (step ST2a, YES), you can simply repeat the processes in steps ST3a and ST1a.

[0153] Next, the operation of the write processing unit 62, parity generation unit 4W4, storage processing unit 65, and normal correction limit prediction unit 66 when data is written to the (n-1)th track STR and then to the nth track STR will be described. Figure 16 is a flowchart showing the write processing method for the nth data track in the write processing method according to this embodiment, and also shows the method for storing the strong parity in the buffer memory 80. Figure 17 is a flowchart showing the write processing method following Figure 16, and also shows the storage method.

[0154] As shown in Figure 16, when the write process for the nth track STR begins, first, in step ST1b, the write processing unit 62 writes user data and normal parity to the nth track STR. Next, in step ST2b, the normal correction limit prediction unit 66 determines whether the position of the write head WHD has extended beyond the first limit radius position on the (n-1)th track STR side in the first direction Da.

[0155] If the light head WHD extends beyond the buffer (step ST2b, YES), the process moves to step ST4b, where the storage processing unit 65 advances the selected recording area in the buffer memory 80 by one, and then moves to step ST6b.

[0156] If the write head WHD is not overflowing (step ST2b, NO), the process proceeds to step ST5b, where the storage processing unit 65 continues to select the currently selected recording area in the buffer memory 80 and proceeds to step ST6b.

[0157] In step ST6b, the storage processing unit 65 stores the strong parity for the nth track STR in the selected recording area and records the information of the recording layer L (write head WHD) number and the track number together. Subsequently, in step ST7b, the storage processing unit 65 advances the selected recording area in the buffer memory 80 by one and proceeds to step ST8b.

[0158] As shown in Figure 17, in step ST8b, the normal correction limit prediction unit 66 then determines whether the position of the write head WHD extends beyond the second limit radius position on the (n+1)th track STR side in the second direction Db (the opposite direction to the first direction Da). If the write head WHD does not extend beyond the limit radius (step ST8b, NO), the process proceeds to step ST9b, where the storage processing unit 65 returns the selected recording area in the buffer memory 80 by one and terminates the write operation for the nth track STR.

[0159] On the other hand, if the write head WHD extends beyond the buffer (step ST8b, YES), the process proceeds to step ST10b, where the storage processing unit 65 continues to select the currently selected recording area in the buffer memory 80 and terminates the write operation for the nth track STR. As can be seen from the explanation using Figures 16 and 17, the magnetic disk device 1 of this embodiment can perform steps ST5b, ST9b, and ST10b as needed, thereby enabling efficient recording of strong parity.

[0160] Next, a method for saving promising parity to non-volatile memory 90 during the idle period will be described. Figure 18 is a flowchart showing the method for saving promising parity to non-volatile memory 90 during the first idle period in this embodiment. As shown in Figure 18, when the method for saving the strong parity to the non-volatile memory 90 is initiated, first, in step ST1c, the determination unit 68 determines whether it is the first idle period in which there are no unexecuted commands in the buffer memory 80. If it is not the first idle period (step ST1c, NO), the process in step ST1c is repeated.

[0161] On the other hand, if it is the first idle period (step ST1c, YES), the process proceeds to step ST2c, where the storage processing unit 65 saves the promising parity stored in the buffer memory 80, along with the information of the recording layer L (write head WHD) number and the track number, to the non-volatile memory 90. This completes the process of saving the promising parity to the non-volatile memory 90.

[0162] Furthermore, the strong parity to be saved to the non-volatile memory 90 differs depending on whether the first prediction information is normal or abnormal. For example, if the first prediction information is normal, the second strong parity overwrites the first recording area of ​​the buffer memory 80, and the first strong parity is updated with the second strong parity in the buffer memory 80. Therefore, the storage processing unit 65 can save the second strong parity stored in the buffer memory 80 to the non-volatile memory 90.

[0163] Alternatively, if the first prediction information is replaced with abnormal information, the first strong parity is left in the first recording area of ​​the buffer memory 80, and the second strong parity is stored in the second recording area of ​​the buffer memory 80. Therefore, the storage processing unit 65 can save the first and second strong parity stored in the buffer memory 80 to the non-volatile memory 90. This ensures that the strong parity is maintained.

[0164] Next, we will describe the PLP process that guarantees the strong parity to be protected in the buffer memory 80. Figure 19 is a flowchart showing a method in this embodiment for saving the strong parity to the non-volatile memory 90 when the main power supply 5 is lost. As shown in Figure 19, when the PLP process to guarantee the strong parity of the protected items in the buffer memory 80 is started, first in step ST1d, the management unit 69A determines whether the main power supply 5 has been lost. If the main power supply 5 has not been lost (step ST1d, NO), the process in step ST1d is repeated.

[0165] On the other hand, if the main power supply 5 is lost (step ST1d, YES), the process proceeds to step ST2d, and the storage processing unit 65 saves the strong parity of the protected items stored in the buffer memory 80, along with information on the recording layer L (write head WHD) number and track number, to the non-volatile memory 90. This completes the PLP process that guarantees the strong parity of the protected items in the buffer memory 80.

[0166] Furthermore, the strong parity to be saved to the non-volatile memory 90 differs depending on whether the first prediction information is normal or abnormal. For example, if the first prediction information is normal, the storage processing unit 65 can save the second strong parity stored in the buffer memory 80 to the non-volatile memory 90.

[0167] Alternatively, if the first prediction information is replaced with abnormal information, the storage processing unit 65 can save the first and second strong parity stored in the buffer memory 80 to the non-volatile memory 90. This ensures the presence of strong parity.

[0168] Next, we will describe the effective error correction performed by the error correction unit 64. As shown in Figures 1 and 10, here we assume that the first prediction information has been replaced with abnormal information. The determination unit 68 can determine whether the second idle period is one in which there are no unexecuted commands in the buffer memory 80 after the first idle period.

[0169] When the determination unit 68 determines that it is a second idle period, the error correction unit 64 performs error correction on the first corrupted data of the first track STR(n-1) based on the first user data of the first track STR(n-1), the first normal parity, and the first strong parity, restores the data of the first track STR(n-1), and can rewrite the restored data to the first track STR(n-1).

[0170] Next, the lighting process of Example 1 of this embodiment will be described. Figure 20 is a schematic diagram showing five data tracks of the recording layer La1 of disk DK1 shown in Figure 10. It illustrates the state in which data is being written sequentially to the (n-2)th data track, the (n-1)th data track, and the nth data track, illustrating how the write process is ideally performed without positioning errors.

[0171] Figure 21A is a table showing the recording area 83 of the buffer memory 80, and is intended to explain the method of storing strong parity in the buffer memory 80 corresponding to the write operation in Figure 20. It shows the state in which the first strong parity is stored in the selected first recording area and the selected first recording area is still selected. Figure 21B, following Figure 21A, is a table showing the recording area 83 of the buffer memory 80. It illustrates the process of advancing the selected recording area in the buffer memory 80 by one after the second strong parity has been overwritten in the selected first recording area. Figure 21C, following Figure 21B, is a table showing the recording area 83 of the buffer memory 80, and is intended to explain the situation when the selected recording area in the buffer memory 80 is moved back one notch.

[0172] As shown in Figures 20 and 21A, during the write operation for the second track STRn, the positioning error PE does not extend beyond the first limit radius position PO1 in the first direction Da. Therefore, as shown in step ST5b of Figure 16, the storage processing unit 65 continues to select the currently selected recording area D (first recording area) in the buffer memory 80.

[0173] As shown in Figures 20 and 21B, the storage processing unit 65 stores the second strong parity in the selected recording area D, and records the information of the recording layer La1 (write head WHD1) number and track number n together (Figure 16, step ST6b). Subsequently, the storage processing unit 65 advances the selected recording area in the buffer memory 80 by one, from recording area D to recording area E (Figure 16, step ST7b). In other words, the storage processing unit 65 can advance the pointer by one.

[0174] As shown in Figures 20 and 21C, and also during the write operation for the second track STRn, the positioning error PE does not extend beyond the second limit radius position PO2 in the second direction Db. Therefore, as shown in step ST9b of Figure 17, the storage processing unit 65 moves the selected recording area in the buffer memory 80 back one position from recording area E to recording area D. In other words, the storage processing unit 65 can move the pointer back one position. Therefore, it is possible to create the option to overwrite the third strong parity in recording area D.

[0175] Next, the lighting process of Example 2 of this embodiment will be described. Figure 22 is a schematic diagram showing five data tracks of the recording layer La1 of disk DK1 shown in Figure 10. It illustrates the state in which data is being written sequentially to the (n-2)th data track, the (n-1)th data track, and the nth data track. This diagram illustrates the state in which the write operation is being performed on the nth data track while the positioning error PE exceeds the first off-track slice WOS1.

[0176] Figure 23A is a table showing the recording area 83 of the buffer memory 80, and is intended to explain the method of storing strong parity in the buffer memory 80 corresponding to the write operation in Figure 22. It is intended to explain the process after the first strong parity has been stored in the first selected recording area, and then the selected recording area in the buffer memory 80 has been advanced by one. Figure 23B, following Figure 23A, is a table showing the recording area 83 of the buffer memory 80. It illustrates the process of advancing the selected recording area in the buffer memory 80 by one after storing the second strong parity in the currently selected second recording area. Figure 23C, following Figure 23B, is a table showing the recording area 83 of the buffer memory 80, and is intended to explain the situation when the selected recording area in the buffer memory 80 is moved back one notch.

[0177] As shown in Figures 22 and 23A, during the write operation for the second track STRn, the positioning error PE extends beyond the first limit radius position PO1 in the first direction Da (Figure 16, step ST2b, YES). Also, the first strong parity is stored in the selected recording area D (Figure 16, step ST3b, YES). Therefore, as shown in step ST4b of Figure 16, the storage processing unit 65 advances the selected recording area in the buffer memory 80 by one, from recording area D (first recording area) to recording area E.

[0178] As shown in Figures 22 and 23B, the storage processing unit 65 stores the second strong parity in the selected recording area E (second recording area) and records the information of the recording layer La1 (write head WHD1) and track number n together (Figure 16, step ST6b). Subsequently, the storage processing unit 65 advances the selected recording area in the buffer memory 80 by one, from recording area E to recording area F (Figure 16, step ST7b).

[0179] As shown in Figures 22 and 23C, and during the write operation for the second track STRn, the positioning error PE does not extend beyond the second limit radius position PO2 in the second direction Db. Therefore, as shown in step ST9b of Figure 17, the storage processing unit 65 returns the selected recording area in the buffer memory 80 from recording area F to recording area E. As a result, the first strong parity can be left in recording area D, and the option to overwrite the third strong parity in recording area E can be created.

[0180] Next, the lighting process of Embodiment 3 of this embodiment will be described. Figure 24 is a schematic diagram showing five data tracks of the recording layer La1 of disk DK1 shown in Figure 10. It illustrates the state in which data is being written sequentially to the (n-2)th data track, the (n-1)th data track, and the nth data track. This diagram illustrates the state in which the write operation is being performed on the nth data track while the positioning error PE exceeds the second off-track slice WOS2.

[0181] Figure 25A is a table showing the recording area 83 of the buffer memory 80, and is a diagram to explain the method of storing strong parity in the buffer memory 80 corresponding to the write operation in Figure 24. It shows the state in which the first strong parity is stored in the selected first recording area and the selected first recording area is still selected. Figure 25B, following Figure 25A, is a table showing the recording area 83 of the buffer memory 80. It illustrates the process of advancing the selected recording area in the buffer memory 80 by one after storing the second strong parity in the selected first recording area. Figure 25C, following Figure 25B, is a table showing the recording area 83 of the buffer memory 80, and illustrates the state in which the second recording area that was selected in the buffer memory 80 continues to be selected.

[0182] As shown in Figures 24 and 25A, during the write operation for the second track STRn, the positioning error PE does not extend beyond the first limit radius position PO1 in the first direction Da (Figure 16, step ST2b, NO). Therefore, as shown in step ST5b of Figure 16, the storage processing unit 65 continues to select the currently selected recording area D (first recording area) in the buffer memory 80.

[0183] As shown in Figures 24 and 25B, the storage processing unit 65 stores the second strong parity in the selected recording area D (first recording area) and records the information of the recording layer La1 (write head WHD1) and track number n together (Figure 16, step ST6b). Subsequently, the storage processing unit 65 advances the selected recording area in the buffer memory 80 by one, from recording area D to recording area E (Figure 16, step ST7b).

[0184] As shown in Figures 24 and 25C, and also during the write operation for the second track STRn, the positioning error PE extends beyond the second limit radius position PO2 in the second direction Db. Therefore, as shown in step ST10b of Figure 17, the storage processing unit 65 continues to select the currently selected recording area E (second recording area) in the buffer memory 80. As a result, the second strong parity can be left in the recording area D.

[0185] According to the magnetic disk device 1 configured as described above, the magnetic disk device 1 comprises a disk DK, a write head WHD, a buffer memory 80, a parity generation unit 4W4, a write processing unit 62, an error correction unit 64, a storage processing unit 65, and a normal correction limit prediction unit 66. The error correction unit 64 can perform error correction on the data of a corrupted target sector CSC, which is determined to have corrupted data, among a plurality of target sectors RSC of the first track STR(n-1) and the second track STRn, respectively.

[0186] The write processing unit 62 can write first user data to multiple target sectors RSC of the first track STR(n-1) during the first write period, thereby creating multiple user data sectors. The write processing unit 62 can also write second user data to multiple target sectors RSC of the second track STRn during the second write period following the first write period, thereby creating multiple user data sectors.

[0187] The parity generation unit 4W4 can generate a first normal parity and a first strong parity for error correction of the first corrupted data of the first track STR(n-1), and generate a second normal parity and a second strong parity for error correction of the second corrupted data of the second track STRn.

[0188] The storage processing unit 65 can store the first strong parity in the buffer memory 80, and then store the second strong parity in the buffer memory 80. The normal correction limit prediction unit 66 can generate the first prediction information after the second user data has been written to the second track STRn.

[0189] If the first prediction information is normal information, the storage processing unit 65 maintains the recording area in the buffer memory 80 where the strong parity is stored, stores the second strong parity in the first recording area in the buffer memory 80 where the first strong parity is stored, and can overwrite the first recording area with the second strong parity. If the first prediction information is replaced with abnormal information, the storage processing unit 65 can change the recording area in the buffer memory 80 where the strong parity is stored, leaving the first strong parity in the first recording area and storing the second strong parity in a second recording area in the buffer memory 80 that is different from the first recording area. From the above, it is possible to obtain a magnetic disk device 1 that can efficiently record parity and has excellent error correction capabilities for user data on disk DK.

[0190] While embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. The novel embodiments described above can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. The embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents.

[0191] For example, the above-described technology may be applied not only to hybrid recording type magnetic disk drives, but also to conventional recording type magnetic disk drives, or even to standard recording type magnetic disk drives. [Explanation of symbols]

[0192] 1…Magnetic disk drive, 5…Main power supply, 60…MPU, 61…Read / write processing unit, 62…Write processing unit, 63…Read processing unit, 64…Error correction unit, 65…Storage processing unit, 66…Normal correction limit prediction unit, 67…Command execution unit, 68…Decision unit, 69A…Management unit, 69B…Data protection processing unit, 70…Volatile memory, 80…Buffer memory, 83…Recording area, 90…Non-volatile memory, 100…Host, 110…System controller, 120…Driver IC, 130…Head amplifier IC, 140…R / W channel, 4 W...Write channel, 4W4...Parity generation unit, 150...HDC, 24...VCM, 30...Arm, DK...Disk, L...Recording layer, TR, STR, CTR...Track, SC...Sector, RSC...Target sector, CSC...Corrupted target sector, HD...Head, WHD...Write head, RHD...Read head, PE...Positioning error, TM...Track margin, PO1...First limit radius position, PO2...Second limit radius position, d1...Radial direction, d2...Travel direction, d3...Rotation direction, d5...Overwrite direction, Da...First direction, Db...Second direction.

Claims

1. A disk having a user data area in the recording layer, the first data track and the second data track each containing a plurality of target sectors on which data is to be written, A write head for writing data to the recording layer of the disk, Volatile buffer memory and parity generation unit, A write processing unit capable of performing a write operation to write data to the recording layer, An error correction unit that performs error correction on the data of corrupted sectors among the plurality of target sectors of the first data track and the second data track that are determined to have corrupted data, Storage processing unit, It includes a normal correction limit prediction unit, The aforementioned light processing unit, During the first write period, the first user data is written to multiple target sectors of the first data track to form multiple user data sectors. During the second write period following the first write period, the second user data is written to multiple target sectors of the second data track to form multiple user data sectors. The parity generation unit is, Based on the first user data, a first normal parity and a first strong parity are generated for error correction of first corrupted data in one or more corrupted sectors of the first data track, wherein the ability of the first strong parity to error correct the first corrupted data is higher than the ability of the first normal parity to error correct the first corrupted data. Based on the second user data, a second normal parity and a second strong parity are generated to error correct the second corrupted data of one or more corrupted sectors of the second data track, wherein the ability of the second strong parity to error correct the second corrupted data is higher than the ability of the second normal parity to error correct the second corrupted data. The storage processing unit stores the first strong parity in the buffer memory, and then stores the second strong parity in the buffer memory. The normal correction limit prediction unit generates first prediction information, which is information that predicts whether the first normal error correction of the first corrupted data using the first normal parity by the error correction unit will reach its limit after the second user data has been written to the second data track. The storage processing unit, If the first prediction information is normal information that predicts that the first normal error correction will not reach its limit, the recording area of ​​the buffer memory that stores the strong parity is maintained, the second strong parity is stored in the first recording area of ​​the buffer memory where the first strong parity is stored, and the second strong parity is overwritten in the first recording area. If the first prediction information is replaced by abnormal information that predicts the first normal error correction has reached its limit, the recording area in the buffer memory that stores the strong parity is changed, the first strong parity is left in the first recording area, and the second strong parity is stored in a second recording area in the buffer memory that is different from the first recording area. Magnetic disk drive.

2. In a direction parallel to the radial direction of the disk, the first data track is located in a first direction with respect to the second data track. During the second light period, the normal correction limit prediction unit determines whether the position of the light head extends beyond the first limit radius position in the first direction. If the position of the light head does not extend beyond the first limit radius position in the first direction, the first prediction information is the normal information. When the position of the light head extends beyond the first limit radius position in the first direction, the first prediction information replaces the abnormal information. The magnetic disk device according to claim 1.

3. During the second write period, the normal correction limit prediction unit calculates the excess amount by which the position of the write head extends beyond the first reference radius position in the first direction each time data is written to each of the target sectors of the second data track, and updates the total of the excess amounts during the second write period. Until the sum reaches the first reference value, the first prediction information is the normal information. When the sum reaches the first reference value, the first prediction information replaces the abnormal information. The magnetic disk device according to claim 2.

4. During the second write period, the normal correction limit prediction unit manages the number of one or more corrupted sectors in the first data track. Until the number reaches the first threshold, the first prediction information is the normal information. When the number reaches the first threshold, the first prediction information replaces the abnormal information. The magnetic disk device according to claim 2.

5. The user data area further includes a third data track that is continuous with the second data track in the radial direction, and the third data track includes the plurality of target sectors. The error correction unit performs error correction on the data of the corrupted sectors among the plurality of target sectors of the third data track that are determined to have corrupted data. The aforementioned light processing unit, In the third write period following the second write period, the third user data is written to multiple target sectors of the third data track to form multiple user data sectors. The parity generation unit is, Based on the third user data, a third normal parity and a third strong parity are generated to error correct the third corrupted data of one or more corrupted sectors of the third data track, wherein the ability of the third strong parity to error correct the third corrupted data is higher than the ability of the third normal parity to error correct the third corrupted data. The storage processing unit stores the second strong parity in the buffer memory, and then stores the third strong parity in the buffer memory. The normal correction limit prediction unit generates second prediction information, which is information that predicts whether the second normal error correction of the second corrupted data using the second normal parity by the error correction unit will reach its limit after the second user data has been written to the second data track. The storage processing unit, If the second prediction information is normal information that predicts that the second normal error correction will not reach its limit, the recording area of ​​the buffer memory that stores the strong parity is maintained. The first recording area in which the second strong parity is stored is set as a recording area that overwrites the third strong parity, or The second recording area in which the second strong parity is stored is set as the recording area that overwrites the third strong parity, If the second prediction information is replaced by abnormal information that predicts the second normal error correction has reached its limit, the recording area in the buffer memory that stores the promising parity is changed. The second strong parity is left in the first recording area, and the second recording area is set as a recording area for storing the third strong parity, or The second strong parity is left in the second recording area, and the third recording area of ​​the buffer memory, which is different from the first recording area and the second recording area, is set as the recording area for storing the third strong parity. The magnetic disk device according to claim 1.

6. In a direction parallel to the radial direction of the disk, the first data track is located in a first direction relative to the second data track, and the third data track is located in a second direction opposite to the first direction relative to the second data track. During the second light period, the normal correction limit prediction unit determines whether the position of the light head extends beyond the second limit radius position in the second direction. If the position of the light head does not extend beyond the second limit radius position in the second direction, the second prediction information is the normal information. When the position of the light head extends beyond the second limit radius position in the second direction, the second prediction information replaces the abnormal information. The magnetic disk device according to claim 5.

7. A command execution unit that executes write commands and read commands recorded in the buffer memory, Non-volatile memory and It further includes a judgment unit, When the determination unit determines that there are no unexecuted commands in the buffer memory during the first idle period, The storage processing unit, If the first prediction information is the normal information, the second strong parity stored in the buffer memory is saved to the non-volatile memory, or If the first prediction information is replaced by the abnormal information, the first strong parity and the second strong parity stored in the buffer memory are saved to the non-volatile memory. The magnetic disk device according to claim 1.

8. A read head for reading data from the recording layer of the disk, The system further comprises a read processing unit capable of performing a read operation to read data from the recording layer, The first prediction information has been replaced by the abnormal information, When the determination unit determines that there is a second idle period after the first idle period in which there are no unexecuted commands in the buffer memory, The error correction unit performs error correction on the first corrupted data based on the first user data, the first normal parity, and the first strong parity of the first data track, restores the data of the first data track, and rewrites the restored data to the first data track. The magnetic disk device according to claim 7.

9. Non-volatile memory and Main power supply and A management unit that includes, among the promising parity stored in the buffer memory, the promising parity before it is saved to the non-volatile memory as a target for protection, and excludes the promising parity after it has been saved to the non-volatile memory from the target for protection. The system further includes a data protection processing unit that, when the main power supply is lost, saves the important parity data managed by the management unit as a protected item to the non-volatile memory, If the first prediction information is the normal information, the strong parity stored in the buffer memory is the second strong parity. If the first prediction information is replaced by the abnormal information, the strong parity stored in the buffer memory is the first strong parity and the second strong parity. The magnetic disk device according to claim 1.

10. The data length of the first strong parity is longer than the data length of the first normal parity, and shorter than the data length of the first user data written to the plurality of user data sectors of the first data track. The data length of the second strong parity is longer than the data length of the second normal parity, and shorter than the data length of the second user data written to the plurality of user data sectors of the second data track. The magnetic disk device according to claim 1.

11. In the direction parallel to the radial direction, the second data track is located in a second direction relative to the first data track. The writing unit can select a recording format in which data is written sequentially to the first data track and the second data track in the second direction, and perform the writing process. The magnetic disk device according to claim 1.

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