Display device and method for manufacturing the same

Abstract

The present invention provides a display device with even higher pixel density and thus higher resolution, as well as a method for manufacturing the same. [Solution] A display device comprising a light-emitting element formed by stacking three types of light-emitting diodes, a red diode, a green diode, and a blue diode, on a substrate by epitaxial crystal growth, arranged in a matrix, wherein the three types of light-emitting diodes are each stacked in the order of n layer, light-emitting layer, and p layer from the substrate side, and at least the red diode has a gallium nitride (GaN) light-emitting layer that emits light by ff transition of rare earth elements, and the stacking order of the red diode, green diode, and blue diode is either red diode, blue diode, green diode or red diode, green diode, blue diode from the substrate side, and the interface between each stacked diode forms a tunnel junction structure.

Description

[Technical Field]

[0001] The present invention relates to a display device and a method for manufacturing the same, and more particularly to a display device using a light-emitting diode (LED) and a method for manufacturing the same. [Background technology]

[0002] In recent years, light-emitting devices composed of light-emitting diodes (LEDs) have become widely used in display devices, and are particularly widely used in various display devices, mobile phones, liquid crystal display backlights, white lighting, and other applications.

[0003] Furthermore, in recent years, there has been a growing demand for higher-resolution display screens for microdisplays used in projectors and HUDs (Head-up Displays) for AR (Augmented Reality) / VR (Virtual Reality).

[0004] Conventional LED display devices typically consist of multiple LEDs—red (R), green (G), and blue (B)—arranged planarly on a single substrate, connected by wiring to a driver IC that controls the color and brightness of each pixel in the display device. However, achieving higher-resolution full-color displays requires increasing the number of pixels, which in turn increases the cost of the LEDs and the labor involved in arranging them, inevitably leading to increased manufacturing costs for the display devices. Furthermore, the resolution of these display devices was not sufficiently high.

[0005] Under such circumstances, a display device using a light-emitting element having a structure in which LEDs of three colors, R, G, and B, are stacked on the same substrate has been proposed (for example, Patent Document 1, Patent Document 2, etc.). By stacking LEDs of three colors on the same substrate and forming one light-emitting element with the three stacked pixels of R, G, and B, the size of the light-emitting element can be reduced. Therefore, even with the same number of elements, the number of pixels can be increased, and high definition of the display device can be achieved without a significant increase in cost.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0007] However, when trying to apply a conventional display device to a microdisplay for AR / VR devices, its definition is not yet sufficient, and there is a need to further increase the pixel density to achieve further high definition.

[0008] Therefore, an object of the present invention is to provide a display device that can be sufficiently applied to a microdisplay and has further increased pixel density for high definition, and a method for manufacturing the same.

Means for Solving the Problems

[0009] As a result of intensive studies, the present inventor has found that the above problems can be solved by the invention described below, and has completed the present invention.

[0010] The invention according to claim 1 is A display device is configured by arranging, in a matrix, light-emitting elements in which three types of light-emitting diodes, namely red diodes, green diodes, and blue diodes, are stacked on a substrate by epitaxial crystal growth. Each of the three types of light-emitting diodes is configured by stacking an n-layer, a light-emitting layer, and a p-layer in this order from the substrate side. At least the red diodes among the three types of light-emitting diodes have a gallium nitride (GaN)-based light-emitting layer that emits light by f-f transition of rare earth elements. The stacking order of the red diodes, green diodes, and blue diodes is either red diodes, blue diodes, green diodes or red diodes, green diodes, blue diodes in this order from the substrate side. A display device characterized in that an interface between stacked diodes forms a tunnel junction structure.

[0011] The invention according to claim 2 is A display device is configured by arranging, in a matrix, light-emitting elements in which three types of light-emitting diodes, namely red diodes, green diodes, and blue diodes, are stacked on a multilayer wiring structure incorporating a driving driver by epitaxial crystal growth. Each of the three types of light-emitting diodes is configured by stacking an n-layer, a light-emitting layer, and a p-layer. At least one of the three types of light-emitting diodes has a gallium nitride (GaN)-based light-emitting layer that emits light by f-f transition of rare earth elements. The light-emitting element arranges a light-emitting diode having a gallium nitride (GaN)-based light-emitting layer that emits light by f-f transition of the rare earth elements at a position farthest from the multilayer wiring structure incorporating the driving driver. The gallium nitride (GaN)-based light-emitting layer that emits light by f-f transition of the rare earth elements has a larger light-emitting area than the light-emitting layers of the other two light-emitting diodes. A display device characterized in that a plurality of tunnel junction structures are formed in the stacked light-emitting elements.

[0012] The invention described in claim 3 is, The display device according to claim 2, characterized in that the light-emitting element is a light-emitting element that extracts light from the surface opposite to the multilayer wiring structure incorporating the drive driver.

[0013] The invention described in claim 4 is, The display device according to claim 2 or 3, characterized in that the gallium nitride (GaN) light-emitting layer, which emits light due to the ff transition of the rare earth element, emits red light.

[0014] The invention described in claim 5 is, The display device according to claim 2 or 3, characterized in that a stepped structure is formed in the three types of light-emitting diodes such that a part of the upper surface of the n layer protrudes beyond the end surface of the light-emitting layer.

[0015] The invention described in claim 6 is, The display device according to claim 5, characterized in that electrodes are provided on the upper surface of the n layer, which has a stepped structure formed so as to protrude beyond the end face of the light-emitting layer, and on the upper surface of the p layer of the light-emitting diode located in the uppermost layer.

[0016] The invention described in claim 7 is, The display device according to claim 6, characterized in that the p-layer of the light-emitting diode located closest to the multilayer wiring structure incorporating the drive driver comprises a p-GaN layer and a p+-GaN layer formed on top of the p-GaN layer.

[0017] The invention described in claim 8 is, The display device according to claim 6, characterized in that an n-layer is further laminated on the upper surface of the p-layer of the light-emitting diode located closest to the multilayer wiring structure incorporating the aforementioned drive driver, and an electrode is provided on the upper surface of the n-layer.

[0018] The invention described in claim 9 is, The p-layer of the light-emitting diode located closest to the multilayer wiring structure incorporating the aforementioned drive driver comprises a p-GaN layer and a p+-GaN layer formed on top of the p-GaN layer. The display device according to claim 8, characterized in that the n layer comprises an n-GaN layer and an n+-GaN layer formed below the n-GaN layer.

[0019] The invention described in claim 10 is, The display device according to claim 6, characterized in that the recess formed by the stepped structure is filled with an insulator and the surface is flattened.

[0020] The invention described in claim 11 is, The display device according to claim 10, characterized in that the insulator is formed of any of a visible light-transmitting resin material, a visible light-impermeable resin material, or a visible light-reflecting resin material.

[0021] The invention described in claim 12 is, If the multilayer wiring structure incorporating the aforementioned drive driver is stacked in the order of blue diode, green diode, and red diode, then at the interface between the red diode and the green diode, and at the interface between the green diode and the blue diode, If the multilayer wiring structure incorporating the aforementioned drive driver is stacked in the order of green diode, blue diode, and red diode from the other side, then at the interface between the red diode and the blue diode, and at the interface between the blue diode and the green diode, The display device according to claim 2 or 3, characterized in that a DBR structure is formed in which AlInN and GaN are stacked, AlGaN and GaN are stacked, or AlGaInN and GaN are stacked.

[0022] The invention described in claim 13 is, The display device according to claim 2 or 3, characterized in that the n layer is a Si-containing GaN layer and the p layer is a Mg-containing GaN layer.

[0023] The invention described in claim 14 is, The n layer is composed of an n-GaN layer containing a predetermined concentration of Si and an n+-GaN layer containing a higher concentration of Si. The p layer is composed of a p-GaN layer containing a predetermined concentration of Mg and a p+-GaN layer containing a higher concentration of Mg. The display device according to claim 13, characterized in that the tunnel junction structure is formed between the n+-GaN layer and the p+-GaN layer.

[0024] The invention described in claim 15 is, A method for manufacturing a display device according to claim 2 or claim 3, The present invention relates to a method for manufacturing a display device, characterized by forming the light-emitting layers of the three types of light-emitting diodes and the n-layer and p-layer that form the tunnel junction structure on a substrate in a series of steps using metal-organic vapor deposition.

[0025] The invention described in claim 16 is, A display element in which micro-luminescent elements are arranged in a two-dimensional array on a drive circuit board, The micro-light-emitting element includes a nitride semiconductor layer, The nitride semiconductor layer is stacked in the following order from the side opposite to the drive circuit substrate: a first n layer, a first p layer, a first light-emitting layer, a second n layer, a second light-emitting layer, a second p layer, a third n layer, a third light-emitting layer, and a third p layer. A tunnel junction is formed between the first n layer and the first p layer, and between the second p layer and the third n layer. The first light-emitting layer, the second light-emitting layer, and the third light-emitting layer each emit first light, second light, and third light of different wavelengths. The first light-emitting layer includes a nitride semiconductor layer doped with rare earth elements. The first light-emitting layer is a display element characterized in that, when viewed from the stacking direction of the nitride semiconductor layer, it overlaps with the second light-emitting layer and the third light-emitting layer.

[0026] The invention described in claim 17 is, The display element according to claim 16, characterized in that the second n layer is the cathode of the micro-light-emitting element.

[0027] The invention described in claim 18 is, The display element according to claim 16 or 17, characterized in that the first light is red light, the second light is blue light, and the third light is green light.

[0028] The invention described in claim 19 is, The display element according to claim 18 is characterized in that the first light-emitting layer contains europium as a rare earth element. [Effects of the Invention]

[0029] According to the present invention, it is possible to provide a display device and a method for manufacturing the same, which are fully applicable to microdisplays and have higher resolution due to the further increase in pixel density. [Brief explanation of the drawing]

[0030] [Figure 1] This figure illustrates a time-division display in one embodiment of the present invention. [Figure 2] This is a schematic cross-sectional view showing the configuration of a light-emitting element in a display device according to one embodiment of the present invention. [Figure 3] This is a schematic cross-sectional view of a display device having a multilayer wiring structure in one embodiment of the present invention. [Figure 4] This figure illustrates the circuit configuration for full-screen display in a micro-LED (display device) according to one embodiment of the present invention. [Figure 5] This figure illustrates the equivalent circuit of the pixel structure of a microLED (display device) according to one embodiment of the present invention. [Figure 6] This figure shows a timing chart for displaying "Up" in red on a 5x5 (5 rows, 5 columns) pixel array in a micro-LED (display device) according to one embodiment of the present invention. [Figure 7] (a) is a top view of the layout of one pixel (including the drive transistor) according to one embodiment of the present invention, and (b) is a side view taken from the opposite side of the side where the electrodes are installed by the stepped structure. [Figure 8] This is a schematic cross-sectional view illustrating a light-emitting element in an example of a conventional display device. [Figure 9] This is a schematic cross-sectional view of one pixel in another embodiment of the present invention. [Figure 10] This is a schematic planar diagram of one pixel in another embodiment of the present invention. [Figure 11] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 12] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 13] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 14] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 15] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 16] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 17] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 18] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Figure 19] This flowchart shows the manufacturing process of a display element according to another embodiment of the present invention. [Modes for carrying out the invention]

[0031] [1] The basic idea behind the invention First, I will explain the basic concept of this invention.

[0032] In their investigation into a display device that is also fully applicable to microdisplays and has higher resolution due to even higher pixel density, the inventors first focused on the electrodes provided on each light-emitting diode.

[0033] In other words, to increase pixel density, it is necessary to reduce the size of the light-emitting element, which is formed by stacking multiple light-emitting diodes. However, in conventional display devices, each light-emitting diode has two electrodes, which limits the miniaturization of the light-emitting element.

[0034] Specifically, for example, in the case of the light-emitting element of the display device shown in Patent Document 1, as shown in Figure 8, barrier layers are provided at C and D to insulate them in order to suppress the generation of leakage current at A and B between the electrodes of adjacent LEDs. For this reason, it is necessary to provide two electrodes, a positive electrode and a negative electrode, for each light-emitting diode, and in total, one element is provided with six electrodes.

[0035] Under these circumstances, the inventors considered that if the positive terminal of the first light-emitting diode and the negative terminal of the second light-emitting diode, and the positive terminal of the second light-emitting diode and the negative terminal of the third light-emitting diode, which are located close to each other with a barrier layer in between, could be combined into a single electrode, the total number of electrodes in the element could be reduced, thereby enabling the miniaturization of the light-emitting element.

[0036] As a result of the investigation, it was found that when a tunnel junction structure is formed at the interface between each stacked light-emitting diode and electrodes are provided, no leakage current is generated even without a barrier layer. Furthermore, due to the relationship with the electrodes to which it is connected, the provided electrodes can function as either the positive or negative pole simultaneously, thereby enabling miniaturization of the light-emitting element and increasing the density of pixels.

[0037] In other words, when a tunnel junction structure is formed at the interface between adjacent light-emitting diodes, unlike a normal pn junction, current flows between the two layers (p+-GaN layer and n+-GaN layer) forming the tunnel junction structure, eliminating the potential difference. This allows the electrodes provided on the tunnel junction structure to be shared, enabling miniaturization of the light-emitting element and increased pixel density.

[0038] Specifically, to explain using the example of forming a tunnel junction structure between a red light-emitting diode and a blue light-emitting diode, the p-layer of the red light-emitting diode is composed of a p-GaN layer and a p+-GaN layer from the red light-emitting layer side, while the n-layer of the blue light-emitting diode is composed of an n-GaN layer and an n+-GaN layer from the blue light-emitting layer side. When the p+-GaN layer and the n+-GaN layer are joined, the freely moving electron density and hole density between the two layers are, respectively, 10 18 / cm -3 As described above, the amount of free electrons / holes generated by recombination to form the depletion layer is small compared to the amount of free electrons / holes in the matrix, and the amount of free electrons / holes in the matrix hardly changes. Therefore, the thickness of the depletion layer becomes very thin, and electrons in the valence band of the p+-GaN layer can easily pass through the barrier (band gap of the semiconductor) and flow into the conduction band of the n+-GaN layer (current flows from the n+-GaN layer to the p+-GaN layer) (forming a tunnel junction structure), thus enabling the commonality of electrodes.

[0039] The above studies showed that the size of the light-emitting element can be reduced by decreasing the number of electrodes. However, the inventors believed that further miniaturization could be achieved by simplifying the connection circuits in the light-emitting element and display device in addition to reducing the number of electrodes, and therefore conducted further studies.

[0040] In other words, in the case of the display devices shown in Patent Documents 1 and 2, the light-emitting circuits of three light-emitting diodes stacked on a single element, namely a red diode (R), a green diode (G), and a blue diode (B), are arranged in parallel to emit light of all three colors simultaneously, and by appropriately controlling the light-emitting intensity of each light-emitting diode, an image of the desired color is formed and displayed. As a result, the configuration of the light-emitting circuits in the element becomes complex, and even if the number of electrodes is reduced, there is a limit to how small the light-emitting element can be made.

[0041] Therefore, the inventors considered that if each light-emitting circuit could be arranged in series, the light-emitting circuit could be simplified, and combined with a reduction in the number of electrodes, this would allow for further miniaturization of the light-emitting element. They diligently investigated a method for forming and displaying images of desired colors by arranging each light-emitting circuit in series.

[0042] As a result, it was found that by connecting each light-emitting circuit in series and dividing the time required to display one image screen by color (time-division multiplexing), and controlling the light emission of each light-emitting diode, it is possible to form and display an image of the desired colors.

[0043] Figure 1 illustrates the time-division display in (Embodiment 1) of the present invention, which will be described later. As shown in Figure 1, the time required to display one image screen (usually 1 / 60 sec) is divided equally into three sub-fields as one field, and power corresponding to the ratio of the red, green, and blue light emission intensities required to display the desired color is supplied to each sub-field, causing each color to emit light sequentially. In this way, the desired color can be emitted and displayed as a whole field.

[0044] In this case, only one diode is emitting light in each sub-field, while the other diodes are not. Therefore, each RGB light-emitting circuit only needs to be driven as needed, and the display device circuit can be configured by connecting each light-emitting circuit in series, thereby simplifying the overall circuit configuration of the display device. As a result, the size of the light-emitting elements, including the light-emitting circuits, can be further reduced, and the pixel density can be further increased.

[0045] In the above description, one Field is divided equally into three Sub-Fields, and power is supplied according to the ratio of their emission intensities to emit and display the desired color. However, one Field may also be divided into three Sub-Fields according to the ratio of the emission times of red, green, and blue light required to display the desired color. Power and time according to the ratio of emission times are supplied to each Sub-Field, causing RGB to emit light sequentially, thereby emitting and displaying the desired color as a whole.

[0046] In this case, only one diode is emitting light in each sub-field, and the other diodes are not. Therefore, each RGB light-emitting circuit only needs to drive the light-emitting circuit of the required color as needed. By connecting each light-emitting circuit in series, the circuit of the display device can be configured, simplifying the overall circuit configuration of the display device. As a result, the size of the light-emitting elements, including the light-emitting circuits, can be further reduced, and the pixel density can be further increased.

[0047] In other words, from the perspective of circuit configuration, if three types of light-emitting diodes are arranged in order from the substrate side as the first light-emitting diode, the second light-emitting diode, and the third light-emitting diode, and the circuit in which the electrode formed on the upper surface of the n layer of the first light-emitting diode and the electrode formed on the upper surface of the n layer of the second light-emitting diode are connected is the first circuit, the circuit in which the electrode formed on the upper surface of the n layer of the second light-emitting diode and the electrode formed on the upper surface of the n layer of the third light-emitting diode are connected is the second circuit, and the circuit in which the electrode formed on the upper surface of the n layer of the third light-emitting diode and the electrode formed on the upper surface of the p layer of the third light-emitting diode are connected is the third circuit, then the time required to display Image 1 can be divided into three equal parts, and power corresponding to the ratio of the red, green, and blue light emission intensities required to display the desired color is supplied from the first circuit to each of the third circuits, causing each color to emit light sequentially, thereby displaying the desired color as Image 1.

[0048] Furthermore, the time required to display Image 1 can be divided according to the ratio of the emission times of red, green, and blue light required to display the desired color. Power is then supplied to each circuit from the first to the third circuit according to the ratio, causing each color to emit light sequentially, thereby displaying the desired color as Image 1.

[0049] In these circuits, it is preferable that the third circuit is formed by first forming an n layer (an n+-GaN layer and an n-GaN layer) on the upper surface of the p layer of the third light-emitting diode, then forming electrodes on the upper surface of the n layer and connecting them to the electrodes formed on the upper surface of the n layer of the third light-emitting diode.

[0050] [2] Specific embodiments The present invention will be described in more detail below with reference to the drawings, based on specific embodiments.

[0051] (Embodiment 1) This embodiment provides a display device that achieves even higher resolution by arranging each light-emitting circuit in series and displaying one image screen in a time-division format.

[0052] 1. Light-emitting element First, the light-emitting element in the display device according to this embodiment will be described.

[0053] Figure 2 is a schematic cross-sectional view showing the configuration of the light-emitting element in the display device according to this embodiment. In Figure 2, an example is shown in which red LEDs, blue LEDs, and green LEDs are stacked in that order from the substrate side, as this is desirable in terms of ease of stacking considering the crystallinity and surface flatness.

[0054] On the other hand, the LEDs may be stacked in the order of red, green, and blue. In this case, it becomes easier to increase the light-emitting area of ​​the green LED, which has lower luminous efficiency than the blue LED, making it easier to obtain a high green light intensity.

[0055] Therefore, if crystallinity and surface flatness are important, the stacking order should be red LED, blue LED, and green LED. If stronger green light emission is to be obtained, the stacking order should be red LED, green LED, and blue LED. Note that if the stacking order is red LED, green LED, and blue LED, the steps for the green LED and blue LED described later should be swapped.

[0056] As shown in Figure 2, the light-emitting element according to this embodiment is constructed by stacking three types of light-emitting LEDs, a red LED, a blue LED, and a green LED, by epitaxial crystal growth. Each LED is constructed by stacking an n-layer, a light-emitting layer, and a p-layer in that order from the substrate side. The interface between each stacked LED, that is, the n-layer of one LED and the p-layer of the other LED, forms a tunnel junction structure.

[0057] The light-emitting element in this embodiment can be fabricated in a series of steps using metal-organic vapor deposition (OMVPE) according to the following formation process. In the following description, GaN is used as an example of the nitride constituting the nitride semiconductor, but it is not limited to this, and other nitrides such as AlN and InN (including mixed crystals of InGaN and AlGaN) are also included.

[0058] (1) Formation of the substrate First, a substrate is formed for stacking each LED.

[0059] (a) Formation of a low-temperature GaN layer Specifically, first, a sapphire substrate is placed in a reaction vessel adjusted to a pressure of 100 kPa. Then, the temperature inside the reaction vessel is set to 475°C, and ammonia (NH3) gas (flow rate: 5.0 SLM: standard liter per minute) and trimethylgallium (TMG: (CH3)3Ga) gas (flow rate: 10.7 sccm: standard cubic centimeter per minute) are supplied into the reaction vessel to form a low-temperature GaN layer with a thickness of several tens of nanometers on the sapphire substrate as a buffer layer.

[0060] (b) Formation of an additive-free GaN layer Next, the temperature inside the reaction vessel is set to 1180°C, and NH3 gas (4.0 SLM) and TMG gas (21.3 sccm) are supplied into the reaction vessel to form an undoped GaN layer with a thickness of approximately 0.5 to 5.0 μm on the low-temperature GaN layer. This completes the formation of the substrate.

[0061] This substrate is then peeled off after the LEDs of each color, as described below, are laminated onto it.

[0062] (2) Formation of a red LED Next, a red LED is formed on the substrate.

[0063] (a) Formation of n layer (n-GaN layer) First, a Si-doped n-layer (n-GaN layer) is formed on the undoped GaN layer of the substrate by growing it to a thickness of approximately 0.1 to 5.0 μm (growth temperature: 1180°C). At this time, NH3 gas (4.0 SLM) and TMG gas (21.3 sccm) are supplied into the reaction vessel, and the Si concentration is 10 17 ~10 22 cm -3 The reaction is controlled to achieve a certain degree. As the Si source, Si-containing raw materials such as monomethylsilane (CH3SiH3) or trimethylsilane ((CH3)3SiH) are supplied in gaseous form into the reaction vessel.

[0064] (b) Formation of the red light-emitting layer Next, a GaN:Eu layer with added Eu is grown on the n-GaN layer to a thickness of approximately 0.1-5.0 μm (growth temperature: 960°C) to form a red light-emitting layer. At this time, NH3 gas (4.0 SLM) and TMG gas (5.25 sccm) are supplied into the reaction vessel, and the Eu concentration is set to 10 17 ~10 22 cm -3 The process is controlled to achieve a certain degree. The Eu raw material is n-propyltetramethylcyclopentadienyleuropium (Eu[C5(CH3)4(C3H7)]2:EuCp) obtained by bubbling with hydrogen (H2) gas as the carrier gas.pm2 ) Tris(2,2,6,6 - tetramethyl - 3,5 - heptanedionato) europium(III) [Eu(OCC(CH3)3CHCOC(CH3)3)3: Eu(DPM)3] etc. are used.

[0065] (c) Formation of the p - layer Next, a p - layer added with Mg is formed on the red light - emitting layer. Note that the p - layer is composed of a p - GaN layer and a p+-GaN layer.

[0066] (a) Formation of the p - GaN layer On the red light - emitting layer, a p - GaN layer added with Mg is grown to about 100 - 200 nm (growth temperature: 1050 °C) for formation. At this time, the flow rate of TMG gas (TMG1) is 8 sccm, the flow rate of NH3 gas is 5 SLM, the flow rate of H2 gas is 13.5 SLM, and the Mg concentration is controlled to be about 10 17 ~10 22 cm -3 For example, a raw material containing Mg such as MgCp2 is supplied into the reaction vessel in a gaseous state (flow rate: 33.1 sccm) as the Mg source.

[0067] (b) Formation of the p+-GaN layer Next, a p+-GaN layer added with Mg is grown to about 10 - 100 nm (growth temperature: 1050 °C) on the p - GaN layer for formation. At this time, the flow rate of TMG gas (TMG1) is 8 sccm, the flow rate of NH3 gas is 5 SLM, the flow rate of H2 gas is 13.5 SLM, and the Mg concentration is controlled to be about 10 17 ~10 22 cm -3 For example, a raw material containing Mg such as MgCp2 is supplied into the reaction vessel in a gaseous state (flow rate: 66.2 sccm) as the Mg source.

[0068] Thus, the formation of the red LED is completed.

[0069] (3) Formation of the blue LED Next, a blue LED is formed on the red LED.

[0070] (a) Formation of the n layer Next, an n-layer with added Si is formed on the p+-GaN layer of the red LED. The n-layer consists of an n+-GaN layer and an n-GaN layer.

[0071] (i) Formation of the n+-GaN layer Once the formation of the p+-GaN layer described above is complete, the carrier gas in the reaction vessel is changed from hydrogen (H2) gas to nitrogen (N2) gas. Specifically, while maintaining the temperature inside the reaction vessel at 1150°C, the hydrogen (H2) gas is discharged from the reaction vessel, while nitrogen (N2) gas is introduced at a flow rate of 9.5 SLM for 5 minutes. At this time, the flow rate of NH3 gas is set to 4 SLM. This state is then maintained for 30 seconds to stabilize the inside of the reaction vessel.

[0072] Next, a Si-doped n+-GaN layer is formed on the p+-GaN layer by growing it for approximately 10-100 nm (growth temperature: 1150°C). At this time, the flow rate of TMG gas (TMG2) is 5.25 sccm, the flow rate of NH3 gas is 4 SLM, and the flow rate of N2 gas is 9.5 SLM, and the Si concentration is 10 17 ~10 22 cm -3 The reaction is controlled to achieve a certain level. As a Si source, for example, Si-containing raw materials such as monomethylsilane (CH3SiH3) or trimethylsilane ((CH3)3SiH) are supplied in gaseous form into the reaction vessel (flow rate: 50.0 sccm).

[0073] By forming the above-mentioned n+-GaN layer (the n+-GaN layer of the blue LED) on the p+-GaN layer of the red LED in a series of steps, a tunnel junction structure can be formed at the interface between the n+-GaN layer and the p+-GaN layer, as described above, thereby enabling the commonality of electrodes.

[0074] (b) Formation of n-GaN layer Once the formation of the n+-GaN layer described above is complete, the carrier gas in the reaction vessel is changed from N2 gas to H2 gas. Specifically, while maintaining the temperature inside the reaction vessel at 1180°C, the N2 gas is discharged from the reaction vessel, while H2 gas is introduced at a flow rate of 13.3 SLM for 5 minutes. At this time, the flow rate of NH3 gas is set to 4 SLM.

[0075] Next, a Si-doped n-GaN layer is formed on the n+-GaN layer by growing it to a thickness of approximately 0.1 to 5.0 μm (growth temperature: 1180°C). At this time, the flow rate of TMG gas (TMG1) is 21.3 sccm, the flow rate of NH3 gas is 4 SLM, and the flow rate of H2 gas is 15.3 SLM, and the Si concentration is 10 17 ~10 22 cm -3 The reaction is controlled to achieve a certain degree. As a Si source, for example, Si-containing raw materials such as monomethylsilane (CH3SiH3) or trimethylsilane ((CH3)3SiH) are supplied in gaseous form into the reaction vessel (flow rate: 18.3 sccm).

[0076] (b) Formation of the blue light-emitting layer Next, an InGaN quantum well structure is grown on the n-GaN layer to a depth of approximately 1 to 1000 nm to form a blue light-emitting layer (growth temperature: 715°C). At this time, the InN mole fraction is controlled to be approximately 0.1 to 15%. Trimethylindium (TMIn) is used as the In raw material.

[0077] (c) Formation of the p layer Next, a p-layer doped with Mg is formed on the blue light-emitting layer. The p-layer consists of a p-GaN layer and a p+-GaN layer.

[0078] (i) Formation of p-GaN layer A p-GaN layer doped with Mg is formed on a blue light-emitting layer by growing it to a thickness of approximately 100-200 nm (growth temperature: 1050°C). At this time, the flow rate of TMG gas (TMG1) is 8 sccm, the flow rate of NH3 gas is 5 SLM, and the flow rate of H2 gas is 13.5 SLM, and the Mg concentration is 10 17 ~10 22 cm-3 The reaction is controlled to achieve a certain degree. As the Mg source, for example, a Mg-containing raw material such as MgCp2 is supplied in gaseous form into the reaction vessel (flow rate: 33.1 sccm).

[0079] (b) Formation of p+-GaN layer Next, a p+-GaN layer with added Mg is grown on the p-GaN layer to a length of approximately 10-100 nm (growth temperature: 1050°C). At this time, the flow rate of TMG gas (TMG1) is 8 sccm, the flow rate of NH3 gas is 5 SLM, and the flow rate of H2 gas is 13.5 SLM, and the Mg concentration is 10 17 ~10 22 cm -3 The process is controlled to achieve a certain degree. As the Mg source, for example, a Mg-containing raw material such as MgCp2 is supplied in gaseous form into the reaction vessel (flow rate: 66.2 sccm). This completes the formation of the blue LED.

[0080] (4) Formation of a green LED Next, a green LED is formed on top of the blue LED.

[0081] (a) Formation of the n layer Next, an n-layer with added Si is formed on the p+-GaN layer of the blue LED described above. The n-layer consists of an n+-GaN layer and an n-GaN layer.

[0082] (i) Formation of the n+-GaN layer Once the formation of the p+-GaN layer described above is complete, the carrier gas in the reaction vessel is changed from hydrogen (H2) gas to nitrogen (N2) gas. Specifically, while maintaining the temperature inside the reaction vessel at 1150°C, the hydrogen (H2) gas is discharged from the reaction vessel, while nitrogen (N2) gas is introduced at a flow rate of 9.5 SLM for 5 minutes. At this time, the flow rate of NH3 gas is set to 4 SLM. This state is then maintained for 30 seconds to stabilize the inside of the reaction vessel.

[0083] Next, a Si-doped n+-GaN layer is formed on the p+-GaN layer by growing it for approximately 10-100 nm (growth temperature: 1150°C). At this time, the flow rate of TMG gas (TMG2) is 5.25 sccm, the flow rate of NH3 gas is 4 SLM, and the flow rate of N2 gas is 9.5 SLM, and the Si concentration is 10 17 ~10 22 cm -3 The reaction is controlled to achieve a certain level. As a Si source, for example, Si-containing raw materials such as monomethylsilane (CH3SiH3) or trimethylsilane ((CH3)3SiH) are supplied in gaseous form into the reaction vessel (flow rate: 50.0 sccm).

[0084] A tunnel junction is formed between the formed n+-GaN layer and the p+-GaN layer formed above, in the same manner as described above.

[0085] (b) Formation of n-GaN layer Once the formation of the n+-GaN layer described above is complete, the carrier gas in the reaction vessel is changed from N2 gas to H2 gas. Specifically, while maintaining the temperature inside the reaction vessel at 1180°C, the N2 gas is discharged from the reaction vessel, while H2 gas is introduced at a flow rate of 13.3 SLM for 5 minutes. At this time, the flow rate of NH3 gas is set to 4 SLM.

[0086] Next, a Si-doped n-GaN layer is formed on the n+-GaN layer by growing it to a thickness of approximately 0.1 to 5.0 μm (growth temperature: 1180°C). At this time, the flow rate of TMG gas (TMG1) is 21.3 sccm, the flow rate of NH3 gas is 4 SLM, and the flow rate of H2 gas is 15.3 SLM, and the Si concentration is 10 17 ~10 22 cm -3 The reaction is controlled to achieve a certain degree. As a Si source, for example, Si-containing raw materials such as monomethylsilane (CH3SiH3) or trimethylsilane ((CH3)3SiH) are supplied in gaseous form into the reaction vessel (flow rate: 18.3 sccm).

[0087] (b) Formation of the green light-emitting layer Next, an InGaN quantum well structure is grown on the n-GaN layer to a wavelength of approximately 1 to 1000 nm to form a green light-emitting layer (growth temperature: 670°C). At this time, the InN mole fraction is controlled to be approximately 15 to 40%. Trimethylindium (TMIn) or the like is used as the In raw material.

[0088] (c) Formation of the p layer Next, a p-layer doped with Mg is formed on the green light-emitting layer. The p-layer consists of a p-GaN layer and a p+-GaN layer.

[0089] (i) Formation of p-GaN layer Next, a p-GaN layer doped with Mg is formed on the green light-emitting layer by growing it for approximately 10-200 nm (growth temperature: 1050°C). At this time, the flow rate of TMG gas (TMG1) is 8 sccm, the flow rate of NH3 gas is 5 SLM, and the flow rate of H2 gas is 13.5 SLM, and the Mg concentration is 10 17 ~10 22 cm -3 The reaction is controlled to achieve a certain degree. As the Mg source, for example, a Mg-containing raw material such as MgCp2 is supplied in gaseous form into the reaction vessel (flow rate: 33.1 sccm).

[0090] (b) Formation of p+-GaN layer Next, a p+-GaN layer with added Mg is grown on the p-GaN layer to a length of approximately 10-100 nm (growth temperature: 1050°C). At this time, the flow rate of TMG gas (TMG1) is 8 sccm, the flow rate of NH3 gas is 5 SLM, and the flow rate of H2 gas is 13.5 SLM, and the Mg concentration is 10 17 ~10 22 cm -3 The reaction is controlled to achieve a certain degree. As the Mg source, for example, a Mg-containing raw material such as MgCp2 is supplied in gaseous form into the reaction vessel (flow rate: 66.2 sccm).

[0091] Furthermore, it is preferable to form an n-layer (an n-GaN layer and an n-GaN layer) on the p+-GaN layer as needed. In this case, a tunnel matching structure will be formed at the interface between the p+-GaN layer and the n+-GaN layer.

[0092] This completes the fabrication of a light-emitting element in which red, blue, and green LEDs are stacked. As mentioned above, the order in which the blue and green LEDs are formed can be changed to create a light-emitting element in which red, green, and blue LEDs are stacked.

[0093] In this embodiment, as described above, the red light-emitting layer is formed of a GaN:Eu layer that emits light by ff transitions. Therefore, blue and green light emission is not absorbed by the red light-emitting layer, and light can be extracted from either the substrate side or the top LED (green LED) side. Furthermore, because the surface of the GaN:Eu layer is flat, the light-emitting function (luminous efficiency) of the stacked green and blue LEDs is not reduced.

[0094] 2. Formation of electrodes Next, the four electrodes described above are formed on the light-emitting element (a light-emitting element made up of stacked red, blue, and green LEDs) fabricated as described above.

[0095] (1) Formation of stepped structure First, a stepped structure is formed in the light-emitting element to accommodate the four electrodes. At this time, the layer is made stepped so that the area of ​​the red LED > the area of ​​the blue LED > the area of ​​the green LED. Specifically, the ratio of the light-emitting areas of the green, blue, and red LEDs is adjusted based on the external quantum efficiency of each LED and the standard luminous efficiency of human clear vision so that a high-quality white light is formed when all three colors (R, B, and G) are emitted.

[0096] Furthermore, the above adjustment method is not limited to adjustments based solely on area ratio. The amount of light emitted by an LED can be changed not only by the light-emitting area, but also by the voltage applied to the LED (applying a high voltage will result in stronger light emission) and the current applied (applying a high current will result in stronger light emission). Therefore, even if the desired amount of light emission cannot be achieved by adjusting the area ratio, a higher voltage and / or current may be applied to the LED of that color compared to the LEDs of other colors to make it emit light more strongly, thereby adjusting it to the desired amount of light emission.

[0097] The stepped structure can be formed by etching a light-emitting element, which consists of stacked red, blue, and green LEDs, according to the procedure (process) shown below. (a) Patterning of resist for the lower electrode region of the green LED (which also serves as the upper electrode for the blue LED) (b) Dry etching up to the nth layer of the green LED (c) Resist peeling (d) Patterning of the resist for the lower electrode region of the blue LED (which also serves as the upper electrode region of the red LED) (e) Dry etching up to the nth layer of the blue LED (f) Resist peeling (g) Patterning of resist for the lower electrode area of ​​the red LED (h) Dry etching up to the nth layer of the red LED (i) Resist stripping

[0098] (2) Formation of electrodes Next, electrodes are formed on the surface of the stepped structure obtained above, and on the surface of the p+-GaN layer of the green LED (top layer), respectively. If, as described above, an n+-GaN layer and an n-GaN layer are formed on the p+-GaN layer of the green LED (top layer), the electrodes are formed on the surface of the n-GaN layer.

[0099] (a) Top-loading type For top-extraction type display devices, that is, those that extract light from the green LED side, the electrodes are formed according to the following process. (i) An insulating resin, such as spin-on glass, bisbenzocyclobutene, or polydimethylsiloxane, which is initially liquid but solidifies through a chemical reaction caused by heat or exposure, is embedded and flattened into the stepped structure. The resin must be transparent to visible light (RGB) (have little or no absorption in the visible light region). The above materials have little or no absorption in visible light, but any resin that satisfies the above conditions is also included. Note that if light diffuses and leaks from the sidewall of a pixel to an adjacent pixel, interference may occur between adjacent pixels, potentially causing image blurring. In such cases, it is preferable to use a resin material that is opaque to visible light to absorb visible light. (b) Dry etching of the resin until the top of the p+-GaN of the red LED is exposed (this is called etch-back). (h) Patterning for electrode formation in the n layer of green, blue, and red LEDs (ii) Etching of resin (dry etching or wet etching) → Formation of n-type electrode (a material that can make ohmic contact with typical n-GaN. For example, TiAu: titanium-gold) → Electrode lift-off process by resist stripping (e) Patterning for forming transparent electrodes on the p-layer of green, blue, and red LEDs (h) Etching of resin (dry etching or wet etching) → Formation of p-type electrode (ITO: indium tin lead) → Lift-off process of transparent electrode by resist peeling

[0100] (b) Bottom-extraction type In the case of a bottom-extraction type, i.e., when light is extracted from the substrate side, the electrodes are formed according to the following process. Basically, the same process as the top-extraction type is used, but the difference is that metal electrodes are used instead of transparent electrodes because there is no need to extract light upwards. (i) An insulating resin, such as spin-on glass, bisbenzocyclobutene, or polydimethylsiloxane, which is initially liquid but solidifies through a chemical reaction caused by heat or exposure, is embedded and flattened into the stepped structure. The resin may be transparent to visible light (RGB) (has little or no absorption in the visible light region) or reflect visible light. Note that if light diffuses and leaks from the sidewall of a pixel to an adjacent pixel, interference may occur between adjacent pixels, causing image blurring, similar to the case of the top-extraction type. Therefore, it is preferable to use a resin material that is opaque to visible light to absorb visible light. (b) Dry etching of the resin until the top of the p-GaN of the red LED is exposed is performed. (h) Patterning for electrode formation in the n layer of green, blue, and red LEDs (ii) Etching of resin (dry etching or wet etching) → Formation of n-type electrode (a material that can make ohmic contact with typical n-GaN, e.g., TiAu: titanium-gold) → Electrode lift-off process by resist stripping

[0101] In the case of a bottom-extraction type, the efficiency of light extraction to the outside can be further improved by providing a DBR structure (diffraction grating) that reflects only specific wavelengths, thereby reflecting the light emitted toward the back side and sending it toward the front side.

[0102] As a specific example, in order to extract light downwards (towards the sapphire substrate), if red LEDs, blue LEDs, and green LEDs are formed in order from the main surface side of the sapphire substrate, a DBR structure that reflects red and blue light is provided between the uppermost p-GaN layer constituting the red LED and the lowermost n-GaN layer constituting the blue LED, and between the uppermost p-GaN layer constituting the blue LED and the lowermost n-GaN layer constituting the green LED.

[0103] As a result, red and blue light are reflected in the DBR structure and sent downward (towards the sapphire substrate), increasing the amount of light sent out and improving the efficiency of light extraction to the outside.

[0104] In other words, the DBR structure allows for the interference and reflection of light by alternately growing and stacking media with different refractive indices, making it easy to control the direction of light emission. Furthermore, because the DBR structure acts as a diffraction grating, it reflects only light of specific wavelengths back to the active layer while allowing other light to pass through, thereby increasing the amount of light emitted and improving light extraction efficiency.

[0105] As for specific DBR structures, for example, a multilayer film of AllnN (high refractive index) / GaN (low refractive index) is preferred. In this case, each layer is grown so that AllnN and GaN are sufficiently lattice-matched and the generation of in-plane strain is controlled. The thickness of each layer and the number of layers are appropriately determined according to the wavelength of the target light, but usually 10 to 30 pairs are preferred, although more than 100 pairs may be stacked. Furthermore, such a DBR structure is not limited to AlInN / GaN stacking, but may also be a multilayer film of AlGaN / GaN or AlGaInN / GaN.

[0106] Furthermore, when extracting light in the direction of the sapphire substrate surface, if the main surface of the sapphire substrate is processed to create fine irregularities on the outermost surface, the amount of light emitted from the main surface of the sapphire substrate increases due to these irregularities, thereby improving the efficiency of extracting light to the outside.

[0107] Furthermore, when arranging multiple light-emitting units, in addition to arranging them in their original vertical and horizontal positions, they may also be arranged symmetrically in the vertical and horizontal directions. As will be described later, each light-emitting unit will be electrically connected to a transistor, which is a driving element, so it is desirable that the arrangement of the light-emitting units matches the arrangement of the transistors. For this reason, if the arrangement of multiple transistors is symmetrical in the vertical and horizontal directions, it is good to arrange the light-emitting units symmetrically in the vertical and horizontal directions as well. Also, if the arrangement of multiple transistors is symmetrical only in the vertical relationship, or only in the horizontal relationship, the light-emitting units should be arranged accordingly, either symmetrical only in the vertical relationship or only in the horizontal relationship.

[0108] In the above method, InGaN is used to form the active layers of both green and blue LEDs, but Tb-doped GaN (GaN:Tb) can also be used for the active layer of the green LED. GaN:Tb is preferable as a device characteristic because, regardless of the amount of doped Tb, the emission due to the ff transition of Tb ions always shows green light, the emission wavelength is always stable regardless of temperature changes or current injection amount, and narrow-band emission can be obtained. 22 cm -3 If this is done, the crystallinity of the GaN matrix will deteriorate significantly, so the amount of Tb added will be 10 22 cm -3 It is preferable to control it to less than [a certain level].

[0109] Furthermore, Tm-doped GaN (GaN:Tm) can also be used in the active layer of a blue LED. GaN:Tm is preferable as a device characteristic because, regardless of the amount of doped Tm, the emission due to the ff transition of Tm ions always exhibits blue light, resulting in a stable emission wavelength regardless of temperature changes or current injection, and providing narrow-band emission. 22 cm -3 If this is done, the crystallinity of the GaN matrix will deteriorate significantly, so the amount of Tm added will be 10 22 cm -3 It is preferable to control it to less than [a certain level].

[0110] 3. Formation of multilayer wiring structure As described above, in the display device according to this embodiment, the red light-emitting layer is formed of GaN:Eu, and the surface of the light-emitting part is flattened, so that a driver for driving the light-emitting part can be integrally incorporated into the display unit. Furthermore, by forming a multilayer wiring structure incorporating the driver, the driver implementation process can be simplified, thereby reducing costs. In addition, the implementation area can be reduced, making it possible to further increase the resolution of the display.

[0111] Figure 3 is a schematic cross-sectional view of a display device having a multilayer wiring structure in this embodiment. As shown in Figure 3, in this embodiment, the display device comprises a light-emitting element section and a display device section having a multilayer wiring structure section bonded to the upper surface of the light-emitting element section. In addition, the display device shown in Figure 3 has a reflector provided on the upper surface of the light-emitting element section for extracting light from the substrate side of the light-emitting element.

[0112] In the light-emitting element section, each electrode (from the top layer, in order from the first to the fourth electrode) provided on each color LED is connected to each of the four n+Si semiconductors provided in the Si semiconductor (p-type) by a wire embedded in an insulator. The electrode power supply is connected to the VDD power supply.

[0113] Furthermore, within the insulator of the display device section, a TFT transistor Tra constituting a green light-emitting circuit is provided between the electrode connected to the first electrode and the electrode connected to the second electrode, a TFT transistor Trb constituting a blue light-emitting circuit is provided between the electrode connected to the second electrode and the electrode connected to the third electrode, and a transistor Trc constituting a red light-emitting circuit is provided between the electrode connected to the third electrode and the electrode connected to the fourth electrode.

[0114] In this case, for example, to make a red LED light up, a potential is applied to the gate electrodes of Tra and Trb using CNTA and CNTB, and the potential of CNTC is set to GND, turning Tra and Trb ON. This causes current to flow from the drain electrodes of Tra and Trb to the source electrodes. On the other hand, since Trc remains OFF, current flows between the third and fourth electrodes towards the red LED, causing the red LED to light up.

[0115] Similarly, to light up the blue LED, turn CNTA and CNTC ON and turn CNTB OFF. This causes current to flow between the second and third electrodes towards the blue LED, making the blue LED light up. To light up the green LED, turn CNTB and CNTC ON and turn CNTA OFF. This causes current to flow between the first and second electrodes towards the green LED, making the green LED light up.

[0116] For transistors Tra, Trb, and Trc, for example, low-temperature polysilicon TFTs used in thin-film transistor liquid crystal displays can be used, and they can generally be fabricated according to the following procedure. (1) An insulating SiO2 film (insulating film) is formed on the wiring of the common potential. (2) An amorphous Si film is deposited on the SiO2 film (on a glass substrate). If the amorphous Si film is deposited by the P-CVD method, a dehydrogenation annealing treatment is performed to remove hydrogen from the Si film, and then polycrystallization is performed by excimer laser annealing. (3) Next, the polycrystalline Si film that will form the channel and source / drain portions is etched to form the gate insulating film. After this, an Al-based metal film, which will be the gate metal film, is deposited. Then the gate metal film is processed. (4) The gate metal film side surface is anodized to form an offset portion, and then the source and drain portions are doped with high concentrations of phosphorus and boron impurities to form the gate electrode, source electrode, and drain electrode. (5) An interlayer insulating film is formed, contact holes are opened, and source and drain metals are formed to create a polySi TFT.

[0117] 4. Drive Circuit Next, the drive circuit in the display device according to this embodiment will be described.

[0118] (1) Overall screen configuration including drive transistors Figure 4 illustrates the circuit configuration for the overall screen display in the micro-LED (display device) of this embodiment. Figure 5 illustrates the equivalent circuit of the pixel structure of the micro-LED (display device) of this embodiment.

[0119] As shown in Figure 4, in the display device of this embodiment, scan lines (X1, X2...Xn) and data lines (Y1, Y2...Yn) are arranged in a matrix on the display screen.

[0120] Each scan line is controlled by a scan line drive circuit. In Figure 4, the "four common lines" refer to the three control lines (CNTA, CNTB, CNTC) connected to the gate electrodes of the transistors (Tra, Trb, Trc) that control the light emission of the three types of light-emitting LEDs (G, B, R) that constitute each pixel (light-emitting element), and the one VDD line (positive power line), for a total of four lines.

[0121] The scan lines (X1, X2...Xn) are connected to the gate electrodes of transistor Tr1 of each pixel (light-emitting element) that constitutes each row of pixel lines on the display screen, and have the function of selecting the pixel (RGB) to be operated on in a predetermined scan cycle. The data lines (Y1, Y2...Yn) are connected to the source electrodes of transistor Tr1 of each pixel that constitutes each column of pixel lines on the display screen, and provide brightness information for driving each pixel.

[0122] Each data line is controlled by a data line drive circuit.

[0123] As shown in Figure 5, the red LED (R), blue LED (B), and green LED (G) that constitute one pixel are connected in series, and the device comprises a light-emitting element with the red LED (R), blue LED (B), and green LED (G) connected in series, three transistors Tra, Trb, and Trc that form a circuit with each light-emitting element, two transistors Tr1 and Tr2 that control the application of power, and a retaining capacitor C.

[0124] Specifically, transistor Tr1 is controlled by the scan line (SCN) and has the function of writing brightness information provided by the data line (DAT) to the retention capacitor C for each pixel. On the other hand, transistor Tr2 has the function of controlling the amount of current supplied to the light-emitting element according to the brightness information that has been written. The retention capacitor C has a charge / discharge function, and the voltage applied to the gate electrode of transistor Tr2 is controlled according to the operation of transistor Tr1. That is, the scan line (SCN) switches Tr1 ON / OFF, while the data line (DAT) controls the amount of charge accumulated in the retention capacitor C, and the amount of current in Tr2 is adjusted by the amount of charge accumulated in the retention capacitor C.

[0125] The drain electrode of transistor Tr1 is connected to the gate electrode of transistor Tr2, and transistor Tr2 applies a predetermined voltage to the light-emitting element in accordance with the brightness information. The brightness (luminescence intensity) of each light-emitting element changes depending on the amount of current supplied.

[0126] In other words, by appropriately controlling the application of current to Tr1 and Tr2, which constitute each pixel according to the brightness information from the scan lines and data lines, it is possible to control the illumination, extinguishing, and brightness of the light-emitting elements that constitute each pixel (RGB).

[0127] Then, the writing of brightness (luminescence intensity) information to each pixel (light-emitting element) (application of current to the light-emitting element) is performed by applying an electrical signal corresponding to the brightness (luminescence intensity) information to the data line while the scan line is selected (voltage is applied to the gate electrode of Tr1). At this time, the amount of current applied to the light-emitting element due to the brightness information written to each pixel (voltage applied to the light-emitting element) is retained in each pixel even after the scan line is deselected (voltage is no longer applied to the gate electrode of Tr1), so that the light-emitting element of each pixel can emit light while maintaining brightness (luminescence intensity) according to the retained brightness information.

[0128] Furthermore, in this embodiment, the display device has control means for forcibly turning off each pixel (light-emitting element) connected to the same scan line, at least on a scan line basis, so that each light-emitting element changes from an emitting state to a non-emitting state during one scan cycle in which brightness (luminescence intensity) information is written to each pixel (light-emitting element) and then new brightness (luminescence intensity) information is written to it.

[0129] Specifically, the application of voltage from the drain electrode of Tr1 to the gate electrode of Tr2 (scan pulse for data writing) is performed by a first pulse (write pulse) for the start of light emission (on), and a second pulse (erase pulse) for the start of non-light emission (erase).

[0130] (2) Pixel structure of the light-emitting element including the driving transistor As shown in the equivalent circuit of Figure 5, in each pixel (RGB) of the display device of the present invention, a green LED (G), a blue LED (B), and a red LED (R) are connected in series.

[0131] By controlling the transistors (Tra, Trb, Trc) connected in parallel to each LED, specifically the transistor connected in parallel to the LED that you want to light up, to an open (non-conductive) state (OFF: no voltage applied to the gate electrode), and the transistors connected in parallel to the other LEDs to a closed (conductive) state (ON: voltage applied to the gate electrode), a voltage is applied to the light-emitting layer of the LED you want to light up through at least one tunnel junction, supplying current, and only the light-emitting layer to which current is supplied will light up.

[0132] Each transistor (Tra, Trb, Trc) is normally in an open state. By applying a voltage to the gate electrode of each transistor, each transistor can be individually and independently closed, enabling the time-division display described later. The gate electrodes of each transistor (Tra, Trb, Trc) are connected to and controlled by CNTA, CNTB, and CNTC (see Figure 4), which are included in the four common lines.

[0133] The brightness (luminescence intensity) of a light-emitting element can be changed by controlling the current applied to each light-emitting layer. The current applied to the light-emitting layer is controlled by the voltage input from the data line (DAT) to Tr1, which controls Tr2, the element that controls the light emission of the light-emitting element. This control is achieved by controlling the voltage applied to the gate electrode of Tr2. The operation of Tr1 is controlled by the scan line (SCN).

[0134] (3) Time-division screen display According to this embodiment, as described above, by causing each light-emitting LED (light-emitting layer) constituting one pixel (RGB) to emit light in a time-division manner, it is possible to emit and display the desired color.

[0135] Specifically, as shown in Figure 1, the time required to display one image on the display device is defined as 1 Field, and this is divided into three time periods (Sub-Fields) in which each of the RGB elements emits light. In each Sub-Field, one of each RGB color is emitted. By controlling the emission intensity of each RGB element in each Sub-Field and displaying it in 1 Field, each light-emitting element can emit and display the desired color as a single pixel. By making 1 Field shorter than the shortest emission time at which the colors of light can be distinguished and visually perceived, the colors emitted in each Sub-Field are not individually recognized, but are recognized as a single color emission in 1 Field. Furthermore, the color recognized as the color of 1 Field can be appropriately changed by controlling the brightness of the emission in each Sub-Field, or by changing the time difference between each Sub-Field.

[0136] Then, by controlling the transistors connected in parallel to each LED (Tra, Trb, Trc) to open (non-conductive) the transistor connected in parallel to the LED that you want to light up, and closing (conductive) the transistors connected in parallel to the other LEDs (see Figure 5), a voltage is applied to the light-emitting layer of the LED you want to light up through at least one tunnel junction, supplying current and causing only the light-emitting layer to which current is supplied to light to emit light.

[0137] As described above, each transistor (Tra, Trb, Trc) is normally in an open state. By applying a voltage to the gate electrode of each transistor, each transistor can be individually and independently closed, enabling time-division multiplexing for screen display. The gate electrode of each transistor is connected to a control line (CNTA, CNTB, CNTC), and the desired LED to be illuminated can be selected by controlling the voltage applied to the gate electrode of each transistor via each control line (CNTA, CNTB, CNTC) (by the combination of transistors to which the voltage is applied).

[0138] Specifically, in the microLED display of this embodiment, as shown in Figure 5, one field (the time required to display one image) of a pixel line consisting of pixels arranged in a single row, each connected to the same data line (DATn) and controlled by different scan lines (SCN1 to SCNn), is time-divided into three sub-fields, and the light-emitting and non-light-emitting periods are controlled according to the timing chart shown in Figure 1.

[0139] By sequentially applying voltage to the gate electrode of Tr1 constituting each pixel via SCN1 to SCNn, Tr1 is closed for 1 field (e.g., 1 / 60 second).

[0140] Synchronized with the start of 1Field, CNTA, CNTB, and CNTC apply predetermined voltages (CNT voltages) to the gate electrodes of Tra, Trb, and Trc, respectively, thereby dividing 1Field into three Sub-Fields (for example, a first Sub-Field that emits a red LED, a second Sub-Field that emits a blue LED, and a third Sub-Field that emits a green LED). The combination of CNT voltages allows selection of which LED to emit light. Each CNT voltage combination can be controlled individually for each pixel (each light-emitting element).

[0141] Specifically, in the first sub-field, voltage is applied to the gate electrodes of Tra and Trb at CNTA and CNTB, but not to the gate electrode of Trc. This allows current to be supplied to the red LED via Tra and Trb, making it possible to emit only red light.

[0142] Subsequently, in the second sub-field, voltage is applied to the gate electrodes of Tra and Trc in CNTA and CNTC, but not to the gate electrode of Trb. This causes current to be supplied to the blue LED via Tra while flowing out via Trc, making it possible to emit only blue light.

[0143] In the third sub-field, voltage is applied to the gate electrodes of Trb and Trc in CNTB and CNTC, but not to the gate electrode of Tra. This allows current to be supplied to the green LED while simultaneously flowing out through Trb and Trc, causing it to emit green light.

[0144] A write pulse (voltage application to initiate light emission) is sequentially input via the data line (DATn) from SCN1 to the source electrode of Tr1 of each pixel that is closed by SCNn. Then, a write pulse (voltage application to initiate light emission) is input from the drain electrode of Tr1 to the gate electrode of Tr2, causing Tr2 to open, applying voltage to the light-emitting element, and causing the red LED to start emitting light.

[0145] Next, an erase pulse is sequentially input via the data line (DATn) from SCN1 to the source electrode of Tr1 of each pixel that is in the open state by SCNn, and an erase pulse is input from the drain electrode of Tr1 to the gate electrode of Tr2, causing Tr2 to open, and the voltage application to each light-emitting element controlled from SCN1 to SCNn is sequentially terminated, causing the red LEDs to turn off sequentially. In other words, the light emission period ends and the non-light emission period begins. The end of the light emission period of SCNn is then synchronized with the end of the first sub-field.

[0146] Simultaneously with the end of the first sub-field, the second sub-field begins, similarly causing the blue LED to light up and turn off.

[0147] Furthermore, the third sub-field starts simultaneously with the end of the second sub-field, similarly causing the green LED to light up and turn off.

[0148] Once one field is completed (the illumination and extinguishing of each LED in each sub-field has finished), the next field begins, and the process is carried out in the same manner.

[0149] Figure 6 shows a timing chart for displaying "Up" in red on a 5x5 (5 rows x 5 columns) array of pixels in the micro-LED (display device) of this embodiment. As shown in Figure 6, five pixels are connected to each of SCN1 to SCN5, and each row is arranged in one row (5 rows in total). In addition, five pixels located in the same column of each of SCN1 to SCN5 are arranged in one column (5 columns in total).

[0150] Within the red (R) Sub-Field, write pulses are sequentially input from SCN1 to SCN5. When SCN1, SCN3, and SCN4 input write pulses, only DAT3 receives an emission pulse, so in the first, third, and fourth rows, only the pixels in the third column will emit light. On the other hand, when SCN2 inputs a write pulse, DAT3 and DAT4 receive emission pulses, so in the second row, the pixels in the third and fourth columns will emit light. Furthermore, when SCN5 inputs an emission pulse, all DAT1 through DAT5 receive emission pulses, so in the fifth row, all pixels from the first to the fifth column will emit light. Here, compared to the others, DAT5 has a smaller emission pulse amplitude (lower voltage applied to the gate electrode of Tr2), so the brightness of the pixels in the fifth column (hatched area) is lower. In other words, the gradation can be controlled by controlling the amplitude of the emission pulse for each light-emitting element.

[0151] (4) Planar layout of 1 pixel Figure 7(a) is a top view of the layout of one pixel (including the drive transistor) of this embodiment. Figure 7(b) is a side view of the light-emitting element (including the drive transistor) of this embodiment, viewed from the opposite side of the side where the electrodes are installed due to the stepped structure. In Figures 7(a) and 7(b), the side from which light is extracted is considered the bottom. In Figure 7(b), the transparent stepped structure is indicated by a solid line.

[0152] The scan line (SCN) is positioned horizontally above, the data line (DAT) is positioned vertically to the left, and the ground (GND) line is positioned vertically to the right. Tr1 is located to the left of the scan line, with its gate electrode connected to the scan line (SCN) and its source electrode connected to the data line (DAT). The drain electrode of Tr1 is connected to the gate electrode of Tr2 and the retaining capacitor C, while the source electrode of Tr2 and the other electrode of the retaining capacitor C are connected to the ground (GND) line.

[0153] Below, rectangular, stacked light-emitting elements are arranged. The upper part of the light-emitting elements has a stepped structure. As shown in Figure 7(b), the light-emitting elements are stacked in the order of red LED (R), blue LED (B), and green LED (G) from the bottom of the paper (light extraction side). In the stepped structure, the n layers of the red LED (R), blue LED (B), and green LED (G), as well as the p layer of the green LED (G), are exposed facing upwards on the paper, and the fourth electrode, third electrode, second electrode, and first electrode are formed thereon, respectively. The p layer of the green LED (G) is connected to the VDD line (wiring connected to VDD). Note that in Figure 7(b), stacked portions in which any of the adjacent p-GaN layers, p+-GaN layers, n+-GaN layers, and n-GaN layers are stacked adjacently or continuously are depicted as a single layer without drawing a boundary line. Furthermore, the light-emitting layers of the red LED (R), blue LED (B), and green LED (G) are each labeled with the codes R, B, and G, respectively.

[0154] As described above, the fourth electrode is connected to the drain electrode of Tr2 and the source electrode of Trc. The third electrode is connected to the drain electrode of Trc and the source electrode of Trb. The second electrode is connected to the drain electrode of Trb and the source electrode of Tra, and the first electrode is connected to the drain electrode of Tra and the VDD line. The gate electrodes of Tra, Trb, and Trc are connected to CNTA, CNTB, and CNTC, respectively.

[0155] The light-emitting element section has a vertical stepped structure in which three light-emitting LEDs are stacked vertically. An insulator is filled in the space above the light-emitting element, flattening the upper surface, and a reflector is formed on the flattened upper surface. Conductors extend upward from each of the electrodes formed on the n-layer of the red LED (fourth electrode), the n-layer of the blue LED (third electrode), the n-layer of the green LED (second electrode), the n-layer stacked on the p-layer of the green LED (first electrode), and the power supply electrode, exposing themselves upward from the reflector on the flattened upper surface of the insulator, forming connection terminals.

[0156] The multilayer wiring structure consists of an insulator and a Si semiconductor (p-type) laminated on the upper surface of the insulator. Transistors Tra, Trb, and Trc are formed at the interface between the insulator and the Si semiconductor. A conductor connected to the drain electrode of Tra extends downward through the insulator and connects to a connection terminal connected to the first electrode of the light-emitting element. A conductor connected to the source electrode of Tra and the drain electrode of Trb (drain / source electrode) extends downward through the insulator and connects to a connection terminal connected to the second electrode of the light-emitting element. A conductor connected to the source electrode of Trb and the drain electrode of Trc (drain / source electrode) extends downward through the insulator and connects to a connection terminal connected to the third electrode of the light-emitting element. A conductor connected to the source electrode of Trc extends downward through the insulator and connects to a connection terminal connected to the fourth electrode of the light-emitting element. In addition, a conductor connected to the connection terminal connected to the power supply electrode of the light-emitting element extends through the insulator of the multilayer wiring structure and connects to the VDD power supply. The conductors connected to the gate electrodes of Tra, Trb, and Trc extend through the conductor and connect to CNTA, CNTB, and CNTC, respectively.

[0157] (Embodiment 2) This embodiment provides a display device that achieves even higher resolution while using the same parallel drive method as conventional devices, by devising a multilayer wiring structure.

[0158] While investigating various methods to reduce the size of light-emitting elements and increase the density of pixels, the inventors discovered a multilayer wiring structure that can achieve the objective in addition to the "time-division drive" method described above.

[0159] Specifically, the structure shown below allows for a reduction in the number of electrodes while using the same parallel drive method as conventional designs. In particular, for light-emitting elements located on the light-emitting surface (the side opposite the drive circuit board), the light-emitting layer can be placed across almost the entire pixel surface, maximizing the area of ​​the light-emitting layer and making it suitable for pixel miniaturization.

[0160] 1. Display element configuration (1) Overall structure Figure 9 shows a schematic cross-sectional view of one pixel of the display element 230 in this embodiment, and Figure 10 shows a schematic plan view of one pixel of the display element 230 according to this embodiment. Figure 10(a) is a schematic plan view of the micro-light-emitting element as seen from the bottom side of Figure 9, and Figure 9 is a cross-sectional view of the portion of Figure 10(a) indicated by the dashed line BB. Figures 10(a) and 10(b) schematically show the plane with and without the sub-pixel element separator 31. For example, Figure 10(a) is a schematic plan view including the red light-emitting layer 14R, and Figure 10(b) is a schematic plan view including the green light-emitting layer 14G.

[0161] As shown in Figures 9 and 10, the display element 230 is a full-color display element, and a micro-light-emitting element 130G (third micro-light-emitting element) that emits green light (third wavelength light), a micro-light-emitting element 130B (second micro-light-emitting element) that emits blue light (second wavelength light), and a micro-light-emitting element 130R (first micro-light-emitting element) that emits red light (first wavelength light) are stacked in this order from the drive circuit board 50 side, which corresponds to the "multilayer wiring structure incorporating a drive driver" in the above-described [Embodiment 1]. However, the stacking order is not limited to this.

[0162] In this configuration, the light emission direction is towards the top of Figure 9, i.e., the side opposite to the drive circuit board 50, and the upper surface of the compound semiconductor layer 16 is the light emission surface. Note that light distribution control means such as microlenses and optical elements such as black masks may be arranged on the upper surface of the compound semiconductor layer 16.

[0163] (2) Composition of each part (a) Drive circuit board The drive circuit board 50 is equipped with a micro light-emitting element driving circuit that controls the current supplied to each of the first to third micro light-emitting elements 130R, 130G, and 130B. Furthermore, a row selection circuit for selecting each row of the first to third micro light-emitting elements 130R, 130G, and 130B arranged in a two-dimensional matrix, a column signal output circuit for outputting light-emitting signals to each column, an image processing circuit for calculating light-emitting signals based on input signals, and input / output circuits may also be arranged on the board.

[0164] The drive circuit board 50 is generally a silicon substrate (semiconductor substrate) on which an LSI (Large Scale Integration) is formed, and since it can be manufactured using known technology, its function and configuration are not described in detail in this specification. Furthermore, any connection method is acceptable for the drive circuit board 50 and the first to third micro-light-emitting elements 130R, 130G, and 130B, including hybrid connection, bump connection, and anisotropic conducting film (ACF) connection.

[0165] (b) Microlight-emitting device The anode electrodes 23R, 23G, and 23B of the first to third micro-light-emitting elements 130R, 130G, and 130B are connected in a one-to-one relationship to the anode drive electrodes 52R, 52G, and 52B on the drive circuit board 50, respectively. The common cathode electrode 24C is connected to the cathode drive electrode 51 on the drive circuit board 50. The lower surfaces of the first to third micro-light-emitting elements 130R, 130G, and 130B and the upper surface of the drive circuit board 50 are covered by protective films 20 (micro-light-emitting element side) and 21 (drive circuit board side), except for the electrode connection parts.

[0166] The compound semiconductor layer 16 includes a red light-emitting layer 14R (first light-emitting layer), its p layer 15R (first p layer) and n layer 13R (first n layer), a blue light-emitting layer 14B (second light-emitting layer), its p layer 15B (second p layer) and n layer 13B (second n layer), and a green light-emitting layer 14G (third light-emitting layer), its p layer 15G (third p layer) and n layer 13G (third n layer).

[0167] With respect to the first micro-light-emitting element 130R, which is positioned closest to the light-emitting surface, the stacked structure is reversed between [Embodiment 1] and this embodiment. That is, in [Embodiment 1], the layers are stacked in the order of red light-emitting layer n layer 13R / red light-emitting layer 14R / red light-emitting layer p layer 15R / blue light-emitting layer n layer 13B from the light-emitting surface side, whereas in this embodiment, the layers are stacked in the order of red light-emitting layer n layer 13R / red light-emitting layer p layer 15R / red light-emitting layer 14R / blue light-emitting layer n layer 13B from the light-emitting surface side, and the stacking order of red light-emitting layer p layer 15R and red light-emitting layer 14R is reversed compared to [Embodiment 1]. Furthermore, a tunnel junction is formed between red light-emitting layer n layer 13R and red light-emitting layer p layer 15R. In other words, the arrangement of the anode and cathode of the micro-light-emitting element 130R is reversed between [Embodiment 1] and this embodiment.

[0168] As a result, the n-layer 13B of the blue light-emitting layer becomes a common cathode for the first micro-light-emitting element 130R and the second micro-light-emitting element 130B, and can be arranged seamlessly across the entire pixel surface except for the pixel element isolation 30 described later. Similarly, the light-emitting layer of the first micro-light-emitting element 130R can also be arranged seamlessly across almost the entire pixel surface. Furthermore, by sharing the cathodes of the first micro-light-emitting element 130R and the second micro-light-emitting element 130B, the number of contact holes can be reduced by one.

[0169] The laminated structure from the second n layer 13B to the third p layer 15G is the same in both [Embodiment 1] and this embodiment, and the formation of a tunnel junction between the second p layer 15B and the third n layer 13G is the same as in [Embodiment 1].

[0170] (i) Light-emitting layer The red light-emitting layer 14R is, for example, a GaN layer doped with the rare earth element europium (Eu), similar to [Embodiment 1]. The europium doped into the GaN layer emits red light with a sharp wavelength distribution through ff transitions.

[0171] The blue light-emitting layer 14B and the green light-emitting layer 14G may be, for example, a multiple quantum well layer consisting of an InGaN well layer and a GaN barrier layer. In this case, the first p layer 15R, the second p layer 15B, the third p layer 15G, and the first n layer 13R, the second n layer 13B, and the third n layer 13G are made of nitride semiconductors.

[0172] The light-emitting layer of a micro-light-emitting device, positioned closest to the light-emitting surface, may be a compound semiconductor layer containing other rare earth elements (Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu) that have very similar chemical properties to each other. For example, Tb emits green light, and Tm emits blue or near-infrared light.

[0173] (b) Cathode and anode The first n-layer 13B, which is the cathode of the first micro-light-emitting element 130R, is connected to the common cathode electrode 24C via the contact hole 41R-C and the contact wiring 27C. The first p-layer 15R, which is the anode, is conductive to the first n-layer 13R via a tunnel junction, and the first n-layer 13R is connected to the anode electrode 23R of the first micro-light-emitting element via the contact hole 42R-A and the contact wiring 27R. The common cathode electrode 24C is connected to the cathode drive electrode 51 on the drive circuit board 50, and the anode electrode 23R of the first micro-light-emitting element is connected to the anode drive electrode 52R of the first micro-light-emitting element. By controlling the current flowing from the anode drive electrode 52R of the first micro-light-emitting element to the cathode drive electrode 51, the amount of red light emitted by the first micro-light-emitting element 130R can be controlled.

[0174] (h) Light-emitting part The horizontal outer periphery of the first micro-light-emitting element 130R is defined by the pixel element separator 30. The pixel element separator 30 is located in the white area shown in Figure 10(a), and the area enclosed by the pixel element separator 30 becomes the light-emitting part of the first micro-light-emitting element 130R, extending seamlessly across the entire pixel except for the pixel element separator 30. The pixel element separator 30 separates the region that becomes the anode of the first micro-light-emitting element 130R from the other parts.

[0175] The second p-layer 15B, which is the anode of the second micro-light-emitting element 130B, is electrically connected to the third n-layer 13G via a tunnel junction, and the third n-layer 13G is connected to the anode electrode 23B of the second micro-light-emitting element via a contact hole 40B-A and contact wiring 27B. The anode electrode 23B of the second micro-light-emitting element is connected to the anode drive electrode 52B of the second micro-light-emitting element. By controlling the current flowing from the anode drive electrode 52B to the cathode drive electrode 51 of the second micro-light-emitting element, the amount of blue light emitted by the second micro-light-emitting element 130B can be controlled.

[0176] The horizontal outer periphery of the second micro-light-emitting element 130B is defined by a pixel element separator 30 and a sub-pixel element separator 31. The sub-pixel element separator 31 is located in the white area shown in Figure 10(b), and the area enclosed by the pixel element separator 30 and the sub-pixel element separator 31 (the upper half of Figure 10(b)) becomes the light-emitting part of the second micro-light-emitting element 130B. Its area is approximately half that of one pixel and overlaps with the first micro-light-emitting element 130R.

[0177] The third n-layer 13G in the lower half of Figure 10(b), surrounded by the pixel element separator 30 and the sub-pixel element separator 31, becomes the cathode of the third micro-light-emitting element 130G and is connected to the common cathode electrode 24C via the contact hole 40G-C and the contact wiring 27C. The sub-pixel element separator 31 separates the region that will become the anode of the second micro-light-emitting element 130B from the other parts.

[0178] The third p-layer 15G, which is the anode of the third micro-light-emitting element 130G, is connected to the anode electrode 23G of the third micro-light-emitting element via a metal electrode 25G and contact wiring 27G. The anode electrode 23G of the third micro-light-emitting element is connected to the anode drive electrode 52G of the third micro-light-emitting element. By controlling the current flowing from the anode drive electrode 52G to the cathode drive electrode 51 of the third micro-light-emitting element, the amount of green light emitted by the third micro-light-emitting element 130G can be controlled.

[0179] Since the light-emitting portion of the third micro-light-emitting element 130G is limited to the portion of the third n-layer 13G that can be used as a cathode, its area is about half the size of one pixel and overlaps with the first micro-light-emitting element 130R.

[0180] As described above, in this embodiment, when viewed from the direction of light emission or the stacking direction of the nitride semiconductor, the area of ​​the light-emitting layer of the first micro-light-emitting element 130R is larger than the area of ​​the light-emitting layers of the second micro-light-emitting element 130B and the third micro-light-emitting element 130G, and the light-emitting layer of the first micro-light-emitting element 130R is arranged to overlap with the light-emitting layers of the second micro-light-emitting element 130B and the third micro-light-emitting element 130G.

[0181] 2. Manufacturing process of display elements Figures 11 to 19 are flowcharts showing the manufacturing process of the display element 230, in which a nitride semiconductor layer is used as an example for the compound semiconductor layer 16.

[0182] In Figure 11, similar to [Embodiment 1], a buffer layer 11, an undoped layer 12, a first n layer 13R, a first p layer 15R, and a red light-emitting layer (first light-emitting layer) 14R are grown on the growth substrate 10. A tunnel junction is formed between the first n layer 13R and the first p layer 15R. Next, a second n layer 13B, a blue light-emitting layer (second light-emitting layer) 14B, and a second p layer 15B are grown. Furthermore, a tunnel junction is formed, and a third n layer 13G, a green light-emitting layer (third light-emitting layer) 14G, and a third p layer 15G are grown.

[0183] The thicknesses of the second n layer 13B and the third n layer 13G are approximately 50 nm to 2000 nm, the thicknesses of the second p layer 15B and the third p layer 15G are approximately 50 nm to 200 nm, and the thicknesses of the blue light-emitting layer (second light-emitting layer) 14B and the green light-emitting layer (third light-emitting layer) 14G are approximately 70 nm to 150 nm.

[0184] When depositing a light-emitting layer on a p-layer, if the light-emitting layer is a multiple quantum well composed of GaN / InGaN / GaN, the magnesium (Mg) doped into the p-layer can be mixed into the multiple quantum well layer, significantly reducing the luminous efficiency. However, if the light-emitting layer is a rare-earth element-doped GaN layer, the inclusion of magnesium does not reduce the luminous efficiency. Therefore, by using a rare-earth element-doped nitride semiconductor layer as the light-emitting layer of the micro-light-emitting device closest to the light-emitting surface, it is possible to reverse the arrangement of the cathode and anode electrodes and achieve a seamless light-emitting layer covering almost the entire pixel surface.

[0185] Next, as shown in Figure 12, two contact holes 40B-A and 40G-C are formed, extending from the surface to the third n-layer 13G. These two contact holes form part of the anode wiring of the second micro-light-emitting element 130B and part of the cathode wiring of the third micro-light-emitting element 130G, respectively. Then, a contact hole 41R-C is formed, extending from the surface to the second n-layer 13B. This contact hole 41R-C forms part of the cathode wiring of the second micro-light-emitting element 130B and the first micro-light-emitting element 130R. Finally, a contact hole 42R-A is formed, extending to the first n-layer 13R. This contact hole 42R-A forms part of the anode wiring of the first micro-light-emitting element 130R.

[0186] These contact holes may be formed by three different types of dry etching at varying depths, or by adding etching from shallower to deeper. For example, contact hole 41R-C may be etched simultaneously with contact holes 40B-A and 40G-C, and then additional etching may be performed to increase its depth. Similarly, contact hole 42R-A may be etched to the same depth as contact hole 41R-C, and then additional etching may be performed.

[0187] Next, as shown in Figure 13, a pixel element separator 30 and a sub-pixel element separator 31 are formed. The pixel element separator 30 is formed by etching away the layers from the first n layer 13R to the third p layer 15G, surrounding the outer periphery of the pixel. This electrically isolates the individual pixels.

[0188] The sub-pixel element separator 31 is etched to divide the area from the second light-emitting layer 14B to the third p-layer 15G so that the pixel is divided into two. The sub-pixel element separator 31 electrically isolates the second micro-light-emitting element 130B and the third micro-light-emitting element 130G. At this time, the second n-layer 13B may be etched to some extent, provided that the second n-layer 13B is not divided. In addition, etching for the sub-pixel element separator 31 may be performed first, followed by etching for the pixel element separator 30. Furthermore, the formation of the pixel element separator 30, the sub-pixel element separator 31, and the contact hole may be performed in reverse order.

[0189] Next, as shown in Figure 14, ohmic-connectable metal electrodes 25G and 25D are formed on the third p-layer 15G. The metal electrodes 25G and 25D contain a metal film (for example, nickel (Ni) or palladium (Pd)) on the third p-layer 15G side that is ohmic-connected to the third p-layer 15G. Metal electrode 25G is positioned in the region of the third micro-light-emitting element 130G and serves as the anode of the third micro-light-emitting element 130G. Metal electrode 25D is mainly positioned in the region of the second micro-light-emitting element 130B and functions as a reflector.

[0190] Next, as shown in Figure 15, a protective film 20A, which is an insulating film, is deposited. Then, the insulating film at the bottom is removed, leaving the insulating film on the side walls of the contact holes 40B-A, 40G-C, 41R-C, and 42R-A, exposing the first to third n layers 13R, 13B, and 13G. In addition, a contact hole 43G-A is opened on the metal electrode 26G. At this time, it is preferable that the pixel element separator 30 and the sub-pixel element separator 31 are embedded by the protective film 20A.

[0191] Furthermore, as shown in Figure 16, contact wirings 27R, 27B, 27G, and 27C are formed on the contact holes 40B-A, 40G-C, 41R-C, 42R-A, and 43G-A (see Figure 15). Contact wiring 27R may consist of a plug portion that fills the contact hole 42R-A and makes ohmic contact with the first n layer 13R at the bottom, and a wiring portion that extends to the surface of the compound semiconductor layer 16. Contact wiring 27B is similar. Contact wiring 27G is connected to the metal electrode 25G via the contact hole 43G-A. Contact wiring 27C may consist of a plug portion that fills the contact holes 40G-C and 41R-C and connects to the third n layer 13G and the second n layer 13B at the bottom, respectively, and one wiring that connects to these three plugs.

[0192] Next, as shown in Figure 17, a protective film 20B made of an insulating film, the anode electrode 23R of the first micro-light-emitting element 130R, the anode electrode 23B of the second micro-light-emitting element 130B, the anode electrode 23G of the third micro-light-emitting element 130G, and a common cathode electrode 24C for these elements are formed.

[0193] Next, as shown in Figure 18, by hybrid connection with the drive circuit board 50, the anode electrodes 23R, 23B, and 23G are connected to the first to third anode drive electrodes 52R, 52B, and 52G, and the common cathode electrode 24C is connected to the cathode drive electrode 51.

[0194] Next, as shown in Figure 19, the growth substrate 10 is peeled off, and the buffer layer 11 and the undoped layer 12 are removed by CMP polishing.

[0195] This configuration also provides a full-color display element suitable for miniaturization, and because the three types of light-emitting layers are formed as epitaxial layers, a complete monolithic structure can be realized. As a result, there is no need to bond the light-emitting layers together, the defect rate is low, and reliability can be improved.

[0196] In particular, a micro-display element using a nitride semiconductor layer doped with rare earth elements as the light-emitting layer can be placed as close as possible to the light-emitting surface, and the light-emitting layer containing rare earth elements can be placed across almost the entire pixel surface. Compared to a light-emitting layer made of GaN / InGaN / GaN multiple quantum wells, the light-emitting layer containing rare earth elements has relatively low luminous efficiency, resulting in an imbalance in the light intensity of the three RGB colors. However, this imbalance can be reduced by maximizing the area of ​​the light-emitting layer containing rare earth elements.

[0197] Furthermore, when all three RGB colors are realized using an emissive layer made of a nitride semiconductor layer containing rare earth elements, there is a high probability that differences in luminous efficiency exist among the three colors. However, by placing the emissive color with the lowest luminous efficiency closest to the light-emitting surface and maximizing the area of ​​the emissive layer, the imbalance in luminous intensity among the three RGB colors can be reduced.

[0198] As described above based on embodiments, the present invention can be made smaller by reducing the number of electrodes, thereby increasing the pixel density. Furthermore, by simplifying the connection circuits in the light-emitting elements and the display device, it is possible to further reduce the size of the light-emitting elements and increase the pixel density.

[0199] Therefore, the display device according to the present invention can be suitably used not only in various display devices, including mobile phones, as well as in backlights for liquid crystal displays and white lighting, but can also be fully applied as a microdisplay used in projectors and HUDs (Head-up Displays) for AR (Augmented Reality) / VR (Virtual Reality).

[0200] It should be noted that the present invention is not limited to the embodiments described above. Various modifications can be made to the embodiments described above within the same and equivalent scope as the present invention. [Explanation of Symbols]

[0201] 10 Growth substrate 11 Buffer Layer 12 Undoped Layer 13B The n-layer of the blue light-emitting layer (the second n-layer) 13G Green light-emitting layer n layer (third n layer) 13R Red light-emitting layer n layer (first n layer) 14B Blue light-emitting layer (second light-emitting layer) 14G Green light-emitting layer (third light-emitting layer) 14R Red light-emitting layer (first light-emitting layer) 15B The p-layer of the blue light-emitting layer (the second p-layer) 15G green light-emitting layer p layer (third p layer) 15R Red light-emitting layer p layer (first p layer) 16 Compound semiconductor layer 20, 20A protective film 20B, 21 Protective film 23B Anode electrode of the second micro-light-emitting element 23G Anode electrode of third micro-light-emitting element 23R Anode electrode of the first micro-light-emitting element 24C Common Cathode Electrode 25D, 25G, 26G metal electrode 27B, 27C Contact Wiring 27G, 27R contact wiring 30-pixel element separation 31 Subpixel element separation 40B-A, 40G-C Contact Holes 41R-A, 41R-C Contact Holes 42R-A, 42R-C Contact Holes 43G-A Contact Hole 50 Drive circuit board 51 Cathode drive electrode 52B Anode driving electrode of the second micro-light-emitting element 52G Anode drive electrode of third micro-light-emitting element 52R Anode drive electrode of the first micro-light-emitting element 130B Micro-light-emitting element that emits blue light (second micro-light-emitting element) 130G Green Light Emitting Micro-Emitting Device (Third Micro-Emitting Device) 130R Red light emitting micro-light-emitting element (first micro-light-emitting element) 230 Display elements

Claims

1. A display device comprising a substrate on which three types of light-emitting diodes, red, green, and blue, are stacked by epitaxial crystal growth to form light-emitting elements, arranged in a matrix, The three types of light-emitting diodes are each constructed by stacking an n-layer, a light-emitting layer, and a p-layer in that order from the substrate side. Of the three types of light-emitting diodes, at least the red diode has a gallium nitride-based (GaN-based) light-emitting layer that emits light through f-f transitions of rare earth elements. The stacking order of the red diode, green diode, and blue diode is either red diode, blue diode, green diode, or red diode, green diode, blue diode, from the substrate side. A display device characterized in that the interfaces between each stacked diode form a tunnel junction structure.

2. A display device comprising a multilayer wiring structure incorporating a drive driver, on which three types of light-emitting diodes—red, green, and blue—are stacked by epitaxial crystal growth, and these light-emitting elements are arranged in a matrix. The three types of light-emitting diodes mentioned above are each constructed by stacking an n-layer, a light-emitting layer, and a p-layer. Of the three types of light-emitting diodes, at least one has a gallium nitride-based (GaN-based) light-emitting layer that emits light through f-f transitions of rare earth elements. The light-emitting element has a light-emitting diode having a gallium nitride-based (GaN-based) light-emitting layer that emits light through the f-f transition of the rare earth element, positioned at the location furthest from the multilayer wiring structure incorporating the drive driver. The gallium nitride-based (GaN-based) light-emitting layer that emits light through the f-f transition of the rare earth element has a larger light-emitting area compared to the light-emitting layers of the other two light-emitting diodes. A display device characterized in that a plurality of tunnel junction structures are formed within the stacked light-emitting elements.

3. The display device according to claim 2, characterized in that the light-emitting element is a light-emitting element that extracts light from the surface opposite to the multilayer wiring structure incorporating the drive driver.

4. The display device according to claim 2 or 3, characterized in that the gallium nitride-based (GaN-based) light-emitting layer, which emits light due to the f-f transition of the rare earth element, emits red light.

5. The display device according to claim 2 or 3, characterized in that a stepped structure is formed in the three types of light-emitting diodes such that a part of the upper surface of the n layer protrudes beyond the end surface of the light-emitting layer.

6. The display device according to claim 5, characterized in that electrodes are provided on the upper surface of the n layer, which has a stepped structure formed so as to protrude beyond the end face of the light-emitting layer, and on the upper surface of the p layer of the light-emitting diode located in the uppermost layer.

7. The display device according to claim 6, characterized in that the p-layer of the light-emitting diode located closest to the multilayer wiring structure incorporating the drive driver comprises a p-GaN layer and a p+-GaN layer formed on top of the p-GaN layer.

8. The display device according to claim 6, characterized in that an n-layer is further laminated on the upper surface of the p-layer of the light-emitting diode located closest to the multilayer wiring structure incorporating the drive driver, and an electrode is provided on the upper surface of the n-layer.

9. The p-layer of the light-emitting diode located closest to the multilayer wiring structure incorporating the aforementioned drive driver comprises a p-GaN layer and a p+-GaN layer formed on top of the p-GaN layer. The display device according to claim 8, characterized in that the n layer comprises an n-GaN layer and an n+-GaN layer formed below the n-GaN layer.

10. The display device according to claim 6, characterized in that the recess formed by the stepped structure is filled with an insulator and the surface is flattened.

11. The display device according to claim 10, characterized in that the insulator is formed of any of a visible light-transmitting resin material, a visible light-impermeable resin material, or a visible light-reflecting resin material.

12. If the multilayer wiring structure incorporating the aforementioned drive driver is stacked in the order of blue diode, green diode, and red diode, then at the interface between the red diode and the green diode, and at the interface between the green diode and the blue diode, If the multilayer wiring structure incorporating the aforementioned drive driver is stacked in the order of green diode, blue diode, and red diode from the other side, then at the interface between the red diode and the blue diode, and at the interface between the blue diode and the green diode, The display device according to claim 2 or 3, characterized in that a DBR structure is formed in which AlInN and GaN are stacked, AlGaN and GaN are stacked, or AlGaInN and GaN are stacked.

13. The display device according to claim 2 or 3, characterized in that the n layer is a Si-containing GaN layer and the p layer is a Mg-containing GaN layer.

14. The n layer is composed of an n-GaN layer containing a predetermined concentration of Si and an n+-GaN layer containing a higher concentration of Si. The p layer is composed of a p-GaN layer containing a predetermined concentration of Mg and a p+-GaN layer containing a higher concentration of Mg. The display device according to claim 13, characterized in that the tunnel junction structure is formed between the n+-GaN layer and the p+-GaN layer.

15. A method for manufacturing a display device according to claim 2 or claim 3, A method for manufacturing a display device, characterized by forming the light-emitting layers of the three types of light-emitting diodes and the n-layer and p-layer that form the tunnel junction structure on a substrate in a series of steps using metal-organic vapor deposition.

16. A display element in which micro-luminescent elements are arranged in a two-dimensional array on a drive circuit board, The micro-light-emitting element includes a nitride semiconductor layer, The nitride semiconductor layer is stacked in the following order from the side opposite to the drive circuit substrate: a first n layer, a first p layer, a first light-emitting layer, a second n layer, a second light-emitting layer, a second p layer, a third n layer, a third light-emitting layer, and a third p layer. A tunnel junction is formed between the first n layer and the first p layer, and between the second p layer and the third n layer. The first light-emitting layer, the second light-emitting layer, and the third light-emitting layer each emit first light, second light, and third light of different wavelengths. The first light-emitting layer includes a nitride semiconductor layer doped with rare earth elements. A display element characterized in that the first light-emitting layer overlaps with the second light-emitting layer and the third light-emitting layer when viewed from the stacking direction of the nitride semiconductor layer.

17. The display element according to claim 16, characterized in that the second n layer is the cathode of the micro-light-emitting element.

18. The display element according to claim 16 or 17, characterized in that the first light is red light, the second light is blue light, and the third light is green light.

19. The display element according to claim 18, characterized in that the first light-emitting layer contains europium as a rare earth element.

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