Semiconductor equipment

Abstract

The objective is to provide a semiconductor device that can improve thermal reliability. [Solution] The semiconductor device of the embodiment has a first plate portion and a second plate portion spaced apart from the first plate portion. It also has an upper electrode having a first surface in contact with the first plate portion, a second surface facing the first surface in a first direction toward the second plate portion from the first plate portion, and a plurality of first electrode supports provided on the second surface side. Furthermore, it has a lower electrode having a third surface, a fourth surface in contact with the second plate portion and facing the third surface in the first direction, and a plurality of second electrode supports provided on the third surface side. The semiconductor device has a plurality of semiconductor chips located between the first electrode supports and the second electrode supports, each electrically connected to the first electrode supports and the second electrode supports, respectively. The semiconductor device also has at least one first recess provided on the first surface, and the width of the first recess in a second direction perpendicular to the first direction is greater than the width of the first electrode support.

Description

Technical Field

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[0005]

[0001] Embodiments of the present invention relate to semiconductor devices.

Background Art

[0002] There is a pressure-contact type semiconductor device having a structure in which a plurality of semiconductor elements are sandwiched between upper and lower electrode blocks. By applying an external pressing force to the upper and lower electrode blocks, internal electrical contact is maintained.

[0003] Since such a semiconductor device operates under high voltage and large current, thermal expansion of the electrodes due to an increase in the junction temperature may reduce the reliability. Therefore, a semiconductor device with high reliability against heat is required.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0005] The problem to be solved by the present invention is to provide a semiconductor device capable of improving reliability against heat.

Means for Solving the Problems

[0006] To solve the above problems, the semiconductor device of the embodiment has a first plate portion and a second plate portion provided spaced apart from the first plate portion. It also has an upper electrode having a first surface in contact with the first plate portion, a second surface provided opposite to the first surface in a first direction toward the second plate portion from the first plate portion, and a plurality of first electrode supports provided on the second surface side. Furthermore, it has a lower electrode having a third surface, a fourth surface in contact with the second plate portion and opposite to the third surface in the first direction, and a plurality of second electrode supports provided on the third surface side. The semiconductor device has a plurality of semiconductor chips located between the first electrode supports and the second electrode supports, and electrically connected to the first electrode supports and the second electrode supports, respectively. The semiconductor device also has at least one first recess provided on the first surface, and the first recess is provided such that its width in a second direction perpendicular to the first direction is greater than the width of the first electrode support. [Brief explanation of the drawing]

[0007] [Figure 1] A cross-sectional view of the semiconductor device 100 according to the first embodiment. [Figure 2] A plan view of the semiconductor device 100 according to the first embodiment. [Figure 3] A cross-sectional view of a semiconductor device 200 according to a first modified example of the first embodiment. [Figure 4] A cross-sectional view of a semiconductor device 300 according to a second modified example of the first embodiment. [Figure 5] A cross-sectional view of a semiconductor device 400 according to a third modified example of the first embodiment. [Figure 6] A cross-sectional view of a semiconductor device 500 according to a fourth modified example of the first embodiment. [Figure 7] Cross-sectional view of semiconductor device 600 related to the comparative example. [Figure 8] A plan view of the semiconductor device 00 relating to the comparative example. [Figure 9] Top view of a semiconductor chip. [Modes for carrying out the invention]

[0008] Embodiments of the present invention will be described below with reference to the drawings. In this description, common parts will be denoted by common reference numerals throughout the drawings. Furthermore, the dimensional ratios in the drawings are not limited to those shown. Moreover, these embodiments do not limit the present invention.

[0009] In this specification, the upper direction in a drawing is described as "up" and the lower direction in a drawing as "down" to indicate the positional relationship of parts, etc. In this specification, the concepts of "up" and "down" do not necessarily indicate a relationship to the direction of gravity.

[0010] (First embodiment) A semiconductor device 100 according to the first embodiment will be described with reference to Figure 1. Figure 1 is a cross-sectional view of the semiconductor device 100 according to the first embodiment, and Figure 2 is a plan view of the semiconductor device 100 according to the first embodiment.

[0011] As shown in Figure 1, the semiconductor device 100 according to the first embodiment has a first upper electrode 20, a first lower electrode 30, and a plurality of semiconductor chips 41. Since the plurality of semiconductor chips 41 are joined by applying pressure from above and below between the first upper electrode 20 and the first lower electrode 30, the semiconductor device 100 is called a pressure-contact type semiconductor device. The semiconductor chips 41 are located between the first upper electrode 20 and the first lower electrode 30. Furthermore, the first upper electrode 20 and the first lower electrode 30 are sandwiched between a first cooling plate 10 (first plate portion) and a second cooling plate 50 (second plate portion). Here, the direction from the first cooling plate 10 toward the second cooling plate 50 is called the Z direction (first direction). The direction perpendicular to the Z direction is called the X direction (second direction), and the direction perpendicular to both the X and Z directions is called the Y direction. The first cooling plate 10 and the second cooling plate 50 are made up of a metallic material such as Cu (copper) or Al (aluminum).

[0012] The first upper electrode 20 has a first surface 22 that contacts the first cooling plate 10 in the Z direction, and a second surface 23 that faces the first surface 22 in the Z direction. On the second surface 23, a first electrode support 21 that is electrically connected to the top surface of the semiconductor chip 41 is provided. In FIG. 1, the first electrode support 21 is indicated by a dotted line. Also, the first lower electrode 30 has a fourth surface 33 that contacts the second cooling plate 50, and a third surface 32 that faces the fourth surface 33 in the direction opposite to the Z direction. On the third surface 32, a second electrode support 31 that is electrically connected to the bottom surface of the semiconductor chip 41 is provided. In FIG. 1, the second electrode support 31 is indicated by a dotted line.

[0013] The first upper electrode 20 and the first electrode support 21 are integrally formed and are electrodes containing a metal such as Cu. Also, the first lower electrode 30 and the second electrode support 31 are integrally formed and are electrodes containing a metal such as Cu. Further, a first heat compensation plate 40 is provided between the first electrode support 21 and the semiconductor chip 41, and a second heat compensation plate 42 is provided between the second electrode support 31 and the semiconductor chip 41. The second heat compensation plate 42 is provided to relieve the thermal stress received by the semiconductor chip 41 when the semiconductor chip 41 is press-fitted by the first upper electrode 20 and the first lower electrode 30. The second heat compensation plate 42 contains a conductive metal such as Mo (molybdenum), for example.

[0014] The semiconductor chip 41 is, for example, an IGBT (Insulated Gate Bipolar Transistor). The semiconductor chip 41 is not limited to an IGBT and may be a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or a diode. Also, the semiconductor chip 41 may be a device using SiC (silicon carbide) or the like other than Si (silicon).

[0015] FIG. 2 is a plan view of the semiconductor device 100 and shows an X-Y plan view of the A-A' cross section in FIG. 1. Also, the cross-sectional view in FIG. 1 shows an X-Z plan view of the B-B' cross section in FIG. 2.

[0016] According to FIG. 2, in the semiconductor device 100 according to the first embodiment, a plurality of electrode blocks 2 are arranged in the plane of the plate portion 1. The plate portion 1 indicates a virtual plane located between the first upper electrode 20 and the first lower electrode 30. The electrode block 2 is composed of a first electrode support column 21 and a second electrode support column 31, and has a semiconductor chip 41 sandwiched between a first heat compensation plate 40 and a second heat compensation plate 42 between these support columns. The plate portion 1 may have a disc shape.

[0017] Also, as shown in FIG. 1, the first upper electrode 20 has at least one or more first recesses 60 on the first surface 22. The first recess 60 is provided on the first surface 22 where the semiconductor chip 41 is located. In other words, in the Z direction, at least a part of the first recess 60 and the semiconductor chip 41 overlap.

[0018] Furthermore, the first recess 60 is provided on the semiconductor chip 41 arranged inside the outermost periphery among the plurality of semiconductor chips 41 arranged in the plane of the plate portion 1. That is, in the semiconductor device 100 according to the first embodiment, there is one or more first recesses 60 in the central region 3 indicated by a dotted line inside the outer peripheral region 4 indicated by a dashed-dotted line in FIG. 2. The reason will be described later. Note that the number of semiconductor chips 41 provided in the central region 3 is not limited by this embodiment. Also, the first recess 60 may be the same rectangle as the semiconductor chip 41 or may be circular. Here, the inner side refers to a portion or region close to the center of the plate portion 1.

[0019] Furthermore, the first recess 60 provided on the first surface 22 of the first upper electrode 20 has a recess bottom surface 61 and a recess side surface 62. The recess side surface 62 is continuous with the recess bottom surface 61. The recess side surface 62 is provided so as to be located between the first electrode support column 21 located directly below the first recess 60 and another first electrode support column 21a adjacent in the X direction. That is, the recess side surface 62 does not overlap with another first electrode support column 21a adjacent in the X direction in the Z direction. Note that another first electrode support column 21a is indicated by a dotted line in FIG. 1. Here, the first recess 60 may be formed by, for example, press working using a mold or etching by metal corrosion.

[0020] Furthermore, a resin support (not shown) and a PCB (Printed Circuit Board) having gate wiring for applying voltage to the gate electrode may be provided around the semiconductor chip 41, the first electrode support 21, and the second electrode support 31.

[0021] The semiconductor device 100 according to the first embodiment described in detail above becomes electrically conductive when pressurized from above and below, and performs its function as a semiconductor device.

[0022] Here, a semiconductor device 600, which is a comparative example of the semiconductor device 100 according to the first embodiment, will be described. Figure 7 shows a cross-sectional view of the semiconductor device 600 according to the comparative example, and Figure 8 shows a plan view of the semiconductor device 600 according to the comparative example. The cross-sectional view of the semiconductor device 600 shown in Figure 7 corresponds to the cross-sectional view of the semiconductor device 100 shown in Figure 1. The cross-sectional view of the semiconductor device 600 shown in Figure 8 corresponds to the cross-sectional view of the semiconductor device 100 shown in Figure 2. The semiconductor device 600 differs from the semiconductor device 100 in that it does not have the first recess 60. The semiconductor device 600 has a less reliable structure than the semiconductor device 100.

[0023] In both the semiconductor device 100 according to the first embodiment and the semiconductor device 600 according to the comparative example, the junction temperature between the semiconductor chip 41 and the first upper electrode 20 (or first lower electrode 30) rises to about 150°C when energized or subjected to environmental load testing. In particular, the semiconductor chip 41 located in the central region 3 tends to become hotter than the semiconductor chip 41 located in the outer peripheral region 4. This is because heat dissipation is difficult and the wiring density tends to be high. Therefore, it is desirable that the first recess 60 provided on a part of the surface of the first upper electrode 20 be located near the central region 3 of the semiconductor device (inside the outer peripheral region 4).

[0024] Due to these characteristics, a decrease in connection reliability is caused by different phenomena in the outer region 4 and the central region 3, respectively.

[0025] Here, we will explain in detail the phenomenon of reduced reliability of the semiconductor device 600. In the semiconductor device 600, the first upper electrode 20 and the first lower electrode 30 expand thermally in the direction of the arrows shown in Figure 7. Thermal expansion is more pronounced in the central region 3, which tends to become hotter, while a decrease in contact pressure occurs in the outer peripheral region 4. In contact-type semiconductor devices, uniform pressure from a flat surface is important for maintaining stable electrical resistance. Therefore, when the contact pressure in the outer peripheral region 4 decreases, the contact state between the semiconductor chip 41 and the electrodes becomes unstable, raising concerns about increased contact electrical resistance. In areas with high contact electrical resistance, localized current concentration is likely to occur, resulting in melt marks due to point melting. Furthermore, if alloying of Al and Si (silicon) progresses, the resistance decreases, leading to greater current concentration and a decrease in reliability due to the expansion of melt marks. Thus, a decrease in reliability occurs in the outer peripheral region 4 of the semiconductor device 600 due to reduced contact pressure.

[0026] Furthermore, when the semiconductor chip 41 located in the central region 3 is pushed up due to thermal expansion of the first upper electrode 20 or the first lower electrode 30, it is subjected to mechanical stress, causing Al sliding. Al sliding is a phenomenon in which Al wiring moves.

[0027] Figure 9 shows an XY top view of the semiconductor chip 41. As shown in Figure 9, the gate electrode 92 and emitter electrode 91 are located on the same XY plane, and a collector electrode (not shown) is provided on the back surface of the semiconductor chip 41. Gate wiring (not shown) is arranged between multiple emitter electrodes 91, electrically spaced apart, and connected to the gate electrode 92. In addition, a surface protective film 90 is provided on the parts of the semiconductor chip 41 where no electrodes are provided. The surface protective film 90 is made of, for example, resin. Due to the Al sliding phenomenon described above, when the emitter electrode 91 slides, it causes a short circuit with the spaced-apart gate wiring (not shown).

[0028] Furthermore, if the mechanical stress due to thermal expansion of the first upper electrode 20 or the first lower electrode 30 is large, there is a problem that the Al slide itself may cause cracks in the surface protective film 90. If water or impurities present in the air around the semiconductor device 600 penetrate through cracks in the surface protective film 90, it may corrode the Al wiring and cause disconnection failures.

[0029] As detailed above, the semiconductor device 600 is a concern due to reliability degradation caused by electrolytic concentration and Al slide.

[0030] (Effects in the first embodiment) The effects of the semiconductor device 100 according to the first embodiment will be described.

[0031] In the semiconductor device 100, a first recess 60 is provided on a portion of the surface of the first upper electrode 20. Therefore, when thermal expansion occurs in the first upper electrode 20 or the first lower electrode 30, the first recess 60 can disperse the heat and pressure. For example, as shown in Figure 1, if the angle D formed by the joint between the side wall of the first electrode support 21 and the second surface 23, and the joint between the recess side surface 62 and the recess bottom surface 61 is 45° or less, heat and pressure can be dispersed well. In the semiconductor device 100, the angle D is 45° or less, and furthermore, the recess side surface 62 does not overlap with other adjacent first electrode support 21a in the X direction in the Z direction. Such a semiconductor device 100 has good heat dissipation characteristics and can apply pressure to the entire first electrode support. Note that the size of the first recess is not limited to this embodiment, and it is sufficient if it is provided within a range that does not affect the electrical characteristics when pressure is applied.

[0032] In this way, the semiconductor device 100 can prevent point melting due to uneven thermal expansion of the first upper electrode 20 or the first lower electrode 30, thereby suppressing the occurrence of short circuits due to Al sliding. In other words, the reliability of the semiconductor device 100 can be improved.

[0033] (First variation) Figure 3 is a cross-sectional view of a semiconductor device 200 according to a first modified example of the first embodiment.

[0034] The semiconductor device 200 has a first recess 60 provided on the first upper electrode 20 and a second recess 70 provided on the first lower electrode 30. The first recess 60 and the second recess 70 face each other in the Z direction. Furthermore, there may be two or more of each of the first recess 60 and the second recess 70.

[0035] Since the semiconductor chip 41 generates heat on both its front and back sides, the semiconductor device 200, which has recesses on both the front and back sides of the semiconductor chip 41, can more effectively mitigate the thermal expansion of the electrodes than the semiconductor device 100, which has the first recess 60 on only one side.

[0036] (Second variation) Figure 4 is a cross-sectional view of a semiconductor device 300 according to a second modified example of the first embodiment.

[0037] In the semiconductor device 300, the first recess 60 provided on the first upper electrode 20 and the second recess 70 provided on the first lower electrode 30 are each provided at arbitrary positions. Unlike the semiconductor device 200, the first recess 60 provided on the first upper electrode 20 and the second recess 70 provided on the lower electrode do not necessarily have to face each other in the Z direction.

[0038] Actual semiconductor devices are expected to have a mix of various chips, such as diodes and MOSFETs. In such cases, heat tends to build up on semiconductor chips with high current density. Therefore, by providing recesses on semiconductor chips with high current density, heat can be dissipated and thermal expansion of the electrodes can be effectively mitigated. In particular, in semiconductor devices that combine diodes and MOSFETs, the heat generated by the diodes is significant, so recesses may be provided above the diodes.

[0039] (Third variation) Figure 5 is a cross-sectional view of a semiconductor device 400 according to a third modified example of the first embodiment.

[0040] The semiconductor device 400 has a second lower electrode 30a provided below the first lower electrode 30, which has a second recess 70. The second recess 70 is provided inside the lower electrode 35, which is made up of the first lower electrode 30 and the second lower electrode 30a. Similarly, the effect of mitigating thermal expansion can be obtained. In addition, by using the second lower electrode 30a, the second recess 70 can be provided while maintaining the contact area with the second cooling plate 50, and high heat dissipation can be obtained. The second lower electrode 30a is made of the same material as the first lower electrode 30, for example, Cu.

[0041] (Fourth variation) Figure 6 is a cross-sectional view of a semiconductor device 500 according to a fourth modified example of the first embodiment.

[0042] In the semiconductor device 500, a second upper electrode 20a is provided on top of a first upper electrode 20 which has a first recess 60. This provides the first recess 60 inside the upper electrode 25. Furthermore, a second lower electrode 30a is provided below a first lower electrode 30 which has a second recess 70. This provides the second recess 70 inside the lower electrode 35. In this embodiment as well, the first recess 60 and the second recess 70 provide an effect of mitigating thermal expansion. In addition, since the contact area between the first cooling plate 10 and the upper electrode 25, and the contact area between the second cooling plate 50 and the lower electrode 35 can be maintained, higher heat dissipation performance can be obtained than in the semiconductor device 100.

[0043] While embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0044] 1 plate part 2 Electrode Blocks 3 Central area 4 Outer area 10 1st cooling plate 20 1st upper electrode 20a 2nd upper electrode 21, 21a 1st electrode post 22 Page 1 23 Side 2 25 Upper electrode 30 1st lower electrode 30a 2nd lower electrode 31 2nd electrode post 32 Page 3 33 Page 4 35 Lower electrode 40 1st heat compensation plate 41 Semiconductor chips 42 Second heat compensation plate 50 Second cooling plate 60 First recess 61 Recessed bottom surface 62 Recessed side 70 Second recess 90 Surface protective film 91 Emitter electrode 92 Greetings 100 Semiconductor Equipment 200 Semiconductor Equipment 300 semiconductor equipment 400 semiconductor devices 500 Semiconductor Equipment 600 Semiconductor Devices

Claims

1. The first plate section and, A second plate portion is provided spaced apart from the first plate portion, The first surface in contact with the first plate portion, In the first direction from the first plate portion toward the second plate portion, the second surface is provided opposite to the first surface, Multiple first electrode support columns provided on the second surface side, An upper electrode having, Page 3, A fourth surface that is in contact with the second plate portion and faces the third surface in the first direction, Multiple second electrode supports provided on the third surface side, A lower electrode having, A plurality of semiconductor chips are located between the first electrode support and the second electrode support, and are electrically connected to the first electrode support and the second electrode support, respectively. The first surface is provided with at least one first recess, the width of which in a second direction perpendicular to the first direction is greater than the width of the first electrode support column, Semiconductor device.

2. The semiconductor device according to claim 1, wherein the first recess is located between the semiconductor chip located inside the outermost semiconductor chip among the plurality of semiconductor chips arranged in the second direction and the first plate portion.

3. The first recess has a recess bottom surface and a recess side surface continuous with the recess bottom surface, The semiconductor device according to claim 1, wherein the side surface of the recess does not overlap in the first direction with the first electrode support directly below the first recess and with other first electrode support adjacent in the second direction.

4. The semiconductor device according to claim 1, wherein a second recess is further provided on the fourth surface.

5. The semiconductor device according to claim 1, wherein the fourth surface is further provided with a second recess, which is opposite to the first recess in the first direction.

6. The semiconductor device according to claim 4, wherein the multiple semiconductor chips are composed of IGBTs and diodes, and at least one of the first recess facing the diode in the direction opposite to the first direction and the second recess facing the diode in the first direction is provided.

7. The semiconductor device according to claim 4, wherein at least one of the first recess facing a semiconductor chip with a high current density in the direction opposite to the first direction and the second recess facing a semiconductor chip with a high current density in the first direction is provided.

8. The semiconductor device according to claim 4, wherein at least one of the following is provided: below the lower electrode or above the upper electrode.

9. The semiconductor device according to claim 1, further comprising: a first thermal compensation plate provided between the first electrode support and the semiconductor chip; and a second thermal compensation plate provided between the second electrode support and the semiconductor chip.

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