Protective control device, protective control system, and protective control method

Abstract

In a protective control device equipped with multiple protective control functions, information management is simplified, and the increase in processing load is suppressed. [Solution] The protection control device of the present invention is a protection control device that includes a communication unit that transmits and receives information with a group of devices arranged in a power system, and performs protection control processing using the information, and includes a calculation unit connected to the communication unit, capable of individually executing common processing and a plurality of protection control processing, sharing the result of common processing among at least two of the plurality of protection control processing, and capable of executing at least two of the protection control processing based on the result of common processing.

Description

Technical Field

[0001] The present invention relates to a protection control device, a protection control system, and a protection control method for equipment such as a substation.

Background Art

[0002] A digital substation protection control system compliant with the international standard IEC 61850 includes an intelligent electronic device (hereinafter referred to as "IED (Intelligent Electrical Device)") and a merging unit (hereinafter referred to as "MU (Merging Unit)"). FIG. 10 is a diagram showing the configuration of a general digital substation protection control system compliant with the international standard IEC 61850. As shown in FIG. 10, the protection control system 300 includes a plurality of IEDs (IED301 to IED304) and a plurality of MUs (MU311 to MU314), and the plurality of IEDs and the plurality of MUs are connected via a process bus 320 (communication network).

[0003] Each IED has a protection function, a control function, and a monitoring function (constant monitoring) of the system including itself, and is arranged at the bay level in units of protection functions or control functions. Note that the control target of each IED is a circuit breaker or a circuit unit connected thereto. Each IED receives information such as the device status of IEDs and MUs other than itself via the process bus 320, performs protection calculations or control calculations using this information, and performs operation controls such as interlocking and LED (Light Emitting Diode) display (display of abnormality presence or absence).

[0004] Each MU is arranged for each corresponding circuit and is arranged near field devices such as circuit breakers. Each MU transmits information such as current values obtained from a CT (Current Transformer) and voltage values obtained from a VT (Voltage Transformer) to the IED. In addition, each MU performs contact output to the circuit breaker based on a trip command or a control command received from the IED, and controls the opening and closing of the circuit breaker.

[0005] Furthermore, data (frames) are transmitted and received digitally between the IED and MU according to a communication protocol compliant with the international standard IEC 61850. Specifically, digital communication is performed using a protocol stack and format that conforms to the SV (Sampled Value) and GOOSE (Generic Object Oriented Substation Event) methods specified in the international standard IEC 61850. In GOOSE, data is transmitted and received bidirectionally between the IED and MU. Data communicated in SV includes, for example, analog information of current / voltage values ​​acquired by each MU, and information obtained by A / D conversion of that information. Data communicated in GOOSE includes, for example, trip commands from the IED to the MU, and digital and analog information from the MU to the IED.

[0006] Furthermore, various techniques for detecting grid faults have been proposed in the aforementioned digital substation protection and control systems (see, for example, Patent Document 1). Patent Document 1 discloses a technique for identifying the location of a grid fault based on information collected by the processing unit of a protection and control terminal via a process bus, which includes grid information detected by other protection and control terminals. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2023-89787 [Overview of the project] [Problems that the invention aims to solve]

[0008] Incidentally, in digital substation protection and control systems conforming to the international standard IEC 6185, information exchange between constituent devices must be done via communication. Furthermore, in digital substation protection and control systems that deploy a large number of IEDs in substations with high voltage classes or low-voltage substations with many target circuits, costs may increase as the number of devices increases. As a method to resolve these issues, one approach is to adopt a centralized protection and control system (hereinafter referred to as "CPC (Centralized Protection and Control)") that consolidates multiple IEDs. In a CPC, the protection and control functions of multiple IEDs are consolidated, enabling the aggregation and centralized management of information.

[0009] However, if prior art such as that disclosed in Patent Document 1 is applied within the CPC, continuous monitoring of the system will be performed at the IED unit level, that is, at the functional unit level of the protection control processing. In this case, since the same monitoring will be performed at multiple functional units of the protection control processing, there is a possibility that information management will become complicated and the processing load will increase.

[0010] The present invention was made to solve the above problems, and the object of the present invention is to provide a technology that simplifies information management and suppresses an increase in processing load in a protective control device having multiple protective control processing functions and a protective control system equipped therewith. [Means for solving the problem]

[0011] To solve the above problems, the protection control device of the present invention is a protection control device that includes a communication unit for sending and receiving information with a group of devices arranged in a power system, and performs protection control processing using the information. Furthermore, the protection control device of the present invention includes a calculation unit connected to the communication unit, capable of individually executing common processing and multiple protection control processing, sharing the results of the common processing among at least two of the multiple protection control processing, and executing at least two of the protection control processing based on the results of the common processing.

[0012] Furthermore, in order to solve the above problems, the protection control system of the present invention comprises a plurality of merging units, a protection control device, and a network capable of communication between the merging units and the protection control device. The protection control device has a communication unit that transmits and receives information with at least one of the plurality of merging units, and a calculation unit connected to the communication unit. The calculation unit is capable of individually executing common processing and a plurality of protection control processing, and the results of the common processing are shared among at least two of the plurality of protection control processing, and each of the at least two protection control processing can be executed based on the results of the common processing. In addition, the protection control device is capable of individually identifying margin units that communicate via the network, and when it detects the loss or delay of information transmitted from a margin unit, it detects the abnormal margin unit based on the identification information contained in the information.

[0013] Furthermore, in order to solve the above problems, the protection control method of the present invention is a protection control method executed by the protection control device of the present invention, and includes the calculation unit executing a common process and a plurality of protection control processes individually. In addition, the protection control method of the present invention includes the calculation unit sharing the result of the common process among at least two of the plurality of protection control processes, and executing each of the at least two protection control processes based on the result of the common process. [Effects of the Invention]

[0014] According to the present invention with the above configuration, in a protective control device having multiple protective control processing functions and a protective control system equipped therewith, information management becomes simpler and an increase in processing load can be suppressed. [Brief explanation of the drawing]

[0015] [Figure 1] This is a schematic diagram of a protective control system according to one embodiment of the present invention. [Figure 2] This figure shows the hardware configuration of a protective control device according to one embodiment of the present invention. [Figure 3]It is a functional block diagram of an arithmetic processing unit of a protection control device according to an embodiment of the present invention. [Figure 4] It is a timing chart of various processes performed by an arithmetic processing unit of a protection control device according to an embodiment of the present invention. [Figure 5] It is a flowchart showing the procedure of monitoring and protection control processing performed by the first core of a protection control device according to an embodiment of the present invention. [Figure 6] It is a flowchart showing the procedure of monitoring and protection control processing performed by the second core of a protection control device according to an embodiment of the present invention. [Figure 7] It is a flowchart showing the procedure of abnormal detection processing of an external device performed by the first core of a protection control device according to an embodiment of the present invention. [Figure 8] It is a functional block diagram of an arithmetic processing unit of a protection control device according to a comparative example. [Figure 9] It is a functional block diagram of a protection control device according to a comparative example. [Figure 10] It is a schematic configuration diagram of a conventional digital substation protection control system.

Embodiments for Carrying Out the Invention

[0016] Hereinafter, a protection control device, a protection control system including the same, and a protection control method according to an embodiment of the present invention will be specifically described with reference to the drawings.

[0017] [Configuration of Protection Control System] FIG. 1 is a schematic configuration diagram of the protection control system of the present embodiment. For convenience of explanation, FIG. 1 shows only the components related to monitoring and protection control. The protection control system 1 of the present embodiment is a digital substation protection control system to which the international standard IEC 6185 is applied, and performs protection and monitoring control of a substation.

[0018] As shown in FIG. 1, the protection control system 1 includes a CPC 10 and a plurality of MUs (MU31 to MU36). The CPC 10 and the plurality of MUs are connected via a process bus 20 (communication network). Digital communication using a protocol stack and format according to the SV and GOOSE schemes compliant with the international standard IEC 61850 is performed between the CPC 10 and the plurality of MUs to transmit and receive various data (frames). In this embodiment, an example in which the number of MUs to be protected and controlled by the protection control system 1 is six will be described, but this is just an example. For example, depending on the scale of the substation, etc., the number of MUs may be less than six or seven or more.

[0019] In the protection control system 1 of this embodiment, in the configuration of the conventional protection control system 300 shown in FIG. 10, a plurality of IEDs are replaced by the CPC 10. Therefore, in the conventional system shown in FIG. 10, IEDs are installed for each line (breaker), whereas in this embodiment, the CPC 10 equipped with functions equivalent to a plurality of IEDs is arranged for each of a plurality of lines. That is, the CPC 10 is a device that aggregates functional units of a plurality of protection processes and control processes conventionally performed by a plurality of IEDs, and performs various processes (calculations) related to protection control and monitoring control of the substation based on analog information and device information received from a plurality of MUs (MU31 to MU36). Further, in the protection control system 1 of this embodiment, since a plurality of IEDs are replaced by the CPC 10, the number of devices required for the configuration of the protection control system 1 can be reduced.

[0020] Each MU is arranged for each corresponding line, as in the conventional case, and is arranged in the vicinity of field devices such as breakers. Each MU transmits information such as a current value acquired from a CT and a voltage value acquired from a VT to the CPC 10 via the process bus 20. Further, each MU performs contact output to the corresponding breaker based on an operation command signal (for example, a trip command, a control command, etc.) received from the CPC 10 via the process bus 20 to control the opening and closing of the breaker.

[0021] [Configuration of Protection Control Device] Figure 2 is a hardware configuration diagram of the CPC10 in this embodiment. For the sake of explanation, only the components related to monitoring and protection control are shown in Figure 2.

[0022] As shown in Figure 2, the CPC10 comprises an arithmetic processing unit 11 (arithmetic unit), an interrupt generation unit 12, a shared memory 13 (storage unit), a network interface (I / F) unit 14 (communication unit), and an LED 15 (notification unit).

[0023] Within the CPC10, the arithmetic processing unit 11 is electrically connected to the interrupt generation unit 12, the shared memory 13, the network interface unit 14, and the LED 15, respectively. The network interface unit 14 is also connected to an external device 30 (a group of devices located in the power grid) which includes multiple MUs (MU31 to MU36) via a transmission path such as the process bus 20 (communication network).

[0024] The arithmetic processing unit 11 is composed of a multicore processor and includes a first core 51, a second core 52, a third core 53, and a timer unit 54.

[0025] The first core 51 executes protection control function processing in software. The first core 51 also executes monitoring function processing for the CPC 10 (its own device) and the external device 30 in software. The second core 52 executes protection control function processing in software.

[0026] The third core 53 is connected to the network interface unit 14 and the LED 15, and executes communication processing functions and LED 15 on / off control functions in software, in accordance with the international standard IEC 61850.

[0027] The timer unit 54 has three timers (not shown) provided for each core, and each timer is a timer that can be operated by software. Each timer in the timer unit 54 is connected to the corresponding core and can output an interrupt signal (hereinafter referred to as "timer interrupt signal") to the core after a predetermined set time has elapsed. In this embodiment, the first core 51 starts protection control processing based on the timer interrupt signal input from the corresponding timer, and the second core 52 starts protection control processing based on the timer interrupt signal from the corresponding timer.

[0028] Furthermore, the first core 51, the second core 52, and the third core 53 are all connected to the shared memory 13, and can exchange information (data) (write and retrieve) through the shared memory 13. In the following, the exchange of information (data) between cores via the shared memory 13 will be referred to as "memory transfer." The various processing functions of each core will be described in detail later with reference to the diagrams.

[0029] The interrupt generation unit 12 outputs an interrupt signal (hereinafter referred to as the "periodic interrupt signal") to the arithmetic processing unit 11 at regular intervals. Each core in the arithmetic processing unit 11 is activated based on the input of the periodic interrupt signal and starts executing various processes related to the protection control function. In other words, in this embodiment, the various processes related to the protection control function performed by the arithmetic processing unit 11 are repeatedly executed at regular intervals.

[0030] The shared memory 13 is composed of RAM (Random Access Memory) and is used as a workspace for each core in the arithmetic processing unit 11 when it performs various processes. The shared memory 13 stores various information (for example, monitoring information described later) exchanged (input / output) between the processing function units within each core, as well as various information (for example, flags, parameters, etc.) for controlling such exchanges. Therefore, in this embodiment, the first core 51, the second core 52, and the third core 53 can each perform processes independently, but their calculation results can be shared via the shared memory 13. For example, the calculation results and collected information from the first core 51 can be grasped by the processing operation of the second core 52.

[0031] The network interface unit 14 is composed of, for example, a NIC (Network Interface Card). The network interface unit 14 is an interface for connecting to an external device 30, which includes multiple MUs (MU31 to MU36), via the process bus 20, and for communicating with the external device 30 in accordance with the international standard IEC 61850.

[0032] LED15 is a functional unit that displays the operating status (presence or absence of abnormalities) of the CPC10. LED15 lights up or turns off in response to a control signal (on / off command) input from the third core 53 of the arithmetic processing unit 11.

[0033] [Functional Configuration of the Arithmetic Processing Unit] Figure 3 is a functional block diagram of the arithmetic processing unit 11. For the sake of explanation, only the components related to monitoring and protection control are shown in Figure 3. In this embodiment, as shown in Figure 1, the number of MUs to be protected and controlled by the protection control system 1 is set to 6. Therefore, in this embodiment, an example is described in which the CPC 10 (arithmetic processing unit 11) is equipped with six protection control processing function units corresponding to each MU (the first protection control processing unit 61 to the sixth protection control processing unit 66, described later).

[0034] As shown in Figure 3, the first core 51 functionally comprises a first protection control processing unit 61, a second protection control processing unit 62, a third protection control processing unit 63, and a common processing unit 71. The second core 52 functionally comprises a fourth protection control processing unit 64, a fifth protection control processing unit 65, a sixth protection control processing unit 66, and a pre-processing unit 72. The third core 53 functionally comprises an LED control processing unit 81 and a communication processing unit 82. The functions of each component are implemented by software.

[0035] The first protection control processing unit 61 within the first core 51 is a functional unit that protects and controls the system of MU31 (see Figure 1), and includes a relay processing unit 61a and a sequence processing unit 62b. The second protection control processing unit 62 is a functional unit that protects and controls the system of MU32, and includes a relay processing unit 62a and a sequence processing unit 62b. The third protection control processing unit 63 is a functional unit that protects and controls the system of MU33, and includes a relay processing unit 63a and a sequence processing unit 63b.

[0036] The fourth protection control processing unit 64 within the second core 52 is a functional unit that protects and controls the system of MU34 (see Figure 1), and includes a relay processing unit 64a and a sequence processing unit 64b. The fifth protection control processing unit 65 is a functional unit that protects and controls the system of MU35, and includes a relay processing unit 65a and a sequence processing unit 65b. The sixth protection control processing unit 66 is a functional unit that protects and controls the system of MU36, and includes a relay processing unit 66a and a sequence processing unit 66b.

[0037] In the relay processing unit and sequence processing unit of each protection control processing unit, the same processing is performed regardless of the type of protection control processing unit. Each relay processing unit refers to the voltage and current values ​​of each MU's system, which are collected by the common processing unit 71 via the communication processing unit 82 and stored in the shared memory 13, and performs various calculations to detect whether or not there is a system fault for the corresponding MU. For example, in the relay processing unit 61a of the first protection control processing unit 61, calculations such as comparison calculations with thresholds are performed on the voltage and current values ​​of the MU 31's system.

[0038] Furthermore, each sequence processing unit performs calculations according to sequence logic to realize protection control functions such as output control of tripping commands, based on the calculation results (detection results of whether or not there is a system fault) of the corresponding relay processing unit. Specifically, each sequence processing unit determines whether or not the output conditions for a tripping command are met based on the calculation results of the corresponding relay processing unit. Then, if the output conditions for a tripping command are met, each sequence processing unit outputs a tripping command to the corresponding MU to the process bus 20 via the communication processing unit 82 and the network interface unit 14. For example, the sequence processing unit 61b of the first protection control processing unit 61 controls the output of a tripping command to the circuit breaker of the MU 31 system based on the calculation results of the relay processing unit 61a.

[0039] The common processing unit 71 within the first core 51 includes a continuous monitoring unit 71a and a sequence processing unit 71b.

[0040] The continuous monitoring unit 71a monitors the health of the CPC 10 (its own device) and the external devices 30 (including MU31 to MU36). As described above, in this embodiment, the first core 51 is started based on the input of a periodic interrupt signal, so the monitoring process by the continuous monitoring unit 71a is also repeated at a fixed period.

[0041] The continuous monitoring unit 71a monitors whether hardware such as the shared memory 13 and network interface unit 14, as well as the software running on the CPC 10, are functioning correctly. If the continuous monitoring unit 71a detects an abnormality in the CPC 10 (its own device), it outputs (passes on) that information to the sequence processing unit 71b.

[0042] Furthermore, the continuous monitoring unit 71a monitors whether the external device 30 is operating properly based on frames (data) received from each device included in the external device 30 via the communication processing unit 82. If the continuous monitoring unit 71a detects an abnormality in the external device 30, it outputs that information to the sequence processing unit 71b.

[0043] In the protection control system 1 of this embodiment, as shown in Figures 1 and 2, the CPC 10 is connected via a process bus 20 to an external device 30 which includes a plurality of MUs (MU31 to MU36) that transmit various analog data necessary for relay calculations that realize the protection control function. Furthermore, various data from each MU or other device included in the external device 30 (hereinafter collectively referred to as "external device") are set into frames according to the SV and GOOSE methods and transmitted to the CPC 10 via the process bus 20. The frames transmitted from each external device contain information indicating the health of that external device, and the common processing unit 71 (continuous monitoring unit 71a) uses this information to detect abnormalities in the corresponding external device. In addition, the frames transmitted from each external device contain a predetermined (unique) identifier corresponding to each external device, and the common processing unit 71 (continuous monitoring unit 71a) uses the predetermined identifier to detect (identify) the external device where frame loss or delay is occurring.

[0044] The sequence processing unit 71b executes sequence logic in software to realize various processing functions performed by the common processing unit 71.

[0045] The sequence processing unit 71b outputs a command to light up the LED 15 to the LED control processing unit 81 of the third core 53 based on the status information (abnormality detection information) of the CPC 10 input from the continuous monitoring unit 71a. The sequence processing unit 71b also outputs a transmission command for abnormal state information (device abnormality) of the CPC 10 to the network interface unit 14 via the communication processing unit 82 of the third core 53. Furthermore, the sequence processing unit 71b stores the determination conditions for abnormality of the CPC 10 and the determination conditions for abnormality of the external device 30 in the shared memory 13. These abnormality determination conditions (hereinafter referred to as "device abnormality determination conditions") are read by the sequence processing unit of each protection control processing unit and used as the determination conditions for whether or not to execute the relay lock described later by each protection control processing unit.

[0046] The pre-processing unit 72 within the second core 52 is a processing function unit (preliminary processing function unit) that performs processing other than that performed by the first protection control processing unit 61 to the sixth protection control processing unit 66 and the common processing unit 71, and that is necessary to be performed before the execution of processing by each protection control processing unit. For example, the pre-processing unit 72 performs digital filtering on analog data received from the MU (for example, analog information of current values / voltage values ​​acquired by each MU).

[0047] The LED control processing unit 81 in the third core 53 is connected to the LED 15 and controls the on / off state of the LED 15 based on the control command (on / off command) for the LED 15 input from the common processing unit 71 in the first core 51.

[0048] The communication processing unit 82 within the third core 53 is connected to the network interface unit 14 and transmits and receives information (data) via the network interface unit 14 to external devices 30 (including multiple MUs) connected via the process bus 20. The communication processing unit 82 transmits information output from each protection control processing unit or common processing unit 71 to the external devices 30 (MUs) using the GOOSE method. The communication processing unit 82 also outputs analog information such as current / voltage values ​​received from the external devices 30 using the SV method, or analog information or bit information received using the GOOSE method, to each protection control processing unit and the common processing unit 71.

[0049] [Timing chart of processing performed by each processing function in the arithmetic processing unit] Figure 4 is a timing chart showing the processing performed by each processing function unit of the arithmetic processing unit 11 of the CPC 10.

[0050] In this embodiment, the first core 51 and the second core 52 included in the arithmetic processing unit 11 share and execute multiple protection control processes, common processes, and preprocessing processes, i.e., they are executed by core division, and each core executes its assigned processes by time sharing. Furthermore, in this embodiment, as described above, each time a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11, the first core 51 and the second core 52 are activated and the protection control process is started.

[0051] Specifically, when a periodic interrupt signal is input to the arithmetic processing unit 11, as shown in Figure 4, first, common processing is performed by the common processing unit 71 in the first core 51, and preprocessing is started by the preprocessing unit 72 in the second core 52. At the same time, the timers in the timer unit 54 (see Figure 2) corresponding to the first core 51 and the timers corresponding to the second core 52 begin their timing operations.

[0052] Subsequently, in the first core 51, after the common processing by the common processing unit 71 is completed and a timer interrupt signal is received from the corresponding timer in the timer unit 54, the first protection control processing is started by the first protection control processing unit 61. Meanwhile, in the second core 52, after the pre-processing by the pre-processing unit 72 is completed and a timer interrupt signal is received from the corresponding timer in the timer unit 54, the fourth protection control processing is started by the fourth protection control processing unit 64.

[0053] Note that in the example shown in Figure 4, for the sake of simplicity, the diagram illustrates a scenario in which the timer interrupt signal is input immediately after the completion of common processing and pre-processing, and the first protection control processing and the fourth protection control processing are initiated. However, in reality, the completion of common processing and pre-processing and the input of the timer interrupt signal are different. In such cases, each core performs a standby process during the period from the completion of common processing and pre-processing to the input of the timer interrupt signal.

[0054] Then, in the first core 51, after the completion of the first protection control process, the second protection control process by the second protection control processing unit 62 and the third protection control process by the third protection control processing unit 63 are performed consecutively in this order. In other words, in the first core 51, the common process, the first protection control process, the second protection control process, and the third protection control process are performed in this order, with time sharing.

[0055] On the other hand, in the second core 52, after the completion of the fourth protection control process, the fifth protection control process by the fifth protection control processing unit 65 and the sixth protection control process by the sixth protection control processing unit 66 are performed consecutively in this order. In other words, in the second core 52, the preprocessing, the fourth protection control process, the fifth protection control process, and the sixth protection control process are performed in this order with time sharing.

[0056] Subsequently, the processing functions of the first core 51 and the second core 52 remain in standby mode until the next periodic interrupt signal is received from the interrupt generation unit 12. In the example shown in Figure 4, for the sake of simplicity, the diagram illustrates a scenario in which the next periodic interrupt signal is received immediately after the completion of the third protection control process and the sixth protection control process. In reality, the completion times of the third and sixth protection control processes and the time of the periodic interrupt signal are different. In such cases, each core performs standby processing during the period from the completion of the third and sixth protection control processes until the next periodic interrupt signal is received.

[0057] [Various processing flows performed at CPC] Next, we will specifically explain the various processes performed within the CPC 10 when a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11.

[0058] (Monitoring and protection control processing performed on the first core) First, the monitoring and protection control processing performed in the first core 51 will be explained with reference to Figure 5. Figure 5 is a flowchart showing the procedure for the monitoring and protection control processing performed in the first core 51. Note that the processing shown in Figure 5 is executed in software by the CPU (not shown) of the arithmetic processing unit 11.

[0059] Furthermore, in the process shown in Figure 5, the common processing by the common processing unit 71, the first protection control processing by the first protection control processing unit 61, the second protection control processing by the second protection control processing unit 62, and the third protection control processing by the third protection control processing unit 63, as explained in Figure 4, are performed in this order. The process shown in Figure 5 is repeatedly executed (at a fixed period) each time a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11.

[0060] When a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11, the common processing unit 71 (continuous monitoring unit 71a) first performs monitoring (S1). In this process, the common processing unit 71 collects various status information of the CPC 10 (self-device) and external devices 30 (including multiple MUs 31-36) and monitors for the occurrence of abnormalities. The collected status information of the CPC 10 and external devices 30 is stored in the shared memory 13.

[0061] Furthermore, in the S1 process, the common processing unit 71 also performs abnormality detection processing for the external device 30. The specific details of this process will be described in detail later with reference to Figure 7. In addition, in the S1 process, the common processing unit 71 starts the timer corresponding to the first core 51 in the timer unit 54. This starts the timing of a predetermined time until the start of the first protection control process (output timing of the timer interrupt signal).

[0062] Next, the common processing unit 71 (sequence processing unit 71b) executes a specific sequence logic in software to determine whether the CPC 10 (protection control device) is healthy or not (S2). In this process, the common processing unit 71 determines whether the status information of the CPC 10 (its own device) collected in the S1 process satisfies the abnormality determination conditions for the CPC 10. If the status information of the CPC 10 collected in the S1 process satisfies the abnormality determination conditions for the CPC 10, the determination result in S2 is NO; if the abnormality determination conditions for the CPC 10 are not met, the determination result in S2 is YES.

[0063] In S2, if the common processing unit 71 determines that the CPC 10 (protection control device) is healthy (i.e., if S2 is a YES determination), the common processing unit 71 performs the process described in S5 below.

[0064] On the other hand, in S2, if the common processing unit 71 determines that the CPC 10 (protection control device) is not healthy (i.e., S2 is a NO determination), the common processing unit 71 (sequence processing unit 71b) outputs an LED lighting command to the LED control processing unit 81 in the third core 53 (S3). As a result of this process, the LED control processing unit 81 outputs a lighting control signal to the LED 15, and the LED 15 lights up.

[0065] Next, the common processing unit 71 (sequence processing unit 71b) outputs a transmission command for abnormal information (device abnormality) of the CPC 10 to the communication processing unit 82 in the third core 53 (S4). Through this process, the abnormal information (device abnormality) of the CPC 10 is transmitted to the external device 30.

[0066] After processing in S4, or if S2 is determined to be YES, the common processing unit 71 (sequence processing unit 71b) writes the device abnormality determination conditions (conditions for determining abnormality in CPC 10 and conditions for determining abnormality in external device 30) to the shared memory 13 (S5).

[0067] Subsequently, the first core 51 performs timer interrupt waiting processing (S6). In this process, the first core 51 waits until a timer interrupt signal is input from the timer corresponding to the first core 51 in the timer unit 54.

[0068] Then, when a timer interrupt signal is input from the timer corresponding to the first core 51, the first core 51 repeatedly executes the following processes S7 to S10, updating the control parameter k in the order of 1, 2, and 3. As a result, each protection control processing unit of the first core 51 performs protection control processing or relay lock on the MU system (circuit breaker) that is subject to protection control.

[0069] First, the kth protection control processing unit (sequence processing unit) within the first core 51 reads the device abnormality determination conditions from the shared memory 13 (S7).

[0070] Next, the kth protection control processing unit (sequence processing unit) determines whether or not an error has been detected by continuous monitoring (S8).

[0071] In the S8 process, the kth protection control processing unit executes a predetermined sequence logic in software based on the various status information of the CPC10 and external device 30 collected in the S1 process, and the device abnormality determination conditions read in the S7 process, and determines whether or not the relay lock condition is met. The relay lock condition is a condition for determining whether or not to lock the protection control processing (relay calculation) by the kth protection control processing unit (sequence processing unit). If the relay lock condition is met, the determination result of S8 is YES, and if the relay lock condition is not met, the determination result of S8 is NO. In the case of relay lock, the kth protection control processing unit (sequence processing unit) does not perform relay calculations and instead performs a process to stop the output of operation command signals such as trip commands to the MU system (circuit breaker) that is subject to protection control.

[0072] In S8, if the kth protection control processing unit determines that no errors were detected during continuous monitoring (i.e., S8 results in a NO determination), the kth protection control processing unit (sequence processing unit) executes the kth protection control process (relay calculation) (S9).

[0073] Specifically, in the processing of S9, if the control parameter k is 1, the first protection control processing unit 61 (sequence processing unit 61b) performs the first protection control processing on the MU31 system. If the control parameter k is 2, the second protection control processing unit 62 (sequence processing unit 62b) performs the second protection control processing on the MU32 system. Furthermore, if the control parameter k is 3, the third protection control processing unit 63 (sequence processing unit 63b) performs the third protection control processing on the MU33 system.

[0074] On the other hand, in S8, if the kth protection control processing unit determines that an error has been detected by continuous monitoring (if S8 is a YES determination), the kth protection control processing unit (sequence processing unit) executes a relay lock for the kth protection control process (S10).

[0075] Specifically, in the process of S10, if the control parameter k is 1, the first protection control processing unit 61 (sequence processing unit 61b) performs a relay lock of the first protection control process on the MU31 system. If the control parameter k is 2, the second protection control processing unit 62 (sequence processing unit 62b) performs a relay lock of the second protection control process on the MU32 system. Furthermore, if the control parameter k is 3, the third protection control processing unit 63 (sequence processing unit 63b) performs a relay lock of the third protection control process on the MU33 system.

[0076] After processing in S9 or S10, if the control parameter k is 1 or 2, the first core 51 adds 1 to the control parameter k and repeats the processing in S7 to S10 described above. If the control parameter k is 3, the first core 51 terminates the monitoring and protection control processing.

[0077] (Monitoring and protection control processing executed on the second core) Next, with reference to Figure 6, the monitoring and protection control processing performed in the second core 52 will be described. Figure 6 is a flowchart showing the procedure for the monitoring and protection control processing performed in the second core 52. Note that the processing shown in Figure 6 is executed in software by the CPU (not shown) of the arithmetic processing unit 11.

[0078] Furthermore, in the process shown in Figure 6, the pre-processing by the pre-processing unit 72, the fourth protection control processing by the fourth protection control processing unit 64, the fifth protection control processing by the fifth protection control processing unit 65, and the sixth protection control processing by the sixth protection control processing unit 66, as explained in Figure 4, are performed in this order. The process shown in Figure 6 is repeatedly executed (at a fixed period) each time a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11. Therefore, the start timing of the monitoring and protection control processing by the second core 52 shown in Figure 6 is synchronized with that of the monitoring and protection control processing by the first core 51 shown in Figure 5.

[0079] When a periodic interrupt signal is input from the interrupt generation unit 12 to the arithmetic processing unit 11, the preprocessing unit 72 first performs preprocessing (S21). In this process, the preprocessing unit 72 performs, for example, digital filtering on the analog data received from the MU (for example, analog information of current values / voltage values ​​acquired by each MU).

[0080] Next, the second core 52 performs timer interrupt waiting processing (S22). In this process, the second core 52 waits until a timer interrupt signal is input from the timer corresponding to the second core 52 in the timer unit 54.

[0081] Then, when a timer interrupt signal is input from the timer corresponding to the second core 52, the second core 52 repeatedly executes the following processes S23 to S26, updating the control parameter k in the order of 4, 5, and 6. As a result, each protection control processing unit of the second core 52 performs protection control processing or relay lock on the system (circuit breaker) of the MU to be protected.

[0082] First, the kth protection control processing unit (sequence processing unit) in the second core 52 reads the device abnormality determination conditions from the shared memory 13 (S23). The device abnormality determination conditions read in this process are the same conditions that were written to the shared memory 13 in the S5 process during the monitoring and protection control processing (see Figure 5) executed in the first core 51. In other words, through this process, the kth protection control processing unit (sequence processing unit) in the second core 52 receives the device abnormality determination conditions from the first core 51 via memory transfer through the shared memory 13.

[0083] Next, the kth protection control processing unit (sequence processing unit) determines whether or not an error has been detected by continuous monitoring (S24). This determination process determines whether or not the relay lock condition is met, in the same manner as the determination process in S8 in the monitoring and protection control processing (see Figure 5) performed by the first core 51 described above. If the relay lock condition is met, the determination result of S24 is YES, and if the relay lock condition is not met, the determination result of S24 is NO.

[0084] In S24, if the kth protection control processing unit determines that no errors were detected during continuous monitoring (i.e., S24 results in a NO determination), the kth protection control processing unit (sequence processing unit) executes the kth protection control process (relay calculation) (S25).

[0085] Specifically, in the S25 process, if the control parameter k is 4, the fourth protection control processing unit 64 (sequence processing unit 64b) performs the fourth protection control processing on the MU34 system. If the control parameter k is 5, the fifth protection control processing unit 65 (sequence processing unit 65b) performs the fifth protection control processing on the MU35 system. Furthermore, if the control parameter k is 6, the sixth protection control processing unit 66 (sequence processing unit 66b) performs the sixth protection control processing on the MU36 system.

[0086] On the other hand, in S25, if the kth protection control processing unit determines that an error has been detected by continuous monitoring (if S25 is a YES determination), the kth protection control processing unit (sequence processing unit) executes a relay lock for the kth protection control process (S26).

[0087] Specifically, in the S26 process, if the control parameter k is 4, the fourth protection control processing unit 64 (sequence processing unit 64b) performs a relay lock of the fourth protection control process on the MU34 system. If the control parameter k is 5, the fifth protection control processing unit 65 (sequence processing unit 65b) performs a relay lock of the fifth protection control process on the MU35 system. Furthermore, if the control parameter k is 6, the sixth protection control processing unit 66 (sequence processing unit 66b) performs a relay lock of the sixth protection control process on the MU36 system.

[0088] After processing in S25 or S26, if the control parameter k is 4 or 5, the second core 52 adds 1 to the control parameter k and repeats the processing in S23 to S26 described above. If the control parameter k is 6, the second core 52 terminates the protection control processing.

[0089] (External device anomaly detection process) Next, referring to Figure 7, we will explain the abnormality detection process for the external device 30 (including MU31 to MU36) that is performed within the S1 process (continuous monitoring process) during the monitoring and protection control process (see Figure 5) by the first core 51. Figure 7 is a flowchart showing the procedure for the abnormality detection process for the external device 30 executed by the common processing unit 71 of the first core 51. The process shown in Figure 7 is executed in software by the CPU (not shown) of the arithmetic processing unit 11.

[0090] First, the common processing unit 71 (continuous monitoring unit 71a) acquires frames (data) transmitted from each external device (including MU31 to MU36) included in the external device 30 (S31).

[0091] Next, the common processing unit 71 (continuous monitoring unit 71a) determines whether or not an abnormality has been detected in the external device 30 (S32). In this process, the common processing unit 71 determines, based on the frames (first information) from each external device acquired in the S31 process, whether or not there is an external device in which the health indicator information contained in the frame indicates an abnormality, or whether or not the disappearance or delay of the frame has been detected in an external device. If there is an external device in which the health indicator information contained in the frame indicates an abnormality, or if there is an external device in which the disappearance or delay of the frame has been detected, the determination result of S32 is YES, and in all other cases, the determination result of S32 is NO.

[0092] In S32, if the common processing unit 71 determines that no abnormality has been detected in the external device 30 (i.e., S32 results in a NO determination), the common processing unit 71 terminates the abnormality detection process for the external device 30.

[0093] On the other hand, in S32, if the common processing unit 71 determines that an abnormality has been detected in the external device 30 (if S32 is a YES determination), the common processing unit 71 (continuous monitoring unit 71a) determines whether or not abnormalities have been detected in multiple external devices (S33). In this determination process, if there are multiple external devices in which the health information contained within the frame indicates an abnormality, and / or in which the disappearance or delay of a frame has been detected, the determination result in S33 is a YES determination; otherwise, the determination result in S33 is a NO determination.

[0094] In S33, if the common processing unit 71 determines that no abnormalities have been detected in any of the external devices (i.e., S33 results in a NO determination), the common processing unit 71 (continuous monitoring unit 71a) performs the process described in S36 below.

[0095] On the other hand, in S33, if the common processing unit 71 determines that an abnormality has been detected in multiple external devices (if S33 is a YES determination), the common processing unit 71 (continuous monitoring unit 71a) determines whether or not it has detected a communication abnormality in the CPC 10 (protection control device) (S34). This determination process is performed based on various status information (second information) of the CPC 10 (self-device) collected during the S1 process (continuous monitoring process) in the monitoring and protection control process by the first core 51 (see Figure 5). If the collected status information of the CPC 10 includes status information indicating a communication abnormality in the connection (communication) port of the CPC 10 to the process bus 20, the determination result in S34 is a YES determination; otherwise, the determination result in S34 is a NO determination. For example, a state in which the communication port of the CPC 10 to the process bus 20 is link down corresponds to a state in which a communication abnormality has occurred.

[0096] In S34, if the common processing unit 71 determines that it has detected a communication abnormality in the CPC 10 (if S34 is a YES determination), the common processing unit 71 (continuous monitoring unit 71a) determines that there is an abnormality in the process bus 20 (communication transmission path) (S35). After processing in S35, the common processing unit 71 terminates the abnormality detection process for the external device 30.

[0097] On the other hand, if in S34 the common processing unit 71 determines that it has not detected a communication abnormality in the CPC 10 (i.e., S34 is a NO determination), or if S32 is a NO determination, the common processing unit 71 determines that the detected abnormality is in the external device (S36). After processing in S36, the common processing unit 71 terminates the abnormality detection process for the external device 30.

[0098] [Comparative Example] Here, in order to clarify the various effects obtained by the protection control system 1, CPC 10 (protection control device), and protection control method of this embodiment described above, an example of the configuration of a protection control device (comparative example) when multiple IEDs are consolidated to form a CPC will be described. The configuration of the protection control system of the comparative example is the same as the configuration of the protection control system 1 of this embodiment shown in Figure 1. Therefore, in the following description of the comparative example, components that are the same as those in the protection control system 1 of this embodiment will be denoted by the same reference numerals.

[0099] Figure 8 is a functional block diagram of the arithmetic processing unit 100 included in the IED applied to the comparative example protection control system. As shown in Figure 8, the comparative example arithmetic processing unit 100 functionally comprises a protection control processing unit 101, an LED control processing unit 102, and a communication processing unit 103. Functionally, the protection control processing unit 101 is connected to the LED control processing unit 102 and the communication processing unit 103. The protection control processing unit 101 also includes a relay processing unit 101a, a continuous monitoring unit 101b, and a sequence processing unit 101c.

[0100] The relay processing unit 101a performs calculations for the protection control function in software. In IEDs used for the protection of power equipment, the relay processing unit 101a is equipped with calculation logic to realize the protection function. The continuous monitoring unit 101b monitors for abnormalities in the device itself and the health of the external device to be protected.

[0101] The sequence processing unit 101c acquires the calculation results from the relay processing unit 101a and the monitoring information from the continuous monitoring unit 101b, and outputs predetermined operation commands to the LED control processing unit 102 and the communication processing unit 103, respectively, based on predetermined conditions.

[0102] For example, the sequence processing unit 101c can output an LED lighting command as an operation command to the LED control processing unit 102. Also, for example, the sequence processing unit 101c can output information such as the abnormality detection result of its own device and the abnormality detection result of the MU system to be protected and controlled to the communication processing unit 103. Furthermore, for example, the sequence processing unit 101c can output a trip command as an operation command to the MU system to be protected and controlled via the communication processing unit 103.

[0103] The LED control processing unit 102 controls the on / off operation of the LED 15 based on operation commands from the sequence processing unit 101c. The communication processing unit 103 outputs information such as operation commands from the sequence processing unit 101c to the process bus 20. The communication processing unit 103 also receives various status information (frames) from an external device 30 (see Figure 2) via the process bus 20 according to the SV and GOOSE methods.

[0104] Figure 9 is a functional block diagram of a CPC (comparative example) in which multiple IEDs (configuration of the processing unit 100) shown in Figure 8 are combined to form a CPC. Note that in Figure 9, for the sake of simplicity, the network interface unit 14 and LED 15 included in the CPC 200 are not shown.

[0105] In the comparative example CPC200 (protection control device), as shown in Figure 9, the protection control processing units (1st protection control processing unit 201 to 6th protection control processing unit 206) included in the calculation processing unit of each IED are configured separately, while the LED control processing unit 210 and communication processing unit 211 included in the calculation processing unit of each IED are common to all.

[0106] Although not shown in Figure 9, in the comparative example, the number of MUs to be protected and controlled is six (MU31 to MU36), similar to the configuration shown in Figure 1. The first to sixth protection and control processing units 201 to 206 are functional units that protect and control the systems of MU31 to MU36, and each protection and control processing unit has a relay processing unit, a continuous monitoring unit, and a sequence processing unit.

[0107] [Various effects] In the comparative example CPC200 (protection control device) described above, a protection control processing unit is provided for each system of MU to be protected, and each protection control processing unit individually performs continuous monitoring processing for its own device (CPC200) and the external device 30. In other words, in the comparative example, the same continuous monitoring processing is performed in each protection control processing unit, resulting in unnecessary processing.

[0108] Furthermore, if the continuous monitoring process detects an abnormality in the CPC and / or an external device, it is necessary to output information regarding the abnormality determination (for example, the operation command mentioned above) to the LED control processing unit and the communication processing unit to notify them of the abnormality. In this case, if the continuous monitoring process is performed separately for each protection control processing unit, as in the comparative example, an abnormality determination result will be obtained for each protection control processing unit. In this case, it becomes necessary to ensure consistency between multiple abnormality determination results, which complicates information management.

[0109] In contrast, in the CPC10 of this embodiment, as described above, a protection control processing unit is provided for each system of MUs (external devices) to be protected and controlled, but a continuous monitoring unit 71a is provided that performs continuous monitoring processing in common for multiple protection control processing units. Therefore, in this embodiment, the occurrence of unnecessary processing can be suppressed. Furthermore, in the above configuration of this embodiment, the number of abnormality judgment results obtained is one, and as in the comparative example, there is no need to ensure consistency between multiple abnormality judgment results, and the complexity of information management in the CPC10 can be prevented.

[0110] In other words, as in the CPC10 of this embodiment, by providing a protection control processing unit for each system of MUs (external devices) to be protected and controlled, and by providing a common processing unit 71 (continuous monitoring unit 71a) that performs continuous monitoring processing in common for multiple protection control processing units, information management becomes simpler and an increase in processing load can be suppressed.

[0111] Furthermore, as described above, the CPC10 of this embodiment employs a multi-core processor to consolidate the protection control functions of multiple IEDs. In this case, in order for the CPC10 to perform protection control processing for the external device 30, it is necessary to share the continuous monitoring results obtained by the common processing unit 71 (for example, status information of the own device and the external device 30, device abnormality conditions, etc.) among multiple cores. In contrast, in this embodiment, the continuous monitoring results obtained by the common processing unit 71 are stored in a shared memory 13 (see Figure 2), and the continuous monitoring results can be shared among multiple cores by memory transfer via the shared memory 13.

[0112] Therefore, in this embodiment, even without performing separate continuous monitoring processing in the protection control processing function unit of each core, the sharing of continuous monitoring results via memory transfer through the shared memory 13 among multiple cores allows each core to execute appropriate protection control processing or relay locking. Furthermore, when adopting a method of sharing continuous monitoring results via memory transfer through the shared memory 13, as in this embodiment, the manner in which the continuous monitoring results are shared and the management of the information are also simplified.

[0113] Furthermore, in a multicore processor, if an abnormality occurs in a designated core, other cores are usually unable to recognize that information. However, in order to prevent the risk of malfunction as a protective control device, it is necessary to lock the core and the functions associated with the abnormal core. In contrast, in this embodiment, the common processing unit 71 (constant monitoring unit 71a) provided in the first core 51 of the CPC 10 can also determine the health of the device (CPC 10) based on the collected status information. Therefore, in this embodiment, if an abnormality occurs in a designated core, it is also possible to determine whether to continue or stop the processing of the other cores. As a result, even in a CPC 10 (protective control device) employing a multicore processor, unnecessary responses can be prevented, enabling safe operation.

[0114] In the CPC10 of this embodiment, as described above, the processing by multiple protection control processing units, the processing by a common processing unit (continuous monitoring processing), and the pre-processing by a pre-processing unit are divided between the first core 51 and the second core 52, that is, they are executed separately by core division (see Figures 3 and 4). In this embodiment, processing related to protection control processing is started in each core at a fixed period. Furthermore, within the first core 51, the common processing and multiple protection control processing are performed individually by time sharing, and within the second core 52, the pre-processing and multiple protection control processing are performed individually by time sharing (see Figure 4). By adopting a processing method that utilizes such core division and time sharing, the corresponding core can be exclusively allocated to the protection control processing for the period during which each protection control processing is being executed. Therefore, in this embodiment, each protection control processing, common processing (continuous monitoring processing), and pre-processing can be executed in a manner that reliably satisfies the design processing time requirements necessary for realizing the protection control system. In this case, good software processing can be performed in the CPC10.

[0115] In this embodiment, in the monitoring and protection control processing of each core (see Figures 5 and 6), the protection control processing or the relay lock for the protection control processing is executed after the continuous monitoring result determination processing (S8 in Figure 5 and S24 in Figure 6: determination processing for whether or not an error has been detected). In this case, the relay lock for the protection control processing can be executed based on the device abnormality information detected by the common processing unit 71. If the order of the above processing is reversed, the relay lock in the event of a device abnormality will be delayed by a certain period of time, and there is a risk of relay malfunction. Therefore, by performing the continuous monitoring result determination processing before the protection control processing or the relay lock for the protection control processing, as in this embodiment, the risk of this relay malfunction can be reduced.

[0116] Furthermore, in this embodiment, as described above, the common processing unit 71 (continuous monitoring unit 71a) monitors the health of the device (CPC10) and also monitors the status of the external device 30 via communication. In the abnormality detection process for the external device 30 executed by the common processing unit 71 (see Figure 7), abnormalities in the process bus 20 can be detected not only in the external device but also by referring to the status of the communication port of the CPC10 (the device itself). In this way, by performing abnormality detection using not only the continuous monitoring results of the external device 30 but also the continuous monitoring results of the device itself (CPC10), the accuracy of estimating the fault location can be improved. Note that abnormality detection may also be performed using only one of the continuous monitoring results of the external device 30 or the continuous monitoring results of the device itself (CPC10).

[0117] [Various variations] Although a protection control system 1, protection control device (CPC10), and protection control method according to one embodiment of the present invention have been described above, the present invention is not limited to the above embodiment. The configuration of the present invention can take various other modified forms as long as they do not depart from the gist of the present invention as described in the claims.

[0118] In the above embodiment, an example was described in which one arithmetic processing unit 11 (CPC10) is configured with a multi-core processor having three cores, but the present invention is not limited thereto. The arithmetic processing unit 11 (CPC10) may be configured with a multi-processor having four or more cores, or with a multi-core processor having two cores. Furthermore, the arithmetic processing unit 11 (CPC10) may be configured with a multi-CPU instead of a multi-core processor.

[0119] In the above embodiment, an example was described in which the results of the continuous monitoring process performed by the common processing unit 71 are shared among multiple protection control processing units (protection control processes). However, the present invention is not limited to this. For example, the processes to be shared may include processes other than the continuous monitoring process, or the processes to be shared may be processes other than the continuous monitoring process. Any process can be adopted as a process that can be shared, as long as the results of the common process can be shared among at least two protection control processing units (protection control processes). For example, the filtering process for analog data and the display process for monitoring information on a display panel (not shown) can be included in the common process. Note that the former process is performed by the pre-processing unit 72, so in this case, the pre-processing can also be made a common process.

[0120] Furthermore, although the above embodiment describes an example in which the results of the continuous monitoring process performed by the common processing unit 71 are shared among all protection control processes (first protection control process to sixth protection control process) performed by the arithmetic processing unit 11 (CPC10), the present invention is not limited thereto. The results of the continuous monitoring process performed by the common processing unit 71 may be shared among, for example, at least two protection control processes.

[0121] In the above embodiment, an example was described in which information is exchanged (transferred) between multiple protection control processing units by memory transfer via the shared memory 13, but the present invention is not limited thereto. For example, information may be exchanged between multiple protection control processing units by communication between cores or by interrupt operations between cores.

[0122] In the above embodiment, an example was described in which protection control processing is started based on the input of a timer interrupt signal from a timer provided in each core, but the present invention is not limited thereto. Any method can be adopted as long as it enables the start of protection control processing at a predetermined timing after common processing or pre-processing.

[0123] The above embodiments provide a detailed and specific description of the device's configuration to facilitate understanding of the present invention, and are not necessarily limited to devices comprising all the described configurations. The positions, sizes, shapes, and ranges of each component shown in the drawings may not represent the actual positions, sizes, shapes, and ranges, in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and ranges disclosed in the drawings. Furthermore, it is possible to add, delete, or replace some of the configurations in the above embodiments with other configurations. In addition, the control lines and information lines shown are those deemed necessary for explanation, and do not necessarily represent all control lines and information lines in the actual product. In practice, it can be assumed that almost all components are interconnected.

[0124] Furthermore, although the above embodiment describes an example in which the processing functions of various functional block units included in the arithmetic processing unit 11 (CPC10) are implemented in software, the present invention is not limited thereto. Some or all of these functional block units may be implemented in hardware. In addition, information such as programs, tables, and files that implement each function can be stored in memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC card, SD card, or DVD. [Explanation of Symbols]

[0125] 1…Protection control system, 10…CPC (Critical Control Unit), 11…Arithmetic processing unit, 12…Interrupt generation unit, 13…Shared memory, 14…Network interface unit, 15…LED, 20…Process bus, 30…External device, 31~36…MU, 51…First core, 52…Second core, 53…Third core, 54…Timer unit, 61…First protection control processing unit, 62…Second protection control processing unit, 63…Third protection control processing unit, 64…Fourth protection control processing unit, 65…Fifth protection control processing unit, 66…Sixth protection control processing unit, 61a~66a…Relay processing unit, 61b~66b…Sequence processing unit, 71…Common processing unit, 71a…Continuous monitoring unit, 71b…Sequence processing unit, 72…Pre-processing unit, 81…LED control processing unit, 82…Communication processing unit

Claims

1. A protective control device comprising a communication unit that transmits and receives information with a group of devices arranged in a power system, and which performs protective control processing using the said information, The system includes a arithmetic unit connected to the communication unit, capable of individually executing common processing and multiple protection control processing, sharing the result of the common processing among at least two of the multiple protection control processing, and executing each of the at least two protection control processing based on the result of the common processing. Protection control device.

2. The aforementioned common processing includes monitoring the operating status of the devices included in the group of devices, and / or the operating status of its own protective control device. The protective control device according to claim 1.

3. The calculation unit executes the common processing before the plurality of protection control processing. The protective control device according to claim 2.

4. The system further includes a storage unit for storing the results of the aforementioned common processing, The at least two protection control processes share the results of the common process via the storage unit. The protective control device according to claim 1.

5. The calculation unit is capable of executing a process to stop the output of an operation command signal based on the results of the monitoring process in each of the at least two protection control processes. The protective control device according to claim 2.

6. It further includes a notification unit that notifies information regarding the operating status of its own protective control device, The calculation unit, in the common processing, can cause the notification unit to notify it of information regarding the occurrence of an abnormality in its own protection control device based on the results of the common processing. The protective control device according to claim 2.

7. In the common processing, the calculation unit acquires first information regarding the operating status of the devices included in the group of devices via the communication unit, and second information regarding the operating status of its own protection control device. Based on the first and second information, it can detect abnormalities in the devices included in the group of devices, as well as abnormalities in the communication transmission path between the group of devices and the communication unit. The protective control device according to claim 2.

8. The aforementioned arithmetic unit is composed of a multicore processor, The multiple cores included in the multicore processor divide and execute the common processing and the multiple protection control processing, and each of the multiple cores executes its assigned processing in a time-sharing manner. The protective control device according to claim 1.

9. Based on an interrupt signal input to the calculation unit from an external source at regular intervals, the common processing and the counting operation of the timer built into the calculation unit are initiated. A predetermined protection control process within the plurality of protection control processes is started based on an interrupt signal output from the timer. The protective control device according to claim 1.

10. Multiple merging units, A protection control device having a communication unit that transmits and receives information with at least one of the plurality of merging units, and a calculation unit connected to the communication unit that is capable of individually executing common processing and a plurality of protection control processing, shares the result of the common processing among at least two of the plurality of protection control processing, and executes each of the at least two protection control processing based on the result of the common processing, The system includes a network capable of communicating between the merging unit and the protection control device, The protection control device is capable of individually identifying margin units that communicate via the network, and when it detects the loss or delay of information transmitted from a margin unit, it detects the faulty margin unit based on the identification information contained in the information. Protection and control system.

11. A protection control method executed by a protection control device comprising a communication unit that transmits and receives information with a group of devices arranged in a power system, and a calculation unit connected to the communication unit, The aforementioned calculation unit executes common processing and multiple protection control processing separately, The calculation unit includes sharing the result of the common processing among at least two of the plurality of protection control processing, and executing each of the at least two protection control processing based on the result of the common processing. Protection and control method.

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