Indication device

Abstract

This invention provides a high-definition display device and a method for manufacturing the same. [Solution] The display device includes a first insulating layer, a first light-emitting element and a second light-emitting element on the first insulating layer, a third insulating layer disposed on the first light-emitting element and covering the first light-emitting element, and a fifth insulating layer disposed on the second light-emitting element and covering the second light-emitting element. The first light-emitting element and the second light-emitting element emit light of different colors. A first groove and a second groove are provided in the region of the first insulating layer between the first light-emitting element and the second light-emitting element. Part of the third insulating layer is embedded in the first groove, and part of the fifth insulating layer is embedded in the second groove.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device. Another aspect of the present invention relates to a method for manufacturing a display device.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention disclosed herein include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, methods for driving them, or methods for manufacturing them. In this specification, the term "semiconductor device" refers to any device that can function by utilizing semiconductor properties. [Background technology]

[0003] In recent years, there has been a growing demand for higher resolution display panels. Devices requiring high-resolution display panels include those for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR), which have seen significant development in recent years.

[0004] Furthermore, typical examples of display devices applicable to display panels include liquid crystal displays, organic EL (Electro Luminescence) elements, light-emitting devices equipped with light-emitting elements such as LEDs, and electronic paper that displays information using electrophoretic methods.

[0005] For example, the basic structure of an organic EL element consists of a layer containing a light-emitting organic compound sandwiched between a pair of electrodes. By applying a voltage to this element, light can be obtained from the light-emitting organic compound. Because a display device using such an organic EL element does not require a backlight, which is necessary for liquid crystal displays and the like, it is possible to realize a thin, lightweight, high-contrast, and low-power display device. For example, an example of a display device using an organic EL element is described in Patent Document 1. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2002-324673 [Overview of the project] [Problems that the invention aims to solve]

[0007] For example, in the wearable devices for VR, AR, SR, or MR mentioned above, a lens for adjusting focus is required between the eye and the display panel. Because this lens magnifies a portion of the screen, if the display panel has low resolution, there is a problem in that the sense of reality and immersion is diminished.

[0008] Furthermore, high color reproduction is required for display panels. In particular, in the VR, AR, SR, or MR devices mentioned above, using a display panel with high color reproduction allows for the display of colors close to those of real objects, thereby enhancing the sense of realism and immersion.

[0009] One aspect of the present invention aims to provide an extremely high-definition display device. Another aspect of the present invention aims to provide a display device that achieves high color reproducibility. Another aspect of the present invention aims to provide a high-brightness display device. Another aspect of the present invention aims to provide a highly reliable display device. Furthermore, one aspect of the present invention aims to provide a method for manufacturing the above-mentioned display device.

[0010] Furthermore, the description of these problems does not preclude the existence of other problems. Moreover, one aspect of the present invention does not need to solve all of these problems. Other problems can be identified from the description in the specification, drawings, claims, etc. [Means for solving the problem]

[0011] One aspect of the present invention is a display device comprising: a first insulating layer; a first light-emitting element and a second light-emitting element on the first insulating layer; a third insulating layer disposed on the first light-emitting element and covering the first light-emitting element; and a fifth insulating layer disposed on the second light-emitting element and covering the second light-emitting element. The first light-emitting element and the second light-emitting element emit light of different colors, and a first groove and a second groove are provided in the region of the first insulating layer between the first light-emitting element and the second light-emitting element, a part of the third insulating layer is embedded in the first groove, and a part of the fifth insulating layer is embedded in the second groove.

[0012] Furthermore, one aspect of the present invention is a display device comprising: a first insulating layer; a first light-emitting element and a second light-emitting element on the first insulating layer; a third insulating layer disposed on the first light-emitting element and covering the first light-emitting element; and a fifth insulating layer disposed on the second light-emitting element and covering the second light-emitting element. The first light-emitting element and the second light-emitting element emit light of different colors, and a first groove and a second groove are provided in the region of the first insulating layer between the first light-emitting element and the second light-emitting element, a part of the third insulating layer is embedded in the first groove, and a part of the fifth insulating layer is embedded in the second groove, the first light-emitting element comprises: a first conductive layer; a first EL layer on the first conductive layer; and a second conductive layer on the first EL layer, and the second light-emitting element comprises: a third conductive layer; a second EL layer on the third conductive layer; and a fourth EL layer on the second EL layer. The device has a conductive layer and a second EL layer, the first EL layer being arranged to cover the side and top surfaces of the first conductive layer and having a region in contact with the first insulating layer, the second EL layer being arranged to cover the side and top surfaces of the third conductive layer and having a region in contact with the first insulating layer, the width of the first groove in the direction from the first light-emitting element toward the second light-emitting element being greater than twice the thickness of the first EL layer, and the width of the second groove in the direction from the first light-emitting element toward the second light-emitting element being greater than twice the thickness of the second EL layer.

[0013] In the above-described display device, it is preferable that the first groove extends to a region outside the edge of the first EL layer in the direction in which the first groove extends.

[0014] Furthermore, in the above-mentioned display device, it is preferable that a sixth insulating layer is provided between the first conductive layer and the first EL layer so as to be in contact with the side surface of the first conductive layer, and a seventh insulating layer is provided between the third conductive layer and the second EL layer so as to be in contact with the side surface of the third conductive layer.

[0015] Another aspect of the present invention is a display device comprising: a first insulating layer; a first light-emitting element and a second light-emitting element on the first insulating layer; a third insulating layer disposed on the first light-emitting element and covering the first light-emitting element; and a fifth insulating layer disposed on the second light-emitting element and covering the second light-emitting element. The first light-emitting element and the second light-emitting element emit light of different colors, and a groove is provided in the region of the first insulating layer between the first light-emitting element and the second light-emitting element, the groove having a downwardly convex semicircular shape in cross-sectional view, the groove having a first region and a second region not overlapping the first region, the first region being located closer to the first light-emitting element than the second region, the second region being located closer to the second light-emitting element than the first region, the third insulating layer having a region overlapping with the first region of the groove, and the fifth insulating layer having a region overlapping with the second region of the groove.

[0016] Furthermore, in the above-mentioned display device, it is preferable that the first light-emitting element has a first conductive layer, a first EL layer on the first conductive layer, and a second conductive layer on the first EL layer, and the second light-emitting element has a third conductive layer, a second EL layer on the third conductive layer, and a fourth conductive layer on the second EL layer, and that a sixth insulating layer is provided so as to cover the ends of the first conductive layer and the ends of the third conductive layer.

[0017] Furthermore, in the above-mentioned display device, it is preferable that the grooves extend to a region outside the edge of the first EL layer in the direction in which the grooves extend.

[0018] Furthermore, in the above-mentioned display device, it is preferable that the third insulating layer and the fifth insulating layer each contain aluminum and oxygen.

[0019] Another aspect of the present invention relates to a method for manufacturing a display device having a first light-emitting element comprising a first conductive layer, a first EL layer, and a second conductive layer, and a second light-emitting element comprising a third conductive layer, a second EL layer, and a fourth conductive layer, wherein the first light-emitting element and the second light-emitting element exhibit light of different colors, wherein a first conductive layer and a third conductive layer are formed on a first insulating layer, a first groove and a second groove are formed in the region of the first insulating layer between the first conductive layer and the third conductive layer, and the portion of the second groove and the third conductive layer that overlaps with the third conductive layer is formed on the first insulating layer and the third conductive layer, A first resist mask is formed, and a film containing a first luminescent compound and a first conductive film are sequentially deposited on the first insulating layer, the first conductive layer, and the first resist mask, thereby forming a first EL layer and a second conductive layer on the first conductive layer, and a first layer and a fifth conductive layer on the first insulating layer and the first resist mask, and a second insulating layer is deposited on the second conductive layer and the fifth conductive layer, and a second resist mask is formed on the second insulating layer in the portion overlapping with the first conductive layer and the first groove, and the portion not covered by the second resist mask is formed. By removing the second insulating layer, a third insulating layer is formed from the second insulating layer; the first resist mask, the second resist mask, and the fifth conductive layer and the first layer not covered by the second resist mask are removed; a third resist mask is formed on the third insulating layer and on the first insulating layer in the portion overlapping with the first groove and the first conductive layer; and a film containing the second luminescent compound and a second conductive film are sequentially deposited on the first insulating layer, the third conductive layer, and the third resist mask, thereby forming a second EL layer and a fourth conductive layer on the third conductive layer. Furthermore, the method for manufacturing a display device involves forming a second layer and a sixth conductive layer on the first insulating layer and the third resist mask, depositing a fourth insulating layer on the fourth conductive layer and the sixth conductive layer, forming a fourth resist mask on the fourth insulating layer in the portion overlapping with the third conductive layer and the second groove, and removing the fourth insulating layer that is not covered by the fourth resist mask to form a fifth insulating layer from the fourth insulating layer, thereby removing the third resist mask, the fourth resist mask, and the sixth conductive layer and the second layer that are not covered by the fourth resist mask.

[0020] In the method for manufacturing the above-described display device, it is preferable that the width of the first groove in the direction from the first light-emitting element toward the second light-emitting element is greater than twice the thickness of the first EL layer, and the width of the second groove in the direction from the first light-emitting element toward the second light-emitting element is greater than twice the thickness of the second EL layer.

[0021] Furthermore, in the method for manufacturing the above-described display device, it is preferable that the first groove extends to a region outside the edge of the first EL layer in the direction in which the first groove extends.

[0022] Another aspect of the present invention relates to a method for manufacturing a display device having a first light-emitting element comprising a first conductive layer, a first EL layer, and a second conductive layer, and a second light-emitting element comprising a third conductive layer, a second EL layer, and a fourth conductive layer, wherein the first light-emitting element and the second light-emitting element exhibit different colored light, wherein a first conductive layer and a third conductive layer are formed on a first insulating layer, a groove is formed in the region of the first insulating layer between the first conductive layer and the third conductive layer by isotropic etching, a sixth insulating layer is formed covering the ends of the first conductive layer and the ends of the third conductive layer, and the first of the grooves A first resist mask is formed on the third conductive layer and the sixth insulating layer in the region and the portion overlapping with the third conductive layer, and a film containing the first luminescent compound and a first conductive film are sequentially deposited on the sixth insulating layer, the first conductive layer and the first resist mask, thereby forming a first EL layer and a second conductive layer on the first conductive layer, and a first layer and a fifth conductive layer on the sixth insulating layer and the first resist mask, and a second insulating layer is deposited on the second conductive layer and the fifth conductive layer, and the second insulating layer is formed in the portion overlapping with the second region of the first conductive layer and groove A second resist mask is formed on the edge layer, and a third insulating layer is formed from the second insulating layer by removing the second insulating layer that is not covered by the second resist mask. The first resist mask, the second resist mask, and the fifth conductive layer and the first layer that are not covered by the second resist mask are removed, and a third resist mask is formed on the third insulating layer and the sixth insulating layer in the portion that overlaps with the third insulating layer. A film containing the second luminescent compound and a second conductive film are sequentially deposited on the sixth insulating layer, the third conductive layer, and the third resist mask, thereby forming a third conductive layer on the third conductive layer. A second EL layer and a fourth conductive layer are formed, and the second layer and the sixth conductive layer are formed on the sixth insulating layer and the third resist mask, a fourth insulating layer is deposited on the fourth conductive layer and the sixth conductive layer, a fourth resist mask is formed on the fourth insulating layer in the portion overlapping with the third conductive layer and the second region of the groove, and a fifth insulating layer is formed from the fourth insulating layer by removing the fourth insulating layer that is not covered by the fourth resist mask, and the third resist mask, the fourth resist mask, the sixth conductive layer and the second layer that are not covered by the fourth resist mask,This is a method for manufacturing a display device that removes [something].

[0023] Furthermore, in the method for manufacturing the above-described display device, it is preferable that the grooves extend to an area outside the edge of the first EL layer in the direction in which the grooves extend.

[0024] Furthermore, in the method for manufacturing the above-described display device, it is preferable that the second insulating layer and the fourth insulating layer are formed by the ALD method. [Effects of the Invention]

[0025] According to one aspect of the present invention, it is possible to provide an extremely high-definition display device, or a display device that achieves high color reproducibility, or a high-brightness display device, or a highly reliable display device, or a method for manufacturing the above-mentioned display device.

[0026] Furthermore, the description of these effects does not preclude the existence of other effects. Moreover, one aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description in the specification, drawings, claims, etc. [Brief explanation of the drawing]

[0027] [Figure 1] Figures 1A and 1B show examples of display device configurations. [Figure 2] Figures 2A and 2B show examples of display device configurations. [Figure 3] Figures 3A and 3B show examples of display device configurations. [Figure 4] Figures 4A to 4D show examples of the configuration of a display device. [Figure 5] Figures 5A to 5D illustrate examples of methods for manufacturing a display device. [Figure 6] Figures 6A to 6C illustrate examples of methods for manufacturing a display device. [Figure 7]Figures 7A to 7C illustrate examples of methods for manufacturing a display device. [Figure 8] Figures 8A to 8C illustrate examples of methods for manufacturing a display device. [Figure 9] Figures 9A and 9B show examples of the configuration of a display device. [Figure 10] Figures 10A to 10C show examples of the configuration of a display device. [Figure 11] Figures 11A to 11D illustrate examples of methods for manufacturing a display device. [Figure 12] Figures 12A to 12C illustrate an example of a method for manufacturing a display device. [Figure 13] Figures 13A to 13C illustrate examples of methods for manufacturing a display device. [Figure 14] Figure 14 shows an example of a display device configuration. [Figure 15] Figure 15 shows an example of a display device configuration. [Figure 16] Figure 16 shows an example of a display device configuration. [Figure 17] Figure 17 shows an example of a display device configuration. [Figure 18] Figures 18A and 18B show examples of the display module configuration. [Figure 19] Figures 19A and 19B are circuit diagrams showing an example of a display device. [Figure 20] Figures 20A and 20C are circuit diagrams showing an example of a display device. Figure 20B is a timing chart showing an example of the display device's operation. [Figure 21] Figures 21A and 21B show examples of the configuration of electronic equipment. [Figure 22] Figures 22A and 22B show examples of the configuration of electronic equipment. [Modes for carrying out the invention]

[0028] The embodiments will be described below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope thereof. Accordingly, the present invention shall not be construed as being limited to the contents of the following embodiments.

[0029] In the configuration of the invention described below, the same reference numerals are used in common across different drawings for identical parts or parts having similar functions, and repeated explanations are omitted. Furthermore, when referring to similar functions, the hatch patterns are the same, and reference numerals may not be assigned.

[0030] In the figures described herein, the size of each component, the thickness of the layers, or the area may be exaggerated for clarity. Therefore, the scale is not necessarily limited to those figures.

[0031] Furthermore, ordinal numbers such as "the first," "the second," etc., used in this specification are added to avoid confusion of constituent elements and do not imply any numerical limitation.

[0032] Furthermore, if upper and lower numerical limits are specified in this specification, configurations in which the upper and lower numerical limits can be freely combined are also disclosed.

[0033] (Embodiment 1) This embodiment describes a display device according to one aspect of the present invention, and a method for manufacturing the display device.

[0034] A display device according to one aspect of the present invention comprises a light-emitting element (also called a light-emitting device) that emits light of different colors. The light-emitting element comprises a lower electrode, an upper electrode, and a layer containing a light-emitting compound (also called a light-emitting layer or EL layer) between them. As the light-emitting element, it is preferable to use an electroluminescent element such as an organic EL element or an inorganic EL element. In addition, a light-emitting diode (LED) may be used.

[0035] As EL elements, OLEDs (Organic Light Emitting Diodes) or QLEDs (Quantum-dot Light Emitting Diodes) can be used. Examples of light-emitting materials for EL elements include fluorescent materials, phosphorescent materials, inorganic compounds (such as quantum dot materials), and thermally activated delayed fluorescence (TADF) materials.

[0036] As the luminescent material, materials that emit light in colors such as blue, purple, blue-violet, green, yellow-green, yellow, orange, and red may be used as appropriate. Materials that emit near-infrared light may also be used.

[0037] The light-emitting layer may contain one or more compounds (host material, assist material) in addition to the light-emitting substance (guest material). One or more materials with an energy gap larger than the energy gap of the light-emitting substance (guest material) can be selected and used as the host material and assist material. It is preferable to use a combination of compounds that form an excited complex as the host material and assist material. To efficiently form an excited complex, it is particularly preferable to combine a compound that readily accepts holes (hole transport material) with a compound that readily accepts electrons (electron transport material).

[0038] The light-emitting element can be made from either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds (such as quantum dot materials).

[0039] A display device according to one aspect of the present invention can create light-emitting elements of different colors with extremely high precision. Therefore, it is possible to realize a display device with higher resolution than conventional display devices. For example, it is preferable to have an extremely high-resolution display device in which pixels having one or more light-emitting elements have a resolution of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and are arranged with a resolution of 20000 ppi or less, or 30000 ppi or less.

[0040] In the following sections, more specific configuration examples and manufacturing methods of the display device will be described with reference to the drawings.

[0041] [Configuration Example 1] [Configuration Example 1-1] Figures 1A and 1B illustrate a display device according to one embodiment of the present invention. Figure 1A is a schematic top view of the display device 100A, and Figure 1B is a schematic cross-sectional view of the display device 100A. Here, Figure 1B is a cross-sectional view of the area indicated by the dashed line A1-A2 in Figure 1A. Note that some elements have been omitted from the top view of Figure 1A for clarity.

[0042] The display device 100A has an insulating layer 121, a light-emitting element 120R, a light-emitting element 120G, and a light-emitting element 120B. The light-emitting element 120R is a red-emitting element, the light-emitting element 120G is a green-emitting element, and the light-emitting element 120B is a blue-emitting element. In other words, the light-emitting element 120R and the light-emitting element 120G emit light of different colors. Also, the light-emitting element 120G and the light-emitting element 120B emit light of different colors. Also, the light-emitting element 120B and the light-emitting element 120R emit light of different colors. A structure in which each light-emitting element is color-coded (here, red (R), green (G), and blue (B)) is sometimes called an SBS (Side By Side) structure.

[0043] In this specification, a structure in which different light-emitting layers are created or painted for each color of light-emitting device (here, blue (B), green (G), and red (R)) may be referred to as an SBS structure. Also, in this specification, a light-emitting device capable of emitting white light may be referred to as a white light-emitting device. A white light-emitting device can be combined with a colored layer (for example, a color filter) to realize a full-color display device.

[0044] In the following, when explaining matters common to the light-emitting element 120R, light-emitting element 120G, and light-emitting element 120B, the symbols attached to the reference numerals may be omitted, and it may be referred to as light-emitting element 120. Similarly, the conductive layers 111R, 111G, and 111B, which will be described later, may be referred to as conductive layer 111. Similarly, the EL layers 115R, 115G, and 115B, which will be described later, may be referred to as EL layer 115. Similarly, the conductive layers 116R, 116G, and 116B, which will be described later, may be referred to as conductive layer 116. Conductive layers 111R, EL layer 115R, and conductive layer 116R are included in light-emitting element 120R. Similarly, conductive layer 111G, EL layer 115G, and conductive layer 116G are included in light-emitting element 120G, and conductive layer 111B, EL layer 115B, and conductive layer 116B are included in light-emitting element 120B.

[0045] Furthermore, the combination of colors of light emitted by the light-emitting element 120 is not limited to those described above; for example, cyan, magenta, and yellow may also be used. In addition, although the above example shows three colors, red (R), green (G), and blue (B), the number of colors of light emitted by the light-emitting element 120 included in the display device 100A may be two, four or more, or any number of colors.

[0046] The light-emitting element 120 has a conductive layer 111 and an EL layer 115 that function as a lower electrode, and a conductive layer 116 that function as an upper electrode. The conductive layer 116 is transparent and reflective to visible light. The EL layer 115 contains a light-emitting compound.

[0047] The light-emitting element 120 can be an electroluminescent element that emits light due to a current flowing through the EL layer 115 when a potential difference is applied between the conductive layer 111 and the conductive layer 116. In particular, it is preferable to apply an organic EL element using a light-emitting organic compound to the EL layer 115. Furthermore, it is preferable that the light-emitting element 120 is an element that emits monochromatic light having one peak in the visible light region in its emission spectrum. However, the light-emitting element 120 may also be an element that emits white light having two or more peaks in the visible light region in its emission spectrum.

[0048] A conductive layer 111 provided on each light-emitting element 120 is independently supplied with a potential that controls the amount of light emitted by the light-emitting element 120. The conductive layer 111 functions, for example, as a pixel electrode.

[0049] The EL layer 115 has a layer containing at least a luminescent compound. In addition, it may have a structure in which one or more layers selected from an electron injection layer, an electron transport layer, a charge generation layer, a hole transport layer, and a hole injection layer are laminated. The EL layer 115 can be formed by a liquid-phase method such as vapor deposition or inkjet printing.

[0050] The conductive layer 116 is formed to be transparent and reflective to visible light. For example, a thin metal film or alloy film that transmits visible light can be used. Alternatively, a light-transmitting conductive film (e.g., a metal oxide film) may be laminated onto such a film.

[0051] In the region of the insulating layer 121 located between two adjacent conductive layers 111 in the A1-A2 direction shown in Figure 1A, two grooves are provided. As shown in Figures 1A and 1B, of the two grooves provided between the light-emitting element 120R and the light-emitting element 120G, the groove on the light-emitting element 120R side is designated as groove 170_1b, and the groove on the light-emitting element 120G side is designated as groove 170_2a. Also, of the two grooves provided between the light-emitting element 120G and the light-emitting element 120B, the groove on the light-emitting element 120G side is designated as groove 170_2b, and the groove on the light-emitting element 120B side is designated as groove 170_3a. Furthermore, of the two grooves provided between the light-emitting element 120B and the light-emitting element 120R, the groove on the light-emitting element 120B side is designated as groove 170_3b, and the groove on the light-emitting element 120R side is designated as groove 170_1a.

[0052] In the following, when explaining matters common to grooves 170_1a, 170_1b, 170_2a, 170_2b, 170_3a, and 170_3b, the symbols attached to the designations may be omitted, and the grooves may be simply referred to as groove 170. Similarly, when explaining matters common to grooves 170_1a, 170_2a, and 170_3a, the symbols attached to the designations may be omitted, and the grooves may be simply referred to as groove 170_a. Furthermore, when explaining matters common to grooves 170_1b, 170_2b, and 170_3b, the symbols attached to the designations may be omitted, and the grooves may be simply referred to as groove 170_b.

[0053] Furthermore, as shown in Figure 1A, in a top view of the display device 100A, the direction in which the groove 170 provided in the insulating layer 121 extends is defined as the x-direction, and the direction perpendicular to the x-direction is defined as the y-direction. When the arrangement of the light-emitting elements 120 (conductive layer 111) is the stripe arrangement shown in Figure 1A, adjacent light-emitting elements of the same color are arranged in the x-direction, and adjacent light-emitting elements of different colors are arranged in the y-direction. The y-direction can be rephrased as the A1-A2 direction shown in Figure 1A.

[0054] In the display device 100A, the EL layer 115 and the conductive layer 116 are separated between adjacent light-emitting elements of different colors using grooves 170. This prevents current (also called leakage current) from flowing through the EL layer 115 between adjacent light-emitting elements of different colors. Therefore, the light emission caused by this leakage current can be suppressed, enabling a display with high contrast. Furthermore, even when increasing the resolution, a highly conductive material can be used for the EL layer 115, thus broadening the range of material choices and making it easier to improve efficiency, reduce power consumption, and improve reliability.

[0055] The EL layer 115 and the conductive layer 116 may be formed into island-like patterns by deposition using a shadow mask such as a metal mask, but it is particularly preferable to use a processing method that does not use a metal mask. This makes it possible to form extremely fine patterns, and thus improves the fineness and aperture ratio compared to the formation method using a metal mask. Typical processing methods that can be used for this purpose include photolithography. Other formation methods such as nanoimprint lithography and sandblasting can also be used.

[0056] In this specification, devices fabricated using a metal mask or an FMM (Fine Metal Mask, a high-resolution metal mask) may be referred to as MM (Metal Mask) structured devices. Furthermore, in this specification, devices fabricated without using a metal mask or an FMM may be referred to as MML (Metal Maskless) structured devices.

[0057] Figure 2A shows a schematic cross-sectional view of the groove 170 and its vicinity of the display device 100A. Note that some elements have been omitted from the cross-sectional view in Figure 2A for clarity. The width of the groove 170 in the A1-A2 direction (width L1 shown in Figure 2A) is preferably greater than twice the film thickness of the EL layer 115. For example, if the film thickness of the EL layer 115 is 100 nm, the width L1 is greater than 200 nm and 500 nm or less, preferably greater than 200 nm and 400 nm or less, more preferably greater than 200 nm and 300 nm or less, specifically 250 nm. This causes a step in the EL layer 115 due to the groove 170, allowing the EL layer 115 to be formed on the conductive layer 111. At this time, as shown in Figure 1B, the EL layer 115 is arranged to cover the side and top surfaces of the conductive layer 111. The EL layer 115 also has a region that is in contact with the insulating layer 121.

[0058] The spacing between adjacent grooves (the shortest distance between the ends of adjacent grooves; spacing L2 shown in Figure 2A), and the distance from the conductive layer to the groove adjacent to the conductive layer (the shortest distance from the end of the conductive layer to the end of the groove adjacent to the conductive layer; distance L3 shown in Figure 2A) should be appropriately adjusted according to the processing accuracy when using the photolithography method, the film thickness of the EL layer 115, the film thickness of the conductive layer 116, the film thickness of the insulating layer 118 (described later), etc. For example, the spacing L2 should be 200 nm to 800 nm, preferably 250 nm to 700 nm, and more preferably 350 nm to 600 nm. Also, for example, the distance L3 should be 50 nm to 400 nm, preferably 50 nm to 200 nm, and more preferably 50 nm to 150 nm.

[0059] The shortest distance (distance L4 shown in Figure 2A) between the conductive layers 111 of two adjacent light-emitting elements of different colors depends on the width (width L1) of the groove 170 in the A1-A2 direction, the spacing between adjacent grooves (spacing L2), and the distance from the conductive layer to the groove adjacent to that conductive layer (distance L3). With the above configuration, the distance L4 is between 700 nm and 2000 nm, preferably between 900 nm and 1600 nm, and more preferably between 1000 nm and 1400 nm.

[0060] Based on the above, it is possible to realize an extremely high-resolution display device in which pixels having one or more light-emitting elements have a resolution of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and are arranged at a resolution of 20000 ppi or less, or 30000 ppi or less.

[0061] In the display device 100A, it is preferable that the EL layer 115 and the conductive layer 116 are processed to be continuous without being interrupted between light-emitting elements of the same color. For example, the EL layer 115 and the conductive layer 116 can be processed in a stripe pattern. This allows the conductive layer 116 of all light-emitting elements to be given a predetermined potential without being in a floating state.

[0062] In the cross-sectional view of the display device 100A shown in Figures 1B and 2A, the edge of the EL layer 115 is located outside the edge of the conductive layer 111. The edge of the EL layer 115 covers the edge of the conductive layer 111. By having the edge of the EL layer 115 located outside the edge of the conductive layer 111, a short circuit between the conductive layer 111 and the conductive layer 116 can be suppressed. Also, in the cross-sectional view of the display device 100A, the edge of the conductive layer 116 is located outside the edge of the conductive layer 111.

[0063] The display device 100A has an insulating layer 118. The insulating layer 118 is arranged on the light-emitting element 120 and covers the light-emitting element 120. In this specification, when the insulating layer covers the light-emitting element, it means that the insulating layer covers a part of the end face of the light-emitting element, or that the insulating layer completely covers the end face of the light-emitting element. The insulating layer 118 is also provided to fill two grooves adjacent to the light-emitting element 120. As shown in Figure 1B, the insulating layer 118 on the light-emitting element 120R is provided to fill grooves 170_1a and 170_1b, the insulating layer 118 on the light-emitting element 120G is provided to fill grooves 170_2a and 170_2b, and the insulating layer 118 on the light-emitting element 120B is provided to fill grooves 170_3a and 170_3b.

[0064] Furthermore, in a cross-sectional view in the A1-A2 direction, the insulating layer 118 has a region on the outside of the light-emitting element 120 that is in contact with the insulating layer 121. In this specification, the fact that the insulating layer 118 has a region on the outside of the light-emitting element 120 that is in contact with the insulating layer 121 is sometimes referred to as the light-emitting element 120 being sealed by the insulating layer 118 and the insulating layer 121. In other words, in the display device 100A, each of the light-emitting elements 120B, 120G, and 120R is sealed by the insulating layer 121 and the insulating layer 118. The insulating layer 118 functions as a protective layer that prevents impurities such as water from diffusing into the light-emitting element. It is preferable to use an inorganic insulating film with low moisture permeability, such as a silicon oxide film, a silicon nitride film, or an aluminum oxide film, for the insulating layer 118. When aluminum oxide is used for the insulating layer 118, the insulating layer 118 becomes an insulating layer having aluminum and oxygen.

[0065] Depending on the shape of the groove, the area where the insulating layer 118 and the insulating layer 121 are in contact may not necessarily be located outside the light-emitting element 120. For example, the area where the insulating layer 118 and the insulating layer 121 are in contact may be located below the light-emitting element 120. In this case as well, the light-emitting element 120 may still be described as being sealed by the insulating layer 118 and the insulating layer 121. Furthermore, in this specification, "seal" can be rephrased as "enclose."

[0066] Figure 2B is a schematic top view of the end of groove 170 and its vicinity. Note that some elements have been omitted from the top view of Figure 2B for clarity. It is preferable that grooves 170_a and 170_b extend in the x-direction to an area outside the end of the EL layer 115. In Figure 2B, the distance from the ends of grooves 170_a and 170_b to the end of the EL layer 115 is shown as distance L5. This configuration allows for the separation of adjacent EL layers in the y-direction.

[0067] Furthermore, it is preferable that the conductive layer 116 extends in the x-direction to a region outside the ends of groove 170_a and groove 170_b. In other words, it is preferable that in the x-direction, grooves 170_a and 170_b are shortened to a region inside the ends of the conductive layer 116. In Figure 2B, the distance from the ends of grooves 170_a and 170_b to the ends of the conductive layer 116 is shown as distance L6.

[0068] The insulating layer 121 is configured as a single layer or a laminated structure of two or more layers. For example, when the insulating layer 121 is a laminated structure of two layers, it is preferable to select an insulator for the layer on the substrate 101 side that functions as an etching stopper film when etching the insulating layer 121 to form the groove 170. For example, when silicon oxide or silicon oxynitride is used for the layer on the conductive layer 111 side, silicon nitride, aluminum oxide, or hafnium oxide may be used for the layer on the substrate 101 side.

[0069] Preferably, there are two grooves in the insulating layer 121 in the region located between two adjacent conductive layers 111 in the y-direction, but there may be one or three or more. A display device in which there is one groove in the insulating layer 121 in the region located between two adjacent conductive layers 111 in the y-direction will be described in the modified examples below.

[0070] This configuration allows for the creation of different EL layers for each different colored light-emitting element 120, enabling high color reproduction and low power consumption in color displays. Furthermore, by adjusting the film thickness of the EL layer on each light-emitting element 120 to match the peak wavelength of the emission spectrum, a microcavity structure (micro-resonator structure) can be added, realizing a high-brightness display device. In addition, it becomes possible to arrange the light-emitting elements 120 at extremely high density. For example, a display device with a resolution exceeding 2000 ppi can be realized.

[0071] The display device 100A comprises the aforementioned insulating layer 121, light-emitting element 120R, light-emitting element 120G, and light-emitting element 120B on a substrate 101 equipped with a semiconductor circuit. The display device 100A also has a plug 131.

[0072] The substrate 101 can be a circuit board having transistors or wiring. If a passive matrix or segment method is applicable, an insulating substrate such as a glass substrate can be used as the substrate 101. Furthermore, the substrate 101 is a substrate on which semiconductor circuits function as circuits for driving each light-emitting element (also called pixel circuits), or as drive circuits for driving said pixel circuits. More specific examples of the substrate 101 configuration will be described later.

[0073] The substrate 101 and the conductive layer 111 of the light-emitting element 120 are electrically connected via a plug 131. The plug 131 is formed to be embedded in an opening provided in the insulating layer 121. The conductive layer 111 is provided in contact with the upper surface of the plug 131.

[0074] As shown in the display device 100B of Figure 3A, grooves may be provided between light-emitting elements of the same color. For example, as shown in Figure 3A, a groove 171_1 may be provided between two adjacent light-emitting elements 120R in the x-direction, a groove 171_2 may be provided between two adjacent light-emitting elements 120G in the x-direction, and a groove 171_3 may be provided between two adjacent light-emitting elements 120B in the x-direction. In this case, it is preferable that groove 171_1 does not intersect (is not connected to) grooves 170_1a and 170_1b. It is also preferable that groove 171_2 does not intersect (is not connected to) grooves 170_2a and 170_2b. Furthermore, it is preferable that groove 171_3 does not intersect (is not connected to) grooves 170_3a and 170_3b. This allows a predetermined potential to be applied to the conductive layer 116 without the conductive layer 116 of all light-emitting elements becoming floating.

[0075] The arrangement of the light-emitting elements 120 (conductive layer 111) is preferably a stripe arrangement, but other arrangements are also acceptable. For example, possible arrangements of the light-emitting elements 120 (conductive layer 111) include a delta arrangement and a mosaic arrangement. The display device 100C in Figure 3B has conductive layers 111 (light-emitting elements 120) arranged in a delta arrangement. For example, by providing the groove 170 shown in Figure 3B, light-emitting elements 120 of different colors can be separated.

[0076] [Configuration Example 1-2] Figure 4A is a schematic cross-sectional view of the display device 100D. The display device 100D differs from the display device 100A in that it has an insulating layer 119. Figure 4C shows an enlarged view of the conductive layer 111, the insulating layer 119, and their vicinity. Note that some elements have been omitted in the enlarged view of Figure 4C for clarity.

[0077] The insulating layer 119 is provided between the conductive layer 111 and the EL layer 115 so as to be in contact with the side surface of the conductive layer 111. By providing the insulating layer 119, even if the thickness of the EL layer 115 covering the edge of the conductive layer 111 is reduced, the distance between the conductive layer 111 and the conductive layer 116 at the side edge of the conductive layer 111 can be increased. Therefore, short circuits between the conductive layer 111 and the conductive layer 116 can be suppressed, and the yield of the display device can be increased. In addition, it is possible to prevent impurities such as water and hydrogen from diffusing into the conductive layer 111 from the outside.

[0078] [Configuration Examples 1-3] Figure 4B is a schematic cross-sectional view of the display device 100E. The display device 100E differs from the display device 100A in that the configuration of the conductive layer 111 is different. Figure 4D shows an enlarged view of the conductive layer 111 and its vicinity. Note that some elements have been omitted in the enlarged view of Figure 4D for clarity.

[0079] The display device 100E is formed such that the conductive layer 111 is embedded in an opening provided in the insulating layer 121. In other words, the upper surface of the conductive layer 111 and the upper surface of the insulating layer 121 are roughly aligned. This configuration allows the EL layer 115 to be formed on a flat surface.

[0080] Since the EL layer of the display device 100E is formed on a flat surface, the EL layer does not cover the edges of the conductive layer. Therefore, it is possible to prevent the thickness of the EL layer from becoming too thin, and to prevent short circuits between the upper and lower electrodes of the light-emitting element. In addition, since it is possible to omit the insulator that covers the edges of the conductive layer 111, it is possible to prevent the distance between adjacent light-emitting elements from becoming too wide, thereby enabling miniaturization of the display device.

[0081] [About the components] [Light-emitting element] The light-emitting element that can be used in the light-emitting element 120 can be a self-emitting element, and this category includes elements whose brightness can be controlled by current or voltage. For example, LEDs, organic EL elements, inorganic EL elements, etc., can be used. In particular, the use of organic EL elements is preferred.

[0082] Light-emitting elements include top-emission, bottom-emission, and dual-emission types. The electrode that extracts light uses a conductive film that transmits visible light. The electrode that does not extract light uses a conductive film that reflects visible light.

[0083] In one aspect of the present invention, a top-emission or dual-emission type light-emitting element that emits light particularly on the side opposite to the surface to be formed can be suitably used.

[0084] The EL layer 115 has at least an emissive layer. The EL layer 115 may further have layers other than the emissive layer that include a material with high hole injection properties, a material with high hole transport properties, a hole blocking material, a material with high electron transport properties, a material with high electron injection properties, an electron blocking material, or a bipolar material (a material with high electron transport and hole transport properties).

[0085] The EL layer 115 can use either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. Each of the layers constituting the EL layer 115 can be formed by methods such as vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating.

[0086] When a voltage higher than the threshold voltage of the light-emitting element 120 is applied between the cathode and anode, holes are injected into the EL layer 115 from the anode side and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer 115, causing the light-emitting material contained in the EL layer 115 to emit light.

[0087] When a white-emitting light-emitting element is used as the light-emitting element 120, it is preferable to have a configuration in which the EL layer 115 contains two or more types of light-emitting materials. For example, white emission can be obtained by selecting two or more light-emitting materials such that the emission of each of the two or more materials is in a complementary color relationship. For example, it is preferable to include two or more light-emitting materials that emit R (red), G (green), B (blue), Y (yellow), O (orange), etc., or light-emitting materials that emit light containing spectral components of two or more colors from R, G, and B. Furthermore, it is preferable to use a light-emitting element in which the emission spectrum from the light-emitting element has two or more peaks within the wavelength range of the visible light region (for example, 350 nm to 750 nm). In addition, it is preferable that the emission spectrum of a material having a peak in the yellow wavelength region also has spectral components in the green and red wavelength regions.

[0088] The EL layer 115 is preferably configured by laminating an emissive layer containing an emissive material that emits one color and an emissive layer containing an emissive material that emits another color. For example, the multiple emissive layers in the EL layer 115 may be laminated in contact with each other, or they may be laminated with regions that do not contain any emissive material in between. For example, a region may be provided between a fluorescent emissive layer and a phosphorescent emissive layer that contains the same material as the fluorescent emissive layer or the phosphorescent emissive layer (e.g., a host material, an assist material) but does not contain any emissive material. This makes it easier to manufacture the light-emitting element and reduces the driving voltage.

[0089] Furthermore, the light-emitting element 120 may be a single element having one EL layer, or it may be a tandem element in which multiple EL layers are stacked with a charge generation layer in between.

[0090] A single-structure device preferably has one light-emitting unit between a pair of electrodes, and this light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, light-emitting layers should be selected such that the light emitted from each of the two or more layers is complementary in color. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer complementary, a configuration that emits white light as a whole can be obtained. The same applies to light-emitting devices having three or more light-emitting layers.

[0091] A tandem device preferably has two or more light-emitting units between a pair of electrodes, and each light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, the device should be configured such that the light from the light-emitting layers of the multiple light-emitting units is combined to produce white light emission. The configuration for obtaining white light emission is the same as that for a single-structure device. In a tandem device, it is preferable to provide an intermediate layer, such as a charge-generating layer, between the multiple light-emitting units.

[0092] Furthermore, when comparing the aforementioned white light-emitting devices (single or tandem structure) with SBS structure light-emitting devices, SBS structure light-emitting devices can consume less power than white light-emitting devices. If you want to keep power consumption low, it is preferable to use SBS structure light-emitting devices. On the other hand, white light-emitting devices are preferable because their manufacturing process is simpler than that of SBS structure light-emitting devices, which can lead to lower manufacturing costs or higher manufacturing yields.

[0093] A conductive film that transmits visible light, which can be used in the conductive layer 111, etc., can be formed using, for example, indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, or zinc oxide with gallium added. Metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides of these metal materials (e.g., titanium nitride) can also be used by forming them thinly enough to be translucent. Furthermore, a laminated film of the above materials can be used as the conductive layer. For example, using a laminated film of a silver-magnesium alloy and indium tin oxide is preferable because it can enhance conductivity. Graphene may also be used.

[0094] In the conductive layer 111, it is preferable to use a conductive film that reflects visible light in the portion located on the EL layer 115 side. As the conductive film, for example, metal materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metal materials, can be used. Silver is preferred because it has a high reflectivity of visible light. Aluminum is also preferred because it is easy to process as the electrodes are easily etched, and it has a high reflectivity of visible light and near-infrared light. Lanthanum, neodymium, or germanium may also be added to the above metal materials or alloys. Alternatively, an alloy containing titanium, nickel, or neodymium and aluminum (aluminum alloy) may be used. Alternatively, an alloy containing copper, palladium, magnesium, and silver may be used. Alloys containing silver and copper are preferred because they have high heat resistance.

[0095] The conductive layer 111 may also be configured by laminating a conductive metal oxide film on a conductive film that reflects visible light. This configuration can suppress oxidation or corrosion of the conductive film that reflects visible light. For example, oxidation can be suppressed by laminating a metal film or metal oxide film in contact with an aluminum film or aluminum alloy film. Examples of materials for such metal films and metal oxide films include titanium or titanium oxide. Alternatively, a conductive film that transmits visible light and a film made of a metal material may be laminated. For example, a laminated film of silver and indium tin oxide, or a laminated film of a silver-magnesium alloy and indium tin oxide can be used.

[0096] When aluminum is used as the conductive layer 111, the reflectance of visible light and the like can be sufficiently high by making the thickness preferably 40 nm or more, and more preferably 70 nm or more. When silver is used as the conductive layer 111, the reflectance of visible light and the like can be sufficiently high by making the thickness preferably 70 nm or more, and more preferably 100 nm or more.

[0097] As a conductive film having light transmission and reflectivity that can be used in the conductive layer 116, a film can be used in which the conductive film that reflects visible light is formed to a thickness that allows visible light to pass through. Furthermore, by forming a laminated structure of the conductive film and the conductive film that transmits visible light, the conductivity or mechanical strength can be increased.

[0098] A conductive film having light-transmitting and reflective properties preferably has a reflectance to visible light (for example, reflectance to light of a predetermined wavelength within the range of 400 nm to 700 nm) of 20% to 80%, more preferably 40% to 70%. Furthermore, a conductive film having reflective properties preferably has a reflectance to visible light of 40% to 100%, more preferably 70% to 100%. Furthermore, a conductive film having light-transmitting properties preferably has a reflectance to visible light of 0% to 40%, more preferably 0% to 30%.

[0099] As the conductive layer 111 that functions as the lower electrode, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides of these metal materials (e.g., titanium nitride) can be used. These can also be suitably used as the conductive film of the plug 131.

[0100] The electrodes constituting the light-emitting element can be formed using methods such as vapor deposition or sputtering. Alternatively, they can be formed using ejection methods such as inkjet printing, printing methods such as screen printing, or plating methods.

[0101] Furthermore, the layers described above, including the light-emitting layer and the material containing a material with high hole injection, high hole transport, high electron transport, and high electron injection, as well as a bipolar material, may each contain inorganic compounds such as quantum dots, or polymer compounds (oligomers, dendrimers, polymers, etc.). For example, quantum dots can be used in the light-emitting layer to function as a light-emitting material.

[0102] Furthermore, as quantum dot materials, colloidal quantum dot materials, alloy-type quantum dot materials, core-shell type quantum dot materials, and core-type quantum dot materials can be used. Materials containing elemental groups from groups 12 and 16, 13 and 15, or 14 and 16 may also be used. Alternatively, quantum dot materials containing elements such as cadmium, selenium, zinc, sulfur, phosphorus, indium, tellurium, lead, gallium, arsenic, and aluminum may be used.

[0103] Preferably, each light-emitting element is adjusted such that the optical distance between the surface of its reflective layer that reflects visible light and the conductive layer 116 that is transparent and reflective to visible light is m × λ / 2 (where m is an integer of 1 or more) or close to that value, with respect to the wavelength λ of the light whose intensity is to be enhanced.

[0104] It should be noted that the optical distance described above is, strictly speaking, related to the product of the physical distance between the reflective surface of the reflective layer and the reflective surface of the conductive layer 116 which has both light transmission and reflectivity, and the refractive index of the layer provided between them, making it difficult to adjust precisely. Therefore, it is preferable to adjust the optical distance by assuming that the surface of the reflective layer and the surface of the conductive layer 116 which has both light transmission and reflectivity are reflective surfaces, respectively.

[0105] Materials that can be used for the plug 131 include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, gold, silver, platinum, magnesium, iron, cobalt, palladium, tantalum, or tungsten, alloys containing these metal materials, or nitrides of these metal materials. Furthermore, the plug 131 can be made by using a film containing these materials as a single layer or in a multilayer structure. For example, there are single-layer structures of aluminum film containing silicon, two-layer structures of aluminum film laminated on titanium film, two-layer structures of aluminum film laminated on tungsten film, two-layer structures of copper film laminated on copper-magnesium-aluminum alloy film, two-layer structures of copper film laminated on titanium film, two-layer structures of copper film laminated on tungsten film, three-layer structures of titanium film or titanium nitride film, with aluminum film or copper film laminated on top of that, and further titanium film or titanium nitride film formed on top of that, and three-layer structures of molybdenum film or molybdenum nitride film, with aluminum film or copper film laminated on top of that, and further molybdenum film or molybdenum nitride film formed on top of that. Oxides such as indium oxide, tin oxide, or zinc oxide may also be used. Furthermore, using copper containing manganese is preferable because it improves the controllability of the shape by etching.

[0106] [Example of manufacturing method] An example of a method for manufacturing a display device according to one aspect of the present invention will be described with reference to the drawings.

[0107] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute the display device can be formed using methods such as sputtering, chemical vapor deposition (CVD), vacuum deposition, pulsed laser deposition (PLD), and atomic layer deposition (ALD). CVD methods include plasma-enhanced CVD (PECVD) and thermal CVD. One type of thermal CVD is metal-organic vapor deposition (MOCVD).

[0108] Furthermore, thin films (insulating films, semiconductor films, conductive films, etc.) that constitute the display device can be formed by methods such as spin coating, dip coating, spray coating, inkjet printing, dispensing, screen printing, offset printing, doctor knife coating, slit coating, roll coating, curtain coating, and knife coating.

[0109] Furthermore, when processing the thin films that constitute the display device, photolithography or the like can be used. In addition, the thin films may be processed by nanoimprint lithography, sandblasting, lift-off lithography, or the like. Alternatively, island-shaped thin films may be directly formed by a film deposition method using a shielding mask such as a metal mask.

[0110] There are two main methods of photolithography. One method involves forming a resist mask on the thin film to be processed, then processing the thin film by etching or other means, and removing the resist mask. The other method involves forming a photosensitive thin film, then exposing and developing it to process the thin film into the desired shape.

[0111] In photolithography, the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture thereof. Other options include ultraviolet light, KrF laser light, or ArF laser light. Exposure may also be performed using immersion lithography. Furthermore, extreme ultraviolet (EUV) light or X-rays may be used as the light source for exposure. An electron beam can also be used instead of the light source. Using extreme ultraviolet light, X-rays, or an electron beam is preferable because it allows for extremely fine processing. Note that a photomask is not required when exposure is performed by scanning a beam such as an electron beam.

[0112] Thin films can be processed using methods such as dry etching, wet etching, and sandblasting. The resist mask can be removed by dry etching (such as ashing), wet etching, wet etching after dry etching, or dry etching after wet etching.

[0113] For thin film planarization, polishing methods such as chemical mechanical polishing (CMP) are typically suitable. Other methods such as dry etching and plasma treatment may also be used. Polishing, dry etching, and plasma treatment may be performed multiple times, or they may be combined. When combining treatments, the order of the processes is not particularly limited and should be set appropriately according to the surface irregularities of the treated surface.

[0114] To precisely process a thin film to a desired thickness, for example, the CMP (Chemical Polishing) method can be used. In this method, the thin film is first polished at a constant processing speed until a portion of its upper surface is exposed. Then, by polishing at a slower processing speed until the thin film reaches the desired thickness, high-precision processing becomes possible.

[0115] Methods for detecting the end point of polishing include optical methods that involve irradiating the surface of the workpiece with light and detecting changes in the reflected light, physical methods that involve detecting changes in the polishing resistance that the processing equipment receives from the workpiece, and methods that involve applying magnetic field lines to the workpiece and using the changes in magnetic field lines caused by the resulting eddy currents.

[0116] After the upper surface of the thin film is exposed, the thickness of the thin film can be controlled with high precision by performing a polishing process at a slow processing speed while monitoring the thickness of the thin film using an optical method such as a laser interferometer. If necessary, the polishing process may be repeated multiple times until the thin film reaches the desired thickness.

[0117] [Example of manufacturing method 1] In the following, an example of a method for manufacturing a display device according to one aspect of the present invention will be described using the display device 100A exemplified in the above configuration example.

[0118] {Preparation of substrate 101} As the substrate 101, a substrate having at least sufficient heat resistance to withstand subsequent heat treatment can be used. When an insulating substrate is used as the substrate 101, examples include glass substrates, quartz substrates, sapphire substrates, and ceramic substrates. In addition, semiconductor substrates such as single-crystal semiconductor substrates made of silicon or silicon carbide, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, and SOI substrates can be used.

[0119] In particular, it is preferable to use a substrate 101 on which a semiconductor circuit including semiconductor elements such as transistors is formed on the semiconductor substrate or the insulating substrate. It is preferable that the semiconductor circuit constitutes, for example, a pixel circuit, a gate line driving circuit (gate driver), a source line driving circuit (source driver), etc. In addition to the above, an arithmetic circuit, a memory circuit, etc. may also be configured.

[0120] In this embodiment, a substrate having at least a pixel circuit configured on it is used as the substrate 101.

[0121] {Formation of insulating layer 121, plug 131, and conductive layer 111} An insulating film, which will become an insulating layer 121, is formed on the substrate 101. Next, an opening is formed in the insulating layer 121 that reaches the substrate 101 at the position where the plug 131 will be formed. Preferably, this opening reaches an electrode or wiring provided on the substrate 101. Subsequently, a conductive film is formed to fill the opening, and then a planarization process is performed so that the upper surface of the insulating layer 121 is exposed. This makes it possible to form a plug 131 embedded in the insulating layer 121.

[0122] A conductive film is formed on the insulating layer 121 and the plug 131, and the excess portion is removed while leaving the portion that overlaps with the plug 131, thereby forming a conductive layer 111 that electrically connects to the plug 131 (see Figure 5A). For removing the excess portion of the conductive film, an etching method may be used, for example.

[0123] {Formation of groove 170} Grooves 170 are formed in the insulating layer 121. In Figure 5A, grooves 170_1b and 170_2a are formed in the region between the conductive layer 111R and the conductive layer 111G of the insulating layer 121, grooves 170_2b and 170_3a are formed in the region between the conductive layer 111G and the conductive layer 111B, and grooves 170_3b and 170_1a are formed in the region between the conductive layer 111B and the conductive layer 111R. The grooves 170 may be formed using wet etching, but dry etching is preferable for microfabrication.

[0124] Furthermore, it is preferable that the width of the groove 170 in the A1-A2 direction is greater than twice the thickness of the EL layer formed from the film containing the luminescent compound. As a result, as will be described later, the groove 170 causes a step break in the film containing the luminescent compound, allowing the EL layer 115 to be formed on the conductive layer 111.

[0125] {Formation of light-emitting element 120R} A resist mask 151 is formed on the insulating layer 121, the conductive layer 111G, and the conductive layer 111B. At this time, the resist mask 151 is formed in the portion that overlaps with groove 170_2a, the conductive layer 111G, groove 170_2b, groove 170_3a, the conductive layer 111B, and groove 170_3b. Furthermore, one side of the resist mask 151 is located between groove 170_1b and groove 170_2a, and the other side of the resist mask 151 is located between groove 170_3b and groove 170_1a (see Figure 5B). The end of the resist mask 151 may have an inverse taper shape. An inverse taper shape refers to a case where, when the side of a layer (in this case, the resist mask 151) is observed from the cross-sectional direction (the plane perpendicular to the surface of the substrate), the angle between the side and bottom of the layer is greater than 90°. Alternatively, a reverse tapered shape is a shape that has sides or an upper part that protrudes in a direction parallel to the substrate from the bottom.

[0126] Next, a film containing the first luminescent compound and a conductive film forming the conductive layer 116R are sequentially deposited on the insulating layer 121, the conductive layer 111R, and the resist mask 151. The film containing the first luminescent compound is preferably deposited in the direction in which the groove 170 extends, inward from the end of the groove 170. In other words, it is preferable that the groove 170 extends in a region outside the end of the film containing the first luminescent compound in the direction in which the groove 170 extends. Furthermore, the conductive film is also preferably deposited on the outer side of the groove 170, beyond the end in the direction in which the groove 170 extends.

[0127] At this time, a step break occurs in the film containing the first luminescent compound due to grooves in the region that does not overlap with the resist mask 151. In Figure 5B, a step break occurs in the film containing the first luminescent compound due to grooves 170_1a and 170_1b, respectively. As a result, an EL layer 115R is formed on the conductive layer 111R, and an EL layer 115Rf is formed on the insulating layer 121 and the resist mask 151. In addition, similar to the film containing the first luminescent compound, a step break may occur in the conductive film that becomes the conductive layer 116R due to grooves in the region that does not overlap with the resist mask 151. At this time, a conductive layer 116R is formed on the EL layer 115R, and a conductive layer 116Rf is formed on the EL layer 115Rf.

[0128] Next, an insulating layer 118f is deposited on the conductive layer 116R and the conductive layer 116Rf. The insulating layer 118f can be deposited using sputtering, CVD, MBE, PLD, ALD, or other appropriate methods. In this embodiment, aluminum oxide is deposited as the insulating layer 118f by the ALD method. The insulating layer 118f needs to be deposited with good coverage on the bottom and side surfaces of the grooves 170 (here, grooves 170_1a and grooves 170_1b) provided in the insulating layer 121. Since deposition by the ALD method allows for the deposition of atomic layers one by one on the bottom and side surfaces of the grooves 170, the insulating layer 118f can be deposited with good coverage on the grooves 170.

[0129] For example, when depositing aluminum oxide films using the ALD method, two types of gases are used: a raw material gas obtained by vaporizing a liquid containing a solvent and an aluminum precursor compound (such as trimethylaluminum (TMA, Al(CH3)3)), and H2O as an oxidizing agent. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate).

[0130] Next, a resist mask 152 is formed on the insulating layer 118f. At this time, the resist mask 152 is formed in the portion that overlaps with groove 170_1a, the conductive layer 111R, and groove 170_1b. Furthermore, one side of the resist mask 152 is located between groove 170_3b and groove 170_1a, and the other side of the resist mask 152 is located between groove 170_1b and groove 170_2a (see Figure 5B). The end of the resist mask 152 may have an inverse tapered shape.

[0131] Next, the insulating layer 118 can be formed by removing the insulating layer 118f that is not covered by the resist mask 152 (see Figure 5C). Dry etching or wet etching can be used to remove a portion of the insulating layer 118f. The conductive layer 116Rf that is not covered by the resist mask 152 may also be removed. In this case, the removal of the insulating layer 118f and the conductive layer 116Rf that are not covered by the resist mask 152 may be carried out under the same conditions or under different conditions.

[0132] Next, the resist mask 152 and resist mask 151 are removed. At this time, the EL layer 115Rf not covered by the resist mask 152 is also removed. If the conductive layer 116Rf not covered by the resist mask 152 is not removed by the etching process described above, then in addition to the EL layer 115Rf not covered by the resist mask 152, the conductive layer 116Rf not covered by the resist mask 152 is also removed.

[0133] Based on the above, a light-emitting element 120R sealed with insulating layer 121 and insulating layer 118 can be formed (see Figure 5D). Note that the conductive layer 116Rf and EL layer 115Rf in the parts that overlap with the resist mask 152 and do not overlap with the conductive layer 111R may be removed.

[0134] {Formation of light-emitting element 120G} A resist mask 151 is formed on the insulating layer 121, the conductive layer 111B, and the insulating layer 118. At this time, the resist mask 151 is formed in the portion that overlaps with the insulating layer 118, groove 170_3a, conductive layer 111B, and groove 170_3b. Furthermore, one side of the resist mask 151 is located between groove 170_2b and groove 170_3a, and the other side of the resist mask 151 is located between groove 170_1b and groove 170_2a. (See Figure 6A.) The end of the resist mask 151 may have an inverse tapered shape.

[0135] Next, a film containing the second luminescent compound and a conductive film forming the conductive layer 116G are sequentially deposited on the insulating layer 121, the conductive layer 111G, and the resist mask 151. The film containing the second luminescent compound is preferably deposited in the direction in which the groove 170 extends, inward from the end of the groove 170. In other words, it is preferable that the groove 170 extends in a region outside the end of the film containing the second luminescent compound in the direction in which the groove 170 extends. Furthermore, the conductive film is also preferably deposited on the outer side of the groove 170, beyond the end in the direction in which the groove 170 extends.

[0136] At this time, a step break occurs in the film containing the second luminescent compound due to grooves in the region that does not overlap with the resist mask 151. In Figure 6A, a step break occurs in the film containing the second luminescent compound due to grooves 170_2a and 170_2b, respectively. As a result, the EL layer 115G is formed on the conductive layer 111G, and the EL layer 115Gf is formed on the insulating layer 121 and the resist mask 151. In addition, similar to the film containing the second luminescent compound, a step break may occur in the conductive film that becomes the conductive layer 116G due to grooves in the region that does not overlap with the resist mask 151. At this time, the conductive layer 116G is formed on the EL layer 115G, and the conductive layer 116Gf is formed on the EL layer 115Gf.

[0137] Next, an insulating layer 118f is deposited on the conductive layer 116G and the conductive layer 116Gf. The insulating layer 118f can be deposited using sputtering, CVD, MBE, PLD, ALD, or other appropriate methods. In this embodiment, aluminum oxide is deposited as the insulating layer 118f by the ALD method. As described above, this allows the insulating layer 118f to be deposited with good coverage over the grooves 170 (here, grooves 170_2a and grooves 170_2b).

[0138] Next, a resist mask 152 is formed on the insulating layer 118f. At this time, the resist mask 152 is formed in the portion that overlaps with groove 170_2a, the conductive layer 111G, and groove 170_2b. Furthermore, one side of the resist mask 152 is located between groove 170_1b and groove 170_2a, and the other side of the resist mask 152 is located between groove 170_2b and groove 170_3a (see Figure 6A). The end of the resist mask 152 may have an inverse tapered shape.

[0139] Next, the insulating layer 118 can be formed by removing the insulating layer 118f that is not covered by the resist mask 152 (see Figure 6B). Dry etching or wet etching can be used to remove a portion of the insulating layer 118f. The conductive layer 116Gf that is not covered by the resist mask 152 may also be removed. In this case, the removal of the insulating layer 118f and the conductive layer 116Gf that are not covered by the resist mask 152 may be carried out under the same conditions or under different conditions.

[0140] Next, the resist mask 152 and resist mask 151 are removed. At this time, the EL layer 115Gf not covered by the resist mask 152 is also removed. If the conductive layer 116Gf not covered by the resist mask 152 is not removed by the etching process described above, then in addition to the EL layer 115Gf not covered by the resist mask 152, the conductive layer 116Gf not covered by the resist mask 152 is also removed.

[0141] Based on the above, a light-emitting element 120G sealed with insulating layer 121 and insulating layer 118 can be formed (see Figure 6C). Note that the conductive layer 116Gf and EL layer 115Gf in the parts that overlap with the resist mask 152 and do not overlap with the conductive layer 111G may be removed.

[0142] {Formation of light-emitting element 120B} A resist mask 151 is formed on the insulating layer 121 and on the insulating layer 118. At this time, the resist mask 151 is formed in the portion that overlaps with the insulating layer 118. Furthermore, one side of the resist mask 151 is located between groove 170_3b and groove 170_1a, and the other side of the resist mask 151 is located between groove 170_2b and groove 170_3a (see Figure 7A). The end of the resist mask 151 may have an inverse tapered shape.

[0143] Next, a film containing a third luminescent compound and a conductive film that will become the conductive layer 116B are sequentially deposited on the insulating layer 121 and the resist mask 151. The film containing the third luminescent compound is preferably deposited in the direction in which the groove 170 extends, inward from the end of the groove 170. In other words, it is preferable that the groove 170 extends in a region outside the end of the film containing the third luminescent compound in the direction in which the groove 170 extends. Furthermore, the conductive film is also preferably deposited on the outer side of the groove 170, beyond the end in the direction in which the groove 170 extends.

[0144] At this time, a step break occurs in the film containing the third luminescent compound due to grooves in the region that does not overlap with the resist mask 151. In Figure 7A, a step break occurs in the film containing the third luminescent compound due to grooves 170_3a and 170_3b, respectively. As a result, the EL layer 115B is formed on the conductive layer 111B, and the EL layer 115Bf is formed on the insulating layer 121 and the resist mask 151. In addition, similar to the film containing the third luminescent compound, a step break may occur in the conductive film that becomes the conductive layer 116B due to grooves in the region that does not overlap with the resist mask 151. At this time, the conductive layer 116B is formed on the EL layer 115B, and the conductive layer 116Bf is formed on the EL layer 115Bf.

[0145] Next, an insulating layer 118f is deposited on the conductive layer 116B and the conductive layer 116Bf. The insulating layer 118f can be deposited using sputtering, CVD, MBE, PLD, ALD, or other appropriate methods. In this embodiment, aluminum oxide is deposited as the insulating layer 118f by the ALD method. As described above, this allows the insulating layer 118f to be deposited with good coverage over the grooves 170 (here, grooves 170_3a and grooves 170_3b).

[0146] Next, a resist mask 152 is formed on the insulating layer 118f. At this time, the resist mask 152 is formed in the portion that overlaps with groove 170_3a, the conductive layer 111B, and groove 170_3b. Furthermore, one side of the resist mask 152 is located between groove 170_2b and groove 170_3a, and the other side of the resist mask 152 is located between groove 170_3b and groove 170_1a (see Figure 7A). The end of the resist mask 152 may have an inverse tapered shape.

[0147] Next, the insulating layer 118 can be formed by removing the insulating layer 118f that is not covered by the resist mask 152 (see Figure 7B). Dry etching or wet etching can be used to remove a portion of the insulating layer 118f. Alternatively, the conductive layer 116Bf that is not covered by the resist mask 152 may be removed. In this case, the removal of the insulating layer 118f and the conductive layer 116Bf that are not covered by the resist mask 152 may be carried out under the same conditions or under different conditions.

[0148] Next, the resist mask 152 and resist mask 151 are removed. At this time, the EL layer 115Bf not covered by the resist mask 152 is also removed. If the conductive layer 116Bf not covered by the resist mask 152 is not removed by the etching process described above, then in addition to the EL layer 115Bf not covered by the resist mask 152, the conductive layer 116Bf not covered by the resist mask 152 is also removed.

[0149] Based on the above, a light-emitting element 120B sealed with insulating layer 121 and insulating layer 118 can be formed (see Figure 7C). Note that the conductive layer 116Bf and EL layer 115Bf in the parts that overlap with the resist mask 152 and do not overlap with the conductive layer 111B may be removed.

[0150] As described above, the light-emitting element 120R, light-emitting element 120G, and light-emitting element 120B can be formed. Note that the order in which the light-emitting elements 120R, 120G, and 120B are formed is not limited to the above. For example, they may be formed in the order of light-emitting element 120R, light-emitting element 120B, and light-emitting element 120G. Alternatively, they may be formed starting with light-emitting element 120G, or starting with light-emitting element 120B.

[0151] Furthermore, the manufacturing method should be appropriately adjusted according to the number of light colors emitted by the light-emitting element 120 included in the display device 100A. For example, if the light-emitting element 120 included in the display device 100A emits two colors of light, a resist mask 151 should be formed on one of the two conductive layers 111 and on the portion overlapping with a groove provided nearby thereto, and a resist mask 152 should be formed on the other of the two conductive layers 111 and on the portion overlapping with a groove provided nearby thereto. Alternatively, if the light-emitting element 120 included in the display device 100A emits four colors of light, a resist mask 151 should be formed on three of the four conductive layers 111 and on the portions overlapping with grooves provided nearby thereto, and a resist mask 152 should be formed on the remaining conductive layer 111 and on the portion overlapping with a groove provided nearby thereto.

[0152] According to the above example of the manufacturing method, the EL layer 115 is sealed by the insulating layer 121 and the insulating layer 118, and is therefore not exposed to the chemicals used when removing the resist mask. Thus, the light-emitting element 120 can be formed without using a metal mask for the deposition of the EL layer 115 and the conductive layer 116.

[0153] According to the above example of manufacturing method, the difference in optical distance between the conductive layer 111 and the conductive layer 116 can be precisely controlled by the thickness of the EL layer 115. As a result, color shifts in each light-emitting element are less likely to occur, and a display device with excellent color reproduction and extremely high display quality can be easily manufactured.

[0154] Furthermore, the light-emitting element 120 can be formed on an insulating layer 121 with a flattened upper surface. In addition, the lower electrode (conductive layer 111) of the light-emitting element 120 can be electrically connected to the pixel circuit of the substrate 101 via a plug 131, making it possible to form extremely fine pixels and realize an extremely high-definition display device. Moreover, since the light-emitting element 120 can be arranged in overlapping place with the pixel circuit or driving circuit, a display device with a high aperture ratio (effective light-emitting area ratio) can be realized.

[0155] [Example of manufacturing method 2] In the following explanation, we will use the display device 100D, which was illustrated in the above configuration example, as an example.

[0156] In the following sections, we may refer to and omit explanations of parts that overlap with the above-mentioned manufacturing method example 1.

[0157] {Preparation of substrate 101} Similarly to the above, a substrate having at least a pixel circuit configured on it is used as substrate 101.

[0158] {Formation of insulating layer 121, plug 131, and conductive layer 111} Next, the insulating layer 121, the plug 131, and the conductive layer 111 are formed (see Figure 8A). The insulating layer 121, the plug 131, and the conductive layer 111 can be formed by the same method as described above.

[0159] {Formation of insulating layer 119} An insulating film 119f, which will become the insulating layer 119, is deposited on the insulating layer 121 and the conductive layer 111 (see Figure 8B). The insulating film 119f can be deposited using sputtering, CVD, MBE, PLD, ALD, or other appropriate methods.

[0160] Next, anisotropic etching is performed on the insulating film 119f to form an insulating layer 119 that is in contact with the side surface of the conductive layer 111 (see Figure 8C). At this point, at least a portion of the insulating film 119f is removed, and at least a portion of the upper surface of the conductive layer 111 is exposed. For anisotropic etching, a dry etching method, for example, may be used.

[0161] {Formation of groove 170} Next, grooves 170 are formed in the insulating layer 121. The grooves 170 can be formed by the same method as described above.

[0162] {Formation of light-emitting elements 120R, 120G, and 120B} Next, the light-emitting element 120R, light-emitting element 120G, and light-emitting element 120B are formed on the insulating layer 121. The light-emitting element 120R, light-emitting element 120G, and light-emitting element 120B can be formed by the same method as described above.

[0163] According to the above example of manufacturing method, a display device with extremely high display quality can be easily manufactured, as described above, depending on the thickness of the EL layer 115.

[0164] Furthermore, the light-emitting element 120 can be formed on an insulating layer 121 with a flattened upper surface. Also, since the lower electrode (conductive layer 111) of the light-emitting element 120 can be electrically connected to the pixel circuit of the substrate 101 via a plug 131, it is possible to configure extremely fine pixels and realize an extremely high-definition display device. In addition, since the light-emitting element 120 can be arranged in overlapping place with the pixel circuit or driving circuit, a display device with a high aperture ratio (effective light-emitting area ratio) can be realized.

[0165] In addition, in one embodiment of the present invention, the aspect ratio of the display unit of the display device is not particularly limited. For example, the display device can accommodate various aspect ratios such as 1:1 (square), 3:4, 16:9, and 16:10.

[0166] [Differentiation] The following describes a modified version of the display device that differs in some configurations from the one described above.

[0167] In the following sections, we may refer to the above-mentioned Configuration Example 1 and omit explanations where necessary.

[0168] [Variation 1] Figures 9A and 9B illustrate a display device according to one embodiment of the present invention. Figure 9A is a schematic top view of the display device 100F, and Figure 9B is a schematic cross-sectional view of the display device 100F. Here, Figure 9B is a cross-sectional view of the area indicated by the dashed line A1-A2 in Figure 9A. Note that some elements have been omitted from the top view of Figure 9A for clarity.

[0169] The display device 100F differs from the display device 100A mainly in that it has one groove between adjacent light-emitting elements of different colors, and it has an insulating layer 117.

[0170] In the region of the insulating layer 121 located between two adjacent conductive layers 111 in the A1-A2 direction (y direction) as shown in Figure 9A, one groove is provided. As shown in Figures 9A and 9B, a groove 175_2 is provided between the light-emitting element 120R and the light-emitting element 120G, a groove 175_3 is provided between the light-emitting element 120G and the light-emitting element 120B, and a groove 175_1 is provided between the light-emitting element 120B and the light-emitting element 120R.

[0171] In the following, when explaining matters common to grooves 175_1, 175_2, and 175_3, the symbols attached to the reference numerals may be omitted, and the groove may simply be referred to as groove 175.

[0172] Preferably, a portion of the groove 175 is located below the conductive layer 111. For example, as shown in Figure 9B, the groove 175 preferably has a downwardly convex semicircular shape in a cross-sectional view of the display device 100F. By making the groove 175 this shape, the EL layer 115 and the conductive layer 116 can be separated between adjacent light-emitting elements of different colors without using a shadow mask such as a metal mask. This prevents leakage current between adjacent light-emitting elements of different colors. Therefore, the light emission caused by the leakage current can be suppressed, and a display with high contrast can be achieved. Furthermore, even when the resolution is increased, a highly conductive material can be used for the EL layer 115, which broadens the range of material selection and makes it easier to improve efficiency, reduce power consumption, and improve reliability.

[0173] The groove 175 has a first region, a second region, and a third region located between the first and second regions. In other words, the first region and the second region do not overlap. The first region is located on one side of two adjacent light-emitting elements of different colors, and the second region is located on the other side of two adjacent light-emitting elements of different colors. For example, a groove 175_2 provided between a light-emitting element 120R and a light-emitting element 120G has a first region located on the side of the light-emitting element 120R and a second region located on the side of the light-emitting element 120G. In this case, the insulating layer 118 on the light-emitting element 120R has a region that overlaps with the first region of the groove 175_2, and the insulating layer 118 on the light-emitting element 120G has a region that overlaps with the second region of the groove 175_2.

[0174] The width of the groove 175 in the region that does not overlap with the conductive layer 111 in the A1-A2 direction (width W1 shown in Figure 9B) should be appropriately adjusted according to the processing accuracy when using the photolithography method, the film thickness of the EL layer 115, the film thickness of the conductive layer 116, etc. For example, the width of the groove 175 in the region that does not overlap with the conductive layer 111 in the A1-A2 direction (width W1) should be 300 nm or more and 1200 nm or less, preferably 400 nm or more and 1000 nm or less, and more preferably 500 nm or more and 900 nm or less. As a result, it is possible to realize an extremely high-definition display device in which pixels having one or more light-emitting elements have a resolution of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and are arranged with a resolution of 20000 ppi or less, or 30000 ppi or less. In the display device 100F shown in Figure 9B, the width W1 can be rephrased as the shortest distance between the edges of the opposing conductive layers 111.

[0175] In the display device 100F, an insulating layer 117 is provided between the conductive layers 111, covering the edges of the conductive layers 111. The insulating layer 117 may be called a bank, partition, barrier, or dam. The insulating layer 117 has the function of preventing the conductive layer 116 from being electrically short-circuited due to the thinning of the EL layer 115 caused by the step at the edge of the conductive layer 111. In addition, to improve the coverage of the EL layer 115, the edges of the insulating layer 117 located on the conductive layer 111 may have a tapered shape. The insulating layer 117 is located between adjacent light-emitting elements 120, covering the edges of the conductive layer 111 of each light-emitting element 120. In Figure 9B, the insulating layer 117 is located between the light-emitting element 120R and the light-emitting element 120G, covering the respective edges of the conductive layer 111R and the conductive layer 111G. Furthermore, the insulating layer 117 is located between the light-emitting element 120G and the light-emitting element 120B, and covers the respective ends of the conductive layer 111G and the conductive layer 111B. Also, the insulating layer 117 is located between the light-emitting element 120B and the light-emitting element 120R, and covers the respective ends of the conductive layer 111B and the conductive layer 111R.

[0176] Furthermore, in a cross-sectional view in the A1-A2 direction, the insulating layer 118 has a region below the light-emitting element 120 that is in contact with the insulating layer 121 via the insulating layer 117. In other words, in the display device 100F, the light-emitting element 120 is sealed by the insulating layer 121, the insulating layer 117, and the insulating layer 118. The insulating layer 118 functions as a protective layer that prevents impurities such as water from diffusing into the light-emitting element. It is preferable to use an inorganic insulating film with low moisture permeability, such as a silicon oxide film, a silicon nitride film, or an aluminum oxide film, for the insulating layer 118. When aluminum oxide is used for the insulating layer 118, the insulating layer 118 becomes an insulating layer having aluminum and oxygen.

[0177] [Variation 2] Figures 10A and 10B are schematic cross-sectional views of the display device 100G and the display device 100H, respectively. The display device 100G and the display device 100H differ from the display device 100F in that the shape of the groove 175 provided in the insulating layer 121 is different.

[0178] The groove 175, in a cross-sectional view of the display device, has a region having a first width and a region having a second width, wherein the first width is smaller than the shortest distance between the edges of the opposing conductive layers 111, and the second width is larger than the first width. By shaping the groove 175 in this way, the EL layer 115 and the conductive layer 116 can be separated between adjacent light-emitting elements of different colors without using a shadow mask such as a metal mask. This prevents leakage current between adjacent light-emitting elements of different colors. Therefore, as described above, a display with high contrast can be achieved. Furthermore, it becomes easier to improve efficiency, reduce power consumption, and improve reliability.

[0179] Figure 10C shows a schematic cross-sectional view of the groove 175 and its vicinity of the display device 100G. Note that some elements have been omitted in Figure 10C for clarity. The first width corresponds to the width W2 shown in Figure 10C, the second width corresponds to the width W3 shown in Figure 10C, and the shortest distance between the ends of the opposing conductive layers 111 corresponds to the distance W4. As described above, it is preferable that the width W2 is smaller than the distance W4, and the width W3 is larger than the width W2.

[0180] For example, as shown in Figure 10A, the groove 175 of the display device 100G may have a cross shape in a cross-sectional view of the display device 100G. Also, for example, as shown in Figure 10B, the groove 175 of the display device 100H may have an inverted T shape in a cross-sectional view of the display device 100H.

[0181] Furthermore, if the groove 175 has the cross shape shown in Figure 10A or the inverted T shape shown in Figure 10B, the groove 175 does not have to be located below the conductive layer 111. In other words, the second width (width W3) may be smaller than the shortest distance (distance W4) between the ends of the conductive layers 111 facing each other. That is, the relative magnitudes of width W3 and distance W4 are not relevant.

[0182] As shown in Figures 10A and 10B, the insulating layer 121 is preferably a laminated structure of insulating layer 121a, insulating layer 121b, and insulating layer 121c. Furthermore, it is preferable that the materials used for insulating layer 121a and insulating layer 121c and the material used for insulating layer 121b have different etching rates. With this configuration, grooves 175 having the shape shown in Figures 10A and 10B can be formed.

[0183] The shape of the groove 175 is not limited to the shapes described in Modification 1 and Modification 2, and a part of the groove 175 may be located below the conductive layer 111. Alternatively, the groove 175 may have two or more regions of different widths. For example, in a cross-sectional view of the display device, the groove 175 may have a concave curved shape, or its bottom surface may be flat and its side walls may have a downwardly convex semicircular shape, or it may have a T-shape. Depending on the shape of the groove 175, the insulating layer 121 may be provided as a single layer or as a laminated structure of two or more layers.

[0184] [Example of manufacturing method 3] In the following, an example of a method for manufacturing a display device according to one aspect of the present invention will be described using the display device 100F, which was illustrated in the above modified example, as an example.

[0185] In the following, we may refer to or omit explanations of parts that overlap with the above-mentioned manufacturing method example 1 or manufacturing method example 2.

[0186] {Preparation of substrate 101} Similarly to the above, a substrate having at least a pixel circuit configured on it is used as substrate 101.

[0187] {Formation of insulating layer 121, plug 131, and conductive layer 111} Next, the insulating layer 121, the plug 131, and the conductive layer 111 are formed (see Figure 8(A)). The insulating layer 121, the plug 131, and the conductive layer 111 can be formed by the same method as described above.

[0188] {Formation of groove 175} Next, grooves 175 are formed in the insulating layer 121 (see Figure 11A). An isotropic etching method can be used to form the grooves 175. For example, wet etching or isotropic plasma etching can be used. Wet etching is particularly preferred. This allows for the formation of grooves 175, some of which are located below the conductive layer 111.

[0189] Furthermore, one groove 175 is provided between light-emitting elements of different colors. As shown in Figure 11A, groove 175_2 is provided between conductive layer 111R and conductive layer 111G, groove 175_3 is provided between conductive layer 111G and conductive layer 111B, and groove 175_1 is provided between conductive layer 111B and conductive layer 111R.

[0190] {Formation of insulating layer 117} Next, an insulating film is formed to cover the conductive layer 111 and the insulating layer 121, and the unnecessary portion of the insulating film is removed to form an insulating layer 117 that covers the edge of the conductive layer 111 (see Figure 11A). The unnecessary portion of the insulating film can be removed, for example, by etching. The edge of the insulating layer 117 on the conductive layer 111 is preferably processed to have a tapered shape. The taper angle of the edge of the insulating layer 117 (the angle between the formed surface and the end face) is preferably greater than 0 degrees and 60 degrees or less, preferably 5 degrees or more and 45 degrees or less, and more preferably 5 degrees or more and 30 degrees or less.

[0191] The insulating layer 117 can be formed from an organic insulating film or an inorganic insulating film. In particular, when making an ultra-high-resolution (e.g., 2000 ppi or more) display device, it is preferable to use an inorganic insulating film.

[0192] {Formation of light-emitting element 120R} A resist mask 151 is formed on the insulating layer 117, the conductive layer 111G, and the conductive layer 111B. At this time, the resist mask 151 is formed in the portion that overlaps with a part of groove 175_2, the conductive layer 111G, groove 175_3, the conductive layer 111B, and a part of groove 175_1. Furthermore, the side surface of the resist mask 151 located in groove 175_2 is located on the conductive layer 111G side of the midpoint between the shortest distance between the opposing sides of the conductive layer 111R and the conductive layer 111G, and the side surface of the resist mask 151 located in groove 175_3 is located on the conductive layer 111B side of the midpoint between the shortest distance between the opposing sides of the conductive layer 111B and the conductive layer 111R (see Figure 11B). The ends of the resist mask 151 may have an inverse tapered shape.

[0193] Next, a film containing the first luminescent compound and a conductive film forming the conductive layer 116R are sequentially deposited on the insulating layer 117, the conductive layer 111R, and the resist mask 151. The film containing the first luminescent compound is preferably deposited in the direction in which the groove 175 extends, inward from the end of the groove 175. In other words, it is preferable that the groove 175 extends in a region outside the end of the film containing the first luminescent compound in the direction in which the groove 175 extends. Furthermore, the conductive film is also preferably deposited on the outer side of the groove 175, beyond the end in the direction in which the groove 175 extends.

[0194] At this time, a step break occurs in the film containing the first luminescent compound due to grooves in the region that does not overlap with the resist mask 151. In Figure 11B, a step break occurs in the film containing the first luminescent compound due to grooves 175_1 and 175_2, respectively. As a result, an EL layer 115R is formed on the conductive layer 111R, and an EL layer 115Rf is formed on the insulating layer 117 and the resist mask 151. In addition, similar to the film containing the first luminescent compound, a step break may occur in the conductive film that becomes the conductive layer 116R due to grooves in the region that does not overlap with the resist mask 151. At this time, a conductive layer 116R is formed on the EL layer 115R, and a conductive layer 116Rf is formed on the EL layer 115Rf.

[0195] Next, an insulating layer 118f is deposited on the conductive layer 116R and the conductive layer 116Rf. The insulating layer 118f can be deposited using sputtering, CVD, MBE, PLD, ALD, or other appropriate methods. In this embodiment, aluminum oxide is deposited as the insulating layer 118f by the ALD method. The insulating layer 118f needs to be deposited with good coverage on the bottom and side surfaces of the grooves 175 (here, grooves 175_1 and grooves 175_2) provided in the insulating layer 121, via the insulating layer 117. Since deposition by the ALD method allows for the deposition of atomic layers one by one on the bottom and side surfaces of the grooves 175, the insulating layer 118f can be deposited with good coverage on the grooves 175.

[0196] Next, a resist mask 152 is formed on the insulating layer 118f. At this time, the resist mask 152 is formed in the portion that overlaps with a part of groove 175_1, the conductive layer 111R, and a part of groove 175_2. Furthermore, the side surface of the resist mask 152 located in groove 175_1 is located on the conductive layer 111R side of the midpoint between the shortest distance between the opposing sides of conductive layer 111B and conductive layer 111R, and the side surface of the resist mask 152 located in groove 175_2 is located on the conductive layer 111R side of the midpoint between the shortest distance between the opposing sides of conductive layer 111R and conductive layer 111G (see Figure 11B). The ends of the resist mask 152 may have an inverse tapered shape.

[0197] Next, the insulating layer 118 can be formed by removing the insulating layer 118f that is not covered by the resist mask 152 (see Figure 11C). Dry etching or wet etching can be used to remove a portion of the insulating layer 118f. The conductive layer 116Rf that is not covered by the resist mask 152 may also be removed. In this case, the removal of the insulating layer 118f and the conductive layer 116Rf that are not covered by the resist mask 152 may be carried out under the same conditions or under different conditions.

[0198] Next, the resist mask 152 and resist mask 151 are removed. At this time, the EL layer 115Rf not covered by the resist mask 152 is also removed. If the conductive layer 116Rf not covered by the resist mask 152 is not removed by the etching process described above, then in addition to the EL layer 115Rf not covered by the resist mask 152, the conductive layer 116Rf not covered by the resist mask 152 is also removed.

[0199] Based on the above, a light-emitting element 120R sealed with insulating layer 121, insulating layer 117, and insulating layer 118 can be formed (see Figure 11D). Note that the conductive layer 116Rf and EL layer 115Rf in the parts that overlap with the resist mask 152 and do not overlap with the conductive layer 111R may be removed.

[0200] {Formation of light-emitting element 120G} A resist mask 151 is formed on the insulating layer 117, the conductive layer 111B, and the insulating layer 118. At this time, the resist mask 151 is formed in the portion that overlaps with a part of groove 175_3, the conductive layer 111B, groove 175_1, the insulating layer 118, and a part of groove 175_2. Furthermore, the side surface of the resist mask 151 located in groove 175_3 is located on the conductive layer 111B side of the midpoint between the shortest distance between the opposing sides of conductive layer 111G and conductive layer 111B, and the side surface of the resist mask 151 located in groove 175_2 is located on the conductive layer 111R side of the midpoint between the shortest distance between the opposing sides of conductive layer 111R and conductive layer 111G (see Figure 12A). The ends of the resist mask 151 may have an inverse tapered shape.

[0201] Next, a film containing the second luminescent compound and a conductive film forming the conductive layer 116G are sequentially deposited on the insulating layer 117, the conductive layer 111G, and the resist mask 151. The film containing the second luminescent compound is preferably deposited in the direction in which the groove 175 extends, inward from the end of the groove 175. In other words, it is preferable that the groove 175 extends in a region outside the end of the film containing the second luminescent compound in the direction in which the groove 175 extends. Furthermore, the conductive film may also be deposited on the outer side of the groove 175, beyond the end in the direction in which the groove 175 extends.

[0202] At this time, a step break occurs in the film containing the second luminescent compound due to grooves in the region that does not overlap with the resist mask 151. In Figure 12A, a step break occurs in the film containing the second luminescent compound due to grooves 175_2 and 175_3, respectively. As a result, the EL layer 115G is formed on the conductive layer 111G, and the EL layer 115Gf is formed on the insulating layer 117 and the resist mask 151. In addition, similar to the film containing the second luminescent compound, a step break may occur in the conductive film that becomes the conductive layer 116G due to grooves in the region that does not overlap with the resist mask 151. At this time, the conductive layer 116G is formed on the EL layer 115G, and the conductive layer 116Gf is formed on the EL layer 115Gf.

[0203] Next, an insulating layer 118f is deposited on the conductive layer 116G and the conductive layer 116Gf. The insulating layer 118f can be deposited using sputtering, CVD, MBE, PLD, ALD, or other appropriate methods. In this embodiment, aluminum oxide is deposited as the insulating layer 118f by the ALD method. As described above, this allows the insulating layer 118f to be deposited with good coverage over the grooves 175 (grooves 175_2 and 175_3 in this case).

[0204] Next, a resist mask 152 is formed on the insulating layer 118f. At this time, the resist mask 152 is formed in the portion that overlaps with a part of groove 175_2, the conductive layer 111G, and a part of groove 175_3. Furthermore, the side surface of the resist mask 152 located in groove 175_2 is located on the conductive layer 111G side of the midpoint between the shortest distance between the opposing sides of conductive layer 111R and conductive layer 111G, and the side surface of the resist mask 152 located in groove 175_3 is located on the conductive layer 111G side of the midpoint between the shortest distance between the opposing sides of conductive layer 111G and conductive layer 111B (see Figure 12A). The ends of the resist mask 152 may have an inverse tapered shape.

[0205] Next, the insulating layer 118 can be formed by removing the insulating layer 118f that is not covered by the resist mask 152 (see Figure 12B). Dry etching or wet etching can be used to remove a portion of the insulating layer 118f. Alternatively, the conductive layer 116Gf that is not covered by the resist mask 152 may be removed. In this case, the removal of the insulating layer 118f and the conductive layer 116Gf that are not covered by the resist mask 152 may be carried out under the same conditions or under different conditions.

[0206] Next, the resist mask 152 and resist mask 151 are removed. At this time, the EL layer 115Gf not covered by the resist mask 152 is also removed. If the conductive layer 116Gf not covered by the resist mask 152 is not removed by the etching process described above, then in addition to the EL layer 115Gf not covered by the resist mask 152, the conductive layer 116Gf not covered by the resist mask 152 is also removed.

[0207] Based on the above, a light-emitting element 120G sealed with insulating layer 121, insulating layer 117, and insulating layer 118 can be formed (see Figure 12C). Note that conductive layer 116Gf and EL layer 115Gf in areas that overlap with the resist mask 152 and do not overlap with conductive layer 111G may be removed.

[0208] {Formation of light-emitting element 120B} A resist mask 151 is formed on the insulating layer 117 and on the insulating layer 118. At this time, the resist mask 151 is formed in the portion that overlaps with a part of groove 175_1, the insulating layer 118, groove 175_2, and a part of groove 175_3. Furthermore, the side surface of the resist mask 151 located in groove 175_1 is located on the conductive layer 111R side of the midpoint between the shortest distance between the opposing sides of conductive layer 111B and conductive layer 111R, and the side surface of the resist mask 151 located in groove 175_3 is located on the conductive layer 111G side of the midpoint between the shortest distance between the opposing sides of conductive layer 111G and conductive layer 111B (see Figure 13A). The ends of the resist mask 151 may have an inverse tapered shape.

[0209] Next, a film containing the third luminescent compound and a conductive film that will become the conductive layer 116B are sequentially deposited on the insulating layer 117, the conductive layer 111B, and the resist mask 151. The film containing the third luminescent compound is preferably deposited in the direction in which the groove 175 extends, inward from the end of the groove 175. In other words, it is preferable that the groove 175 extends in a region outward from the end of the film containing the third luminescent compound in the direction in which the groove 175 extends. Furthermore, the conductive film may also be deposited on the outer side of the groove 175, beyond the end in the direction in which the groove 175 extends.

[0210] At this time, a step break occurs in the film containing the third luminescent compound due to grooves in the region that does not overlap with the resist mask 151. In Figure 13A, a step break occurs in the film containing the second luminescent compound due to grooves 175_3 and 175_1, respectively. As a result, the EL layer 115B is formed on the conductive layer 111B, and the EL layer 115Bf is formed on the insulating layer 117 and the resist mask 151. In addition, similar to the film containing the third luminescent compound, a step break may occur in the conductive film that becomes the conductive layer 116B in grooves in the region that does not overlap with the resist mask 151. At this time, the conductive layer 116B is formed on the EL layer 115B, and the conductive layer 116Bf is formed on the EL layer 115Bf.

[0211] Next, an insulating layer 118f is deposited on the conductive layer 116B and the conductive layer 116Bf. The insulating layer 118f can be deposited using sputtering, CVD, MBE, PLD, ALD, or other appropriate methods. In this embodiment, aluminum oxide is deposited as the insulating layer 118f by the ALD method. As described above, this allows the insulating layer 118f to be deposited with good coverage over the grooves 175 (here, grooves 175_3 and 175_1).

[0212] Next, a resist mask 152 is formed on the insulating layer 118f. At this time, the resist mask 152 is formed in the portion that overlaps with a part of groove 175_3, the conductive layer 111B, and a part of groove 175_1. Furthermore, the side surface of the resist mask 152 located in groove 175_3 is located on the conductive layer 111B side of the midpoint between the shortest distance between the opposing sides of conductive layer 111G and conductive layer 111B, and the side surface of the resist mask 152 located in groove 175_1 is located on the conductive layer 111B side of the midpoint between the shortest distance between the opposing sides of conductive layer 111B and conductive layer 111R (see Figure 13A). The ends of the resist mask 152 may have an inverse tapered shape.

[0213] Next, the insulating layer 118 can be formed by removing the insulating layer 118f that is not covered by the resist mask 152 (see Figure 13B). Dry etching or wet etching can be used to remove a portion of the insulating layer 118f. Alternatively, the conductive layer 116Bf that is not covered by the resist mask 152 may be removed. In this case, the removal of the insulating layer 118f and the conductive layer 116Bf that are not covered by the resist mask 152 may be carried out under the same conditions or under different conditions.

[0214] Next, the resist mask 152 and resist mask 151 are removed. At this time, the EL layer 115Bf not covered by the resist mask 152 is also removed. If the conductive layer 116Bf not covered by the resist mask 152 is not removed by the etching process described above, then in addition to the EL layer 115Bf not covered by the resist mask 152, the conductive layer 116Bf not covered by the resist mask 152 is also removed.

[0215] Based on the above, a light-emitting element 120B sealed with insulating layer 121, insulating layer 117, and insulating layer 118 can be formed (see Figure 13C). Note that conductive layer 116Bf and EL layer 115Bf in the parts that overlap with the resist mask 152 and do not overlap with conductive layer 111B may be removed.

[0216] As described above, the light-emitting element 120R, light-emitting element 120G, and light-emitting element 120B can be formed. Note that the order in which the light-emitting elements 120R, 120G, and 120B are formed is not limited to the above. For example, they may be formed in the order of light-emitting element 120R, light-emitting element 120B, and light-emitting element 120G. Alternatively, they may be formed starting with light-emitting element 120G, or starting with light-emitting element 120B.

[0217] According to the above example of the manufacturing method, the EL layer 115 is sealed by the insulating layer 121, insulating layer 117, and insulating layer 118, so it is not exposed to the chemicals used when removing the resist mask. Therefore, the light-emitting element 120 can be formed without using a metal mask for the deposition of the EL layer 115 and the conductive layer 116.

[0218] According to the above example of manufacturing method, a display device with extremely high display quality can be easily manufactured, as described above, depending on the thickness of the EL layer 115.

[0219] Furthermore, the light-emitting element 120 can be formed on an insulating layer 121 with a flattened upper surface. Also, since the lower electrode (conductive layer 111) of the light-emitting element 120 can be electrically connected to the pixel circuit of the substrate 101 via a plug 131, it is possible to configure extremely fine pixels and realize an extremely high-definition display device. In addition, since the light-emitting element 120 can be arranged in overlapping place with the pixel circuit or driving circuit, a display device with a high aperture ratio (effective light-emitting area ratio) can be realized.

[0220] The above is an explanation of the variations.

[0221] [Configuration Example 2] The following describes an example of a display device that has transistors.

[0222] [Configuration Example 2-1] Figure 14 is a schematic cross-sectional view of the display device 200A.

[0223] The display device 200A includes a substrate 201, light-emitting elements 120R, 120G, 120B, a capacitive element 240, a transistor 210, and the like.

[0224] The stacked structure from substrate 201 to capacitive element 240 corresponds to substrate 101 in the above configuration example 1 and the above modified example.

[0225] The transistor 210 is a transistor in which a channel region is formed on a substrate 201. The substrate 201 can be a semiconductor substrate such as a single-crystal silicon substrate. The transistor 210 includes a portion of the substrate 201, a conductive layer 211, a low-resistance region 212, an insulating layer 213, an insulating layer 214, etc. The conductive layer 211 functions as a gate electrode. The insulating layer 213 is located between the substrate 201 and the conductive layer 211 and functions as a gate insulating layer. The low-resistance region 212 is a region of the substrate 201 doped with impurities and functions as either a source or a drain. The insulating layer 214 covers the side surface of the conductive layer 211 and functions as an insulating layer.

[0226] Also, an element isolation layer 215 is provided between two adjacent transistors 210 so as to be embedded in the substrate 201.

[0227] Also, an insulating layer 261 is provided to cover the transistor 210, and a capacitor element 240 is provided on the insulating layer 261.

[0228] The capacitor element 240 includes a conductive layer 241, a conductive layer 242, and an insulating layer 243 positioned therebetween. The conductive layer 241 functions as one electrode of the capacitor element 240, the conductive layer 242 functions as the other electrode of the capacitor element 240, and the insulating layer 243 functions as the dielectric of the capacitor element 240.

[0229] The conductive layer 241 is provided on the insulating layer 261 and is electrically connected to one of the source or drain of the transistor 210 by a plug 271 embedded in the insulating layer 261. The insulating layer 243 is provided to cover the conductive layer 241. The conductive layer 242 is provided in a region overlapping the conductive layer 241 via the insulating layer 243.

[0230] An insulating layer 121 is provided to cover the capacitor element 240, and a light-emitting element 120R, a light-emitting element 120G, a light-emitting element 120B, etc. are provided on the insulating layer 121. Here, as the configurations of the light-emitting element 120R, the light-emitting element 120G, and the light-emitting element 120B, an example using the configurations exemplified in Configuration Example 1-1 and FIG. 1B is shown, but the present invention is not limited thereto, and various configurations exemplified above can be applied.

[0231] In the display device 200A, an insulating layer 161, an insulating layer 162, and an insulating layer 163 are provided in this order so as to cover the insulating layer 118 on the light-emitting element 120. These three insulating layers function as a protective layer that prevents impurities such as water from diffusing into the light-emitting element 120. It is preferable to use an inorganic insulating film with low moisture permeability, such as a silicon oxide film, a silicon nitride film, or an aluminum oxide film, for the insulating layer 161 and the insulating layer 163. In addition, an organic insulating film with high light transmittance can be used for the insulating layer 162. By using an organic insulating film for the insulating layer 162, the influence of the uneven shape below the insulating layer 162 can be alleviated, and the surface to be formed of the insulating layer 163 can be made smooth. As a result, defects such as pinholes are less likely to occur in the insulating layer 163, and the moisture permeability of the protective layer can be further increased. Note that the configuration of the protective layer covering the light-emitting element 120 is not limited to this, and it may be a single layer or a two-layer structure, or a laminated structure of four or more layers.

[0232] On the insulating layer 163, a coloring layer 165R overlapping the light-emitting element 120R, a coloring layer 165G overlapping the light-emitting element 120G, and a coloring layer 165B overlapping the light-emitting element 120B are provided. For example, the coloring layer 165R transmits red light, the coloring layer 165G transmits green light, and the coloring layer 165B transmits blue light. Thereby, the color purity of the light from each light-emitting element can be increased, and a display device with higher display quality can be realized. In addition, by forming each coloring layer on the insulating layer 163, alignment between each light-emitting unit and each coloring layer is easier than in the case of forming the coloring layer on the substrate 202 described later, and an extremely high-definition display device can be realized.

[0233] The display device 200A has a substrate 202 on the viewing side. The substrate 202 and the substrate 201 are bonded together by a light-transmissive adhesive layer 164. As the substrate 202, a light-transmissive substrate such as a glass substrate, a quartz substrate, a sapphire substrate, or a plastic substrate can be used.

[0234] With such a configuration, an extremely high-definition and high-quality display device can be realized.

[0235] [Configuration Example 2-2] Figure 15 is a schematic cross-sectional view of the display device 200B. The display device 200B differs from the display device 200A in that it has a different transistor configuration.

[0236] Transistor 220 is a transistor in which a metal oxide (also called an oxide semiconductor) is applied to the semiconductor layer where the channel is formed.

[0237] The transistor 220 includes a semiconductor layer 221, an insulating layer 223, a conductive layer 224, a pair of conductive layers 225, an insulating layer 226, a conductive layer 227, and the like.

[0238] As the substrate 201 on which the transistor 220 is provided, the insulating substrate or semiconductor substrate described above can be used.

[0239] An insulating layer 232 is provided on the substrate 201. The insulating layer 232 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 201 to the transistor 220, and prevents oxygen from detaching from the semiconductor layer 221 to the substrate 201. As the insulating layer 232, for example, a film that is less permeable to hydrogen or oxygen than a silicon oxide film can be used, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0240] A conductive layer 227 is provided on an insulating layer 232, and an insulating layer 226 is provided covering the conductive layer 227. The conductive layer 227 functions as the first gate electrode of the transistor 220, and a portion of the insulating layer 226 functions as the first gate insulating layer. It is preferable to use an oxide insulating film, such as a silicon oxide film, for at least the portion of the insulating layer 226 that is in contact with the semiconductor layer 221. It is preferable that the upper surface of the insulating layer 226 is flattened.

[0241] The semiconductor layer 221 is provided on the insulating layer 226. Preferably, the semiconductor layer 221 has a metal oxide (also called an oxide semiconductor) film with semiconductor properties. Details of materials suitable for use in the semiconductor layer 221 will be described later.

[0242] A pair of conductive layers 225 are provided in contact with the semiconductor layer 221 and function as source and drain electrodes.

[0243] Furthermore, an insulating layer 228 is provided covering the top and side surfaces of the pair of conductive layers 225, as well as the side surfaces of the semiconductor layer 221, and an insulating layer 261b is provided on the insulating layer 228. The insulating layer 228 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing into the semiconductor layer 221 from the insulating layer 261b, etc., and to prevent oxygen from detaching from the semiconductor layer 221. As the insulating layer 228, an insulating film similar to that of the insulating layer 232 can be used.

[0244] An opening is provided in the insulating layer 228 and the insulating layer 261b that reaches the semiconductor layer 221. Inside this opening, an insulating layer 223 and a conductive layer 224 are embedded, which are in contact with the sides of the insulating layer 261b, the insulating layer 228, and the conductive layer 225, as well as the upper surface of the semiconductor layer 221. The conductive layer 224 functions as a second gate electrode, and the insulating layer 223 functions as a second gate insulating layer.

[0245] The upper surfaces of the conductive layer 224, the insulating layer 223, and the insulating layer 261b are flattened so that their heights are approximately the same, and the insulating layer 229 and insulating layer 261a are provided covering them.

[0246] Insulating layers 261a and 261b function as interlayer insulating layers. In addition, insulating layer 229 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing from insulating layer 261a, etc., to the transistor 220. As insulating layer 229, an insulating film similar to that used for insulating layers 228 and 232 can be used.

[0247] A plug 271, which is electrically connected to one of the pair of conductive layers 225, is provided so as to be embedded in the insulating layer 261a, insulating layer 229, and insulating layer 261b. Here, it is preferable that the plug 271 has a conductive layer 271a that covers the sides of the openings of each of the insulating layer 261a, insulating layer 261b, insulating layer 229, and insulating layer 228, and a part of the upper surface of the conductive layer 225, and a conductive layer 271b that is in contact with the upper surface of the conductive layer 271a. In this case, it is preferable to use a conductive material that does not easily allow hydrogen and oxygen to diffuse as the conductive layer 271a.

[0248] [Configuration Example 2-3] Figure 16 is a schematic cross-sectional view of the display device 200C. The display device 200C has a configuration in which a transistor 210 with a channel formed on a substrate 201 and a transistor 220 containing a metal oxide in the semiconductor layer where the channel is formed are stacked.

[0249] An insulating layer 261 is provided covering the transistor 210, and a conductive layer 251 is provided on the insulating layer 261. An insulating layer 262 is provided covering the conductive layer 251, and a conductive layer 252 is provided on the insulating layer 262. The conductive layers 251 and 252 each function as wiring. An insulating layer 263 and an insulating layer 232 are provided covering the conductive layer 252, and a transistor 220 is provided on the insulating layer 232. An insulating layer 265 is provided covering the transistor 220, and a capacitive element 240 is provided on the insulating layer 265. The capacitive element 240 and the transistor 220 are electrically connected by a plug 274.

[0250] Transistor 220 can be used as a transistor constituting a pixel circuit. Transistor 210 can also be used as a transistor constituting a pixel circuit, or as a transistor constituting a drive circuit (gate line drive circuit, source line drive circuit) for driving the pixel circuit. Furthermore, transistors 210 and 220 can be used as transistors constituting various circuits such as arithmetic circuits or memory circuits.

[0251] By adopting such a configuration, not only pixel circuits but also drive circuits and the like can be formed directly under the light-emitting unit. Therefore, compared with the case where a drive circuit is provided around the display area, the display device can be miniaturized.

[0252] 〔Configuration Example 2-4〕 FIG. 17 is a schematic cross-sectional view of the display device 200D. The display device 200D is mainly different from the above-described display device 200C in that two transistors to which an oxide semiconductor is applied are stacked.

[0253] The display device 200D has a transistor 230 between the transistor 210 and the transistor 220. The transistor 230 has the same configuration as the transistor 220 except that it does not have a first gate electrode. Note that the transistor 230 may have a configuration having a first gate electrode.

[0254] An insulating layer 263 and an insulating layer 231 are provided to cover the conductive layer 252, and the transistor 230 is provided on the insulating layer 231. The transistor 230 and the conductive layer 252 are electrically connected via a plug 273, a conductive layer 253, and a plug 272. Further, an insulating layer 264 and an insulating layer 232 are provided to cover the conductive layer 253, and the transistor 220 is provided on the insulating layer 232.

[0255] For example, the transistor 220 functions as a transistor for controlling the current flowing through the light-emitting element 120. The transistor 230 functions as a selection transistor for controlling the selection state of the pixel. The transistor 210 functions as a transistor constituting a drive circuit for driving the pixel.

[0256] As described above, by stacking three or more layers in which transistors are formed, the occupied area of the pixel can be further reduced, and a high-definition display device can be realized.

[0257] Hereinafter, components such as transistors applicable to the display device will be described.

[0258] [Transistor] A transistor comprises a conductive layer that functions as a gate electrode, a semiconductor layer, a conductive layer that functions as a source electrode, a conductive layer that functions as a drain electrode, and an insulating layer that functions as a gate insulating layer.

[0259] The structure of the transistor in the display device according to one aspect of the present invention is not particularly limited. For example, it may be a planar transistor, a staggered transistor, or an inverse staggered transistor. It may also be a top-gate or bottom-gate transistor structure. Alternatively, gate electrodes may be provided above and below the channel.

[0260] The crystallinity of the semiconductor material used in the transistor is not particularly limited; amorphous semiconductors, crystalline semiconductors (microcrystalline semiconductors, polycrystalline semiconductors, single-crystal semiconductors, or semiconductors with crystalline regions in part) may be used. Using a crystalline semiconductor is preferable because it can suppress the degradation of transistor characteristics.

[0261] The following section describes transistors that specifically use metal oxide films as the semiconductor layer in which the channel is formed.

[0262] As semiconductor materials used in transistors, metal oxides with an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more, can be used. Typical examples include metal oxides containing indium, such as CAC-OS described later.

[0263] Transistors using metal oxides, which have a wider bandgap and lower carrier concentration than silicon, can retain the charge stored in a capacitive element connected in series with the transistor for a long period of time due to their small off-current.

[0264] The semiconductor layer can be a film represented by an In-M-Zn oxide containing, for example, indium, zinc, and M (where M is a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium).

[0265] When the metal oxide constituting the semiconductor layer is an In-M-Zn oxide, it is preferable that the atomic ratio of the metal elements of the sputtering target used for forming the In-M-Zn oxide satisfies In≧M and Zn≧M. As such an atomic ratio of the metal elements of the sputtering target, In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, etc. are preferable. Note that the atomic ratio of the formed semiconductor layer includes a variation of plus or minus 40% of the atomic ratio of the metal elements contained in the above sputtering target.

[0266] As the semiconductor layer, a metal oxide film with a low carrier concentration is used. For example, the semiconductor layer has a carrier concentration of 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, more preferably 1×10 13 cm -3 or less, even more preferably 1×10 11 cm -3 or less, still more preferably 1×10 10 cm -3 or less, and a metal oxide with a carrier concentration of 1×10 -9 cm -3 or more can be used. Such a metal oxide is called a high-purity intrinsic or substantially high-purity intrinsic metal oxide. It can be said that the oxide semiconductor is a metal oxide having a low density of defect energy levels and stable characteristics.

[0267] Furthermore, these are not the only options; an oxide semiconductor with an appropriate composition may be used depending on the required semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, etc.) of the transistor. In addition, it is preferable to set the carrier concentration, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the semiconductor layer appropriately in order to obtain the required semiconductor characteristics of the transistor.

[0268] When silicon or carbon, which are Group 14 elements, are present in the metal oxide constituting the semiconductor layer, oxygen vacancies increase in the semiconductor layer, causing it to become n-type. Therefore, the concentration of silicon or carbon in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is 2 × 10⁻¹⁰. 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0269] Furthermore, alkali metals and alkaline earth metals can generate carriers when they combine with metal oxides, which can increase the transistor's off-current. For this reason, the concentration of alkali metals or alkaline earth metals obtained by secondary ion mass spectrometry in the semiconductor layer should be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0270] Furthermore, if nitrogen is present in the metal oxide constituting the semiconductor layer, electrons, which act as carriers, are generated, increasing the carrier concentration and making it easier for the transistor to become n-type. As a result, transistors using metal oxides containing nitrogen tend to exhibit normally-on characteristics. Therefore, the nitrogen concentration obtained by secondary ion mass spectrometry in the semiconductor layer is 5 × 10⁻⁶. 18 atoms / cm 3 The following is preferable:

[0271] Oxide semiconductors can be divided into single-crystalline oxide semiconductors and non-single-crystalline oxide semiconductors. Examples of non-single-crystalline oxide semiconductors include CAAC-OS (c-axis-aligned crystalline oxide semiconductor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconductor), pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), and amorphous oxide semiconductors.

[0272] Also, CAC-OS (cloud-aligned composite oxide semiconductor) may be used for the semiconductor layer of the transistor disclosed in one aspect of the present invention.

[0273] Note that the semiconductor layer of the transistor disclosed in one aspect of the present invention can preferably use the above-described non-single-crystalline oxide semiconductors. Among the non-single-crystalline oxide semiconductors, nc-OS or CAAC-OS can be preferably used.

[0274] In one aspect of the present invention, it is preferable to use CAC-OS as the semiconductor layer of the transistor. By using CAC-OS, high electrical characteristics or high reliability can be imparted to the transistor.

[0275] Note that the semiconductor layer may be a mixed film having two or more of the regions of CAAC-OS, polycrystalline oxide semiconductor, nc-OS, pseudo-amorphous oxide semiconductor, and amorphous oxide semiconductor. The mixed film may have, for example, a single-layer structure or a laminated structure including any two or more of the above-described regions.

[0276] <Configuration of CAC-OS> Hereinafter, the configuration of CAC-OS that can be used for the transistor disclosed in one aspect of the present invention will be described.

[0277] CAC-OS is a material composition in which, for example, the elements constituting the metal oxide are unevenly distributed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or close to that size. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide, and the regions containing these metal elements are mixed in sizes of 0.5 nm to 10 nm, preferably 1 nm to 2 nm, or close to that size, is also referred to as a mosaic or patchy state.

[0278] Furthermore, the metal oxide preferably contains at least indium. It is particularly preferable that it contains indium and zinc. In addition, it may also contain one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium.

[0279] For example, CAC-OS in In-Ga-Zn oxide (In-Ga-Zn oxide within CAC-OS may be specifically called CAC-IGZO) refers to indium oxide (hereinafter, InO X1 (Let X1 be a real number greater than 0.) ) or indium zinc oxide (hereinafter, In X2 Zn Y2 O Z2 (Let X2, Y2, and Z2 be real numbers greater than 0.) and gallium oxide (hereinafter referred to as GaO X3 (Let X3 be a real number greater than 0.) or gallium zinc oxide (hereinafter referred to as Ga X4 Zn Y4 O Z4 (Let X4, Y4, and Z4 be real numbers greater than 0).) The material separates into mosaic patterns, such as the mosaic InO X1 , or In X2 Zn Y2 O Z2 However, it is a uniformly distributed structure within the membrane (hereinafter also referred to as a cloud-like structure).

[0280] In other words, CAC-OS is GaO X3 The region in which is the main component, and In X2 Zn Y2 O Z2 , or InO X1 This is a composite metal oxide having a composition in which a region is the main component and a region is mixed. In this specification, for example, if the atomic ratio of In to element M in the first region is greater than the atomic ratio of In to element M in the second region, then the first region is considered to have a higher concentration of In compared to the second region.

[0281] Note that IGZO is a common name and can refer to a single compound composed of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is an integer greater than or equal to 1), or In (1+x0) Ga (1-x0) O3(ZnO) m0 Examples include crystalline compounds represented by (-1 ≤ x0 ≤ 1, where m0 is any number).

[0282] The above-mentioned crystalline compounds have a single-crystal structure, a polycrystalline structure, or a CAAC structure. A CAAC structure is a crystalline structure in which multiple IGZO nanocrystals are c-axis oriented and linked together without orientation in the ab-plane.

[0283] On the other hand, CAC-OS refers to the material composition of metal oxides. CAC-OS is a material composition containing In, Ga, Zn, and O, in which regions observed as nanoparticles mainly composed of Ga and regions observed as nanoparticles mainly composed of In are randomly dispersed in a mosaic-like manner. Therefore, in CAC-OS, the crystal structure is a secondary element.

[0284] Furthermore, CAC-OS does not include layered structures of two or more films with different compositions. For example, a structure consisting of two layers, one with In as the main component and the other with Ga as the main component, is not included.

[0285] Note that GaO X3 The region in which is the main component, and In X2Zn Y2 O Z2 , or InO X1 In some cases, a clear boundary may not be observable in a region where [this component] is the main component.

[0286] Furthermore, if gallium is replaced with one or more elements selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, CAC-OS refers to a configuration in which regions observed as nanoparticles mainly composed of the said metal element and regions observed as nanoparticles mainly composed of In are randomly dispersed in a mosaic pattern.

[0287] CAC-OS can be formed, for example, by sputtering under conditions where the substrate is not heated. When forming CAC-OS by sputtering, one or more gases selected from inert gases (typically argon), oxygen gas, and nitrogen gas may be used as the film-forming gas. Furthermore, it is preferable that the ratio of oxygen gas flow rate to the total flow rate of the film-forming gas during film formation be as low as possible. For example, it is preferable that the oxygen gas flow rate ratio be 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0288] CAC-OS is characterized by the absence of a clear peak when measured using the θ / 2θ scan method, an out-of-plane X-ray diffraction (XRD) measurement technique. In other words, X-ray diffraction measurements indicate that no orientation in the ab-plane direction or the c-axis direction of the measurement region is observed.

[0289] Furthermore, in the electron diffraction pattern obtained by irradiating CAC-OS with an electron beam having a probe diameter of 1 nm (also called a nanobeam electron beam), a ring-shaped region of high brightness and multiple bright spots within this ring-shaped region are observed. Therefore, from the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure that does not have orientation in the planar and cross-sectional directions.

[0290] Furthermore, for example, in CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) revealed that GaO X3 The region in which is the main component, and In X2 Zn Y2 O Z2 , or InO X1 It can be confirmed that the structure has regions in which the main component is unevenly distributed and mixed.

[0291] CAC-OS has a different structure from IGZO compounds in which metal elements are uniformly distributed, and therefore has different properties from IGZO compounds. In other words, CAC-OS is GaO X3 Regions where such are the main components, and In X2 Zn Y2 O Z2 , or InO X1 It has a mosaic-like structure consisting of regions where one element is the main component and regions where each element is the main component, with each region being in a separate phase from the others.

[0292] Here, In X2 Zn Y2 O Z2 , or InO X1 The region in which is the main component is GaO X3 Compared to regions where these are the main components, this region has high conductivity. In other words, In X2 Zn Y2 O Z2 , or InO X1 In the region where this is the main component, the flow of carriers causes conductivity as a metal oxide to emerge. Therefore, In X2 ZnY2 O Z2 , or InO X1 The distribution of regions with this as the main component in a cloud-like manner within the metal oxide enables a high field-effect mobility (μ).

[0293] On the other hand, GaO X3 Regions in which these are the main components are, X2 Zn Y2 O Z2 , or InO X1 This region has higher insulating properties compared to the region where GaO is the main component. X3 Regions with these as the main components are distributed within the metal oxide, which suppresses leakage current and enables good switching operation.

[0294] Therefore, when CAC-OS is used in semiconductor devices, GaO X3 Insulation caused by factors such as, X2 Zn Y2 O Z2 , or InO X1 The conductivity resulting from this works in a complementary manner, resulting in a high on-current (I on ), and a high field-effect mobility (μ) can be achieved.

[0295] Furthermore, semiconductor devices using CAC-OS offer high reliability. Therefore, CAC-OS is ideal for a variety of semiconductor devices, including displays.

[0296] Furthermore, transistors having a CAC-OS semiconductor layer have high field-effect mobility and high driving capability. By using such transistors in a driving circuit, typically a scan line driving circuit that generates gate signals, it is possible to provide a display device with a narrow bezel (also called a narrow-bezel display). Additionally, by using such transistors in a signal line driving circuit of a display device (especially a demultiplexer connected to the output terminal of a shift register in the signal line driving circuit), it is possible to provide a display device with a small number of wires connected to it.

[0297] Furthermore, transistors with CAC-OS in the semiconductor layer do not require a laser crystallization process, unlike transistors using low-temperature polysilicon. Therefore, even for display devices using large-area substrates, manufacturing costs can be reduced. Moreover, in high-resolution, large-scale display devices such as Ultra Hi-Vision ("4K resolution", "4K2K", "4K") and Super Hi-Vision ("8K resolution", "8K4K", "8K"), using transistors with CAC-OS in the semiconductor layer in the drive circuit and display unit is preferable because it enables writing in a short time and reduces display defects.

[0298] Alternatively, silicon may be used as the semiconductor in which the transistor channel is formed. Amorphous silicon may be used as the silicon, but crystalline silicon is particularly preferred. For example, microcrystalline silicon, polycrystalline silicon, or single-crystal silicon are preferred. In particular, polycrystalline silicon can be formed at a lower temperature than single-crystal silicon and has higher field-effect mobility and higher reliability than amorphous silicon.

[0299] [Conductive layer] Materials that can be used for conductive layers such as the gate, source, and drain of transistors, as well as various wirings and electrodes that constitute display devices, include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or alloys mainly composed of these metals. Films containing these materials can be used as single layers or in multilayer structures. For example, there are single-layer structures of aluminum films containing silicon, two-layer structures of aluminum films laminated on titanium films, two-layer structures of aluminum films laminated on tungsten films, two-layer structures of copper films laminated on copper-magnesium-aluminum alloy films, two-layer structures of copper films laminated on titanium films, two-layer structures of copper films laminated on tungsten films, three-layer structures of titanium films or titanium nitride films with aluminum films or copper films laminated on top and titanium films or titanium nitride films formed on top of those, and three-layer structures of molybdenum films or molybdenum nitride films with aluminum films or copper films laminated on top and molybdenum films or molybdenum nitride films formed on top of those. Furthermore, oxides such as indium oxide, tin oxide, or zinc oxide may be used. In addition, using copper containing manganese is preferable because it improves the controllability of the shape through etching.

[0300] [Insulating layer] In addition to resins such as acrylic resin and epoxy resin, and resins having siloxane bonds such as silicone, inorganic insulating materials such as silicon oxide, silicon oxide nitride, silicon nitride, silicon nitride, and aluminum oxide can also be used as insulating materials for each insulating layer.

[0301] In this specification, "oxide-nitride" refers to a material in which the oxygen content is greater than the nitrogen content, and "nitride oxide" refers to a material in which the nitrogen content is greater than the oxygen content. For example, when "silicon oxynitride" is written, it refers to a material in which the oxygen content is greater than the nitrogen content, and when "silicon nitride oxide" is written, it refers to a material in which the nitrogen content is greater than the oxygen content.

[0302] Further, it is preferable that the light-emitting element is provided between a pair of insulating films with low water permeability. This can suppress the intrusion of impurities such as water into the light-emitting element and suppress a decrease in the reliability of the device.

[0303] Examples of the insulating film with low water permeability include films containing nitrogen and silicon such as a silicon nitride film and a silicon oxynitride film, or films containing nitrogen and aluminum such as an aluminum nitride film. Further, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or the like may be used.

[0304] For example, the water vapor transmission rate of the insulating film with low water permeability is 1×10 -5 [g / (m 2 ·day)] or less, preferably 1×10 -6 [g / (m 2 ·day)] or less, more preferably 1×10 -7 [g / (m 2 ·day)] or less, still more preferably 1×10 -8 [g / (m 2 ·day)] or less.

[0305] [Configuration example of display module] Hereinafter, a configuration example of a display module having a display device according to one aspect of the present invention will be described.

[0306] FIG. 18A is a perspective schematic view of a display module 280. The display module 280 includes a display device 200 and an FPC 290. As the display device 200, each display device (display devices 200A to 200D) exemplified in Configuration Example 2 above can be applied.

[0307] The display module 280 includes a substrate 201 and a substrate 202. Further, a display portion 281 is provided on the substrate 202 side. The display portion 281 is an area for displaying an image in the display module 280, and is an area where light from each pixel provided in a pixel portion 284 described later can be visually recognized.

[0308] Figure 18B shows a schematic perspective view illustrating the configuration of the substrate 201. The substrate 201 has a configuration in which a circuit section 282, a pixel circuit section 283 on the circuit section 282, and a pixel section 284 on the pixel circuit section 283 are stacked. In addition, the substrate 201 has a terminal section 285 for connecting to the FPC 290 in a portion that does not overlap with the pixel section 284. The terminal section 285 and the circuit section 282 are electrically connected by a wiring section 286 composed of multiple wires.

[0309] The pixel section 284 has multiple pixels 284a arranged periodically. A magnified view of one pixel 284a is shown on the right side of Figure 18B. The pixel 284a has light-emitting elements 120R, 120G, and 120B.

[0310] The pixel circuit section 283 has a plurality of periodically arranged pixel circuits 283a. The plurality of pixel circuits 283a may be arranged in a delta array, as shown in Figure 18B. Since the delta array allows for a high-density arrangement of pixel circuits, a high-resolution display device can be provided.

[0311] A single pixel circuit 283a is a circuit that controls the light emission of the three light-emitting elements of a single pixel 284a. A single pixel circuit 283a may be configured to have three circuits that control the light emission of a single light-emitting element. For example, a single pixel circuit 283a may have at least one selection transistor, one current control transistor (drive transistor), and a capacitive element for each light-emitting element. In this case, a gate signal is input to the gate of the selection transistor, and a source signal is input to either the source or the drain. This realizes an active-matrix type display device.

[0312] The circuit section 282 has circuits for driving each pixel circuit 283a of the pixel circuit section 283. For example, it is preferable to have a gate line drive circuit, a source line drive circuit, etc. In addition, it may also have an arithmetic circuit, a memory circuit, a power supply circuit, etc.

[0313] The FPC290 functions as wiring for supplying video signals or power potential, etc., to the circuit section 282 from an external source. An IC may also be mounted on the FPC290.

[0314] The display module 280 can be configured such that a pixel circuit section 283 or a circuit section 282 is stacked on the lower side of the pixel section 284, thereby enabling an extremely high aperture ratio (effective display area ratio) of the display section 281. For example, the aperture ratio of the display section 281 can be 40% or more and less than 100%, preferably 50% or more and 95%, and more preferably 60% or more and 95%. Furthermore, it is possible to arrange the pixels 284a at an extremely high density, enabling an extremely high resolution of the display section 281. For example, it is preferable that the pixels 284a are arranged in the display section 281 with a resolution of 20000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and a resolution of 20000 ppi or less, or 30000 ppi or less.

[0315] Because such a display module 280 is extremely high-resolution, it can be suitably used in VR devices such as head-mounted displays, or in glasses-type AR devices. For example, even in a configuration where the display part of the display module 280 is viewed through lenses, the display module 280 has an extremely high-resolution display part 281, so even when the display part is magnified with lenses, pixels are not visible, allowing for a highly immersive display. Furthermore, the display module 280 is not limited to this, and can be suitably used in electronic devices with relatively small display parts. For example, it can be suitably used in the display part of wearable electronic devices such as wristwatches.

[0316] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0317] (Embodiment 2) In this embodiment, a display device according to one aspect of the present invention will be described with reference to Figure 19.

[0318] The display device shown in Figure 19A includes a pixel section 502, a drive circuit section 504, a protection circuit 506, and a terminal section 507. In one embodiment of the present invention, the display device may be configured without the protection circuit 506.

[0319] The pixel unit 502 has a plurality of pixel circuits 501 arranged in X rows and Y columns (where X and Y are independent integers of 2 or more). Each pixel circuit 501 has a circuit for driving a display element.

[0320] The drive circuit section 504 includes drive circuits such as a gate driver 504a that outputs a scan signal to gate lines GL_1 to GL_X, and a source driver 504b that supplies data signals to data lines DL_1 to DL_Y. The gate driver 504a may be configured to include at least a shift register. The source driver 504b may be configured using, for example, multiple analog switches. Alternatively, the source driver 504b may be configured using a shift register or the like.

[0321] The terminal section 507 refers to the part of the device that is equipped with terminals for inputting power, control signals, and image signals from an external circuit to the display device.

[0322] The protection circuit 506 is a circuit that makes a wire it is connected to and another wire conductive when a potential outside a certain range is applied to that wire. The protection circuit 506 shown in Figure 19A is connected to various wires, such as the gate line GL, which is the wire between the gate driver 504a and the pixel circuit 501, or the data line DL, which is the wire between the source driver 504b and the pixel circuit 501.

[0323] Furthermore, the gate driver 504a and the source driver 504b may each be provided on the same substrate as the pixel section 502, or a separate substrate (for example, a drive circuit substrate made of a single-crystal semiconductor or polycrystalline semiconductor) on which the gate driver circuit or source driver circuit is formed may be mounted on the substrate by COG or TAB (Tape Automated Bonding).

[0324] In particular, it is preferable to arrange the gate driver 504a and the source driver 504b below the pixel section 502.

[0325] Furthermore, the multiple pixel circuits 501 shown in Figure 19A can be configured as shown in Figure 19B, for example.

[0326] The pixel circuit 501 shown in Figure 19B includes a transistor 552, a transistor 554, a capacitive element 562, and a light-emitting element 572. The pixel circuit 501 is also connected to data lines DL_n (where n is an integer between 1 and Y), gate lines GL_m (where m is an integer between 1 and X), potential supply lines VL_a and VL_b, etc.

[0327] A high power supply potential VDD is supplied to one of the potential supply lines VL_a and VL_b, and a low power supply potential VSS is supplied to the other. The current flowing through the light-emitting element 572 is controlled according to the potential supplied to the gate of transistor 554, thereby controlling the luminescence brightness from the light-emitting element 572.

[0328] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0329] (Embodiment 3) The following describes a pixel circuit equipped with a memory for correcting the grayscale displayed on a pixel, which is applicable to a display device according to one aspect of the present invention, and a display device having the same.

[0330] [Circuit Configuration] Figure 20A shows the circuit diagram of the pixel circuit 400. The pixel circuit 400 includes transistor M1, transistor M2, capacitor C1, and circuit 401. Wiring S1, S2, G1, and G2 are connected to the pixel circuit 400.

[0331] Transistor M1 has its gate connected to wiring G1, one of its source and drain connected to wiring S1, and the other connected to one electrode of capacitor C1. Transistor M2 has its gate connected to wiring G2, one of its source and drain connected to wiring S2, the other connected to the other electrode of capacitor C1, and circuit 401.

[0332] Circuit 401 is a circuit that includes at least one display element. Various elements can be used as the display element, but typically light-emitting elements such as organic EL elements or LED elements can be used. In addition to these, liquid crystal elements or MEMS (Micro Electro Mechanical Systems) elements can also be used.

[0333] Let node N1 be the node connecting transistor M1 and capacitor C1, and node N2 be the node connecting transistor M2 and circuit 401.

[0334] The pixel circuit 400 can maintain the potential of node N1 by turning off transistor M1. Similarly, it can maintain the potential of node N2 by turning off transistor M2. Furthermore, with transistor M2 in the off state, by writing a predetermined potential to node N1 via transistor M1, the potential of node N2 can be changed in accordance with the displacement of the potential of node N1 through capacitive coupling via capacitor C1.

[0335] Here, one or both of transistors M1 and M2 can be replaced with transistors that utilize an oxide semiconductor, as exemplified in Embodiment 1. Therefore, the potentials of nodes N1 and N2 can be maintained for a long period of time with an extremely low off-current. Note that if the period for maintaining the potential of each node is short (specifically, when the frame frequency is 30 Hz or higher), transistors using semiconductors such as silicon may be used.

[0336] [Example of driving method] Next, an example of the operation method of the pixel circuit 400 will be described using FIG. 20B. FIG. 20B is a timing chart related to the operation of the pixel circuit 400. Here, for the sake of simplicity of explanation, the effects of various resistances such as wiring resistance, parasitic capacitances such as transistors or wirings, and threshold voltages of transistors are not considered.

[0337] In the operation shown in FIG. 20B, one frame period is divided into a period T1 and a period T2. The period T1 is a period for writing a potential to the node N2, and the period T2 is a period for writing a potential to the node N1.

[0338] 〔Period T1〕 In the period T1, a potential for turning on the transistors is applied to both the wiring G1 and the wiring G2. Also, a potential V ref which is a fixed potential is supplied to the wiring S1, and a first data potential V w is supplied to the wiring S2.

[0339] To the node N1, a potential V ref is applied from the wiring S1 through the transistor M1. Also, to the node N2, a first data potential V w is applied from the wiring S2 through the transistor M2. Therefore, a potential difference V w -V ref is held in the capacitor C1.

[0340] 〔Period T2〕 Subsequently, in the period T2, a potential for turning on the transistor M1 is applied to the wiring G1, and a potential for turning off the transistor M2 is applied to the wiring G2. Also, a second data potential V data is supplied to the wiring S1. A predetermined fixed potential may be applied to the wiring S2, or it may be in a floating state.

[0341] To the node N1, a second data potential V data is applied from the wiring S1 through the transistor M1. At this time, due to capacitive coupling by the capacitor C1, the second data potential V dataAccordingly, the potential of node N2 changes by a potential dV. That is, circuit 401 has a first data potential V w The input potential will be the sum of the potential dV and the second data potential V. Note that although Figure 20B shows the potential dV as a positive value, it can also be a negative value. That is, the second data potential V data The potential is V ref It can be lower.

[0342] Here, the potential dV is roughly determined by the capacitance value of capacitor C1 and the capacitance value of circuit 401. If the capacitance value of capacitor C1 is sufficiently larger than the capacitance value of circuit 401, the potential dV is the second data potential V data The potential will be close to that.

[0343] In this way, the pixel circuit 400 can combine two types of data signals to generate a potential that is supplied to the circuit 401, which includes a display element, making it possible to perform grayscale correction within the pixel circuit 400.

[0344] Furthermore, the pixel circuit 400 can generate a potential exceeding the maximum potential that can be supplied to wiring S1 and wiring S2. For example, when using light-emitting elements, high dynamic range (HDR) display can be performed. Also, when using liquid crystal elements, overdrive driving can be realized.

[0345] [Examples of application] The pixel circuit 400EL shown in Figure 20C has circuit 401EL. Circuit 401EL has a light-emitting element EL, a transistor M3, and a capacitor C2.

[0346] Transistor M3 has its gate connected to one electrode of node N2 and capacitance C2, and one of its source and drain connected to potential V. H The wiring that provides the potential V is connected to one electrode of the light-emitting element EL. Capacitor C2 is connected to the other electrode at potential V com Connect to the wiring that provides the potential V. The light-emitting element EL has the other electrode at potential V. L Connect to the wiring that provides the connection.

[0347] Transistor M3 controls the current supplied to the light-emitting element EL. Capacitor C2 functions as a retaining capacitor. Capacitor C2 can be omitted if not needed.

[0348] Note that although the configuration shown here connects the anode side of the light-emitting element EL to transistor M3, transistor M3 may also be connected to the cathode side. In that case, the potential V H and potential V L The value can be changed as needed.

[0349] The 400EL pixel circuit can supply a large current to the light-emitting element EL by applying a high potential to the gate of transistor M3, thereby enabling features such as HDR display. Furthermore, by supplying a correction signal to wiring S1 or S2, variations in the electrical characteristics of transistor M3 or the light-emitting element EL can be corrected.

[0350] Note that the circuit is not limited to the example shown in Figure 20C; other configurations including additional transistors or capacitors may also be used.

[0351] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0352] (Embodiment 4) This embodiment describes an example of the configuration of an electronic device to which a display device according to one aspect of the present invention is applied.

[0353] A display device and display module according to one aspect of the present invention can be applied to the display section of an electronic device having a display function. Examples of such electronic devices include electronic devices with relatively large screens such as television sets, notebook personal computers, monitors, digital signage, pachinko machines, and game machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal information terminals, and audio playback devices.

[0354] In particular, the display device and display module according to one aspect of the present invention can be used suitably in electronic devices having a relatively small display area because they can increase the resolution. Examples of such electronic devices include wearable devices that can be worn on the head, such as wristwatch-type and bracelet-type information terminals (wearable devices), VR devices such as head-mounted displays, and AR devices such as glasses.

[0355] Figure 21A shows a perspective view of a spectacle-type electronic device 700. The electronic device 700 includes a pair of display panels 701, a pair of housings 702, a pair of optical members 703, a pair of mounting parts 704, and the like.

[0356] The electronic device 700 can project an image displayed on the display panel 701 onto the display area 706 of the optical element 703. Furthermore, because the optical element 703 is translucent, the user can view the image displayed on the display area 706 superimposed on the transmitted image seen through the optical element 703. Therefore, the electronic device 700 is an electronic device capable of AR display.

[0357] Furthermore, one of the housings 702 is equipped with a camera 705 capable of capturing images of the area in front. Although not shown, one of the housings 702 is also equipped with a wireless receiver or a connector to which a cable can be connected, allowing video signals and the like to be supplied to the housing 702. Additionally, by equipping the housing 702 with an acceleration sensor such as a gyro sensor, the orientation of the user's head can be detected and an image corresponding to that orientation can be displayed in the display area 706. Furthermore, it is preferable that the housing 702 is equipped with a battery, which can be charged wirelessly or via a wired connection.

[0358] Next, using Figure 21B, a method for projecting an image onto the display area 706 of the electronic device 700 will be described. Inside the housing 702, a display panel 701, a lens 711, and a reflector 712 are provided. In addition, the portion of the optical element 703 corresponding to the display area 706 has a reflective surface 713 that functions as a half-mirror.

[0359] Light 715 emitted from the display panel 701 passes through the lens 711 and is reflected towards the optical element 703 by the reflector 712. Inside the optical element 703, the light 715 undergoes total internal reflection repeatedly at the end face of the optical element 703 and reaches the reflective surface 713, thereby projecting an image onto the reflective surface 713. As a result, the user can see both the light 715 reflected by the reflective surface 713 and the transmitted light 716 that has passed through the optical element 703 (including the reflective surface 713).

[0360] Figure 21 shows an example where the reflector 712 and the reflective surface 713 each have curved surfaces. This increases the degree of freedom in optical design and allows for a thinner optical component 703 compared to when they are flat. However, the reflector 712 and the reflective surface 713 may also be flat.

[0361] As the reflector 712, a material having a mirror surface can be used, and it is preferable that it has a high reflectivity. Also, as the reflective surface 713, a half-mirror that utilizes the reflection of a metal film may be used, but using a prism that utilizes total internal reflection can increase the transmittance of the transmitted light 716.

[0362] Here, it is preferable that the housing 702 has a mechanism for adjusting the distance between the lens 711 and the display panel 701, or the angle between them. This makes it possible to adjust the focus, enlarge or reduce the image, etc. For example, one or both of the lens 711 or the display panel 701 may be configured to move in the optical axis direction.

[0363] Furthermore, it is preferable that the housing 702 has a mechanism that allows the angle of the reflector 712 to be adjusted. By changing the angle of the reflector 712, the position of the display area 706 on which the image is displayed can be changed. This makes it possible to position the display area 706 in an optimal position according to the user's eye position.

[0364] A display device or display module according to one aspect of the present invention can be applied to the display panel 701. Therefore, an electronic device 700 capable of displaying extremely high resolution can be created.

[0365] Figures 22A and 22B show perspective views of the goggle-type electronic device 750. Figure 22A is a perspective view showing the front, top, and left side of the electronic device 750, while Figure 22B is a perspective view showing the rear, bottom, and right side of the electronic device 750.

[0366] The electronic device 750 includes a pair of display panels 751, a housing 752, a pair of mounting parts 754, a cushioning member 755, a pair of lenses 756, and the like. The pair of display panels 751 are each provided inside the housing 752 in a position where they can be seen through the lenses 756.

[0367] The electronic device 750 is an electronic device for VR. When a user wears the electronic device 750, they can view the image displayed on the display panel 751 through the lens 756. Furthermore, by displaying different images on a pair of display panels 751, a three-dimensional display using parallax can also be performed.

[0368] Furthermore, an input terminal 757 and an output terminal 758 are provided on the rear side of the housing 752. A cable can be connected to the input terminal 757 to supply video signals from a video output device or other device, or to supply power for charging a battery located inside the housing 752. The output terminal 758 functions, for example, as an audio output terminal, and earphones, headphones, etc., can be connected to it. However, if the system is configured to output audio data via wireless communication, or if audio is output from an external video output device, the audio output terminal does not need to be provided.

[0369] Furthermore, it is preferable that the housing 752 has a mechanism that allows adjustment of the left and right positions of the lens 756 and the display panel 751 so that they are in the optimal position according to the user's eye position. It is also preferable that the housing 752 has a mechanism that adjusts the focus by changing the distance between the lens 756 and the display panel 751.

[0370] A display device or display module according to one embodiment of the present invention can be applied to the display panel 751. Therefore, an electronic device 750 capable of displaying extremely high resolution can be created. This allows the user to experience a high level of immersion.

[0371] The cushioning member 755 is the part that comes into contact with the user's face (forehead, cheeks, etc.). By ensuring that the cushioning member 755 is in close contact with the user's face, light leakage can be prevented, thereby enhancing the sense of immersion. It is preferable to use a soft material for the cushioning member 755 so that it comes into close contact with the user's face when the user wears the electronic device 750. For example, materials such as rubber, silicone rubber, urethane, and sponge can be used. Furthermore, if the surface of a sponge or similar material is covered with cloth, leather (genuine leather or synthetic leather), gaps are less likely to form between the user's face and the cushioning member 755, effectively preventing light leakage. In addition, using such materials is preferable because it feels good against the skin and does not make the user feel cold when worn in cold seasons. It is preferable that the components that come into contact with the user's skin, such as the cushioning member 755 or the mounting part 754, be removable, as this makes cleaning or replacement easier.

[0372] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part. [Explanation of symbols]

[0373] 100A: Display device, 100B: Display device, 100C: Display device, 100D: Display device, 100E: Display device, 100F: Display device, 100G: Display device, 100H: Display device, 101: Substrate, 111: Conductive layer, 111B: Conductive layer, 111G: Conductive layer, 111R: Conductive layer, 11 5:EL layer, 115B:EL layer, 115Bf:EL layer, 115G:EL layer, 115Gf:EL layer, 115R:EL layer, 115Rf:EL layer , 116: conductive layer, 116B: conductive layer, 116Bf: conductive layer, 116G: conductive layer, 116Gf: conductive layer, 116R: conductive layer, 116Rf: Conductive layer, 117: insulating layer, 118: insulating layer, 118f: insulating layer, 119: insulating layer, 119f: insulating film, 120: light-emitting element, 120B: light-emitting element, 120G: light-emitting element, 120R: light-emitting element, 121: insulating layer, 121a: insulating layer, 121b: insulating layer, 121c: insulating layer, 131: plug, 151: resist mask, 152: resist mask, 161: insulating layer, 162: insulating layer, 163: insulating layer, 164: adhesive layer, 165B: colored layer, 165G: colored layer, 165R: colored layer, 170: groove, 170_a: groove, 170_b: groove, 170_1a: groove, 170_1b: Groove, 170_2a: Groove, 170_2b: Groove, 170_3a: Groove, 170_3b: Groove, 171_1: Groove, 171_2: Groove, 171_3: Groove, 175: Groove, 175_1: Groove, 175_2: Groove, 175_3: Groove, 200: Display device, 200A: Display device, 200B: Display device, 200C: Display device, 200D: Display device, 201: Substrate, 202: Substrate, 210: Transistor, 211: Conductive layer, 212: Low resistance region, 213: Insulating layer, 214: Insulating layer, 215: Element isolation layer, 220: Transistor, 221: Semiconductor layer, 223: Insulating layer, 224: Conductive layer, 225 : conductive layer, 226: insulating layer, 227: conductive layer, 228: insulating layer, 229: insulating layer, 230: transistor, 231: insulating layer, 232: insulating layer, 240: capacitive element, 241: conductive layer, 242: conductive layer, 243: insulating layer, 251: conductive layer, 252: conductive layer, 253: conductive layer, 261: insulating layer, 261a: insulating layer, 261b: insulating layer, 262: insulating layer, 263: insulating layer, 264: insulating layer, 265: insulating layer, 271: plug, 271a: conductive layer, 271b: conductive layer, 272: plug, 273: plug, 274: plug, 280: display module, 281: display unit,282: Circuit section, 283: Pixel circuit section, 283a: Pixel circuit, 284: Pixel section, 284a: Pixel, 285: Terminal section, 286: Wiring section, 290: FPC, 400: Pixel circuit, 400EL: Pixel circuit, 401: Circuit, 401EL: Circuit, 501: Pixel circuit, 502: Pixel section, 504: Drive circuit section, 504a: Gate driver, 504b: Source driver, 506: Protection circuit, 507: Terminal section, 552: Transistor, 554: Rangitar, 562: Capacitive element, 572: Light-emitting element, 700: Electronic equipment, 701: Display panel, 702: Housing, 703: Optical component, 704: Mounting part, 705: Camera, 706: Display area, 711: Lens, 712: Reflector, 713: Reflective surface, 715: Light, 716: Transmitted light, 750: Electronic equipment, 751: Display panel, 752: Housing, 754: Mounting part, 755: Cushioning component, 756: Lens, 757: Input terminal, 758: Output terminal,

Claims

1. The first insulating layer, A first light-emitting element and a second light-emitting element on the first insulating layer, A third insulating layer is disposed on the first light-emitting element and covering the first light-emitting element, A fifth insulating layer is disposed on the second light-emitting element and covering the second light-emitting element, It has, A groove is provided in the region of the first insulating layer between the first light-emitting element and the second light-emitting element. The first light-emitting element is A first conductive layer and The first EL layer on the first conductive layer, A second conductive layer on the first EL layer, It has, The second light-emitting element described above is A third conductive layer, The second EL layer on the third conductive layer, A fourth conductive layer on the second EL layer, It has, The groove has a downwardly convex semicircular shape in cross-sectional view. The groove has a first region and a second region that does not overlap with the first region. The first region is located closer to the first light-emitting element than the second region. The second region is located closer to the second light-emitting element than the first region. The third insulating layer has a region that overlaps with the first region of the groove, The fifth insulating layer has a region that overlaps with the second region of the groove, A sixth insulating layer is provided so as to cover the ends of the first conductive layer and the ends of the third conductive layer. In a cross-sectional view, the third insulating layer has a region below the first light-emitting element that is in contact with the first insulating layer via the sixth insulating layer. In cross-sectional view, the fifth insulating layer has a region below the second light-emitting element that is in contact with the first insulating layer via the sixth insulating layer. Display device.

2. In claim 1, Each of the third insulating layer and the fifth insulating layer comprises aluminum and oxygen. Display device.

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