Light-emitting element and method for manufacturing a light-emitting element

Abstract

The objective is to provide a light-emitting element with improved reliability and a method for manufacturing a light-emitting element. [Solution] A light-emitting element according to one embodiment of the present disclosure comprises a semiconductor structure having a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer; a substrate disposed on the first semiconductor layer side of the semiconductor structure; a first electrode disposed between the semiconductor structure and the substrate and electrically connected to the first semiconductor layer; a second electrode electrically connected to the second semiconductor layer; a bonding member disposed between the semiconductor structure and the substrate; a first metal layer disposed between the semiconductor structure and the bonding member; and a second metal layer disposed between the bonding member and the substrate, wherein the thermal expansion coefficients of the first metal layer and the second metal layer are smaller than the thermal expansion coefficient of the bonding member, and the thickness of the second metal layer is thinner than the thickness of the first metal layer.

Description

[Technical Field]

[0001] This disclosure relates to a light-emitting element and a method for manufacturing a light-emitting element. [Background technology]

[0002] Patent Document 1 discloses a semiconductor light-emitting device comprising: a light-emitting body including an n-type semiconductor layer, a p-type semiconductor layer, and a light-emitting layer; a substrate provided on the p-type semiconductor layer side of the light-emitting body; an n-side electrode having a portion that penetrates the p-type semiconductor layer and the light-emitting layer and extends into the n-type semiconductor layer; and a p-side electrode provided between the light-emitting body and the n-side electrode and electrically connected to the p-type semiconductor layer. Furthermore, a semiconductor light-emitting device is disclosed comprising: a junction metal layer provided between the n-side electrode and the substrate; and a plurality of barrier layers including metal layers provided between the junction metal layer and the n-side electrode side, and between the junction metal layer and the substrate. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2017-54963 [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] Stress generated within multiple barrier layers, including a metal layer, can cause delamination between the metal layer and the substrate. This disclosure aims to provide a light-emitting element with improved reliability and a method for manufacturing a light-emitting element. [Means for solving the problem]

[0005] A light-emitting element according to one embodiment of the present disclosure comprises a semiconductor structure having a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer; a substrate disposed on the first semiconductor layer side of the semiconductor structure; a first electrode disposed between the semiconductor structure and the substrate and electrically connected to the first semiconductor layer; a second electrode electrically connected to the second semiconductor layer; a bonding member disposed between the semiconductor structure and the substrate; a first metal layer disposed between the semiconductor structure and the bonding member; and a second metal layer disposed between the bonding member and the substrate, wherein the thermal expansion coefficients of the first metal layer and the second metal layer are smaller than the thermal expansion coefficient of the bonding member, and the thickness of the second metal layer is thinner than the thickness of the first metal layer.

[0006] A method for manufacturing a light-emitting element according to one embodiment of the present disclosure includes the steps of: preparing a first wafer having a first substrate; a semiconductor structure having a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first and second semiconductor layers on the first substrate; and a first metal layer disposed on the semiconductor structure; preparing a second wafer having a second substrate and a second metal layer disposed on the second substrate and having a thickness thinner than the thickness of the first metal layer; joining the first metal layer of the first wafer and the second metal layer of the second wafer using a bonding member; and removing the first substrate from the semiconductor structure, wherein the thermal expansion coefficients of the first and second metal layers are smaller than the thermal expansion coefficient of the bonding member. [Effects of the Invention]

[0007] According to one embodiment of this disclosure, it is possible to provide a light-emitting element with improved reliability and a method for manufacturing a light-emitting element. [Brief explanation of the drawing]

[0008] [Figure 1] This is a schematic top view showing a light-emitting element according to an embodiment. [Figure 2] This is a schematic cross-sectional view showing the light-emitting element 1 according to the embodiment, along line II-II in Figure 1. [Figure 3] It is a partial cross-sectional view schematically showing a part of the light-emitting element 1 according to the embodiment in region III of FIG. 2. [Figure 4] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 5] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 6] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 7] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 8] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 9] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [[ID=?]] [Figure 10] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 11] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 12] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 13] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 14] It is a cross-sectional view for explaining an example of a method for manufacturing a light-emitting element according to an embodiment. [Figure 15] It is a cross-sectional view schematically showing a light-emitting element according to Modification 1 of the embodiment. [Figure 16] It is a top view schematically showing a first metal layer and a second metal layer included in the light-emitting element according to Modification 1 of the embodiment. [Figure 17] It is a top view schematically showing a first metal layer included in the light-emitting element according to Modification 2 of the embodiment. [Figure 18] It is a top view schematically showing a second metal layer included in the light-emitting element according to Modification 2 of the embodiment. [[ID=?]] It seems there is a tag "ID=22" and "ID=48" in the original text which are not used in the translation rules you provided. I have left them as they are in the translation output. Also, there seems to be a "ID=?" in the original text which might be a mistake, but I have translated it as is. If you can clarify these issues, it would be helpful for a more accurate translation.

Embodiment for Carrying out the Invention

[0009] Hereinafter, with reference to the drawings, a light-emitting element and a method for manufacturing the light-emitting element according to embodiments of the present disclosure will be described in detail. However, the embodiments shown below are examples of a light-emitting element and a method for manufacturing the light-emitting element for embodying the technical idea of the embodiment, and are not limited thereto. Further, the dimensions, materials, shapes, relative arrangements, etc. of the components described in the embodiments are not intended to limit the scope of the present disclosure only thereto without specific description, but are merely illustrative examples. Note that the sizes and positional relationships of the members shown in each drawing may be exaggerated for clarity of explanation. In the following description, the same names and reference numerals indicate the same or similar members, and detailed descriptions will be omitted as appropriate. In some cases, an end view showing only the cut surface is used as a cross-sectional view.

[0010] In the figures shown below, the directions may be indicated by the X-axis, Y-axis, and Z-axis. The X-axis, Y-axis, and Z-axis are directions perpendicular to each other. The direction in which the arrow points in the X-axis direction is denoted as the +X direction or +X side, and the opposite direction of the +X direction is denoted as the -X direction or -X side. The direction in which the arrow points in the Y-axis direction is denoted as the +Y direction or +Y side, and the opposite direction of the +Y direction is denoted as the -Y direction or -Y side. The direction in which the arrow points in the Z-axis direction is denoted as the +Z direction or +Z side, and the opposite direction of the +Z direction is denoted as the -Z direction or -Z side. In the terms of the embodiments, a top view means looking at the object from the +Z direction or +Z side. In this specification, in addition to the parts that can be directly visually recognized from above, for the parts that cannot be directly visually recognized from above, the term top view may be used to describe them as if they can be seen through. However, these do not limit the orientation of the light-emitting element during use, and the orientation of the light-emitting element is arbitrary. In the embodiments, the surface of the object when viewed from the +Z direction or +Z side is defined as the "upper surface", and the surface of the object when viewed from the -Z direction or -Z side is defined as the "lower surface". In the embodiments shown below, along the X-axis, Y-axis, and Z-axis means that the object has an inclination within a range of ±10° with respect to these axes. Also, in the embodiments, orthogonal may include an error within ±10° with respect to 90°.

[0011] In this disclosure, unless otherwise specified, polygons such as rectangles shall be referred to as polygons, including shapes with rounded corners, chamfers, bevels, or other processing applied to their corners. Furthermore, shapes with processing applied not only to the corners (ends of the sides) but also to the middle parts of the sides shall also be referred to as polygons. In other words, shapes that retain a polygonal base but have undergone partial processing shall be included in the interpretation of "polygon" as described in this disclosure.

[0012] The same applies to terms describing specific shapes such as trapezoids, circles, and convex shapes, as well as terms relating to each side that forms those shapes. In other words, even if a side or circumference has been processed at the corners or in the middle, the interpretation of "side" or "circumference" includes the processed parts.

[0013] Furthermore, "to cover" or "to enclose" is not limited to direct contact, but also includes indirect covering, for example, through other components. Similarly, "to arrange" is not limited to direct contact, but also includes indirect arrangement, for example, through other components.

[0014] [Embodiment] An example of the overall configuration of the light-emitting element 1 according to the embodiment will be described with reference to Figures 1 to 3. Figure 1 is a schematic top view showing the light-emitting element 1 according to the embodiment. Figure 2 is a schematic cross-sectional view showing the light-emitting element 1 according to the embodiment along the line II-II in Figure 1. Figure 3 is a schematic partial cross-sectional view showing a part of the light-emitting element 1 according to the embodiment in region III of Figure 2.

[0015] As shown in Figures 1 and 2, the light-emitting element 1 comprises a semiconductor structure 10, a substrate 20, a first electrode 30, a second electrode 40, a bonding member 50, a first metal layer 61, and a second metal layer 64. The light-emitting element 1 may also further comprise other components such as a third metal layer 67, a fourth metal layer 69, a first pad electrode 32, a reflective electrode 35, a second pad electrode 42, a conductive member 45, a first insulating layer 71, a second insulating layer 72, a third insulating layer 73, a first protective layer 81, a second protective layer 82, and a third protective layer 83. In this specification, "metal" or "metal layer" includes not only metal materials composed of a single metal element but also alloy materials composed of multiple metal elements. As shown in Figure 1, the shape of the light-emitting element 1 in top view is rectangular. When the shape of the light-emitting element 1 in top view is rectangular, the length of one side of the rectangle is, for example, 50 μm or more and 2000 μm or less.

[0016] <Semiconductor structure 10> The semiconductor structure 10 includes a first semiconductor layer 11, a second semiconductor layer 12, and an active layer 13. The first semiconductor layer 11 and the second semiconductor layer 12 are semiconductor layers having different conductivity types. For example, if the first semiconductor layer 11 is a p-type semiconductor layer, the second semiconductor layer 12 is an n-type semiconductor layer. Also, if the first semiconductor layer 11 is an n-type semiconductor layer, the second semiconductor layer 12 is a p-type semiconductor layer. The active layer 13 is located between the first semiconductor layer 11 and the second semiconductor layer 12 in the Z-axis direction. The active layer 13 may have a single quantum well (SQW) structure or a multi-quantum well (MQW) structure containing multiple well layers. The first semiconductor layer 11, the active layer 13, and the second semiconductor layer 12 are located in this order toward the +Z side in the Z-axis direction.

[0017] The first semiconductor layer 11, the second semiconductor layer 12, and the active layer 13 are each composed of, for example, a nitride semiconductor. Nitride semiconductors are made of In x Al y Ga 1-x-yThe semiconductor comprises all compositions in which the composition ratios x and y are varied within their respective ranges in the chemical formula N(0≦x, 0≦y, x+y≦1). The emission peak wavelength of the light emitted by the active layer 13 is preferably 280 nm to 480 nm, more preferably 300 nm to 420 nm, and even more preferably 310 nm to 410 nm. The active layer 13 emits visible light such as ultraviolet light or blue light. However, the emission peak wavelength of the light emitted by the active layer 13 is not limited to these. The active layer 13 may emit visible light of a different color than blue light.

[0018] For example, when GaN is used as the nitride semiconductor, the thermal expansion coefficient of GaN in the a-axis is approximately 5.59 × 10⁻⁶. -6 It is / K. Also, the thermal expansion coefficient of GaN along the c-axis is approximately 3.17 × 10⁻⁶. -6 The coefficient of thermal expansion is / K. Here, in this specification, "coefficient of thermal expansion" means the coefficient of linear expansion. Furthermore, in this specification, "coefficient of linear expansion" means the coefficient of linear expansion in the temperature range of 25°C to 280°C. The coefficient of linear expansion can be measured, for example, in accordance with JIS Z 2285.

[0019] As shown in Figures 1 and 2, the semiconductor structure 10 has a first region 10a, a second region 10b, and a third region 10c. The semiconductor structure 10 also has an opening 15 located in a position that overlaps with the third region 10c in a top view. As shown in Figure 2, the opening 15 is arranged continuously with the first semiconductor layer 11 and the active layer 13, and reaches the second semiconductor layer 12. The first semiconductor layer 11 and the active layer 13 are not located inside the opening 15 in the cross-sectional view shown in Figure 2. Inside the opening 15, for example, a part of the second electrode 40, a part of the bonding member 50, a part of the first metal layer 61, a part of the second insulating layer 72, and a part of the third insulating layer 73 are arranged, respectively. Preferably, the part of the first metal layer 61 located inside the opening 15 includes a recess 61r.

[0020] The first region 10a includes a first semiconductor layer 11, a second semiconductor layer 12, and an active layer 13. As shown in Figure 1, the top-view area of ​​the first region 10a is larger than, for example, the top-view area of ​​the second region 10b and the top-view area of ​​the third region 10c. However, the configuration of the first region 10a is not limited thereto.

[0021] The second region 10b includes the second semiconductor layer 12, but does not include the first semiconductor layer 11 and the active layer 13. As shown in Figure 1, the second region 10b is arranged around the first region 10a. That is, in a top view, the second region 10b is arranged in a frame shape surrounding the first region 10a. However, the configuration of the second region 10b is not limited to this.

[0022] The third region 10c includes the second semiconductor layer 12, but does not include the first semiconductor layer 11 and the active layer 13. The third region 10c is surrounded by the first region 10a when viewed from above. The third region 10c is also separated from the second region 10b. As shown in Figure 1, it is preferable that the semiconductor structure 10 has a plurality of third regions 10c. In the example shown in Figure 1, the plurality of third regions 10c are arranged at approximately equal intervals in the X-axis and Y-axis directions, respectively. However, each of the plurality of third regions 10c may be arranged in a different position than in the example shown in Figure 1.

[0023] The second semiconductor layer 12 has a first surface 12a and a second surface 12b that overlap with the first region 10a in the Z-axis direction. The first surface 12a is positioned on the +Z side of the second surface 12b. As shown in Figure 2, it is preferable that the first surface 12a has a plurality of protrusions. Having a plurality of protrusions on the first surface 12a can improve the efficiency of light extraction from the active layer 13 to the outside via the second semiconductor layer 12.

[0024] The second semiconductor layer 12 has a third surface 12c and a fourth surface 12d that overlap with the second region 10b in the Z-axis direction. The third surface 12c is located on the +Z side of the fourth surface 12d and is connected to the first surface 12a. The fourth surface 12d is located on the -Z side of the third surface 12c and is exposed from the first semiconductor layer 11 and the active layer 13.

[0025] The second semiconductor layer 12 has a fifth surface 12e and a sixth surface 12f that overlap with the third region 10c in the Z-axis direction. The fifth surface 12e is located on the +Z side of the sixth surface 12f and is connected to the first surface 12a. The sixth surface 12f is located on the -Z side of the fifth surface 12e and is exposed from the first semiconductor layer 11 and the active layer 13.

[0026] The sixth surface 12f is in contact with a portion of the second electrode 40 located inside the opening 15 in the cross-sectional view shown in Figure 2. Furthermore, it is preferable that the fifth surface 12e, which overlaps with the sixth surface 12f in the top view, is a flat surface. Having the fifth surface 12e as a flat surface reduces the likelihood of the distance between the fifth surface 12e and the sixth surface 12f in the Z-axis direction becoming excessively short. In other words, it reduces the likelihood of the distance between the fifth surface 12e and the portion of the second electrode 40 in contact with the sixth surface 12f becoming excessively short in the Z-axis direction. This reduces the increase in the forward voltage applied to the semiconductor structure 10.

[0027] <Substrate 20> The substrate 20 is placed on the side of the semiconductor structure 10 that is on the first semiconductor layer 11 side. In the example shown in Figure 2, the substrate 20 is placed on the -Z side of the first semiconductor layer 11. In the example shown in Figure 1, the substrate 20 has a roughly rectangular shape when viewed from above. However, the shape of the substrate 20 when viewed from above may be a roughly circular, roughly elliptical, or a roughly polygonal shape other than a rectangle.

[0028] The substrate 20 is made of a semiconductor material such as silicon. However, the material constituting the substrate 20 is not limited to a semiconductor material. The substrate 20 may be made of a metallic material such as copper, or of an insulating material such as ceramics, resin, and glass. The thickness of the substrate 20 is, for example, 100 μm or more and 1000 μm or less.

[0029] <First electrode 30, first pad electrode 32, reflective electrode 35> The first electrode 30 is positioned between the semiconductor structure 10 and the substrate 20 in the Z-axis direction. More specifically, as shown in Figure 2, the first electrode 30 is positioned between the first semiconductor layer 11 and the substrate 20. As shown in Figure 1, in a top view, a portion of the first electrode 30 is positioned in a region that does not overlap with the semiconductor structure 10. The first electrode 30 is electrically connected to the first semiconductor layer 11. If the first semiconductor layer 11 is a p-type semiconductor layer, the first electrode 30 corresponds to the p-side electrode. If the first semiconductor layer 11 is an n-type semiconductor layer, the first electrode 30 corresponds to the n-side electrode.

[0030] The first electrode 30 is composed of a single metallic material such as gold, silver, aluminum, nickel, rhodium, copper, titanium, platinum, palladium, molybdenum, chromium, or tungsten, or an alloy material containing these metals. Among these, the first electrode 30 is preferably composed of copper or aluminum, which are relatively inexpensive and have excellent electrical conductivity. However, the materials constituting the first electrode 30 are not limited to these. The first electrode 30 may have a single-layer structure having one layer composed of these metallic or alloy materials, or it may have a laminated structure having multiple layers composed of these metallic or alloy materials. The thickness of the first electrode 30 is, for example, 300 nm or more and 1000 nm or less.

[0031] The first pad electrode 32 is electrically connected to the first electrode 30. In the example shown in Figure 1, the first pad electrode 32 is separated from the semiconductor structure 10 in a top view. The first pad electrode 32 is connected to the first electrode 30, which is located in a region that does not overlap with the semiconductor structure 10 in a top view. In the example shown in Figure 2, the first pad electrode 32 is located inside an opening 77a that penetrates the second insulating layer 72, the second protective layer 82, and the third protective layer 83. The first pad electrode 32 is a conductive member electrically connected to an external power supply. The first pad electrode 32 may be made of the same metallic or alloy material as the first electrode 30. The first pad electrode 32 may have a single-layer structure with one layer made of these metallic or alloy materials, or it may have a laminated structure with multiple layers made of these metallic or alloy materials. The thickness of the first pad electrode 32 is, for example, 500 nm or more and 900 nm or less.

[0032] The reflective electrode 35 is electrically connected to the first electrode 30 and the first semiconductor layer 11, respectively. Power from an external power source is supplied to the first semiconductor layer 11 through the first pad electrode 32, the first electrode 30, and the reflective electrode 35. The lower surface of the reflective electrode 35 is in contact with a portion of the first electrode 30 located in an opening 77b that penetrates the first insulating layer 71 and the second insulating layer 72. The upper surface of the reflective electrode 35 is in contact with the lower surface of the first semiconductor layer 11.

[0033] The reflective electrode 35 may be made of the same metallic or alloy material as the first electrode 30. Among these, it is preferable that the reflective electrode 35 be made of silver or aluminum, which have excellent light reflectivity. By making the reflective electrode 35 of silver or aluminum, for example, light emitted from the active layer 13 toward the -Z side, transmitted through the first semiconductor layer 11, and reaching the reflective electrode 35 can be reflected toward the +Z side. This improves the light extraction efficiency. The reflective electrode 35 may have a single-layer structure with one layer made of these metallic or alloy materials, or it may have a laminated structure with multiple layers made of these metallic or alloy materials. The thickness of the reflective electrode 35 is, for example, 100 nm to 140 nm.

[0034] <Second electrode 40, second pad electrode 42, conductive member 45> The second electrode 40 is electrically connected to the second semiconductor layer 12. If the second semiconductor layer 12 is an n-type semiconductor layer, the second electrode 40 corresponds to the n-side electrode. If the second semiconductor layer 12 is a p-type semiconductor layer, the second electrode 40 corresponds to the p-side electrode.

[0035] The second electrode 40 may be positioned on the -Z side of the semiconductor structure 10, similar to the first electrode 30. In the example shown in Figure 2, the second electrode 40 is positioned between the first electrode 30 and the substrate 20 in the Z-axis direction. The second electrode 40 may also be positioned on the -Z side of the first electrode 30. However, the second electrode 40 may also be positioned on the +Z side of the first electrode 30. The second electrode 40 may be positioned on the +Z side of the semiconductor structure 10, such as on the top surface of the semiconductor structure 10.

[0036] A portion of the second electrode 40 is positioned inside the opening 15 when viewed from above. A portion of the second electrode 40 is in contact with the sixth surface 12f of the second semiconductor layer 12 inside the opening 15 when viewed from above. That is, the second electrode 40 is electrically connected to the second semiconductor layer 12 at the opening 15. The second electrode 40 may be made of the same metallic or alloy material as the first electrode 30. Preferably, the second electrode 40 is made of copper or aluminum, which are relatively inexpensive and have excellent electrical conductivity. However, the material constituting the second electrode 40 is not limited to these. The second electrode 40 may have a single-layer structure having one layer made of these metallic or alloy materials, or it may have a laminated structure having multiple layers made of these metallic or alloy materials. The thickness of the second electrode 40 is, for example, 300 nm or more and 1000 nm or less.

[0037] The second pad electrode 42 is electrically connected to the second electrode 40 via a conductive member 45. However, the second pad electrode 42 may be in direct contact with the second electrode 40 without the conductive member 45. In the example shown in Figure 1, the second pad electrode 42 is separated from the semiconductor structure 10 in a top view. The second pad electrode 42 is located, for example, on the opposite side of the semiconductor structure 10 from the first pad electrode 32 in a top view. In the example shown in Figure 2, the second pad electrode 42 is located inside an opening 77c that penetrates the second insulating layer 72, the second protective layer 82, and the third protective layer 83. The second pad electrode 42 is a conductive member electrically connected to an external power source. Power from the external power source is supplied to the second semiconductor layer 12 through the second pad electrode 42, the conductive member 45, and the second electrode 40. The second pad electrode 42 may be made of the same metallic or alloy material as the second electrode 40. The second pad electrode 42 may have a single-layer structure consisting of one layer made of a metal material or an alloy material, or it may have a laminated structure consisting of multiple layers made of a metal material or an alloy material. The thickness of the second pad electrode 42 is, for example, 500 nm or more and 900 nm or less.

[0038] The conductive member 45 is electrically connected to the second electrode 40 and the second pad electrode 42, respectively. The conductive member 45 is insulated from the first electrode 30 by, for example, a third insulating layer 73. In the example shown in Figure 1, the conductive member 45 is separated from the semiconductor structure 10 in a top view. In the example shown in Figure 2, the conductive member 45 is positioned between the second electrode 40 and the second pad electrode 42 in the Z-axis direction. The upper surface of the conductive member 45 is in contact with the lower surface of the second pad electrode 42. The lower surface of the conductive member 45 is also in contact with a portion of the second electrode 40 located in an opening 77d that penetrates the third insulating layer 73. The conductive member 45 may be made of the same metallic or alloy material as the second electrode 40. The conductive member 45 may have a single-layer structure with one layer made of metallic or alloy material, or it may have a laminated structure with multiple layers made of metallic or alloy material. The thickness of the conductive member 45 is, for example, 400 nm or more and 900 nm or less.

[0039] <Bonding member 50> The bonding member 50 is disposed between the semiconductor structure 10 and the substrate 20. The bonding member 50 bonds the semiconductor structure 10 and the substrate 20. In the example shown in FIG. 2, the bonding member 50 is disposed on the -Z side of the second electrode 40. The bonding member 50 covers the first metal layer 61 that covers the second electrode 40 disposed in the opening 15. Examples of the bonding member 50 include alloy materials such as gold-tin and nickel-tin, and metal sintered bodies derived from metal pastes such as gold paste and silver paste. Among these, the bonding member 50 preferably contains nickel-tin with a high melting point. By including nickel-tin in the bonding member 50, the possibility of the bonding member 50 being deformed by heat can be reduced.

[0040] For example, the bonding member 50 contains a metal material having a coefficient of thermal expansion of 10×10 -6 / K or more and 25×10 -6 / K or less. For example, the coefficient of thermal expansion of nickel is about 13.4×10 -6 / K. The coefficient of thermal expansion of tin is about 22×10 -6 / K. The coefficient of thermal expansion of gold is about 14.2×10 -6 / K. When the bonding member 50 is made of an alloy material and it is difficult to measure the coefficient of thermal expansion, the value obtained by adding the coefficients of thermal expansion of the materials constituting the alloy material and dividing the sum by the number of materials constituting the alloy material may be used as a reference value.

[0041] <First metal layer 61, second metal layer 64> The first metal layer 61 is disposed between the semiconductor structure 10 and the bonding member 50 in the Z-axis direction. The second metal layer 64 is disposed between the bonding member 50 and the substrate 20 in the Z-axis direction. That is, in the Z-axis direction, the bonding member 50 is disposed between the first metal layer 61 and the second metal layer 64. The lower surface of the first metal layer 61 contacts the upper surface of the bonding member 50. The upper surface of the second metal layer 64 contacts the lower surface of the bonding member 50.

[0042] The thermal expansion coefficients of the first metal layer 61 and the second metal layer 64 are smaller than the thermal expansion coefficient of the bonding member 50. However, unlike in this embodiment, if the first metal layer 61 and the second metal layer 64 are not placed between the semiconductor structure 10 and the substrate 20 in the Z-axis direction, it may not be possible to sufficiently reduce the influence of stress within the light-emitting element 1 caused by the difference in thermal expansion coefficients of the semiconductor structure 10, the substrate 20, and the bonding member 50. In other words, it may not be possible to sufficiently reduce the warping of the light-emitting element 1. In contrast, in this embodiment, by placing the first metal layer 61 and the second metal layer 64, each having a thermal expansion coefficient smaller than that of the bonding member 50, between the semiconductor structure 10 and the bonding member 50, and between the bonding member 50 and the substrate 20, respectively, the influence of stress within the light-emitting element 1 caused by the difference in thermal expansion coefficients of the semiconductor structure 10, the substrate 20, and the bonding member 50 can be reduced. As a result, the warping of the light-emitting element 1 can be reduced.

[0043] Preferably, each of the first metal layer 61 and the second metal layer 64 contains tungsten, tantalum, or molybdenum. By including tungsten, tantalum, or molybdenum, which have a lower coefficient of thermal expansion compared to metal materials such as gold, silver, copper, and aluminum, the warping of the light-emitting element 1 can be reduced more effectively. Furthermore, tungsten, tantalum, and molybdenum are preferable because they have a high melting point, high rigidity, and excellent properties such as electrical conductivity, heat dissipation, and creep resistance. However, the metal materials constituting each of the first metal layer 61 and the second metal layer 64 are not limited to these, as long as they have a coefficient of thermal expansion smaller than the coefficient of thermal expansion of the joining member 50.

[0044] For example, the first metal layer 61 and the second metal layer 64 have a thermal expansion coefficient of 3.5 × 10⁻⁶ -6 / K or more 9.5×10 -6 It is preferable to include a metallic material with a thermal expansion coefficient of 10°C or less. For example, the thermal expansion coefficient of tungsten is approximately 4.5 × 10°C. -6 It is / K. The thermal expansion coefficient of tantalum is approximately 6.5 × 10⁻⁶. -6 It is / K. The thermal expansion coefficient of molybdenum is approximately 5.1 × 10⁻⁶.-6 It is / K.

[0045] As shown in Figure 3, it is preferable that the thickness 64T of the second metal layer 64 is thinner than the thickness 61T of the first metal layer 61. An example of the effect of having the thickness 64T of the second metal layer 64 thinner than the thickness 61T of the first metal layer 61 will be explained. As a premise, as shown in Figure 2, the first metal layer 61 has a stepped region in the Z-axis direction at a position that overlaps with the second region 10b of the semiconductor structure 10. In addition, the first metal layer 61 has a recess 61r in the Z-axis direction at a position that overlaps with the third region 10c of the semiconductor structure 10. In other words, the first metal layer 61 has an uneven shape including the stepped region and the recess 61r. Furthermore, the upper surface of the bonding member 50 has an uneven shape that follows the uneven shape of the first metal layer 61. As a result, the contact area between the upper surface of the bonding member 50 and the lower surface of the first metal layer 61 is relatively large, and the adhesion between the two is improved. Therefore, even if the thickness 61T of the first metal layer 61 increases and the stress within the first metal layer 61 increases, the possibility of the first metal layer 61 delaminating from the joining member 50 is reduced. In contrast, as shown in Figure 2, the upper surface of the second metal layer 64 is a surface with almost no unevenness. Therefore, if the thickness 64T of the second metal layer 64 increases and the stress within the second metal layer 64 increases, the possibility of the second metal layer 64 delaminating from the joining member 50 increases. Therefore, from the viewpoint of reducing the warping of the light-emitting element 1, it is preferable that the thickness 64T of the second metal layer 64 is thick, while from the viewpoint of reducing the possibility of the second metal layer 64 delaminating from the joining member 50, it is preferable that the thickness 64T of the second metal layer 64 is thin. In this embodiment, by making the thickness 64T of the second metal layer 64 thinner than the thickness 61T of the first metal layer 61, both the warping of the light-emitting element 1 and the possibility of the second metal layer 64 delaminating from the joining member 50 can be reduced. In other words, the reliability of the light-emitting element 1 can be improved.

[0046] From the viewpoint of reducing the possibility of warping of the light-emitting element 1 and the second metal layer 64 peeling off from the bonding member 50, the thickness 64T of the second metal layer 64 is preferably 60% to 90% of the thickness 61T of the first metal layer 61. More preferably, the thickness 64T of the second metal layer 64 is 65% to 85% of the thickness 61T of the first metal layer 61. The thickness 61T of the first metal layer 61 is, for example, 300 nm to 1200 nm, preferably 500 nm to 1000 nm. The thickness 64T of the second metal layer 64 is, for example, greater than 0 nm, preferably 200 nm to 600 nm.

[0047] The first metal layer 61 covers the second electrode 40 positioned in the opening 15. Preferably, the first metal layer 61 covers a portion of the second electrode 40 positioned inside the opening 15 when viewed from above. In the example shown in Figure 2, the recess 61r of the first metal layer 61 covers a portion of the second electrode 40 positioned inside the opening 15 when viewed from above. Furthermore, it is preferable that the recess 61r of the first metal layer 61 is covered by the joining member 50. In the example shown in Figure 2, a portion of the joining member 50 covering the recess 61r of the first metal layer 61 is positioned inside the recess 61r when viewed from above. This further increases the contact area between the lower surface of the first metal layer 61 and the upper surface of the joining member 50. As a result, the possibility of the first metal layer 61 peeling off from the joining member 50 can be further reduced.

[0048] In a top view, the outer edge of the first metal layer 61 may coincide with, for example, the outer edge of the substrate 20. Also, in a top view, the outer edge of the first metal layer 61 may be located inside, for example, the outer edge of the substrate 20. In a top view, the outer edge of the second metal layer 64 may coincide with, for example, the outer edge of the substrate 20. Also, in a top view, the outer edge of the second metal layer 64 may be located inside, for example, the outer edge of the substrate 20.

[0049] <Third metal layer 67, fourth metal layer 69> The third metal layer 67 is positioned between the second metal layer 64 and the substrate 20 in the Z-axis direction. The third metal layer 67 primarily serves as an adhesion layer to improve the bonding between the second metal layer 64 and the substrate 20. The material of the third metal layer 67 can be appropriately selected to enhance adhesion with both the second metal layer 64 and the substrate 20. For example, at least one of nickel, titanium, and platinum may be used. However, the material constituting the third metal layer 67 is not limited to these.

[0050] The thickness of the third metal layer 67 may be different from the thickness 61T of the first metal layer 61 and the thickness 64T of the second metal layer 64. Alternatively, the thickness of the third metal layer 67 may be the same as at least one of the thicknesses 61T of the first metal layer 61 and 64T of the second metal layer 64. For example, the thickness of the third metal layer 67 is 100 nm or more and 300 nm or less.

[0051] The fourth metal layer 69 is positioned on the lower surface of the substrate 20. The fourth metal layer 69 may be composed of the same metallic or alloy material as the third metal layer 67. However, the material constituting the fourth metal layer 69 is not limited to these.

[0052] The thickness of the fourth metal layer 69 may be different from the thickness of the first metal layer 61 (61T), the second metal layer 64 (64T), and the third metal layer 67. Alternatively, the thickness of the fourth metal layer 69 may be the same as at least one of the thicknesses of the first metal layer 61 (61T), the second metal layer 64 (64T), and the third metal layer 67. For example, the thickness of the fourth metal layer 69 is 200 nm or more and 300 nm or less.

[0053] The fourth metal layer 69 may be electrically connected to a conductive member, such as a wiring layer, which is arranged on the upper surface of the wiring board. That is, the fourth metal layer 69 may be electrically connected to an external power supply via the wiring board. Power from the external power supply may be supplied to the second semiconductor layer 12 via the fourth metal layer 69, the substrate 20, the third metal layer 67, the second metal layer 64, the bonding member 50, the first metal layer 61, and the second electrode 40. In this case, the second pad electrode 42 and the conductive member 45 do not need to be placed on the light-emitting element 1.

[0054] <First insulating layer 71, second insulating layer 72, third insulating layer 73> As shown in Figure 2, the first insulating layer 71 covers the lower surface of the first semiconductor layer 11 and a portion of the side and lower surfaces of the reflective electrode 35. By covering the lower surface of the first semiconductor layer 11 and a portion of the side and lower surfaces of the reflective electrode 35 with the first insulating layer 71, migration due to the intrusion of moisture and the like can be reduced. The first insulating layer 71 is, for example, silicon oxide or silicon nitride. However, the first insulating layer 71 may not be provided, and the second insulating layer 72 may cover the lower surface of the first semiconductor layer 11 and a portion of the side and lower surfaces of the reflective electrode 35.

[0055] The second insulating layer 72 covers the first insulating layer 71. Furthermore, the second insulating layer 72 covers a portion of the fourth surface 12d and the sixth surface 12f of the second semiconductor layer 12. Additionally, the second insulating layer 72 covers the side surfaces of the first semiconductor layer 11, the active layer 13, and the second semiconductor layer 12 in the first region 10a of the semiconductor structure 10. The second insulating layer 72 insulates the first semiconductor layer 11 and the active layer 13 from the second electrode 40. The second insulating layer 72 is, for example, silicon oxide or silicon nitride. However, the material constituting the second insulating layer 72 is not limited to these.

[0056] The third insulating layer 73 covers the lower surface of the first electrode 30. The third insulating layer 73 is positioned between the first electrode 30 and the second electrode 40 in the Z-axis direction. The third insulating layer 73 insulates the first electrode 30 and the second electrode 40. The third insulating layer 73 may also cover a part of the lower surface and the sides of the conductive member 45. The third insulating layer 73 may be positioned between the first electrode 30 and the conductive member 45. The third insulating layer 73 insulates the first electrode 30 and the conductive member 45. The third insulating layer 73 is, for example, silicon oxide or silicon nitride. However, the material constituting the third insulating layer 73 is not limited to these.

[0057] <First protective layer 81, second protective layer 82, third protective layer 83> The first protective layer 81 covers a portion of the first surface 12a, the third surface 12c, and the fifth surface 12e of the second semiconductor layer 12. The first protective layer 81 may be silicon oxide or silicon nitride. However, the material constituting the first protective layer 81 is not limited to these.

[0058] The second protective layer 82 covers the first protective layer 81. The second protective layer 82 may also cover the sides of the second semiconductor layer 12. The second protective layer 82 may be silicon oxide or silicon nitride. However, the material constituting the second protective layer 82 is not limited to these.

[0059] The third protective layer 83 covers the second protective layer 82. Furthermore, the third protective layer 83 covers the region on the first surface 12a of the second semiconductor layer 12 that is not covered by the first protective layer 81 and the second protective layer 82. As shown in Figure 2, the third protective layer 83 may cover the first surface 12a of the second semiconductor layer 12, which has a plurality of protrusions. In this case, the third protective layer 83 may have an uneven shape that conforms to the plurality of protrusions on the first surface 12a of the second semiconductor layer 12. The third protective layer 83 may be silicon oxide or silicon nitride. However, the material constituting the third protective layer 83 is not limited to these.

[0060] The first protective layer 81, the second protective layer 82, and the third protective layer 83 may each be composed of the same material and physically integrated with one another.

[0061] [Method for manufacturing the light-emitting element 1] Next, an example of a method for manufacturing the light-emitting element 1 according to the embodiment will be described with reference to Figures 4 to 14. Figures 4 to 14 are cross-sectional views illustrating an example of a method for manufacturing the light-emitting element 1 according to the embodiment.

[0062] A method for manufacturing a light-emitting element 1 includes the steps of: preparing a first wafer 100W having a first substrate 100, a semiconductor structure 10, and a first metal layer 61; preparing a second wafer 200W having a second substrate 20 and a second metal layer 64; joining the first metal layer 61 of the first wafer 100W and the second metal layer 64 of the second wafer 200W using a bonding member 50; and removing the first substrate 100 from the semiconductor structure 10. The method for manufacturing a light-emitting element 1 may further include the step of separating it into a plurality of light-emitting elements 1. Furthermore, the method for manufacturing a light-emitting element 1 may include other steps such as forming a first protective layer 81, a second protective layer 82, and a third protective layer 83, and forming a first pad electrode 32 and a second pad electrode 42.

[0063] The process of preparing a first wafer 100W having a first substrate 100, a semiconductor structure 10, and a first metal layer 61 may hereafter be referred to as the "process of preparing the first wafer 100W". The process of preparing a second wafer 200W having a second substrate 20 and a second metal layer 64 may hereafter be referred to as the "process of preparing the second wafer 200W". The process of joining the first metal layer 61 of the first wafer 100W and the second metal layer 64 of the second wafer 200W using a joining member 50 may hereafter be referred to as the "process of joining using a joining member 50". The process of removing the first substrate 100 from the semiconductor structure 10 may hereafter be referred to as the "process of removing the first substrate 100".

[0064] The second substrate 20 corresponds to the substrate 20 described with reference to Figure 2. The thermal expansion coefficients of the first metal layer 61 and the second metal layer 64 are smaller than the thermal expansion coefficient of the bonding member 50. The thickness 64T of the second metal layer 64 is thinner than the thickness 61T of the first metal layer 61.

[0065] <Process for preparing the first wafer (100W)> Referring to Figure 4, an example of the process for preparing the first wafer 100W will be described. As shown in Figure 4, the semiconductor structure 10 is placed on the first substrate 100. The semiconductor structure 10 is formed, for example, by the MOCVD (Metal-Organic Chemical Vapor Deposition) method. The first metal layer 61 is placed on the semiconductor structure 10. The first metal layer 61 is formed, for example, by the sputtering method. Preferably, the first metal layer 61 is formed to include a recess 61r inside the opening 15 when viewed from above.

[0066] The first substrate 100 is, for example, a growth substrate for the semiconductor structure 10. Examples of materials constituting the first substrate 100 include sapphire, silicon, aluminum nitride, aluminum oxide, gallium nitride, and silicon carbide. However, the materials constituting the first substrate 100 are not limited to these. In the Z-axis direction, an underlayer made of AlGaN or AlN may be placed between the first substrate 100 and the semiconductor structure 10.

[0067] The first wafer 100W further comprises a reflective electrode 35, a first insulating layer 71, a second insulating layer 72, a first electrode 30, a first pad electrode 32, a third insulating layer 73, a second electrode 40, and a conductive member 45. Each of the reflective electrode 35, the first insulating layer 71, the second insulating layer 72, the first electrode 30, the first pad electrode 32, the third insulating layer 73, the second electrode 40, and the conductive member 45 is positioned between the semiconductor structure 10 and the first metal layer 61 in the Z-axis direction. In the process of preparing the first wafer 100W, these members are formed, for example, by sputtering or CVD (Chemical Vapor Deposition). Furthermore, in the process of preparing the first wafer 100W, the opening 15 of the semiconductor structure 10, the opening 77b that penetrates the first insulating layer 71 and the second insulating layer 72, and the opening 77d that penetrates the third insulating layer 73 are formed by dry etching, such as reactive ion etching.

[0068] <Process for preparing the second wafer, 200W> Referring to Figure 5, an example of the process for preparing the second wafer 200W will be described. The process for preparing the second wafer 200W may be performed before or after the process for preparing the first wafer 100W. Alternatively, the process for preparing the second wafer 200W may be performed at the same time as the process for preparing the first wafer 100W.

[0069] The second metal layer 64 is disposed on the second substrate 20. Furthermore, as shown in Figure 5, the second wafer 200W may further include a third metal layer 67 disposed between the second substrate 20 and the second metal layer 64 in the Z-axis direction. That is, in the process of preparing the second wafer 200W, a second wafer 200W further including a third metal layer 67 disposed between the second substrate 20 and the second metal layer 64 may be prepared. The second metal layer 64 and the third metal layer 67 are formed, for example, by a sputtering method.

[0070] <Step of joining using joining member 50> Referring to Figures 6 and 7, an example of the joining process using the joining member 50 will be described. The joining process using the joining member 50 is performed after the process of preparing the first wafer 100W and the process of preparing the second wafer 200W.

[0071] The following explanation will be given using the case where the joining member 50 is an alloy material containing a first component and a second component as an example. For example, when nickel-tin is used as the joining member 50, the metal material corresponding to the first component is nickel, and the metal material corresponding to the second component is tin. First, as shown in Figure 6, a layer 50S1 of the first component is formed so as to cover the region of the first metal layer 61 that overlaps with the second region 10b of the semiconductor structure 10 in the Z-axis direction (in Figure 6, the stepped region of the first metal layer 61), and the region of the first metal layer 61 that includes the recess 61r that overlaps with the third region 10c of the semiconductor structure 10 in the Z-axis direction. The layer 50S1 of the first component is formed, for example, by a sputtering method.

[0072] Next, as shown in Figure 7, a second component layer 50S2 is formed so as to cover the first component layer 50S1 and the first metal layer 61 exposed from the first component layer 50S1. The second component layer 50S2 is formed, for example, by sputtering. Subsequently, the second wafer 200W is placed so as to overlap the second component layer 50S2. At this time, the first component layer 50S1 and the second component layer 50S2 are thermally bonded together while sandwiched between the first wafer 100W and the second wafer 200W. As a result, a bonding member 50 is formed by a eutectic reaction between the first and second components. In addition, as the bonding member 50 is formed, the first metal layer 61 of the first wafer 100W and the second metal layer 64 of the second wafer 200W are bonded together. As a result, a bonded body 1J is obtained.

[0073] By pre-forming a layer 50S1 of the first component in narrow regions such as recesses 61r of the first metal layer 61, the possibility of voids occurring in the bonding member 50 obtained by the eutectic reaction between the first and second components can be reduced. This makes it possible to form a high-quality bonding member 50 and improve the bonding performance between the first metal layer 61 of the first wafer 100W and the second metal layer 64 of the second wafer 200W.

[0074] <Step to remove the first substrate 100> Referring to Figure 8, an example of the process for removing the first substrate 100 will be described. The process for removing the first substrate 100 is performed after the process of joining using the joining member 50. In the process for removing the first substrate 100, for example, the first substrate 100 is removed from the semiconductor structure 10 by a laser lift-off method. Alternatively, after removing the first substrate 100, the upper surface of the semiconductor structure 10 that was joined to the first substrate 100 may be polished or ground.

[0075] <Steps for forming the first protective layer 81, the second protective layer 82, and the third protective layer 83> Referring to Figures 9 to 11, an example of the process for forming the first protective layer 81, the second protective layer 82, and the third protective layer 83 will be described. As shown in Figure 9, first, the first protective layer 81 is formed so as to cover the upper surface of the semiconductor structure 10. The first protective layer 81 is formed, for example, by the CVD method.

[0076] Next, a portion of the semiconductor structure 10 is removed using the first protective layer 81, which has been formed on the upper surface of the semiconductor structure 10, with the portion overlapping with the second region 10b removed, as a mask. For example, the region of the second region 10b of the semiconductor structure 10 that is located on the outside when viewed from above is removed. The portion of the semiconductor structure 10 is removed by dry etching, such as reactive ion etching. Then, as shown in Figure 10, a second protective layer 82 is formed to cover the side surface of the semiconductor structure 10 that is exposed as a result of the removal of a portion of the semiconductor structure 10, and the upper surface of the second insulating layer 72. The second protective layer 82 is formed by, for example, the CVD method.

[0077] Next, a portion of the first protective layer 81 is removed using the second protective layer 82, which has been formed on the upper surface of the first protective layer 81, with the portion overlapping with a part of the first region 10a removed, as a mask. For example, a portion of the first protective layer 81 that overlaps with the first region 10a of the semiconductor structure 10 in a top view is removed. The portion of the first protective layer 81 is removed by dry etching, such as reactive ion etching. In addition, a plurality of protrusions are formed on a portion of the first surface 12a of the second semiconductor layer 12 that is exposed as a result of the removal of a portion of the first protective layer 81. The plurality of protrusions are formed by wet etching using a strongly alkaline solution, for example. Furthermore, as shown in Figure 11, a third protective layer 83 is formed so as to cover the plurality of protrusions formed on the first surface 12a of the second semiconductor layer 12 and the upper surface of the second protective layer 82, respectively. The third protective layer 83 is formed by CVD, for example.

[0078] <Steps for forming the first pad electrode 32 and the second pad electrode 42> Referring to Figure 12, an example of the process for forming the first pad electrode 32 and the second pad electrode 42 will be described. The process for forming the first pad electrode 32 and the second pad electrode 42 is performed after the process for forming the first protective layer 81, the second protective layer 82, and the third protective layer 83.

[0079] Prior to forming the first pad electrode 32 and the second pad electrode 42, openings 77a and 77c are formed that penetrate the second protective layer 82, the third protective layer 83, and the second insulating layer 72. The openings 77a and 77c are formed, for example, by wet etching using a strongly alkaline solution. Subsequently, the first pad electrode 32 is formed inside the opening 77a in a top view and on the first electrode 30. The first pad electrode 32 is formed, for example, by sputtering. The second pad electrode 42 is formed inside the opening 77c in a top view and on the conductive member 45. The first pad electrode 32 is formed, for example, by sputtering.

[0080] <Process of separating into multiple light-emitting elements 1> Referring to Figures 13 and 14, the process of separating the light-emitting element into multiple light-emitting elements 1 will be explained. In this process, the assembled body 1J is divided along the planned separation lines 90a and 90b that divide it into multiple light-emitting regions, thereby separating it into multiple light-emitting elements 1. The process of separating the light-emitting elements into multiple light-emitting elements 1 is performed after the process of forming the first pad electrode 32 and the second pad electrode 42.

[0081] Prior to separating the light-emitting elements 1 into multiple pieces, the lower surface of the second substrate 20 may be polished or ground. In this case, for example, a resin sheet may be fixed to the upper surface of the third protective layer 83, and the lower surface of the second substrate 20 may be polished or ground while the bonded body 1J is fixed. Furthermore, after polishing or grinding the lower surface of the second substrate 20, a fourth metal layer 69 may be formed on the lower surface of the second substrate 20. The fourth metal layer 69 is formed, for example, by a sputtering method. After forming the fourth metal layer 69, the sheet may be peeled off from the upper surface of the third protective layer 83.

[0082] Next, as shown in Figure 13, a groove 91a is formed in the joint 1J along the planned fragmentation line 90a located outside the first pad electrode 32 in a top view. Similarly, a groove 91b is formed in the joint 1J along the planned fragmentation line 90b located outside the second pad electrode 42 in a top view. Prior to forming the grooves 91a and 91b, a resin sheet 200S for fixing the joint 1J may be fixed to the lower surface of the fourth metal layer 69.

[0083] The segmentation lines 90a and 90b are lines used to divide the assembled body 1J into multiple light-emitting regions. The segmentation lines 90a and 90b may be virtual lines whose position and length are determined, for example, based on the design information of the light-emitting element 1.

[0084] The grooves 91a and 91b are formed, for example, by irradiating a laser at positions corresponding to the planned separation lines 90a and 90b. As shown in Figure 13, the grooves 91a and 91b penetrate a portion of the second metal layer 64. The grooves 91a and 91b may also be formed in a portion of the second substrate 20.

[0085] As explained with reference to Figure 3, the thickness 64T of the second metal layer 64 is thinner than the thickness 61T of the first metal layer 61. Therefore, even if a high-melting-point metal such as tungsten, tantalum, or molybdenum is used as the second metal layer 64, grooves 91a and 91b can be formed without excessively increasing the laser output. This reduces the possibility of deformation of the joint 1J due to heat generated by laser irradiation.

[0086] Furthermore, as shown in Modification Example 1, which will be explained separately, when the outer edge of the first metal layer 61 is located inside the second metal layer 64 in a top view (i.e., when the outer edge of the second metal layer 64 is located outside the outer edge of the first metal layer 61 in a top view), the first metal layer 61 is located in the region excluding the planned fragmentation lines 90a and 90b in a top view, and the second metal layer 64 is located in the region including the planned fragmentation lines 90a and 90b in a top view. In this case, a part of the first metal layer 61 is not removed when forming the grooves 91a and 91b. As a result, even if a high-melting-point metal such as tungsten, tantalum, or molybdenum is used as the first metal layer 61, the grooves 91a and 91b can be formed without excessively increasing the laser output. As a result, the possibility of deformation of the joint 1J due to heat generated by laser irradiation can be reduced.

[0087] Next, a cutting member such as a dicing blade is inserted into the grooves 91a and 91b, dividing the assembled body 1J into multiple light-emitting elements 1 at the grooves 91a and 91b. By dividing the assembled body 1J into multiple light-emitting elements 1, the light-emitting elements 1 are separated into individual pieces, as shown in Figure 14. If a sheet 200S is fixed to the lower surface of the fourth metal layer 69, the sheet 200S is peeled off from the lower surface of the fourth metal layer 69 after the assembled body 1J has been separated into multiple light-emitting elements 1.

[0088] [Examples] Next, the light-emitting element 1 according to the embodiment will be described in more detail using examples. However, the light-emitting element 1 is not limited to the embodiments described below.

[0089] Each light-emitting element according to Examples 1 to 3, and Comparative Examples 1 and 2, was prepared, and the effect of the thickness 64T of the second metal layer 64 of each light-emitting element on the warping of each element was evaluated. The thickness 61T of the first metal layer 61 of each light-emitting element according to Examples 1 to 3, and Comparative Examples 1 and 2 was kept the same. In addition, the other configurations of each light-emitting element according to Examples 1 to 3, and Comparative Examples 1 and 2 were also kept the same.

[0090] Table 1 shows the thickness 61T of the first metal layer 61, the thickness 64T of the second metal layer 64, the warp value, and the ratio of the thickness 64T of the second metal layer 64 to the thickness 61T of the first metal layer 61 ([thickness of the second metal layer / thickness of the first metal layer] × 100) for Examples 1 to 3, and Comparative Examples 1 and 2. Here, the warp value was measured using a digital measuring instrument (Mitutoyo Corporation, high-precision digital measuring instrument Lightmatic VL-50S-B). More specifically, each light-emitting element was placed on the measuring table of the digital measuring instrument, and the warp value was measured based on the positions of the upper and lower surfaces of the light-emitting elements in the Z-axis direction obtained by contacting the measuring probe of the digital measuring instrument with the light-emitting element. At this time, the position of the measuring table was used as the reference position. A plus sign attached to the warp value corresponds to the direction of warp being +Z. This state of warp is hereinafter referred to as "forward warp". A minus sign attached to the warp value corresponds to the direction of warp being -Z. This type of warping will be referred to as "reverse warping" below. The magnitude of the warping increases as the warping value increases on both the positive and negative sides.

[0091] [Table 1]

[0092] As shown in Table 1, in Comparative Example 1, where the thickness 64T of the second metal layer 64 is zero (i.e., there is no second metal layer 64), the value of warping is large in the reverse warp state. On the other hand, as confirmed in Examples 2 and 3, as the thickness 64T of the second metal layer 64 increases, the value of warping in the reverse warp state decreases. Furthermore, in Example 1, where the thickness 64T of the second metal layer 64 is greater than that of Example 2, the warping changed from reverse warping to forward warping, and the magnitude of warping was further reduced. In contrast, in Comparative Example 2, where the thickness 64T of the second metal layer 64 is the same as the thickness 61T of the first metal layer 61, the value of warping in the forward warp state increased significantly compared to Example 1.

[0093] From these findings, it was confirmed that, from the viewpoint of reducing the degree of warping of the light-emitting element, it is preferable to make the thickness 64T of the second metal layer 64 thinner than the thickness 61T of the first metal layer 61. Furthermore, in Examples 1 and 2, where the thickness 64T of the second metal layer 64 was 60% to 90% of the thickness 61T of the first metal layer 61, it was confirmed that the degree of warping of the light-emitting element was significantly reduced.

[0094] [Example 1] Next, the light-emitting element 1A according to the modified embodiment 1 will be described with reference to Figures 15 and 16. Figure 15 is a schematic cross-sectional view showing the light-emitting element 1A according to the modified embodiment 1. Figure 16 is a schematic top view showing the first metal layer 61A and the second metal layer 64A provided in the light-emitting element 1A according to the modified embodiment 1. In the light-emitting element 1A according to the modified embodiment 1, the same components as in the embodiment will be omitted from the description as appropriate.

[0095] As shown in Figures 15 and 16, the main difference from the embodiment is that the outer edge of the second metal layer 64A of the light-emitting element 1A is positioned outside the outer edge of the first metal layer 61A when viewed from above. As explained with reference to Figures 2 and 3, the thickness 61T of the first metal layer 61 is greater than the thickness 64T of the second metal layer 64. Therefore, as in the embodiment described above, if the outer edge of the second metal layer 64 roughly coincides with the outer edge of the first metal layer 61 when viewed from above, there is a higher possibility that the stress of the first metal layer 61 will be greater than the stress of the second metal layer 64. In contrast, as shown in Figures 15 and 16, by positioning the outer edge of the second metal layer 64A outside the outer edge of the first metal layer 61A when viewed from above, the area of ​​the first metal layer 61A when viewed from above can be reduced compared to the area of ​​the second metal layer 64A when viewed from above. That is, the stress of the first metal layer 61A is reduced, and the possibility of the first metal layer 61A peeling off from the joining member 50 can be further reduced.

[0096] [Differentiation 2] Next, a light-emitting element according to Modification 2 of the embodiment will be described with reference to Figures 17 and 18. Figure 17 is a schematic top view showing the first metal layer 61B of the light-emitting element according to Modification 2. Figure 18 is a schematic top view showing the second metal layer 64B of the light-emitting element according to Modification 2. In Modification 2, explanations of components that are the same as those in Embodiment and Modification 1 will be omitted as appropriate.

[0097] In Modification 2, the configuration of the first metal layer 61B and the second metal layer 64B of the light-emitting element differs mainly from that of Embodiment and Modification 1. Specifically, as shown in Figure 17, the first metal layer 61B has at least one first opening 611. The first opening 611 has a rectangular shape when viewed from above. The first metal layer 61B may also have openings that have shapes other than rectangles when viewed from above.

[0098] The first opening 611, when viewed from above, has a first side 611a extending in a first direction and a second side 611b extending in a second direction perpendicular to the first direction. Here, the first direction is, for example, a direction parallel to the X-axis direction. The second direction is, for example, a direction parallel to the Y-axis direction. Because the first metal layer 61B has a first side 611a extending in the first direction and a second side 611b extending in the second direction, the proportion of stress applied in the first metal layer 61B that is applied in the first and second directions becomes larger.

[0099] As shown in Figure 18, the second metal layer 64B has at least one second opening 641. The second opening 641 has a rectangular shape when viewed from above. The second metal layer 64B may also have openings with shapes other than rectangles when viewed from above.

[0100] The second opening 641 has, in a top view, a third side 641a extending in the third direction and a fourth side 641b extending in the fourth direction perpendicular to the third direction. Here, the third and fourth directions are directions between the first and second directions in a top view. In the example shown in Figure 18, the third and fourth directions are directions between the X-axis and Y-axis directions in a top view. Because the second metal layer 64B has a third side 641a extending in the third direction and a fourth side 641b extending in the fourth direction, the proportion of stress in the second metal layer 64B that is applied in the third and fourth directions becomes larger.

[0101] The first metal layer 61B has a first opening 611, and the second metal layer 64B has a second opening 641. This increases the proportion of stress applied in the first, second, third, and fourth directions among the stresses generated in the light-emitting element. In other words, the stress is applied in a way that isotropically distributed within the light-emitting element. This reduces the stress in each of the first, second, third, or fourth directions. As a result, warping of the light-emitting element can be reduced, and the possibility of the first metal layer 61B and the second metal layer 64B delaminating from the joining member 50 can be further reduced.

[0102] The first metal layer 61B preferably has a plurality of first openings 611. As shown in Figure 17, the plurality of first openings 611 are preferably arranged in a matrix along the first and second directions. The second metal layer 64B preferably has a plurality of second openings 641. Furthermore, as shown in Figure 18, the plurality of second openings 641 are preferably arranged in a matrix along the third and fourth directions.

[0103] By arranging multiple first openings 611 in a matrix along the first and second directions, and multiple second openings 641 in a matrix along the third and fourth directions, the stress within the light-emitting element is more effectively distributed in the first, second, third, and fourth directions, respectively. As a result, the warping of the light-emitting element can be further reduced, and the possibility of the first metal layer 61B and the second metal layer 64B delaminating from the joining member 50 can be further reduced.

[0104] Unlike the examples shown in Figures 17 and 18, the second metal layer 64B may have a first opening 611, and the first metal layer 61B may have a second opening 641.

[0105] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims.

[0106] The aspects of this disclosure are, for example, as follows: <Item 1> A semiconductor structure having a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer, A substrate disposed on the first semiconductor layer side of the semiconductor structure, A first electrode is disposed between the semiconductor structure and the substrate and is electrically connected to the first semiconductor layer, A second electrode electrically connected to the aforementioned second semiconductor layer, A bonding member disposed between the semiconductor structure and the substrate, A first metal layer is disposed between the semiconductor structure and the bonding member, A second metal layer is disposed between the bonding member and the substrate, Equipped with, The thermal expansion coefficients of the first metal layer and the second metal layer are smaller than the thermal expansion coefficient of the joining member. A light-emitting element in which the thickness of the second metal layer is thinner than the thickness of the first metal layer. <Item 2> The semiconductor structure has an opening that is continuously arranged in the first semiconductor layer and the active layer, The second electrode is positioned between the first electrode and the substrate and is electrically connected to the second semiconductor layer at the opening. The light-emitting element described in item 1 above. <Item 3> The first metal layer covers the second electrode placed in the opening, The joining member covers the first metal layer that covers the second electrode placed in the opening, The light-emitting element described in item 2 above. <Item 4> The first metal layer contains tungsten, tantalum, or molybdenum. A light-emitting element according to any one of the above items <1> to <3>. <Item 5> The second metal layer contains tungsten, tantalum, or molybdenum. A light-emitting element according to any one of the above items <1> to <4>. <Clause 6> Further comprising a third metal layer disposed between the second metal layer and the substrate, comprising at least one of nickel, titanium, and platinum, A light-emitting element according to any one of items 1 to 5 above. <Item 7> The thickness of the second metal layer is 60% or more and 90% or less of the thickness of the first metal layer. A light-emitting element according to any one of items 1 to 6 above. <Clause 8> The outer edge of the second metal layer is positioned outside the outer edge of the first metal layer when viewed from above. A light-emitting element according to any one of items 1 to 7 above. <Clause 9> The first metal layer has a rectangular first opening in a top view, having a first side extending in a first direction and a second side extending in a second direction perpendicular to the first direction. The second metal layer has a rectangular second opening in a top view, which has a third side extending in a third direction between the first and second directions, and a fourth side extending in a fourth direction perpendicular to the third direction. A light-emitting element according to any one of items 1 to 8 above. <Item 10> The first metal layer has a plurality of the first openings, The multiple first openings are arranged in a matrix along the first and second directions, The second metal layer has a plurality of the second openings, The multiple second openings are arranged in a matrix along the third and fourth directions. The light-emitting element described in item 9 above. <Item 11> A step of preparing a first wafer having a first substrate, a semiconductor structure having a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first and second semiconductor layers, disposed on the first substrate, and a first metal layer disposed on the semiconductor structure, A step of preparing a second wafer having a second substrate and a second metal layer disposed on the second substrate and having a thickness thinner than the thickness of the first metal layer, A step of joining the first metal layer of the first wafer and the second metal layer of the second wafer using a bonding member, A step of removing the first substrate from the semiconductor structure, Includes, The thermal expansion coefficients of the first metal layer and the second metal layer are smaller than the thermal expansion coefficient of the joining member. A method for manufacturing a light-emitting element. <Item 12> The bonding body, in which the semiconductor structure and the first metal layer and the second wafer are bonded by the bonding member, is divided along the planned fragmentation lines that divide the body into a plurality of light-emitting regions, thereby fragmenting it into a plurality of light-emitting elements. The first metal layer is located in a region excluding the planned fragmentation line when viewed from above, and the second metal layer is located in a region including the planned fragmentation line when viewed from above. The method for manufacturing a light-emitting element as described in item 11 above. <Item 13> The first metal layer comprises tungsten, tantalum, or molybdenum. A method for manufacturing a light-emitting element according to item 11 or item 12. <Item 14> The second metal layer comprises tungsten, tantalum, or molybdenum. A method for manufacturing a light-emitting element according to any one of items 11 to 13 above. <Clause 15> In the process of preparing the second wafer, the second wafer is further comprising a third metal layer disposed between the second substrate and the second metal layer, and containing at least one of nickel, titanium, and platinum. A method for manufacturing a light-emitting element according to any one of items 11 to 14 above. <Item 16> The thickness of the second metal layer is 60% or more and 90% or less of the thickness of the first metal layer. A method for manufacturing a light-emitting element according to any one of items 11 to 15 above. [Explanation of Symbols]

[0107] 1,1A Light-emitting element 1J zygote 10 Semiconductor Structures 10a 1st area 10b 2nd area 10c 3rd area 11. First Semiconductor Layer 12 Second Semiconductor Layer 13 Active layer 15 Aperture 100 First board 100W First Wafer 200W Second Wafer 20 boards (second board) 30 1st electrode 32 First pad electrode 35 Reflecting electrode 40 2nd electrode 42. Second pad electrode 45 Conductive material 50 Joining members 50S1 Layer of the first component 50S2 Layer of the second component 61,61A,61B 1st metal layer 61r Recess of the first metal layer 611 First opening 64,64A,64B 2nd metal layer 641 Second opening 67 Third metal layer 69 4th metal layer 71 First insulating layer 72 Second insulating layer 73 Third insulating layer 81 1st protective layer 82 Second protective layer 83 Third protective layer 90a Planned line for individualization 90b Planned line for segmentation 91a Groove 91b Groove

Claims

1. A semiconductor structure having a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first and second semiconductor layers, A substrate disposed on the first semiconductor layer side of the semiconductor structure, A first electrode is disposed between the semiconductor structure and the substrate and is electrically connected to the first semiconductor layer, A second electrode electrically connected to the second semiconductor layer, A bonding member disposed between the semiconductor structure and the substrate, A first metal layer is disposed between the semiconductor structure and the bonding member, A second metal layer is disposed between the bonding member and the substrate, Equipped with, The thermal expansion coefficients of the first metal layer and the second metal layer are smaller than the thermal expansion coefficient of the joining member. A light-emitting element wherein the thickness of the second metal layer is thinner than the thickness of the first metal layer.

2. The semiconductor structure has an opening that is continuously arranged in the first semiconductor layer and the active layer, The second electrode is positioned between the first electrode and the substrate and is electrically connected to the second semiconductor layer at the opening. The light-emitting element according to claim 1.

3. The first metal layer covers the second electrode placed in the opening, The joining member covers the first metal layer that covers the second electrode placed in the opening, The light-emitting element according to claim 2.

4. The first metal layer contains tungsten, tantalum, or molybdenum. A light-emitting element according to any one of claims 1 to 3.

5. The second metal layer contains tungsten, tantalum, or molybdenum. The light-emitting element according to claim 4.

6. The present invention further comprises a third metal layer disposed between the second metal layer and the substrate, the third metal layer comprising at least one of nickel, titanium, and platinum. A light-emitting element according to any one of claims 1 to 3.

7. The thickness of the second metal layer is 60% or more and 90% or less of the thickness of the first metal layer. A light-emitting element according to any one of claims 1 to 3.

8. The outer edge of the second metal layer is positioned outside the outer edge of the first metal layer when viewed from above. A light-emitting element according to any one of claims 1 to 3.

9. The first metal layer has a rectangular first opening in a top view, which has a first side extending in a first direction and a second side extending in a second direction perpendicular to the first direction. The second metal layer has a rectangular second opening in a top view, which has a third side extending in a third direction between the first and second directions, and a fourth side extending in a fourth direction perpendicular to the third direction. A light-emitting element according to any one of claims 1 to 3.

10. The first metal layer has a plurality of first openings, The multiple first openings are arranged in a matrix along the first and second directions, The second metal layer has a plurality of the second openings, The multiple second openings are arranged in a matrix along the third and fourth directions. The light-emitting element according to claim 9.

11. A step of preparing a first wafer having a first substrate, a semiconductor structure having a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first and second semiconductor layers, disposed on the first substrate, and a first metal layer disposed on the semiconductor structure, A step of preparing a second wafer having a second substrate and a second metal layer disposed on the second substrate and having a thickness thinner than the thickness of the first metal layer, A step of joining the first metal layer of the first wafer and the second metal layer of the second wafer using a bonding member, A step of removing the first substrate from the semiconductor structure, Includes, The thermal expansion coefficients of the first metal layer and the second metal layer are smaller than the thermal expansion coefficient of the joining member. A method for manufacturing a light-emitting element.

12. The bonding body, in which the semiconductor structure, the first metal layer, and the second wafer are bonded by the bonding member, is divided along fragmentation lines that divide the bonded body into a plurality of light-emitting regions, thereby fragmenting it into a plurality of light-emitting elements. The first metal layer is located in a region excluding the planned fragmentation line when viewed from above, and the second metal layer is located in a region including the planned fragmentation line when viewed from above. The method for manufacturing a light-emitting element according to claim 11.

13. The first metal layer contains tungsten, tantalum, or molybdenum. A method for manufacturing a light-emitting element according to claim 11 or 12.

14. The second metal layer contains tungsten, tantalum, or molybdenum. The method for manufacturing a light-emitting element according to claim 13.

15. In the process of preparing the second wafer, the second wafer is further provided with a third metal layer disposed between the second substrate and the second metal layer, the third metal layer comprising at least one of nickel, titanium, and platinum. A method for manufacturing a light-emitting element according to claim 11 or 12.

16. The thickness of the second metal layer is 60% or more and 90% or less of the thickness of the first metal layer. A method for manufacturing a light-emitting element according to claim 11 or 12.

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