Semiconductor substrate and method for manufacturing the same
A semiconductor substrate with a carbon-doped Si layer and 3C-SiC interface vacancies addresses lattice mismatch issues, enabling high-quality GeO2 growth on large-diameter Si substrates, thus suppressing crystal quality degradation.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-20
- Publication Date
- 2026-04-02
AI Technical Summary
Challenges exist in growing high-quality GeO2 on large-diameter Si(111) substrates due to lattice mismatch between Si and 3C-SiC, leading to degradation of crystal quality.
A semiconductor substrate structure comprising a Si(111) substrate with a carbon-doped Si layer, a 3C-SiC layer, and a GeO2 layer, where the carbon-doped Si layer mitigates lattice mismatch, and intentional vacancies are formed at the interface to relieve stress.
Suppresses crystal quality degradation and enables high-quality GeO2 growth on large-diameter Si substrates, forming a virtual GeO2 substrate.
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Figure 2026056867000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a semiconductor substrate and a method for manufacturing the same.
Background Art
[0002] In fields such as the electrification of automobiles and FA (Factory Automation), the need for power devices has been increasing in a very wide range. Also, energy loss in power semiconductors has become non-negligible, and research on structures with good energy efficiency has been conducted and significant results have been achieved.
[0003] In this application, power MOSFETs and IGBTs based on silicon are the mainstream, but the bandgap of silicon is 1.1 eV, and there is an inherent limit to the breakdown voltage due to the material.
[0004] Therefore, the use of materials other than silicon has been studied. This includes wide bandgap materials with a large bandgap such as GaN, SiC, diamond, etc., and also oxide semiconductors such as GaO2 and GeO2.
[0005] GeO2 has a very large bandgap of 4.7 eV, has a high breakdown voltage, high radiation resistance performance, and is suitable for use in harsh environments. Also, although it is generally difficult to make an oxide semiconductor a p-type conductor, GeO2 is said to be capable of both p-type and n-type conductivity types (Non-Patent Document 1). [[ID=2�]]
[0006] Also, in Non-Patent Document 1, the lattice constant of GeO2 is reported to be 4.4. This value is very close to 4.35 of 3C-SiC, and it is disclosed that 3C-SiC can be grown on a Si(111) substrate and GeO2 can be grown thereon by taking advantage of the characteristics of this lattice constant (Non-Patent Document 2).
[0007] Patent Document 1 discloses a technique for manufacturing a laminated structure in which a crystalline oxide film containing GeO2 is laminated on a crystalline substrate using the mist CVD method. [Prior art documents] [Patent Documents]
[0008] [Patent Document 1] Japanese Patent Publication No. 2024-114114 [Non-patent literature]
[0009] [Non-Patent Document 1] H.Takane et.al., “Band-gap engineering of rutile-structured SnO2-GeO2-SiO2 alloy system”, PHYSICAL REVIEW MATERIALS 6,084604(2022) [Non-Patent Document 2] PATENTIX press release article, September 20, 2023: "Successful deposition of rutile-structured germanium dioxide (γ-GeO2) film on SiC using the Phantom SVD method." [Overview of the project] [Problems that the invention aims to solve]
[0010] However, when forming 3C-SiC on a Si(111) substrate, it is believed that there remain challenges in the quality of the 3C-SiC surface for growing GeO2, due to lattice mismatch between Si and 3C-SiC. This is because the lattice constant of Si(111) is 3.84, and there is a large difference in lattice constant between it and 3C-SiC. For these reasons, it is also considered difficult to increase the diameter.
[0011] This invention was made to solve the above problems and aims to provide a semiconductor substrate in which high-quality GeO2 is grown on a large-diameter Si(111) substrate. [Means for solving the problem]
[0012] The present invention has been made to achieve the above objective and provides a semiconductor substrate having a Si substrate with a main surface orientation of (111), a carbon-doped Si layer on the Si substrate, a 3C-SiC layer on the carbon-doped Si layer, and a GeO2 layer on the 3C-SiC layer.
[0013] Such a semiconductor substrate suppresses the degradation of crystal quality due to lattice mismatch and creates a virtual GeO2 substrate by growing GeO2 on a large-diameter Si substrate.
[0014] In this case, the carbon-doped Si layer may have voids at the interface between the carbon-doped Si layer and the 3C-SiC layer.
[0015] This will further alleviate the stress caused by lattice mismatch.
[0016] The present invention has also been made to achieve the above objectives and provides a method for manufacturing a semiconductor substrate, comprising the steps of: removing a native oxide film on the surface of a Si substrate having a main surface orientation of (111) by hydrogen baking; forming a carbon-doped Si layer on the Si substrate using a source gas containing carbon and silicon; forming a 3C-SiC layer on the carbon-doped Si layer using a source gas containing carbon and silicon; and forming a GeO2 layer on the 3C-SiC layer.
[0017] According to this semiconductor substrate manufacturing method, it is possible to suppress the degradation of crystal quality due to lattice mismatch and to manufacture a virtual GeO2 substrate by growing GeO2 on a large-diameter Si substrate. [Effects of the Invention]
[0018] As described above, the semiconductor substrate of the present invention suppresses the deterioration of crystal quality due to lattice mismatch and provides a semiconductor substrate in which GeO2 is grown on a large-diameter Si substrate. Moreover, according to the method for manufacturing a semiconductor substrate of the present invention, it is possible to suppress deterioration of crystal quality due to lattice mismatch and manufacture a semiconductor substrate in which GeO2 is grown on a large-diameter Si substrate.
Brief Description of the Drawings
[0019] [Figure 1] An example of a cross-sectional structure of a semiconductor substrate according to an embodiment of the present invention is shown. [Figure 2] An example of a process flow of a method for manufacturing a semiconductor substrate according to an embodiment of the present invention is shown.
Embodiments of the Invention
[0020] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.
[0021] As described above, there has been a demand for a semiconductor substrate in which high-quality GeO2 is grown on a large-diameter Si(111) substrate.
[0022] As a result of intensive studies on the above problems, the present inventors have found that a semiconductor substrate having a Si substrate with a plane orientation of (111) on the main surface, a carbon-doped Si layer on the Si substrate, a 3C-SiC layer on the carbon-doped Si layer, and a GeO2 layer on the 3C-SiC layer can suppress deterioration of crystal quality due to lattice mismatch and become a semiconductor substrate in which GeO2 is grown on a large-diameter Si substrate, thereby completing the present invention.
[0023] As a result of intensive studies on the above problems, the present inventors have also found that a method for manufacturing a semiconductor substrate including a step of removing a natural oxide film on the surface of a Si substrate with a plane orientation of (111) on the main surface by hydrogen baking, a step of forming a carbon-doped Si layer on the Si substrate using a source gas containing carbon and silicon, a step of forming a 3C-SiC layer on the carbon-doped Si layer using a source gas containing carbon and silicon, and a step of forming a GeO2 layer on the 3C-SiC layer can suppress deterioration of crystal quality due to lattice mismatch and manufacture a semiconductor substrate in which GeO2 is grown on a large-diameter Si substrate, thereby completing the present invention.
[0024] In other words, this invention relates to a germanium oxide substrate, which is a wide-bandgap semiconductor. More specifically, it relates to a virtual germanium oxide substrate and a method for manufacturing the same, which has a single-crystal 3C-SiC on a silicon substrate doped with a high concentration of carbon as a buffer layer, and germanium oxide formed on top of that.
[0025] Embodiments of the present invention will be described below with reference to the drawings.
[0026] [Semiconductor substrates] Figure 1 shows an example of a cross-sectional structure of a semiconductor substrate according to an embodiment of the present invention. As shown in Figure 1, the semiconductor substrate 1 according to the present invention is a semiconductor substrate having a Si substrate (Si(111) substrate) 2 with a main surface orientation of (111), a carbon-doped Si layer 3 on the Si(111) substrate 2, a 3C-SiC layer 5 on the carbon-doped Si layer 3, and a GeO2 layer 6 on the 3C-SiC layer 5.
[0027] The Si(111) substrate 2 can be a Si substrate with a diameter of 300 mm, but is not limited to this, and may be a Si substrate with a diameter of 300 mm or more.
[0028] With such a semiconductor substrate, as described above, the carbon-doped Si layer 3 mitigates the lattice mismatch between the Si(111) substrate 2 and the 3C-SiC layer 5, thereby suppressing the degradation of crystal quality and resulting in a semiconductor substrate in which GeO2 is grown on a large-diameter Si substrate.
[0029] Furthermore, the carbon-doped Si layer 3 may have a carbon-doped Si layer 4 that has vacancies intentionally formed at the interface between the carbon-doped Si layer 3 and the 3C-SiC layer 5. This further relieves the stress caused by lattice mismatch. Note that the carbon-doped Si layer 3 may contain vacancies smaller than those in the carbon-doped Si layer 4.
[0030] The thickness of each of the above layers, the carbon concentration of the carbon-doped Si layer, etc., will be described in detail in the semiconductor substrate manufacturing method described later.
[0031] [Manufacturing method for semiconductor substrates] Next, the method for manufacturing a semiconductor substrate according to the present invention will be described. Figure 2 shows an example of a process flow for manufacturing a semiconductor substrate according to an embodiment of the present invention. As shown in Figure 2, the method for manufacturing a semiconductor substrate according to the present invention includes the steps of: removing the native oxide film on the surface of a Si substrate (Si(111) substrate) 2 with a main surface orientation of (111) by hydrogen baking (S1); forming a carbon-doped Si layer 3 on the Si(111) substrate 2 using a source gas containing carbon and silicon (S2); forming a 3C-SiC layer 5 on the carbon-doped Si layer 3 using a source gas containing carbon and silicon (S3); and forming a GeO2 layer 6 on the 3C-SiC layer 5 (S4). In this case, during the process using a reduced-pressure CVD apparatus, it becomes possible to form vacancies in the carbon-containing silicon layer at the interface between the carbon-containing silicon layer and the 3C-SiC layer (forming a carbon-doped Si layer (with vacancies) 4).
[0032] (Step to remove the native oxide film by hydrogen baking: S1) First, a single-crystal silicon substrate (Si(111) substrate) 2 is placed in a reduced-pressure (RP-)CVD apparatus, and the native oxide film on the surface is removed by hydrogen baking (H2 annealing).
[0033] By removing the amorphous silicon oxide film on the outermost surface of the Si(111) substrate 2, it becomes possible to grow a carbon-doped silicon epitaxial layer on the Si(111) substrate 2. The H2 annealing at this stage is preferably performed at a temperature between 1000°C and 1200°C. Within this temperature range, the occurrence of slip dislocations can be effectively suppressed, and the residue of the native oxide film can be prevented with an efficient processing time. Furthermore, there are no particular restrictions on the pressure or time of the H2 annealing at this stage; it is sufficient to remove the native oxide film.
[0034] (Step to form a carbon-doped Si layer: S2) Next, a carbon-doped Si layer 3 is formed on the Si(111) substrate 2 under reduced pressure using a vacuum CVD apparatus, controlling the gas type, gas flow rate, and temperature. Specifically, for example, the carbon-doped Si layer 3 is epitaxially grown using a gas mixture of trimethylsilane, monomethylsilane, or monosilane gas with a carbon source. At this time, by forming the film at a growth temperature preferably in the range of 700°C to 900°C, and more preferably in the range of 730°C to 750°C, it is possible to obtain a carbon-doped epitaxial layer with fewer defects.
[0035] The amount of carbon doping is 1 × 10⁻⁶ 20 ~4×10 21 atoms / cm 3 This can be achieved. Within this range of carbon concentration, the effect of doped carbon is more reliably exerted, and the 3C-SiC layer 5 can be single-crystallized more effectively.
[0036] The thickness of the carbon-doped Si layer 3 is not particularly limited and can be changed at any time, but it is preferably between approximately 1 nm and 1000 nm. With a film thickness in this range, the film can be formed in an efficient time, and the carbon can escape from the substitution site, allowing for more effective vacancy formation.
[0037] (Step to form the 3C-SiC layer: S3) Next, the 3C-SiC layer 5 is grown on the carbon-doped Si layer 3 by controlling the gas type, gas flow rate, and temperature. Specifically, the Si(111) substrate 2 is preferably set to a temperature of 300°C to 1100°C, and a source gas containing carbon and silicon, such as monomethylsilane or trimethylsilane, is introduced as a raw material gas for SiC to nucleate SiC. Compared to Si, C atoms are smaller and more easily vaporized, so trimethylsilane is easier to adjust the growth conditions for when considering raw material efficiency.
[0038] SiC nucleation can be performed on the surface of the carbon-doped Si layer 3 at a pressure of 100 Torr (13332 Pa) or less and a temperature of 300°C or higher. However, since epitaxial growth of SiC is promoted at temperatures of 800°C or higher, it is more preferable to set the SiC nucleation temperature to 800°C or higher so that SiC nucleation and the formation of the 3C-SiC layer 5 can be performed under the same conditions. Furthermore, at temperatures of 1100°C or lower, polycrystallization and the adhesion of by-products to the inner wall of the CVD apparatus can be effectively suppressed. This is presumed to be because at high temperatures, molecules adsorbed on the substrate surface desorb before epitaxial growth occurs, causing a gas-phase reaction.
[0039] Furthermore, the growth pressure during the formation process of the 3C-SiC layer (3C-SiC single crystal film) 5 is preferably 100 Torr or less. If the growth pressure is 100 Torr or less, polycrystallization of 3C-SiC can be effectively prevented. If the pressure is 10 Torr (1333 Pa) or less, and more preferably 1 Torr (133 Pa) or less, vacancies will be formed directly beneath the 3C-SiC layer 5, and the effect of relaxing the stress on the entire epitaxial layer can be obtained.
[0040] Since the film thickness of the 3C-SiC layer 5 depends on pressure and temperature, the film formation time can be appropriately set based on the pressure and temperature conditions set to achieve the desired film thickness. Preferably, the film thickness of the 3C-SiC layer 5 can be between 100 nm and 1000 nm. With a thickness in this range, 3C-SiC can be grown in an efficient amount of time, and a sufficient amount of pores can be formed at the interface between the carbon-doped Si layer 3 and the 3C-SiC layer 5.
[0041] During the epitaxial growth of the 3C-SiC layer 5, numerous tiny vacancies are formed as carbon atoms in the carbon-doped Si layer 3 escape from their substitution positions. Furthermore, silicon is supplied to the 3C-SiC layer 5 during its growth not only from the gas used during epitaxial growth, but also from the carbon-doped Si layer 3, resulting in the formation of vacancies in the carbon-doped Si layer 3. In other words, vacancies of different sizes and densities are formed by these two effects.
[0042] Furthermore, the carbon-doped Si layer (with voids) 4 at the interface between the carbon-doped Si layer 3 and the 3C-SiC layer 5 is formed during the heat treatment process during 3C-SiC epitaxial growth when the silicon from the substrate is used as the silicon supply source when growing the 3C-SiC.
[0043] (Step to form the GeO2 layer: S4) Finally, a GeO2 film is deposited on the 3C-SiC layer 5 to form a GeO2 layer 6. There are no restrictions on the film deposition method, but techniques such as mist CVD are commonly used for producing oxide semiconductors. Here, for example, reference can be made to Patent Document 1, etc.
[0044] There are no particular restrictions on the thickness of the GeO2 layer 6; it is determined by the thickness required to withstand the voltage of the actual device. [Examples]
[0045] The present invention will be described in detail below with reference to examples, but this is not intended to limit the present invention.
[0046] A 300 mm diameter, (111) orientation, boron-doped high-resistance single-crystal silicon substrate was prepared. The silicon substrate was placed on a susceptor in the reactor of a reduced-pressure CVD apparatus, and H2 annealing was performed at 1080°C for 1 minute.
[0047] Next, using trimethylsilane as the source gas, carbon is converted to 4 × 10¹⁶ carbon atoms at 700°C and 10 Torr. 21 atoms / cm 3 A doped Si layer was grown to a wavelength of 500 nm.
[0048] Next, trimethylsilane gas was introduced at a growth temperature of 900°C and a growth pressure of 5 Torr to perform SiC nucleation and grow a 3C-SiC single crystal film. Growth was carried out for 60 minutes, resulting in a film thickness of 200 nm.
[0049] Next, GeO2 was grown to a thickness of 1 μm using the mist CVD method to obtain the desired semiconductor substrate.
[0050] XRD (X-ray Diffraction) measurement of the GeO2 layer of the obtained semiconductor substrate revealed that it was a high-quality single-crystal GeO2 layer.
[0051] As described above, according to the embodiments of the present invention, it was possible to suppress the deterioration of crystal quality due to lattice mismatch and to manufacture a semiconductor substrate on a large-diameter (300 mm diameter) Si substrate on which GeO2 was grown.
[0052] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention. [Explanation of symbols]
[0053] 1... Semiconductor substrate, 2... Single crystal silicon substrate (Si(111) substrate), 3…Carbon-doped Si layer, 4…Carbon-doped Si layer (with voids), 5...3C-SiC layer, 6...GeO2 layer.
Claims
1. A Si substrate with a main surface orientation of (111), a carbon-doped Si layer on the Si substrate, a 3C-SiC layer on the carbon-doped Si layer, and GeO on the 3C-SiC layer. 2 A semiconductor substrate characterized by having layers.
2. The semiconductor substrate according to claim 1, characterized in that the carbon-doped Si layer has vacancies at the interface between the carbon-doped Si layer and the 3C-SiC layer.
3. A step of removing the native oxide film on the surface of a Si substrate with a main surface orientation of (111) by hydrogen baking, A step of forming a carbon-doped Si layer on the Si substrate using a source gas containing carbon and silicon, A step of forming a 3C-SiC layer on the carbon-doped Si layer using a source gas containing carbon and silicon, GeO 2 A method for manufacturing a semiconductor substrate, characterized by including a step of forming a layer.
Citation Information
Patent Citations
Laminated structure, semiconductor device, electronic apparatus and system
JP2024114114A