Wiring board and method for manufacturing the same

Abstract

This invention discloses a technique for increasing the connection strength between insulating resin layers. [Solution] This embodiment provides a wiring board 10A having a lower insulating resin layer 31 containing an inorganic filler 31F and an upper insulating resin layer 33 laminated on the upper side of the lower insulating resin layer 31 and not containing the inorganic filler 31F, wherein an inorganic insulating film 32 is laminated between the lower insulating resin layer 31 and the upper insulating resin layer 33, and the resin of the lower insulating resin layer 31 and the resin of the upper insulating resin layer 33 are fixed to each other.

Description

Technical Field

[0001] The present disclosure relates to a wiring board having a plurality of insulating resin layers and a method for manufacturing the same.

Background Art

[0002] In this type of manufacturing method for a wiring board, the upper insulating resin layer is laminated on the lower insulating resin layer and then pressed in a heated state so that the insulating resin layers are fixed to each other (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

[0032] )

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present application discloses a technique for increasing the connection strength between insulating resin layers.

Means for Solving the Problems

[0005] A first aspect of the invention of the present disclosure is a wiring board having a lower insulating resin layer containing an inorganic filler and an upper insulating resin layer laminated on the upper side of the lower insulating resin layer and not containing an inorganic filler, and an inorganic insulating film laminated between the lower insulating resin layer and the upper insulating resin layer, and the resin of the lower insulating resin layer and the resin of the upper insulating resin layer are fixed to each other.

[0006] A second aspect of the invention of the present disclosure is a method for manufacturing a wiring board having a lower insulating resin layer containing an inorganic filler and an upper insulating resin layer laminated on the upper side of the lower insulating resin layer and not containing an inorganic filler, including laminating an inorganic insulating film on the upper surface of the lower insulating resin layer by a CVD method, and laminating the upper insulating resin layer on the inorganic insulating film. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1A is a cross-sectional view of the wiring board according to the first embodiment, and Figure 1B is an enlarged cross-sectional view of the area around the inorganic insulating film. [Figure 2] Figures 2A to 2E are cross-sectional views showing the manufacturing process of a wiring board. [Figure 3] Figures 3A to 3D are cross-sectional views illustrating the manufacturing process of a wiring board. [Figure 4] Figure 4 is a cross-sectional view of the wiring board according to the second embodiment. [Figure 5] Figures 5A to 5C are cross-sectional views showing the manufacturing process of a wiring board. [Figure 6] Figures 6A and 6B are cross-sectional views showing the manufacturing process of a wiring board. [Modes for carrying out the invention]

[0008] [First Embodiment] A wiring board 10A according to the first embodiment of this disclosure will be described with reference to Figures 1 to 3. As shown in Figure 1A, the wiring board 10A of this embodiment comprises, for example, a plurality of conductive layers 20 and a plurality of interlayer insulating layers 30A stacked alternately, and a solder resist layer (not shown) as the outermost layer.

[0009] The multiple conductive layers 20 have a structure in which, for example, an electrolytic plating film 20B is laminated on a seed layer 20A. An electrical circuit in a predetermined pattern, including multiple pads 21 and multiple wirings 22, is formed on the multiple conductive layers 20. In addition, some of the multiple conductive layers 20 include, for example, a wiring density section 90 where multiple wirings 22 are gathered and extend in parallel.

[0010] The multiple interlayer insulating layers 30A of this embodiment have a structure in which an upper insulating resin layer 33 is laminated on top of a lower insulating resin layer 31. As shown in Figure 1B, the lower insulating resin layer 31 has a structure in which an inorganic filler 31F is contained in the resin 31J. The inorganic filler 31F is an inorganic compound such as silica, titanium oxide, aluminum oxide, aluminum nitride, silicon carbide, calcium titanate, or zeolite. The inorganic filler 31F is spherical, has an average particle size of, for example, 0.05 to 0.2 μm, and has a content of, for example, 65 to 80% by weight. As the resin 31J, for example, epoxy resin, polyimide resin, or acrylic resin is used. The upper surface 31M of the lower insulating resin layer 31 is an uneven surface in which multiple spherical inorganic fillers 31F are exposed from the surface of the resin 31J.

[0011] The upper insulating resin layer 33 has a structure in which the resin 33J does not contain inorganic fillers. As for the resin 33J, similar to the resin 31J of the lower insulating resin layer 31, for example, epoxy resin, polyimide resin, acrylic resin, etc. are used. Furthermore, the upper insulating resin layer 33 is thinner than the lower insulating resin layer 31; for example, the lower insulating resin layer 31 is 5-7 μm thick, while the upper insulating resin layer 33 is 3-5 μm thick. In addition, the upper surface of the upper insulating resin layer 33 is a flatter, smoother surface compared to the upper surface 31M of the lower insulating resin layer 31.

[0012] In this embodiment, the upper surface 31M of the lower insulating resin layer 31 is covered with an inorganic insulating film 32. That is, the inorganic insulating film 32 is laminated between the lower insulating resin layer 31 and the upper insulating resin layer 33. The inorganic insulating film 32 is, for example, a silicon nitride film or silicon oxide film with a thickness of 1 μm or less, formed by a CVD method. In detail, as shown in Figure 1B, the inorganic insulating film 32 has a structure in which, for example, short fibrous material is intertwined, and has a plurality of protrusions 32T across its entire upper surface. The base ends of these plurality of protrusions 32T penetrate the uneven surface of the upper surface 31M of the lower insulating resin layer 31 and adhere closely to both the inorganic filler 31F and the resin 31J, while the tips penetrate the upper insulating resin layer 33. Examples of CVD methods for forming the inorganic insulating film 32 include reduced-pressure CVD, plasma CVD, and photoCVD, and in addition to CVD, thermal nitriding can also be used. The thickness of the inorganic insulating layer 32 is the average thickness.

[0013] Furthermore, the inorganic insulating film 32 is not limited to a structure in which short fibrous materials are intertwined, but may also have a structure in which short fibrous materials are densely packed together, for example. Also, the multiple protrusions 32T are not limited to a shape that lies horizontally as shown in Figure 1B, but may also have a shape that stands upright in the stacking direction, for example. Moreover, multiple recesses may be formed between the multiple protrusions 32T on the upper surface of the inorganic insulating film 32, and the resin 31J of the lower insulating resin layer 31 or the resin 33J of the upper insulating resin layer 33 may fill these multiple recesses.

[0014] Furthermore, in the multiple interlayer insulating layers 30A, multiple via conductors 23 are formed that connect adjacent conductive layers 20 in the stacking direction. Each via 23H on which a via conductor 23 is formed is connected to a communication hole 31H that penetrates the lower insulating resin layer 31 and the inorganic insulating film 32, and to a through hole 33H that penetrates the upper insulating resin layer 33. In addition, the outer diameter of the upper end of the communication hole 31H is smaller than the outer diameter of the lower end of the through hole 33H, and the multiple via conductors 23 have a stepped portion in the middle of the stacking direction.

[0015] Next, the manufacturing method of the wiring board 10A will be described. (1) A support plate 11 (e.g., a copper foil) is prepared. Then, a conductive layer 20 including a seed layer 20A and an electrolytic plating film 20B with a predetermined pattern is laminated on the upper surface of the support plate 11 by a known method (e.g., a semi-additive method) (see Fig. 2A).

[0016] (2) Next, a resin film that will become the lower insulating resin layer 31 is laminated on the support plate 11 and the conductive layer 20, and then pressed in a heated state (see Fig. 2B). Thereby, the lower insulating resin layer 31 is obtained. At this time, the lower insulating resin layer 31 is formed on the upper surface 31M thereof such that both the resin 31J and the inorganic filler 31F are exposed.

[0017] (3) An inorganic insulating film 32 is laminated on the entire upper surface 31M of the lower insulating resin layer 31 by CVD. Then, for example, the upper surface 31M of the inorganic insulating film 32 is etched. Thereby, an inorganic insulating film 32 having a plurality of protrusions 32T on the entire upper surface with a thickness of 1 μm or less is obtained.

[0018] (4) An upper insulating resin layer 33 is formed on the inorganic insulating film 32. Specifically, for example, a liquid resin is applied to form the upper insulating resin layer 33 (see Fig. 2D). After the upper insulating resin layer 33 is dried, a mask (not shown) is overlaid and ultraviolet exposure treatment is performed. Next, unnecessary portions of the upper insulating resin layer 33 are removed. Thereby, as shown in Fig. 2E, an upper insulating resin layer 33 having a plurality of through-holes 33H is obtained.

[0019] Although an example of forming the upper insulating resin layer 33 from a liquid resin has been described, for example, the upper insulating resin layer 33 may be formed from a resin film.

[0020] (5) Next, laser light is irradiated at positions corresponding to the plurality of through holes 33H of the upper insulating resin layer 33, and as shown in FIG. 3A, a plurality of communication holes 31H penetrating the lower insulating resin layer 31 and the inorganic insulating film 32 are formed. Here, the communication holes 31H are formed to have a smaller diameter than the through holes 33H. Then, via holes 23H are obtained by the communicating through holes 33H and communication holes 31H. Thereafter, the inside of the plurality of via holes 23H is subjected to desmear treatment.

[0021] Although the plurality of via holes 23H are formed by the steps (4) and (5) described above, for example, via holes 23H may be formed by irradiating laser light on the upper surface of the upper insulating resin layer 33 without forming the through holes 33H.

[0022] (6) As shown in FIG. 3B, a seed layer 20A is laminated on the upper surface of the upper insulating resin layer 33, the bottom surfaces and side surfaces of the plurality of via holes 23H. The seed layer 20A may be formed by, for example, a sputtering method or an electroless plating process.

[0023] (7) Next, after a plating resist 50 is laminated on the seed layer 20A in a predetermined pattern, an electrolytic plating process is performed. As a result, as shown in FIG. 3C, electrolytic plating is filled in the plurality of via holes 23H, and an electrolytic plating film 20B is laminated on the portion of the seed layer 20A exposed from the plating resist 50.

[0024] (8) After the plating resist 50 is peeled off, the seed layer 20A below the plating resist 50 is removed. As a result, as shown in FIG. 3D, a conductive layer 20 is obtained.

[0025] (9) After the steps (2) to (8) described above are repeated and the outermost conductive layer 20 is laminated, a solder resist layer (not shown) is laminated.

[0026] (10) Next, the support plate 11 is removed. Thus, the wiring board 10A is completed.

[0027] Next, the effects of the wiring board 10A of this embodiment and its manufacturing method will be described. In the wiring board 10A of this embodiment, by providing an inorganic insulating film 32 between the lower insulating resin layer 31 and the upper insulating resin layer 33, the connection strength between the insulating resin layers of the lower insulating resin layer 31 and the upper insulating resin layer 33 can be increased. The reason for this is presumed to be as follows.

[0028] If the wiring board 10A does not have an inorganic insulating film 32, the resin of the upper insulating resin layer 33 is directly connected to the exposed resin portion on the upper surface 31M of the lower insulating resin layer 31 and to the exposed portion of the inorganic filler 31F. Even if the exposed resin portion is roughened by half-etching, it is unlikely that a high anchoring effect can be obtained between the resins. Furthermore, since the inorganic filler 31F is spherical and it is difficult to roughen its spherical surface, it is unlikely that an anchoring effect can be obtained between the exposed portion of the inorganic filler 31F and the resin of the upper insulating resin layer 33.

[0029] In contrast, the wiring board 10A of this embodiment has an inorganic insulating film 32 between the lower insulating resin layer 31 and the upper insulating resin layer 33, and the inorganic insulating film 32 provides a high anchoring effect between the resins of the lower insulating resin layer 31 and the upper insulating resin layer 33. As a result, it is considered that the connection strength between the lower insulating resin layer 31 and the upper insulating resin layer 33 is increased, even in the exposed resin portion of the upper surface 31M of the lower insulating resin layer 31. In addition, in this embodiment, since the inorganic insulating film 32 is formed by the CVD method, it is considered that it is connected to the exposed portion of the inorganic filler 31F of the lower insulating resin layer 31 with greater strength than the resin of the upper insulating resin layer 33. In other words, according to the wiring board 10A of this embodiment and its manufacturing method, it is considered that the connection strength between the lower insulating resin layer 31 and the upper insulating resin layer 33 is increased in both the exposed resin portion of the upper surface 31M of the lower insulating resin layer 31 and the exposed portion of the inorganic filler 31F.

[0030] Furthermore, in the wiring board 10A of this embodiment, the interlayer insulating layer 30A has a multilayer structure including a lower insulating resin layer 31 and an upper insulating resin layer 33, and the upper insulating resin layer 33 does not contain inorganic filler 31F. As a result, the inorganic filler 31F is not exposed on the upper surface of the interlayer insulating layer 30A (i.e., the upper surface of the upper insulating resin layer 33). This is thought to increase the flatness of the upper surface of the interlayer insulating layer 30A and the connection strength between the interlayer insulating layer 30A and the conductive layer 20 above it, and to enable higher density of the conductive layer 20.

[0031] [Second Embodiment] The wiring board 10B of this embodiment will be described with reference to Figures 4 to 6. In the wiring board 10B of this embodiment, the lower insulating resin layer 30B with a film, which is formed by combining the lower insulating resin layer 31 and the inorganic insulating film 32, serves as the interlayer insulating layer. The conductive layer 20S is laminated on the lower insulating resin layer 30B with a film, and the entire portion of the lower insulating resin layer 30B with a film that is not covered by the conductive layer 20S is covered by the upper insulating resin layer 33, which is approximately the same thickness as the conductive layer 20S. In other words, a composite layer in which the conductive layer 20S is embedded in the upper insulating resin layer 33, which is approximately the same thickness as the conductive layer 20S, is laminated on the lower insulating resin layer 30B with a film, and the upper surface of the conductive layer 20S is exposed from the upper insulating resin layer 33. The conductive layer 20S embedded in the upper insulating resin layer 33 includes dense wiring sections 90, where each wire 22 in these dense wiring sections 90 has a width of, for example, 3 μm or less, and the gap between the wires 22 is, for example, 3 μm or less.

[0032] Next, the manufacturing method of the wiring board 10B will be described. The wiring board 10B of this embodiment is manufactured by the following steps (4) to (8), instead of steps (4) to (8) of the wiring board 10A of the first embodiment described above. (4) An upper insulating resin layer 33 is formed on the inorganic insulating film 32. Specifically, for example, a liquid resin is applied to form the upper insulating resin layer 33 (see Figure 2D). After the upper insulating resin layer 33 is dried, a mask (not shown) is placed over it and ultraviolet exposure treatment is performed. Next, the unnecessary portion of the upper insulating resin layer 33 is removed. As a result, an upper insulating resin layer 33 having multiple grooves 33A, 33B corresponding to multiple pads 21 and multiple wirings 22 is formed, as shown in Figure 5A.

[0033] In the case of an insulating resin layer with a structure containing inorganic fillers in the resin, if the wall between the grooves 33B is made narrower, the inorganic filler blocks the light, making it difficult to expose and develop the insulating resin layer properly, and thus making it difficult to narrow the spacing between the grooves 33B. In contrast, in this embodiment, since multiple grooves 33B are formed in the upper insulating resin layer 33 which does not contain inorganic fillers in the resin 33J, the inorganic filler does not block the light, the width of the wall between the grooves 33B can be made thinner, and the spacing between the grooves 33B can be narrowed.

[0034] The upper insulating resin layer 33 may be formed from, for example, a resin film. In that case, the multiple grooves 33A and 33B may be formed by laser processing.

[0035] (5) Next, by laser processing, a plurality of vias 23H penetrating the lower insulating resin layer 31 and the inorganic insulating film 32 are obtained, as shown in Figure 5B.

[0036] (6) As shown in Figure 5C, seed layers 20A are laminated on the bottom and sides of multiple vias 23H, the bottom and sides of multiple grooves 33A and 33B, and the upper surface of the upper insulating resin layer 33.

[0037] (7) As shown in Figure 6A, electrolytic plating is performed, and the electrolytic plating film 20B is laminated in the grooves 33A, 33B and the vias 23H, as well as on the upper surface of the upper insulating resin layer 33.

[0038] (8) Next, the unnecessary seed layer 20A and electrolytic plating film 20B are removed, for example, by the CMP method. As a result, a conductive layer 20S embedded in the upper insulating resin layer 33 is obtained, as shown in Figure 6B.

[0039] In addition to the effects of the wiring board 10A of the first embodiment described above, the wiring board 10B of this embodiment can achieve the following effects. Specifically, according to the wiring board 10B of this embodiment and its manufacturing method, by embedding the conductive layer 20S in the upper insulating resin layer 33 which does not contain inorganic filler, the spacing between the wiring 22 in the densely packed wiring portion 90 of the conductive layer 20S can be narrowed compared to the case in which the conductive layer 20S is embedded in an insulating resin layer which contains inorganic filler, thereby enabling a higher density of the conductive layer 20S.

[0040] [Other embodiments] The wiring boards 10A and 10B in the above embodiment have a coreless structure without a core board, but are not limited to this, and may also be configured with a plurality of conductive layers 20 and a plurality of interlayer insulating layers 30A and 30B on both the front and back surfaces of a core board.

[0041] The resin 31J of the lower insulating resin layer 31 and the resin 33J of the upper insulating resin layer 33 may be the same or different.

[0042] In the above embodiment, multiple inorganic fillers 31F were exposed on the upper surface 31M of the lower insulating resin layer 31, but multiple inorganic fillers 31F do not necessarily have to be exposed. Also, Figure 1B shows an example in which multiple spherical inorganic fillers 31F are exposed on the upper surface 31M of the lower insulating resin layer 31, but for example, multiple inorganic fillers 31F having smooth cut surfaces that are substantially flush with the surface of the upper surface 31M may be exposed.

[0043] While this specification and drawings disclose specific examples of the technology included in the claims, the technology described in the claims is not limited to these specific examples, but also includes various modifications and changes to these examples, as well as parts of the examples taken individually. [Explanation of Symbols]

[0044] 10A, 10B Wiring Board 20,20S conductive layer 23 via conductors 23H Beer 30A, 30B Interlayer Insulation 31 Lower insulating resin layer 31F Inorganic Filler 31J resin 32 Inorganic insulating film 32T protrusion 33 Upper insulating resin layer 33J resin

Claims

1. A wiring board having a lower insulating resin layer containing an inorganic filler and an upper insulating resin layer laminated above the lower insulating resin layer and not containing an inorganic filler, The device includes an inorganic insulating film laminated between the lower insulating resin layer and the upper insulating resin layer, which fixes the resin of the lower insulating resin layer and the resin of the upper insulating resin layer together.

2. A wiring board according to claim 1, The upper surface of the lower insulating resin layer is exposed, with the inorganic filler visible.

3. A wiring board according to claim 1, The thickness of the inorganic insulating film is 1 μm or less.

4. A wiring board according to claim 1, The inorganic insulating film is either a silicon nitride film or a silicon oxide film.

5. A wiring board according to claim 1, The inorganic insulating film has multiple protrusions across its entire upper surface.

6. A wiring board according to claim 1, The device includes vias that penetrate the lower insulating resin layer, the upper insulating resin layer, and the inorganic insulating film.

7. A wiring board according to claim 1, The entire structure, formed by the combination of the lower insulating resin layer, the inorganic insulating film, and the upper insulating resin layer, constitutes an interlayer insulating layer sandwiched between a pair of conductive layers.

8. A wiring board according to claim 1, The lower insulating resin layer with the inorganic insulating film, which is formed by combining the lower insulating resin layer and the inorganic insulating film, constitutes an interlayer insulating layer sandwiched between a pair of conductive layers. Of the conductive layers, the conductive layer above the film-covered lower insulating resin layer has substantially the same thickness as the upper insulating resin layer, is embedded in the upper insulating resin layer, and its upper surface is exposed from the upper insulating resin layer.

9. A method for manufacturing a wiring board having a lower insulating resin layer containing an inorganic filler and an upper insulating resin layer laminated above the lower insulating resin layer and not containing an inorganic filler, An inorganic insulating film is laminated on the upper surface of the lower insulating resin layer by CVD, The present invention includes laminating the upper insulating resin layer on the inorganic insulating film.

10. A method for manufacturing a wiring board according to claim 9, The lower insulating resin layer is formed such that the inorganic filler is exposed on the upper surface.

11. A method for manufacturing a wiring board according to claim 9, The inorganic insulating film is formed to have a thickness of 1 μm or less.

12. A method for manufacturing a wiring board according to claim 9, The inorganic insulating film is either a silicon nitride film or a silicon oxide film.

13. A method for manufacturing a wiring board according to claim 9, The inorganic insulating film is formed to have multiple protrusions across its entire upper surface.

14. A method for manufacturing a wiring board according to claim 9, This includes the formation of vias that penetrate the lower insulating resin layer, the upper insulating resin layer, and the inorganic insulating film.

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