Distance estimation device

Abstract

One of the challenges is to obtain accurate distance image data by removing noise. Furthermore, reducing the number of integration steps will enable the acquisition of distance image data in a short time. This is the first topic. It concerns the use of 3D object recognition for autonomous driving applications in passenger cars, etc. The present invention provides a distance image processing system including a solid-state image sensor. [Solution] Using deep learning, a TOF (Time-of-Flight) solid-state image sensor, This process includes image processing of distance information obtained from a so-called TOF camera. Deep learning is used to perform noise reduction. This reduces noise and allows for the acquisition of highly accurate distance images.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device using an oxide semiconductor and a method for manufacturing the same. Alternatively, one aspect of the present invention is This relates to an imaging device, and also to a distance estimation device and distance estimation method.

[0002] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the present invention relates to a product, method, or method of manufacture. One aspect of the present invention relates to a process, machine, This relates to manufacture or composition of matter. More specifically, the technical field of one aspect of the present invention disclosed herein includes semiconductor devices, Display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices Examples include their driving methods or their manufacturing methods.

[0003] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This term refers to all types of equipment, and includes electro-optical devices, semiconductor circuits, and electronic devices, all of which are semiconductor equipment. [Background technology]

[0004] In recent years, a great deal of research has been conducted on the use of 3D information. This involves using two or more cameras in parallel. A generally known method involves arranging and constructing 3D information from multi-view images. This method is While it can be implemented at low cost, it is insufficient for autonomous driving of automobiles, and high Precise distance measurement is difficult.

[0005] As a means of measuring distance, light such as infrared rays is emitted, and three-dimensional information is acquired using the reflected light. A method (also called the TOF method) is attracting attention. TOF distance measurement involves a light source and It is composed of a photodetector (sensor or camera). The camera used in this TOF method is a time of flight camera, also called a TOF camera. A TOF camera emits light from a light source and can obtain distance information from the light source to an object based on the flight time (time of flight TOF) of the reflected light of the light irradiated on the object.

[0006] In addition, there are a direct TOF measurement method that directly measures TOF in the time domain and an indirect TOF measurement method that measures using a change in a physical quantity dependent on TOF and a time reference for converting it into a time change. Regarding TOF, it is described in Non-Patent Document 1.

[0007] However, since a TOF camera can only receive weak light reflected from a distant object for a very short time, the signal is easily buried in noise.

[0008]

[0009] Patent Document 1 discloses using transistors in which oxide semiconductors are used for both the reset transistor and the transfer transistor of a solid-state imaging device. In addition, a dataset and method for correcting an image taken in a dark environment using machine learning are described in Non-Patent Document 2.

[0010]

Prior Art Documents

Patent Documents

[0011]

Patent Document 1

Non-Patent Documents

[0012] [Non-Patent Document 2] CVPR 2018, Chen Chen et al., “Learning to See in the Dark” [Overview of the project] [Problems that the invention aims to solve]

[0013] If the signal is buried by noise, it becomes difficult to perform image recognition on objects with low reflectivity. It will be difficult.

[0014] Distance image data is generated when light from a light source is reflected by an object, and the reflected light is received by a photodetector. The generated charge is used to calculate the distance to the object. To improve the resolution, In some cases, the process involves repeatedly calculating and accumulating values, and then performing an average calculation.

[0015] One of the challenges is to obtain accurate distance image data by removing noise. One of the challenges is to achieve distance image data acquisition in a short time by reducing the number of integration steps. do.

[0016] Solid-state imaging technology that can be used for 3D object recognition, for use in autonomous driving of passenger cars and other vehicles. One of the challenges is to provide a distance image processing system that includes the necessary elements.

[0017] To improve the distance resolution of a TOF camera, it is necessary to increase the temporal resolution. To increase resolution, the exposure time is shortened, which lowers the signal strength. To increase the degree, multiple measurements may be taken and charge accumulation may be repeated, but Transistors using crystalline silicon have leakage problems. Also, using single-crystal silicon... In transistors, there is also the problem of variations in leakage current when off. The off-current, in particular, changes. It is easy. Therefore, when constructing charge-holding semiconductor devices such as solid-state image sensors, the environment It is possible to ensure a sufficient potential holding period regardless of the conditions, and the off-current characteristics are further reduced. The development of a vise is desired.

[0018] Furthermore, there is a noise problem caused by leakage when transistors using single-crystal silicon are turned off. Because leakage in the off state of transistors using single-crystal silicon cannot be reduced, noise is eliminated. There are some issues that cannot be resolved.

[0019] Furthermore, there is a desire for greater integration or miniaturization of the semiconductor circuits used in TOF cameras. [Means for solving the problem]

[0020] Using deep learning, a TOF (Time-of-Flight) solid-state image sensor, also known as TOF, is being developed. Image processing is performed on the image, including distance information obtained from the F camera. Noise is reduced through deep learning. This allows for obtaining highly accurate distance images.

[0021] Distance information consists of multiple spatial slices, and each spatial slice represents the entire spatial area that it wants to recognize. It is possible to create a single depth image by superimposing object information at multiple distances across the body. In the TOF method, light from a light source is shone onto an object, and the reflected light is used. For example, solid Information on objects located between 1m and 45m from the body image sensor, and objects located between 45m and 90m. Object information, and object information for objects between 90m and 135m, are acquired based on distance. By superimposing these images, a single distance image is obtained for distances between 1m and 135m.

[0022] The invention disclosed herein comprises a light source that illuminates an object in the measurement space, and the reflected light from the object. A light-receiving region of a solid-state image sensor that receives light, and a first based on the carriers generated from the light-receiving region An image generation unit that generates 3D image data, and an input unit that receives the first 3D image data. Then, using the training model trained with the training data, the first 3D image data is processed. An estimation unit that performs image processing with a lossr, and a second 3D image data that is more accurate than the first 3D image data. This distance estimation device has an output unit that generates dimensional image data.

[0023] In the above configuration, the training data used for the learning model is more complex than the first 3D image data. Use many models with a high number of calculations. Train the model with 3D image data that has undergone a large number of cumulative calculations. A learning model is used that achieves the highest accuracy in the output section.

[0024] The learning model is constructed by first training the positional relationship between the TOF camera and the 3D coordinates of the object. That's fine.

[0025] Furthermore, in the above configuration, the second 3D image data is a depth map of the measurement space.

[0026] Furthermore, in the above configuration, image processing is performed by a deep convolutional neural network. Specifically, a U-shaped network, also known as the U-Net method, is used. The method is one of the discriminant extraction methods used for 2D images. Also, FCN (Fully Co The (involutional network) method can also be used. The method is an improved version of the FCN method. It is also a 3D extension of the U-net method called the 3D-Net method. Alternatively, the V-Net method can be used.

[0027] Furthermore, a neural network is a computer simulation of the characteristics of the brain of a living organism. It refers to a mathematical model that aims to represent something using convolutional neural networks. A network is a system in which layers, each containing multiple units, are connected in one direction from the input stage to the output stage. This is a convolutional layer in which the output unit is coupled to a specific adjacent input unit. This refers to a forward-propagating network that has [a specific characteristic].

[0028] Furthermore, in the above configuration, the distance to the object is a multiple time range corresponding to the distance from the light source. The measurement section is divided into several parts, and the light emitted from the light source is reflected from the measurement section where the object is located and received. It is estimated based on the time it takes to reach the region.

[0029] The image generation unit calculates the integrated or average value of the electrical output corresponding to the amount of light received by the solid-state image sensor. The distance is estimated using this value. The image generation unit also uses the currents of multiple detection periods to estimate the light reception period. The distance is calculated using the charge amounts accumulated separately, and this distance is used as the pixel value in the depth image.

[0030] When using a solid-state image sensor, if it is used in a fixed camera installation for security purposes, the cumulative number of By using images obtained from a large number of scans as training data, the number of scans of imaging data can be reduced. By using this method, it is possible to obtain a depth image with the same accuracy as an image obtained by increasing the number of integration iterations. Furthermore, images obtained by increasing the number of integration iterations were processed to reduce noise and used as training data. By using this method, it is possible to obtain results with a high number of integrations using imaging data with a low number of integrations. It is possible to obtain distance images with higher precision than the image itself.

[0031] For example, a microcontroller can be used in the estimation unit. A microcontroller is a device that performs calculations and other algorithms. A program capable of executing this program was ported to a microcomputer or microprocessor. It refers to a thing. A microcomputer is a microprocessor, memory, peripheral chips, etc. It refers to a small computer made up of components such as PU.

[0032] Furthermore, the estimation unit is manufactured using an LSI (Large Scale Integrator) integrated onto a single chip. It may also be said that it consists of (integration). This can be implemented not only with LSIs, but also with dedicated circuits or general-purpose processors. The processor is 8-bit. You can use bits such as 16-bit, 32-bit, 64-bit, and 128-bit. It is possible. Furthermore, processors include microprocessors, coprocessors, and floating-point processors. These include FPGAs (Field FPGAs), which can be programmed after the LSI is manufactured. Programmable Gate Array), or connections of circuit cells inside an LSI A reconfigurable processor that allows for the reconfiguration of settings and configurations may also be used.

[0033] Weighting parameters and pixel values ​​are stored in the memory of the estimation unit, specifically in ROM (Read (Only Memory) and RAM (Random Access Memory) It stores the data. The estimation unit can then calculate the distance image more accurately.

[0034] Furthermore, multiple processes, including neural network processing, are performed in sequence, and multiple steps A distance image processing method that constitutes this can be realized. Furthermore, the distance image processing method includes It can also be implemented as a computer program that has a computer execute each step. Yes, it is possible. Furthermore, such computer programs can be stored on recording media or the internet. It can also be saved to the cloud via a communication network and executed there.

[0035] Furthermore, the configuration of the invention disclosed herein includes a light-receiving region and a plurality of charge storage areas around the light-receiving region. A region and a transistor using an oxide semiconductor that at least partially overlaps the charge storage region, This imaging device has multiple charge storage regions and a light-shielding plate that overlaps with the transistors.

[0036] Furthermore, the configuration of other inventions includes a light-receiving region, a charge-storage region, and a first transistor, at least A semiconductor wafer with embedded components and a second component that overlaps at least partially above the charge storage region. The transistor comprises a second transistor, and the second transistor has an oxide semiconductor in the channel formation region. It is an imaging device.

[0037] In the above configuration, there is further a light-shielding plate, the light-shielding plate is a charge storage region, the first transistor , and overlap with the second transistor.

[0038] A sensor with n rows and m columns (n ​​× m) of pixels is constructed, with each light-receiving area representing one pixel. n or m can be a natural number greater than or equal to 2, for example, n can be 32 and m can be 32. When the number of elements increases, the circuit size tends to become enormous. When the circuit size becomes enormous, simultaneous measurement between pixels becomes difficult. Maintaining quality becomes difficult, making it challenging to achieve high temporal resolution.

[0039] By stacking transistors using oxide semiconductor layers on a charge storage region and overlapping some of them, This allows for a reduction in circuit area without changing the circuit size, enabling miniaturization of the chip. Furthermore, stacking allows for the achievement of high temporal resolution.

[0040] In each of the above configurations, the light-receiving area is the light-receiving area of ​​the embedded photodiode, or the ribs. This corresponds to the light-receiving area of ​​a photodiode.

[0041] An avalanche photodiode used for detecting single photons is called a SPAD (Single P Also known as a hoton avaranche diode, it applies a large negative voltage to the cathode. Furthermore, electrons generated by the incidence of one photon cause avalanche multiplication, resulting in a large current over time. An electron pulse is generated, starting from the arrival time of one photon. Avalanche multiplication. Because the speed is extremely fast, the timing of the photon's arrival can be determined by the timing of the electron pulse generation. This can be used to measure the time of flight of light.

[0042] Furthermore, by using transistors with oxide semiconductor layers, leakage is reduced, and noise is suppressed. It can reduce resonance.

[0043] The oxide semiconductor layer preferably contains, for example, indium, and In-M-Zn oxide ( M may include Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf. It is preferable.

[0044] Electric field control electrodes are used for high-speed charge transfer, and by applying a voltage to a pair of electric field control electrodes... This generates a fringing electric field, which moves photoelectrons generated in the light-receiving region to the charge-accumulating region. This is achieved by controlling the potential of multiple electric field control electrodes to create a potential gradient, which then emits light in the light-receiving region. The generated photoelectrons are moved to a desired charge storage region. An insulating layer is stacked on top of the charge storage region. The laminated insulating layer has an opening that partially overlaps with the light-receiving region. The laminated insulating layer is made of oxide semiconductor It is deposited when forming a transistor using a conductive layer, and is stacked in a position that overlaps with the light-receiving area. If left as is, the amount of light reaching the light-receiving area will be reduced as the incident infrared light is refracted. Therefore, a configuration that removes the stacking of insulating layers may be used. An opening is made in the stacking of insulating layers that overlaps the light-receiving area. By forming this structure, infrared light can be efficiently incident on the light-receiving area.

[0045] Furthermore, a reset transistor is also connected to one of the charge storage regions, and the charge storage region Reset the charge.

[0046] Furthermore, the delay time (time of flight) between the output light pulse and the received light pulse is calculated using multiple filters. Light can be received using a diode and measured by a known method. By law, it is also possible to measure the distance corresponding to the delay time (time of flight of light).

[0047] Figure 1 shows a schematic diagram of a TOF camera. In Figure 1, the illumination unit 11 is a light source such as an LED. The source is the light source, and object A and object B are at different distances from the light source, and the irradiation unit 11 This is the object onto which the light is shone. Furthermore, the reflected light from object A and object B is a solid-state light source. The sensor is sensed by a sensor unit 12 having an image element. The sensor unit 12 is a solid-state sensor. This sensor consists of multiple image elements arranged on a two-dimensional plane, each representing a single pixel.

[0048] Indirect TOF measurement methods use a light source to generate a signal light that is modulated at a high frequency, for example, 10 MHz. High-frequency modulated light is shone onto object A or object B, and the reflected light originating from the high-frequency modulated light is used as a signal. The object is then captured by the phase difference between the high-frequency modulated light from the irradiation unit 11 and the reflected light. This device measures the distance between object A or object B and the sensor unit 12 and the irradiation unit 11. be.

[0049] When determining and measuring the phase shift, the correlation and evaluation unit 14 is used with the sensor unit. This is done using the data obtained in T12 and the data from the signal generation unit 13. The light fixture 11 is illuminated by an instruction from the signal generation unit 13.

[0050] The phase difference, or phase delay, is converted into the measured distance using the period length and the speed of light. By performing this operation pixel by pixel, the difference in distance between object A and object B can be calculated.

[0051] In this specification, the TOF camera is defined not only as the sensor unit 12, but also as the illumination unit 11, phase This refers to the device including the stimulator and evaluation unit 14, the signal generation unit 13, etc., and the imaging device. Let's call it that. [Effects of the Invention]

[0052] Deep learning can be used to obtain high-precision depth images from noisy depth images. This is used in autonomous vehicles that utilize distance image data, and in manufacturing machinery such as industrial robots. It is also useful in certain situations.

[0053] For example, when mounting a TOF camera in a vehicle, the model obtained through training with a neural network... Dell and parameters are set to the vehicle's microcomputer or microprocessor (hereinafter referred to as M). By transplanting it to an icon (also called an icon), the distance image from the car is estimated, and that distance image is displayed. It becomes possible.

[0054] Reduces noise caused by leakage when a transistor using single-crystal silicon is off, and enables high-speed operation. This enables the achievement of high resolution.

[0055] This enables the integration or miniaturization of semiconductor circuits used in TOF cameras. [Brief explanation of the drawing]

[0056] [Figure 1] Figure 1 is a schematic diagram showing one embodiment of the present invention. [Figure 2] Figure 2A is an example of a circuit diagram showing one aspect of the present invention, and Figure 2B is a timing chart. [Figure 3] Figure 3 is an example of a potential diagram illustrating one aspect of the present invention. [Figure 4] Figure 4 is an example of a circuit diagram showing one aspect of the present invention. [Figure 5] Figure 5 is an example of a timing chart illustrating one aspect of the present invention. [Figure 6] Figure 6A is a top view of a solid-state image sensor showing one embodiment of the present invention, and Figure 6B is a cross-sectional view. [Figure 7] Figure 7 is a cross-sectional view of a solid-state image sensor showing one embodiment of the present invention. [Figure 8] Figure 8A is a top view illustrating a transistor used in a solid-state image sensor representing one aspect of the present invention, and Figure 8B is a cross-sectional view. [Figure 9] Figure 9A is a cross-sectional view of a transistor used in a solid-state image sensor, illustrating one aspect of the present invention; Figure 9B shows a top view of the oxide semiconductor layer 130 of the transistor; and Figures 9C and 9D are cross-sectional views. [Figure 10] Figures 10A and 10B are examples of flowcharts illustrating one aspect of the present invention. [Figure 11] Figure 11 is a block diagram showing one embodiment of the present invention. [Figure 12] Figure 12 is a schematic diagram of the U-Net network architecture. [Figure 13] Figures 13A, 13B, 13C, 13D, 13E, and 13F are diagrams showing embodiments of the present invention. [Modes for carrying out the invention]

[0057] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is... Not limited to the following description, the form and details can be modified in various ways, as any person skilled in the art would know. This is easily understood. Furthermore, the present invention shall be interpreted as being limited to the contents of the embodiments described below. It's not something that can be done.

[0058] (Embodiment 1) Figure 2A shows a circuit diagram illustrating one pixel configuration. It has at least one transistor and a capacitor. The cathode of the photodiode is a transistor Connect electrically to either the source or drain of transistor 22. The gate is electrically connected to wiring TX1, and the other is either the source or the drain, one of the capacities 41 The electrodes, either the source or drain of transistor 25, and the gate of transistor 31 It is electrically connected to the VRS. Either the source or drain of transistor 25 is connected to the wiring VRS. It is electrically connected.

[0059] Each pixel consists of one photodiode (PD) and one transistor for resetting. (21) and three transistors for charge transfer (22, 23, 24) are on the silicon wafer. The structure is then built up, and on top of that, transistors (25, 26, 27) using oxide semiconductors are stacked. Layers. Capacitors 41, 42, and 43 may be fabricated on the silicon wafer, or layered on top of it. It may be made in this way.

[0060] The three transistors for charge transfer (22, 23, 24) are each connected to the holding node FD. It continues. Time is measured by changing the timing of accumulating data in the holding node. Holding node Except when we want to accumulate charge in the photodiode, the reset transistor 21 is used to reset the photodiode. Reset the PD. Also, apply the wires TX1, TX2, TX3, and TX4 as shown in Figure 2B. An example of a timing chart for a signal is shown.

[0061] Conventionally, in order to fabricate the photodiode and readout circuit onto the silicon wafer, The total chip area is the sum of the area occupied by the diodes and the area occupied by the readout circuit. Transistors 31, 32, and 33 are part of the readout circuit. This embodiment So, transistors 31, 32, 33 and capacitors 41, 42, 43 do not overlap with the light-receiving region. The components are fabricated on the silicon wafer at specific locations and electrically connected.

[0062] Furthermore, the readout circuit or a part of it may be constructed using an oxide semiconductor transistor. Therefore, the occupied area can be reduced by stacking. Consequently, the embedded photodiode This also allows for an increase in the occupied area of ​​the light-receiving region and a reduction in the overall size of the chip.

[0063] Furthermore, when using a Si embedded photodiode, the potential diagram is shown in Figure 3. In a potential diagram, the downward direction (depth direction) of the diagram is considered the positive direction of the electric potential. This is how it is expressed. When charge is stored in the FD, the leakage path is from the photodiode PD. The path from transistor 22 to the holding node FD (dotted arrow 45 in Figure 3), and the holding The path from node FD through transistor 25 to wiring VRS (dotted arrow 46 in Figure 3) These are the two locations. The gate RS of transistor 25 holds the wiring VRS to node F. The supply of charge to D is controlled. The first leakage path from the photodiode PD is through wiring T. If you reset it on X4, there should be almost no problems, but this is the second leak path. Leakage from the holding node FD to the wiring VRS is a problem. This embodiment solves that problem. Therefore, a transistor using an oxide semiconductor is used. The Sta25 has low leakage, which reduces noise caused by leakage and enables highly accurate measurements. ru.

[0064] Furthermore, instead of photodiodes (PDs), we can use energy with lower intensity than embedded photodiodes. Avalanche photodiodes, which can also detect energy, can be used.

[0065] Furthermore, in this embodiment, there are three transistors (22, 23, 24) for charge transfer. The example shown is not particularly limiting; it may be two, four or more transistors.

[0066] Furthermore, while examples using silicon wafers are shown, the method is not limited to silicon. Alternatively, compound semiconductor substrates can be used.

[0067] (Embodiment 2) In this embodiment, a photodiode smaller than a PIN photodiode is used. An example using an avalanche photodiode, which can also detect energy, is shown below.

[0068] Figure 4 shows an example of a pixel circuit using an avalanche photodiode (APD). Also, Figure 5 This shows an example of a timing chart for the signals applied to the wiring TX1, TX2, TX3, and TX4. Yes. An avalanche photodiode (APD) works by applying a negative voltage to its cathode. It has a carrier multiplication function that generates carriers inside the element, and obtains a multiplication factor according to the applied bias. It is possible.

[0069] Even when using an avalanche photodiode (APD), if the number of incident photons is small... Noise can be reduced by taking multiple measurements and integrating them. When integrating, The capacitance of the holding node FD is sufficiently larger than the capacitance of the avalanche photodiode APD. If it's good, repeated accumulation is possible.

[0070] In this embodiment, the capacitance of the avalanche photodiode (APD) is large. Therefore, to reduce capacitance, transistor 44 was added to the avalanche photodiode (APD) side. It is added. Wiring of transistors 22, 23, and 24 (one of TX1, TX2, or TX3) 1) When transferring charge by setting it to High, the gate TR of this transistor 44 is controlled. By turning it off, the capacitance can be reduced. In that case, avalanche photodiode A Because charge remains in the PD, the avalanche photodiode APD recharges with each transfer. A set is required.

[0071] In this embodiment, transistor 44 is one of three transistors (22, 23) for charge transfer. Similar to 24), it is fabricated on a silicon wafer. Also, transients using oxide semiconductors The st(25, 26, 27) are fabricated on top of the silicon wafer. Readout circuit By using an oxide semiconductor transistor in part of the drive circuit, one The pixel size can be reduced. Also, some of the drive circuits, such as the readout circuit, use oxide semiconductors. By using the transistors employed, when comparing with the same pixel size, the light-receiving area The area can be increased.

[0072] This device allows for the fabrication of a distance image sensor using the TOF measurement method directly. It is possible.

[0073] Furthermore, in this embodiment, there are three transistors (22, 23, 24) for charge transfer. The example shown is not particularly limiting; it may be two, four or more transistors.

[0074] (Embodiment 3) Solid-state imaging including a photodiode fabricated on a silicon wafer as shown in Embodiment 1 An example of a component is shown.

[0075] Figure 6A shows the n-type silicon wafer formed by adding impurity elements to a p-type silicon wafer. Multiple charge storage regions 64, charge discharge region 65, and photodiode light receiving region 9 0. This is an example of a layout with multiple forwarding gate pairs. Although not shown in Figure 6A, Above the light-receiving area enclosed by the dotted line, a light-shielding plate is positioned, with an opening in the area overlapping with the light-receiving area 90. It is fixed in place. Note that in Figure 6A, for simplification, it is located below the light-shielding plate, and also, The layout of the transistor using oxide semiconductors formed on a silicon wafer is shown in the diagram. No. Below the light-shielding plate, an oxide semiconductor is present on the silicon wafer via an insulating layer. Transistors using this technology can be installed and integrated.

[0076] Furthermore, in Figures 6A and 6B, multiple transfer gate pairs and wiring TX1, TX2, TX3 Although TX4 is shown as an island-like structure, it is not a floating electrode, but rather a structure located above it. Each wire is connected, and the wiring is laid out so that the desired voltage can be applied to each. It is being done.

[0077] Furthermore, a microlens is provided above the light-receiving area 90 and at a position that overlaps with the opening of the light-shielding plate 91. It may be done. Microlenses collect reflected light from an object far from the light source to form a light-receiving area. It can be irradiated to 90. Note that Figure 6A shows a light-shielding plate with an aperture that overlaps with the light-receiving area. The parts shown are not depicted and have been omitted.

[0078] Furthermore, Figure 6B shows a schematic cross-sectional view obtained by cutting along the dashed line in Figure 6A.

[0079] In Figure 6B, the light-receiving area 90 is positioned so as to facilitate light reception, with several overlapping positions. A few insulating layers (layers of insulating layers) are selectively removed, and openings are created in the layer of insulating layers. The process of forming openings in the layered margins is a method for fabricating transistors using oxide semiconductors. Since it can be formed in the same process as Seth, there is almost no increase in the number of steps. Above the light-receiving area 90 is this In this embodiment, the effect of refractive index due to the lamination of insulating layers in a position overlapping with the light-receiving region 90 is reduced. An opening was created to reduce the amount of light, but if the infrared light reflected from the object can be sufficiently received... An opening does not need to be provided. In Figure 6B, the light-receiving region 90 is the first insulating layer 70, the second It is covered only by a lamination of insulating layers 75. The first insulating layer 70 and the second insulating layer 75 are light-transmitting. It is made of a highly insulating inorganic material, such as silicon oxide. Furthermore, the first insulating layer 70 is A field oxide film can also be used. The upper surfaces of the first insulating layer 70 and the second insulating layer 75 are CMP (Chemical Mechanical Polishing) as needed It is preferable to perform a planarization treatment using methods such as the ) method.

[0080] Furthermore, to isolate each transistor, element isolation is performed using a p-well region 66. The p-well region 66 can also form a guard ring.

[0081] The light-receiving region 90 is embedded in the silicon wafer. (See Figure 6B) Thus, the p-type region 60 of the wafer itself, the p-region 61 on top of it, the n-type surface embedded region 62, p + region 63, first insulating layer 70, and second insulating layer 75 are laminated. n-type surface embedded region The photodiode structure generates a majority of carriers at 62. n-type surface embedded region 6 By sequentially changing the depletion potential of 2, the majority carriers can move to three charge storage locations. A distance image is acquired by controlling the system to set the region to one of the 64 regions. The control is performed by wiring TX. 1, TX2, TX3, TX4 and the first transfer gate pair 71, the second transfer gate pair 72, Adjust the voltages applied to the third transfer gate pair 73 and the fourth transfer gate pair 74 as appropriate. To do so.

[0082] Furthermore, if the movement of multiple carriers can be controlled by wiring TX1, TX2, TX3, and TX4, In particular, the first transfer gate pair 71, the second transfer gate pair 72, and the third transfer gate pair 73, A fourth transfer gate pair 74 does not need to be provided.

[0083] In Figure 6B, since no transistors using oxide semiconductors are arranged, Figure 7 shows an example of a cross-sectional structure in which a transistor 25 using a conductor is arranged, partially corresponding to Figure 6B. As shown below, Figure 7 uses the same insulating layer as Figure 6B, and the same reference numerals are used for the same locations. I will explain.

[0084] In Figures 6A and 6B, the first transfer gate pair 71, the second transfer gate pair 72, and the third transfer gate The send gate pair 73 and the fourth transfer gate pair 74 use polysilicon or metal wiring. .

[0085] First transfer gate pair 71, second transfer gate pair 72, third transfer gate pair 73, fourth transfer gate By applying voltage to each of the transmitting gate pairs 74, the photoelectrons generated in the light-receiving region 90 are It assists in the high-speed transfer of charge to the charge storage region 64.

[0086] The reset transistor initializes the potential of the light-receiving region 90. It can be made to function by powering the wiring TX4, which is the gate of the reset transistor. By applying pressure, the charge is moved at high speed to the charge discharge region 65 and discharged. A reset is performed. Note that the transistor with wiring TX4 as the gate is a known CMO It is manufactured by the S manufacturing process. Also, the terminals have wiring TX1, TX2, and TX3 as gates. The zista is also fabricated using a known CMOS fabrication process. In this embodiment, there are three zistas per pixel. The configuration shown includes a charge storage region 64 and one charge discharge region 65, but is not particularly limited to this configuration. Multiple charge discharge areas may be provided. Also, the charge storage area 64 and the charge discharge area 65 are the same process. This is the n+ region created by the method described above, and a reset transistor is connected to the charge discharge region. They're simply changing the name to distinguish them.

[0087] Figure 7 shows the wiring TX1 of the transistors that are embedded and formed on the silicon wafer. A transistor with a gate is shown, and the charge storage region 64 is the source region or It functions as a rain region. Also, the transistor with wiring TX1 as the gate is oxidized. Electrically connected to either the source electrode or the drain electrode of the semiconductor transistor 25 Next, one end functions as a holding node FD, and the other end is wired via the connecting electrode 76 to the VR. S is electrically connected. In addition, the oxide semiconductor transistor 25 has a charge storage region. It partially overlaps with 64. A transistor using an oxide semiconductor layer is stacked on top of the charge storage region. Furthermore, by overlapping parts of the circuit, the circuit area can be reduced, allowing for miniaturization of the chip.

[0088] The solid-state image sensor shown in this embodiment has a structure in which there are three transistors for charge transfer. It has three charge storage nodes and corresponds to the circuit shown in Figure 2 in Embodiment 1. He is a child.

[0089] Note that in Figure 7, transistor 25 is shown as having a back gate, It may also be a configuration without a back gate. The back gate is provided on the opposite side. It may be electrically connected to the front gate of the transistor, or to the back gate. In some cases, a different fixed potential may be supplied to the front gate.

[0090] Transistor 25 is a transistor (hereinafter referred to as OS transistor) in which the active layer is formed of an oxide semiconductor. A generator can be used.

[0091] OS transistors have extremely low off-current characteristics, thus improving the dynamic range of imaging. It can be enlarged.

[0092] Furthermore, the low off-current characteristics of transistor 25 allow charge to be retained in the charge storage region 64. The incubation period can be extended to an extremely long duration. Furthermore, leakage can be reduced.

[0093] Furthermore, OS transistors are transistors that use silicon in the channel formation region (hereinafter, Because its electrical characteristics have less temperature dependence than Si transistors, it can operate over an extremely wide temperature range. It can be used in solid-state image sensors and semiconductors having OS transistors. The conductive device is also suitable for installation in automobiles, aircraft, spacecraft, and other applications.

[0094] (Embodiment 4) In this embodiment, a transient having an oxide semiconductor that can be used in one aspect of the present invention The sta will be explained using drawings. Note that in the drawings of this embodiment, for clarity, Some elements are enlarged, reduced, or omitted in the illustration for illustrative purposes.

[0095] Figures 8A and 8B show a top view of a transistor used in a solid-state image sensor according to one embodiment of the present invention, and This is a cross-sectional view. Figure 8A is a top view, and the cross-section in the direction of the dashed line B1-B2 shown in Figure 8A is shown in Figure This corresponds to 8B. Also, the cross-section in the direction of the dashed line B3-B4 shown in Figure 8A corresponds to Figure 9A. Furthermore, the direction of the dashed line B1-B2 is the channel length direction, and the direction of the dashed line B3-B4 is the channel. This is sometimes referred to as the width direction. Also, Figure 9B shows the upper surface of the oxide semiconductor layer 130 of the transistor. The diagram shows that Figure 9C corresponds to the cross-section in the direction of the dashed line A1-A2 in Figure 9B, and Figure 9D This diagram corresponds to the cross-section in the direction of the dashed line A3-A4 in Figure 9B.

[0096] The transistor 101 has an insulating layer 120 that is in contact with the substrate 115, and an oxide layer that is in contact with the insulating layer 120. A monocrystalline semiconductor layer 130, a conductive layer 140 that is electrically connected to the oxide semiconductor layer 130, and a conductive Layer 150, oxide semiconductor layer 130, conductive layer 140, and insulating layer 1 in contact with conductive layer 150 60, conductive layer 170 in contact with insulating layer 160, conductive layer 140, conductive layer 150, insulating layer 1 60 and an insulating layer 175 in contact with the conductive layer 170, and an insulating layer 180 in contact with the insulating layer 175 , and also, if necessary, the insulating layer 180 may be given the function of a planarizing film. .

[0097] Here, the conductive layer 140 is the source electrode layer, the conductive layer 150 is the drain electrode layer, and the insulating layer 160 is The gate insulating film and the conductive layer 170 can each function as a gate electrode layer.

[0098] A semiconductor substrate is used for the substrate 115, for example, a single-crystal silicon having a channel formation region. A silicon substrate on which transistors are formed, and an insulating layer, wiring, etc. on the silicon substrate. A device can be used that has a conductive material or the like formed on it that functions as a contact plug.

[0099] The insulating layer 120 has the role of preventing the diffusion of impurities from elements contained in the substrate 115. In addition, it can play a role in supplying oxygen to the oxide semiconductor layer 130. Therefore, The margin layer 120 is preferably an insulating film containing oxygen, and contains more oxygen than the stoichiometric composition. It is more preferable that it be an insulating film. For example, the thermal desorption gas analysis method (TDS(Therm In al Desorption Spectroscopy, the oxygen atoms are converted to The amount of oxygen released is 1.0 × 10⁻⁶ 19 atoms / cm 3 The membrane is defined as described above. The surface temperature of the film during TDS analysis is between 100°C and 700°C, or 100°C. A temperature range of 500°C or less is preferred. Also, as described above, the substrate 115 is shaped by other devices. In the case of a constructed substrate, the insulating layer 120 also functions as an interlayer insulating film. This involves CMP (Chemical Mechanical Polishing) to make the surface flat. It is preferable to perform a planarization treatment using the ishing method or similar methods.

[0100] For example, the insulating layer 120 contains aluminum oxide, magnesium oxide, silicon oxide, and oxide Silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide oxide insulating films such as lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. , nitrous oxide such as silicon nitride, silicon nitride, aluminum nitride, aluminum nitride A dielectric insulating film or a mixture thereof can be used. Furthermore, a lamination of the above materials is also possible. That's fine.

[0101] In this embodiment, the oxide semiconductor layer 130 of the transistor is an oxide semiconductor layer 130a, oxide semiconductor layer 130b and oxide semiconductor layer 130c from the insulating layer 120 side This explanation will primarily focus on the case of a three-layer structure where layers are stacked sequentially.

[0102] In the case of a single layer oxide semiconductor layer 130, the oxide semiconductor layer 13 shown in this embodiment You can use the layer corresponding to 0b.

[0103] Furthermore, if the oxide semiconductor layer 130 consists of two layers, the oxide semiconductor layer 13 shown in this embodiment... The layer corresponding to 0a and the layer corresponding to the oxide semiconductor layer 130b are arranged in order from the insulating layer 120 side. A stacked layer can be used. In this configuration, the oxide semiconductor layer 130a and the oxide semiconductor layer It can also be swapped with 130b.

[0104] Furthermore, if there are four or more oxide semiconductor layers 130, for example, as described in this embodiment... The configuration involves adding another oxide semiconductor layer to the three-layer oxide semiconductor layer 130. It is possible.

[0105] For example, the oxide semiconductor layer 130b contains the oxide semiconductor layer 130a and the oxide semiconductor layer Acids with a higher electron affinity (energy from the vacuum level to the bottom of the conduction band) than body layer 130c. Ion semiconductors are used. Electron affinity is the energy difference between the vacuum level and the top of the valence band (ions). From the potential, the energy difference between the lower end of the conduction band and the upper end of the valence band (energy gap) It can be calculated by subtracting (P).

[0106] The oxide semiconductor layer 130a and the oxide semiconductor layer 130c constitute the oxide semiconductor layer 130b. It contains one or more metallic elements, for example, the energy at the lower end of the conduction band is the oxide semiconductor layer 13 Greater than 0b, at least 0.05eV, 0.07eV, 0.1eV, or 0.15eV. If present, it approaches the vacuum level within the range of 2eV, 1eV, 0.5eV, or 0.4eV. It is preferable to form it with an oxide semiconductor.

[0107] In such a structure, when an electric field is applied to the conductive layer 170, the oxide semiconductor layer 130 A channel is formed in the oxide semiconductor layer 130b, which has the lowest energy at the lower end of the conduction band. ru.

[0108] Furthermore, the oxide semiconductor layer 130a contains one or more of the metal elements that make up the oxide semiconductor layer 130b. Because it is composed of the above, the interface when the oxide semiconductor layer 130b and the insulating layer 120 are in contact In comparison, interface states are formed at the interface between the oxide semiconductor layer 130b and the oxide semiconductor layer 130a. This becomes less likely to occur. The interface level may form a channel, so the transistor The key voltage may fluctuate. Therefore, an oxide semiconductor layer 130a is provided. This can reduce variations in electrical characteristics such as the threshold voltage of transistors. Furthermore, the reliability of the transistor can be improved.

[0109] Furthermore, the oxide semiconductor layer 130c contains one or more of the metal elements that make up the oxide semiconductor layer 130b. Because it is composed of the above, the oxide semiconductor layer 130b and the gate insulating film (insulating layer 160) are in contact. Compared to the interface in the case of [the other case], the interface between oxide semiconductor layer 130b and oxide semiconductor layer 130c This reduces the likelihood of carrier scattering. Therefore, an oxide semiconductor layer 130c is provided. This allows for an increase in the field-effect mobility of the transistor.

[0110] For example, the oxide semiconductor layer 130a and the oxide semiconductor layer 130c contain Al, Ti, Ga Ge, Y, Zr, Sn, La, Ce, or Hf are used in a material higher than the oxide semiconductor layer 130b. Materials containing the atoms in a specific ratio can be used. Specifically, materials with an atomic ratio of 1.5 times or more are preferred. The ratio should be at least twice, and more preferably at least three times. The aforementioned elements bond strongly with oxygen. Therefore, it has the function of suppressing the occurrence of oxygen vacancies in the oxide semiconductor layer. The monocrystalline semiconductor layer 130a and the oxide semiconductor layer 130c are more acidic than the oxide semiconductor layer 130b. It can be said that primary defects are less likely to occur.

[0111] Furthermore, oxide semiconductor layer 130a, oxide semiconductor layer 130b, and oxide semiconductor layer 130 The oxide semiconductors that can be used as c are at least indium (In) or sub-album. It is preferable that it contains lead (Zn). Alternatively, it is preferable that it contains both In and Zn. Furthermore, in order to reduce variations in the electrical characteristics of transistors using the oxide semiconductor, Preferably, both include a stabilizer.

[0112] Stabilizers include gallium (Ga), tin (Sn), hafnium (Hf), and aluminum. Examples include aluminum (Al) or zirconium (Zr). Also, other stabilizers... These are lanthanides: lanthanum (La), cerium (Ce), and praseodymium (P). r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Examples include rhodium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu). .

[0113] For example, as oxide semiconductors, indium oxide, tin oxide, gallium oxide, zinc oxide, I n-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn-Mg oxide, Sn-Mg Oxides, In-Mg oxide, In-Ga oxide, In-Ga-Zn oxide, In-Al- Zn oxide, In-Sn-Zn oxide, Sn-Ga-Zn oxide, Al-Ga-Zn oxide Materials, Sn-Al-Zn oxide, In-Hf-Zn oxide, In-La-Zn oxide, In -Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm- Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide, In -Tm-Zn oxide, In-Yb-Zn oxide, In-Lu-Zn ​​oxide, In-Sn- Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, I n-Sn-Al-Zn oxide, In-Sn-Hf-Zn oxide, In-Hf-Al-Zn Oxides can be used.

[0114] For example, in-Ga-Zn oxide is a material whose main components are In, Ga, and Zn. It means an oxide containing In, Ga, and Zn. Good. Also, in this specification, a film composed of In-Ga-Zn oxide is referred to as an IGZO film. They also call them that.

[0115] Also, InMO3(ZnO) m Materials represented as (m>0, and m is not an integer) It may be included. Note that M is one selected from Ga, Y, Zr, La, Ce, or Nd. This indicates a metallic element or multiple metallic elements. Also, In2SnO5(ZnO) n (n>0, and You may also use materials represented by n (where n is an integer).

[0116] Furthermore, oxide semiconductor layer 130a, oxide semiconductor layer 130b, and oxide semiconductor layer 130c are At least indium, zinc, and M(Al, Ti, Ga, Ge, Y, Zr, Sn, La) When it is an In-M-Zn oxide containing a metal such as Ce or Hf, the oxide semiconductor layer 1 30a is In:M:Zn=x1:y1:z1 [atomic ratio], oxide semiconductor layer 130b is I n:M:Zn=x2:y2:z2 [atomic ratio], oxide semiconductor layer 130c is In:M:Z If n = x3:y3:z3 [atomic ratio], then y1 / x1 and y3 / x3 become y2 / x2 It is preferable that y1 / x1 and y3 / x3 are 1 greater than y2 / x2. The ratio should be 5 times or more, preferably 2 times or more, and more preferably 3 times or more. At this time, the oxide semi In the conductor layer 130b, if y2 is greater than or equal to x2, the electrical characteristics of the transistor are stabilized. This is possible. However, when y2 becomes more than 3 times x2, the field-effect mobility of the transistor Because this would cause a decrease in the value, it is preferable that y2 be less than three times x2.

[0117] In the oxide semiconductor layer 130a and oxide semiconductor layer 130c, the fields excluding Zn and O In the mixture, the atomic ratio of In and M is preferably such that In is less than 50 atomic%, M is 50 atomic% or more, more preferably In is less than 25 atomic%, and M is 7 The atomic content should be 5% or more. Also, the oxide semiconductor layer 130b should be excluding Zn and O. The atomic ratio of In and M is preferably 25 atomic% or more for In and 75 atomic% for M. Less than 0 omic%, more preferably In is 34 atomic% or more, and M is 66 atomic%. It should be less than c%.

[0118] Furthermore, the oxide semiconductor layer 130b is composed of oxide semiconductor layer 130a and oxide semiconductor layer 130 It is preferable to increase the indium content rather than c. In the oxide semiconductor, the s-orbitals of heavy metals mainly contribute to carrier conduction. By increasing the indium content rate, more s-orbitals overlap. Therefore, an oxide with a composition where In is more than M has a higher mobility compared to an oxide with a composition where In is equal to or less than M. Thus, by using an oxide with a high indium content in the oxide semiconductor layer 130b, a transistor with high field-effect mobility can be realized. The s-orbitals contribute to carrier conduction, and by increasing the indium content rate, more s-orbitals overlap. Therefore, an oxide with a composition where In is more than M has a higher mobility compared to an oxide with a composition where In is equal to or less than M. Therefore, by using an oxide with a high indium content in the oxide semiconductor layer 130b, a transistor with high field-effect mobility can be realized. The thickness of the oxide semiconductor layer 130a is 3 nm or more and 100 nm or less, preferably 5 nm or more and 50 nm or less, more preferably 5 nm or more and 25 nm or less. Also, the thickness of the oxide semiconductor layer 130b is 3 nm or more and 200 nm or less, preferably 10 nm or more and 150 nm or less, more preferably 15 nm or more and 100 nm or less. Also, the thickness of the oxide semiconductor layer 130c is 1 nm or more and 50 nm or less, preferably 2 nm or more and 30 nm or less, more preferably 3 nm or more and 15 nm or less. Also, the oxide semiconductor layer 130b is preferably thicker than the oxide semiconductor layer 130a and the oxide semiconductor layer 130c. To impart stable electrical characteristics to a transistor having an oxide semiconductor layer as a channel, it is effective to reduce the impurity concentration in the oxide semiconductor layer and make the oxide semiconductor layer intrinsic or substantially intrinsic. Here, substantially intrinsic means that the carrier density of the oxide semiconductor layer is less than 1×10 / cm, preferably less than 1×10 / cm, more preferably less than 1×10 / cm.

[0119] The thickness of the oxide semiconductor layer 130a is 3 nm or more and 100 nm or less, preferably 5 nm or more and 50 nm or less, more preferably 5 nm or more and 25 nm or less. Also, the thickness of the oxide semiconductor layer 130b is 3 nm or more and 200 nm or less, preferably 10 nm or more and 150 nm or less, more preferably 15 nm or more and 100 nm or less. Also, the thickness of the oxide semiconductor layer 130c is 1 nm or more and 50 nm or less, preferably 2 nm or more and 30 nm or less, more preferably 3 nm or more and 15 nm or less. Also, the oxide semiconductor layer 130b is preferably thicker than the oxide semiconductor layer 130a and the oxide semiconductor layer 130c. The thickness of the oxide semiconductor layer 130c is 1 nm or more and 50 nm or less, preferably 2 nm or more and 30 nm or less, more preferably 3 nm or more and 15 nm or less. Also, the oxide semiconductor layer 130b is preferably thicker than the oxide semiconductor layer 130a and the oxide semiconductor layer 130c. To impart stable electrical characteristics to a transistor having an oxide semiconductor layer as a channel, it is effective to reduce the impurity concentration in the oxide semiconductor layer and make the oxide semiconductor layer intrinsic or substantially intrinsic.

[0120] 17 3 15 3 13 3 Here, substantially intrinsic means that the carrier density of the oxide semiconductor layer is less than 1×10 / cm, preferably less than 1×10 / cm, more preferably less than 1×10 / cm. <Omitted for simplicity, please refer to the original Japanese text for the full sequence of tags.>To impart stable electrical characteristics to a transistor having an oxide semiconductor layer as a channel, it is effective to reduce the impurity concentration in the oxide semiconductor layer and make the oxide semiconductor layer intrinsic or substantially intrinsic. Here, substantially intrinsic means that the carrier density of the oxide semiconductor layer is less than 1×10 / cm, preferably less than 1×10 / cm, more preferably less than 1×10 / cm. Here, substantially intrinsic means that the carrier density of the oxide semiconductor layer is less than 1×10 / cm, preferably less than 1×10 / cm, more preferably less than 1×10 / cm. 17 3 less than 1×10 / cm 17 / cm 3 preferably less than 1×10 / cm 15 / cm 3 Here, substantially intrinsic means that the carrier density of the oxide semiconductor layer is less than 1×10 / cm, preferably less than 1×10 / cm, more preferably less than 1×10 / cm. more preferably less than 1×10 / cm 13 / cm 3This refers to being less than or equal to.

[0121] Furthermore, in the oxide semiconductor layer, hydrogen, nitrogen, carbon, silicon, and metals other than the main component are present. Elements act as impurities. For example, hydrogen and nitrogen contribute to the formation of donor levels, making them carrier-dense. This increases the degree of the problem. Furthermore, silicon contributes to the formation of impurity levels in the oxide semiconductor layer. These impurity levels can act as traps, potentially degrading the electrical characteristics of the transistor. Therefore, oxide semiconductor layer 130a, oxide semiconductor layer 130b and oxide semiconductor layer It is preferable to reduce the impurity concentration in the 130c layer and at each interface.

[0122] To make an oxide semiconductor layer intrinsically or substantially intrinsically, SIMS (Secondary In ion mass spectrometry analysis, for example, oxide semiconductors At a certain depth in the body layer, or in a certain region of the oxide semiconductor layer, the silicon concentration 1 x 10 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 less than And, 1 × 10 18 atoms / cm 3 That concludes the explanation. Furthermore, the hydrogen concentration is, for example, an acid At a certain depth in the oxide semiconductor layer, or in a certain region in the oxide semiconductor layer, 2 × 1 0 20 atoms / cm 3 The following is preferably 5 × 10 19 atoms / cm 3 From here on Preferably 1 × 10 19 atoms / cm 3 More preferably 5 × 10 18 ato ms / cm 3 The following, 1 × 1017 atoms / cm 3 That concludes the explanation. Also, nitrogen concentration The degree refers, for example, to a certain depth in the oxide semiconductor layer, or to a certain region in the oxide semiconductor layer. In 5 × 10 19 atoms / cm 3 Less than 5 × 10 18 atom / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably, 5 ×10 17 atoms / cm 3 The following, 5 × 10 16 atoms / cm 3 That's all. ru.

[0123] Furthermore, if the oxide semiconductor layer contains crystals, and if silicon or carbon is present in high concentrations, the oxide will be affected. This can reduce the crystallinity of the semiconductor layer. To avoid reducing the crystallinity of the oxide semiconductor layer... This includes, for example, a certain depth in the oxide semiconductor layer, or a certain region in the oxide semiconductor layer. In this case, the silicon concentration is 1 × 10⁻⁶ 19 atoms / cm 3 Less than 5 × 10 1 8 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 The above section It is sufficient if it is present. Also, for example, at a certain depth in the oxide semiconductor layer, or the oxide In a region of the semiconductor layer, the carbon concentration is 1 × 10⁻⁶. 19 atoms / cm 3 Less than, preferred kuha 5×10 18 atoms / cm 3 Less than 1 × 10 18 atom / cm 3less than 6×10 17 atoms / cm 3 and having a portion of more than that is sufficient. Yes.

[0124] In addition, the off-current of the transistor using the oxide semiconductor layer highly purified as described above for the channel formation region is extremely small. For example, when the voltage between the source and the drain is about 0.1 V, 5 V, or 10 V, the off-current normalized by the channel width of the transistor can be reduced to several yA / μm to several zA / μm.

[0125] For example, In:Ga:Zn = 1:3:2, 1:3:3, 1:3:4, 1:3:6, 1:4:5, 1:6:4 or 1: 9:6 (atomic ratio), etc., such as In-Ga-Zn oxide, can be used for the oxide semiconductor layer 130a and the oxide semiconductor layer 130c. Also, for the oxide semiconductor layer 130b, In:Ga:Zn = 1:1:1, 2:1:3, 5:5:6, or 3:1:2 (atomic ratio), etc., such as In-Ga-Zn oxide, can be used. Note that the atomic ratios of the oxide semiconductor layer 13***a, the oxide semiconductor layer 130b, and the oxide semiconductor layer 130 c include fluctuations of plus or minus 20% of the above atomic ratios as errors. Include.

[0126] In addition, the region 231 shown in FIG. 8B can function as a source region, the region 232 can function as a drain region, and the region 233 can function as a channel formation region. The regions 231 and 232 are in contact with the conductive layer 1 40 and the conductive layer 150, respectively. For example, if a conductive material that easily binds with oxygen is used for the conductive layer 140 and the conductive layer 150 the regions 231 and 232 can be made to have a low resistance. Can be.

[0127] Specifically, the oxide semiconductor layer 130 and the conductive layer 140 and conductive layer 150 come into contact with each other. Oxygen vacancies occur within the oxide semiconductor layer 130, and these oxygen vacancies remain within the oxide semiconductor layer 130. Due to interactions with hydrogen that is either distilled or diffused from the outside, regions 231 and 232 have low resistance. It becomes an n-type resistance.

[0128] Conductive layer 140 acting as source electrode layer and conductive layer 1 acting as drain electrode layer 50 includes, for example, Al, Cr, Cu, Ta, Ti, Mo, W, Ni, Mn, Nd, Sc , and a single layer or laminate of a material selected from the alloy of the metal material can be used. Typical examples include Ti, which readily combines with oxygen, and materials that allow for relatively high subsequent processing temperatures. For these reasons, it is preferable to use W, which has a high melting point. Also, low-resistance Cu or Cu-M Lamination of an alloy such as n with the above material may also be used.

[0129] The above material has the property of extracting oxygen from the oxide semiconductor layer. Therefore, when in contact with the above material... In some regions of the oxide semiconductor layer, oxygen is desorbed from the oxide semiconductor layer, forming an oxygen vacancy. The region becomes noticeably affected when the small amount of hydrogen contained in the membrane combines with the oxygen deficiency. It is converted to n-type. Therefore, the n-type region is the source or drain of the transistor. It can be made to work in this way.

[0130] Furthermore, when W is used in conductive layers 140 and 150, even if nitrogen is doped... Good. By doping with nitrogen, the property of extracting oxygen can be moderately weakened, resulting in an n-type. This prevents the transformed region from expanding into the channel-forming region.

[0131] Also, the conductive layer 140 and the conductive layer 150 are formed as a stack with an n-type semiconductor layer, and the n-type semiconductor layer is also prevented from expanding the n-type region formed by contacting with the oxide semiconductor layer to the channel formation region. As the n-type semiconductor layer, In-Ga to which nitrogen is added - ZnO, zinc oxide, indium oxide, tin oxide, indium tin oxide, etc. can be used .

[0132] Note that the functions of the "source" and "drain" of the transistor can be interchanged when transistors of different polarities are employed, or when the direction of the current changes in the circuit operation. Therefore, in this specification, the terms "source" and "drain" are assumed to be interchangeable. Also, the "electrode layer" can be rephrased as "wiring".

[0133] Also, an example in which the conductive layer 170 is formed of two layers, the conductive layer 171 and the conductive layer 172, is illustrated, but it may be a single layer or a stack of three or more layers.

[0134] Also, an example in which the conductive layer 140 and the conductive layer 150 are formed as single layers is illustrated, but they may be a stack of two or more layers.

[0135] For the insulating layer 160 that acts as a gate insulating film, an insulating film containing one or more of aluminum oxide, magnesium oxide, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide can be used. Also, the insulating layer 160 may be a stack of the above materials. Note that lanthanum (La is added to the insulating layer 160. ), nitrogen, zirconium (Zr), etc. may be present as impurities.

[0136] Furthermore, an example of the laminated structure of the insulating layer 160 will be described. The insulating layer 160 is, for example, oxygen It contains nitrogen, silicon, hafnium, etc. Specifically, hafnium oxide, and oxide It is preferable that the material contains silicon or silicon oxide nitride.

[0137] Hafnium oxide and aluminum oxide are compared to silicon oxide and silicon oxide-nitride. It has a high dielectric constant. Therefore, compared to the case where silicon oxide is used, the thickness of the insulating layer 160 is Because it can be made larger, the leakage current due to tunnel current can be reduced. That is, This makes it possible to realize transistors with low current. Furthermore, a crystalline oxide can be used. Hafnium has a higher dielectric constant compared to hafnium oxide, which has an amorphous structure. Therefore, in order to create a transistor with a small off-current, hafnium oxide, which has a crystalline structure, is used. It is preferable to use [this]. Examples of crystal structures include monoclinic and cubic systems. However, one aspect of the present invention is not limited to these.

[0138] Furthermore, the insulating layer 120 and insulating layer 160 that are in contact with the oxide semiconductor layer 130 are made of nitrogen oxide It is preferable to use a film with low emission levels. An insulating layer and an oxide semiconductor with high nitrogen oxide emission levels are preferable. When conductors come into contact, the energy level density may increase due to nitrogen oxides. Material-induced level densities can sometimes form within the energy gap of oxide semiconductors. The insulating layers 120 and 160 are treated with, for example, oxidative nitriding that releases a small amount of nitrogen oxides. An oxide insulating layer such as a silicon film or an aluminum oxidiznitride film can be used.

[0139] Furthermore, silicon oxidnitride films with low nitrogen oxide emissions are subjected to nitrogen oxidation in the TDS method. This is a membrane that releases more ammonia than it releases of other substances, and typically, the amount of ammonia released is 1 ×10 18 / cm 3 The above 5 x 10 19 / cm 3 The following applies. Note that the amount of ammonia released is as follows. The film surface temperature is heated to 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. This will be the amount of release due to the principle.

[0140] By using the above oxide insulating layer as the insulating layer 120 and insulating layer 160, the transient This makes it possible to reduce the threshold voltage shift of the transistor and the variation in the transistor's electrical characteristics. This can be reduced.

[0141] The conductive layer 170 acting as the gate electrode layer may be, for example, Al, Ti, Cr, Co, or Ni Conductive films such as Cu, Y, Zr, Mo, Ru, Ag, Mn, Nd, Sc, Ta, and W It can be used. Furthermore, alloys of the above materials or conductive nitrides of the above materials may also be used. Furthermore, a plurality of materials selected from the above materials, alloys of the above materials, and conductive nitrides of the above materials Layers of materials are also possible. Typical examples include tungsten and tungsten and titanium nitride layers. Laminated layers of tungsten and tantalum nitride can be used. Also, low-resistance Cu can be used. Alternatively, using alloys such as Cu-Mn or laminates of the above materials with alloys such as Cu or Cu-Mn. This may also be the case. In this embodiment, the conductive layer 171 is made of tantalum nitride, and the conductive layer 172 is made of tungsten A conductive layer 170 is formed using [a specific method / tool].

[0142] The insulating layer 175 may be made of a silicon nitride film or an aluminum nitride film containing hydrogen. This can be done. In addition, the nitride insulating film also acts as a blocking film for moisture, etc. This can improve the reliability of the ZISTA.

[0143] Furthermore, an aluminum oxide film can also be used as the insulating layer 175. The film provides a barrier effect that prevents both hydrogen, water, and other impurities, as well as oxygen, from passing through. The value is high. Therefore, the aluminum oxide film is used during and after the transistor fabrication process. In this process, the inclusion of impurities such as hydrogen and water into the oxide semiconductor layer 130 is prevented, and oxygen is also prevented from entering the oxide semiconductor layer 130. Protection that prevents emission from the conductor layer and prevents unnecessary release of oxygen from the insulating layer 120. It is suitable for use as a film. Furthermore, the oxygen contained in the aluminum oxide film is converted into an oxide semi-oxide. It can also be diffused into the conductive layer.

[0144] Furthermore, it is preferable that an insulating layer 180 is formed on the insulating layer 175. This includes magnesium oxide, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride Cone, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, rayon oxide Using an insulating film containing one or more of tantalum, neodymium oxide, hafnium oxide, and tantalum oxide This is possible. Furthermore, the insulating layer may be a laminate of the above-mentioned materials.

[0145] Here, the insulating layer 180, like the insulating layer 120, has more oxygen than its stoichiometric composition. This is preferable. Oxygen released from the insulating layer 180 passes through the insulating layer 160 to the oxide semiconductor Since it can diffuse into the channel-forming region of layer 130, it can form a shape in the channel-forming region. The oxygen deficiency that has occurred can be compensated for by oxygen. Therefore, a stable transistor Electrical properties can be obtained.

[0146] Miniaturization of transistors is essential for highly integrating semiconductor devices. It is known that miniaturization degrades the electrical characteristics of transistors, particularly the channel width. When the value becomes very small, the on-current decreases significantly.

[0147] Furthermore, in a transistor according to one aspect of the present invention, as described above, the oxide semiconductor layer 130 is A gate electrode layer (conductive layer 170) is formed so as to electrically surround the width direction of the fiber. Therefore, in addition to the gate electric field from the vertical direction, the oxide semiconductor layer 130 is also subjected to the side direction. A gate field is applied. That is, a gate field is applied to the entire channel formation layer. As a result, the effective channel width is increased, allowing for an even higher on-current.

[0148] Furthermore, in one aspect of the present invention, the oxide semiconductor layer 130 is a two- or three-layer transistor. This involves forming an oxide semiconductor layer 130b on an oxide semiconductor layer 130a in which a channel is formed. This has the effect of making it difficult for interfacial states to form. Furthermore, oxidation in one aspect of the present invention In a transistor with three semiconductor layers 130, the oxide semiconductor layer 130b is an intermediate layer in the three-layer structure. By positioning it as a layer, it has the added benefit of eliminating the influence of impurities from above and below. Therefore, in addition to improving the on-current of the transistor as described above, the threshold voltage stabilization is also important. This allows for optimization and a reduction in the S value (subthreshold value). Therefore, power consumption This can reduce the threshold voltage of the transistor. The long-term reliability of semiconductor devices can be improved. Also, according to one aspect of the present invention, Because the degradation of electrical properties associated with miniaturization is suppressed, it is suitable for highly integrated semiconductor devices. It can be said that it is suitable for the formation of [something].

[0149] In this embodiment, various films such as metal films, semiconductor films, and inorganic insulating films are typically... These can be formed by sputtering or plasma CVD, but other methods, such as heat It may also be formed by the CVD method. An example of the thermal CVD method is MOCVD (Metal Oxide). (Germanic Chemical Vapor Deposition) method and ALD (A Examples include the tomic layer deposition method.

[0150] Thermal CVD is a film deposition method that does not use plasma, so defects are generated by plasma damage. It has the advantage of not being affected.

[0151] Furthermore, in the thermal CVD method, the raw material gas and oxidizer are simultaneously introduced into the chamber, and the contents of the chamber are processed By using atmospheric pressure or reduced pressure, the reaction is carried out near or on the substrate, causing the deposit to be deposited on the substrate. Film deposition may be performed.

[0152] The ALD method involves maintaining atmospheric pressure or reduced pressure inside the chamber, and sequentially supplying the raw material gases for the reaction. The gas may be introduced into a chamber, and the film deposition may be carried out by repeating the sequence of gas introduction. Switching between each switching valve (also called a high-speed valve) allows for the processing of two or more raw materials. The gases are supplied to the chamber in sequence, and the first raw material gas is supplied in order to prevent the mixing of multiple raw material gases. Simultaneously or afterward, an inert gas (such as argon or nitrogen) is introduced, and the second source Introducing a carrier gas. If an inert gas is introduced at the same time, the inert gas will be used as a carrier. It becomes a gas, and an inert gas may also be introduced simultaneously when introducing the second raw material gas. Instead of introducing an inert gas, the first raw material gas is discharged by vacuum evacuation, and then the second The raw material gas may be introduced. The first raw material gas is adsorbed onto the surface of the substrate to form the first layer. Then, it reacts with a second raw material gas that is introduced later, and the second layer is laminated on top of the first layer to form a thin film. This process is repeated multiple times while controlling the gas introduction sequence until the desired thickness is achieved. This allows for the formation of a thin film with excellent step coverage. The thickness of the thin film is determined by repeating the gas introduction sequence. Because it can be adjusted by the number of repetitions, precise film thickness adjustment is possible, and fine F It is suitable for creating extracorporeal membranes (ETs).

[0153] Thermal CVD methods such as MOCVD and ALD are disclosed in the embodiments described above. It can form various films such as metal films, semiconductor films, and inorganic insulating films, for example, In-Ga -When forming a Zn-O film, trimethylindium, trimethylgallium, and Dimethylzinc can be used. The chemical formula for trimethylindium is In(C It is H3)3. Also, the chemical formula for trimethylgallium is Ga(CH3)3. The chemical formula for dimethylzinc is Zn(CH3)2. Furthermore, it is not limited to these combinations. Instead, trimethylgallium was replaced with triethylgallium (chemical formula Ga(C2H5)3). Diethylzinc (chemical formula Zn(C2H5)2) can also be used instead of dimethylzinc. You can also use this.

[0154] For example, when forming a hafnium oxide film using a film deposition apparatus that utilizes ALD, the solvent and Liquids containing hafnium precursor compounds (such as hafnium alkoxide solution or tetraximethic A raw material gas obtained by vaporizing hafnium amides such as luamidohafnium (TDMAH), Two types of ozone (O3) gases are used as oxidizing agents. Note that tetrakisdimethylamide is also used. The chemical formula for hafnium is Hf[N(CH3)2]4. Other material liquids include... Examples include trachos(ethylmethylamide)hafnium.

[0155] For example, when forming an aluminum oxide film using a film deposition apparatus that utilizes ALD, the solvent And vaporize a liquid containing an aluminum precursor compound (such as trimethylaluminum TMA). Two types of gases are used: the raw material gas and H2O as the oxidizing agent. The chemical formula for nium is Al(CH3)3. Other material liquids include Tris(dimethyl) Aluminum (Aluminum), Triisobutylaluminum, Aluminum Tris(2,2, Examples include 6,6-tetramethyl-3,5-heptanedione.

[0156] For example, when forming a silicon oxide film using a film deposition apparatus that utilizes ALD, hexa Rolodisilane is adsorbed onto the film-forming surface, and chlorine contained in the adsorbed material is removed, causing an oxidizing gas (O2) A radical (nitrous oxide) is supplied and reacted with the adsorbed material.

[0157] For example, when depositing a tungsten film using a film deposition apparatus that utilizes ALD, WF6 gas The initial tungsten film is formed by sequentially introducing S and B2H6 gas, and then WF6 A tungsten film is formed by sequentially introducing gas and H2 gas. Note that B2H6 gas is also used. SiH4 gas may be used instead.

[0158] For example, oxide semiconductor films, such as In-Ga-Zn-O, can be deposited using an ALD (Advanced Laser Deposition) system. When forming a film, In(CH3)3 gas and O3 gas are introduced sequentially and repeatedly. An O layer is formed, and then Ga(CH3)3 gas and O3 gas are repeatedly introduced in sequence to form GaO A layer is formed, and then Zn(CH3)2 gas and O3 gas are repeatedly introduced sequentially to form ZnO Layers are formed. Note that the order of these layers is not limited to this example. Also, these gases are mixed. This forms mixed compound layers such as In-Ga-O layers, In-Zn-O layers, and Ga-Zn-O layers. It is also acceptable to use an inert gas such as Ar instead of O3 gas to bubble water. While H2O gas can be used, it is preferable to use O3 gas, which does not contain H. In(C2H5)3 gas may be used instead of (CH3)3 gas. Also, Ga(CH 3) Ga(C2H5)3 gas may be used instead of 3 gas. Also, Zn(CH3)2 You may use gas.

[0159] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments. can.

[0160] (Embodiment 5) In this embodiment, the AI ​​(Artificial Intelligence) system Figures 10, 11, and 12 illustrate an example of combining this with the TOF camera shown in Figure 1. I will explain.

[0161] Figure 10A shows an example of the flow for building a learning model in the distance estimation device, specifically in the estimation unit. They are doing it.

[0162] First, to obtain training data, distance image data is acquired using a TOF camera. (S Step 1: S1)

[0163] Then, distance image data with a high number of cumulative steps and distance image data with a low number of cumulative steps are collected. (Step P2:S2)

[0164] Then, the learning model is estimated by training it with distance image data that has been accumulated many times as training data. Build it in the department. (Step 3: S3)

[0165] Assuming that the learning model, which has been trained using the flow shown in Figure 10A, has been built into the estimation unit beforehand, Obtain the desired distance image data according to the flow shown in Figure 10B.

[0166] First, acquire distance image data with a small number of integration steps using a TOF camera. (Step 4) :S4)

[0167] Then, estimates are obtained using a pre-built learning model. (Step 5: S5) Specifically, the distance level (measurement interval and) for each pixel of each pixel in the input image data. It generates probabilities for each (possibly called) range. For example, the probability of being between 1m and 45m is 20%, and the probability of being between 45m and 45m is 20%. There are multiple distances, such as a 70% probability of it being less than 90m, and a 10% probability of it being between 90m and 135m. A probability map can be created for each level.

[0168] Finally, based on the learning results, the distance image data with the fewest integrations is processed. (Step 6: S6) As an output result, the one with the highest probability is selected, and ultimately the distance image with the most integrations is selected. It is possible to obtain distance image data equivalent to or better than the data.

[0169] Figure 11 is a block diagram showing the data processing procedure in Step 6.

[0170] Conventional TOF cameras repeatedly take measurements and accumulate them to improve resolution. In some cases, an average processing method is used. That is, noise is reduced by increasing the number of integration steps and averaging the results. In this embodiment, the light generated from the light-receiving area of ​​the solid-state image sensor of the TOF camera is The data used is the amount of charge accumulated over each light-receiving period based on the carrier. This is called distance image data with a small number of operations (input data). The result is obtained in the image generation unit.

[0171] Furthermore, preprocessing is performed on distance image data with a small number of integrations to facilitate estimation by the estimation unit. You may go.

[0172] As shown in Figure 11, this input data is stored in the input unit 100, and the image is processed in the estimation unit 102. This process is performed, and the learning model that yields the highest accuracy in the output unit 103 is used. Furthermore, It is preferable to use a learning model that minimizes noise.

[0173] In this embodiment, U-net is used as the learning model, and discrimination is performed based on the learned content. This is done. In this case, the estimation unit 102 has a U-shaped shortcut structure similar to U-net. It has a nested structure. The estimation unit 102 consists of a convolutional layer, a pooling layer, and an activation layer. This process creates a feature map while reducing the number of elements. Then, the input data 110 is used. After downsampling multiple times, the depth map is obtained by upsampling multiple times. ru.

[0174] Figure 12 is a schematic diagram of the U-Net network architecture. In Figure 12, there are five stages. The learning process shown is just one example; it is not limited to this process and can be performed in two, three, or four stages as needed. You may perform a learning process with six or more stages.

[0175] Features (or regions of interest) are extracted from the input data 110, and so-called convolution is performed, and multiple Depth map 111 can be obtained.

[0176] From the features (or region of interest) of the input data 110 or depth map 111, the measurement space It is also possible to estimate the object. From the features extracted using the learning model, the measurement space The shape of the object is estimated, and if the probability of what the object is is high, the shape of the object is estimated, distance It is possible to predict the relative value of the distance. This can also improve the accuracy of the distance image.

[0177] Furthermore, it is also possible to use a TOF camera with a lower resolution than the TOF camera used for learning. Even with a low-resolution TOF camera, the training data used in the learning model is high-precision. If obtained by a TOF camera, the output result is obtained using a high-precision TOF camera. The results can be approximated. Furthermore, image processing to remove noise from the training data is learned. By performing this operation on the data, better output results can be obtained.

[0178] Specifically, a high-precision TOF camera is not only characterized by a high number of pixels, but also by the amount of light received per pixel. This also refers to cases where the area is large. Therefore, TOF cameras have a small light-receiving area per pixel. However, using this embodiment, it is possible to achieve the same results as with a TOF camera with a large light-receiving area per pixel. A highly accurate depth map 112, which is equivalent to or better than the output result, can be obtained.

[0179] Furthermore, this embodiment is useful not only for still images but also for videos. The number of integration cycles is small. Because high-quality data can be used as input data, data acquisition at high frame rates is possible. It is possible and suitable for video.

[0180] (Embodiment 6) Electronic device equipped with a distance estimation device or imaging device according to one aspect of the present invention An example of a vessel will be explained using Figure 13.

[0181] Electronic distance estimation device or imaging device according to one aspect of the present invention The devices include televisions, monitors and other display devices, lighting equipment, and desktop or notebook computers. Personal computer, word processor, DVD (Digital Versati) An image playback device that plays back still images or videos stored on a recording medium such as a disc. Portable CD player, radio, tape recorder, headphone stereo, stereo, Clocks, wall clocks, cordless phone handsets, transceivers, mobile phones, car phones, mobile phones Large game consoles such as 3D game machines, tablet devices, pachinko machines and other large game machines, calculators, portable information devices Terminals (also called "personal digital assistants"), electronic organizers, e-book readers, electronic translators, voice input devices. High-frequency heating in equipment such as video cameras, digital still cameras, electric shavers, and microwave ovens. Devices, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air conditioners Air conditioning equipment such as air conditioners, humidifiers, and dehumidifiers, dishwashers, dish dryers, clothes dryers, and fabrics. Danry dryer, electric refrigerator, electric freezer, electric refrigerator-freezer, DNA storage freezer, flashlight, Examples include tools such as chainsaws, smoke detectors, and medical equipment such as dialysis machines. Emergency lights, traffic lights, conveyor belts, elevators, escalators, industrial robots, power Examples include storage systems, energy storage devices for power leveling and smart grids, and other industrial equipment. It is possible.

[0182] Furthermore, mobile devices propelled by electric motors using electricity from energy storage devices also fall under the category of electronic equipment. It shall be included in the category. As the above-mentioned mobile devices, for example, electric vehicles (EVs), internal combustion engines and Hybrid vehicles (HV) and plug-in hybrid vehicles (PHV) that also have electric motors, Tracked vehicles that replace their tires and wheels with tracks, and motorized bicycles including electric assist bicycles. Cars, motorcycles, electric wheelchairs, golf carts, small or large vessels, submarines, helicopters Examples include aircraft, rockets, satellites, space probes and planetary probes, and spacecraft.

[0183] Electronic devices include sensors (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid). Magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power, radiation, flow rate, Even if it has features such as measuring humidity, gradient, vibration, odor, or infrared radiation good.

[0184] Figures 13A to 13F show examples of electronic devices.

[0185] Figure 13A shows an example of a wristwatch-type personal information terminal. The personal information terminal 6100 has a housing 6 It includes 101, a display unit 6102, a band 6103, and operation buttons 6105. The information terminal 6100 contains a secondary battery and an imaging device or electric power supply according to one aspect of the present invention. It includes sub-components. For example, a distance tracking device according to one aspect of the present invention may be included in a part of a wristwatch-type portable information terminal. A fixed device or an imaging device according to one aspect of the present invention can be installed to incorporate a TOF camera. Cut.

[0186] Figure 13B shows an example of a mobile phone. The mobile information terminal 6200 has a housing 6201 In addition to the integrated display unit 6202, there are also operation buttons 6203, a speaker 6204, and a micro It is equipped with a phone 6205, among other things.

[0187] Furthermore, the mobile information terminal 6200 has a fingerprint sensor 6209 in an area that overlaps with the display unit 6202. Prepare for this. The fingerprint sensor 6209 may also be an organic light sensor. Fingerprints differ from person to person. Therefore, the fingerprint sensor 6209 can acquire a fingerprint pattern and perform personal authentication. As a light source for acquiring a fingerprint pattern with the pattern sensor 6209, the light emitted from the display unit 6202 Light can be used.

[0188] Furthermore, the portable information terminal 6200 contains a secondary battery and an imaging device according to one aspect of the present invention. It is equipped with or electronic components. For example, a part of a portable information terminal 6200 is related to one aspect of the present invention. An imaging device can be installed and a TOF camera can be built in. It is possible to obtain information corresponding to a person's appearance (including facial features) and perform personal authentication. .

[0189] Figure 13C shows an example of a cleaning robot. The cleaning robot 6300 has a housing 630 1 Display unit 6302 located on the top surface, multiple cameras 6303 located on the side, brush 6 It has 304, operation buttons 6305, various sensors, etc. Although not shown, a cleaning robot The 6300 is equipped with wheels, a suction port, etc. The 6300 cleaning robot is self It moves, detects dust 6310, and sucks up the dust from the suction port located on the bottom. Cut.

[0190] For example, the cleaning robot 6300 analyzes images captured by the camera 6303 to identify walls, furniture, etc. Alternatively, it can determine the presence or absence of obstacles such as steps. Furthermore, image analysis can determine wiring... If an object that may become entangled in brush 6304 is detected, the rotation of brush 6304 will be stopped. This is possible. Camera 6303 may use multiple types of imaging devices, and one of the present inventions A distance estimation device according to one aspect of the present invention or an imaging device according to one aspect of the present invention is provided as one of the cameras 6303. By using this, distance information can be obtained from the captured information, preventing malfunctions of the cleaning robot 6300. It can be reduced.

[0191] Figure 13D shows an example of a robot. The robot 6400 shown in Figure 13D is a computation robot. Device 6409, illuminance sensor 6401, microphone 6402, upper camera 6403, S Peeker 6404, display unit 6405, lower camera 6406, obstacle sensor 6407, and It is equipped with a moving mechanism 6408.

[0192] Microphone 6402 has the function of detecting the user's voice and ambient sounds, etc. Furthermore, speaker 6404 has the function of emitting sound. Robot 6400 is microf To communicate with the user using the phone 6402 and speaker 6404. This is possible.

[0193] The display unit 6405 has the function of displaying various information. The robot 6400 is used It is possible to display the information desired by the user on the display unit 6405. The display unit 6405 is a touch It may also be equipped with a control panel. Furthermore, the display unit 6405 is a removable information terminal. It's also fine to install it in a fixed position on the robot 6400 for charging and data transfer. This makes it possible.

[0194] The upper camera 6403 and the lower camera 6406 image the area around the robot 6400. It has the function. The upper camera 6403 and lower camera 6406 are of multiple types. An imaging device may be used, and a distance estimation device according to one aspect of the present invention or according to one aspect of the present invention may be used. By using the imaging device as one of the upper camera 6403 and the lower camera 6406, imaging By obtaining distance information from the collected data, malfunctions during the movement of the robot 6400 can be reduced. Furthermore, the obstacle sensor 6407 is used when the robot 6400 moves forward using the movement mechanism 6408. It can detect the presence or absence of obstacles in the direction of travel. The robot 6400 is located at the top Using camera 6403, lower camera 6406 and obstacle sensor 6407, the surrounding environment It is possible to recognize this and move safely.

[0195] Figure 13E shows an example of an aircraft. The aircraft 6500 shown in Figure 13E has a propeller. It has components such as the 6501, camera 6502, and battery 6503, and is capable of autonomous flight. It holds.

[0196] For example, image data captured by camera 6502 is stored in electronic component 6504. Sub-component 6504 analyzes image data to detect the presence or absence of obstacles during movement. This is possible. Multiple types of imaging devices may be used as the camera 6502, and the present invention By using the imaging device according to one embodiment as one of the cameras 6502, distance can be obtained from the captured information. By acquiring information, malfunctions during the movement of the aircraft 6500 can be reduced.

[0197] Figure 13F shows an example of an automobile. Automobile 7160 has an engine, tires, and brakes. It has a key, steering system, multiple cameras, etc. Multiple cameras to be installed on automobile 7160 By using one or more of these imaging devices according to one aspect of the present invention, the captured information Distance information between the vehicle and an external object is obtained, and the direction of travel of the vehicle 7160 or automatic The positional relationship between the vehicle 7160 and objects surrounding it can be recognized. This relates to one aspect of the present invention. By using a distance estimation device or an imaging device according to one aspect of the present invention in the automobile 7160, It can assist the autopilot function of the 7160 vehicle.

[0198] The configurations, structures, and methods shown in this embodiment are similar to those shown in other embodiments. It can be used in appropriate combinations with the above. [Explanation of symbols]

[0199] 11: Irradiation unit, 12: Sensor unit, 13: Signal generation unit, 14: Correlation and Evaluation unit, 21: transistor, 22: transistor, 23: transistor, 24: Transistor, 25: Transistor, 31: Transistor, 32: Transistor, 33: Transistor, 41: Capacitor, 42: Capacitor, 43: Capacitor, 44: Transistor, 45: Dotted line Arrow, 46: dotted arrow, 60: p-type region, 61: p- region, 62: n-type surface embedded region, 6 3:p+ region, 64:charge storage region, 65:charge discharge region, 66:p well region, 70: Insulating layer, 71: Transfer gate pair, 72: Transfer gate pair, 73: Transfer gate pair, 74: Transfer gate 75: Insulating layer, 76: Connecting electrode, 90: Light receiving area, 91: Light shielding plate, 100: Input Section, 101: Transistor, 102: Estimation section, 103: Output section, 110: Input data, 1 11: Depth map, 112: High-precision depth map, 115: Substrate, 120: Insulating layer , 130: oxide semiconductor layer, 130a: oxide semiconductor layer, 130b: oxide semiconductor layer, 1 30c: Oxide semiconductor layer, 140: Conductive layer, 150: Conductive layer, 160: Insulating layer, 170: Conductive layer, 171: Conductive layer, 172: Conductive layer, 175: Insulating layer, 180: Insulating layer, 231: Area, 232: Area, 233: Area, 6100: Mobile information terminal, 6101: Enclosure, 610 2: Display unit, 6103: Band, 6105: Operation buttons, 6200: Portable information terminal, 62 01: Enclosure, 6202: Display unit, 6203: Operation buttons, 6204: Speaker, 6205 : Microphone, 6209: Fingerprint sensor, 6300: Cleaning robot, 6301: Enclosure, 6302: Display unit, 6303: Camera, 6304: Brush, 6305: Operation buttons, 63 10: Garbage, 6400: Robot, 6401: Illuminance sensor, 6402: Microphone, 6403: Upper camera, 6404: Speaker, 6405: Display unit, 6406: Lower camera 6407: Obstacle sensor, 6408: Movement mechanism, 6409: Processing unit, 6500: Flight Body, 6501: Propeller, 6502: Camera, 6503: Battery, 6504: Electronic components , 7160: Automobile

Claims

[Claim 1] An imaging device having a light-receiving region, a plurality of charge storage regions around the light-receiving region, a transistor made of an oxide semiconductor that overlaps at least a portion of the charge storage regions above the charge storage regions, and a light-shielding plate that overlaps the plurality of charge storage regions and the transistor.

Images