Voltage-current conversion circuit and imaging device

Abstract

The time constant of the low-pass filter in the voltage-to-current conversion circuit is increased while suppressing the increase in capacitance. [Solution] The voltage-to-current conversion circuit comprises a supersource follower circuit provided with an input transistor to which an input voltage is input, a resistive element connected in series with the source of the input transistor, and a capacitive element connected with the drain of the input transistor. The supersource follower circuit may also comprise a current source transistor connected in series with the input transistor, and a feedback transistor whose gate is connected to the drain of the input transistor and whose drain is connected to the source of the input transistor.

Description

Technical Field

[0001] The present technology relates to a voltage-current conversion circuit and an imaging device. Specifically, the present technology relates to a voltage-current conversion circuit provided with a super source follower and an imaging device.

Background Art

[0002] A super source follower may be provided in an amplifier circuit. In a super source follower, the output impedance can be reduced more than that of a source follower. For example, in order to reduce the output impedance of a lamp buffer, a solid-state imaging device in which the lamp buffer is constituted by a super source follower circuit has been disclosed (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, when a low-pass filter is configured in a voltage-current conversion circuit provided with a super source follower, in order to increase the time constant of the low-pass filter, it is necessary to increase the capacitance, which may lead to an increase in the capacitance area.

[0005] The present technology has been created in view of such a situation, and an object thereof is to increase the time constant of the low-pass filter of the voltage-current conversion circuit while suppressing an increase in capacitance.

Means for Solving the Problems

[0006] This technology was developed to solve the aforementioned problems, and its first aspect is a voltage-to-current conversion circuit comprising a supersource follower circuit to which an input voltage is input, a resistive element connected in series with the source of the input transistor, and a capacitive element connected with the drain of the input transistor. This results in an increase in the time constant of the low-pass filter of the voltage-to-current conversion circuit while suppressing an increase in capacitance. In this case, by connecting the resistive element in series with the source of the input transistor, the output resistance of M1 can be effectively increased based on the transconductance gm of the input transistor.

[0007] Furthermore, in the first aspect, the supersource follower circuit may include a current source transistor connected in series with the input transistor, and a feedback transistor whose gate is connected to the drain of the input transistor and whose drain is connected to the source of the input transistor. This results in the configuration of a supersource follower circuit with a low-pass filter.

[0008] Furthermore, in the first aspect, the circuit may further include an output transistor whose gate is connected to the drain of the input transistor and from which current is output. This results in the configuration of a voltage-to-current conversion circuit using a supersource follower circuit.

[0009] Furthermore, in the first aspect, the output transistor and the feedback transistor may constitute a current mirror. This results in the current flowing through the feedback transistor fluctuating based on fluctuations in the input voltage input to the input transistor, and the fluctuations in the current flowing through the feedback transistor are reflected in the fluctuations in the current flowing through the output transistor, making it possible to extract a current output and thus forming a voltage-to-current conversion circuit.

[0010] Furthermore, in the first aspect, the input transistor may be an N-channel field-effect transistor, and the current source transistor, the feedback transistor, and the output transistor may be P-channel field-effect transistors. This results in the configuration of a super-source follower circuit using field-effect transistors.

[0011] Furthermore, in the first aspect, the resistance value of the resistive element may be between 100Ω and 50kΩ. This suppresses variations in the capacitance and resistance values ​​added to the supersource follower circuit, while increasing the time constant of the low-pass filter in the voltage-current conversion circuit.

[0012] Furthermore, in the first aspect, the resistive element may be constructed using polycrystalline silicon. This results in the ability to set the resistance value of the resistive element while suppressing the influence of parasitic resistance in the wiring.

[0013] Furthermore, in the first aspect, a low-pass filter may be configured using the output resistor of the input transistor, the resistive element, and the capacitive element. This results in the effect that the time constant of the low-pass filter is increased based on the resistance value of the resistive element.

[0014] Furthermore, the second aspect is an imaging device comprising: a pixel array section in which pixels are arranged in a matrix in the row and column directions; an ADC (Analog to Digital Converter) section that performs AD conversion of the pixel signals read from the pixels column by column; and a power supply noise detection section that detects power supply noise from the power supply that powers the pixels and outputs a cancellation signal to the front of the ADC section to cancel the power supply noise superimposed on the pixel signals. The power supply noise detection section includes a voltage-to-current conversion circuit configured as a low-pass filter, and the voltage-to-current conversion circuit comprises a super-source follower circuit provided with an input transistor to which an input voltage is input, a resistive element connected in series with the source of the input transistor, and a capacitive element connected with the drain of the input transistor. This results in the reduction of power supply noise superimposed on the pixel signals while suppressing an increase in the capacitance provided in the imaging device. [Brief explanation of the drawing]

[0015] [Figure 1] This figure shows an example configuration of a voltage-to-current conversion circuit according to the first embodiment. [Figure 2] This is a block diagram showing an example configuration of an imaging device according to the second embodiment. [Figure 3] This is a block diagram showing an example configuration of a solid-state imaging device according to the second embodiment. [Figure 4] This figure shows an example of the pixel configuration according to the second embodiment. [Figure 5] This is a block diagram showing an example of the configuration of the column ADC section according to the second embodiment. [Figure 6] This is a perspective view showing an example of stacking of solid-state imaging devices according to the third embodiment. [Figure 7] This is a block diagram illustrating a schematic configuration example of a vehicle control system. [Figure 8] This is an explanatory diagram showing an example of the installation location of the imaging unit. [Modes for carrying out the invention]

[0016] Hereinafter, embodiments for implementing the present technology (hereinafter referred to as embodiments) will be described. The description will be carried out in the following order. 1. First Embodiment (Example in which a resistance element is connected in series to the source of an input transistor of a super source follower circuit used in a voltage-current conversion circuit) 2. Second Embodiment (Example in which a voltage-current conversion circuit provided with a low-pass filter in a super source follower circuit is applied to a power supply noise detection unit of an imaging device) 3. Third Embodiment (Example in which pixel array units are stacked) 4. Application Example to a Moving Body

[0017] <1. First Embodiment> FIG. 1 is a diagram showing a configuration example of a voltage-current conversion circuit according to the first embodiment.

[0018] In the figure, the voltage-current conversion circuit includes an input transistor M1, a current source transistor M2, a feedback transistor M3, and an output transistor M4. The input transistor M1, the current source transistor M2, and the feedback transistor M3 can constitute a super source follower circuit.

[0019] The input transistor M1 drives the feedback transistor M3 based on the input voltage VI. The current source transistor M2 supplies current to the input transistor M1. The feedback transistor M3 feeds back to the connection point of the resistance elements R1 and R2 based on the drain potential of the input transistor M1. The output transistor M4 outputs an output current IO based on the current mirror operation of the feedback transistor M3.

[0020] The input transistor M1 can use an N-channel field effect transistor. The current source transistor M2, the feedback transistor M3, and the output transistor M4 can use P-channel field effect transistors.

[0021] The drain of input transistor M1 is connected in series with current source transistor M2. The source of input transistor M1 is connected in series with resistor R1. Resistor R1 is connected in series with resistor R2. Here, by connecting resistor R1 in series with the source of input transistor M1, the resistance of the drain node of input transistor M1 can be effectively increased based on the transconductance gm of input transistor M1.

[0022] The source of the current source transistor M2 is connected to the power supply voltage VDD. The gate of the current source transistor M2 can be set to a fixed potential. In this state, the current source transistor M2 can operate as a current source.

[0023] The source of feedback transistor M3 is connected to the power supply voltage VDD. The drain of feedback transistor M3 is connected to the connection point of resistors R1 and R2. The gate of feedback transistor M3 is connected to the drain of input transistor M1. A capacitive element C is connected between the gate of feedback transistor M3 and the power supply voltage VDD. In this case, a low-pass filter can be constructed using the output resistor of input transistor M1, resistor R1, and capacitive element C.

[0024] The source of output transistor M4 is connected to the power supply voltage VDD. The gate of output transistor M4 is connected to the drain of input transistor M1. In this configuration, feedback transistor M3 and output transistor M4 can form a current mirror. The output current IO is output from the drain of output transistor M4.

[0025] The resistance value of the resistor R1 is preferably between 100Ω and 50kΩ. In this case, the resistor R1 may be constructed using polycrystalline silicon. This allows the voltage-current conversion circuit to be integrated into an IC (Integrated Circuit) while setting the resistance value of the resistor R1 to between 100Ω and 50kΩ. By setting the resistance value of the resistor R1 to 100Ω or more, the increase in the capacitance value of the capacitive element C can be suppressed while increasing the time constant of the low-pass filter composed of the output resistance of the input transistor M1, the resistor R1, and the capacitive element C. On the other hand, by setting the resistance value of the resistor R1 to 50kΩ or less, it is possible to prevent the capacitance value of the capacitive element C from becoming excessively small, and to keep the variation in the capacitance value of the capacitive element C within an acceptable range.

[0026] In this voltage-to-current conversion circuit, the current flowing through the feedback transistor M3 fluctuates based on the fluctuation of the input voltage VI input to the input transistor M1. The fluctuation of the current flowing through the feedback transistor M3 is then reflected in the fluctuation of the current flowing through the output transistor M4, and the input voltage VI is converted into the output current IO.

[0027] In this configuration, a low-pass filter is formed by the output resistor of the input transistor M1, the resistor R1, and the capacitive element C. Therefore, this voltage-to-current conversion circuit can convert the input voltage VI into the output current IO while reducing the high-frequency components contained in the input voltage.

[0028] Thus, in the first embodiment described above, a resistor R1 is connected in series with the source of the input transistor M1 of the super-source follower circuit used in the voltage-to-current conversion circuit. This makes it possible to increase the time constant of the low-pass filter, which is composed of the output resistance of the input transistor M1, the resistor R1, and the capacitor C, while suppressing an increase in the capacitance value of the capacitor C. Therefore, it is possible to lower the cutoff frequency of the low-pass filter provided in the super-source follower circuit while suppressing an increase in the size of the voltage-to-current conversion circuit.

[0029] <2. Second Embodiment> In the first embodiment described above, a resistor R1 was connected in series with the source of the input transistor M1 of the supersource follower circuit used in the voltage-to-current conversion circuit. In this second embodiment, a voltage-to-current conversion circuit in which a low-pass filter is provided in the supersource follower circuit is applied to the power supply noise detection unit of the imaging device.

[0030] Figure 2 is a block diagram showing an example configuration of an imaging device according to the second embodiment.

[0031] In the figure, the imaging device 100 comprises an optical system 101, a solid-state imager 102, an imaging control unit 103, an image processing unit 104, a storage unit 105, a display unit 106, and an operation unit 107. The imaging control unit 103, image processing unit 104, storage unit 105, display unit 106, and operation unit 107 are connected to each other via a bus 108. The imaging device 100 may be used as a standalone unit, incorporated into a mobile terminal such as a smartphone, incorporated into an authentication device or monitoring device, or mounted on a vehicle or drone.

[0032] The optical system 101 directs light from the subject into the solid-state imager 102, forming an image of the subject on the light-receiving surface of the solid-state imager 102. The optical system 101 may include, for example, a focus lens, a zoom lens, an optical filter, and an aperture. The optical system 101 may also include multiple lenses, such as a wide-angle lens, a standard lens, and a telephoto lens.

[0033] The solid-state imaging device 102 converts light from the subject into an electrical signal for each pixel, and outputs that electrical signal digitized. The solid-state imaging device 102 may be, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor, a CCD (Charge Coupled Device), or an EVS (Event-base Vision Sensor). The light received by the solid-state imaging device 102 may be visible light, near-infrared light (NIR), short-wavelength infrared light (SWIR), ultraviolet light, or X-rays.

[0034] The solid-state imaging device 102 is provided with a power supply noise detection unit 109. The power supply noise detection unit 109 can be equipped with the voltage-to-current conversion circuit of the first embodiment described above. The power supply noise detection unit 109 detects power supply noise from the power supply supplied to the pixels and outputs a cancellation signal that cancels the power supply noise superimposed on the pixel signal read from the pixels. At this time, the power supply noise detection unit 109 inputs the cancellation signal to the ADC unit that performs AD conversion of the pixel signal. The ADC unit can then perform AD conversion based on the pixel signal from which the power supply noise has been canceled.

[0035] The imaging control unit 103 controls imaging by the solid-state imaging device 102 based on commands from the operation unit 107. At this time, the imaging control unit 103 can control the exposure time, exposure amount, and imaging timing of the solid-state imaging device 102.

[0036] The image processing unit 104 performs image processing based on the output from the solid-state imaging device 102. Image processing includes, for example, gamma correction, white balance processing, sharpness processing, and gradation conversion processing. The image processing unit 104 may also include a processor that performs processing based on software.

[0037] The storage unit 105 stores images captured by the solid-state imaging device 102, as well as imaging parameters of the solid-state imaging device 102. The storage unit 105 can also store programs that operate the imaging device 100 based on software. The storage unit 105 may include ROM (Read Only Memory), RAM (Random Access Memory), and a memory card.

[0038] The display unit 106 displays captured images and various information to support the imaging operation. The display unit 106 may be a liquid crystal display or an organic EL (Electro-Luminescence) display.

[0039] The operation unit 107 provides a user interface for operating the imaging device 100. The operation unit 107 may include, for example, buttons, dials, and switches provided on the imaging device 100. The operation unit 107 may be configured as a touch panel together with the display unit 106.

[0040] Furthermore, depending on the application, the imaging device 100 may omit some of the above-described components, or additional blocks may be added that do not correspond to the above-described components.

[0041] Figure 3 is a block diagram showing an example configuration of a solid-state imaging device according to the second embodiment.

[0042] In the figure, the solid-state imaging device 102 includes a pixel array unit 111, a vertical scanning circuit 112, a column readout circuit 113, a column signal processing unit 114, a horizontal scanning circuit 115, and a control circuit 116. The solid-state imaging device 102 also includes a power supply noise detection unit 109.

[0043] The pixel array section 111 comprises multiple pixels PX. The pixels PX are arranged in a matrix along the row direction (also called the horizontal direction) and the column direction (also called the vertical direction). A power supply voltage VDD is supplied to each pixel PX. Each pixel PX can form a source follower with the column readout circuit 113 when reading a signal. Each pixel PX is connected to a horizontal drive line HSL for each row and to a vertical signal line VSL for each column. The horizontal drive line HSL drives each pixel PX row by row when reading a signal from each pixel PX. The vertical signal line VSL transmits the signal read from the pixel PX to the column signal processing unit 114 for each column. Each pixel PX may be a single pixel, or it may be a shared array of 4 pixels or 8 pixels. Furthermore, the pixels PX may form a Bayer array or a quad Bayer array.

[0044] The vertical scanning circuit 112 scans the pixels PX to be read out in the column direction. The vertical scanning circuit 112 may include a vertical register. Here, the vertical scanning circuit 112 can drive each pixel PX row by row via the horizontal drive line HSL when reading a signal from each pixel PX.

[0045] The column readout circuit 113 can configure a source follower with each pixel PX when reading a signal from each pixel PX. At this time, the column readout circuit 113 can change the potential of the vertical signal line VSL based on the charge held in the pixel PX.

[0046] The column signal processing unit 114 processes the signals transmitted from each pixel PX in the column direction. For example, the column signal processing unit 114 can perform correlated double sampling (CDS) processing based on the signals transmitted from each pixel PX in the column direction. Furthermore, the column signal processing unit 114 can perform analog-to-digital (AD) conversion processing based on the signals transmitted from each pixel PX in the column direction and output an imaging signal Gout.

[0047] The column signal processing unit 114 includes a column ADC unit 114A. The column ADC unit 114A can perform AD conversion processing in parallel for each column. In this case, the column ADC unit 114A can perform AD conversion for each column based on the comparison result between the pixel signal read from the pixel PX and the reference signal.

[0048] The horizontal scanning circuit 115 scans the pixels PX to be read out in the row direction. The horizontal scanning circuit 115 may also include a horizontal register.

[0049] The control circuit 116 controls the vertical scanning circuit 112, the column reading circuit 113, the column signal processing unit 114, the horizontal scanning circuit 115, and the power supply noise detection unit 109. For example, the control circuit 116 can control the scanning timing in the column direction, the scanning timing in the row direction, the operation timing of the column reading circuit 113, and the processing timing of the column signal processing unit 114. In this case, the control circuit 116 can coordinate the vertical scanning circuit 112, the column reading circuit 113, the column signal processing unit 114, and the horizontal scanning circuit 115 so that the accumulation operation, shutter operation, and read operation are performed for each row in each frame.

[0050] The power supply noise detection unit 109 detects power supply noise from the power supply voltage VDD applied to the pixel PX and outputs a cancellation signal that cancels the power supply noise superimposed on the pixel signal read from the pixel PX. At this time, the power supply noise detection unit 109 inputs the cancellation signal to the front of the column ADC unit 114A. The column ADC unit 114A can then perform AD conversion based on the pixel signal from which the power supply noise has been canceled. Here, the power supply noise detection unit 109 is equipped with the voltage-current conversion circuit of the first embodiment described above, so that it can generate a cancellation signal while attenuating the power supply noise input to the power supply noise detection unit 109 with the low-pass filter of the voltage-current conversion circuit.

[0051] Figure 4 is a block diagram showing an example of a pixel circuit configuration provided in a solid-state imaging device according to the second embodiment.

[0052] In the figure, pixel PX comprises a photodiode 121, a transfer transistor 122, a reset transistor 123, an amplification transistor 124, a selection transistor 125, and a floating diffusion FD. N-channel MOS (Metal Oxide Semiconductor) transistors can be used as the transfer transistor 122, the reset transistor 123, the amplification transistor 124, and the selection transistor 125.

[0053] The amplification transistor 124 and the selection transistor 125 are connected in series. The cathode of the photodiode 121 is connected to the floating diffusion FD via the transfer transistor 122. The floating diffusion FD is connected to the power supply VDD via the reset transistor 123. The power supply VDD is connected to the vertical signal line VSL via the series circuit of the amplification transistor 124 and the selection transistor 125. The gate of the amplification transistor 124 is connected to the floating diffusion FD.

[0054] A transfer signal TGL is applied to the gate of transfer transistor 122. A reset signal RST is applied to the gate of reset transistor 123. A selection signal SEL is applied to the gate of selection transistor 125. The transfer signal TGL, reset signal RST, and selection signal SEL can be transmitted to each pixel PX via the horizontal drive line HSL.

[0055] When the transfer transistor 122 is turned on, the charge accumulated in the photodiode 121 is transferred to the floating diffusion FD. Then, when the selection transistor 125 is turned on, the source potential of the amplification transistor 124 changes according to the potential of the floating diffusion FD. The source potential of the amplification transistor 124 is then applied to the vertical signal line VSL via the selection transistor 125 and transmitted through the vertical signal line VSL. Furthermore, when the reset transistor 123 is turned on, the charge accumulated in the floating diffusion FD is discharged.

[0056] Figure 5 is a block diagram showing an example configuration of the signal readout unit according to the second embodiment. Although this figure shows an example configuration with two columns, the same configuration can be applied to cases with more than two columns.

[0057] In the figure, pixels PX1 and PX2 are connected to vertical signal lines VSL1 and VSL2, respectively. At this time, the amplification transistors 124 of each pixel PX1 and PX2 are connected to vertical signal lines VSL1 and VSL2, respectively, via selection transistors 125.

[0058] The column readout circuit 113 includes current sources GA1 and GA2. Each column is provided with a current source GA1 and GA2. Each current source GA1 and GA2 is connected to the vertical signal lines VSL1 and VSL2, respectively. During signal readout, each current source GA1 and GA2 can form a source follower with each pixel PX1 and PX2 via the vertical signal lines VSL1 and VSL2, respectively. Each current source GA1 and GA2 may be a MOS transistor.

[0059] The power supply noise detection unit 109 comprises power supply noise detection units 109A and 109B and combining units SE0 to SE2. Each power supply noise detection unit 109A and 109B detects power supply noise DZ from the power supply voltage VDD applied to the pixel PX and outputs cancellation signals LZ and HZ used to cancel power supply noise GZ superimposed on the pixel signal read from the pixel PX. Each power supply noise detection unit 109A and 109B may be equipped with a voltage-to-current conversion circuit. The voltage-to-current conversion circuit of power supply noise detection unit 109A may be provided with a low-pass filter (LPF). In this case, the voltage-to-current conversion circuit of power supply noise detection unit 109A may be equipped with the voltage-to-current conversion circuit of the first embodiment described above. The voltage-to-current conversion circuit of power supply noise detection unit 109B may be provided with a high-pass filter (HPF). The combining unit SE0 combines the cancellation signals LZ and HZ output from each power supply noise detection unit 109A and 109B. Each combining unit SE1 and SE2 combines the combined results of the cancellation signals LZ and HZ with the pixel signals on the respective vertical signal lines VSL1 and VSL2, and outputs them to the inverting input terminals of each comparator CM1 and CM2.

[0060] Here, power supply noise DZ is superimposed on the power supply voltage VDD and supplied to each pixel PX1 and PX2. At each pixel PX1 and PX2, power supply noise GZ is superimposed on the pixel signal read from each pixel PX1 and PX2 based on the power supply noise DZ superimposed on the power supply voltage VDD. The pixel signal with power supply noise GZ superimposed is input to each combining unit SE1 and SE2 via the vertical signal lines VSL1 and VSL2, respectively. At each combining unit SE1 and SE2, the result of combining the pixel signal on each vertical signal line VSL1 and VSL2, which has power supply noise GZ superimposed, with the cancellation signals LZ and HZ is combined. At this time, the power supply noise GZ superimposed on the pixel signal read from pixels PX1 and PX2 is canceled and input to each comparator CM1 and CM2.

[0061] Here, the path through which the pixel signal superimposed with power supply noise GZ is input to each combining unit SE1 and SE2 via the vertical signal lines VSL1 and VSL2, respectively, is different from the path through which the combined result of the cancellation signals LZ and HZ generated by the power supply noise detection units 109A and 109B is input to each combining unit SE1 and SE2. As a result, the gain and phase of the transfer characteristics of these paths are different. Therefore, the power supply noise detection unit 109 can simulate the power supply noise GZ by adjusting the distribution of the cancellation signals LZ and HZ so that the power supply noise GZ superimposed on the pixel signal read from pixels PX1 and PX2 is canceled, while reflecting the difference in the gain and phase of the transfer characteristics of these paths.

[0062] Thus, in the second embodiment described above, a voltage-current conversion circuit in which a low-pass filter is provided in the super-source follower circuit is applied to the power supply noise detection unit 109 of the solid-state imaging device 102. This makes it possible to improve the image quality of the solid-state imaging device 102 while suppressing an increase in the size of the solid-state imaging device 102.

[0063] In the second embodiment described above, an example was shown in which a voltage-current conversion circuit, in which a low-pass filter is provided in the super-source follower circuit, is applied to the power supply noise detection unit 109 of the solid-state imaging device 102. In addition to this example of applying the voltage-current conversion circuit to the power supply noise detection unit 109 of the solid-state imaging device 102, it may also be applied to electronic devices such as communication devices, display devices, and data processing devices.

[0064] In addition to the example where a voltage-current conversion circuit with a low-pass filter in the super-source follower circuit is applied to the power supply noise detection unit 109, it may also be applied to the detection of other noises, such as switching noise and common-mode noise in digital circuits.

[0065] <3. Third Embodiment> In the first embodiment described above, a resistor R1 was connected in series with the source of the input transistor M1 of the supersource follower circuit used in the voltage-to-current conversion circuit. In this third embodiment, semiconductor chips, each provided with a pixel array section in which pixels are arranged in a matrix, are stacked.

[0066] Figure 6 is a perspective view showing an example of stacking of imaging devices according to the third embodiment.

[0067] In the figure, the solid-state imaging device comprises semiconductor chips 921 and 922. Semiconductor chip 922 is stacked on semiconductor chip 921.

[0068] A pixel array section 923 is formed on the semiconductor chip 922. Pixels 931 are arranged in a matrix in the row and column directions within the pixel array section 923. Pad electrodes 932 and via electrodes 933 are formed around the periphery of the pixel array section 923. The via electrodes 933 penetrate the semiconductor chip 922, enabling electrical connection between semiconductor chips 921 and 922.

[0069] Peripheral circuits 924 are formed on the semiconductor chip 921. A column readout circuit 925, a column ADC 926, a power supply noise detection unit 927, and an oscillation circuit 928 are formed on the peripheral circuit 924. The column readout circuit 925 and the column ADC 926 may be formed to correspond to positions on both sides of the pixel array unit 923 in the column direction. The power supply noise detection unit 927 can be provided with the power supply noise detection unit 109 of the second embodiment described above.

[0070] The semiconductor chips 921 and 922 may be directly bonded. Hybrid bonding can be used for the direct bonding of semiconductor chips 921 and 922. In this case, semiconductor chips 921 and 922 may be electrically connected based on Cu-Cu connections. The semiconductor substrate material used for semiconductor chips 921 and 922 may be Si, InGaAs, or InP.

[0071] Thus, in the third embodiment described above, the semiconductor chip 922 on which the pixel array 923 is formed is stacked on the semiconductor chip 921 on which the peripheral circuit 924 is formed. This makes it possible to increase the sensitivity of the solid-state imaging device while suppressing an increase in the mounting area of ​​the semiconductor chip on which the solid-state imaging device is formed.

[0072] <4. Examples of applications to mobile devices> The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein may be implemented as a device mounted on any type of mobile vehicle, such as an automobile, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility device, airplane, drone, ship, or robot.

[0073] Figure 7 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0074] The vehicle control system 12000 comprises multiple electronic control units connected via a communication network 12001. In the example shown in Figure 7, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0075] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0076] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0077] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0078] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0079] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0080] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking system based on information from inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0081] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0082] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0083] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example in Figure 7, the output devices are exemplified as an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0084] Figure 8 shows an example of the installation position of the imaging unit 12031.

[0085] In Figure 8, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0086] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0087] Figure 8 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0088] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0089] For example, the microcomputer 12051, based on distance information obtained from imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to vehicle 12100). In particular, it can extract the nearest object on the vehicle 12100's path that is traveling in approximately the same direction as vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, where the vehicle drives autonomously without driver intervention, can be performed.

[0090] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, heavy vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0091] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0092] The above describes an example of a vehicle control system to which the technology described herein can be applied. The technology described herein can be applied to the imaging unit 12031 of the configuration described above. Specifically, for example, the imaging device of the second embodiment described above can be applied to the imaging unit 12031. By applying the technology described herein to the vehicle control system 12000, it is possible to improve image quality while suppressing the increase in size of the imaging unit 12031.

[0093] The embodiments described above are merely examples for realizing the present technology, and there is a corresponding relationship between the matters in the embodiments and the inventive features in the claims. Similarly, there is a corresponding relationship between the inventive features in the claims and the matters in the embodiments of the present technology bearing the same name. However, the present technology is not limited to the embodiments and can be realized by making various modifications to the embodiments without departing from the gist of the technology. Furthermore, the effects described herein are merely examples and are not limiting, and other effects may also exist.

[0094] Furthermore, this technology can also be configured as follows. (1) A supersource follower circuit provided with an input transistor to which an input voltage is input, A resistive element connected in series with the source of the input transistor, A capacitive element connected to the drain of the input transistor and A voltage-to-current conversion circuit equipped with the following features. (2) The supersource follower circuit is, A current source transistor connected in series with the aforementioned input transistor, A feedback transistor is formed in which the gate is connected to the drain of the input transistor and the drain is connected to the source of the input transistor. The voltage-current conversion circuit described in (1) above, comprising the above. (3) An output transistor in which the gate is connected to the drain of the input transistor and current is output from the drain. The voltage-current conversion circuit described in (2) above, further comprising the above. (4) The output transistor and the feedback transistor constitute a current mirror The voltage-to-current conversion circuit described in (3) above. (5) The input transistor is an N-channel field-effect transistor, and the current source transistor, the feedback transistor, and the output transistor are P-channel field-effect transistors. The voltage-current conversion circuit described in (3) or (4) above. (6) The resistance value of the resistive element is 100 Ω or more and 50 kΩ or less. A voltage-to-current conversion circuit as described in any of (1) to (5) above. (7) The resistive element is constructed using polycrystalline silicon. A voltage-to-current conversion circuit as described in any of (1) to (6) above. (8) The output resistor of the input transistor, the resistive element, and the capacitive element constitute a low-pass filter. A voltage-to-current conversion circuit as described in any of (1) to (7) above. (9) A pixel array section in which pixels are arranged in a matrix in the row direction and column direction, An ADC (Analog to Digital Converter) unit that performs AD conversion on each column of the pixel signals read from the aforementioned pixels, The system includes a power supply noise detection unit that detects power supply noise from the power supply supplied to the pixel and outputs a cancellation signal to the front of the ADC unit to cancel the power supply noise superimposed on the pixel signal, The power supply noise detection unit includes a voltage-to-current conversion circuit in which a low-pass filter is configured. The aforementioned voltage-current conversion circuit is A supersource follower circuit is provided with an input transistor to which an input voltage is input, A resistive element connected in series with the source of the input transistor, A capacitive element connected to the drain of the input transistor and An imaging device equipped with the following features. [Explanation of symbols]

[0095] M1 Input Transistor M2 Current Source Transistor M3 Feedback Transistor M4 Output Transistor R1, R2 Resistor elements C Capacitive element

Claims

1. A supersource follower circuit is provided with an input transistor to which an input voltage is input, A resistive element connected in series with the source of the input transistor, A capacitive element connected to the drain of the input transistor and A voltage-to-current conversion circuit equipped with the following features.

2. The supersource follower circuit described above is A current source transistor connected in series with the aforementioned input transistor, A feedback transistor is formed in which the gate is connected to the drain of the input transistor and the drain is connected to the source of the input transistor. The voltage-current conversion circuit according to claim 1, comprising:

3. The gate of the input transistor is connected to the drain, and an output transistor outputs current from the drain. The voltage-current conversion circuit according to claim 2, further comprising:

4. The output transistor and the feedback transistor constitute a current mirror. The voltage-current conversion circuit according to claim 3.

5. The input transistor is an N-channel field-effect transistor, and the current source transistor, the feedback transistor, and the output transistor are all P-channel field-effect transistors. The voltage-current conversion circuit according to claim 3.

6. The resistance value of the aforementioned resistive element is 100 Ω or more and 50 kΩ or less. The voltage-current conversion circuit according to claim 1.

7. The resistive element is constructed using polycrystalline silicon. The voltage-current conversion circuit according to claim 1.

8. The output resistor of the input transistor, the resistive element, and the capacitive element constitute a low-pass filter. The voltage-current conversion circuit according to claim 1.

9. A pixel array section in which pixels are arranged in a matrix in the row direction and column direction, An ADC (Analog to Digital Converter) unit that performs AD conversion on each column of the pixel signals read from the aforementioned pixels, The system includes a power supply noise detection unit that detects power supply noise from the power supply supplied to the pixel and outputs a cancellation signal to the front of the ADC unit to cancel the power supply noise superimposed on the pixel signal, The power supply noise detection unit includes a voltage-to-current conversion circuit in which a low-pass filter is configured. The aforementioned voltage-current conversion circuit is A supersource follower circuit is provided with an input transistor to which an input voltage is input, A resistive element connected in series with the source of the input transistor, A capacitive element connected to the drain of the input transistor and An imaging device equipped with the following features.

Images