Circuit design support device and circuit design support method

Abstract

This allows designers and other users to easily verify whether the designed circuit conforms to predetermined specifications and constraints. [Solution] The circuit design support device includes a connection data conversion unit that converts design data of circuits constituting the device into connection data, a text conversion unit that converts the connection data into circuit text, a vector conversion unit that converts the circuit text into circuit vector data, an inquiry statement receiving unit that receives inquiry statements about circuits, a prompt generation unit that generates prompts corresponding to the inquiry statements, a context generation unit that reads circuit vector data corresponding to circuits related to the content of the inquiry statement and generates a context, and an answer statement acquisition unit that inputs the prompts and context into a large-scale language model and obtains an answer statement corresponding to the inquiry statement.

Description

Technical Field

[0001] The present invention relates to a circuit design support device and a circuit design support method.

Background Art

[0002] Regarding a technique for supporting the design of a circuit that constitutes a device, for example, Patent Document 1 discloses "a first setting unit that sets first teacher data representing a combination of the circuit characteristic value representing the characteristics of the circuit, the circuit topology information representing the circuit topology, and the element values of the elements that constitute the circuit from a plurality of learning data in which the circuit characteristic value, the circuit topology information, and the element values are associated; a first generation unit that generates a first learned model by learning a machine learning model for outputting the circuit topology information from the circuit characteristic value based on the first teacher data set by the first setting unit; a second setting unit that sets second teacher data representing a combination of the circuit characteristic value and the element value from the plurality of learning data; and a second generation unit that generates a second learned model by learning a machine learning model for outputting the element value from the circuit characteristic value based on the second teacher data set by the second setting unit", and "a circuit acquisition unit that inputs a required circuit characteristic value representing the required characteristics of the circuit to the first learned model generated by the learning device to acquire the circuit topology information corresponding to the required circuit characteristic value; an initial value generation unit that inputs the required circuit characteristic value to the second learned model generated by the learning device to generate an initial value of the element value of the circuit corresponding to the required circuit characteristic value; an element value generation unit that generates the element value corresponding to the required circuit characteristic value by executing a predetermined optimization calculation using the initial value acquired by the initial value generation unit; and a result acquisition unit that associates and stores in a storage unit the circuit topology information corresponding to the required circuit characteristic value acquired by the circuit acquisition unit and the element value generated by the element value generation unit".

Prior Art Documents

Patent Documents

[0003] [Patent Document 1] Japanese Patent Publication No. 2023-115553 [Overview of the project] [Problems that the invention aims to solve]

[0004] According to the circuit design support device described in Patent Document 1, it is possible to accurately determine the circuit topology and its element values ​​that meet the required specifications. However, in today's circuit design field, the increase in design constraints has led to increased design man-hours, and rework due to omissions or oversights in design constraints has become a problem. Therefore, designers need to confirm whether the circuits constituting the designed device conform to predetermined specifications and constraints, but conventionally, there has been no established method for easily confirming this.

[0005] This invention has been made in view of the above points, and aims to enable designers and others to easily confirm whether a designed circuit conforms to predetermined specifications and constraints. [Means for solving the problem]

[0006] This application includes several means to solve at least some of the above problems, and some examples are as follows.

[0007] To solve the above problems, a circuit design support device according to one aspect of the present invention is a circuit design support device that supports the design of a circuit constituting a device, comprising: a connection data conversion unit that converts the design data of the circuit into connection data representing the connection relationships between components arranged in the circuit; a text conversion unit that converts the connection data into text, along with at least one of a specification statement and a constraint statement relating to the circuit, into circuit text; a vector conversion unit that vectorizes the circuit text into circuit vector data; a circuit vector database that stores the circuit vector data; an inquiry statement receiving unit that receives an inquiry statement relating to the circuit; a prompt generation unit that generates a prompt corresponding to the inquiry statement; a context generation unit that reads the circuit vector data relating to the circuit related to the content of the inquiry statement from the circuit vector database and generates a context; and an answer statement acquisition unit that inputs the prompt and the context to a language processing model and obtains an answer statement corresponding to the inquiry statement. [Effects of the Invention]

[0008] According to the present invention, designers can easily verify whether a designed circuit conforms to predetermined specifications and constraints. This supports circuit design and prevents increased design effort and rework due to omissions or oversights in design constraints.

[0009] Other issues, configurations, and effects not mentioned above will be clarified by the following description of the embodiments. [Brief explanation of the drawing]

[0010] [Figure 1] Figure 1 is a diagram illustrating the overview of a series of processes performed by a circuit design support device according to one embodiment of the present invention. [Figure 2] Figure 2 shows an example configuration of a circuit design support system according to one embodiment of the present invention. [Figure 3] Figure 3 is a flowchart illustrating an example of the circuit design support process performed by a circuit design support system. [Figure 4]Figure 4 is a circuit diagram showing an example of the circuit configuration that makes up the designed device. [Figure 5] Figure 5 is a circuit diagram showing an example configuration of Unit A. [Figure 6] Figure 6 is a circuit diagram showing an example configuration of board A. [Figure 7] Figure 7 shows an example of a graph data structure corresponding to the circuit in Figure 4. [Figure 8] Figure 8 shows an example of a graph data structure corresponding to unit A in Figure 5. [Figure 9] Figure 9 shows an example of a graph data structure corresponding to substrate A in Figure 6. [Figure 10] Figure 10 is a flowchart illustrating an example of a hierarchical circuit text conversion process. [Figure 11] Figure 11 illustrates a database-based method, which is an example of a method for reading specification and constraint data using circuit text conversion processing. [Figure 12] Figure 12 shows an example of the results of reading specification and constraint data. [Figure 13] Figure 13 is a diagram illustrating the RAG (Retrieval Augmented Generation) method, which is an example of a method for reading specification and constraint data through circuit text conversion processing. [Modes for carrying out the invention]

[0011] One embodiment of the present invention will be described below with reference to the drawings. One embodiment is an example for illustrating the present invention, and has been omitted and simplified as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural. The position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc., in order to facilitate understanding of the invention. In all drawings illustrating the embodiments, the same reference numeral is used for the same member as a general rule, and repeated explanations are omitted. Also, in the following embodiments, the components (including element steps, etc.) are not necessarily essential unless specifically stated or considered to be clearly essential in principle. Also, when saying "consisting of A," "made of A," "having A," or "including A," other elements are not excluded unless specifically stated that only that element is included. Similarly, in the following embodiments, when referring to the shape, positional relationship, etc. of components, etc., it includes those that are substantially similar or similar to that shape, etc., unless specifically stated or considered to be clearly not the case in principle. Furthermore, "acquisition" shall, as a concrete example, include at least generating, calculating, or receiving from an external source by the subject.

[0012] <Overview of a series of processes performed by a circuit design support device according to one embodiment of the present invention> Figure 1 shows an overview of a series of processes performed by a circuit design support device 30 (Figure 2) according to one embodiment of the present invention. The series of processes performed by the circuit design support device 30 includes a circuit design process 31, a wiring data conversion process 32, a hierarchical circuit configuration text conversion process 33, a vector conversion process 34, and a prompt / context generation process 35.

[0013] The circuit design process 31 designs the circuit that constitutes the device based on the operation input from the designer or the like (hereinafter referred to as the user) using the terminal device 20, and as the design data of the processing result, it stores in the circuit DB322 a parts list listing the parts (units, substrates, electronic components, etc.) provided in the circuit, and a net list representing the connection state of each part. Note that the circuit design process 31 can be realized by software having the same functions as existing circuit design software tools.

[0014] The wiring data conversion process 32 reads out from the circuit DB322 the parts list and the net list corresponding to the circuit that constitutes the designed device, and converts them into wiring data.

[0015] The hierarchical circuit text conversion process 33 extracts the graph data structure corresponding to each layer of the circuit that constitutes the device from the wiring data, reads out at least one of the related specification sentences and constraint sentences from the specification / constraint DB323, and generates a circuit text obtained by textifying the wiring data based on the graph data structure, the specification sentences, and the constraint sentences. The method of reading out the specification sentences and the constraint sentences from the specification / constraint DB323 will be described later.

[0016] The vector conversion process 34 adopts existing vector conversion methods such as Chromadb, Lancedb, Pinecone, etc., generates circuit vector data in a data format accessible by the language processing model 325 from the circuit text, and stores it in the circuit vector DB324.

[0017] The prompt-context generation process 35 generates a prompt suitable for input to the language processing model 325 corresponding to the query sentence regarding the circuit that constitutes the device from the user. Also, the prompt-context generation process 35 searches for and reads out circuit vector data highly relevant to the query sentence from the circuit vector DB324, and generates a context.

[0018] The language processing model 325 generates and outputs a natural language response to a user inquiry based on the prompt (inquiry statement) and context. While the context can also be defined as being included in the prompt, it is described separately in this application.

[0019] The generated response is sent to the terminal device 20 and presented to the user who made the inquiry. This allows the user to easily understand the details of the entire designed device and each circuit, reducing design effort and preventing rework due to omissions or oversights in design constraints.

[0020] <Example of the configuration of a circuit design support system 10 according to one embodiment of the present invention> Figure 2 shows an example configuration of a circuit design support system 10 according to one embodiment of the present invention. The circuit design support system 10 comprises a terminal device 20 and a circuit design support device 30.

[0021] The terminal device 20 consists of a general-purpose computer, such as a personal computer. The terminal device 20 connects to the circuit design support device 30 via the network N and communicates various types of data. The network N is a bidirectional communication network, such as the Internet.

[0022] The circuit design support device 30 is implemented using a general-purpose computer, such as a personal computer or a server computer. This computer includes a processor such as a CPU (Central Processing Unit), memory such as DRAM (Dynamic Random Access Memory), storage such as an HDD (Hard Disk Drive) or SSD (Solid State Drive), input devices such as a keyboard, mouse, and media drive, output devices such as a display, and communication modules such as an Ethernet® card or Wi-Fi® adapter.

[0023] The circuit design support device 30 may be implemented using one physical or logical computer, or using two or more physical or logical computers. The two or more physical or logical computers may be distributed and located on a network N.

[0024] The circuit design support device 30 has functional blocks consisting of a processing unit 310, a storage unit 320, and a communication unit 330.

[0025] The processing unit 310 is implemented by the processor of the computer that constitutes the circuit design support device 30. The processing unit 310 controls the entire circuit design support device 30. The processing unit 310 (processor) implements the following functional blocks by executing the program 321 in the storage unit 320: the circuit design unit 311, the connection data conversion unit 312, the text conversion unit 313, the vector conversion unit 314, the query statement reception unit 315, the prompt generation unit 316, the context generation unit 317, and the answer statement acquisition unit 318. Note that the circuit design unit 311 may be implemented by executing an existing circuit design software tool.

[0026] The circuit design unit 311 executes the circuit design process 31 (Figure 1) based on the input from the designer. The connection data conversion unit 312 executes the connection data conversion process 32 (Figure 1). The text conversion unit 313 executes the hierarchical circuit text conversion process 33 (Figure 1). The vector conversion unit 314 executes the vector conversion process 34 (Figure 1).

[0027] The inquiry receiving unit 315 receives an inquiry from the user via the communication unit 330. The prompt generation unit 316 and the context generation unit 317 execute the prompt / context generation process 35 (Figure 1). The response acquisition unit 318 inputs the prompt and context to the language processing model 325, acquires a response corresponding to the inquiry from the language processing model 325, and transmits it to the terminal device 20 via the communication unit 330. In this embodiment, the language processing model 325 is used by the RAG (Retrieval Augmented Generation) method.

[0028] The memory unit 320 is implemented by the memory and storage of the computer that constitutes the circuit design support device 30. The memory unit 320 stores the program 321, circuit DB 322, specification / constraint DB 323, circuit vector DB 324, and language processing model 325. The memory unit 320 may also store other information and data.

[0029] Program 321 is a program for operating the computer that constitutes the circuit design support device 30 as the circuit design support device 30. The circuit DB 322 stores the parts list and netlist as design data for the circuits that make up the designed device. The specification / constraint DB 323 stores data related to the specifications and constraints of the device and circuits, such as specifications, design documents, and data seeds for the device and each circuit. The circuit vector DB 324 stores circuit vector data, which is obtained by vectorizing the circuit text.

[0030] The language processing model 325 is, for example, a specially built or existing service LLM (Large-Scale Language Model) (or a generative AI equipped with said LLM), which takes a user inquiry and context as input and generates and outputs a response to the inquiry in natural language.

[0031] The language processing model 325 may not be stored in the memory unit 320 of the circuit design support device 30, but may be placed, for example, on a server connected to the network N.

[0032] <Circuit design support processing by the circuit design support system 10> Figure 3 is a flowchart illustrating an example of the circuit design support process performed by the circuit design support system 10.

[0033] The circuit design support process is initiated, for example, in response to a predetermined operation from a user who is designing the circuits that make up the device using the terminal device 20. It is assumed that the circuit DB 322 contains a parts list and a netlist corresponding to the circuits that make up the designed device.

[0034] Figures 4 to 6 show an example of the circuitry that constitutes the device 100, in which the parts list and netlist are stored in the circuit DB322. The circuitry that constitutes the device 100 consists of an upper layer containing one or more units, an intermediate layer containing one or more substrates, and a lower layer containing one or more electronic elements.

[0035] As shown in Figure 4, the upper layers of the circuitry constituting the device 100 include a power supply unit 110, a control unit 120, an A unit 130, and a B unit 140, which are connected via wiring PN1 to PN6.

[0036] For example, focusing on unit A 130, the INPUT terminal of unit A 130 is connected to the OUT1 terminal of control unit 120 via wiring PN5. The Vin terminal of unit A 130 is connected to the OUT2 terminal of power supply unit 110 via wiring PN3. The GND terminal of unit A 130 is connected to the GND terminals of power supply unit 110, control unit 120, and unit B 140 via wiring PN2.

[0037] As shown in Figure 5, the intermediate layer corresponding to unit A 130 is constructed by connecting P board 131, cables 132 and 133, A board 134, cable 135, and B board 136 via wiring UN1 to UN10.

[0038] For example, focusing on board A 134, the VEE terminal of board A 134 is connected to terminal 3 of cable 132 via wiring UN5. The GND terminal of board A 134 is connected to terminal 4 of cable 132 via wiring UN6. The OUTPUT terminal of board A 134 is connected to terminal 1 of cable 135 via wiring UN9.

[0039] As shown in Figure 6, the lower layer corresponding to board A 134 is constructed by connecting amplifiers (AMP) 1341, 1342 and resistors (R) 1343, 1344 via wirings N1 and N2.

[0040] For example, focusing on amplifier 1341, the V+ terminal of amplifier 1341 is connected to VEE. The V- terminal of amplifier 1341 is connected to GND. The OUT terminal of amplifier 1341 is connected to resistor 1343 and the - terminal of amplifier 1341 via wiring N1. The + terminal of amplifier 1341 is connected to INPUT.

[0041] The following explanation will continue using the circuit diagrams of each layer of the device 100 shown in Figures 4 to 6 as examples. Returning to Figure 3, first, the connection data conversion unit 312 reads the parts list and netlist corresponding to the circuits constituting the designed device 100 from the circuit DB 322 (step S1) and converts them into connection data (step S2).

[0042] The connection data represents the connection relationships between components placed in each circuit layer that makes up the device 100. More specifically, it is represented by a graph data structure in which components placed in a layer, terminals provided on those components, and wiring are represented by nodes, and the connection status between components, terminals, and wiring is represented by edges.

[0043] Figure 7 shows the graph data structure corresponding to the circuit constituting the device 100 shown in Figure 4. Specifically, in the graph data structure corresponding to the higher-level device layer, the power supply unit 110, control unit 120, A unit 130, and B unit 140 are each represented as part nodes 201, each terminal of each unit is represented as a terminal node 202, wiring PN1 to PN6 etc. are represented as wiring nodes 203, and the connections between units are represented by edges 204 between nodes.

[0044] For example, focusing on the nodes of unit A 130, the terminal node of the Vin terminal of unit A 130 is connected to the terminal node of the OUT2 terminal of power supply unit 110 via the wiring node of wiring PN3. The terminal node of the GND terminal of unit A 130 is connected to the terminal nodes of the GND terminals of power supply unit 110, control unit 120, and unit B 140 via the wiring node of wiring PN2. The terminal node of the INPUT terminal of unit A 130 is connected to the terminal node of the OUT1 terminal of control unit 120 via the wiring node of wiring PN5. The terminal node of the OUT_A terminal of unit A 130 is connected to the wiring node of wiring OUT_A.

[0045] Figure 8 shows the graph data structure corresponding to the intermediate layer, which includes the A unit 130 shown in Figure 5. Specifically, in the graph data structure corresponding to the A unit layer, which is the intermediate layer, the P board 131, cables 132 and 133, A board 134, cable 135, and B board 136 are each represented as part nodes 211, the terminals of each board and cable are each represented as terminal nodes 212, wiring UN1 to UN10 etc. are represented as wiring nodes 213, and the connections between boards are represented by edges 214 between nodes.

[0046] For example, focusing on the nodes of board A 134, the terminal node of the VEE terminal on board A 134 is connected to the terminal node of the 3-terminal cable 132 via the wiring node of wiring UN5. The terminal node of the GND terminal on board A 134 is connected to the terminal node of the 4-terminal cable 132 via the wiring node of wiring UN6. The terminal node of the INPUT terminal on board A 134 is connected to the wiring node of INPUT. The terminal node of the OUTPUT terminal on board A 134 is connected to the terminal node of the 1-terminal cable 135 via the wiring node of wiring UN9.

[0047] Figure 9 shows the graph data structure of the lower layer, including the A substrate 134 shown in Figure 6. Specifically, in the graph data structure corresponding to the lower layer, the A substrate layer, amplifiers 1341 and 1342 and resistors 1343 and 1344 are each represented as part nodes 221, the terminals of the amplifiers and resistors are each represented as terminal nodes 222, wirings N1, N2, etc. are represented as wiring nodes 223, and the connections of amplifiers, etc. are represented by edges 224 between nodes.

[0048] For example, focusing on the nodes of amplifier 1341, the terminal node of the V+ terminal of amplifier 1341 is connected to the wiring node VEE. The terminal node of the V- terminal of amplifier 1341 is connected to the wiring node GND. The terminal node of the OUT terminal of amplifier 1341 is connected to the terminal node of terminal 1 of resistor 1343 and the terminal node of the - terminal of amplifier 1341 via the wiring node N1. The terminal node of the + terminal of amplifier 1341 is connected to the wiring node INPUT.

[0049] In the following explanation, the graph data structure of each layer of the circuit constituting the device 100 shown in Figures 7 to 9 will be used as an example of connection data. However, the graph data structure shown in Figures 7 to 9 is just one example of connection data, and the data format of connection data is not limited to a graph data structure.

[0050] Returning to Figure 3, the text conversion unit 313 then performs a hierarchical circuit text conversion process to generate circuit text by converting the connection data into text (step S3).

[0051] Figure 10 is a flowchart illustrating an example of a hierarchical circuit text conversion process.

[0052] First, the text conversion unit 313 acquires the overall wiring data of the circuits constituting the device 100 (step S301). Next, the text conversion unit 313 sets the topmost layer of the wiring data as the layer of interest (step S302) and extracts the graph data structure corresponding to the layer of interest (step S303). In this case, the top layer, which is the topmost layer of the circuits constituting the device 100, is the focus, and the graph data structure corresponding to the top layer (Figure 7) is extracted.

[0053] Next, the text conversion unit 313 extracts the layer name and all part node names from the graph data structure and defines the Layer name and Part nodes as follows (step S304).

[0054] Layer name = Extracted layer name Part nodes = All extracted part node names (list of part node names)

[0055] Next, the text conversion unit 313 reads the specification and constraint statements related to Layer name from the specification / constraint DB 323 and defines Spec and Const as follows (step S305). The method for reading the specification and constraint statements will be described later.

[0056] Spec = Read specification text Const = Read constraint statement

[0057] Next, the text conversion unit 313 generates the following Text using the Layer name, Part nodes, Spec, and Const defined in steps S304 and S305. Specifically, for example, it inserts the layer name defined as Layer name into {Layer name} in the Text. Then, the generated Text is temporarily stored as circuit text in, for example, the storage unit 320 (step S306).

[0058] Text = "{Layer name} contains {Part nodes}." The specifications for {Layer name} are as follows: {Spec} Furthermore, the constraints for {Layer name} are as follows: {Const}”

[0059] Next, the text conversion unit 313 sets one of the Part nodes of the layer of interest as the node of interest (step S307). In this case, the upper layer, the device layer (Figure 7), is the layer of interest, so one of the four Part nodes 201 is set as the node of interest. Here, for example, it is assumed that the Part node corresponding to Unit A 130 is set as the node of interest.

[0060] Next, the text conversion unit 313 determines whether a layer corresponding to the node of interest exists (step S308). If it determines that a layer exists (YES in step S308), the process proceeds to step S313. In this case, an A-unit layer corresponding to A-unit 130 (Figure 8) exists, so the process proceeds to step S313.

[0061] Next, the text conversion unit 313 sets the layer corresponding to the node of interest as the layer of interest (step S313). In this case, the A unit layer corresponding to the A unit 130 is set as the layer of interest. After this, the text conversion unit 313 returns to step S303 and repeats the process from step S303 onward.

[0062] If, in step S308, it is determined that there is no layer corresponding to the node of interest (NO in step S308), then the text conversion unit 313 determines whether there are any unfocused Part nodes in the layer of interest (step S309). If it is determined that there are unfocused Part nodes (YES in step S309), the process returns to step S307 and steps S307 onward are repeated. If the text conversion unit 313 determines that there are no unfocused Part nodes in the layer of interest (NO in step S309), the process proceeds to step S310.

[0063] Next, the text conversion unit 313 determines whether there are any unfocused Part nodes in layers higher than the current focus layer (step S310). Note that if the current focus layer is a lower layer, the higher layers refer to the middle layer and the upper layer. If it is determined that there are unfocused Part nodes in layers higher than the current focus layer (YES in step S310), the text conversion unit 313 then sets one of the unfocused Part nodes in the layers higher than the current focus layer as a focus node, starting with the unfocused Part nodes in the layer closest to the current focus layer (step S311).

[0064] Next, the text conversion unit 313 determines whether a layer corresponding to the node of interest exists (step S312). If it determines that a layer exists (YES in step S312), it proceeds to step S313. Conversely, if it determines that a layer corresponding to the node of interest does not exist (NO in step S312), the text conversion unit 313 returns to step S310 and repeats the process from step S310 onward.

[0065] Subsequently, in step S310, if the text conversion unit 313 determines that there are no unfocused Part nodes in the layers above the currently focused layer (NO in step S310), the hierarchical circuit text conversion process is terminated.

[0066] According to this hierarchical circuit text conversion process, circuit text consisting of Text for each layer can be generated based on the graph data structure corresponding to each layer of the circuit constituting the device 100.

[0067] Returning to Figure 3, after the circuit text is generated in step S3, the vector conversion unit 314 then generates circuit vector data by converting the circuit text into vectors and stores it in the circuit vector DB 324 (step S4).

[0068] Next, the inquiry reception unit 315 receives an inquiry from a user using the terminal device 20 regarding the circuits that make up the designed device (step S5).

[0069] Next, the prompt generation unit 316 generates a prompt in response to the user's inquiry, and the context generation unit 317 reads circuit vector data in response to the user's inquiry from the circuit vector DB 324 to generate the context (step S6).

[0070] Next, the response acquisition unit 318 inputs the prompt and context to the language processing model 325, obtains a response to the query from the language processing model 325, and transmits it to the terminal device 20 (step S7).

[0071] Next, the terminal device 20 displays the response to the inquiry and presents it to the user (step S8). This concludes the explanation of the circuit design support process by the circuit design support system 10.

[0072] As described above, the circuit design support process allows the user to obtain natural language responses from the language processing model 325 to inquiries about the circuits constituting the device (for example, does unit A meet the specifications? does board B satisfy the constraints? etc.). Furthermore, by generating circuit text by converting the connection data into text based on the graph data structure, specification statements, and constraint statements, the accuracy of the responses from the language processing model 325 can be improved. This allows the user to easily understand the details of the entire designed device and each circuit, reducing design effort and preventing rework due to omissions or errors in design constraints.

[0073] <Regarding the method for reading specification and constraint statements from the specification / constraint DB323 using the hierarchical circuit text conversion process 33> For reading specification and constraint statements from DB323, for example, the DB (Data Base) method or the RAG (Retrieval Augmented Generation) method can be used.

[0074] Figure 11 shows an example of the data format for specification and constraint statements in the DB system. Figure 12 shows an example of the results read from the specification / constraint DB323.

[0075] In the DB method, the specification / constraint DB323 stores specification and constraint statements associated with each device, unit, board, and electronic component, as shown in Figure 11. Then, as a hierarchical circuit text conversion process 33, the device name, unit name, board name, electronic component name, etc. located in the layer of interest are specified as the target for reading from the specification / constraint DB323, and as shown in Figure 12, the reading results are obtained in which the corresponding specification and constraint statements are written for each target. The DB type can be RDB, NoSQL, etc.

[0076] Figure 13 shows an overview of how specification and constraint statements are read from the specification / constraint DB323 when the RAG method is adopted.

[0077] In the RAG method, the specification / constraint DB323 stores vectorized specification and constraint statements corresponding to devices, units, boards, and electronic components. Then, as a hierarchical circuit text conversion process 33, the device name, unit name, board name, electronic component name, etc. located in the layer of interest are specified as the reading target, and a query statement is generated to obtain their specifications and constraints. Next, as a prompt / context generation process 331, a prompt corresponding to the query statement is generated, the specification and constraint statements corresponding to the query statement are read from the specification / constraint DB323 to generate a context, and output to the language processing model 332. Then, a response statement containing the specification and constraint statements corresponding to each reading target, corresponding to the query statement, is obtained from the language processing model 332. Note that the language processing model 332 shown in Figure 13 may be the same as or different from the language processing model 325 shown in Figure 1.

[0078] The present invention is not limited to the embodiments described above, and various modifications are possible. For example, the embodiments described above are described in detail to make the present invention easier to understand, and are not necessarily limited to those having all the configurations described. Furthermore, it is possible to replace or add to the configurations of one embodiment with those of another embodiment. [Explanation of Symbols]

[0079] 10...Circuit design support system, 20...Terminal device, 30...Circuit design support device, 31...Circuit design processing, 32...Connection data conversion processing, 33...Hierarchical configuration circuit text conversion processing, 34...Vector conversion processing, 35...Prompt / context generation processing, 100...Device, 110...Power supply unit, 120...Control unit, 132...Cable, 133...Cable, 135...Cable, 201...Part node, 202...Terminal node, 203...Wiring node, 204...Edge, 211...Part node, 212...Terminal node, 213...Wiring node, 214...Edge, 221 ...Part node, 222...Terminal node, 223...Wiring node, 224...Edge, 310...Processing unit, 311...Circuit design unit, 312...Connection data conversion unit, 313...Text conversion unit, 314...Vector conversion unit, 315...Query statement reception unit, 316...Prompt generation unit, 317...Context generation unit, 318...Answer statement acquisition unit, 320...Storage unit, 321...Program, 322...Circuit DB, 323...Specification / constraint DB, 324...Circuit vector DB, 325...Language processing model, 330...Communication unit, 331...Prompt / context generation processing, 332...Language processing model

Claims

1. A circuit design support device that assists in the design of circuits that constitute a device, A connection data conversion unit converts the design data of the circuit into connection data that represents the connection relationships between components arranged in the circuit, A text conversion unit that converts the connection data into text and converts it into circuit text, along with at least one of the specification statement and constraint statement relating to the circuit. A vector conversion unit that vectorizes the circuit text and converts it into circuit vector data, A circuit vector database for storing the aforementioned circuit vector data, An inquiry receiving unit that receives inquiries regarding the aforementioned circuit, A prompt generation unit that generates a prompt corresponding to the aforementioned query statement, A context generation unit that reads the circuit vector data corresponding to the circuit related to the content of the query statement from the circuit vector database and generates a context, A response text acquisition unit that inputs the prompt and the context into a language processing model to obtain a response text corresponding to the query text, A circuit design support device equipped with the following features.

2. A circuit design support device according to claim 1, The connection data conversion unit generates a graph data structure consisting of part nodes, terminal nodes, and wiring nodes for each layer of the circuit as the connection data. The text conversion unit generates circuit text based on the graph data structure for each layer of the circuit. Circuit design support device.

3. A circuit design support device according to claim 1, The aforementioned wiring data conversion unit converts the parts list and netlist, which are the design data of the circuit, into wiring data. Circuit design support device.

4. A circuit design support device according to claim 1, The text conversion unit reads at least one of the specification statement and the constraint statement relating to the circuit from the specification and constraint database in which the specification statement and the constraint statement are stored. Circuit design support device.

5. A circuit design support device according to claim 4, The text conversion unit employs a database method or a RAG (Retrieval Augmented Generation) method to read at least one of the specification statement and the constraint statement relating to the circuit from the specification and constraint database. Circuit design support device.

6. A circuit design support method using a circuit design support device that assists in the design of circuits constituting a device, Circuit design support system A connection data conversion step that converts the design data of the circuit into connection data representing the connection relationships between components arranged in the circuit, A text conversion step involves converting the connection data into text and then converting it into circuit text, along with at least one of the specification statement and constraint statement relating to the circuit. A vector conversion step of vectorizing the circuit text and converting it into circuit vector data and storing it in a circuit vector database, A query reception step that receives an inquiry about the aforementioned circuit, A prompt generation step that generates a prompt corresponding to the aforementioned query statement, A context generation step involves reading the circuit vector data corresponding to the circuit related to the content of the query statement from the circuit vector database and generating a context. A response acquisition step involves inputting the prompt and the context into a language processing model to obtain a response corresponding to the query statement, A circuit design support method that includes this.

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