Light-emitting device and method for manufacturing the same

Abstract

The present invention provides a method for manufacturing a light-emitting device that can reduce the probability of cracking occurring in semiconductor elements. [Solution] A method for manufacturing a light-emitting device, comprising the steps of: preparing a laminate including a substrate having a crystalline structure and a plurality of semiconductor layers stacked on the substrate; forming grooves with branched ends in the laminate and obtaining semiconductor elements by dividing from the grooves; and bonding the semiconductor elements to a submount.

Description

Technical Field

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[0001] The present disclosure relates to a light-emitting device and a method for manufacturing the same.

Background Art

[0002] Patent Document 1 describes a method of obtaining individual elements by forming divided guide grooves in a wafer including a group-III nitride semiconductor substrate and dividing the wafer along the divided guide grooves.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present disclosure provides a manufacturing method capable of reducing the probability of cracks occurring in semiconductor elements in a light-emitting device. Further, a light-emitting device having semiconductor elements with a reduced crack occurrence rate is provided.

Means for Solving the Problems

[0005] One aspect of the method for manufacturing a light-emitting device according to the present disclosure includes a step of preparing a laminate including a substrate having a crystal structure and a plurality of semiconductor layers laminated on the substrate, a step of forming a groove having a branched tip shape in the laminate and obtaining semiconductor elements by dividing starting from the groove, and a step of bonding the semiconductor elements to a submount.

[0006] One embodiment of a light-emitting device according to the present disclosure is a light-emitting device comprising a semiconductor element and a submount to which the semiconductor element is fixed, wherein the semiconductor element comprises a laminate having a longitudinal side surface, a transverse side surface, a first main surface, and a second main surface, the longitudinal side surface having a first region including a rough surface and a second region including a plurality of striated steps extending from the first region toward the second main surface, and a plurality of recesses are provided at the boundary between the first region and the second region. [Effects of the Invention]

[0007] According to the above-described method for manufacturing a light-emitting device, the probability of cracking occurring in the semiconductor element can be reduced. Furthermore, a light-emitting device having a semiconductor element with a reduced cracking rate can be obtained. [Brief explanation of the drawing]

[0008] [Figure 1] This is a flowchart showing a method for manufacturing a semiconductor device according to one embodiment. [Figure 2] This is a schematic plan view showing a method for manufacturing a semiconductor device according to one embodiment. [Figure 3] This is a cross-sectional view along line III-III in Figure 2. [Figure 4] This is a schematic plan view showing a method for manufacturing a semiconductor device according to one embodiment. [Figure 5] This is a schematic plan view showing a method for manufacturing a semiconductor device according to one embodiment. [Figure 6] This is a cross-sectional view along the line VI-VI in Figure 5. [Figure 7] This is a partially enlarged view showing an example of the groove shape. [Figure 8] This is a schematic cross-sectional view showing a semiconductor device manufacturing method according to one embodiment. [Figure 9] This is a schematic plan view showing a semiconductor device according to one embodiment. [Figure 10] Figure 9 shows a cross-sectional view along line XX. [Figure 11] This is a schematic perspective view showing a semiconductor device according to one embodiment. [Figure 12] This is a schematic diagram showing a side view of a semiconductor device according to one embodiment. [Figure 13] This is an optical microscope image of a groove in the semiconductor device manufacturing method of Reference Example 2. [Figure 14] This is a scanning electron microscope (SEM) image of the side of the semiconductor device in Reference Example 2. [Figure 15] This is a flowchart showing a method for manufacturing a light-emitting device according to one embodiment. [Figure 16] This is a schematic cross-sectional view showing a light-emitting device according to one embodiment. [Modes for carrying out the invention]

[0009] An embodiment of the present invention will be described below with reference to the drawings. In each drawing, the same elements are denoted by the same reference numerals.

[0010] Figure 1 is a flowchart illustrating the method for manufacturing the semiconductor device according to this embodiment. Figures 2 to 8 are schematic diagrams illustrating the method for manufacturing the semiconductor device according to this embodiment. Figures 9 to 12 are schematic diagrams illustrating the semiconductor device according to this embodiment.

[0011] As shown in Figure 1, the semiconductor device manufacturing method of this embodiment includes a laminate preparation step S101 and a splitting step S103. In the laminate preparation step S101, a laminate 10 is prepared, which includes a substrate 11 having a crystalline structure and a plurality of semiconductor layers 12 stacked on the substrate 11. In the splitting step S103, a groove 20 with a branched tip is formed in the laminate 10, and the laminate is split starting from the groove 20. According to the semiconductor device manufacturing method of this embodiment, the probability of cracking at a position outside the groove 20 can be reduced. The semiconductor device manufacturing method of this embodiment may further include a cleavage step S102.

[0012] In a splitting method of splitting an object starting from a groove, the deeper the groove is, the easier it is to split. However, as it becomes easier to split, the possibility of cracking at an unintended timing, such as when transporting the object, increases. On the other hand, if the depth of the groove is suppressed, cracking may occur at a position deviated from the groove. When including a substrate 11 having a crystal structure like the laminate 10 of the present embodiment, if the depth of the groove is too shallow, cracking may occur in an unintended direction due to the influence of the crystal structure of the substrate 11.

[0013] As a result of examining by focusing on the shape of the groove 20, it was found that when splitting the laminate 10 including the substrate 11 having a crystal structure, by making the shape of the groove 20 such that the tip is branched, the probability of cracking at a position deviated from the groove 20 can be reduced. This is considered to be because the tip of the groove 20 is branched, so that cracks can be extended from any of those positions, thereby reducing the possibility of cracking at a position deviated from the groove 20. In other words, it is considered that this is because the effective width in which the groove 20 can serve as a guide for splitting is expanded due to the tip of the groove 20 being branched.

[0014] (Laminate Preparation Step S101) First, the laminate preparation step S101 is performed. In the laminate preparation step S101, as shown in FIGS. 2 and 3, the laminate 10 is prepared. FIG. 2 is a schematic plan view showing a method of manufacturing a semiconductor element. FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2. In each figure, the X direction, Y direction, and Z direction are shown respectively. The plan view is a view seen from the Z direction. The X direction is the direction of cleavage in the cleavage step S102 described later. The Y direction is the direction of splitting in the splitting step S103 described later. The X direction, Y direction, and Z direction are orthogonal to each other.

[0015] The laminate 10 includes a substrate 11 having a crystalline structure and a plurality of semiconductor layers 12 stacked on the substrate 11. Ridges 12a may be formed on the plurality of semiconductor layers 12. The laminate 10 has a first main surface 10a and a second main surface 10b. The direction from the second main surface 10b toward the first main surface 10a is the Z direction. Ridges 12a may be formed on the second main surface 10b. The laminate 10 may be a wafer, or it may be a segment obtained by dividing a wafer into a plurality of parts.

[0016] The thickness of the laminate 10 can be, for example, 150 μm or less. The thickness of the laminate 10 may be 70 μm or less. This makes it possible to reduce the driving voltage of the resulting semiconductor element 100. For example, as shown in Figure 3, when a first electrode 31 and a second electrode 32 are provided sandwiching the laminate 10 in the thickness direction of the laminate 10, reducing the thickness of the laminate 10 can reduce the resistance of the current path and thus reduce the driving voltage of the resulting semiconductor element 100. The thickness of the laminate 10 can be 30 μm or more. The thickness of the laminate 10 can be 30 μm or more and 100 μm or less, and may be 30 μm or more and 70 μm or less. The thickness of the laminate 10 is the distance from the second main surface 10b to the first main surface 10a in the Z direction. If the first main surface 10a and / or the second main surface 10b are not flat, the thickness of the laminate 10 is defined as the position where the thickness is maximum.

[0017] The substrate 11 preferably has an easy cleavage direction. This allows at least one of the sides of the semiconductor element 100 to be obtained by cleavage. The easy cleavage direction of the substrate 11 preferably coincides with a portion of the directions forming the sides of the semiconductor element 100, but does not coincide with other portions. By forming a groove 20 in the direction that does not coincide and dividing the substrate, the effective width of the groove 20, which functions as a guide for division, is substantially enlarged, which reduces the possibility of the substrate 11 being dragged in the easy cleavage direction and breaking outside the groove 20. If the planar shape of the obtained semiconductor element 100 is rectangular, the substrate 11 preferably has a hexagonal crystal structure. Examples of such a substrate 11 include a nitride semiconductor substrate having a wurtzite structure. Examples of nitride semiconductor substrates include group III nitride semiconductor substrates. Examples of group III nitride semiconductors include GaN, InGaN, AlGaN, and AlN. For example, a GaN substrate can be used as the substrate 11. The easy cleavage plane of a nitride semiconductor having a wurtzite structure is the m plane (i.e., the {10-10} plane). In this case, it is preferable that one of the main surfaces of the substrate 11 be the c plane (i.e., the (0001) plane or the (000-1) plane). In this disclosure, the c plane is not limited to a plane that strictly coincides with the (0001) plane or the (000-1) plane, but also includes a plane having an off-angle in the range of ±0.03 to 1 degree.

[0018] The multiple semiconductor layers 12 are made of semiconductors that can be formed on the substrate 11. Preferably, the easy cleavage direction of the semiconductors constituting the multiple semiconductor layers 12 coincides with the easy cleavage direction of the substrate 11. This ensures that the easy cleavage direction coincides throughout the entire laminate 10, allowing for good cleavage. The semiconductors constituting the multiple semiconductor layers 12 can be nitride semiconductors, and may be group III nitride semiconductors. Examples of group III nitride semiconductors include GaN, InGaN, AlGaN, and AlN. By epitaxially growing the multiple semiconductor layers 12 on the surface of a substrate 11 made of a group III nitride semiconductor, their crystal orientations can be substantially matched. The multiple semiconductor layers 12 can be formed, for example, by metal-organic vapor deposition (MOCVD). When forming ridges 12a on the multiple semiconductor layers 12, for example, they can be formed by removing a portion of the multiple semiconductor layers 12 after growth using photolithography and etching. The thickness of the multiple semiconductor layers 12 may be less than the thickness of the substrate 11. The thickness of the multiple semiconductor layers 12 can be 10 μm or less. The thickness of the multiple semiconductor layers 12 can be 1 μm or more. The thickness of the multiple semiconductor layers 12 is the distance from one main surface to the other main surface of the multiple semiconductor layers 12 in the Z direction. If those main surfaces are not flat, the thickness of the multiple semiconductor layers 12 is defined as the position where the thickness is maximum.

[0019] As shown in Figure 10, which will be described later, the multiple semiconductor layers 12 may include a first conductivity type semiconductor layer 121, a second conductivity type semiconductor layer 122, and an active layer 123 sandwiched between the first conductivity type semiconductor layer 121 and the second conductivity type semiconductor layer 122. The semiconductor element 100 may be a semiconductor laser element. When the semiconductor element 100 is a semiconductor laser element, an optical waveguide can be defined by a ridge 12a. The ridge 12a is, for example, stripe-shaped. The sides formed so as to cross the ridge 12a become the end face on the light emission side and the end face on the light reflection side of the semiconductor element 100. The plan view shape of the resulting semiconductor element 100 may have a short side and a long side. The resulting semiconductor element 100 may have one or more sides in the short side and one or more sides in the long side. When the plan view shape of the semiconductor element 100 is rectangular, it has two sides in the short side and two sides in the long side. For example, one of the sides in the shorter direction is designated as the end face on the light emission side. In this case, the other side in the shorter direction is designated as the end face on the light reflection side.

[0020] The laminate 10 can be provided with a first electrode 31 and a second electrode 32. Preferably, the first electrode 31 and the second electrode 32 are arranged in a plan view such that they do not overlap with the positions where the laminate is cleaved in the cleavage step S102 and the positions where it is divided in the division step S103, which will be described later. This reduces the possibility that the first electrode 31 and the second electrode 32 will adhere to the cleaved or divided surfaces. One of the first electrode 31 and the second electrode 32 can be an n electrode and the other can be a p electrode. In Figure 3, the second electrode 32 has a contact electrode 32a provided on the ridge 12a and a pad electrode 32b that contacts it.

[0021] The first electrode 31 and the second electrode 32 can each be formed by laminating one or more layers of metals or alloys such as Ni, Rh, Cr, Au, W, Pt, Ti, Al, and Pd. The first electrode 31 and the second electrode 32 may also contain conductive oxides. The contact electrode 32a may be a single-layer or multi-layer film of a conductive oxide containing at least one selected from metals or alloys such as Ni, Rh, Cr, Au, W, Pt, Ti, and Al, and Zn, In, and Sn. An example of a conductive oxide is ITO (Indium Tin Oxide).

[0022] The laminate 10 may be provided with an insulating film 33. The insulating film 33 can be formed by a single-layer or multi-layer film of an oxide or nitride such as Si, Al, Zr, Ti, Nb, or Ta.

[0023] (Cleavage process S102) Next, a cleavage step S102 can be performed. In the cleavage step S102, the laminate 10 is divided by cleavage. In this embodiment, cleavage is performed in the X direction in the figure. As a result, a cleaved laminate 10 can be obtained as shown in Figure 4. Figure 4 is a schematic plan view showing a method for manufacturing a semiconductor element 100. If the semiconductor element 100 is a semiconductor laser element, it is preferable to form the end face on the light emission side and the end face on the light reflection side by cleavage, thereby obtaining a good end face.

[0024] The surface obtained by the cleavage step S102 may be a surface that becomes a side surface in the short-side direction of the semiconductor element 100. When the side surface in the short-side direction of the semiconductor element 100 is formed by the cleavage step S102, the laminate 10 is divided into a first interval in the cleavage step S102, and the laminate 10 is divided into a second interval smaller than the first interval in the division step S103 described later.

[0025] Cleavage can be performed, for example, by first forming a groove in a part of the area to be cleaved, and then pressing the laminate 10 with a blade. The groove can be formed, for example, using a laser scribe device. The groove may be formed only outside the region that will become the semiconductor element 100. For example, a groove can be formed at one end of the laminate 10, which is a wafer or a divided piece of a wafer, and the laminate 10 can be cleaved along the groove by external force.

[0026] When the substrate 11 is a substrate having a wurtzite structure, it is preferable to align the cleavage direction with the m-plane in a plan view. This allows for accurate cleavage. In this disclosure, "aligning with the m-plane" does not mean strictly aligning with the m-plane, but also includes cases where the angle with respect to the m-plane is 0.1 degrees or less. In this embodiment, the cleavage direction coincides with the X-direction, but the cleavage direction does not have to coincide with the X-direction.

[0027] If the semiconductor element 100 is a semiconductor laser element, a light-reflective film or a protective film may be formed on the surface obtained by cleavage after the cleavage step S102. When forming a film such as a light-reflective film or a protective film on some of the multiple sides of the semiconductor element 100, it is preferable to first divide the semiconductor element to form the side on which the film will be applied, and then divide it in a different direction after the film has been applied. This makes it easier to form a film on the sides of the semiconductor element 100.

[0028] (Dividing process S103) In the splitting step S103, as shown in Figures 5 to 8, grooves 20 with branched ends are formed in the laminate 10, and the laminate is split starting from the grooves 20. Figure 5 is a schematic plan view showing the manufacturing method of the semiconductor element 100. Figure 6 is a cross-sectional view taken along the line VI-VI in Figure 5. Figure 7 is a partially enlarged view showing an example of the shape of the grooves 20. Figure 8 is a schematic cross-sectional view showing the manufacturing method of the semiconductor element 100. In this embodiment, the splitting is performed in the Y direction in the figures. In this embodiment, the direction of splitting coincides with the Y direction, but the direction of splitting does not have to coincide with the Y direction. If the splitting step S103 is performed after the cleavage step S102, the laminate 10 on which the grooves 20 are formed is the laminate 10 after it has been cleaved by the cleavage step S102.

[0029] As shown in Figure 7, the groove 20 has a branched shape at its tip. The groove 20 has a shape with multiple tips. Such groove shapes can be observed from a direction along the extension direction of the groove 20 (from the Y direction in the figure). If the laminate 10 is translucent, the groove shape can be observed from the side of the laminate 10 using an optical microscope. The groove shape may also be observed in a cross-section in a direction intersecting the extension direction of the groove. The number of branches at the tip of the groove 20 is two or more. The number of branches at the tip of the groove 20 may be 10 or less, or 5 or less. The groove 20 may have a branched tip portion 20a and a connecting portion 20b that connects the tip portion 20a to the surface of the laminate 10. Preferably, the ratio of the depth of the connecting portion 20b to the total depth of the groove 20 is greater than half. This allows the laminate 10 to be divided more stably. The depth of the groove 20 refers to the length of the groove in the direction from the second main surface 10b to the first main surface 10a of the laminate 10.

[0030] The ratio of the depth of the groove 20 to the thickness of the laminate 10 in the thickness direction of the laminate 10 can be 10% or more, and preferably 20% or more. This allows for better separation. The ratio of the depth of the groove 20 to the thickness of the laminate 10 can be less than 50%, and preferably 40% or less. This further reduces the possibility of cracking at an unintended time. The ratio of the depth of the groove 20 to the thickness of the laminate 10 may be 10% or more and less than 50%, and preferably 10% or more and 40% or less. The ratio of the depth of the groove 20 to the thickness of the laminate 10 may be 20% or more and 40% or less.

[0031] The depth of the groove 20 can be 10 μm or more. Preferably, the depth of the groove 20 is 15 μm or more. This allows for better division. The depth of the groove 20 can be 50 μm or less. This further reduces the possibility of cracking at an unintended time. The depth of the groove 20 may be 40 μm or less, or 20 μm or less. When the thickness of the laminate 10 is 70 μm or less, setting the depth of the groove 20 to 20 μm or less further reduces the possibility of cracking at an unintended time. The depth of the groove 20 may be 10 μm or more and 50 μm or less, preferably 10 μm or more and 40 μm or less. The depth of the groove 20 may be 10 μm or more and 20 μm or less, or 10 μm or more and 15 μm or less.

[0032] Preferably, the groove 20 is deep enough to reach the first main surface 10a but not the second main surface 10b. In the splitting step S103, a groove 20 is formed that reaches the first main surface 10a but not the second main surface 10b. By pressing the laminated body 10 with the groove 20 formed on it from the side of the second main surface 10b, a crack is generated starting from the groove 20, and the laminated body 10 can be split. When splitting by pressing in this way, the laminated body is prone to cracking outside the groove 20, but the possibility of this phenomenon occurring can be reduced by providing the groove 20. Pressing is performed, for example, as shown in Figure 8, by pressing a pressing member 40 directly onto the second main surface 10b or through a protective sheet. The pressing member 40 is, for example, a cutter or a blade. The pressing member 40 can be pressed directly onto the groove 20.

[0033] The first main surface 10a of the laminate 10 can be the surface of the substrate 11. The second main surface 10b of the laminate 10 can be the surface of the plurality of semiconductor layers 12. In this case, it is preferable that the groove 20 is provided only on the substrate 11 and not on the plurality of semiconductor layers 12. This further reduces the possibility of cracking at an unintended time. Alternatively, the first main surface 10a may be the surface of the plurality of semiconductor layers 12 and the second main surface 10b may be the surface of the substrate 11. In this case, it is preferable that the groove 20 is formed from the plurality of semiconductor layers 12 to a part of the substrate 11. This allows for the formation of grooves 20 of sufficient depth, resulting in better division.

[0034] The width of the groove 20 may be 50% or less of the depth of the groove 20, and may also be 30% or less. The width of the groove 20 refers to the maximum length in the direction perpendicular to the stretching direction of the groove 20. The width of the groove 20 may be, for example, 20 μm or less. The width of the groove 20 may be 1 μm or more, and may also be 3 μm or more. The width of the groove 20 may be determined by observing the groove from the side of the laminate 10 using an optical microscope, or by observing the cross-section in a direction intersecting the stretching direction of the groove 20. The groove 20 can also be observed from the side of the first main surface 10a using an optical microscope. The maximum value of the width of the groove 20 in such a plan view may be 50 μm or less, and may also be 30 μm or less.

[0035] The groove 20 does not need to be formed over the entire length to be divided in the division process S103. In Figure 5, the groove 20 is formed over only a portion of the length to be divided in the division process S103. By arranging the groove 20 so that it does not reach the cleaved surface, the possibility of debris from the formation of the groove 20 adhering to the cleaved surface can be reduced.

[0036] It is preferable that the direction in which the laminate 10 is divided is different from the direction of easy cleavage of the substrate 11. When divided in a direction different from the direction of easy cleavage, the laminate is prone to breaking outside the groove 20, but the possibility of this phenomenon occurring can be reduced by providing the groove 20.

[0037] The splitting step S103 may be a step in which the longitudinal side surface of the semiconductor element 100 is formed. Preferably, the length of the side surface of the semiconductor element 100 formed by the splitting step S103 is 1 mm or more. The length of the side surface of the semiconductor element 100 refers to the length in the direction along the splitting direction. The longer the splitting distance, the more likely it is to break outside the groove 20, but by providing the groove 20, the possibility of breaking outside the groove 20 can be reduced. In addition, the longer the length of the side surface of the semiconductor element 100, the greater the optical output of the semiconductor element 100 can be increased. The length of the side surface of the semiconductor element 100 formed by the splitting step S103 can be 10 mm or less, and may be 5 mm or less.

[0038] When the thickness of the laminate 10 is 70 μm or less, the side length of the semiconductor element 100 is preferably 5 mm or less. As the thickness of the laminate 10 decreases, the strength of the semiconductor element 100 tends to decrease, but this ensures the strength of the semiconductor element 100. In this case, the side length of the semiconductor element 100 may be 1 mm or more and 5 mm or less, 1 mm or more and 3 mm or less, or 1 mm or more and 2 mm or less. The thickness of the laminate 10 may exceed 70 μm. In this case, the side length of the semiconductor element 100 may be 1 mm or more and 10 mm or less, 3 mm or more and 10 mm or less, or 4 mm or more and 10 mm or less.

[0039] The groove 20 can be formed by laser processing. The groove 20 can be formed by laser processing using a pulsed laser beam. The groove 20 can be formed using a laser scribe device. A groove 20 with a branched tip can be formed by changing the laser processing conditions from those used to form a V-shaped groove to those used to increase the repetition frequency and decrease the peak output. The laser processing conditions used to form a V-shaped groove are those used for ablation processing. By adjusting these conditions to increase the repetition frequency and decrease the peak output, it is thought that the process will primarily be ablation processing, but the effect of thermal processing at the tip will become greater, and for this reason, it is thought that a groove 20 with a branched tip can be formed.

[0040] The laser processing conditions for forming the grooves 20 are selected to allow grooves to be formed in the laminate 10 primarily by ablation. When a GaN substrate is used as the substrate 11, for example, a nanosecond UV laser can be used. The laser processing conditions can be adjusted, for example, with a pulse width of nanoseconds or picoseconds, a repetition frequency of 40kHz to 200kHz, an average power of 0.5W to 10W, and a focal diameter at the focusing position of 2μm to 20μm. Since the depth of the formed grooves 20 may change depending on the increase or decrease in the repetition frequency, the depth of the grooves 20 may be adjusted by adjusting the scanning speed. The scanning speed can be adjusted, for example, in the range of 5mm / s to 500mm / s. The laser processing conditions for forming the grooves 20 may be the same as those for forming V-shaped grooves, but with a higher repetition frequency and lower peak power.

[0041] By going through the above steps, a semiconductor device 100 can be obtained.

[0042] (Semiconductor element 100) Figures 9 to 12 show the semiconductor element 100 of this embodiment. Figure 9 is a schematic plan view of the semiconductor element 100. Figure 10 is a cross-sectional view taken along line XX in Figure 9. Figure 11 is a schematic perspective view of the semiconductor element 100. Figure 12 is a schematic side view of the semiconductor element 100.

[0043] The semiconductor element 100 comprises a laminate 10 having a longitudinal side surface 10c, a transverse side surface 10d, a first main surface 10a, and a second main surface 10b. The longitudinal side surface 10c has a first region 51 including a rough surface, and a second region 52 including a plurality of striated steps extending from the first region 51 toward the second main surface 10b. A plurality of recesses 53 are provided at the boundary between the first region 51 and the second region 52.

[0044] The first region 51 and the multiple recesses 53 are thought to be the parts that were once groove 20. It is thought that the branched portions at the tip of groove 20 remained as recesses 53. In this way, the tip shape of groove 20 may remain as a trace. The recesses 53 are recesses that are indented toward the inside of the laminate 10. The second region 52 is thought to be the part that was fractured by a crack extending from groove 20. In the second region 52, multiple streaky marks extending from the first region 51 toward the second main surface 10b can be seen as traces of the crack. The multiple streaky steps (multiple streaky marks) are mostly straight. The first region 51 has a randomly rough surface compared to the second region 52. The first region 51 has irregularities that are smaller in size than the length of the streaky steps in the second region 52. Such surface conditions may be observed with an optical microscope or with a scanning electron microscope (SEM). The recesses 53 can be confirmed by SEM images.

[0045] The laminate 10 has at least one longitudinal side 10c and at least one transverse side 10d. In this embodiment, the laminate 10 has two longitudinal side 10c and at least two transverse side 10d.

[0046] The longitudinal side surface 10c has a first side 54 that intersects with the first main surface 10a, a second side 55 that intersects with the transverse side surface 10d, and a third side 56 that intersects with the second main surface 10b. The first region 51 has a first boundary 51a that coincides with the first side 54, a second boundary 51b that is away from the second side 55 and opposite the second side, and a third boundary 51c that is away from the third side 56 and opposite the third side 56. Multiple recesses 53 are provided in the third boundary 51c. The first region 51 can be an inverted trapezoid in which the first boundary 51a is longer than the third boundary 51c.

[0047] Multiple recesses 53 are distributed across the entire third boundary 51c. The number of multiple recesses 53 tends to be less than the number of laser processing steps used to form the groove 20. At least five different locations on the longitudinal side surface 10c, the number of multiple recesses 53 in a width of 20 μm may be four or more. In the SEM image, the recesses 53 are observed as areas that are closer to black than the first region 51 and the second region 52. The SEM image can be a secondary electron (SE) image with a magnification of 2,500x and an acceleration voltage of 5 kV. The number of multiple recesses 53 in a width of 20 μm may be four or more, or seven or more, in each observation range. The number of multiple recesses 53 in a width of 20 μm may be 15 or less, or 11 or less, in each observation range. The spacing between recesses 53 may be between 0.5 μm and 10 μm. The length of the recess 53 in the thickness direction of the laminate 10 may be 2 μm or less.

[0048] The length of the first region 51 in the thickness direction of the laminate 10 can be the same as the depth of the groove 20 described above. In this embodiment, the surface on which traces of the groove 20 remain is the longitudinal side surface 10c, but depending on the shape of the semiconductor element 100, a side surface other than the longitudinal side surface 10c may be the surface on which traces of the groove 20 remain.

[0049] The multiple semiconductor layers 12 may include a first conductivity type semiconductor layer 121, a second conductivity type semiconductor layer 122, and an active layer 123 sandwiched between the first conductivity type semiconductor layer 121 and the second conductivity type semiconductor layer 122. The first conductivity type semiconductor layer 121 is, for example, an n-type semiconductor layer. The second conductivity type semiconductor layer 122 is, for example, a p-type semiconductor layer. The substrate 11, the first conductivity type semiconductor layer 121, the active layer 123, and the second conductivity type semiconductor layer 122 may be in direct contact with each other, or another semiconductor layer may be arranged between them. For example, an undoped layer may be arranged between the second conductivity type semiconductor layer 122 and the active layer 123. The active layer 123 can be a multiple quantum well structure or a single quantum well structure. Examples of the multiple semiconductor layers 12 include, in order from the substrate 11 side, an n-side cladding layer, an n-side optical guide layer, an active layer 123, a p-side electron confinement layer, a p-side optical guide layer, a p-side cladding layer, and a p-side contact layer. For example, the n-side cladding layer is a first conductivity type semiconductor layer 121, and the p-side cladding layer is a second conductivity type semiconductor layer 122.

[0050] The semiconductor element 100 may have a first electrode 31 and a second electrode 32. The semiconductor element 100 may also have an insulating film 33. If the semiconductor element 100 is a semiconductor laser element, the semiconductor element 100 may have a light-reflecting film or a protective film provided on the side surface 10d in the short direction. The length of the semiconductor element 100 in the longitudinal direction may be twice or more the length in the short direction. The length of the semiconductor element 100 in the longitudinal direction may be 50 times or less the length in the short direction.

[0051] (Light-emitting device and method for manufacturing the same) Figure 15 is a flowchart showing the manufacturing method of the light-emitting device of this embodiment. Figure 16 is a schematic cross-sectional view showing the light-emitting device of this embodiment.

[0052] As shown in Figure 15, the manufacturing method of the light-emitting device 400 of this embodiment includes a step S201 for obtaining a semiconductor element 100 and a step S202 for joining the semiconductor element 100 to a submount. The manufacturing method of the semiconductor element 100 described above is used in step S201 for obtaining the semiconductor element 100. This makes it possible to reduce the probability of cracks occurring in the semiconductor element 100 in the light-emitting device 400.

[0053] The light-emitting device 400 includes a semiconductor element 100 and a submount 200 to which the semiconductor element 100 is fixed. This makes it possible to obtain a light-emitting device 400 having a semiconductor element 100 with a reduced rate of cracking. The light-emitting device 400 may have a first metal film 210 provided on the upper surface of the submount 200 and a second metal film 220 provided on the lower surface of the submount 200. It may also have only one of the first metal film 210 and the second metal film 220. The light-emitting device 400 may have a housing 300.

[0054] Even if no abnormal cracks or defects are found in semiconductor elements during pre-assembly visual evaluation, cracks may be observed in the semiconductor elements after they have been fixed to a submount or after they have been driven. Since such cracks extend from the grooves used to divide the element during the division process, it is possible that minute cracks (microcracks) are generated during the processing of the grooves. After the grooves are processed, it is possible that a load is applied to the semiconductor element that causes the microcracks to extend, leading to cracks. Factors that cause a load that causes microcracks to extend include the load when dividing the laminate, heat generation or heating of the semiconductor element, and stress application due to the difference in thermal expansion coefficients between the semiconductor element and the submount that fixes it.

[0055] By forming grooves 20 with branched ends in the laminate 10 and dividing it starting from the grooves 20, the probability of cracks being observed after fixing to the submount can be reduced. This is thought to be because dividing the laminate starting from such grooves 20 reduces the load when dividing it. This reduction in load is thought to suppress the propagation of microcracks, thereby reducing the probability of cracks occurring.

[0056] The side length of the semiconductor element 100 is preferably 1 mm or more, and more preferably 3 mm or more. The side length of the semiconductor element 100 may also be 4 mm or more. The longer the side length of the semiconductor element 100, the greater the optical output of the semiconductor element 100 can be increased. As the optical output increases, the amount of heat generated also tends to increase, but by providing the groove 20, the probability of cracking occurring in the semiconductor element 100 can be reduced.

[0057] A bonding material may be used to bond the submount 200 and the semiconductor element 100. The first metal film 210 may also contain the bonding material. Examples of bonding materials include inorganic bonding materials. This reduces the possibility of dust collection when the semiconductor element 100 is a semiconductor laser element. Examples of inorganic bonding materials include bonding materials consisting only of metal, such as AuSn. An inorganic bonding material may also be formed by using a paste containing metal particles and an organic binder, and volatilizing the organic binder by heating.

[0058] The heat from the semiconductor element 100 can be dissipated to the housing 300 and its surroundings via the submount 200. For this reason, it is preferable that the submount 200 be made of a material with good thermal conductivity. It is preferable that the submount 200 be a diamond submount. This improves the heat dissipation performance of the submount 200. When the submount 200 is a diamond submount, the difference in thermal expansion coefficients with the semiconductor element 100 is relatively large, but by providing grooves 20, the probability of cracking occurring in the semiconductor element 100 can be reduced. The thickness of the submount 200 is, for example, 0.3 mm.

[0059] Each of the first metal film 210 and the second metal film 220 may contain at least one metal selected from the group consisting of, for example, Ti, Pt, Cu, and Au. The first metal film 210 and the second metal film 220 are made of, for example, Cu. The thickness of the first metal film 210 is, for example, 50 μm. The thickness of the second metal film 220 is, for example, 50 μm. A single or multilayer metal layer may be provided on the lower and / or upper surface of the first metal film 210. A single or multilayer metal layer may be provided on the lower and / or upper surface of the second metal film 220.

[0060] The housing 300 encloses the semiconductor element 100 and the submount 200. The housing 300 can hermetically seal the semiconductor element 100 and the submount 200. This reduces the possibility of dust collection when the semiconductor element 100 is a semiconductor laser element. The housing 300 may include metal, ceramics, or a composite thereof. If the semiconductor element 100 is a light-emitting element, the housing 300 has a light-transmitting section for extracting light emitted by the light-emitting element to the outside. The light-transmitting section may be formed from glass or sapphire. The light-emitting device 400 may further have a reflective member that reflects light emitted by the light-emitting element.

[0061] (Reference examples 1~5) As semiconductor devices for Reference Examples 1 to 5, semiconductor laser devices with a planar shape having longitudinal and transverse directions were fabricated. First, a laminate made of a group III nitride semiconductor was prepared as the laminate. A GaN substrate was used as the substrate. The thickness of the laminate was approximately 60 μm. Next, the laminate was cleaved to form the surface that would become the transverse side. Then, grooves were formed in the laminate by laser processing, and the longitudinal side was formed by dividing from the grooves. The grooves were formed on the side of the first main surface of the laminate, and then the side of the second main surface of the laminate was pressed with a pressing member. The longitudinal length of semiconductor device 100 was 1.2 mm. The grooves were formed using a nanosecond laser with a center wavelength of 355 nm. The average output of the laser processing using the nanosecond laser was 1 W, and the groove depth and repetition frequency are as shown in Table 1.

[0062] (Comparative Example, Reference Example 6) For the comparative example and Reference Example 6, semiconductor laser elements were fabricated using the same specifications as Reference Example 1, except for the repetition frequency shown in Table 1.

[0063] [Table 1]

[0064] (Evaluation of groove shape) During the fabrication process of each reference example and comparative example semiconductor device, the groove shape was observed after groove formation but before pressing and dividing. An optical microscope was used to focus on the groove from the side of the laminate and to determine the groove shape from the image. The results are shown in Table 1. As shown in Table 1, Reference Examples 1 to 5 had grooves with two or more branches at the tip. Figure 13 shows an optical microscope image of the groove in Reference Example 2. The comparative example and Reference Example 6 had V-shaped grooves, and no branching at the tip was observed.

[0065] (Appearance evaluation) Multiple semiconductor devices were fabricated for each reference example and comparative example, and their appearance was evaluated. The appearance evaluation focused on abnormal cracking and surface chipping, and the occurrence rates of each were assessed. Abnormal cracking was determined by whether or not a crack occurred that deviated from the groove and reached the first electrode of the semiconductor device. Surface chipping was determined by whether or not the shortest distance between the longitudinal edge of the semiconductor device and the first electrode in a plan view was less than a predetermined distance, even if it did not qualify as abnormal cracking. The results are shown in Table 1. Abnormal cracking occurred in the comparative example and reference example 6, but not in reference examples 1 through 5. Regarding surface chipping, the occurrence frequency for reference examples 1 through 5 was lower than that of the comparative example. For reference examples 1 through 4, the occurrence frequency of surface chipping was less than 1%, which was lower than that of both the comparative example and reference example 6.

[0066] (Observation of the side) Observation of each reference example and comparative example semiconductor device with an optical microscope revealed that in all cases, a first region containing a rough surface believed to be groove traces and a second region containing multiple streaky steps extending from the first region toward the second main surface were confirmed. Of these, SEM images were taken of the longitudinal side of the semiconductor devices of Reference Example 2, Reference Example 5, and the comparative example. The SEM images were taken using secondary electron (SE) images with a magnification of 2,500x and an acceleration voltage of 5kV. Using the SEM images, the number of recesses located at the boundary between the first and second regions was counted at five different locations within a 20μm width range along the longitudinal direction of the semiconductor device. The results are shown in Table 2. In Table 2, determination points A to E are the locations used to determine the number of recesses. Note that determination point A in Reference Example 2, determination point A in Reference Example 5, and determination point A in the comparative example each refer to the first determination point and are not necessarily in the same location. Similarly, determination points B to E are not necessarily in the same location. As shown in Table 2, no recesses were observed in the comparative example where a V-shaped groove was formed. In Reference Examples 2 and 5, where grooves with branched tips were formed, multiple recesses were observed in each respective area. Figure 14 shows an SEM image of the longitudinal side view of the semiconductor device of Reference Example 2. In the SEM image, the roughly circular areas located at the boundary between the first and second regions, which are darker than those regions, are recesses. These recesses are thought to be the remaining branched portions at the tips of the grooves.

[0067] [Table 2]

[0068] Through the information described above, the following technical details are disclosed in this disclosure. (Section 1) A step of preparing a laminate including a substrate having a crystalline structure and a plurality of semiconductor layers stacked on the substrate, A step of obtaining a semiconductor element by forming a groove with a branched tip in the laminate and dividing it starting from the groove, A method for manufacturing a light-emitting device, comprising the step of joining the semiconductor element to a submount. (Section 2) The method for manufacturing a light-emitting device according to item 1, wherein the submount is a diamond submount. (Section 3) The laminate has a first main surface and a second main surface, A method for manufacturing a light-emitting device according to item 1 or 2, wherein in the dividing step, a groove is formed that reaches the first main surface but does not reach the second main surface, and the laminate on which the groove is formed is pressed from the side of the second main surface to generate a crack starting from the groove, thereby dividing the laminate. (Section 4) A method for manufacturing a light-emitting device according to any one of items 1 to 4, wherein in the dividing step, the direction in which the laminate is divided is different from the direction of easy cleavage of the substrate. (Section 5) The planar shape of the aforementioned semiconductor element has a short side and a long side. The method for manufacturing a light-emitting device according to any one of claims 1 to 4, wherein the division step is a step of forming the longitudinal side surface. (Section 6) A method for manufacturing a light-emitting device according to item 5, comprising the step of forming the short-side surface by dividing the laminate by cleavage. (Section 7) The plurality of semiconductor layers include a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer sandwiched between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. The method for manufacturing a light-emitting device according to any one of claims 1 to 6, wherein the semiconductor element is a semiconductor laser element. (Section 8) The method for manufacturing a light-emitting device according to any one of items 1 to 7, wherein the length of the side surface of the semiconductor element formed by the dividing step is 3 mm or more. (Section 9) A light-emitting device comprising a semiconductor element and a diamond submount on which the semiconductor element is fixed, The length of the side surface of the semiconductor element is 3 mm or more. The semiconductor element comprises a laminate having longitudinal sides, transverse sides, a first main surface, and a second main surface. The longitudinal side surface has a first region including a rough surface and a second region including a plurality of striated steps extending from the first region toward the second main surface, A light-emitting device having a plurality of recesses provided at the boundary between the first region and the second region. (Section 10) The longitudinal side surface has a first edge intersecting the first main surface, a second edge intersecting the transverse side surface, and a third edge intersecting the second main surface. The light-emitting device according to item 9, wherein the first region has a first boundary coinciding with the first edge, a second boundary away from the second edge and facing the second edge, and a third boundary away from the third edge and facing the third edge, and the plurality of recesses are provided on the third boundary. (Section 11) The light-emitting device according to claim 9 or 10, wherein at least five different locations on the longitudinal side surface, the number of the plurality of recesses in a width of 20 μm is four or more. [Explanation of Symbols]

[0069] 10 Laminate 10a First main surface 10b Second main surface 10c Longitudinal side 10d Side view in the short direction 11 circuit boards 12 Multiple semiconductor layers 12a Ridge 121 First Conductivity Semiconductor Layer 122 Second Conductivity Semiconductor Layer 123 Active layer 20 grooves 20a Tip 20b Connecting part 31 1st electrode 32 2nd electrode 32a Contact electrode 32b Pad electrode 33 Insulating film 40 Pressing member 51 First area 51a 1st boundary 51b Second boundary 51c third boundary 52 Second area 53 Recess 54 First side 55 Second side 56 Third side 100 semiconductor devices 200 Submount 210 First metal film 220 Second metal film 300 cabinets 400 Light-emitting devices

Claims

1. A step of preparing a laminate including a substrate having a crystalline structure and a plurality of semiconductor layers stacked on the substrate, A step of obtaining a semiconductor element by forming a groove with a branched tip in the laminate and dividing it starting from the groove, A method for manufacturing a light-emitting device, comprising the step of joining the semiconductor element to a submount.

2. The method for manufacturing a light-emitting device according to claim 1, wherein the submount is a diamond submount.

3. The laminate has a first main surface and a second main surface, The method for manufacturing a light-emitting device according to claim 1, wherein in the division step, a groove is formed that reaches the first main surface but does not reach the second main surface, and the laminate on which the groove is formed is pressed from the side of the second main surface to generate a crack starting from the groove, thereby dividing the laminate.

4. The method for manufacturing a light-emitting device according to claim 1, wherein in the division step, the direction in which the laminate is divided is different from the direction of easy cleavage of the substrate.

5. The planar shape of the aforementioned semiconductor element has a short side and a long side. The method for manufacturing a light-emitting device according to claim 1, wherein the division step is a step of forming the longitudinal side surface.

6. A method for manufacturing a light-emitting device according to claim 5, comprising the step of forming the short-side surface by dividing the laminate by cleavage.

7. The plurality of semiconductor layers include a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer sandwiched between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. The method for manufacturing a light-emitting device according to any one of claims 1 to 6, wherein the semiconductor element is a semiconductor laser element.

8. The method for manufacturing a light-emitting device according to claim 1, wherein the length of the side surface of the semiconductor element formed by the division step is 3 mm or more.

9. A light-emitting device comprising a semiconductor element and a diamond submount on which the semiconductor element is fixed, The length of the side surface of the semiconductor element is 3 mm or more. The semiconductor element comprises a laminate having longitudinal sides, transverse sides, a first main surface, and a second main surface. The longitudinal side surface has a first region including a rough surface and a second region including a plurality of striated steps extending from the first region toward the second main surface, A light-emitting device having a plurality of recesses provided at the boundary between the first region and the second region.

10. The longitudinal side surface has a first edge intersecting the first main surface, a second edge intersecting the transverse side surface, and a third edge intersecting the second main surface. The light-emitting device according to claim 9, wherein the first region has a first boundary coinciding with the first edge, a second boundary away from the second edge and facing the second edge, and a third boundary away from the third edge and facing the third edge, and the plurality of recesses are provided on the third boundary.

11. The light-emitting device according to claim 9 or 10, wherein at least five different locations on the longitudinal side surface, the number of the plurality of recesses with a width of 20 μm is four or more.

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