Wafer processing method
The method addresses adhesive residue and cutting debris issues by using a substrate with protrusions and recesses, laser beam irradiation to form a modified layer, and expanding sealed gas in a low-pressure environment, resulting in high-quality device chips.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- DISCO CORP
- Filing Date
- 2024-10-30
- Publication Date
- 2026-05-15
AI Technical Summary
Existing wafer processing methods result in adhesive residue and cutting debris on the surface of device chips, degrading their quality.
A method involving a substrate preparation step, sealing step, modified layer formation, and splitting step to divide wafers into individual device chips without adhesive or cutting debris, using a substrate with protrusions and recesses, laser beam irradiation to form a modified layer, and expanding sealed gas in a low-pressure environment.
The method effectively prevents adhesive layers and cutting debris from adhering to the device chip surface, ensuring high-quality device chips.
Smart Images

Figure 2026079155000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for processing a wafer that divides a wafer on which a device region partitioned by a planned division line and an outer peripheral surplus region surrounding the device region are formed on the surface into individual device chips.
Background Art
[0002] A wafer on which a plurality of devices such as ICs and LSIs are partitioned by a planned division line and formed on the surface is ground on the back surface by a grinding device to form a predetermined thickness, and then divided into individual device chips by a dicing device. Each of the divided device chips is used in electrical devices such as mobile phones and personal computers.
[0003] The grinding device includes a chuck table for holding a wafer, grinding means rotatably mounted with a grinding wheel having an annularly arranged grinding stone for grinding the wafer held on the chuck table, and feeding means for feeding the grinding means, and can process the wafer to a desired thickness (see, for example, Patent Document 1).
[0004] When the wafer is divided into individual device chips by a dicing device, the wafer is accommodated in the opening of a frame having an opening for accommodating the wafer at the center, and a frame unit in which the frame and the wafer are integrated by a dicing tape is formed. The planned division line formed on the surface of the wafer is cut with a cutting blade to divide the wafer into individual device chips.
[0005] Also, when dividing a wafer on which devices that dislike dirt such as MEMS, CCD, and CMOS are formed on the surface into individual device chips, in order to avoid adhesion of cutting chips, the planned division line formed from the back surface to the surface of the wafer is detected by an infrared camera, and dicing processing is performed from the back surface of the wafer (see, for example, Patent Document 2).
Prior Art Documents
Patent Documents
[0006] [Patent Document 1] Japanese Patent Publication No. 2017-193010 [Patent Document 2] Japanese Patent Application Publication No. 7-75955 [Overview of the project] [Problems that the invention aims to solve]
[0007] However, when dicing tape is applied to the wafer surface, some of the adhesive layer adheres to the device surface, creating residue that degrades the quality of the device chip.
[0008] The object of the present invention is to provide a wafer processing method in which cutting debris and adhesive layers do not remain on the surface of the device chip. [Means for solving the problem]
[0009] According to the present invention, the following wafer processing method is provided that solves the above problems. That is, A wafer processing method for dividing a wafer, in which a device region demarcated by division lines and an outer peripheral surplus region surrounding the device region are formed on its surface, into individual device chips, A substrate preparation step of preparing a substrate having an annular protrusion corresponding to the excess outer region of the wafer and a recess surrounded by the protrusion corresponding to the device region of the wafer, A sealing step in which, in an atmospheric pressure environment, the excess outer region of the wafer is positioned on the protrusion of the substrate and attached via an adhesive, thereby forming a sealed body that seals the gas by facing the device region of the wafer and the recess of the substrate, A modified layer formation step involves positioning the focal point of a laser beam with a wavelength that is transparent to the wafer of the sealing body within the area corresponding to the planned division line, irradiating the wafer with the laser beam, and forming a modified layer within the area corresponding to the planned division line that will trigger the division; A splitting step in which the gas sealed in the sealant is expanded in a low-pressure environment below atmospheric pressure to divide the wafer into individual device chips, A method for processing wafers including is provided.
[0010] Preferably, the process includes an integration step before the splitting step in which a frame having a central opening for housing the wafer is positioned on the back surface of the wafer, and tape is applied to integrate the wafer and the frame. After the sealing step, it is desirable to include a planarization step in which the back surface of the wafer is flattened in a low-pressure environment below atmospheric pressure. After the splitting step, an expansion step may be included in which the tape is expanded to expand the spacing between individual device chips. [Effects of the Invention]
[0011] The wafer processing method of the present invention is A wafer processing method for dividing a wafer, in which multiple devices are formed on its surface, having device regions demarcated by division lines and an outer peripheral surplus region surrounding the device regions, into individual device chips, A substrate preparation step of preparing a substrate having an annular protrusion corresponding to the excess outer region of the wafer and a recess surrounded by the protrusion corresponding to the device region of the wafer, A sealing step in which, in an atmospheric pressure environment, the excess outer region of the wafer is positioned on the protrusion of the substrate and attached via an adhesive, thereby forming a sealed body that seals the gas by facing the device region of the wafer and the recess of the substrate, A modified layer formation step involves positioning the focal point of a laser beam with a wavelength that is transparent to the wafer of the sealing body within the area corresponding to the planned division line, irradiating the wafer with the laser beam, and forming a modified layer within the area corresponding to the planned division line that will trigger the division; A splitting step in which the gas sealed in the sealant is expanded in a low-pressure environment below atmospheric pressure to divide the wafer into individual device chips, Because it contains [a specific material / component], cutting debris and adhesive layers do not remain on the surface of the device chip. [Brief explanation of the drawing]
[0012] [Figure 1] Perspective view of the substrate. [Figure 2] Schematic diagram showing the sealing process. [Figure 3] Schematic diagram showing a state in which a sealing body is held on the chuck table of a grinding device. [Figure 4] Schematic diagram showing the planarization process. [Figure 5] (a) Schematic diagram showing the modified layer formation process, (b) Partial cross-sectional view of the sealing body in which the modified layer is formed inside the wafer corresponding to the planned division line, (c) Perspective view of the sealing body shown in (b). [Figure 6] Schematic diagram showing the integration process. [Figure 7] Perspective view of the sealing body integrated with the frame via a tape. [Figure 8] Schematic diagram showing the expansion process.
Embodiments for Carrying Out the Invention
[0013] Hereinafter, preferred embodiments of a wafer processing method according to the present invention will be described with reference to the drawings.
[0014] (Substrate Preparation Step) In the present embodiment, first, a substrate preparation step is performed to prepare a substrate 2 (see FIG. 1) having an annular convex portion corresponding to the outer peripheral surplus region of the wafer and a concave portion surrounded by the convex portion and corresponding to the device region of the wafer. The substrate 2 is disk-shaped and can be formed from an appropriate hard material such as glass. An annular convex portion 2a corresponding to the outer peripheral surplus region of the wafer is formed on the outer peripheral portion of one side (the upper surface in FIG. 1) of the substrate 2. Further, the region surrounded by the convex portion 2a is a circular concave portion 2b corresponding to the device region of the wafer. <After performing the substrate preparation process, a sealing process is carried out in an atmospheric pressure environment in which the excess outer region of the wafer is positioned on the protrusion 2a of the substrate 2 and attached via an adhesive, thereby forming a sealed body that seals the gas by facing the device region of the wafer and the recess 2b of the substrate 2.
[0016] Figure 2 shows a wafer 4 to be attached to substrate 2 during the encapsulation process. The wafer 4 is disc-shaped, and its diameter is the same as that of substrate 2. The wafer 4 can be formed from a suitable semiconductor material such as silicon. On the surface 4a of the wafer 4, a device region 10 is formed, in which multiple devices 6 such as ICs and LSIs are demarcated by grid-like division lines 8, and an outer peripheral surplus region 12 surrounds the device region 10. In Figure 2, the ring-shaped boundary 14 between the device region 10 and the outer peripheral surplus region 12 is shown by a dashed line for convenience, but in reality, there is no line indicating the boundary 14.
[0017] In the encapsulation process, as shown in Figure 2, the device region 10 of the wafer 4 and the recess 2b of the substrate 2 are placed opposite each other, and the excess outer peripheral region 12 of the wafer 4 is attached to the protrusion 2a of the substrate 2 via an adhesive to form a encapsulant 16. The adhesive may be, for example, an ultraviolet-curing resin or an epoxy resin. This encapsulation process is carried out in an atmospheric pressure environment. Therefore, atmospheric pressure gas is sealed inside the encapsulant 16.
[0018] (flattening process) After the sealing process, a planarization process is performed to flatten the back surface 4b of the wafer 4 in a low-pressure environment below atmospheric pressure. However, the planarization process is optional and may be omitted.
[0019] (Grinding device 18) The planarization process can be carried out using, for example, the grinding apparatus 18 shown in Figures 3 and 4. The grinding apparatus 18 comprises a chuck table 20 for suction holding the sealant 16 and a grinding means 22 (see Figure 4) for grinding the wafer 4 of the sealant 16 held by the chuck table 20. The grinding apparatus 18 is installed in a depressurized chamber where the pressure environment is slightly lower than atmospheric pressure. Alternatively, instead of installing the grinding apparatus 18 in a depressurized chamber, the inside of the housing of the grinding apparatus 18 may be kept in a low-pressure environment slightly lower than atmospheric pressure.
[0020] (Chuck table 20 of grinding device 18) As shown in Figure 3, a circular suction chuck 24 is positioned at the upper end of the chuck table 20. The suction chuck 24 is made of a porous material such as porous ceramics and is connected to a suction means (not shown). The chuck table 20 is also configured to rotate about its axis in the vertical direction.
[0021] (Grinding means 22 of grinding device 18) As shown in Figure 4, the grinding means 22 includes a spindle 26 extending in the vertical direction and a disc-shaped wheel mount 28 fixed to the lower end of the spindle 26. An annular grinding wheel 32 is fastened to the lower surface of the wheel mount 28 by bolts 30. Multiple grinding wheels 34 are fixed to the outer peripheral edge of the lower surface of the grinding wheel 32, arranged in an annular pattern at intervals in the circumferential direction.
[0022] In the planarization process, first, the sealed material 16 is held in place by suction on the upper surface of the chuck table 20. At this time, the back surface 4b of the wafer 4 is facing upwards, and the sealed material 16 is placed on the upper surface of the chuck table 20. Then, a suction force is generated on the upper surface of the suction chuck 24 using a suction means, and the substrate 2 side of the sealed material 16 is held in place by suction on the upper surface of the suction chuck 24.
[0023] Once the sealing body 16 is held by suction on the upper surface of the chuck table 20, the back surface 4b of the wafer 4 is ground to flatten it. At this time, the chuck table 20 is rotated at a predetermined rotational speed (for example, 300 rpm) in the direction indicated by arrow R1 in Figure 4. The spindle 26 is also rotated at a predetermined rotational speed (for example, 6000 rpm) in the direction indicated by arrow R2. Next, the spindle 26 is lowered to bring the grinding wheel 34 into contact with the back surface 4b of the wafer 4, and grinding water is supplied to the part of the back surface 4b of the wafer 4 that is in contact with the grinding wheel 34. After that, the spindle 26 is lowered at a predetermined feed rate (for example, 1.0 μm / s). This grinds and flattens the back surface 4b of the wafer 4 and thins the wafer 4 to a predetermined thickness.
[0024] In this embodiment, the depressurized chamber in which the grinding device 18 is installed is kept in a low-pressure environment slightly lower than atmospheric pressure, so that the pressure inside the sealant 16 (atmospheric pressure) is higher than the pressure outside the sealant 16 (low pressure). Therefore, even when a downward pressing force is applied to the wafer 4 from the grinding means 22 during grinding, the central part of the wafer 4 does not become concave, and the back surface 4b of the wafer 4 can be ground and flattened. Thus, in the flattening process, in order to prevent the wafer 4 from becoming concave during grinding due to the pressure difference between the inside and outside of the sealant 16, it is important to maintain a low-pressure environment (for example, 0.95 atmospheres) slightly lower than atmospheric pressure so that the back surface 4b of the wafer 4 remains flat even when a downward pressing force is applied to the wafer 4 from the grinding means 22.
[0025] If the external pressure of the sealant 16 is the same as the pressure (atmospheric pressure) at which the sealant 16 was formed, then grinding the back surface 4b of the wafer 4 will not flatten it. As described above, in this embodiment, the excess outer peripheral region 12 of the wafer 4 is supported by the convex portion 2a of the substrate 2, but the device region 10 of the wafer 4 facing the concave portion 2b of the substrate 2 is not supported. Therefore, when grinding the wafer 4, the downward pressing force acting on the wafer 4 from the grinding means 22 causes the central part of the wafer 4 to become recessed compared to the outer peripheral region of the wafer 4. As a result, the amount of grinding in the central part of the wafer 4 is less than the amount of grinding in the outer peripheral region of the wafer 4, so grinding the back surface 4b of the wafer 4 will not flatten it.
[0026] Conversely, if the external pressure of the sealant 16 is too low, the back surface 4b of the wafer 4 cannot be flattened. This is because if the external pressure of the sealant 16 is too low, the central part of the wafer 4 will bulge, and the amount of grinding in the central part of the wafer 4 will be greater than that in the outer part of the wafer 4. In addition, if the external pressure of the sealant 16 is too low, the suction holding force of the chuck table 20 will decrease, making it impossible to properly hold the sealant 16, and there is a risk that the wafer 4 will crack due to the expansion of the gas inside the sealant 16.
[0027] (Modified layer formation process) After the planarization process, a modified layer formation process is performed in which the focal point of a laser beam with a wavelength that is transparent to the wafer 4 of the encapsulant 16 is positioned inside the wafer corresponding to the planned division line 8, and the laser beam is irradiated onto the wafer 4 to form a modified layer that will trigger the division inside the planned division line 8. The modified layer formation process may be performed under atmospheric pressure.
[0028] (Laser processing device 36) The modified layer formation process can be carried out, for example, using the laser processing apparatus 36 shown in Figure 5(a). The laser processing apparatus 36 includes a chuck table 38 for suction holding the sealant 16, a laser beam irradiation means 40 for irradiating the wafer 4 of the sealant 16 held by the chuck table 38 with a laser beam LB, and an imaging means (not shown) for imaging the wafer 4 of the sealant 16 held by the chuck table 38.
[0029] (Chuck table 38 of laser processing machine 36) A circular suction chuck (not shown) is positioned at the upper end of the chuck table 38, similar to the chuck table 20 of the grinding device 18. The suction chuck is made of a porous material such as porous ceramics and is connected to a suction means (not shown). The chuck table 38 is configured to rotate about its axis in the vertical direction and to move in the X-axis direction indicated by arrow X in Figure 5(a) and the Y-axis direction indicated by arrow Y in Figure 5(a). The X-axis and Y-axis directions are orthogonal, and the XY plane defined by the X-axis and Y-axis directions is substantially horizontal.
[0030] (Laser beam irradiation means 40 of the laser processing device 36) The laser beam irradiation means 40 includes an oscillator (not shown) that emits a pulsed laser beam LB with a wavelength that is penetrating to the wafer 4 of the sealing body 16, and a concentrator 42 that focuses the pulsed laser beam LB emitted by the oscillator and irradiates the wafer 4 of the sealing body 16, which is held in place by suction on the chuck table 38.
[0031] (Imaging means of laser processing apparatus 36) The imaging means includes a conventional image sensor (CCD) that images the wafer 4 with visible light, an infrared irradiation means that irradiates infrared light that passes through the wafer 4, an optical system that captures the infrared light irradiated by the infrared irradiation means, and an image sensor (infrared CCD) that outputs an electrical signal corresponding to the infrared light captured by the optical system.
[0032] In the modified layer formation process, the sealant 16 is first held by suction on the upper surface of the chuck table 38. At this time, the back surface 4b of the wafer 4 is facing upwards, and the sealant 16 is placed on the upper surface of the chuck table 38. Then, a suction force is generated on the upper surface of the suction chuck using a suction means, and the substrate 2 side of the sealant 16 is held by suction on the upper surface of the suction chuck.
[0033] Once the sealing body 16 is held in place by suction on the upper surface of the chuck table 38, the planned division line 8 of the wafer 4 is aligned in the X-axis direction. In this process, infrared light is irradiated from the imaging means, and the surface 4a of the wafer 4 is imaged using the infrared light transmitted from the back surface 4b of the wafer 4 to detect the planned division line 8. Then, based on the image of the surface 4a of the wafer 4 captured by the imaging means, the planned division line 8 is aligned in the X-axis direction.
[0034] Once the planned division line 8 of wafer 4 is aligned in the X-axis direction, the focal point of the laser beam LB is positioned inside the planned division line 8. At this time, the height of the back surface 4b of wafer 4 (height of the top surface of the sealant 16) is detected by the height detection means (not shown) of the laser processing device 36. Then, using the detected height of the back surface 4b as a reference, the focal point of the laser beam LB is positioned at the required height inside the planned division line 8.
[0035] Once the focal point of the laser beam LB is positioned within the division line 8, the laser beam LB is irradiated onto the wafer 4 to form a modified layer 48 within the division line 8. Specifically, while moving the chuck table 38 in the X-axis direction at a predetermined feed rate, a laser beam LB with a wavelength that is transparent to the wafer 4 is irradiated onto the wafer 4 to form a modified layer 48 that will trigger the division within the division line 8. When forming the modified layer 48, it is preferable to irradiate the laser beam LB with varying focal point heights to form multiple modified layers 48 within the same division line 8 at vertical intervals (see Figure 5(b)). Note that adjacent modified layers 48 in the vertical direction are connected by cracks (not shown) extending from the modified layer 48.
[0036] Next, the chuck table 38 is indexed and moved in the Y-axis direction by the amount of the spacing in the Y-axis direction of the division lines 8. Then, by alternately repeating the irradiation of the laser beam LB and indexing and moving the table, the modified layer 48 is formed along all of the division lines 8 that have been aligned in the X-axis direction. After rotating the chuck table 38 by 90 degrees, the irradiation of the laser beam LB and indexing and moving the table are repeated alternately to form the modified layer 48 inside all of the division lines 8 that are orthogonal to the division lines 8 in which the modified layer 48 was previously formed. In this way, the modified layer 48 is formed in a grid pattern inside the grid-like division lines 8 (see Figure 5(c)).
[0037] (integrated process) After the modified layer formation process is carried out, an integration process is performed in which the opening of the frame, which has an opening in the center for housing the wafer 4, is positioned on the back surface 4b of the wafer 4, tape is applied, and the wafer 4 and the frame are integrated. However, the integration process is optional and may be omitted.
[0038] Figure 6 shows an annular frame 50 used in a single process. A circular opening 50a capable of accommodating a wafer 4 is formed in the center of the frame 50. A circular tape 52 is attached to the inner periphery of the frame 50. The tape 52 may be an adhesive tape or a thermocompression sheet. The thermocompression sheet is a sheet of thermoplastic synthetic resin (for example, a polyolefin resin) that softens or melts and exhibits adhesive properties when heated to a temperature near its melting point.
[0039] In the integrated process, as shown in Figure 6, the sealing body 16 is placed on the upper surface of the table 54 with the back surface 4b of the wafer 4 facing upwards. If adhesive tape is used as the tape 52, the adhesive side of the tape 52 is pressed against the back surface 4b of the wafer 4 to adhere it. This allows the wafer 4 and the frame 50 to be integrated via the tape 52, as shown in Figure 7. On the other hand, if a thermocompression sheet is used as the tape 52, the tape 52 is pressed against the back surface 4b of the wafer 4 using a heater-equipped roller (not shown) heated to a temperature near the melting point of the thermocompression sheet to thermocompression adhere it.
[0040] (splitting process) After the integrated process is carried out, a splitting process is performed in a low-pressure environment below atmospheric pressure, in which the gas sealed in the sealant 16 is expanded to split the wafer 4 into individual device chips 6. In the splitting process, the sealant 16 is placed in a depressurization chamber (not shown), and the depressurization chamber is sealed. Then, the pressure inside the depressurization chamber is reduced using a depressurization means to create a low-pressure environment below atmospheric pressure. As a result, the gas sealed in the sealant 16 expands in the atmospheric pressure environment, causing the wafer 4 to crack along the modified layer 48 formed inside the wafer 4, and splitting it into individual device chips 6. Thus, in the splitting process, it is important to create a low-pressure environment (for example, 0.8 atmospheres) that is low enough to allow the gas sealed in the sealant 16 to expand in the atmospheric pressure environment and split the wafer 4 into individual device chips 6 along the modified layer 48, in order to split the wafer 4 by the pressure difference between the inside and outside of the sealant 16.
[0041] (Expansion process) In this embodiment, after performing the division process, an expansion process is performed to expand the tape 52 and widen the spacing between individual device chips 6. However, the expansion process is optional and may be omitted. In the expansion process, as shown in Figure 8, after removing the substrate 2 from the wafer 4, a suitable tension generating device (not shown) is used to apply radial tension to the tape 52 along the radial direction of the wafer 4, thereby widening the spacing between individual device chips 6. In Figure 8, the division grooves between the device chips 6 are indicated by reference numeral 56. Widening the spacing between individual device chips 6 makes it easier to pick up the device chips 6 from the tape 52.
[0042] As described above, in this embodiment, first, a substrate 2 is prepared, which has an annular protrusion 2a corresponding to the excess outer region 12 of the wafer 4 and a recess 2b surrounded by the protrusion 2a and corresponding to the device region 10 of the wafer 4. Next, in an atmospheric pressure environment, the excess outer region 12 of the wafer 4 is positioned on the protrusion 2a of the substrate 2 and attached via an adhesive, forming a sealed body 16 with the device region 10 of the wafer 4 and the recess 2b of the substrate 2 facing each other and sealing the gas. Next, the focal point of a laser beam LB with a wavelength that is transparent to the wafer 4 of the sealed body 16 is positioned inside the sealed body 16 corresponding to the division line 8, and the laser beam LB is irradiated onto the wafer 4 to form a modified layer 48 inside the division line 8 that will trigger the division. Then, in a low-pressure environment lower than atmospheric pressure, the gas sealed in the sealed body 16 is expanded to divide the wafer 4 into individual device chips 6. When forming the encapsulant 16 in this manner, the protrusions 2a of the substrate 2 and the excess outer peripheral region 12 of the wafer 4 are adhered together by adhesive, so that no adhesive adheres to the device region 10 of the wafer 4. Furthermore, in this embodiment, instead of cutting the wafer 4 with a cutting blade, a modified layer 48 that triggers the splitting is formed by irradiating the wafer 4 with a laser beam LB, thus preventing cutting debris from adhering to the surface 4a of the wafer 4. Therefore, according to this embodiment, no cutting debris or adhesive layer remains on the surface of the device chip 6. [Explanation of Symbols]
[0043] 2: Substrate 2a: Convex part 2b: recess 4: Wafer 4a: Wafer surface 4b: Back side of the wafer 6: Device (device chip) 8: Planned division line 10: Device area 12: Peripheral surplus area 16: Sealing body 48: Modified layer 50: Frame 50a: Frame opening 52: Tape LB: Laser beam
Claims
1. A wafer processing method for dividing a wafer, in which multiple devices are formed on its surface, having device regions demarcated by division lines and an outer peripheral surplus region surrounding the device regions, into individual device chips, A substrate preparation step of preparing a substrate having an annular protrusion corresponding to the excess outer region of the wafer and a recess surrounded by the protrusion corresponding to the device region of the wafer, A sealing step in which, in an atmospheric pressure environment, the excess outer region of the wafer is positioned on the protrusion of the substrate and attached via an adhesive, thereby forming a sealed body that seals the gas by facing the device region of the wafer and the recess of the substrate, A modified layer formation step involves positioning the focal point of a laser beam with a wavelength that is transparent to the wafer of the sealing body within the area corresponding to the planned division line, irradiating the wafer with the laser beam, and forming a modified layer within the area corresponding to the planned division line that will trigger the division; A splitting step in which the gas sealed in the sealant is expanded in a low-pressure environment below atmospheric pressure to divide the wafer into individual device chips, A method for processing wafers including [a specific component].
2. A wafer processing method according to claim 1, comprising an integration step before the splitting step, in which a frame having an opening for housing a wafer in the center is positioned on the back surface of the wafer, tape is applied to it, and the wafer and the frame are integrated.
3. A wafer processing method according to claim 1, further comprising a planarization step of flattening the back surface of the wafer in a low-pressure environment lower than atmospheric pressure after the sealing step.
4. A wafer processing method according to claim 2, further comprising an expansion step of expanding the tape after the division step to expand the spacing between individual device chips.