Internal circuit board

Abstract

To provide an internal circuit board capable of accurately measuring current values. [Solution] The built-in substrate 1, which houses the power devices SWH and SWL, comprises a plurality of conductive layers CL stacked via an insulating layer IL, a mounting section 65 on which a detection element 60 that measures the current value of the current flowing through the power devices SWH and SWL is mounted, and a heat receiving section 70 provided between the mounting section 65 and the power devices SWH and SWL to receive heat from the power devices SWH and SWL. The heat receiving section 70 is provided in a state that allows heat transfer with a first conductive layer CL6 on one end side in the stacking direction Z of the plurality of conductive layers CL, and the first conductive layer CL6 has a heat dissipation surface that dissipates heat from the power devices SWH and SWL.

Description

Technical Field

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[0001] The present invention relates to a built-in substrate in which a power device is built.

Background Art

[0002] Conventionally, a current sensor that measures the current value of a current flowing through a conductor has been used. As technologies related to such current sensors, for example, those described in Patent Documents 1 and 2 cited below exist.

[0003] Patent Document 1 describes a current sensor. In this current sensor, a Hall IC is provided via an insulating substrate on a bus bar through which a current to be measured flows. A magnetic shield is provided so as to surround the Hall IC and the bus bar. Thereby, the influence of magnetism from the surroundings is reduced.

[0004] Further, Patent Document 2 also describes a current sensor. This current sensor aims to achieve accurate detection by providing a current detection device portion on a spiral current path formed in a substrate.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] [[ID=4In recent years, embedded substrates in which power devices are embedded in the inner layers of the substrate have been used. Power devices generate heat during operation, but the current sensors described in Patent Documents 1 and 2 are not designed to measure the current value of power devices embedded in such embedded substrates, and it is difficult to accurately measure the current value due to the influence of heat from the power devices.

[0007] Therefore, a built-in circuit board capable of accurately measuring current values ​​is required. [Means for solving the problem]

[0008] The characteristic configuration of the embedded substrate according to the present invention is an embedded substrate in which a power device is embedded, comprising: a plurality of conductive layers laminated with an insulating layer in between; a mounting portion on which a detection element for measuring the current value of the current flowing through the power device is mounted; and a heat receiving portion provided between the mounting portion and the power device for receiving heat from the power device, wherein the heat receiving portion is provided in a state that allows heat transfer with a first conductive layer on one end side in the lamination direction of the plurality of conductive layers, and the first conductive layer has a heat dissipation surface for dissipating heat from the power device.

[0009] With this configuration, a heat dissipation surface and a heat-transferable heat receiving section are provided between the heat-generating component, such as a power device, and the detection element, thereby reducing the heat absorbed by the detection element from the heat-generating component. Consequently, an internal circuit board capable of accurately measuring current values ​​can be realized. [Brief explanation of the drawing]

[0010] [Figure 1] This is a circuit diagram consisting of power devices built into the internal circuit board. [Figure 2] This is an image diagram showing a cross-section of the internal circuit board. [Figure 3] This is a plan view of the first layer of the conductive layer. [Figure 4] This is a plan view of the second layer of the conductive layer. [Figure 5]This is a plan view of the third conductive layer. [Figure 6] This is a plan view of the fourth conductive layer. [Figure 7] This is a plan view of the fifth conductive layer. [Figure 8] This is a plan view of the sixth conductive layer. [Modes for carrying out the invention]

[0011] The embedded substrate according to the present invention is configured to accurately measure the current flowing through the power device embedded in the embedded substrate. The embedded substrate 1 of this embodiment will be described below. However, the embedded substrate 1 is not limited to the following embodiment and can be modified in various ways without departing from the spirit of the invention.

[0012] Figure 1 is a circuit diagram of which a part is formed on the internal circuit board 1 (see Figure 2) of this embodiment. Figure 1 shows an inverter 3 that converts DC power from the battery 2 into AC power to drive the motor M. A three-phase motor is used for the motor M. For this reason, the inverter 3 is configured with three legs 6 (hereinafter referred to as legs 6A, 6B, and 6C) which are each composed of a high-side switching element SWH (an example of a "power device") and a low-side switching element SWL (an example of a "power device") connected in series with each other. These switching elements SWH and SWL are, for example, n-type MOS-FETs (metal-oxide-semiconductor field-effect transistors).

[0013] The three legs 6A, 6B, and 6C are connected in parallel to each other to power line 2P, which is connected to the positive terminal of battery 2, and to power line 2N, which is connected to the negative terminal of battery 2. Each of the legs 6A, 6B, and 6C has the drain terminal of the switching element SWH connected to power line 2P, and the source terminal of the switching element SWL connected to power line 2N. The source terminal of the switching element SWH and the drain terminal of the switching element SWL are connected to each other. Furthermore, each of the switching elements SWH and SWL is provided with a diode D spanning from the source terminal to the drain terminal. The source terminals of the switching elements SWH in each of the legs 6A, 6B, and 6C are connected to the terminals of the motor M via the busbar 50.

[0014] The gate terminals of switching elements SWH and SWL are connected to the control unit 5 via the driver 4. As a result, the inverter 3 converts the DC power from the battery 2 into three-phase AC power by sequentially switching between closing the high-side switching element SWH of one predetermined leg of the three legs and the low-side switching element SWL of one of the remaining two legs, while opening the other switching elements. This three-phase AC power is supplied to the motor M, driving the motor M.

[0015] In this embodiment, as shown in Figure 1, the three legs 6A, 6B, and 6C each have three sets of switching elements SWH and SWL connected in series with each other.

[0016] As shown in Fig. 2, the built-in substrate 1 has a plurality (six in this embodiment) of conductive layers CL laminated via insulating layers IL. Hereinafter, the six conductive layers CL will be referred to as conductive layer CL1, conductive layer CL2, conductive layer CL3, conductive layer CL4, conductive layer CL5, and conductive layer CL6, and it is assumed that the conductive layer CL1, conductive layer CL2, conductive layer CL3, conductive layer CL4, conductive layer CL5, and conductive layer CL6 are laminated in this order from the top. Also, an insulating layer IL1 is interposed between the conductive layer CL1 and the conductive layer CL2, an insulating layer IL2 is interposed between the conductive layer CL2 and the conductive layer CL3, an insulating layer IL3 is interposed between the conductive layer CL3 and the conductive layer CL4, an insulating layer IL4 is interposed between the conductive layer CL4 and the conductive layer CL5, and an insulating layer IL5 is interposed between the conductive layer CL5 and the conductive layer CL6. <原创内容: <原创内容:

[0017] <原创内容: Here, the direction in which the six conductive layers CL are laminated is defined as the lamination direction Z. As shown in Fig. 2, the built-in substrate 1 has switching elements SWH and SWL provided in a leg 6 at the central portion in the lamination direction Z. In the lamination direction Z, the side of the conductive layer CL1 as viewed from the switching elements SWH and SWL is defined as the lamination direction Z1 side, and the side of the conductive layer CL6 as viewed from the switching elements SWH and SWL is defined as the lamination direction Z2 side. A resist R1 is provided on the lamination direction Z1 side of the conductive layer CL1. <原创内容: <原创内容:

[0018] <原创内容: The conductive layer CL6 corresponds to the first conductive layer on one end side (lamination direction Z2 side) in the lamination direction Z. The conductive layer CL1 corresponds to the second conductive layer on the other end side (lamination direction Z1 side) in the lamination direction Z. Also, although details will be described later, the conductive layer CL5 corresponds to the third conductive layer. <原创内容: <原创内容:

[0019] <原创内容: ]>In this embodiment, one of the three legs 6A, 6B, and 6C described above, that is, the switching elements SWH and SWL of one leg 6 are provided on one built-in substrate 1. Also, on one built-in substrate 1, three switching elements SWH are provided connected in parallel to each other, and three switching elements SWL are provided connected in parallel to each other. <原创内容: <原创内容:

[0020] <原创内容: Figure 3 shows a plan view of conductive layer CL1, Figure 4 shows a plan view of conductive layer CL2, and Figure 5 shows a plan view of conductive layer CL3. Furthermore, Figure 6 shows a plan view of conductive layer CL4, Figure 7 shows a plan view of conductive layer CL5, and Figure 8 shows a plan view of conductive layer CL6.

[0021] As shown in Figure 3, the conductive layer CL1 is equipped with connectors CN1 to which power line 2P is connected, connector CN2 to which power line 2N is connected, connector CN3 to which motor M is connected via busbar 50, connector CN4 which inputs control signals transmitted from the control unit 5 to switching elements SWH and SWL to drivers 4 (drivers 4H and 4L described later), connector CN5 which supplies power to driver 4H, connector CN6 which supplies power to driver 4L, driver 4H for driving switching element SWH, and driver 4L for driving switching element SWL. Connectors CN1-CN6 and drivers 4H and 4N are mounted on the first surface CL1A (see Figure 2) of the conductive layer CL1 on the Z1 side of the lamination direction. Of course, other components such as capacitors (not shown) and resistors (not shown) that generate relatively little heat may also be mounted on the first surface CL1A. In this embodiment, "connecting" means "connecting in a state where current is flowing."

[0022] Furthermore, a detection element 60, which measures the current value of the current flowing through the switching elements SWH and SWL, is mounted on the conductive layer CL1. The detection element 60 is mounted on the mounting section 65. In this embodiment, the mounting section 65 is provided on the conductive layer CL1. Therefore, the detection element 60 is mounted on the conductive layer CL1. A heat receiving section 70 is provided around the mounting section 65. In this embodiment, patterns 1P3 and 1P4 are provided such that, in a plan view, the heat receiving section 70 sandwiches the detection element 60.

[0023] As shown in Figure 4, conductive layer CL2 includes pattern 2P1 connected via via to land 1P1 on which connector CN1 of conductive layer CL1 is mounted, pattern 2P2 connected via via to land 1P2 on which connector CN2 of conductive layer CL1 is mounted, via 2V1 connected to the terminal of connector CN3 of conductive layer CL1, via 2V2 connected to the terminal of connector CN4 of conductive layer CL1, via 2V3 connected to the terminal of connector CN5 of conductive layer CL1, and via 2V4 connected to the terminal of connector CN6 of conductive layer CL1. It also includes pattern 2P3 connecting the source terminal of switching element SWH and the drain terminal of switching element SWL. Furthermore, conductive layer CL2 includes pattern 2P4 connected via via to pattern 1P3 of conductive layer CL1, and pattern 2P5 connected via via to pattern 1P4 of conductive layer CL1. Furthermore, it includes via 2V5 connected to the terminal of driver 4H of conductive layer CL1, via 2V6 connected to the terminal of driver 4L of conductive layer CL1, signal line SL1 connecting via 2V3 and via 2V5, signal line SL2 connecting via 2V4 and via 2V6, and wiring GL connecting the gate terminals of switching elements SWH and SWL to vias 2V5 and 2V6, respectively. Note that although the gate terminal side of wiring GL is indicated by an arrow, it is actually assumed to be connected to the gate terminal.

[0024] In the internal substrate 1, switching elements SWH and SWL are embedded on the central side in the stacking direction Z. In this embodiment, switching elements SWH and SWL are each placed on a base member 20. The base member 20 in this embodiment is composed of, for example, a rectangular prism or a plate. As shown in Figures 5 and 6, the base member 20, switching element SWH, and switching element SWL are provided across conductive layers CL3 and CL4.

[0025] Furthermore, as shown in Figure 5, conductive layer CL3 includes pattern 3P1 connected to pattern 2P1 of conductive layer CL2 via via, via 3V1 connected to via 2V1 of conductive layer CL2, via 3V2 connected to 2V2 of conductive layer CL2, via 3V3 connected to via 2V5 of conductive layer CL2, and via 3V4 connected to 2V6 of conductive layer CL2. Conductive layer CL3 also includes pattern 3P2 connected to pattern 2P4 of conductive layer CL2 via via, and pattern 3P3 connected to pattern 2P5 of conductive layer CL2 via via. In addition, conductive layer CL3 includes signal line SL3 connecting vias 3V2 and 3V3, and signal line SL4 connecting vias 3V2 and 3V4 of conductive layer CL3.

[0026] As shown in Figure 6, conductive layer CL4 includes pattern 4P1 connected to pattern 3P1 of conductive layer CL3 via via, and via 4V1 connected to via 3V1 of conductive layer CL3. Furthermore, it includes pattern 4P2 connected to the bottom surface of the base member 20 on which the switching element SWH is mounted, and pattern 4P3 connected to the bottom surface of the base member 20 on which the switching element SWL is mounted. In addition, conductive layer CL4 includes pattern 4P4 connected to pattern 3P2 of conductive layer CL3 via via, and pattern 4P5 connected to pattern 3P3 of conductive layer CL3 via via.

[0027] As shown in Figure 7, conductive layer CL5 includes pattern 5P1, which is connected via via to pattern 4P1 of conductive layer CL4 and pattern 4P2, to which the drain terminal of switching element SWH is connected; pattern 5P2, which is connected via via to pattern 4P3, to which the drain terminal of switching element SWL of conductive layer CL4 is connected; and via 5V1, which is connected to via 4V1 of conductive layer CL4. Conductive layer CL5 also includes pattern 5P3, which is connected via via to pattern 4P4 of conductive layer CL4; and pattern 5P4, which is connected via via to pattern 4P5 of conductive layer CL4.

[0028] As shown in Figure 8, the conductive layer CL6 includes a pattern 6P1 that is formed over its entire surface and is connected via vias to patterns 5P3 and 5P4 of the conductive layer CL5. This pattern 6P1 is connected, for example, to the housing of the inverter 3 via harnesses or screws.

[0029] Although not shown in the diagram, it is preferable to provide grounded patterns for conductive layers CL1-CL5 in locations different from the respective patterns and wiring described above.

[0030] As shown in Figure 2, the heat receiving section 70 is provided between the mounting section 65 and the switching elements SWH and SWL, and receives heat from the switching elements SWH and SWL. In this embodiment, it is provided along the stacking direction Z between the switching element SWL and the mounting section 65, and between the land of the connector CN3 to which the busbar 50 is connected and the mounting section 65. The heat receiving section 70 is composed of conductive layers CL1-CL5, vias connecting two adjacent conductive layers CL1-CL5 along the stacking direction Z, and vias connecting conductive layer CL5 and conductive layer CL6 along the stacking direction Z. Therefore, the heat receiving section 70 is made of a conductive and thermally conductive material and is provided in a state where heat can be transferred with the conductive layer CL6. As shown in Figure 7, the heat receiving section 70 is provided in a state where it is electrically insulated from the pattern 5P2.

[0031] Here, as described above, patterns 1P3 and 1P4 are provided such that the heat receiving portion 70 sandwiches the detection element 60 in a plan view, but in the conductive layer CL1, patterns 1P3 and 1P4 constitute the heat receiving portion 70 (see Figure 3).

[0032] In the conductive layer CL2 shown in Figure 4, the Z2 side of the detection element 60 has a missing conductive pattern, and patterns 2P4 and 2P5 are provided so as to sandwich this region 260 where the conductive pattern is missing.

[0033] Furthermore, in the conductive layer CL3 shown in Figure 5, the Z2 side of the detection element 60 has a conductor pattern removed, and patterns 3P2 and 3P3 are provided so as to sandwich this region 360 where the conductor pattern is removed.

[0034] Similarly, in the conductive layer CL4 shown in Figure 6, the Z2 side of the detection element 60 has a missing conductive pattern, and patterns 4P4 and 4P5 are provided so as to sandwich this region 460 where the conductive pattern is missing.

[0035] In the conductive layer CL5 shown in Figure 7, pattern 5P2 is provided in region 560 on the Z2 side of the detection element 60, and patterns 5P3 and 5P4 are provided on either side of this region 560. Therefore, in the conductive layer CL5, pattern 5P2, through which the current that the detection element 60 is to be measured flows, is provided on the Z2 side of the detection element 60 (details will be described later).

[0036] In this embodiment, as described above, each of the conductive layers CL1, CL2, CL3, CL4, and CL5 is provided with two patterns that constitute the heat receiving section 70. These two patterns are composed of patterns of the same shape across each of the conductive layers CL1, CL2, CL3, CL4, and CL5.

[0037] In other words, the pattern 1P3 constituting the heat receiving portion 70 of conductive layer CL1, the pattern 2P4 constituting the heat receiving portion 70 of conductive layer CL2, the pattern 3P2 constituting the heat receiving portion 70 of conductive layer CL3, the pattern 4P4 constituting the heat receiving portion 70 of conductive layer CL4, and the pattern 5P3 constituting the heat receiving portion 70 of conductive layer CL5 are all composed of patterns of the same shape. Furthermore, the pattern 1P4 constituting the heat receiving portion 70 of conductive layer CL1, the pattern 2P5 constituting the heat receiving portion 70 of conductive layer CL2, the pattern 3P3 constituting the heat receiving portion 70 of conductive layer CL3, the pattern 4P5 constituting the heat receiving portion 70 of conductive layer CL4, and the pattern 5P4 constituting the heat receiving portion 70 of conductive layer CL5 are all composed of patterns of the same shape.

[0038] The second surface CL6A of the conductive layer CL6 on the Z2 side of the stacking direction is used as a heat dissipation surface to dissipate heat from the switching elements SWH and SWL. Therefore, the conductive layer CL6 has a second surface CL6A that dissipates heat from the switching elements SWH and SWL. Here, the switching elements SWH and SWL generate heat when energized. Furthermore, as will be described in detail later, the source current of the switching element SWH flows to the motor M via the busbar 50, and the drain current of the switching element SWL flows from the motor M via the busbar 50. As a result, relatively large current values ​​flow through patterns 5P2 and 2P3, for example, and generate heat. Moreover, the current path 90 connecting pattern 5P2 and the busbar 50 also generates heat.

[0039] Such heat is absorbed by the heat receiving section 70 before reaching the mounting section 65, transferred to the conductive layer CL6, and then dissipated from the heat dissipation surface of the conductive layer CL6. The built-in substrate 1 is preferably placed in contact with a cooling member 80 through which a cooling liquid flows, for example, in order to efficiently dissipate heat from the second surface CL6A of the conductive layer CL6.

[0040] Here, we will explain the flow of current in the internal substrate 1, particularly the source current and drain current of the switching elements SWH and SWL. As shown in Figure 2, a power line 2P is formed on the conductive layer CL1. The power line 2P is electrically connected to the conductive layer CL2 via vias provided in the insulating layer IL1, the conductive layer CL2 is electrically connected to the conductive layer CL3 via vias provided in the insulating layer IL2, the conductive layer CL3 is electrically connected to the conductive layer CL4 via vias provided in the insulating layer IL3, and the conductive layer CL4 is electrically connected to the conductor pattern (pattern 5P1) of the conductive layer CL5 via vias provided in the insulating layer IL4. This conductor pattern is electrically connected to the drain terminal of the switching element SWH via vias provided in the insulating layer IL4 and the base member 20. Therefore, the drain current of the switching element SWH flows from the power line 2P through each conductive layer CL and via to pattern 5P1.

[0041] The source terminal of the switching element SWH is electrically connected to the conductive layer CL2 via a via provided in the insulating layer IL2. The conductive layer CL2 is electrically connected to the conductor pattern (pattern 5P2) via a via provided in the insulating layer IL2, the base member 20 of the switching element SWL, and a via provided in the insulating layer IL4. Therefore, the source current of the switching element SWH flows from the source terminal of the switching element SWH to pattern 5P2 via a via provided in the insulating layer IL2, the base member 20 of the switching element SWL, and a via provided in the insulating layer IL4.

[0042] Furthermore, pattern 5P2 is electrically connected to conductive layer CL4 via vias provided in insulating layer IL4, conductive layer CL4 is electrically connected to conductive layer CL3 via vias provided in insulating layer IL3, conductive layer CL3 is electrically connected to conductive layer CL2 via vias provided in insulating layer IL2, and conductive layer CL2 is electrically connected to conductive layer CL1 via vias provided in insulating layer IL1. This conductive layer CL1 is electrically connected to the terminals of motor M. Therefore, the source current of switching element SWH flows from conductive layer CL2 through conductive layer CL5 and then to conductive layer CL1. Also, the current from motor M flows from conductive layer CL1 through each conductive layer and via to pattern 5P2 (corresponding to the drain current of switching element SWL).

[0043] Pattern 5P2 is electrically connected to the drain terminal of the switching element SWL via the base member 20, the source terminal of the switching element SWL is electrically connected to the conductive layer CL2 via a via provided in the insulating layer IL2, and further electrically connected to the power line 2N provided in the conductive layer CL1 via a via provided in the insulating layer IL1. Therefore, the source current of the switching element SWL flows from the source terminal of the switching element SWL to the power line 2N via the via provided in the insulating layer IL2, the conductive layer CL2, and the via provided in the insulating layer IL1.

[0044] In this embodiment, the detection element 60 is a Hall element that detects the magnetic flux density based on the magnetic field generated around the conductive layer CL through which the current to be measured flows, among a plurality of conductive layers CL. In this embodiment, the current to be measured corresponds to the current flowing through conductive layer CL5, which is opposite conductive layer CL6 along the stacking direction Z. Specifically, it corresponds to the current flowing through pattern 5P2 of conductive layer CL5. As described above, on the Z2 side of the detection element 60, conductive layers CL1, CL2, CL3, and CL4 have the conductive pattern removed, and only conductive layer CL5 has a conductive pattern (in this embodiment, pattern 5P2 through which the current to be measured by the detection element 60 flows). Here, when current flows through a conductor, a magnetic field is generated with the conductor as the axis according to the magnitude of the current (Ampère's right-hand rule). The detection element 60 can detect the magnetic flux density of the magnetic flux in such a magnetic field and accurately measure the current (current value) flowing through pattern 5P2 based on the detected magnetic flux density.

[0045] In this embodiment, the heat receiving section 70 and the conductive layer CL6 are grounded. This prevents the magnetic flux based on the magnetic field around pattern 5P2, which is located vertically below the stacking direction Z, from being disturbed by the magnetic field caused by the current flowing through other patterns located around pattern 5P2, with respect to the detection element 60 mounted on the mounting section 65. Therefore, the detection element 60 can measure the current to be detected with reduced disturbance noise.

[0046] Furthermore, in this embodiment, the space between the mounting portion 65 and the conductive layer CL5 is filled with an insulator. That is, in this embodiment, the space between the mounting portion 65 and the conductive layer CL5 is along the stacking direction Z. Therefore, when viewed from the mounting portion 65 towards the stacking direction Z2, conductive layers CL1, CL2, CL3, and CL4 are removed, leaving insulating layers IL1, IL2, IL3, and IL4. Note that among insulating layers IL1, IL2, IL3, and IL4, the space between two adjacent insulating layers IL along the stacking direction Z may be filled with insulating material.

[0047] With the above configuration, heat from the switching element SWL, heat from pattern 5P2, and heat from the current path 90 are transferred to the conductive layer CL6 via the heat receiving section 70 and can be dissipated through the heat dissipation surface. Therefore, the detection element 60 can be protected from heat.

[0048] [Other Embodiments] Next, other embodiments of the built-in circuit board 1 will be described.

[0049] In the above embodiment, switching elements SWH and SWL were used as examples to describe the power devices, but the power device provided on the built-in substrate 1 does not have to be multiple; it may be a single switching element. Also, the power device does not have to be an n-type MOS-FET (metal-oxide-semiconductor field-effect transistor); it may be a p-type MOS-FET, an IGBT (Insulated Gate Bipolar Transistor), or a bipolar transistor. Furthermore, the power device does not have to be a switching element SWH or SWL; it may be a component that generates heat in response to current, such as a load switch.

[0050] In the above embodiment, an example was given in which the driver 4 is mounted on the internal circuit board 1. However, the driver 4 may be provided on a separate circuit board from the internal circuit board 1.

[0051] In the above embodiment, the three legs 6A, 6B, and 6C were described as each comprising three sets of switching elements SWH and SWL connected in series with each other. However, it is also possible for each of the three legs 6A, 6B, and 6C to be configured with one set of switching elements SWH and SWL connected in series with each other. Furthermore, it is also possible for each of the three legs 6A, 6B, and 6C to be configured with two sets of switching elements SWH and SWL connected in series with each other, or with four or more sets of switching elements SWH and SWL.

[0052] In the above embodiment, an example was described in which the internal substrate 1 is provided with three switching elements SWH and three switching elements SWL connected in parallel, each belonging to one of the three legs 6. However, it is also possible to provide the switching elements SWH and SWL of all three legs 6 on the internal substrate 1.

[0053] In the above embodiment, the detection element 60 was described as a Hall element that detects the magnetic flux density based on the magnetic field generated around a conductive layer CL through which current flows among a plurality of conductive layers CL. However, the detection element 60 can also be constructed using components other than a Hall element.

[0054] In the above embodiment, the heat receiving section 70 and the conductive layer CL6 were described as being grounded, but both the heat receiving section 70 and the conductive layer CL6 do not need to be grounded, or either the heat receiving section 70 or the conductive layer CL6 does not need to be grounded. In this case, it is preferable to configure the heat receiving section 70 and the conductive layer CL6 to transfer heat via a heat transfer member.

[0055] In the above embodiment, the mounting portion 65 was described as being provided on the conductive layer CL1 at the other end in the stacking direction Z of the plurality of conductive layers CL. However, the mounting portion 65 may also be provided on the central side in the stacking direction Z of the built-in substrate 1. In this case, the detection element 60 may be built into the built-in substrate 1, similar to the switching elements SWH and SWL.

[0056] In the above embodiment, the current to be measured was described as the current flowing through conductive layer CL5 which is opposite to conductive layer CL6 along the stacking direction Z. However, the current to be measured may be the current flowing through any one of conductive layers CL4, conductive layer CL3, and conductive layer CL2 which are spaced apart from conductive layer CL6 along the stacking direction Z.

[0057] In the above embodiment, it was described that the space between the mounting portion 65 and the conductive layer CL5 is filled with an insulator. However, a conductor may be included between the mounting portion 65 and the conductive layer CL5.

[0058] Note that the conductor patterns of each conductive layer CL1-CL6 described in the above embodiment are examples and can be changed.

[0059] [Summary of the above embodiment] The following describes the overview of the built-in circuit board 1 as explained above.

[0060] (1) The internal substrate 1 is an internal substrate 1 in which switching elements SWH, SWL (power devices) are built in, and comprises a plurality of conductive layers CL laminated with an insulating layer IL, a mounting section 65 on which a detection element 60 that measures the current value of the current flowing through the switching elements SWH, SWL is mounted, and a heat receiving section 70 provided between the mounting section 65 and the switching elements SWH, SWL to receive heat from the switching elements SWH, SWL, wherein the heat receiving section 70 is provided in a state that allows heat transfer with a conductive layer CL6 (first conductive layer) at one end of the plurality of conductive layers CL in the lamination direction Z, and the conductive layer CL6 has a heat dissipation surface that dissipates heat from the switching elements SWH, SWL.

[0061] With this configuration, a heat dissipation surface and a heat receiving section 70 capable of heat transfer are provided between the heat-generating switching elements SWH, SWL, etc., and the detection element 60, thereby reducing the heat absorbed by the detection element 60 from the heat-generating elements. Therefore, a built-in circuit board 1 capable of accurately measuring current values ​​can be realized.

[0062] (2) In the built-in substrate 1 described in (1), the detection element 60 is a Hall element that detects the magnetic flux density based on the magnetic field generated around the conductive layer CL through which current flows, and it is preferable that the heat receiving section 70 and the conductive layer CL6 are grounded.

[0063] With this configuration, the magnetic flux (magnetic flux density) based on the magnetic field that the detection element 60 mounted on the mounting section 65 is to detect can be suppressed from being disturbed by the surrounding magnetic field. Therefore, the detection element 60 can measure the current to be detected while external disturbance noise is reduced.

[0064] (3) In the built-in substrate 1 described in (1) or (2), the mounting portion 65 is preferably provided on the conductive layer CL1 (second conductive layer) at the other end in the stacking direction Z of the plurality of conductive layers CL, and the current to be measured is preferably the current flowing through the conductive layer CL5 (third conductive layer) which is opposite to the conductive layer CL6 along the stacking direction Z.

[0065] In this configuration, the conductive layer CL5 through which the detection element 60 should detect flows is provided opposite the conductive layer CL6, so that heat from the conductive layer CL5 can be reduced through the heat dissipation surface of the conductive layer CL6. Therefore, it is possible to reduce the influence of heat from the conductive layer CL5 on the detection element 60.

[0066] In the built-in substrate 1 described in (4)(3), it is preferable that the space between the mounting portion 65 and the conductive layer CL5 is filled with an insulator.

[0067] In this configuration, since no conductor is provided between the mounting section 65 and the conductive layer CL5, the magnetic flux (magnetic flux density) that the detection element 60 should detect is not weakened by a conductor. Therefore, accurate detection becomes possible. In addition, since there is no conductor, heat conduction from the surroundings can be suppressed. Therefore, heat absorption by the detection element 60 can be further reduced. [Industrial applicability]

[0068] The technology disclosed herein can be used in embedded substrates. [Explanation of Symbols]

[0069] 1: Internal substrate, 60: Detection element, 65: Mounting section, 70: Heat receiving section, CL: Conductive layer, CL1: Conductive layer (second conductive layer), CL5: Conductive layer (third conductive layer), CL6: Conductive layer (first conductive layer), IL: Insulating layer, SWH: Switching element (power device), SWL: Switching element (power device), Z: Stacking direction

Claims

1. An internal circuit board in which a power device is built in, Multiple conductive layers stacked with an insulating layer in between, A mounting section on which a detection element is mounted to measure the current value of the current flowing through the power device, The device includes a heat receiving section provided between the mounting section and the power device, which receives heat from the power device, The heat receiving portion is provided in a manner that allows heat transfer to the first conductive layer at one end of the plurality of conductive layers in the stacking direction, The first conductive layer is a built-in substrate having a heat dissipation surface for dissipating heat from the power device.

2. The detection element is a Hall element that detects the magnetic flux density based on the magnetic field generated around the conductive layer through which the current flows, among a plurality of conductive layers. The built-in substrate according to claim 1, wherein the heat receiving portion and the first conductive layer are grounded.

3. The mounting portion is provided on the second conductive layer on the other end side in the stacking direction of the plurality of conductive layers, The built-in substrate according to claim 1 or 2, wherein the current to be measured is the current flowing through the third conductive layer which is opposite to the first conductive layer in the stacking direction.

4. The built-in substrate according to claim 3, wherein the space between the mounting portion and the third conductive layer is filled with an insulator.

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