Semiconductor equipment

Abstract

To obtain a semiconductor device that can prevent the insulating mold resin from peeling off. [Solution] A first metal plate 11 is provided on the upper surface of the insulating layer 10. A second metal plate 12 is provided on the lower surface of the insulating layer 10. A semiconductor element 14 is bonded to the first metal plate 11. An insulating mold resin 16 covers the insulating layer 10, the sides of the first metal plate 11 and the second metal plate 12, and the semiconductor element 14. A groove 18 is provided around the entire outer circumference of the lower surface of the second metal plate 12. The insulating mold resin 16 is filled inside the groove 18.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses that in a semiconductor device in which a semiconductor element is mounted on an insulating substrate and sealed with an insulating molding resin, in order to suppress internal delamination, a concave groove is provided on the lower surface of the lower surface electrode of the insulating substrate.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In order to further improve heat dissipation and extend the service life, it is necessary to firmly seal the insulating substrate and the semiconductor element with an insulating molding resin without delamination. In Patent Document 1, a concave groove is provided at the corner of the lower surface of the lower surface electrode of the insulating substrate as a stress relaxation measure for the insulating substrate due to thermal stress. However, even if a concave groove is provided only at the corner, the stress cannot be sufficiently relaxed, and delamination of the insulating molding resin cannot be prevented.

[0005] This disclosure is made to solve the above problems, and its object is to obtain a semiconductor device that can prevent the insulating molding resin from peeling off.

Means for Solving the Problems

[0006] The semiconductor device according to this disclosure comprises an insulating layer, a first metal plate provided on the upper surface of the insulating layer, a second metal plate provided on the lower surface of the insulating layer, a semiconductor element bonded to the first metal plate, and an insulating molded resin covering the insulating layer, the first metal plate, the side surfaces of the second metal plate, and the semiconductor element, wherein a groove is provided around the entire outer circumference of the lower surface of the second metal plate, and the insulating molded resin is filled inside the groove. [Effects of the Invention]

[0007] In the semiconductor device according to this disclosure, a groove is provided around the entire outer circumference of the lower surface of the second metal plate, and an insulating molded resin is filled inside the groove. This prevents the insulating molded resin from peeling off. [Brief explanation of the drawing]

[0008] [Figure 1] This is a cross-sectional view showing a semiconductor device according to Embodiment 1. [Figure 2] This is a bottom view showing an insulating substrate according to Embodiment 1. [Figure 3] This is a cross-sectional view along line I-II in Figure 2. [Figure 4] This is a cross-sectional view showing a semiconductor device according to Comparative Example 1. [Figure 5] This is an enlarged cross-sectional view of a part of the semiconductor device according to Comparative Example 1. [Figure 6] This is a cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. [Figure 7] This is an enlarged cross-sectional view of a part of the semiconductor device according to Comparative Example 2. [Figure 8] This is a bottom view showing the insulating substrate of the semiconductor device according to Embodiment 2. [Figure 9] This is a cross-sectional view along line I-II in Figure 8. [Figure 10] This is a bottom view showing a modified example of the insulating substrate according to Embodiment 2. [Figure 11] This is a cross-sectional view along line I-II in Figure 10. [Figure 12]Cross-sectional view showing the semiconductor device according to Embodiment 3. [Figure 13] Bottom view showing the insulating substrate according to Embodiment 3. [Figure 14] Cross-sectional view taken along line I-II in FIG. 13. [Figure 15] Cross-sectional view showing the insulating substrate of the semiconductor device according to Embodiment 4. [Figure 16] Cross-sectional view showing the semiconductor device according to Embodiment 5. [Figure 17] Bottom view showing the insulating substrate of the semiconductor device according to Embodiment 6. [Figure 18] Bottom view showing the semiconductor device according to Embodiment 6. <000008>< /

Embodiments for Carrying Out the Invention

[0009] < / The following provides a detailed description with reference to the drawings. Redundant descriptions will be appropriately simplified or omitted. In each figure, the same reference numerals indicate the same or corresponding parts. Also, in the drawings, the size relationships of the respective components may be different from the actual ones. And the forms of the components described throughout the specification are merely examples and are not limited to the forms described in the specification. In particular, the combinations of components are not limited to the combinations in each embodiment, and the components described in other embodiments can be applied to other embodiments.

[0010] Embodiment 1 FIG. 1 is a cross-sectional view showing the semiconductor device according to Embodiment 1. This semiconductor device is a transfer molded - power module. A first metal plate 11 is provided on the upper surface of the insulating layer 10. A second metal plate 12 is provided on the lower surface of the insulating layer 10. The insulating layer 10, the first metal plate 11, and the second metal plate 12 together are referred to as the insulating substrate 30.

[0011] The insulating layer 10 is a plate-shaped member having a rectangular shape in plan view. Here, the insulating layer 10 is made of ceramic. The ceramic material is aluminum nitride, aluminum oxide, silicon nitride, alumina, or silicon carbide. Among these materials, aluminum nitride is preferable from the viewpoint of thermal conductivity. The thickness of the insulating layer 10 is preferably thin from the viewpoint of thermal conductivity. The thickness of the insulating layer 10 is selected according to the size of the circuit board, the thermal conductivity of the material used, or the strength. The first metal plate 11 and the second metal plate 12 are made of, for example, copper, but may be aluminum or silver.

[0012] The semiconductor element 14 is joined to the upper surface of the first metal plate 11 by a first bonding material 13. The material of the first bonding material 13 is, for example, solder. The first metal plate 11 and the semiconductor element 14 may be metal-sintered.

[0013] The semiconductor element 14 is, for example, an IGBT (Insulated Gate Bipolar Transistor), but may be a FWD (Free Wheeling Diode) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0014] The wiring member 17 is joined to the upper surface of the semiconductor element 14 by a second bonding material 15. The material of the second bonding material 15 is, for example, solder. The wiring member 17 is a conductive member that mediates the power supply from outside the device to the semiconductor element 14 and the input / output of electrical signals. The wiring member 17 is made of, for example, copper, but may be a metal other than copper.

[0015] The insulating mold resin 16 covers the side surfaces of the insulating layer 10, the first metal plate 11, the second metal plate 12, the semiconductor element 14, and a part of the wiring member 17. The material of the insulating mold resin 16 is an epoxy resin to which a filler is added.

[0016] FIG. 2 is a bottom view showing the insulating substrate according to Embodiment 1. FIG. 3 is a cross-sectional view taken along the line I-II of FIG. 2. A concave groove 18 is provided on the entire outer periphery of the lower surface of the second metal plate 12.

[0017] Next, the effects of this embodiment will be explained in comparison with Comparative Example 1. Figure 4 is a cross-sectional view showing a semiconductor device according to Comparative Example 1. Figure 5 is an enlarged cross-sectional view of a part of the semiconductor device according to Comparative Example 1. In Comparative Example 1, no groove 18 is formed in the second metal plate 12. Because the coefficient of linear expansion of the insulating mold resin 16 and the insulating substrate 30 are different, when thermal expansion occurs due to temperature changes, the second metal plate 12 deforms, causing delamination 19 at the interface between the insulating substrate 30 and the insulating mold resin 16. This delamination 19 also causes cracks 20 in the insulating layer 10.

[0018] On the other hand, in this embodiment, since grooves 18 are provided around the entire outer circumference of the lower surface of the second metal plate 12, stress can be sufficiently relieved. In addition, insulating molded resin 16 is filled inside the grooves 18. As a result, the bond between the insulating molded resin 16 and the insulating substrate 30 becomes stronger, preventing delamination of the insulating molded resin 16 caused by the difference in the coefficients of thermal expansion between the two. Furthermore, since the occurrence of cracks in the insulating layer 10 caused by such delamination can be prevented, the dielectric strength is also improved. Delamination at the interface between the first metal plate 11 or semiconductor element 14 and the insulating molded resin 16 can also be prevented. As a result, it is possible to avoid failure of the semiconductor device in temperature humidity bias tests.

[0019] The depth of the groove 18 is preferably at least one-third of the thickness of the second metal plate 12. This allows the filler to be uniformly dispersed in the insulating mold resin 16 filled in the groove 18, stabilizing the material properties of the insulating mold resin 16. Furthermore, it can relieve bending stress, thereby suppressing deformation of the second metal plate 12.

[0020] The depth of the groove 18 is preferably less than 51% of the thickness of the second metal plate 12. This suppresses the intrusion of filler into the groove 18, and improves adhesion by allowing more of the resin component of the insulating mold resin 16 to enter the groove 18. As a result, it can withstand the deformation stress of the semiconductor device and the shrinkage stress generated during the cooling process of the insulating mold resin 16 during its molding, thereby preventing the insulating mold resin 16 from peeling off. No peeling of the insulating mold resin 16 occurred even after 1000 hours of heat cycle testing at a test temperature of -40 to 125°C with a 30-minute swing.

[0021] The bottom surface of the groove 18 is flat. Since the flat shape of the groove 18 cannot be formed by etching, the width of the groove 18 is 0.5 mm or more. Furthermore, if the width of the groove 18 is 0.45 mm or more, the effect of suppressing delamination is achieved. In post-processing, it is preferable to laser-roughen the flat portion of the bottom surface of the groove 18 by laser irradiation. This further strengthens the bond between the bottom surface of the groove 18 and the insulating mold resin 16, thereby further suppressing delamination in the tensile and shear directions caused by the difference in linear expansion between the insulating mold resin 16 and the insulating substrate 30. Here, the tensile direction is the left-right direction in Figure 4, and the shear direction is the up-down direction in Figure 4.

[0022] Figure 6 is a cross-sectional view showing a modified example of the semiconductor device according to Embodiment 1. In this modified example, a heat spreader 40 is used instead of the insulating substrate 30 of Embodiment 1. In this case, the insulating layer 10 is not ceramic, but an insulating sheet made of epoxy resin with fillers added. The second metal plate 12 is a thick Cu block. These insulating layers 10, the first metal plate 11, and the second metal plate 12 are collectively referred to as the heat spreader 40.

[0023] Next, the effects of a modified example of the semiconductor device according to Embodiment 1 will be explained in comparison with Comparative Example 2. Figure 7 is an enlarged cross-sectional view of a part of the semiconductor device according to Comparative Example 2. In Comparative Example 2, no groove 18 is formed in the second metal plate 12. Because the coefficient of linear expansion of the insulating mold resin 16 and the heat spreader 40 are different, when thermal expansion occurs due to temperature changes, the second metal plate 12 deforms, causing delamination 19 at the interface between the heat spreader 40 and the insulating mold resin 16. This delamination also causes cracks 20 in the insulating mold resin 16.

[0024] On the other hand, in the modified embodiment of the first embodiment, a groove 18 is provided around the entire outer circumference of the lower surface of the second metal plate 12, so that stress can be sufficiently relieved. In addition, the insulating mold resin 16 is filled inside the groove 18. As a result, the bond between the insulating mold resin 16 and the heat spreader 40 becomes stronger, so that peeling of the insulating mold resin 16 caused by the difference in the coefficients of thermal expansion of the two can be prevented. Furthermore, since the occurrence of cracks in the insulating mold resin 16 caused by such peeling can be prevented, the dielectric strength is also improved. As a result, it is possible to avoid failure of the semiconductor device in high temperature and high humidity bias tests.

[0025] Embodiment 2 Figure 8 is a bottom view showing the insulating substrate of the semiconductor device according to Embodiment 2. Figure 9 is a cross-sectional view along line I-II in Figure 8. In Embodiment 1, a linear groove 18 was formed on the outer circumference of the second metal plate 12, whereas in this embodiment, the groove 18 has a plurality of key-shaped grooves provided along the outer circumference of the lower surface of the second metal plate 12. In a plan view, the width of the inner circumference of the lower surface of the second metal plate 12 is wider than the width of the outer circumference of the lower surface of the second metal plate 12. The insulating molded resin 16 filled inside these key-shaped grooves becomes resistant to lateral tensile stress due to the anchoring effect. This prevents the insulating molded resin 16 from peeling off. Other configurations and effects are the same as in Embodiment 1.

[0026] Figure 10 is a bottom view showing a modified example of the insulating substrate according to Embodiment 2. Figure 11 is a cross-sectional view along line I-II in Figure 10. In the modified example, the depth of the key-shaped groove 18 is equal to the thickness of the second metal plate 12. In other words, the groove 18 penetrates the second metal plate 12. Since such a groove 18 is easy to form, it can be produced at a lower cost than in the cases shown in Figures 8 and 9.

[0027] Embodiment 3 Figure 12 is a cross-sectional view showing a semiconductor device according to Embodiment 3. Figure 13 is a bottom view showing an insulating substrate according to Embodiment 3. Figure 14 is a cross-sectional view along line I-II in Figure 13. The groove 18 has a depth on the inner circumference side of the lower surface of the second metal plate 12 that is deeper than the depth on the outer circumference side of the lower surface of the second metal plate 12. The groove 18 is triangular in cross-sectional view. However, the insulating molded resin 16 inside the groove 18 and the insulating molded resin 16 outside the groove 18 are connected. The insulating molded resin 16 filled inside the groove 18 of this shape becomes resistant to lateral tensile stress due to the anchoring effect. This prevents the insulating molded resin 16 from peeling off. Other configurations and effects are the same as in Embodiment 1.

[0028] Embodiment 4 Figure 15 is a cross-sectional view showing an insulating substrate of a semiconductor device according to Embodiment 4. The corner between the bottom surface of the groove 18 and the side surface of the second metal plate 12 has a first R-shape 21. The radius of curvature of the first R-shape 21 is 0.05 mm or more and 0.5 mm or less. This promotes the flow of angular fillers with an average particle size of 75 μm contained in the insulating mold resin 16, thereby improving the fluidity of the insulating mold resin 16 into the groove 18. Furthermore, it can alleviate localized stress concentration in the insulating mold resin 16, thus enabling a further extension of the lifespan.

[0029] Furthermore, the corner between the bottom surface of the groove 18 and the side surface of the groove 18 has a second R-shape 22. The radius of curvature of the second R-shape 22 is 0.05 mm or more and 0.5 mm or less. As a result, only the resin contained in the insulating mold resin 16 enters the second R-shape 22, thus increasing the adhesive strength. Also, because the resin in the insulating mold resin 16 fills the second R-shape 22 at a high concentration, the adhesive area is increased, and peeling of the insulating mold resin 16 can be suppressed. Furthermore, by forming the second R-shape 22, local stress on the insulating mold resin 16 can be relieved, and peeling of the insulating mold resin 16 can be suppressed. It is preferable that the radius of curvature of the first R-shape 21 is larger than the radius of curvature of the second R-shape 22. Other configurations and effects are the same as in Embodiment 1.

[0030] Embodiment 5 Figure 16 is a cross-sectional view showing a semiconductor device according to Embodiment 5. The insulating mold resin 16 not only fills the groove 18, but also covers the portion of the lower surface of the second metal plate 12 inside the groove 18 in a plan view. This increases the contact area between the insulating mold resin 16 and the second metal plate 12, thereby increasing the bonding strength between them. Consequently, resistance to deformation stress is increased, enabling a further extension of the semiconductor device's lifespan. Other configurations and effects are the same as in Embodiment 1.

[0031] Embodiment 6 Figure 17 is a bottom view showing the insulating substrate of the semiconductor device according to Embodiment 6. Figure 18 is a bottom view showing the semiconductor device according to Embodiment 6. The corners of the portion exposed from the insulating molded resin 16 on the lower surface of the second metal plate 12 have an R shape in plan view. This allows for the local stress generated at the four corners of the insulating molded resin 16 covering the second metal plate 12 to be dispersed and stress relieved. Furthermore, if an R shape is also provided at the corners of the mounting portion of the heat dissipation fin mounted on the lower surface of the semiconductor device, the stress on the mounting portion can be reduced, and the lifespan can be dramatically improved. It is preferable that the radius of curvature of the R shape is 3 mm or more and 8 mm or less. Other configurations and effects are the same as in Embodiment 1.

[0032] The configurations shown in the embodiments described above are merely examples of the content of this disclosure and can be combined with other known technologies. Furthermore, it is possible to omit or modify parts of the configuration without departing from the gist of this disclosure.

[0033] Furthermore, the semiconductor element 14 is not limited to being made of silicon, but may also be made of a wide-bandgap semiconductor with a larger bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium nitride-based materials, or diamond. Semiconductor chips made of such wide-bandgap semiconductors can be miniaturized because they have high voltage resistance and allowable current density. By using these miniaturized semiconductor chips, semiconductor devices incorporating these chips can also be miniaturized and highly integrated. In addition, because semiconductor chips have high heat resistance, the heat sink fins can be miniaturized and the water-cooled section can be air-cooled, allowing for further miniaturization of the semiconductor device. Moreover, because semiconductor chips have low power loss and high efficiency, the semiconductor device can be made more efficient.

[0034] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims. Various aspects of this disclosure are described below as appendices. (Note 1) Insulating layer and, A first metal plate provided on the upper surface of the insulating layer, A second metal plate provided on the lower surface of the insulating layer, A semiconductor element bonded to the first metal plate, The system comprises the insulating layer, the first metal plate, the side surface of the second metal plate, and an insulating molded resin covering the semiconductor element. A groove is provided around the entire outer circumference of the lower surface of the second metal plate. The insulating mold resin is filled inside the groove in the semiconductor device. (Note 2) The groove has a plurality of key-shaped grooves provided along the outer circumference of the lower surface of the second metal plate. The semiconductor device according to Appendix 1, wherein the width of the inner circumference of the lower surface of the second metal plate is wider than the width of the outer circumference of the lower surface of the second metal plate in a plan view. (Note 3) The semiconductor device described in Appendix 1, wherein the depth of the groove on the inner circumferential side of the lower surface of the second metal plate is greater than the depth on the outer circumferential side of the lower surface of the second metal plate. (Note 4) The semiconductor device according to Appendix 1, wherein the corner between the bottom surface of the groove and the side surface of the second metal plate has a first R shape, and the corner between the bottom surface of the groove and the side surface of the groove has a second R shape. (Note 5) The radius of curvature of the first R shape is 0.05 mm or more and 0.5 mm or less. The radius of curvature of the second R-shape is 0.05 mm or more and 0.5 mm or less. The semiconductor device described in Appendix 4, wherein the radius of curvature of the first R shape is greater than the radius of curvature of the second R shape. (Note 6) The insulating mold resin covers the portion of the lower surface of the second metal plate that is inside the groove, as described in any of the appendices 1 to 5, in a plan view. (Note 7) The bottom surface of the groove is flat. The semiconductor device described in Appendix 1, wherein the width of the groove in a plan view is 0.45 mm or more. (Note 8) A semiconductor device according to any one of the appendices 1 to 7, wherein the corners of the portion exposed from the insulating mold resin on the lower surface of the second metal plate have an R shape. (Note 9) A semiconductor device according to any one of the appendices 1 to 8, wherein the depth of the groove is 1 / 3 or more of the thickness of the second metal plate. (Note 10) A semiconductor device according to any one of the appendices 1 to 9, wherein the depth of the groove is less than 51% of the thickness of the second metal plate. (Note 11) The semiconductor device according to any one of the appendices 1 to 10, characterized in that the semiconductor element is formed of a wide-bandgap semiconductor. [Explanation of Symbols]

[0035] 10 Insulating layer, 11 First metal plate, 12 Second metal plate, 13 First bonding material, 14 Semiconductor element, 15 Second bonding material, 16 Insulating mold resin, 17 Wiring material, 18 Groove, 19 Delamination, 20 Crack, 21 First R shape, 22 Second R shape, 30 Insulating substrate, 40 Heat spreader

Claims

1. Insulating layer and, A first metal plate provided on the upper surface of the insulating layer, A second metal plate provided on the lower surface of the insulating layer, A semiconductor element bonded to the first metal plate, The system comprises the insulating layer, the first metal plate, the side surface of the second metal plate, and an insulating molded resin covering the semiconductor element. A groove is provided around the entire outer circumference of the lower surface of the second metal plate. The insulating mold resin is filled inside the groove in the semiconductor device.

2. The groove has a plurality of key-shaped grooves provided along the outer circumference of the lower surface of the second metal plate. The semiconductor device according to claim 1, wherein the width of the key-shaped groove on the inner circumference of the lower surface of the second metal plate is wider than the width of the outer circumference of the lower surface of the second metal plate when viewed from above.

3. The semiconductor device according to claim 1, wherein the depth of the groove on the inner circumferential side of the lower surface of the second metal plate is greater than the depth on the outer circumferential side of the lower surface of the second metal plate.

4. The semiconductor device according to claim 1, wherein the corner between the bottom surface of the groove and the side surface of the second metal plate has a first R shape, and the corner between the bottom surface of the groove and the side surface of the groove has a second R shape.

5. The radius of curvature of the first R-shape is 0.05 mm or more and 0.5 mm or less. The radius of curvature of the second R-shape is 0.05 mm or more and 0.5 mm or less. The semiconductor device according to claim 4, wherein the radius of curvature of the first R shape is greater than the radius of curvature of the second R shape.

6. The semiconductor device according to claim 1, wherein the insulating mold resin covers the portion of the lower surface of the second metal plate that is inside the groove when viewed from above.

7. The bottom surface of the groove is flat. The semiconductor device according to claim 1, wherein the width of the groove in a plan view is 0.45 mm or more.

8. The semiconductor device according to any one of claims 1 to 7, wherein the corners of the portion exposed from the insulating mold resin on the lower surface of the second metal plate have an R shape.

9. The semiconductor device according to any one of claims 1 to 7, wherein the depth of the groove is 1 / 3 or more of the thickness of the second metal plate.

10. The semiconductor device according to any one of claims 1 to 7, wherein the depth of the groove is less than 51% of the thickness of the second metal plate.

11. The semiconductor device according to any one of claims 1 to 7, characterized in that the semiconductor element is formed of a wide-bandgap semiconductor.

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