Printed circuit board

Abstract

The present invention provides a printed circuit board that allows for easy formation of fine circuits, improved transmission characteristics, reduced warping, and miniaturization of via diameters when forming embedded circuits. [Solution] This disclosure relates to a printed circuit board 100A comprising: a first insulating material 111a having a first opening v1; an insulating layer 111 laminated on one surface of the first insulating material 111a, filling at least a portion of the first opening v1, and comprising a second insulating material 111b made of a different material from the first insulating material 111a; a wiring pattern 112 arranged on one surface of the first insulating material 111a and embedded in the second insulating material 111b such that one surface is exposed from one surface of the second insulating material 111b; and a via pattern 113 spaced apart from the first insulating material 111a within the first opening v1 and embedded in the second insulating material 111b such that one surface is exposed from one surface of the second insulating material 111b.

Description

Technical Field

[0001] The present disclosure relates to a printed circuit board.

Background Art

[0002] In the case of substrates included in high-specification products such as 2.5D package substrates, server package substrates, and AI package substrates, high-frequency characteristics, fine circuit formation, warpage control, etc. are required. On the other hand, it is possible to consider forming an embedded circuit on the substrate for fine circuit formation. For example, after forming a groove in an insulating layer by laser processing without a separate stopper layer, it can be filled by plating to form an embedded circuit. However, in this case, there may be a limit in controlling the thickness of the laser processing. Therefore, variations in the thickness of the circuit may occur. In this case, it may be difficult to achieve high-frequency characteristics. Further, when the processing depth becomes deep, there may occur a problem that the embedded circuit is electrically connected to a lower circuit or pad. Furthermore, the migration reliability may decrease. Furthermore, it may be difficult to control warpage. Also, there may be a limit in reducing the diameter of vias.

Summary of the Invention

Problems to be Solved by the Invention

[0003] One of the various objects of the present disclosure is to provide a printed circuit board capable of easily forming a fine circuit, improving transmission characteristics, reducing warpage, and reducing the diameter of vias when forming an embedded circuit.

Means for Solving the Problems

[0004] One of the various solutions proposed in the present disclosure is to form a hybrid-type insulating layer having at least a two-layer structure using different insulating materials, and form an embedded circuit in such a hybrid-type insulating layer using laser processing or the like.

[0005] For example, a printed circuit board according to one example may include: a first insulating material having a first opening; an insulating layer laminated on one surface of the first insulating material, filling at least a portion of the first opening, and containing a material different from the first insulating material; a wiring pattern placed on one surface of the first insulating material and embedded in the second insulating material such that one surface is exposed from one surface of the second insulating material; and a via pattern located within the first opening, separated from the first insulating material, and embedded in the second insulating material such that one surface is exposed from one surface of the second insulating material.

[0006] For example, a printed circuit board according to one example includes a first insulating layer, a first pad pattern disposed on the first insulating layer, a second insulating layer disposed on the first insulating layer and having a first opening that covers at least a portion of the first pad pattern and leaves at least another portion of the first pad pattern open, a wiring pattern disposed on the second insulating layer, a third insulating layer disposed on the second insulating layer and covering at least a portion of the wiring pattern and filling at least a portion of the first opening, and a via pattern connected to at least a portion of the open portion of the first pad pattern, separated from the second insulating layer within the first opening, and having at least a portion of its side surface covered by the third insulating layer, wherein the upper surface of the wiring pattern and the upper surface of the via pattern are exposed from the upper surface of the third insulating layer, and the second and third insulating layers may contain different insulating materials. [Effects of the Invention]

[0007] One of the various effects of this disclosure is that, when forming embedded circuits, it is possible to provide a printed circuit board that allows for easy formation of fine circuits, improved transmission characteristics, reduced warping, and miniaturization of via diameters. [Brief explanation of the drawing]

[0008] [Figure 1] This is a block diagram illustrating an example of an electronic equipment system. [Figure 2]This is a schematic cross-sectional view showing an example of a printed circuit board. [Figure 3] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 4] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 5] This is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 2. [Figure 6] This is a schematic cross-sectional view showing another example of a printed circuit board. [Figure 7] Figure 6 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 8] Figure 6 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 9] This is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 6. [Modes for carrying out the invention]

[0009] The following description of this disclosure will be made with reference to the attached drawings. The shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clearer explanation.

[0010] Figure 1 is a block diagram illustrating an example of an electronic equipment system.

[0011] Referring to the drawing, the electronic device 1000 houses a main board 1010. The main board 1010 is physically and / or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040, etc. These are also coupled with other electronic components, which will be described later, to form various signal lines 1090.

[0012] Chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, cryptographic processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Furthermore, these chip-related components 1020 can be combined with each other. Chip-related components 1020 can also be in the form of a package containing the aforementioned chips and electronic components.

[0013] Network-related component 1030 includes, but is not limited to, any other wireless and wired protocols designated as Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE (Long Term Evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and later. It may also include any other numerous wireless or wired standards or protocols. Furthermore, network-related component 1030 can be combined with chip-related component 1020.

[0014] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCCs (low-temperature co-firing ceramics), EMI (electromagnetic interference) filters, and MLCCs (multi-layer ceramic condensers). However, they are not limited to these, and may also include passive elements in the form of chip components used for various other applications. Furthermore, other components 1040 can be combined with chip-related components 1020 and / or network-related components 1030.

[0015] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the main board 1010, or not connected. Examples of other electronic components include a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. However, it is not limited to these, and may also include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), CDs (compact disks), DVDs (digital versatile disks), etc. In addition, depending on the type of electronic device 1000, it may also include other electronic components used for various purposes.

[0016] The electronic device 1000 can be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive device, a server, etc. However, it is not limited to these, and can also be any other electronic device that processes data.

[0017] FIG. 2 is a cross-sectional view schematically showing an example of a printed circuit board.

[0018] Referring to the drawings, a printed circuit board 100A according to an example includes an insulating layer 111 including a first insulating material 111a having a first opening v1 and a second insulating material 111b laminated on one surface of the first insulating material 111a and filling at least a part of the first opening v1, a wiring pattern 112 disposed on one surface of the first insulating material 111 and embedded in the second insulating material 111b so that one surface is exposed from one surface of the second insulating material 111b, and a via pattern 113 separated from the first insulating material 111a in the first opening v1 and embedded in the second insulating material 111b so that one surface is exposed from one surface of the second insulating material 111b. Each of the wiring pattern 112 and the via pattern 113 can be embedded in the second insulating material 111b in a form where one surface is substantially coplanar with one surface of the second insulating material 111b, but if necessary, it can also be embedded in the second insulating material 111b in a form where it is recessed inward from one surface of the second insulating material 111b. The first insulating material and the second insulating materials 111a and 111b can include different materials. For example, the insulating layer 111 can have a hybrid type laminated structure.

[0019] As described above, the printed circuit board 100A according to one example can include a wiring pattern 112 embedded on one side of the insulating layer 111, and thus can easily realize a fine circuit. In this case, the insulating layer 111 can include a laminated structure of a first insulating material and second insulating materials 111a and 111b containing different materials from each other. For example, the first insulating material 111a may contain glass fiber (glass fiber, glass cloth and / or glass fabric), but the second insulating material 111b may not contain glass fiber. In this case, since the second insulating material 111b does not contain glass fiber, pattern grooves for forming an embedded circuit can be easily formed by laser processing. Furthermore, since glass fiber has relatively poor laser absorption and a high thermal decomposition temperature, the amount of energy required for processing is relatively high, so the glass fiber contained in the first insulating material 111a can act as a stopper layer for laser processing. Therefore, it is possible to prevent variations in the thickness of the fine circuit, and as a result, transmission characteristics can be improved. In addition, since the processing depth can be controlled, it is possible to prevent the embedded circuit from being electrically connected to the circuit or pads below. Furthermore, migration reliability can be improved. Additionally, warping can be reduced through the use of glass fibers.

[0020] Furthermore, in the printed circuit board 100A according to one example, a first opening v1 is formed in the first insulating material 111a by via processing, and the first opening v1 is filled with the second insulating material 111b. After that, a via hole penetrating the second insulating material 111b is processed on the first opening v1, and the via hole is filled by plating. As a result, a via pattern 113 can be formed which is separated from the first insulating material 111a within the first opening v1 and whose side surfaces are surrounded by the second insulating material 111b. In this case, regardless of whether the glass fibers contained in the first insulating material 111a protrude from the wall surface of the via hole, a via pattern 113 with a stably reduced diameter can be formed. On the other hand, such a via pattern 113 can have a landless structure. There may be no glass fibers or the like in the second insulating material 111b that serve as a stopper layer for land formation. In this case, laser processing for land formation may rather make the process difficult.

[0021] On the other hand, the first insulating material 111a may be thicker than the second insulating material 111b. For example, since the second insulating material 111b can be a layer for forming a wiring pattern 112 which is an embedded circuit, it can be formed relatively thinner than the first insulating material 111a. From a similar perspective, the first insulating material 111a can be an insulating material containing an insulating resin, an inorganic filler, and glass fibers, for example, a prepreg, and the second insulating material 111b can contain an insulating resin and an inorganic filler but does not contain glass fibers. For example, it can contain an Ajinomoto Build-up Film (ABF), but is not limited thereto.

[0022] Referring to the drawings, an example printed circuit board 100A may further include a core layer 101, a first pad pattern 102 disposed on one surface of the core layer 101, and a core wiring pattern 103 disposed on one surface of the core layer 101. An insulating layer 111, a wiring pattern 112, and a via pattern 113 may each be disposed on one surface of the core layer 101. At least a portion of the first pad pattern 102 may be covered with a first insulating material 111a, and at least another portion may be exposed from the first insulating material 111a through a first opening v1. The via pattern 113 may be connected to at least the other exposed portion of the first pad pattern 102. For example, the first pad pattern 102 can serve as a stopper layer for double via holes to form the via pattern 113. The core wiring pattern 103 can be embedded in the first insulating material 111a. In this case, the wiring pattern 112, which includes fine circuits, may be arranged at a higher density than the core wiring pattern 103. For example, the number of wiring lines, spacing, and pitch may be smaller.

[0023] On the other hand, the core layer 101, the first insulating material 111a, and the second insulating material 111b may be the first insulating layer 101, the second insulating layer 111a, and the third insulating layer 111b, respectively. Also, the core wiring pattern 103 may be the lower wiring pattern 103. For example, the structure is not limited to the term "core." For example, a printed circuit board 100A according to one example may include a first insulating layer 101, a first pad pattern 102 and a lower wiring pattern 103 disposed on the first insulating layer 101, a second insulating layer 111a disposed on the first insulating layer 101 and having a first opening v1 that covers at least a portion of each of the first pad pattern 102 and the lower wiring pattern 103 and leaves at least another portion of the first pad pattern 102 open, a wiring pattern 112 disposed on the second insulating layer 111a, a third insulating layer 111b disposed on the second insulating layer 111a and covering at least a portion of the wiring pattern 112 and filling at least a portion of the first opening v1, and a via pattern 113 connected to at least a portion of the opened first pad pattern 102, separated from the second insulating layer 111a within the first opening v1, and having at least a portion of its side covered by the third insulating layer 111b. Based on the orientation shown in the drawing, the top surfaces of the wiring pattern 112 and the via pattern 113 can be exposed from the top surface of the third insulating layer 111b, respectively. The second insulating layer and the third insulating layers 111b and 111c may contain different insulating materials.

[0024] The components of a printed circuit board 100A, as an example, will be described in more detail below with reference to the drawings.

[0025] The core layer 101 or the first insulating layer 101 may include an organic insulating material. Here, the organic insulating material may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or inorganic fillers, organic fillers and / or glass fibers together with these insulating resins. For example, the core layer 101 or the first insulating layer 101 may be, but is not limited to, a copper foil laminate (CCL), an unclad copper foil laminate (Unclad CCL), and may include other insulating materials. If necessary, the core layer 101 or the first insulating layer 101 may also include an inorganic insulating material such as glass, silicon, or ceramic. The core layer 101 or the first insulating layer 101 may also include a metal core.

[0026] The first pad pattern 102 may include metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first pad pattern 102 may include chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this as a pattern plating layer. However, it is not limited to this, and the first pad pattern 102 may also include titanium (Ti) layers and copper (Cu) layers formed by sputtering as seed layers. The first pad pattern 102 can perform various functions depending on the design. For example, the first pad pattern 102 may include signal transmission pads, power transmission pads, ground transmission pads, and the like.

[0027] The core wiring pattern 103 or the lower wiring pattern 130 may contain metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the core wiring pattern 103 or the lower wiring pattern 130 may include chemical copper formed by electroless plating as a seed layer, and based on this, electrocopper formed by electroplating as a pattern plating layer. However, it is not limited to this, and the core wiring pattern 103 or the lower wiring pattern 130 may also include titanium (Ti) layers and copper (Cu) layers formed by sputtering as seed layers. The core wiring pattern 103 or the lower wiring pattern 130 can perform various functions depending on the design. For example, the core wiring pattern 103 or the lower wiring pattern 130 may include signal transmission wiring, power transmission wiring, ground transmission wiring, and the like. On the other hand, these connections can have various pattern forms, such as lines, traces, and planes.

[0028] The first insulating material and the second insulating material 111a, 111b, or the second insulating layer and the third insulating layer 111a, 111b, may each include an organic insulating material. Here, the organic insulating material may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or an inorganic filler, an organic filler, and / or glass fibers together with these insulating resins. For example, the first insulating material 111a or the second insulating layer 111a may include a prepreg containing an insulating resin, an inorganic filler, and glass fibers, and the second insulating material 111b or the third insulating layer 111b may include, but are not limited to, an Ajinomoto build-up film (ABF) containing an insulating resin and an inorganic filler. For example, the first insulating material 111a or the second insulating layer 111a may include other organic insulating materials including a core material such as glass fibers, and the second insulating material 111b or the third insulating layer 111b may include other organic insulating materials that do not include a core material such as glass fibers.

[0029] The wiring pattern 112 may include metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the wiring pattern 112 may include chemical copper formed by electroless plating as a seed layer, and electrocopper formed by electroplating based on this as a pattern plating layer. However, it is not limited to this, and the wiring pattern 112 may also include titanium (Ti) layers and copper (Cu) layers formed by sputtering as seed layers. The wiring pattern 112 can perform various functions depending on the design. For example, the wiring pattern 112 may include wiring for signal transmission. These wirings can have various pattern forms such as lines and traces. If necessary, in addition to the wiring pattern 112 which is a fine circuit, other forms of wiring patterns may be further formed at substantially the same level as the wiring pattern 112 for power and ground.

[0030] The via pattern 113 may contain metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the via pattern 113 may include chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this as a pattern plating layer. However, it is not limited to this, and the via pattern 113 may also include titanium (Ti) layers and copper (Cu) layers formed by sputtering as seed layers. The via pattern 113 can perform various functions depending on the design. For example, the via pattern 113 may include signal transmission vias, power transmission vias, ground transmission vias, etc. On the other hand, the via pattern 113 may have a tapered shape in cross-section, with the width of the upper end being wider than the width of the lower end, based on the drawing. The via pattern 113 may also have a fill-plated via structure. Furthermore, the via pattern 113 can have a landless via structure.

[0031] Figures 3 and 4 are schematic process diagrams illustrating an example of the manufacturing process for the printed circuit board shown in Figure 2.

[0032] Referring to the drawing, first, a first pad pattern 102 and a core pad pattern 103 can be formed on the core layer 101. The first pad pattern 102 and the core pad pattern 103 can be formed by circuit formation processes such as SAP (Semi Additive Process), MSAP (Modified Semi Additive Process), and TT (Tenting). Next, a first insulating material 111a can be formed on the core layer 101 to cover the first pad pattern 102 and the core pad pattern 103. The first insulating material 111a can be formed by laminating an insulating material containing glass fibers, such as a prepreg. Next, a first opening v1 can be formed in the first insulating material 111a to expose at least a portion of the first pad pattern 102. The first opening v1 can be formed by CO2 or UV laser processing. Next, a second insulating material 111b can be formed on the first insulating material 111a to fill the first opening v1. The second insulating material 111b can be formed by laminating a glass fiber-free insulating material, such as Ajinomoto Build-Up Film (ABF).

[0033] Next, via holes h can be formed in the second insulating material 111b that fills the first opening v1, exposing at least a portion of the first pad pattern 102 again. Additionally, pattern grooves p can be formed in the second insulating material 111b for forming the wiring pattern 112. The via holes h can be formed by CO2 or UV laser processing. The pattern grooves p can be formed by excimer laser processing. Both the via holes h and the pattern grooves p can also be formed by excimer laser processing. In this case, separate pattern groove processing for land formation can be omitted for the via holes h. This is because there is no separate stopper layer, allowing for over-processing. Next, a plating layer M can be formed to fill the via holes h and pattern grooves p by plating. Sputtering, electroless plating, and / or electrolytic plating can be used for plating. Finally, the plating layer M on the second insulating material 111b can be removed by polishing using CMP (Chemical Mechanical Polishing) or a belt sander. As a result, the wiring pattern 112 and the via pattern 113 can be formed. During the polishing process, one surface of the second insulating material 111b and one surface of the wiring pattern 112 and the via pattern 113 can be substantially coplane, but is not limited to this; a portion of the wiring pattern 112 and the via pattern 113 can also be removed, causing one surface of each to be relatively recessed inward.

[0034] Through a series of processes, a printed circuit board 100A according to the example described above can be manufactured, and other explanations may be the same as those described above. On the other hand, the core layer 101, the first insulating material 111a, and the second insulating material 111b may be the first insulating layer 101, the second insulating layer 111a, and the third insulating layer 111b, respectively. Also, the core wiring pattern 103 may be the lower wiring pattern 103. For example, the process may not be limited to the term "core".

[0035] Figure 5 is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 2.

[0036] Referring to the drawings, the modified printed circuit board 100B may include a core layer 101, first pad patterns 102 arranged on opposite faces of the core layer 101, core wiring patterns 103 arranged on opposite faces of the core layer 101, through vias 105 that penetrate the core layer 101 and connect the first pad patterns 102 arranged on opposite faces of the core layer 101, and a plurality of build-up layers 150 arranged on opposite faces of the core layer 101. In this case, the plurality of build-up layers 150 may each include an insulating layer 111 containing the first insulating material and second insulating material 111a, 111b described in the above example printed circuit board 100A, a wiring pattern 112, and a via pattern 113. On the other hand, via patterns 113 contained in any two adjacent build-up layers 150 in the thickness direction from among a plurality of build-up layers 150 on one surface of the core layer 101, or on the other surface of the core layer 101, may be directly connected to each other. For example, separate pads or lands may be omitted between them. On the other hand, the configurations on both sides do not necessarily have to be symmetrical with respect to the core layer 101. For example, core wiring patterns 103 arranged on opposite surfaces of the core layer 101 may have the same or different design areas. Similarly, the plurality of build-up layers 150 may each have the same or different design areas.

[0037] Thus, the modified printed circuit board 100B may be a multilayer core board in which multiple build-up layers 150 are formed on both sides of the core layer 101. Therefore, it can be easily applied to large-area package substrates and the like. On the other hand, if necessary, multiple build-up layers 150 can be formed on only one or the other side of the core layer 101. In this case, it can be easily applied to interposer substrates and the like.

[0038] On the other hand, the core layer 101 may be thicker than each of the multiple build-up layers 150. For example, it may be thicker than each of the insulating layers 111 of the multiple build-up layers 150. For example, it may be thicker than each of the first insulating material and the second insulating material 111a, 111b contained in each of the insulating layers 111 of the multiple build-up layers 150. For example, the core layer 101 may be a copper foil laminate (CCL), an unclad copper foil laminate (Unclad CCL), etc., but is not limited to these, and may include other insulating materials. If necessary, the core layer 101 may also include inorganic insulating materials such as glass, silicon, or ceramic. The core layer 101 may also include a metal core.

[0039] On the other hand, the through via 105 may contain metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the through via 105 may contain chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this as a pattern plating layer. However, it is not limited to this, and the through via 105 may also contain titanium (Ti) layers and copper (Cu) layers formed by sputtering as seed layers. The through via 105 can perform various functions depending on the design. For example, the through via 105 may include signal transmission vias, power transmission vias, ground transmission vias, etc. On the other hand, the through via 105 may have a cylindrical shape, but is not limited to this, and may have an hourglass shape, etc. On the other hand, the through via 105 may have a fill-plated via structure, but is not limited to this, and may have a via structure filled with a filler material after conformal plating.

[0040] Other explanations may be substantially the same as those described in the above example of printed circuit board 100A and its manufacturing example.

[0041] Figure 6 is a schematic cross-sectional view showing another example of a printed circuit board.

[0042] Referring to the drawings, another example of a printed circuit board 100C is the printed circuit board 100A described above, wherein the first insulating material 111a may further have a second opening v2, and the second insulating material 111b may further fill at least a portion of the second opening v2, and a metal pattern 114 may be further embedded in the second insulating material 111a, separated from the first insulating material 111a within the second opening v2, with one side exposed from one side of the second insulating material 111b. Furthermore, a second pad pattern 104 may be further arranged on one surface of the core layer 101, with at least a portion covered by the first insulating material 111a and at least another portion exposed from the first insulating material 111a through the second opening v2. The metal pattern 114 may be connected to at least another exposed portion of the second pad pattern 104. The metal pattern 114 may be even thicker than the wiring pattern 112. The wiring pattern 112 may include signal transmission lines, and the metal pattern 114 may include power transmission lines. The core wiring pattern 103 may be omitted, but may not be omitted if necessary.

[0043] Thus, the printed circuit board 100C according to another example may further include a metal pattern 114 arranged in a similar manner to the via pattern 113. In this case, since the metal pattern 114 may be relatively thicker than the wiring pattern 112, it can be easily used when a thicker thickness is required, such as for power signal lines. Furthermore, since it can include substantially the same structure as the printed circuit board 100A according to another example described above, it can also have substantially the same technical effects as described above.

[0044] On the other hand, the core layer 101, the first insulating material 111a, and the second insulating material 111b may be the first insulating layer 101, the second insulating layer 111a, and the third insulating layer 111b, respectively. For example, the structure is not limited to the term "core." For example, a printed circuit board 100C according to another example comprises a first insulating layer 101, a first pad pattern 102 and a second pad pattern 104 disposed on the first insulating layer 101, a second insulating layer 111a disposed on the first insulating layer 101 and having a first opening v1 that opens another part of the first pad pattern 102 and the second pad pattern 104, and a second opening v2 that opens another part of the second pad pattern 104, a wiring pattern 112 disposed on the second insulating layer 111a, and the second insulating layer 111a The layers may include a third insulating layer 111b positioned on top, covering at least a portion of the wiring pattern 112 and filling at least a portion of the first opening V1; a via pattern 113 connected to at least a portion of the opening of the first pad pattern 102, separated from the second insulating layer 111a within the first opening v1, and having at least a portion of its sides covered by the third insulating layer 111b; and a metal pattern 114 connected to at least a portion of the opening of the second pad pattern 104, separated from the second insulating layer 111a within the second opening v2, and having at least a portion of its sides covered by the third insulating layer 111b. In the orientation shown in the drawings, the top surfaces of the wiring pattern 112, the via pattern 113, and the metal pattern 114 can each be exposed from the top surface of the third insulating layer 111b. The second insulating layer and the third insulating layers 111b, 111c may contain different insulating materials.

[0045] Below, the components of the printed circuit board 100C, as shown in another example, will be described in more detail with reference to the drawings.

[0046] The second pad pattern 104 may include metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the second pad pattern 104 may include chemical copper formed by electroless plating as a seed layer, or a titanium (Ti) layer and a copper (Cu) layer formed by sputtering as seed layers. It may also include electroplated copper formed by electroplating based on the seed layers as a pattern plating layer. The second pad pattern 104 can perform various functions depending on the design. For example, the second pad pattern 104 may include power transmission pads.

[0047] The metal pattern 114 can include metals such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the metal pattern 114 can include chemical copper formed by electroless plating as a seed layer, and can also include titanium (Ti) and copper (Cu) layers formed by sputtering as seed layers. It can also include electroplated copper formed by electroplating based on the seed layers as a pattern plating layer. The metal pattern 114 can perform various functions depending on the design. For example, the metal pattern 114 can include wiring for power transmission. These wirings can have various pattern forms such as lines and traces. On the other hand, the metal pattern 114 can have columnar shapes on multiple surfaces based on the drawing, but is not limited to this.

[0048] Other explanations may be substantially the same as those described in the above example of printed circuit board 100A and its manufacturing example.

[0049] Figures 7 and 8 are schematic process diagrams illustrating an example of the manufacturing process for the printed circuit board shown in Figure 6.

[0050] Referring to the drawing, first, a first pad pattern and second pad patterns 102 and 104 can be formed on the core layer 101. The first pad pattern and second pad patterns 102 and 104 can be formed by circuit formation processes such as SAP (Semi Additive Process), MSAP (Modified Semi Additive Process), and TT (Tenting). Next, a first insulating material 111a can be formed on the core layer 101 to cover the first pad pattern and second pad patterns 102 and 104. The first insulating material 111a can be formed by laminating an insulating material containing glass fibers, such as a prepreg. Next, a first opening and a second opening v1 and v2 can be formed in the first insulating material 111a, exposing at least a portion of the first pad pattern and the second pad patterns 102 and 104, respectively. The first opening and the second opening v1 and v2 can be formed by CO2 or UV laser processing. Next, a second insulating material 111b can be formed on the first insulating material 111a, filling the first and second openings v1 and v2. The second insulating material 111b can be formed by laminating a glass fiber-free insulating material, such as Ajinomoto Build-Up Film (ABF).

[0051] Next, via holes h and trenches t can be formed in the second insulating material 111b that fills the first and second openings v1 and v2, respectively, to expose at least a portion of the first and second pad patterns 102 and 104 again. Pattern grooves p for forming the wiring pattern 112 can also be formed in the second insulating material 111b. The via holes h and trenches t can be formed by CO2 or UV laser processing. The pattern grooves p can be formed by excimer laser processing. The via holes h, trenches t and pattern grooves p can also all be formed by excimer laser processing. In this case, separate pattern groove processing for land formation can be omitted for the via holes h. This is because there is no separate stopper layer, so over-processing is possible. Next, a plating layer M can be formed to fill the via holes h, trenches t and pattern grooves p by plating. Plating can be sputtering, electroless plating and / or electrolytic plating. Next, the plating layer M on the second insulating material 111b can be removed by polishing using CMP (Chemical Mechanical Polishing) or a belt sander. As a result, the wiring pattern 112, via pattern 113, and metal pattern 114 can be formed. During the polishing process, one surface of each of the second insulating material 111b, wiring pattern 112, via pattern 113, and metal pattern 114 can become substantially coplane, but this is not limited to the case. Parts of each of the wiring pattern 112, via pattern 113, and metal pattern 114 can also be removed, causing one surface of each to be relatively recessed inward.

[0052] A printed circuit board 100C can be manufactured through a series of processes as described above, and other details may be the same as those described above. On the other hand, the core layer 101, the first insulating material 111a, and the second insulating material 111b may be the first insulating layer 101, the second insulating layer 111a, and the third insulating layer 111b, respectively. For example, the process may not be limited to the term "core."

[0053] Figure 9 is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 6.

[0054] Referring to the drawings, the modified printed circuit board 100D may include a core layer 101, first pad patterns 102 arranged on opposite faces of the core layer 101, second pad patterns 104 arranged on opposite faces of the core layer 101, through vias 105 that penetrate the core layer 101 and connect the first pad patterns 102 arranged on opposite faces of the core layer 101, and a plurality of build-up layers 180 arranged on opposite faces of the core layer 101. In this case, the plurality of build-up layers 180 may each include an insulating layer 111 containing the first and second insulating materials 111a and 111b described in the other example printed circuit board 100C described above, a wiring pattern 112, a via pattern 113, and a metal pattern 114. Furthermore, a third pad pattern 118 may be further included at substantially the same level as the wiring pattern 112. On the other hand, via patterns 113 included in any two build-up layers 180 that are adjacent to each other in the thickness direction among the multiple build-up layers 180 on one surface of the core layer 101, or on the other surface of the core layer 101, may be directly connected to each other. For example, separate pads or lands may be omitted between them. On the other hand, on the other surface of the core layer 101, the metal pattern 114 and the third pad pattern 118 may be connected to each other in any two build-up layers 180 that are adjacent to each other in the thickness direction among the multiple build-up layers 180. On the other hand, the configurations on both sides do not necessarily have to be symmetrical with respect to the core layer 101. For example, the multiple build-up layers 150 may each have the same or different design areas. On the other hand, if necessary, the core wiring patterns 103 described above may be further arranged on opposite surfaces of the core layer 101, and these may each have the same or different design areas.

[0055] Thus, the modified printed circuit board 100D may be a multilayer core board in which multiple build-up layers 180 are formed on both sides of the core layer 101. Therefore, it can be easily applied to large-area package substrates and the like. On the other hand, if necessary, multiple build-up layers 180 can be formed on only one or the other side of the core layer 101. In this case, it can be easily applied to interposer substrates and the like.

[0056] On the other hand, the core layer 101 may be thicker than each of the multiple build-up layers 180. For example, it may be thicker than each of the insulating layers 111 of the multiple build-up layers 180. For example, it may be thicker than each of the first insulating material and the second insulating material 111a, 111b contained in each of the insulating layers 111 of the multiple build-up layers 180. For example, the core layer 101 may be a copper foil laminate (CCL), an unclad copper foil laminate (Unclad CCL), etc., but is not limited to these, and may include other insulating materials. If necessary, the core layer 101 may also include inorganic insulating materials such as glass, silicon, or ceramic. The core layer 101 may also include a metal core.

[0057] On the other hand, the through via 105 may contain metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the through via 105 may contain chemical copper formed by electroless plating as a seed layer, and electroplated copper formed by electroplating based on this as a pattern plating layer. However, it is not limited to this, and the through via 105 may also contain titanium (Ti) layers and copper (Cu) layers formed by sputtering as seed layers. The through via 105 can perform various functions depending on the design. For example, the through via 105 may include signal transmission vias, power transmission vias, ground transmission vias, etc. On the other hand, the through via 105 may have a cylindrical shape, but is not limited to this, and may have an hourglass shape, etc. On the other hand, the through via 105 may have a fill-plated via structure, but is not limited to this, and may have a via structure filled with a filler material after conformal plating.

[0058] On the other hand, the third pad pattern 118 can include metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the third pad pattern 118 can include chemical copper formed by electroless plating as a seed layer, and can also include titanium (Ti) and copper (Cu) layers formed by sputtering as seed layers. Furthermore, it can include electroplated copper formed by electroplating based on the seed layers as a pattern plating layer. The third pad pattern 118 can perform various functions depending on the design. For example, the third pad pattern 118 can include power transmission pads.

[0059] Other explanations may be substantially the same as those described in the printed circuit board 100A and its manufacturing example relating to the above example, and the printed circuit board 100B and its manufacturing example relating to the other example relating to the above example.

[0060] In this disclosure, the expression "cover" can include not only covering the entire surface but also covering at least a portion of it, and can include not only direct covering but also indirect covering. Similarly, the expression "fill" can include not only completely filling the surface but also filling at least a portion of it, and can also include roughly filling the surface. For example, this can include cases where there are some gaps or voids. Furthermore, the expression "enclose" can include not only completely enclosing the surface but also partially enclosing or roughly enclosing it. Moreover, "expose" can include not only completely exposing the surface but also partially exposing it, and exposure can mean exposing the surface that embeds the component in question. For example, an opening exposing a pad can mean exposing the pad from the resist layer, and a surface treatment layer or the like can be further placed on the exposed pad.

[0061] In this disclosure, "placed within an opening" can include not only cases where the object is completely placed within the opening, but also cases where it partially protrudes upward or downward on a cross-sectional surface. For example, if the object is placed within an opening on a plane, it can be interpreted in a broader sense.

[0062] In this disclosure, the determination can be made including process errors, positional deviations, and measurement errors that occur during the manufacturing process. For example, substantially coplane means not only when it is perfectly coplane, but also when it is approximately coplane. Similarly, substantially having a specific shape means not only when it is exactly that shape, but also when it is approximately that shape. Furthermore, substantially identical insulating materials mean not only when they are exactly the same insulating materials, but also when they are of the same type. Therefore, the composition of the insulating materials may be substantially the same, but their specific composition ratios may differ slightly.

[0063] In this disclosure, "cross-sectional" can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed from the side. "Planar" can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed from the top or bottom.

[0064] In this disclosure, terms such as "lower side," "bottom," and "bottom surface" are used for convenience to mean the downward direction relative to the cross-section of the drawing, while terms such as "upper side," "top," and "top surface" are used to mean the opposite direction. However, this is merely a definition of direction for explanatory purposes, and the scope of the claims is not specifically limited by such descriptions of direction, and the concepts of "upper" and "lower" can change at any time.

[0065] In this disclosure, the term "connected" includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, the term "electrically connected" includes both physically connected and non-connected cases. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of those components. In some cases, without departing from the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component.

[0066] In this disclosure, thickness, width, length, depth, line width, spacing, pitch, separation distance, surface roughness, etc., can be measured using a scanning microscope or optical microscope, based on a cross-section obtained by polishing or cutting the printed circuit board. The cut cross-section can be a vertical or horizontal cross-section, and the values ​​can be measured based on the required cut cross-section. For example, the width of the upper and / or lower ends of a via can be measured on a cross-section obtained by cutting the central axis of the via. In this case, if the values ​​are not constant, the values ​​can be determined by taking the average of the values ​​measured at any five points.

[0067] The expression "example" as used in this disclosure does not mean that each embodiment is identical to the others, but is provided to highlight and illustrate the unique and distinct features of each embodiment. However, the examples presented above do not preclude their implementation in combination with features of other examples. For example, even if a matter described in one example is not described in another example, it can be understood as a description related to the other example, unless there is a description in the other example that contradicts or inconsistes with that matter.

[0068] The terms used in this disclosure are for illustrative purposes only and are not intended to limit the disclosure. Where otherwise, singular expressions include plural expressions unless the context clearly indicates otherwise. [Explanation of symbols]

[0069] 1000 electronic equipment 1010 Mainboard 1020 Chip-related components 1030 Network-related components 1040 Other parts 1050 Camera 1060 Antenna 1070 Display 1080 Battery 1090 signal line 100A, 100B, 100C, 100D Printed Circuit Boards 101 Core layer (first insulating layer) 102 First Pad Pattern 103 Core wiring pattern (lower wiring pattern) 104 Second pad pattern 105 Through Via 111 Insulating layer 111a First insulating material (second insulating layer) 111b Second insulating material (third insulating layer) 112 Wiring Patterns 113 via patterns 114 Metal Patterns 118 Third Pad Pattern 150, 180 build-up layer

Claims

1. An insulating layer comprising a first insulating material having a first opening, and a second insulating material laminated on one surface of the first insulating material, filling at least a portion of the first opening and containing a material different from that of the first insulating material, A wiring pattern is placed on one surface of the first insulating material and embedded in the second insulating material such that one surface is exposed from one surface of the second insulating material, A printed circuit board comprising: a via pattern embedded in the second insulating material, separated from the first insulating material within the first opening, such that one side is exposed from one side of the second insulating material.

2. The printed circuit board according to claim 1, wherein one surface of each of the wiring pattern and the via pattern is substantially co-plane with one surface of the second insulating material, or is recessed inward from one surface of the second insulating material.

3. The printed circuit board according to claim 1, wherein the first insulating material is thicker than the second insulating material.

4. The first insulating material comprises an insulating resin, an inorganic filler, and glass fibers. The second insulating material comprises an insulating resin and an inorganic filler. The printed circuit board according to claim 1, wherein the second insulating material does not contain glass fibers.

5. The first insulating material includes a prepreg. The printed circuit board according to claim 4, wherein the second insulating material includes Ajinomoto Build-Up Film (ABF).

6. Including the core layer, The insulating layer, the wiring pattern, and the via pattern are each arranged on at least one surface of the core layer. A first pad pattern is further disposed on at least one surface of the core layer, with at least a portion of it covered by the first insulating material and at least another portion of it exposed from the first insulating material through a first opening. The printed circuit board according to claim 1, wherein the via pattern is connected to at least another exposed portion of the first pad pattern.

7. The printed circuit board according to claim 6, wherein the core layer is thicker than the first insulating material and the second insulating material, respectively.

8. The printed circuit board according to claim 7, wherein the core layer comprises a copper foil laminate (CCL) or an unclad copper foil laminate (Unclad CCL).

9. A core wiring pattern embedded in the first insulating material is further arranged on at least one surface of the core layer. The printed circuit board according to claim 6, wherein the wiring pattern is arranged at a higher density than the core wiring pattern.

10. The first insulating material further has a second opening, The second insulating material further fills at least a portion of the second opening, The second insulating material has a metal pattern embedded in it that is separated from the first insulating material within the second opening, with one side exposed from one side of the second insulating material. A second pad pattern is further disposed on at least one surface of the core layer, with at least a portion of it covered by the first insulating material and at least another portion of it exposed from the first insulating material through the second opening. The printed circuit board according to claim 6, wherein the metal pattern is connected to at least another exposed portion of the second pad pattern.

11. The aforementioned metal pattern is even thicker than the aforementioned wiring pattern. The aforementioned wiring pattern includes signal transmission lines, The printed circuit board according to claim 10, wherein the metal pattern includes power transmission lines.

12. On one and the other facets of the core layer, the first pad pattern and a plurality of build-up layers are arranged, respectively. The first pad patterns, respectively, arranged on one and the other facets of the core layer, are connected to each other via through vias that penetrate the core layer. Each of the plurality of build-up layers includes the insulating layer, the wiring pattern, and the via pattern, The printed circuit board according to claim 6, wherein via patterns included in any two build-up layers that are adjacent to each other in the thickness direction among the plurality of build-up layers are directly connected to each other on one surface of the core layer or on the other surface of the core layer.

13. The first insulating layer and A first pad pattern disposed on the first insulating layer, A second insulating layer is disposed on the first insulating layer and has a first opening that covers at least a portion of the first pad pattern and leaves at least another portion of the first pad pattern open. A wiring pattern arranged on the second insulating layer, A third insulating layer is disposed on the second insulating layer, covering at least a portion of the wiring pattern and filling at least a portion of the first opening, The first pad pattern includes a via pattern connected to at least a portion of the opening, separated from the second insulating layer within the first opening, and having at least a portion of its side covered by the third insulating layer, The upper surface of the wiring pattern and the upper surface of the via pattern are each exposed from the upper surface of the third insulating layer. A printed circuit board comprising the second insulating layer and the third insulating layer, each containing different insulating materials.

14. The second insulating layer is even thicker than the third insulating layer. The second insulating layer comprises an insulating resin, an inorganic filler, and glass fibers. The aforementioned third insulating layer comprises an insulating resin and an inorganic filler. The printed circuit board according to claim 13, wherein the third insulating layer does not contain glass fibers.

15. A second pad pattern is further arranged on the first insulating layer, which is at least partially covered by the second insulating layer. The second insulating layer further has a second opening that causes at least another portion of the second pad pattern to open, The third insulating layer further fills at least a portion of the second opening, Further arranged on the second pad pattern is a metal pattern connected to at least other exposed parts of the second pad pattern, separated from the second insulating layer within the second opening, and at least a portion of its sides covered by the third insulating layer. The printed circuit board according to claim 13, wherein the upper surface of the metal pattern is exposed from the upper surface of the third insulating layer.

16. The aforementioned metal pattern is even thicker than the aforementioned wiring pattern. The aforementioned wiring pattern includes signal transmission lines, The printed circuit board according to claim 15, wherein the metal pattern includes power transmission lines.

Images