Motor control device and motor control method

Abstract

The goal is to enable the application of drive and braking commands to a motor using a minimal number of control signals. [Solution] A motor control device for controlling a motor via a drive circuit, comprising: a generation means for generating a short-circuit braking signal to apply short-circuit braking to the motor when a control signal for controlling the motor instructs the motor to stop; and an instruction means for outputting a short-circuit braking instruction to the drive circuit when a short-circuit braking signal has been generated, and outputting an instruction based on the control signal to the drive circuit when a short-circuit braking signal has not been generated.

Description

Technical Field

[0001] The present disclosure relates to a motor control device and a motor control method.

Background Art

[0002] Conventionally, a DC motor control device using an H-bridge circuit has been proposed. For example, in Patent Document 1, a device for driving and braking a brushless DC motor has been proposed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in Patent Document 1, when driving a brushless DC motor, it is necessary to generate a PWM signal in a PWM signal generation unit and supply it to a motor driver IC. Also, when braking a brushless DC motor, it is necessary to generate a BRK signal in a BRK signal generation unit and supply it to the motor driver IC. For this reason, each signal generation unit, signal terminal, and signal reception unit for driving and braking are required. Furthermore, in a motor driver IC incorporating N motor drive circuits, N times the amount of such hardware is required.

[0005] The present disclosure has been made in view of the above problems, and an object thereof is to be able to give a drive command and a braking command to a motor using a small number of control signals.

Means for Solving the Problems

[0006] One embodiment of the present disclosure is a motor control device for controlling a motor via a drive circuit, comprising: a generating means for generating a short-circuit braking signal for applying short-circuit braking to the motor when a control signal for controlling the motor instructs the motor to stop; and an instructing means for outputting an instruction for short-circuit braking to the drive circuit when the short-circuit braking signal has been generated, and for outputting an instruction based on the control signal to the drive circuit when the short-circuit braking signal has not been generated. [Effects of the Invention]

[0007] According to this disclosure, drive commands and braking commands can be given to a motor using fewer control signals. [Brief explanation of the drawing]

[0008] [Figure 1] Perspective view showing the printer [Figure 2] A diagram showing a processor, an H-bridge control group, four H-bridge circuits, and a DC motor. [Figure 3] This figure shows the H-bridge control unit, H-bridge circuit, and DC motor according to the first embodiment. [Figure 4] Input / Output Truth Table of the Instruction Unit in the First Embodiment [Figure 5] Timing diagram showing the operation of the circuit shown in Figure 3 when the duty cycle detection unit is disabled. [Figure 6] Timing diagram showing the operation of the circuit shown in Figure 3 when the duty cycle detection unit is enabled. [Figure 7] A flowchart explaining how to stop a motor. [Figure 8] A diagram showing an H-bridge control unit, an H-bridge circuit, and a DC motor according to a second embodiment. [Figure 9] Input / Output Truth Table of the Instruction Unit in the Second Embodiment [Figure 10] Timing diagram showing the operation of the circuit shown in Figure 8 when the duty cycle detection unit is disabled. [Figure 11]Timing diagram showing the operation of the circuit shown in Figure 8 when the duty cycle detection unit is enabled. [Figure 12] Input / output truth table of the instruction unit in another embodiment [Modes for carrying out the invention]

[0009] The embodiments will be described in detail below with reference to the attached drawings. Note that the following embodiments do not limit the disclosures relating to the claims. While the embodiments describe multiple features, not all of these features are essential to the disclosure, and the features may be combined in any way. Furthermore, in the attached drawings, the same or similar configurations are given the same reference numerals, and redundant descriptions are omitted.

[0010] [First Embodiment] Next, embodiments of the present disclosure applied to a multifunction inkjet printer (also simply referred to as "printer") are shown below.

[0011] First, the overall configuration is shown in Figure 1. Figure 1(a) shows a perspective view of the printer 101. Referring to Figure 1(a), the printer 101 includes a transport mechanism 102 for transporting recording media, an LF motor 122 for moving the transport mechanism 102, and a cleaning mechanism 103 for cleaning the nozzles of the recording head (not shown). The printer 101 also includes a carriage 105 on which the recording head is mounted, a CR motor 121 for moving the carriage 105 on which the recording head is mounted, and an automatic transport mechanism 106 for picking up only the topmost recording media from multiple recording media and feeding them to the printer. Furthermore, the printer 101 includes an APP motor 123 for moving the cleaning mechanism 103 and the automatic transport mechanism 106, an AC adapter 104, and a control board 107 for controlling the entire printer 101.

[0012] FIG. 1(b) is a perspective view showing the printer 101 in a state where the image reading unit 111, the panel unit 114, etc. are incorporated. The image reading unit 111 includes an image reading sensor 112 for reading an image from a document, an FB motor 124 for moving the image reading sensor 112, and a document table glass 113 on which the document is placed.

[0013] FIG. 2 is a diagram showing a processor, an H-bridge control unit group, and four series of H-bridge circuits (also referred to as "drive circuits"), and a DC motor.

[0014] The printer 101 includes a processor 202 such as a CPU, a ROM 203, and an H-bridge control unit group 201. The printer 101 also includes four series of H-bridge circuits 204 to 207. The processor 202 and the H-bridge control unit group 201 control the CR motor 121, the LF motor 122, the APP motor 123, and the FB motor 124 via the four series of H-bridge circuits 204 to 207.

[0015] The processor 202 outputs a motor control signal and an operation mode switching signal MODE to the H-bridge control unit group 201 based on the firmware stored in the ROM 203. Here, the motor control signal includes a motor power-on permission signal ENx and a motor rotation switching signal PHx (described later, x is A, B, C, D).

[0016] Also, prior to driving the motor, the processor 202 writes a setting to the short-circuit braking permission flag register 304.

[0017] Here, a part of the motor control signal (that is, the signal lines of ENA, PHA, and PHB) functions as a strobe, a clock, and a data signal when the operation mode switching signal MODE is at the Low level. Therefore, in order for the processor 202 to write a setting to the short-circuit braking permission flag register 304, the operation mode switching signal MODE is set to Low, and 3-wire serial interface communication is performed with the H-bridge control unit group 201.

[0018] The signal lines such as ENx and PHx (x=A, B, C, and D) function as lines for the following signals when the operating mode switching signal MODE is at a high level.

[0019] The motor power-on permission signal ENx is a binary signal that indicates whether motor x can be powered on or not. A Low state indicates that power cannot be supplied, and a High state indicates that power can be supplied.

[0020] The motor rotation switching signal PHx is a PWM signal, and the signal level determines the direction of current flow to motor x, while the duty cycle determines the amount of current flowing to motor x. For example, if the current flow direction is CW when the signal level is Low, and CCW when the signal level is High, then the following applies: That is, when the PWM duty cycle (ratio of High state to period) is 40 percent, the average current flowing to motor x is 20 percent in the CW direction ((50-40) / 50=0.2) (percentage of maximum current flow, the same applies below). Also, when the duty cycle is 50 percent, the average current flowing to motor x is zero. Also, when the duty cycle is 70 percent, the average current flowing to motor x is 40 percent in the CCW direction ((70-40) / 50=0.4). Note that a PWM signal is generally a periodic signal that repeats with a PWM period.

[0021] Furthermore, if the setting value of the short-circuit braking flag register 304 in the H-bridge control unit group 201 indicates that short-circuit braking is enabled, the motor x is short-circuited (short-brake).

[0022] The H-bridge control group 201 outputs power transistor control signals A1-A4, B1-B4, C1-C4, and D1-D4 for the H-bridge circuits 204-207 based on the motor control signals output from the processor 202. Here, the motor control signals include the motor power-on enable signal ENx and the motor rotation switching signal PHx. In other words, the H-bridge control group 201 outputs power transistor control signals A1-A4 for the H-bridge circuit 204 based on the motor control signals (motor power-on enable signal ENA and motor rotation switching signal PHA) output from the processor 202. Furthermore, the H-bridge control group 201 outputs power transistor control signals B1-B4 for the H-bridge circuit 204 based on the motor control signals (motor power-on enable signal ENB and motor rotation switching signal PHB) output from the processor 202. In addition, the H-bridge control group 201 outputs power transistor control signals C1-C4 for the H-bridge circuit 204 based on the motor control signals (motor power-on enable signal ENC and motor rotation switching signal PHC) output from the processor 202. Furthermore, the H-bridge control unit group 201 outputs power transistor control signals D1 to D4 of the H-bridge circuit 204 based on the motor control signals (motor power-on permission signal END and motor rotation switching signal PHD) output from the processor 202.

[0023] H-bridge circuits 204-207 directly control the energization of motors 121-124 based on control signals A1-A4, B1-B4, C1-C4, and D1-D4 output from H-bridge control group 201. Specifically, H-bridge circuit 204 directly controls the energization of motor 121 based on control signals A1-A4 output from H-bridge control group 201. Furthermore, H-bridge circuit 204 directly controls the energization of motor 122 based on control signals B1-B4 output from H-bridge control group 201. In addition, H-bridge circuit 204 directly controls the energization of motor 123 based on control signals C1-C4 output from H-bridge control group 201. Furthermore, H-bridge circuit 204 directly controls the energization of motor 124 based on control signals D1-D4 output from H-bridge control group 201.

[0024] Next, Figure 3 shows the details of the H-bridge control unit 201A included in the H-bridge control unit group 201.

[0025] Figure 3 shows the portion related to H-bridge control unit 201A, which is included in the H-bridge control unit group 201, specifically the portion related to H-bridge control unit 201A to 201D. In other words, Figure 3 shows the portion that outputs control signals A1 to A4 to the H-bridge circuit 204. The portions related to H-bridge control units 201B to 201D have a similar configuration to the portion related to H-bridge control unit 201A.

[0026] The H-bridge control unit 201A outputs power transistor control signals A1 to A4 to the H-bridge circuit 204 based on the motor control signals (motor power-on permission signal ENA and motor rotation switching signal PHA) input from the processor 202.

[0027] If the flag stored in the short-circuit braking permission flag register 301 is set to 1 (High), indicating permission, the duty cycle detection unit (also called the "generation means") 302 operates as follows: The duty cycle detection unit 302 monitors the PWM duty cycle of the motor rotation switching signal PHA, and if it detects that the PWM duty cycle is 50 percent, it sets the signal level of the short-circuit braking signal SBA to High. If the duty cycle detection unit 302 detects that the PWM duty cycle is not 50 percent, it sets the signal level of the short-circuit braking signal SBA to Low. The short-circuit braking signal SBA is supplied to the short-circuit braking input terminal SB of the instruction unit 303. Here, a PWM duty cycle of 50 percent for the motor rotation switching signal PHA, which is the motor control signal, means that the motor rotation switching signal PHA is instructing to stop. Also, if the signal level of the short-circuit braking signal SBA is High, it instructs to apply short-circuit control to the motor. Therefore, when the duty cycle detection unit 302 determines that the motor rotation switching signal PHA is instructing the motor to stop, it instructs the motor to apply short-circuit braking using the short-circuit braking signal SBA.

[0028] If the setting of the short-circuit braking enable flag register 301 is 0 (Low), indicating prohibition, the signal level of the short-circuit braking signal SBA is always Low.

[0029] The instruction unit 303 issues instructions to the H-bridge circuit 204 based on the motor control signal input from the processor 202 and the short-circuit braking signal SBA input from the duty cycle detection unit 302. Here, the motor control signal includes the motor energization enable signal ENA and the motor rotation switching signal PHA. The instructions are also indicated by the power transistor control signals A1 to A4 of the H-bridge circuit 204.

[0030] Figure 4 shows the input / output truth table for the instruction unit 303. The first embodiment applies a so-called PHASE chopping method, which controls the amount of current supplied to the DC brush motor by the duty cycle of the motor rotation switching signal PHA. Therefore, the input / output truth table shown in Figure 4 is in accordance with the PHASE chopping method.

[0031] In the truth table's "H-bridge state" column, a "×" indicates that the signal level of the power transistor control signal Ax (x=1~4) is the signal level that turns off the power transistor TAx. Conversely, a "〇" indicates that the signal level of the power transistor control signal Ax (x=1~4) is the signal level that turns on the power transistor TAx. In the following explanation, the signal level of the power transistor control signal Ax will be replaced with the on (〇) and off (×) states of the power transistor TAx.

[0032] First, the first row of the truth table indicates that when the motor energization enable signal ENA is at a low level, power transistors TA1-TA4 are turned off regardless of the levels of the motor rotation switching signal PHA and the short-circuit braking signal SBA (Don't Care). In this case, the two input terminals of motor 121 are de-energized (i.e., open).

[0033] The second row of the truth table indicates the following: The motor power-on permission signal ENA is at a high level, indicating that the motor can be powered. The short-circuit braking signal SBA is at a low level, indicating that the short-circuit braking instruction is disabled. Furthermore, the motor rotation switching signal PHA is at a low level, indicating that power transistors TA2 and TA4 are on (○) and power transistors TA1 and TA3 are off (×). Referring to Figure 3, in this case, current flows from the power supply VM through power transistor TA4, motor 121, and power transistor TA2 to GND. That is, current IMA flows from terminal A* to terminal A in the direction of motor 121. Here, terminals A and A* are input terminals for driving.

[0034] The third row of the truth table indicates the following: The motor power-on permission signal ENA is at a High level, indicating that the motor can be powered. The short-circuit braking signal SBA is at a Low level, indicating that the short-circuit braking instruction is disabled. Furthermore, the motor rotation switching signal PHA is at a High level, indicating that power transistors TA1 and TA3 are on (○) and power transistors TA2 and TA4 are off (×). Referring to Figure 3, in this case, current flows from the power supply VM through power transistor TA1, motor 121, and power transistor TA3 to GND. In other words, current IMA flows through motor 121 from terminal A to terminal A*.

[0035] The fourth row of the truth table indicates the following: The motor power-on permission signal ENA is at a high level, indicating that the motor can be powered. Also, the short-circuit braking signal SBA is at a high level, indicating that the short-circuit braking instruction is active. Therefore, regardless of the level of the motor rotation switching signal PHA (Don't Care), power transistors TA2 and TA3 are on (○) and power transistors TA1 and TA4 are off (×). Referring to Figure 3, in this case, a closed circuit is formed between power transistor TA2, motor 121, power transistor TA3, and GND. In other words, terminals A and A* of motor 121 are short-circuited.

[0036] The H-bridge control unit (not shown), which outputs control signals B1-B4, C1-C4, and D1-D4 to the other H-bridge circuits 205-207, is the same as the H-bridge control unit 201A, so a redundant explanation is omitted.

[0037] Next, with reference to Figures 5 and 6, the operation of the H-bridge control unit, H-bridge circuit, and DC motor according to this embodiment will be described.

[0038] First, with reference to Figure 5, let's explain the operation when the duty cycle detection unit 302 is disabled. Figure 5 is a timing diagram showing the operation of the circuit shown in Figure 3 when the motor energization permission signal ENA is at a high level and the setting value of the short-circuit braking permission flag register 301 is 0 (low). In this case, since the setting value of the short-circuit braking permission flag register 301 is 0 (low), the duty cycle detection unit 302 is disabled. Therefore, the signal level of the short-circuit braking signal SBA is always at a low level.

[0039] First, during the period from time T501 to time T502, the motor rotation switching signal PHA is at a low level. Therefore, during the period from time T501 to time T502, the motor energization permission signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a low level. This is the same as the state in the second row of the truth table. Therefore, the instruction unit 303 sets the power transistor control signals A1 to A4 so that power transistors TA2 and TA4 are turned on (○) and power transistors TA1 and TA3 are turned off (×). As a result, terminal A of the motor 131 is at the GND level and terminal A* is at the VM level. Therefore, current flows from terminal A* to terminal A.

[0040] Next, during the period from time T502 to time T503, the motor rotation switching signal PHA is at a high level. Therefore, during the period from time T502 to time T503, the motor energization permission signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the third row of the truth table. Therefore, the instruction unit 303 sets the power transistor control signals A1 to A4 so that power transistors TA1 and TA3 are turned on (○) and power transistors TA2 and TA4 are turned off (×). As a result, terminal A of the motor 131 becomes VM level, and terminal A* becomes GND level. Therefore, current flows from terminal A to terminal A*.

[0041] Furthermore, the ratio of the period during which the motor power-on permission signal ENA is at a high level and the short-circuit braking signal SBA is at a low level, to the period during which these levels switch, is adjusted to match the ratio of the period during which the motor rotation switching signal PHA is at a low level to the period during which it is at a high level.

[0042] From this point forward, as in the period from time T503 to time T509, when the motor rotation switching signal PHA is at a low level, terminal A of motor 131 becomes GND level and terminal A* becomes VM level. Also, when the motor rotation switching signal PHA is at a high level, terminal A of motor 131 becomes VM level and terminal A* becomes GND level.

[0043] During the period from time T501 to time T503, the duty cycle of the motor rotation switching signal PHA, which is a PWM signal, is 50 percent. Therefore, during the period from time T501 to time T503, the motor rotation switching signal PHA is indicating "stop".

[0044] During the period from time T503 to time T505, the duty cycle of the motor rotation switching signal PHA is 50 percent. Therefore, during the period from time T503 to time T505, the motor rotation switching signal PHA is indicating "stop".

[0045] During the period from time T505 to time T507, the duty cycle of the motor rotation switching signal PHA is 20 percent. Therefore, during the period from time T505 to time T507, the motor rotation switching signal PHA is indicating "reverse rotation".

[0046] During the period from time T507 to time T509, the duty cycle of the motor rotation switching signal PHA is 20 percent. Therefore, during the period from time T507 to time T509, the motor rotation switching signal PHA is indicating "reverse rotation".

[0047] Next, with reference to Figure 6, the operation when the duty cycle detection unit 302 is enabled will be explained. Figure 6 is a timing diagram showing the operation of the circuit shown in Figure 3 when the motor energization permission signal ENA is at a high level and the setting value of the short-circuit braking permission flag register 301 is 1 (High). In this case, since the setting value of the short-circuit braking permission flag register 301 is 1 (High), the duty cycle detection unit 302 is enabled. Therefore, the short-circuit braking signal SBA becomes high or low depending on the duty cycle of the motor rotation switching signal PHA. Specifically, the short-circuit braking signal SBA becomes high if the duty cycle of the motor rotation switching signal PHA is 50 percent, and low otherwise.

[0048] First, the motor rotation switching signal PHA is at a low level during the period from time T601 to time T602. Also, although not shown in the diagram, the duty cycle of the motor rotation switching signal PHA is not 50 percent during the PWM period preceding the PWM period from time T601 to time T603. Therefore, the short-circuit braking signal SBA is at a low level during the period from time T601 to time T603. Consequently, the motor energization enable signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a low level during the period from time T601 to time T602. This is the same as the state in the second row of the truth table. Therefore, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 accordingly. The H-bridge circuit 204 sets the power transistors TA2 and TA4 to be ON (○) and power transistors TA1 and TA3 to be OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A of motor 131 becomes GND level, and terminal A* becomes VM level. Therefore, current flows from terminal A* to terminal A.

[0049] During the period from time T602 to time T603, the motor rotation switching signal PHA is at a high level. Also, although not shown in the diagram, as mentioned above, in the PWM period preceding the PWM period from time T601 to time T603, the duty cycle of the motor rotation switching signal PHA is not 50 percent. Therefore, during the period from time T601 to time T603, the short-circuit braking signal SBA is at a low level. Consequently, during the period from time T602 to time T603, the motor energization enable signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the third row of the truth table. Therefore, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 accordingly. The H-bridge circuit 204 sets the power transistors TA1 and TA3 to ON (○) and power transistors TA2 and TA4 to OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A* of motor 131 becomes GND level, and terminal A becomes VM level. Therefore, current flows from terminal A to terminal A*.

[0050] During the period from time T603 to time T604, the motor rotation switching signal PHA is at a low level. Also, during the PWM period from time T601 to time T603, the duty cycle of the motor rotation switching signal PHA is 50 percent. Therefore, during the period from time T603 to time T605, the short-circuit braking signal SBA is at a high level. Consequently, during the period from time T603 to time T604, the motor energization enable signal ENA is at a high level, the short-circuit braking signal SBA is at a high level, and the motor rotation switching signal PHA is at a low level. This is the same as the state in row 4 of the truth table. Therefore, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 accordingly. The H-bridge circuit 204 sets the power transistors TA2 and TA3 to ON (○) and power transistors TA1 and TA4 to OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A of the motor 131 is at the GND level, and terminal A* is at the GND level. Therefore, terminals A* and A are short-circuited. This applies short-circuit braking to motor 121.

[0051] The state during the period from time T604 to time T605 is the same as the state during the period from time T603 to time T604, except that the motor rotation switching signal PHA changes from Low to High. Therefore, it corresponds to the state in row 4 of the truth table. Accordingly, the instruction unit 303 outputs an instruction to the H-bridge circuit 204. The H-bridge circuit 204 sets the power transistors TA2 and TA3 to ON (○) and power transistors TA1 and TA4 to OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A of the motor 131 is at GND level, and terminal A* is at GND level. Therefore, terminal A* and terminal A are short-circuited. This applies short-circuit braking to the motor 121.

[0052] During the period from time T605 to time T606, the motor rotation switching signal PHA is at a low level. Also, during the PWM period from time T603 to time T605, the duty cycle of the motor rotation switching signal PHA is 50 percent. Therefore, during the period from time T605 to time T607, the short-circuit braking signal SBA is at a high level. Consequently, during the period from time T605 to time T606, the motor energization enable signal ENA is at a high level, the short-circuit braking signal SBA is at a high level, and the motor rotation switching signal PHA is at a low level. This is the same as the state in row 4 of the truth table. Therefore, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 accordingly. The H-bridge circuit 204 sets the power transistors TA2 and TA3 to ON (○) and power transistors TA1 and TA4 to OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A of the motor 131 is at the GND level, and terminal A* is at the GND level. Therefore, terminals A* and A are short-circuited. This applies short-circuit braking to motor 121.

[0053] The state during the period from time T606 to time T607 is the same as the state during the period from time T605 to time T606, except that the motor rotation switching signal PHA changes from Low to High. Therefore, it corresponds to the state in row 4 of the truth table. Accordingly, the instruction unit 303 outputs an instruction to the H-bridge circuit 204. The H-bridge circuit 204 sets the power transistors TA2 and TA3 to ON (○) and power transistors TA1 and TA4 to OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A of the motor 131 is at GND level, and terminal A* is at GND level. Therefore, terminal A* and terminal A are short-circuited. This applies short-circuit braking to the motor 121.

[0054] During the period from time T607 to time T608, the motor rotation switching signal PHA is at a low level. Also, during the PWM period from time T605 to time T607, the duty cycle of the motor rotation switching signal PHA is 20 percent. Therefore, during the period from time T607 to time T609, the short-circuit braking signal SBA is at a low level. Consequently, during the period from time T607 to time T608, the motor energization enable signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a low level. This is the same as the state in the second row of the truth table. Therefore, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 accordingly. The H-bridge circuit 204 sets the power transistors TA2 and TA4 to be ON (○) and power transistors TA1 and TA3 to be OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A of motor 131 becomes GND level, and terminal A* becomes VM level. Therefore, the voltage at terminal A* becomes higher than the voltage at terminal A, and current IMA flows from terminal A* to terminal A.

[0055] The state during the period from time T608 to time T609 is the same as the state during the period from time T605 to time T606, except that the motor rotation switching signal PHA changes from Low to High. Therefore, it corresponds to the state in the third row of the truth table. Accordingly, the instruction unit 303 outputs an instruction to the H-bridge circuit 204. The H-bridge circuit 204 sets the power transistors TA1 and TA3 to ON (○) and power transistors TA2 and TA4 to OFF (×) according to the power transistor control signals A1 to A4 included in the instruction. As a result, terminal A of the motor 131 becomes VM level and terminal A* becomes GND level. Therefore, the voltage at terminal A becomes higher than the voltage at terminal A*, and current IMA flows from terminal A to terminal A*.

[0056] The actions shown in Figure 6 can be summarized as follows:

[0057] Although not shown in the diagram, the duty cycle of the motor rotation switching signal PHA is not 50 percent in the period preceding the PWM period from time T601 to time T603. Therefore, in the PWM period from time T601 to time T603, the duty cycle detection unit 302 sets the short-circuit braking signal SBA to a low level (does not output the short-circuit braking signal SBA). Accordingly, the instruction unit 303 outputs an instruction to the H-bridge circuit 204. This instruction is based on the motor rotation switching signal PHA, which has a 50 percent duty cycle. In accordance with the instruction, the H-bridge circuit 204 flows current IMA from terminal A* to terminal A and current IMA from terminal A to terminal A* to the motor 121 in a time-division manner of 50 percent each during this period. This time-division current control, when viewed on average during this period, is equivalent to outputting an instruction to the H-bridge circuit to "stop" the motor 121.

[0058] During the PWM period from time T601 to time T603, the duty cycle of the motor rotation switching signal PHA is 50 percent. Therefore, during the PWM period from time T603 to time T605, the duty cycle detection unit 302 sets the short-circuit braking signal SBA to a high level (outputs the short-circuit braking signal SBA). Consequently, during this period, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 accordingly. The H-bridge circuit 204, in accordance with the instruction and the short-circuit braking signal SBA, short-circuits the motor terminals A* and A together. In other words, the H-bridge control unit 201A outputs an instruction to the H-bridge circuit to "short-circuit brake" the motor.

[0059] During the PWM period from time T603 to time T605, the duty cycle of the motor rotation switching signal PHA is 50 percent. Therefore, during the PWM period from time T605 to time T607, the duty cycle detection unit 302 sets the short-circuit braking signal SBA to a high level (outputs the short-circuit braking signal SBA). Consequently, during this period, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 accordingly. The H-bridge circuit 204, in accordance with the instruction and the short-circuit braking signal SBA, short-circuits the motor terminals A* and A together. In other words, the H-bridge control unit 201A outputs an instruction to the H-bridge circuit to "short-circuit brake" the motor.

[0060] During the PWM period from time T605 to time T607, the duty cycle of the motor rotation switching signal PHA is 20 percent, not 50 percent. Therefore, during the PWM period from time T607 to time T609, the duty cycle detection unit 302 sets the short-circuit braking signal SBA to a low level (does not output the short-circuit braking signal SBA). Also, during the PWM period from time T607 to time T609, the duty cycle of the motor rotation switching signal PHA is 20 percent. Therefore, the instruction unit 303 outputs an instruction to the H-bridge circuit 204 according to the motor rotation switching signal PHA which has a duty cycle of 20 percent during this period. The H-bridge circuit 204, according to the instruction, flows current IMA from terminal A* to terminal A and current IMA from terminal A to terminal A* to the motor 121 in an 80 percent:20 percent time division ratio. This time-division current control, when viewed on average over this period, is equivalent to outputting an instruction to the H-bridge circuit to "reverse" the motor 121.

[0061] Furthermore, if the duty cycle of the motor rotation switching signal PHA is less than 50 percent during the PWM period from time T607 to time T609, the instruction unit 303 outputs an instruction to the H-bridge circuit to "reverse" the motor 121. If the duty cycle of the motor rotation switching signal PHA is greater than 50 percent during the PWM period from time T607 to time T609, the instruction unit 303 outputs an instruction to the H-bridge circuit to "forward" the motor 121. Here, "forward" and "reverse" depend on which rotation direction is considered "forward," so it is also possible to consider "forward" as "reverse" and "reverse" as "forward."

[0062] Figure 7 is a flowchart illustrating how to stop the motor.

[0063] During the transport operation of the recording head, the processor 202 drives the CR motor 121 (S701). When the processor 202 detects that the recording head has been transported by the desired amount (YES in S702), it sets the PWM duty cycle of the motor rotation switching signal PHA to 50 percent (S703). In the first PWM cycle, the instruction unit 303 issues a "stop" instruction to the M bridge circuit according to the PWM signal, but in the second and subsequent PWM cycles, the instruction unit 303 issues a "short-circuit braking" instruction to the M bridge circuit according to the short-circuit braking signal SBA. When the processor 202 detects that the CR motor 121 has stopped (YES in S704), it terminates the control.

[0064] Thus, according to this embodiment, both drive control and braking control can be performed using only the motor rotation switching signal PHA.

[0065] [Second Embodiment] The basic configuration of the printer 101 according to the second embodiment is the same as that of the first embodiment, so redundant explanations will be omitted.

[0066] Next, Figure 8 shows the details of the H-bridge control unit 201A included in the H-bridge control unit group 201.

[0067] Figure 8 shows the portion related to H-bridge control unit 201A, which is included in the H-bridge control unit group 201, specifically the portion related to H-bridge control unit 201A to 201D. In other words, Figure 8 shows the portion that outputs control signals A1 to A4 to the H-bridge circuit 204. The portions related to H-bridge control units 201B to 201D have a similar configuration to the portion related to H-bridge control unit 201A.

[0068] The H-bridge control unit 201A outputs power transistor control signals A1 to A4 to the H-bridge circuit 204 based on the motor control signals (motor power-on permission signal ENA and motor rotation switching signal PHA) input from the processor 202.

[0069] If the flag stored in the short-circuit braking permission flag register 301 is set to 1 (High), indicating permission, the duty cycle detection unit (also called the "generation means") 802 operates as follows: The duty cycle detection unit 802 monitors the PWM duty cycle of the motor energization permission signal ENA, and if it detects that the PWM duty cycle is zero percent, it sets the signal level of the short-circuit braking signal SBA to High. Also, if the duty cycle detection unit 802 detects that the PWM duty cycle exceeds zero percent, it sets the signal level of the short-circuit braking signal SBA to Low. The short-circuit braking signal SBA is supplied to the short-circuit braking input terminal SB of the instruction unit 1003. Here, a PWM duty cycle of zero percent for the motor energization permission signal ENA, which is a motor control signal, means that the motor energization permission signal ENA is instructing to stop. Also, when the signal level of the short-circuit braking signal SBA is High, it instructs to apply short-circuit control to the motor. Therefore, when the duty cycle detection unit 302 determines that the motor energization permission signal ENA, which is a motor control signal, is instructing the motor to stop, it instructs the motor to apply short-circuit braking using the short-circuit braking signal SBA.

[0070] If the setting of the short-circuit braking enable flag register 301 is 0 (Low), indicating prohibition, the signal level of the short-circuit braking signal SBA is always Low.

[0071] The instruction unit 1003 outputs power transistor control signals A1 to A4 of the H-bridge circuit 204 based on the motor control signal input from the processor 202 and the short-circuit braking signal SBA input from the duty detection unit 802. Here, the motor control signal includes the motor energization enable signal ENA and the motor rotation switching signal PHA.

[0072] Figure 9 shows the input / output truth table for the instruction unit 1003. The second embodiment applies the so-called ENABLE chopping method, which controls the amount of current supplied to the DC brush motor by the duty cycle of the motor energization permission signal ENABLE. Therefore, the input / output truth table shown in Figure 4 is in accordance with the ENABLE chopping method.

[0073] Since the "H-bridge state" column in the truth table has already been explained, I will omit any further explanation.

[0074] First, the first row of the truth table indicates the following: If the motor energization enable signal ENA is at a low level and the short-circuit braking signal SBA is at a low level, then power transistors TA1~TA4 are turned off regardless of the level of the motor rotation switching signal PHA (Don't Care). In this case, the two input terminals of motor 121 are de-energized (i.e., open).

[0075] The second row of the truth table indicates the following: The motor power-on permission signal ENA is at a high level, indicating that the motor can be powered. The short-circuit braking signal SBA is at a low level, indicating that the short-circuit braking instruction is disabled. Furthermore, the motor rotation switching signal PHA is at a low level, indicating that power transistors TA2 and TA4 are on (○) and power transistors TA1 and TA3 are off (×). Referring to Figure 8, in this case, current flows from the power supply VM through power transistor TA4, motor 121, and power transistor TA2 to GND. In other words, current IMA flows from terminal A* to terminal A in the motor 121.

[0076] The third row of the truth table indicates the following: The motor power-on permission signal ENA is at a High level, indicating that the motor can be powered. The short-circuit braking signal SBA is at a Low level, indicating that the short-circuit braking instruction is disabled. Furthermore, the motor rotation switching signal PHA is at a High level, indicating that power transistors TA1 and TA3 are on (○) and power transistors TA2 and TA4 are off (×). Referring to Figure 8, in this case, current flows from the power supply VM through power transistor TA1, motor 121, and power transistor TA3 to GND. In other words, current IMA flows through motor 121 from terminal A to terminal A*.

[0077] The fourth row of the truth table indicates the following: Since the short-circuit braking signal SBA is at a high level, it indicates that the short-circuit braking instruction is active. Therefore, regardless of the level of the motor energization permission signal ENA and the motor rotation switching signal PHA (Don't Care), power transistors TA2 and TA3 are on (○) and power transistors TA1 and TA4 are off (×). Referring to Figure 8, in this case, a closed circuit is formed between power transistor TA2, motor 121, power transistor TA3, and GND. In other words, terminals A and A* of motor 121 are short-circuited.

[0078] The H-bridge control unit (not shown), which outputs control signals B1-B4, C1-C4, and D1-D4 to the other H-bridge circuits 205-207, is the same as the H-bridge control unit 201A, so a redundant explanation is omitted.

[0079] Next, the operation of the H-bridge control unit, H-bridge circuit, and DC motor according to this embodiment will be described with reference to Figures 10 and 11.

[0080] First, with reference to Figure 10, let's explain the operation when the duty cycle detection unit 802 is disabled. Figure 10 is a timing diagram showing the operation of the circuit shown in Figure 3 when the motor rotation switching signal PHA is at a high level and the setting value of the short-circuit braking enable flag register 301 is 0 (low). In this case, since the setting value of the short-circuit braking enable flag register 301 is 0 (low), the duty cycle detection unit 802 is disabled. Therefore, the signal level of the short-circuit braking signal SBA is always at a low level.

[0081] First, the motor energization permission signal ENA is at a low level during the period from time T1001 to time T1002. Therefore, during the period from time T1001 to time T1002, the motor energization permission signal ENA is at a low level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the first row of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA1 to TA4 are turned off (×). As a result, terminals A and A* of motor 131 are opened (de-energized).

[0082] Next, the motor power-on signal ENA is at a high level during the period from time T1002 to time T1003. Therefore, during the period from time T1002 to time T1003, the motor power-on signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the third row of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA1 and TA3 are turned on (○) and power transistors TA2 and TA4 are turned off (×). As a result, terminal A of motor 131 becomes VM level, and terminal A* becomes GND level.

[0083] From this point onward, as in the period from time T1001 to time T1003, when the motor power-on signal ENA is at a low level, terminals A and A* of motor 131 are open. Also, when the motor power-on signal ENA is at a high level, terminal A of motor 131 becomes VM level and terminal A* becomes GND level.

[0084] During the period from time T1001 to time T1003, the duty cycle of the motor power-on signal ENA, which is a PWM signal, is 20 percent. Therefore, during the period from time T1001 to time T1003, the motor power-on signal ENA is indicating "forward rotation".

[0085] During the period from time T1003 to time T1004, the duty cycle of the motor power-on permission signal ENA is zero percent. Therefore, during the period from time T1003 to time T1004, the motor power-on permission signal ENA is indicating "stop".

[0086] During the period from time T1004 to time T1005, the duty cycle of the motor power-on signal ENA is zero percent. Therefore, during the period from time T1004 to time T1005, the motor power-on signal ENA is indicating "stop".

[0087] During the period from time T1005 to time T1007, the duty cycle of the motor power-on signal ENA is 20 percent. Therefore, during the period from time T1005 to time T1007, the motor power-on signal ENA is indicating "forward rotation".

[0088] During the period from time T1007 to time T1009, the duty cycle of the motor power-on signal ENA is 20 percent. Therefore, during the period from time T1007 to time T1009, the motor power-on signal ENA is indicating "forward rotation".

[0089] Note that the motor rotation switching signal PHA may be at a low level, but in this case, the control of power transistors TA1 and TA3 will be reversed compared to the control of power transistors T2 and T4. Consequently, "forward rotation" will change to "reverse rotation".

[0090] Figure 10 also shows the current IMA flowing between terminals A and A* of motor 121. During the period when power transistors TA1 to TA4 are off (×), the current IMA gradually decreases. The current IMA during this period is the regenerative current. Also, during the period when power transistors TA1 and TA3 are on (〇) and power transistors TA2 and TA4 are off (×), the current IMA rises sharply.

[0091] Next, with reference to Figure 11, the operation when the duty cycle detection unit 802 is enabled will be explained. Figure 11 is a timing diagram showing the operation of the circuit shown in Figure 8 when the motor rotation switching signal PHA is at a high level and the setting value of the short-circuit braking enable flag register 301 is 1 (High). In this case, since the setting value of the short-circuit braking enable flag register 301 is 1 (High), the duty cycle detection unit 802 is enabled. Therefore, the short-circuit braking signal SBA becomes either high or low level depending on the duty cycle of the motor energization enable signal ENA. Specifically, the short-circuit braking signal SBA becomes high level if the duty cycle of the motor energization enable signal ENA is zero percent, and low level otherwise.

[0092] First, the motor energization enable signal ENA is at a low level during the period from time T1101 to time T1102. Also, although not shown in the diagram, the duty cycle of the motor energization enable signal ENA is not zero percent during the PWM period preceding the PWM period from time T1101 to time T1103. Therefore, the short-circuit braking signal SBA is at a low level during the period from time T1101 to time T1103. Consequently, during the period from time T1101 to time T1102, the motor energization enable signal ENA is at a low level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the first row of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA1 to TA4 are turned off (×). As a result, terminals A and A* of the motor 131 are opened (de-energized).

[0093] During the period from time T1102 to time T1103, the motor power-on enable signal ENA is at a high level. Also, although not shown in the diagram, as mentioned above, in the PWM period preceding the PWM period from time T1101 to time T1103, the duty cycle of the motor rotation switching signal PHA is not zero percent. Therefore, during the period from time T1101 to time T1103, the short-circuit braking signal SBA is at a low level. Consequently, during the period from time T1102 to time T1103, the motor power-on enable signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the third row of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA1 and TA3 are turned on (○) and power transistors TA2 and TA4 are turned off (×). As a result, terminal A* of the motor 131 is at the GND level and terminal A is at the VM level.

[0094] During the period from time T1103 to time T1104, the motor power-on enable signal ENA is at a low level. Also, during the PWM period from time T1101 to time T1103, the duty cycle of the motor power-on enable signal ENA is not zero percent (it is greater than zero percent). Therefore, during the period from time T1103 to time T1104, the short-circuit braking signal SBA is at a low level. Consequently, during the period from time T1103 to time T1104, the motor power-on enable signal ENA is at a low level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the first row of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA1 to TA4 are turned off (×). As a result, terminals A and A* of motor 131 are opened (de-energized).

[0095] During the period from time T1104 to time T1105, the motor power-on enable signal ENA is at a low level. Also, during the PWM period from time T1103 to time T1104, the duty cycle of the motor power-on enable signal ENA is zero percent. Therefore, during the period from time T1104 to time T1105, the short-circuit braking signal SBA is at a high level. Thus, during the period from time T1104 to time T1105, the motor power-on enable signal ENA is at a low level, the short-circuit braking signal SBA is at a high level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in row 4 of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA2 and TA3 are turned on (○) and power transistors TA1 and T4 are turned off (×). As a result, terminals A and A* of the motor 131 are short-circuited to each other.

[0096] During the period from time T1105 to time T1106, the motor power-on enable signal ENA is at a low level. Also, during the PWM period from time T1104 to time T1105, the duty cycle of the motor power-on enable signal ENA is zero percent. Therefore, during the period from time T1105 to time T1106, the short-circuit braking signal SBA is at a high level. Thus, during the period from time T1105 to time T1106, the motor power-on enable signal ENA is at a low level, the short-circuit braking signal SBA is at a high level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in row 4 of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA2 and TA3 are turned on (○) and power transistors TA1 and T4 are turned off (×). As a result, terminals A and A* of the motor 131 are short-circuited to each other.

[0097] During the period from time T1106 to time T1107, the motor power-on enable signal ENA is at a high level. Also, during the PWM period from time T1104 to time T1105, the duty cycle of the motor power-on enable signal ENA is zero percent. Therefore, during the period from time T1105 to time T1106, the short-circuit braking signal SBA is at a high level. Consequently, during the period from time T1106 to time T1107, the motor power-on enable signal ENA is at a high level, the short-circuit braking signal SBA is at a high level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in row 4 of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA2 and TA3 are turned on (○) and power transistors TA1 and T4 are turned off (×). As a result, terminals A and A* of the motor 131 are short-circuited to each other.

[0098] During the period from time T1107 to time T1108, the motor power-on enable signal ENA is at a low level. Also, during the PWM period from time T1105 to time T1106, the duty cycle of the motor power-on enable signal ENA is not zero percent (it is greater than zero percent). Therefore, during the period from time T1107 to time T1109, the short-circuit braking signal SBA is at a low level. Consequently, during the period from time T1107 to time T1108, the motor power-on enable signal ENA is at a low level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the first row of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA1 to TA4 are turned off (×). As a result, terminals A and A* of the motor 131 are opened (de-energized).

[0099] During the period from time T1108 to time T1109, the motor power-on enable signal ENA is at a high level. Also, during the PWM period from time T1105 to time T1106, the duty cycle of the motor power-on enable signal ENA is not zero percent (it is greater than zero percent). Therefore, during the period from time T1107 to time T1109, the short-circuit braking signal SBA is at a low level. Consequently, during the period from time T1107 to time T1108, the motor power-on enable signal ENA is at a high level, the short-circuit braking signal SBA is at a low level, and the motor rotation switching signal PHA is at a high level. This is the same as the state in the first row of the truth table. Therefore, the indicator unit 1003 sets the power transistor control signals A1 to A4 so that power transistors TA1 to TA4 are turned off (×). As a result, terminals A and A* of the motor 131 are opened (de-energized).

[0100] Note that the motor rotation switching signal PHA may be at a low level, but in this case, the control of power transistors TA1 and TA3 will be reversed compared to the control of power transistors T2 and T4. Consequently, "forward rotation" will change to "reverse rotation".

[0101] The actions shown in Figure 11 can be summarized as follows:

[0102] Although not shown in the diagram, the duty cycle of the motor energization enable signal ENA is not zero percent in the period preceding the PWM period from time T1101 to time T1103. Therefore, in the PWM period from time T1101 to time T1103, the duty cycle detection unit 802 sets the short-circuit braking signal SBA to a low level (does not output the short-circuit braking signal SBA). Consequently, the instruction unit 1003 energizes terminals A and A* of motor 121 with a 20 percent duty cycle, according to the motor energization enable signal ENA, which has a 20 percent duty cycle during this period. This time-division current control is equivalent to outputting an instruction to the H-bridge circuit to "rotate" motor 121 in the forward direction when viewed on average over this period.

[0103] During the PWM period from time T1101 to time T1103, the duty cycle of the motor energization enable signal ENA is 20 percent. Therefore, during the PWM period from time T1103 to time T1104, the duty cycle detection unit 802 sets the short-circuit braking signal SBA to a low level (does not output the short-circuit braking signal SBA). Also, during the PWM period from time T1103 to time T1104, the duty cycle of the motor energization enable signal ENA is zero percent. Therefore, during this period, the instruction unit 1003 deenerges motor terminals A* and A according to the motor energization enable signal ENA. In other words, the H-bridge control unit 201A outputs an instruction to the H-bridge circuit to "stop" the motor.

[0104] During the PWM period from time T1103 to time T1104, the duty cycle of the motor energization enable signal ENA is zero percent. Therefore, during the PWM period from time T1104 to time T1105, the duty cycle detection unit 802 sets the short-circuit braking signal SBA to a high level (outputs the short-circuit braking signal SBA). Consequently, during this period, the instruction unit 1003 short-circuits motor terminals A* and A according to the short-circuit braking signal SBA. In other words, the H-bridge control unit 201A outputs an instruction to the H-bridge circuit to "short-circuit brake" the motor.

[0105] During the PWM period from time T1104 to time T1105, the duty cycle of the motor energization enable signal ENA is zero percent. Therefore, during the PWM period from time T1105 to time T1106, the duty cycle detection unit 802 sets the short-circuit braking signal SBA to a high level (outputs the short-circuit braking signal SBA). Consequently, during this period, the instruction unit 1003 short-circuits motor terminals A* and A according to the short-circuit braking signal SBA. In other words, the H-bridge control unit 201A outputs an instruction to the H-bridge circuit to "short-circuit brake" the motor.

[0106] In the period preceding the PWM period from time T1105 to time T1107, the duty cycle of the motor energization enable signal ENA is 20 percent. Therefore, in the PWM period from time T1107 to time T1109, the duty cycle detection unit 802 sets the short-circuit braking signal SBA to a low level (does not output the short-circuit braking signal SBA). Consequently, the instruction unit 1003 energizes terminals A and A* of motor 121 with a 20 percent duty cycle, according to the motor energization enable signal ENA which has a 20 percent duty cycle during this period. This time-division current control is equivalent to outputting an instruction to the H-bridge circuit to "rotate" motor 121 in the forward direction when viewed on average over this period.

[0107] In the second embodiment, the method for stopping the motor described with reference to Figure 7 is also performed.

[0108] Thus, according to this embodiment, both drive control and braking control can be performed using only the motor rotation switching signal PHA.

[0109] As described above, in this embodiment, both driving and braking can be controlled with a single signal generation unit, signal terminal, and signal receiving unit. This eliminates the need for dedicated braking hardware and makes it easy to add a braking function to a driving-only system.

[0110] [Other embodiments] In the embodiments described above, the printing method of the printing device is an inkjet method. However, the printing method that can be used is not limited to this, and other printing methods such as electrophotography or thermal transfer may also be used.

[0111] In the first embodiment, the instruction unit 303 follows the truth table shown in Figure 4. Accordingly, the instruction unit 303 outputs a "reverse" instruction to the H-bridge circuit when the duty cycle of the motor rotation switching signal PHA is less than 50 percent. Also, the instruction unit 303 outputs a "forward" instruction to the H-bridge circuit when the duty cycle of the motor rotation switching signal PHA is greater than 50 percent.

[0112] However, this is not limited to this, and a truth table as shown in Figure 12(a) may also be used. In this case, the instruction unit 303 outputs a "forward rotation" instruction to the H-bridge circuit when the duty cycle of the motor rotation switching signal PHA is less than 50 percent. Also, the instruction unit 303 outputs a "reverse rotation" instruction to the H-bridge circuit when the duty cycle of the motor rotation switching signal PHA exceeds 50 percent.

[0113] In the second embodiment, the instruction unit 1003 follows the truth table shown in Figure 9. Accordingly, the instruction unit 1003 outputs a "reverse" instruction to the H-bridge circuit when the duty cycle of the motor power-on permission signal ENA is zero percent or greater and the motor rotation switching signal PHA is at a low level. Also, the instruction unit 1003 outputs a "forward rotation" instruction to the H-bridge circuit when the duty cycle of the motor power-on permission signal ENA is zero percent or greater and the motor rotation switching signal PHA is at a high level.

[0114] However, this is not limited to this, and the instruction unit 1003 may follow a truth table as shown in Figure 12(b). The instruction unit 1003 outputs a "forward rotation" instruction to the H-bridge circuit when the duty cycle of the motor power-on permission signal ENA is zero percent or greater and the motor rotation switching signal PHA is at a low level. Also, the instruction unit 1003 outputs a "reverse rotation" instruction to the H-bridge circuit when the duty cycle of the motor power-on permission signal ENA is zero percent or greater and the motor rotation switching signal PHA is at a high level.

[0115] In the second embodiment, the instruction unit 1003 follows a truth table as shown in Figure 9. Accordingly, the instruction unit 1003 outputs a "stop" instruction to the H-bridge circuit when the duty cycle of the motor energization permission signal ENA is zero percent.

[0116] However, this is not limited to the above, and the instruction unit 1003 may follow a truth table as shown in Figure 12(c). In this case, the instruction unit 1003 outputs a "stop" instruction to the H-bridge circuit when the duty cycle of the motor energization permission signal ENA is 100 percent.

[0117] The instruction unit 1003 may also follow a truth table as shown in Figure 12(d). In this case, the instruction unit outputs a "stop" instruction to the H-bridge circuit when the duty cycle of the motor power-on permission signal ENA is 100 percent. The instruction unit 1003 also outputs a "forward rotation" instruction to the H-bridge circuit when the duty cycle of the motor power-on permission signal ENA is less than or equal to 100 percent and the motor rotation switching signal PHA is at a low level. The instruction unit 1003 also outputs a "reverse rotation" instruction to the H-bridge circuit when the duty cycle of the motor power-on permission signal ENA is less than 100 percent and the motor rotation switching signal PHA is at a high level.

[0118] Some of the motors from motor 121 to motor 124 may be controlled by a circuit other than the circuit consisting of an H-bridge control unit and a bridge circuit.

[0119] Embodiments of the present disclosure (in particular, H-bridge control units) may also be implemented by a computer of a system or device that includes one or more circuits (e.g., application-specific integrated circuits (ASICs)) for performing one or more functions of the embodiments described above, and / or by reading and executing computer-executable instructions (e.g., one or more programs) for performing one or more functions of the embodiments described above, recorded on a storage medium (which may be more entirely referred to as a “non-temporary computer-readable storage medium”), and / or by controlling one or more circuits (e.g., application-specific integrated circuits (ASICs)) for performing one or more functions of the embodiments described above. The computer may comprise one or more processors (e.g., a central processing unit (CPU), a microprocessor (MPU)) and may include separate computers or a network of separate processors for reading and executing computer-executable instructions. Computer-executable instructions may be provided to the computer from, for example, a network or a storage medium. The storage medium may include, for example, one or more of the following: hard disks, random access memory (RAM), read-only memory (ROM), storage for distributed computing systems, optical discs (Compact Discs (CDs), Digital Multipurpose Discs (DVDs), or Blu-ray Discs (BDs) (registered trademarks)), flash memory devices, and memory cards.

[0120] <Technical Features of This Disclosure> This disclosure includes the following configurations and methods.

[0121] [Configuration 1] A motor control device for controlling a motor via a drive circuit, When a control signal for controlling the motor instructs the motor to stop, a generation means for generating a short-circuit braking signal to apply short-circuit braking to the motor, An instruction means that, when the short-circuit braking signal is generated, outputs a short-circuit braking instruction to the drive circuit, and when the short-circuit braking signal is not generated, outputs an instruction based on the control signal to the drive circuit, A motor control device equipped with the following features.

[0122] [Configuration 2] The aforementioned control signal is a periodic signal, The generating means generates the short-circuit braking signal during the period following the period in which the control signal instructs the motor to stop. The motor control device described in Configuration 1.

[0123] [Configuration 3] The instruction means outputs the instruction for short-circuit braking to the drive circuit during the period in which the short-circuit braking signal is being generated. The motor control device described in Configuration 2.

[0124] [Structure 4] The instruction means outputs an instruction generated based on the control signal to the drive circuit during a period when the short-circuit braking signal is not generated. A motor control device as described in configuration 2 or 3.

[0125] [Composition 5] The instruction means outputs a forward rotation, reverse rotation, or stop instruction to the drive circuit, generated based on the control signal, during the period when the short-circuit braking signal is not generated. The motor control device described in Configuration 4.

[0126] [Composition 6] The aforementioned periodic signal is a PWM signal. The motor control device described in configuration 5.

[0127] [Composition 7] The duty cycle of the PWM signal corresponding to the aforementioned stop is 50 percent. The motor control device described in configuration 6.

[0128] [Structure 8] The duty cycle of the PWM signal corresponding to forward rotation is less than 50 percent. The duty cycle of the PWM signal corresponding to the reversal is over 50 percent. A motor control device as described in configuration 6 or 7.

[0129] [Composition 9] The duty cycle of the PWM signal corresponding to forward rotation exceeds 50 percent. The duty cycle of the PWM signal corresponding to the inversion is less than 50 percent. A motor control device as described in configuration 6 or 7.

[0130] [Configuration 10] The drive circuit adjusts the ratio of the period during which the voltage of the first input terminal of the two input terminals for driving the motor is higher than the voltage of the second input terminal, and the period during which the voltage of the first input terminal is lower than the voltage of the second input terminal, according to the duty cycle of the PWM signal. A motor control device according to any one of configurations 6 to 9.

[0131] [Composition 11] The duty cycle of the PWM signal corresponding to the stop is either zero percent or 100 percent. The motor control device described in configuration 6.

[0132] [Composition 12] The drive circuit adjusts the ratio of the period during which the voltage of the first input terminal of the two input terminals for driving the motor is higher than the voltage of the second input terminal, and the period during which the two input terminals are left open, according to the duty cycle of the PWM signal. A motor control device as described in configuration 6 or 11.

[0133] [Composition 13] When the drive circuit receives the instruction for short-circuit braking, it short-circuits the two input terminals for driving the motor. A motor control device according to any one of configurations 1 to 12.

[0134] [Composition 14] The aforementioned drive circuit is an H-bridge circuit. A motor control device according to any one of configurations 1 to 13.

[0135] [Composition 15] The aforementioned control signal is a PWM signal, The generating means determines, based on the duty cycle of the PWM signal, whether or not the PWM signal instructs the motor to stop. A motor control device according to any one of configurations 1 to 14.

[0136] [Composition 16] It also has an enable flag register, The generation means generates the short-circuit braking signal when the flag stored in the permission flag register indicates permission and the control signal instructs the motor to stop, and refrains from generating the short-circuit braking signal when the flag stored in the permission flag register indicates prohibition. A motor control device according to any one of configurations 1 to 15.

[0137] [Composition 17] The drive circuit further comprises the above-mentioned A motor control device according to any one of configurations 1 to 16.

[0138] [Composition 18] The system further comprises a processor that outputs any one of the above signals (1) through (17). The motor control device described in Configuration 1.

[0139] [Composition 19] A motor control device as described in any one of configurations 1 to 18, The motor and, A recording head that records images onto a recording medium, A carriage equipped with the aforementioned recording head and moved by the aforementioned motor, A recording device characterized by comprising the following features.

[0140] [Configuration 20] A motor control device as described in any one of configurations 1 to 18, The motor and, A recording head that records images onto a recording medium, A cleaning mechanism for cleaning the nozzle of the recording head, Equipped with, The motor drives the cleaning mechanism. Recording device.

[0141] [Composition 21] A motor control device as described in any one of configurations 1 to 18, The motor and, An automated transport mechanism that takes only the topmost disc from multiple recording media and sends it to the recording device, Equipped with, The motor drives the automatic transport mechanism. Recording device.

[0142] [Composition 22] A motor control device as described in any one of configurations 1 to 18, The motor and, An image reading sensor for reading images from a document, Equipped with, The motor moves the image reading sensor. Recording device.

[0143] [Composition 23] A motor control device as described in any one of configurations 1 to 18, The motor and, A transport mechanism for transporting recording media, Equipped with, The motor drives the transport mechanism. Recording device.

[0144] [Composition 24] A recording head that records images onto a recording medium, A transport mechanism for transporting the recording medium, A cleaning mechanism for cleaning the nozzle of the recording head, An automated transport mechanism that takes only the topmost disc from multiple recording media and sends it to the recording device, An image reading sensor for reading images from a document, Furthermore, The motors include a motor for moving the carriage on which the recording head is mounted, a motor for moving the transport mechanism, a motor for moving the cleaning mechanism and the automatic transport mechanism, and a motor for moving the image reading sensor. The motor control device described in any one of configurations 1 to 18 is provided for at least one of the motors. Recording device.

[0145] [method] A motor control method for controlling a motor via a drive circuit, If a control signal for controlling the motor instructs the motor to stop, the generation step involves generating a short-circuit braking signal to apply short-circuit braking to the motor. If the short-circuit braking signal is generated, the instruction step outputs the instruction for short-circuit braking to the drive circuit; if the short-circuit braking signal is not generated, the instruction step outputs the instruction based on the control signal to the drive circuit. A motor control method having the following characteristics.

Claims

1. A motor control device for controlling a motor via a drive circuit, When a control signal for controlling the motor instructs the motor to stop, a generation means for generating a short-circuit braking signal to apply short-circuit braking to the motor, An instruction means that, when the short-circuit braking signal is generated, outputs a short-circuit braking instruction to the drive circuit, and when the short-circuit braking signal is not generated, outputs an instruction based on the control signal to the drive circuit, A motor control device equipped with the following features.

2. The aforementioned control signal is a periodic signal, The generating means generates the short-circuit braking signal during the period following the period in which the control signal instructs the motor to stop. The motor control device according to claim 1.

3. The instruction means outputs the instruction for short-circuit braking to the drive circuit during the period in which the short-circuit braking signal is being generated. The motor control device according to claim 2.

4. The instruction means outputs an instruction generated based on the control signal to the drive circuit during a period when the short-circuit braking signal is not generated. The motor control device according to claim 2.

5. The instruction means outputs a forward rotation, reverse rotation, or stop instruction to the drive circuit, generated based on the control signal, during the period when the short-circuit braking signal is not generated. The motor control device according to claim 4.

6. The aforementioned periodic signal is a PWM signal. The motor control device according to claim 5.

7. The duty cycle of the PWM signal corresponding to the aforementioned stop is 50 percent. The motor control device according to claim 6.

8. The duty cycle of the PWM signal corresponding to forward rotation is less than 50 percent. The duty cycle of the PWM signal corresponding to the reversal is over 50 percent. The motor control device according to claim 6.

9. The duty cycle of the PWM signal corresponding to forward rotation exceeds 50 percent. The duty cycle of the PWM signal corresponding to the reversal is less than 50 percent. The motor control device according to claim 6.

10. The drive circuit adjusts the ratio of the period during which the voltage of the first input terminal of the two input terminals for driving the motor is higher than the voltage of the second input terminal, and the period during which the voltage of the first input terminal is lower than the voltage of the second input terminal, according to the duty cycle of the PWM signal. The motor control device according to claim 6.

11. The duty cycle of the PWM signal corresponding to the aforementioned stop is either zero percent or 100 percent. The motor control device according to claim 6.

12. The drive circuit adjusts the ratio of the period during which the voltage of the first input terminal of the two input terminals for driving the motor is higher than the voltage of the second input terminal, and the period during which the two input terminals are left open, according to the duty cycle of the PWM signal. The motor control device according to claim 6.

13. When the drive circuit receives the instruction for short-circuit braking, it short-circuits the two input terminals for driving the motor. The motor control device according to claim 1.

14. The aforementioned drive circuit is an H-bridge circuit. The motor control device according to claim 1.

15. The aforementioned control signal is a PWM signal, The generating means determines, based on the duty cycle of the PWM signal, whether or not the PWM signal instructs the motor to stop. The motor control device according to claim 1.

16. It also has an enable flag register, The generation means generates the short-circuit braking signal when the flag stored in the permission flag register indicates permission and the control signal instructs the motor to stop, and refrains from generating the short-circuit braking signal when the flag stored in the permission flag register indicates prohibition. The motor control device according to claim 1.

17. The drive circuit further comprises the above-mentioned The motor control device according to claim 1.

18. The system further comprises a processor that outputs the aforementioned control signal. The motor control device according to claim 1.

19. A motor control device according to any one of claims 1 to 18, The motor and, A recording head that records images onto a recording medium, A carriage equipped with the aforementioned recording head and moved by the aforementioned motor, A recording device characterized by comprising the following features.

20. A motor control device according to any one of claims 1 to 18, The motor and, A recording head that records images onto a recording medium, A cleaning mechanism for cleaning the nozzle of the recording head, Equipped with, The motor drives the cleaning mechanism. Recording device.

21. A motor control device according to any one of claims 1 to 18, The motor and, An automated transport mechanism that takes only the topmost disc from multiple recording media and sends it to the recording device, Equipped with, The motor drives the automatic transport mechanism. Recording device.

22. A motor control device according to any one of claims 1 to 18, The motor and, An image reading sensor for reading images from a document, Equipped with, The motor moves the image reading sensor. Recording device.

23. A motor control device according to any one of claims 1 to 18, The motor and, A transport mechanism for transporting recording media, Equipped with, The motor drives the transport mechanism. Recording device.

24. A recording head that records images onto a recording medium, A transport mechanism for transporting the recording medium, A cleaning mechanism for cleaning the nozzle of the recording head, An automated transport mechanism that takes only the topmost disc from multiple recording media and sends it to the recording device, An image reading sensor for reading images from a document, Furthermore, The motors include a motor for moving the carriage on which the recording head is mounted, a motor for moving the transport mechanism, a motor for moving the cleaning mechanism and the automatic transport mechanism, and a motor for moving the image reading sensor. The motor control device according to any one of claims 1 to 18 is provided for at least one of the motors. Recording device.

25. A motor control method for controlling a motor via a drive circuit, If a control signal for controlling the motor instructs the motor to stop, the generation step involves generating a short-circuit braking signal to apply short-circuit braking to the motor. If the aforementioned short-circuit braking signal is generated, an instruction to short-circuit braking is output to the drive circuit; if the aforementioned short-circuit braking signal is not generated, an instruction based on the control signal is output to the drive circuit. A motor control method having the following characteristics.

Images