All-solid-state batteries
The all-solid-state battery design addresses cracking and conductivity issues by varying the porosity of the solid electrolyte layer, ensuring stress relief and maintaining high hardness and conductivity through differential porosity distribution.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- TAIYO YUDEN KK
- Filing Date
- 2024-11-22
- Publication Date
- 2026-06-03
AI Technical Summary
Stacked solid-state batteries face issues with cracking due to internal stress differences among layers and volume expansion during charging and discharging, leading to insufficient hardness and reduced ionic conductivity.
The all-solid-state battery design includes a solid electrolyte layer with varying porosity, where the region near the negative electrode has higher porosity than the region near the positive electrode, maintaining high hardness and ionic conductivity by absorbing stress from volume expansion.
This configuration effectively relieves internal stress, suppresses cracking, and maintains high ionic conductivity, improving charge-discharge cycle efficiency.
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Figure 2026091033000001_ABST
Abstract
Description
[Technical Field]
[0001] This invention relates to an all-solid-state battery. [Background technology]
[0002] In recent years, the demand for rechargeable batteries has expanded rapidly, and lithium-ion rechargeable batteries using organic electrolytes have been put into practical use. However, due to concerns about electrolyte leakage and other issues, there is a growing demand for safer solid electrolytes, and the development of all-solid-state batteries using solid electrolytes is actively underway. [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] International Publication No. 2013 / 175993 [Patent Document 2] Japanese Patent Publication No. 2018-166020 [Patent Document 3] Japanese Patent Publication No. 2009-301959 [Patent Document 4] International Publication No. 2012 / 026480 [Patent Document 5] Japanese Patent Publication No. 2022-168746 [Overview of the Initiative] [Problems that the invention aims to solve]
[0004] In stacked solid-state batteries, layers mainly composed of different materials, such as a solid electrolyte layer, a positive electrode layer, and a negative electrode layer, are stacked. As a result, cracks occur due to the difference in internal stress applied to each layer during simultaneous firing. Furthermore, internal stress is applied due to the volume expansion and contraction of the active material during charging and discharging, which also contributes to crack formation. Therefore, techniques have been disclosed to suppress cracks by mitigating the internal stress applied to the solid electrolyte layer, for example (see, for example, Patent Documents 1 and 2).
[0005] Patent Document 1 discloses a solid electrolyte layer consisting of three layers with different porosities. It states that when the porosity of the central solid electrolyte portion is the highest, the internal stress applied to the solid electrolyte layer due to the volume expansion and contraction of the electrode layer can be relieved. However, in reality, it has been found that stress relief in the solid electrolyte portions near the positive and negative electrode layers, where volume expansion and contraction occur during charging and discharging, is important, and that a higher porosity near the electrode layer is more effective in suppressing cracks.
[0006] Patent Document 2 describes how the interfaces between the positive electrode layer and the solid electrolyte layer, and between the negative electrode layer and the solid electrolyte layer, are interconnected, and how the density of the solid electrolyte portion in the interface region is lower than the density of the solid electrolyte portion in the central region, thus preventing cracking and delamination at the interface and enabling the formation of a laminate that combines high sinterability and high ionic conductivity. However, it does not take into account the respective expansion and contraction amounts of the positive electrode layer and the negative electrode layer during volume expansion and contraction during charging and discharging.
[0007] On the other hand, it was found that attempting to suppress cracking resulted in insufficient hardness being obtained in the solid electrolyte layer, and the ionic conductivity also decreased.
[0008] This invention has been made in view of the above problems, and aims to provide an all-solid-state battery that can relieve internal stress while maintaining high hardness and high ionic conductivity. [Means for solving the problem]
[0009] The all-solid-state battery according to the present invention comprises a positive electrode layer containing a positive electrode active material, a negative electrode layer containing a negative electrode active material, and a solid electrolyte layer sandwiched between the positive electrode layer and the negative electrode layer, wherein the region of the solid electrolyte layer located on the negative electrode side has a larger porosity than the region located on the positive electrode side.
[0010] In the solid electrolyte layer of the all-solid-state battery, when observing a cross-section along the stacking direction and equally dividing it into six regions in the stacking direction, the porosity of the region located closest to the negative electrode layer may be larger than the porosity of the region located closest to the positive electrode layer.
[0011] In the cross-section along the stacking direction in the solid electrolyte layer of the all-solid-state battery, the porosity of the region of 17% of the thickness of the solid electrolyte layer located on the negative electrode layer side may be larger than the porosity of the region of 17% of the thickness of the solid electrolyte layer located on the positive electrode layer side.
[0012] In the all-solid-state battery, the porosity of the region located closest to the negative electrode among the six regions may be 5.0% or more and less than 10.0%.
[0013] In the all-solid-state battery, the porosity of the region located closest to the positive electrode among the six regions may be 0.0% or more and less than 5.0%.
[0014] In the all-solid-state battery, a plurality of the solid electrolyte layers are provided, and the plurality of the solid electrolyte layers are stacked in the order of the negative electrode layer, the solid electrolyte layer, the positive electrode layer, and the solid electrolyte layer. In at least one of the plurality of the solid electrolyte layers, the porosity of the region located on the negative electrode layer side may be larger than the porosity of the region located on the positive electrode layer side.
[0015] In the all-solid-state battery, in 50% or more of the plurality of the solid electrolyte layers, the porosity of the region located on the negative electrode layer side may be larger than the porosity of the region located on the positive electrode layer side.
Advantages of the Invention
[0016] According to the present invention, it is possible to provide an all-solid-state battery that can relieve internal stress while maintaining high hardness and high ionic conductivity.
Brief Description of the Drawings
[0017] [Figure 1]This is a schematic cross-sectional view showing the basic structure of an all-solid-state battery. [Figure 2] This is a schematic cross-sectional view. [Figure 3] This is a schematic cross-sectional view of the positive electrode layer, negative electrode layer, and solid electrolyte layer. [Figure 4] This diagram illustrates the detailed location and extent of low-porosity and high-porosity regions. [Figure 5] This is a partial cross-sectional perspective view of a stacked all-solid-state battery, in which multiple battery units are stacked. [Figure 6] This is a cross-sectional view taken along line AA' in Figure 5. [Figure 7] This is a cross-sectional view along line BB' in Figure 5. [Figure 8] This diagram illustrates a flow chart of the manufacturing process for all-solid-state batteries. [Figure 9] (a) and (b) are diagrams illustrating the lamination process. [Figure 10] This is a diagram illustrating the lamination process. [Modes for carrying out the invention]
[0018] The embodiments will be described below with reference to the drawings.
[0019] (First Embodiment) Figure 1 is a schematic cross-sectional view showing the basic structure of an all-solid-state battery 100 according to the first embodiment. As illustrated in Figure 1, the all-solid-state battery 100 has a structure in which a solid electrolyte layer 30 is sandwiched between a positive electrode layer 10 and a negative electrode layer 20. The positive electrode layer 10 is formed on the first main surface of the solid electrolyte layer 30. The negative electrode layer 20 is formed on the second main surface of the solid electrolyte layer 30. The positive electrode layer 10, the solid electrolyte layer 30, and the negative electrode layer 20 are sintered bodies of powder material.
[0020] The solid electrolyte layer 30 is mainly composed of a solid electrolyte having ion conductivity. The solid electrolyte of the solid electrolyte layer 30 is, for example, an oxide-based solid electrolyte having lithium ion conductivity. The solid electrolyte is, for example, a phosphate-based solid electrolyte having a NASICON structure. The phosphate-based solid electrolyte having a NASICON structure has high conductivity and the property of being stable in the atmosphere. The phosphate-based solid electrolyte is, for example, a phosphate containing lithium. The phosphate is not particularly limited, and examples thereof include a composite lithium phosphate salt with Ti (for example, LiTi2(PO4)3). Alternatively, Ti can be partially or entirely substituted with a tetravalent transition metal such as Ge, Sn, Hf, Zr, etc. Also, in order to increase the Li content, it may be partially substituted with a trivalent transition metal such as Al, Ga, In, Y, La, etc. More specifically, for example, Li 1+x Al x Ge 2-x (PO4)3, or Li 1+x Al x Zr 2-x (PO4)3, Li 1+x Al x Ti 2-x (PO4)3, etc. can be mentioned.
[0021] As illustrated in FIG. 2, the positive electrode layer 10 has a structure in which the positive electrode active material 11, the solid electrolyte 12, the conductive assistant 13, etc. are dispersed. The negative electrode layer 20 has a structure in which the negative electrode active material 21, the solid electrolyte 22, the conductive assistant 23, etc. are dispersed. By the positive electrode layer 10 including the positive electrode active material 11 and the negative electrode layer 20 including the negative electrode active material 21, the all-solid-state battery 100 can be used as a secondary battery. By the positive electrode layer 10 including the solid electrolyte 12 and the negative electrode layer 20 including the solid electrolyte 22, ion conductivity is obtained in the positive electrode layer 10 and the negative electrode layer 20. By the positive electrode layer 10 including the conductive assistant 13 and the negative electrode layer 20 including the conductive assistant 23, conductivity is obtained in the positive electrode layer 10 and the negative electrode layer 20. The solid electrolytes 12 and 22 may be, for example, the same solid electrolyte as the solid electrolyte layer 30 or different solid electrolytes.
[0022] The positive electrode active material 11 is not particularly limited as long as it functions as a positive electrode active material, but for example, it is an electrode active material having an olivine-type crystal structure. Examples of such electrode active materials include phosphates containing a transition metal and lithium. The olivine-type crystal structure is the crystal structure found in natural olivine and can be identified by X-ray diffraction.
[0023] Typical examples of electrode active materials with an olivine-type crystal structure include LiCoPO4 containing Co. Phosphates in which the transition metal Co is replaced in this chemical formula can also be used. Here, the ratio of Li and PO4 may vary depending on the valency. It is preferable to use Co, Mn, Fe, Ni, etc. as the transition metal.
[0024] The negative electrode active material 21 is not particularly limited as long as it functions as a negative electrode active material, but examples include compounds such as titanium oxide, lithium titanium composite oxide, lithium titanium composite phosphate, carbon, and lithium vanadium phosphate.
[0025] Carbon materials are used as conductive additives 13 and 23. Metals may also be used as conductive additives 13 and 23. Examples of conductive additive metals include Pd, Ni, Cu, Fe, and alloys containing these materials.
[0026] In such all-solid-state batteries, the solid electrolyte layer, positive electrode layer, and negative electrode layer are composed of different materials. Therefore, when each layer is fired together, there is a risk of cracks occurring due to the difference in internal stress applied to each layer. Furthermore, during charging and discharging, internal stress is applied due to the volume expansion and contraction of the electrode active material, which may also cause cracks.
[0027] Through diligent research by the inventors, it was discovered that stress relaxation near the positive and negative electrode layers, where volume expansion and contraction occur during charging and discharging, is crucial in the solid electrolyte layer. Therefore, it was considered possible to relax the stress by increasing the porosity in the portions of the solid electrolyte layer near the positive and negative electrode layers. However, there is a risk that ionic conductivity may decrease in areas with high porosity. Therefore, the inventors conducted further research and discovered that the volume expansion and contraction during charging and discharging is greater in the negative electrode layer than in the positive electrode layer.
[0028] Further intensive research by the inventors revealed that attempting to relieve internal stress results in insufficient hardness being obtained in the solid electrolyte layer, and also reduces ionic conductivity.
[0029] The all-solid-state battery 100 according to this embodiment has a configuration that can alleviate the aforementioned internal stress while maintaining high hardness and high ionic conductivity. Details will be described below.
[0030] Figure 3 is a schematic cross-sectional view of the positive electrode layer 10, the negative electrode layer 20, and the solid electrolyte layer 30. As illustrated in Figure 3, the solid electrolyte layer 30 has a low porosity region 31 with low porosity in the region close to the positive electrode layer 10, and a high porosity region 32 with high porosity in the region close to the negative electrode layer 20. With this configuration, even if large volume expansion and contraction occurs in the negative electrode layer 20 during charging and discharging, the high porosity region 32 absorbs the internal stress. As a result, the internal stress is relieved and the occurrence of cracks can be suppressed. Consequently, the charge-discharge cycle efficiency is improved. In addition, because the region close to the positive electrode layer 10 has low porosity, the ionic conductivity of the solid electrolyte layer 30 is maintained at a high value. Furthermore, because the region close to the positive electrode layer 10 has low porosity, the overall decrease in hardness of the solid electrolyte layer 30 is suppressed, and the overall decrease in hardness of the all-solid-state battery 100 can be suppressed.
[0031] If the porosity in the high porosity region 32 is not sufficiently large, there is a risk that internal stress will not be sufficiently absorbed. Therefore, it is preferable to set a lower limit on the porosity in the high porosity region 32. In this embodiment, the porosity in the high porosity region 32 is preferably 5.0% or more, more preferably 6.5% or more, and even more preferably 8.0% or more. On the other hand, if the porosity in the high porosity region 32 is too high, there is a risk that the ionic conductivity in the solid electrolyte layer 30 will not be maintained at a sufficiently high value, and the hardness of the solid electrolyte layer 30 will not be maintained at a sufficiently high value. Therefore, it is preferable to set an upper limit on the porosity in the high porosity region 32. In this embodiment, the porosity in the high porosity region 32 is preferably less than 10.0%, preferably 9.8% or less, and even more preferably 9.5% or less.
[0032] If the porosity in the low porosity region 31 is not sufficiently low, the ionic conductivity in the solid electrolyte layer 30 may not be maintained at a sufficiently high value, and the hardness of the solid electrolyte layer 30 may not be maintained at a sufficiently high value. Therefore, it is preferable to set an upper limit on the porosity in the low porosity region 31. In this embodiment, the porosity in the low porosity region 31 is preferably less than 5.0%, more preferably 4.5% or less, and even more preferably 4.0% or less. On the other hand, if the porosity in the low porosity region 31 is too low, the internal stress may not be sufficiently absorbed. Therefore, it is preferable to set a lower limit on the porosity in the low porosity region 31. In this embodiment, the porosity in the low porosity region 31 is preferably 0.0% or more, preferably 0.2% or more, and even more preferably 0.5% or more.
[0033] Figure 4 is a diagram illustrating the details of the location and extent of the low porosity region 31 and the high porosity region 32. As illustrated in Figure 4, the solid electrolyte layer 30 is divided into six equal sections in the stacking direction (thickness direction). In this case, the regions are referred to as regions A to F, starting from the positive electrode layer 10 side and moving towards the negative electrode layer 20 side. When the solid electrolyte layer 30 is divided as shown in Figure 4, at least region A is the low porosity region 31 and region F is the high porosity region 32. In this case, for example, the porosity in the high porosity region 32 is 5.0% or more, and the porosity in the low porosity region 31 is less than 5.0%.
[0034] For example, the porosity of regions A ≤ region B ≤ region C ≤ region D ≤ region E ≤ region F. For example, the porosity of regions A < region B < region C < region D < region E < region F may also be the case. Alternatively, the porosity of two adjacent regions may be equal. Therefore, for example, the relationship may be such that region A = region B < region C = region D < region E = region F. Furthermore, when the porosity of the high-porosity region 32 is 5.0% or more and the porosity of the low-porosity region 31 is less than 5.0%, it is preferable that the high-porosity region 32 is formed thinner than the low-porosity region 31. This is because, although it is preferable to have a porosity of 5.0% or more near the negative electrode layer 20 for stress relaxation of the entire laminate, if the high-porosity region 32 is formed thickly, the hardness and ionic conductivity of the laminate will decrease.
[0035] Alternatively, in a cross-section of the solid electrolyte layer 30 along the stacking direction, it is preferable that the porosity of the region of the solid electrolyte layer 30 located on the negative electrode layer 20 side that accounts for 17% of the thickness is greater than that of the region of the solid electrolyte layer 30 located on the positive electrode layer 10 side that accounts for 17% of the thickness.
[0036] For example, the porosity of the solid electrolyte layer 30 can be measured using the following method. First, the cross-section of the solid electrolyte layer 30 is exposed along the stacking direction. Next, the cross-section is observed with an electron microscope and a backscattered electron image is taken. The obtained image is binarized to separate the white voids from the black crystalline parts. The porosity (%) is defined as the percentage of the area of the white voids out of the total area of the white voids and black crystalline parts. If the solid electrolyte layer 30 is divided into six regions A to F, the porosity should be calculated for each region.
[0037] Figure 5 is a partial cross-sectional perspective view of a stacked all-solid-state battery 100a in which multiple battery units are stacked. Figure 6 is a cross-sectional view taken along line AA' of Figure 5. Figure 7 is a cross-sectional view taken along line BB' of Figure 5. The all-solid-state battery 100a includes a stacked chip 60 having a substantially rectangular parallelepiped shape. In the stacked chip 60, a first external electrode 40a is provided so as to be in contact with the first end face of the four faces other than the top and bottom faces at the stacking direction ends, and a second external electrode 40b is provided so as to be in contact with the second end face opposite the first end face.
[0038] In Figures 5 to 7, the X-axis direction is the direction in which the first and second end faces of the stacked chip 60 face each other, and the direction in which the first external electrode 40a and the second external electrode 40b face each other. The Y-axis direction is the width direction of the positive electrode layer 10 and the negative electrode layer 20, and the direction in which two of the four sides of the stacked chip 60 (excluding the two end faces) face each other. The Z-axis direction is the stacking direction, and the direction in which the top and bottom surfaces of the stacked chip 60 face each other. The X-axis direction, the Y-axis direction, and the Z-axis direction are mutually orthogonal.
[0039] In the following description, components having the same composition range and thickness range as the all-solid-state battery 100 are given the same reference numerals, and detailed explanations are omitted.
[0040] In the all-solid-state battery 100a, multiple positive electrode layers 10 and multiple negative electrode layers 20 are alternately stacked via a solid electrolyte layer 30. The X-axis edges of the multiple positive electrode layers 10 are drawn out to the first end face of the stacked chip 60, but not to the second end face. The X-axis edges of the multiple negative electrode layers 20 are drawn out to the second end face of the stacked chip 60, but not to the first end face. As a result, the positive electrode layers 10 and negative electrode layers 20 are alternately conductive to the first external electrode 40a and the second external electrode 40b. The solid electrolyte layer 30 extends from the first external electrode 40a to the second external electrode 40b. Thus, the all-solid-state battery 100a has a structure in which multiple battery units are stacked.
[0041] A cover layer 50 is laminated on the upper end surface of the laminated portion of the positive electrode layer 10, the solid electrolyte layer 30, and the negative electrode layer 20. This cover layer 50 is in contact with the uppermost internal electrode layer (either the positive electrode layer 10 or the negative electrode layer 20) and also in contact with a portion of the solid electrolyte layer 30. Another cover layer 50 is laminated on the lower end surface of the laminate. This cover layer 50 is in contact with the lowest internal electrode layer (either the positive electrode layer 10 or the negative electrode layer 20) and also in contact with a portion of the solid electrolyte layer 30. For example, the cover layer 50 is a sintered body obtained by sintering powder material.
[0042] As illustrated in Figure 6, the region where the positive electrode layer 10 connected to the first external electrode 40a and the negative electrode layer 20 connected to the second external electrode 40b face each other is the region that generates battery capacity. Therefore, this region is referred to as the battery capacity region 70. In other words, the battery capacity region 70 is the region where two adjacent internal electrode layers connected to different external electrodes face each other.
[0043] The region where positive electrode layers 10 connected to the first external electrode 40a face each other without being separated by the negative electrode layer 20 connected to the second external electrode 40b is referred to as the first end margin 80a. Similarly, the region where positive electrode layers 10 connected to the second external electrode 40b face each other without being separated by the positive electrode layer 10 connected to the first external electrode 40a is referred to as the second end margin 80b. In other words, the end margin is the region where internal electrode layers connected to the same external electrode face each other without being separated by internal electrode layers connected to different external electrodes. The first end margin 80a and the second end margin 80b are regions where no battery capacity is generated.
[0044] As illustrated in Figure 6, in the stacked chip 60, the region extending from the two sides of the stacked chip 60 to the positive electrode layer 10 and the negative electrode layer 20 is referred to as the side margin 90. That is, the side margin 90 is a region provided in the stacked body that covers the ends of the multiple positive electrode layers 10 and negative electrode layers 20 that extend to the two sides.
[0045] Of the multiple solid electrolyte layers 30 contained in the stacked chip 60, at least one layer comprises the low porosity region 31 and the high porosity region 32 described in Figure 3. For example, more than half (50% or more) of the multiple solid electrolyte layers 30 contained in the stacked chip 60 comprises the low porosity region 31 and the high porosity region 32 described in Figure 3. Alternatively, more than 80% of the multiple solid electrolyte layers 30 contained in the stacked chip 60 comprises the low porosity region 31 and the high porosity region 32 described in Figure 3. Alternatively, all of the solid electrolyte layers 30 contained in the stacked chip 60 comprises the low porosity region 31 and the high porosity region 32 described in Figure 3.
[0046] In the all-solid-state battery 100a, when the stacked chip 60 is viewed from the top side along the Z-axis, the XZ cross section at the center in the Y-axis direction is exposed, and each solid electrolyte layer 30 is observed with an electron microscope to capture a backscattered electron image. The obtained image is binarized to separate the white voids from the black crystalline areas. The porosity is defined as the percentage of the area of the white voids out of the total area of the white voids and black crystalline areas. If the solid electrolyte layer 30 is divided into six regions A to F, the porosity can be calculated for each region. Note that the exposed XZ cross section is not limited to the above, and may span the positive electrode layer 10 and the negative electrode layer 20. The YZ cross section may also be exposed.
[0047] Next, we will explain the manufacturing method of the all-solid-state battery 100a illustrated in Figures 5 to 7. Figure 8 is a diagram illustrating the flow of the manufacturing method of the all-solid-state battery 100a.
[0048] (Process for preparing raw material powder for the solid electrolyte layer) First, a raw material powder for the solid electrolyte layer that constitutes the solid electrolyte layer 30 described above is prepared. For example, a raw material powder for an oxide-based solid electrolyte can be prepared by mixing raw materials, additives, etc., and using a solid-phase synthesis method. The obtained raw material powder can be adjusted to the desired average particle size by dry grinding. For example, the desired average particle size can be adjusted using a planetary ball mill with 5 mmφ ZrO2 balls.
[0049] (Process for preparing raw material powder for the cover layer) The raw material powder for the ceramics that constitute the cover layer 50 described above is prepared. For example, the raw material powder for the cover layer can be prepared by mixing raw materials, additives, etc., and using a solid-phase synthesis method. The obtained raw material powder can be adjusted to the desired average particle size by dry grinding. For example, the desired average particle size can be adjusted using a planetary ball mill with 5 mmφ ZrO2 balls.
[0050] (Process for preparing raw material powder for the margin area) The raw material powder for the void portion is prepared. For example, raw materials and additives can be mixed and a solid-phase synthesis method can be used to prepare the raw material powder for the void portion. The obtained raw material powder can be adjusted to the desired average particle size by dry grinding. For example, the desired average particle size can be adjusted using a planetary ball mill with 5 mmφ ZrO2 balls.
[0051] (Process for preparing paste for internal electrodes) Next, internal electrode pastes for fabricating the positive electrode layer 10 and negative electrode layer 20 described above are prepared individually. For example, an internal electrode paste can be obtained by uniformly dispersing a conductive additive, electrode active material, solid electrolyte material, sintering aid, binder, plasticizer, etc., in water or an organic solvent. The solid electrolyte paste described above may be used as the solid electrolyte material. Carbon materials may be used as the conductive additive. Metals may also be used as the conductive additive. Examples of metals used as conductive additives include Pd, Ni, Cu, Fe, and alloys containing these. Pd, Ni, Cu, Fe, alloys containing these, and various carbon materials may be used further.
[0052] The paste for internal electrodes contains, for example, one or more glass components such as Li-BO compounds, Li-Si-O compounds, Li-CO compounds, Li-SO compounds, and Li-PO compounds as sintering aids.
[0053] (Process for preparing paste for external electrodes) Next, an external electrode paste is prepared for the fabrication of the first external electrode 40a and the second external electrode 40b described above. For example, an external electrode paste can be obtained by uniformly dispersing a conductive material, glass frit, binder, plasticizer, etc., in water or an organic solvent.
[0054] (Solid electrolyte green sheet manufacturing process) A solid electrolyte slurry having a desired average particle size is obtained by uniformly dispersing raw material powder for the solid electrolyte layer in an aqueous solvent or organic solvent together with a binder, dispersant, plasticizer, etc., and then performing wet grinding. At this time, a bead mill, wet jet mill, various kneaders, high-pressure homogenizer, etc. can be used, and it is preferable to use a bead mill from the viewpoint that particle size distribution adjustment and dispersion can be performed simultaneously. A binder is added to the obtained solid electrolyte slurry to obtain a solid electrolyte paste. A solid electrolyte green sheet 51 can be produced by coating with the obtained solid electrolyte paste. The coating method is not particularly limited, and a slot die method, reverse coating method, gravure coating method, bar coating method, doctor blade method, etc. can be used. The particle size distribution after wet grinding can be measured, for example, using a laser diffraction measuring device using the laser diffraction scattering method.
[0055] (Lamination process) As illustrated in Figure 9(a), an internal electrode paste 52 is printed on one surface of a solid electrolyte green sheet 51. A margin paste 53 is printed in the peripheral area of the solid electrolyte green sheet 51 where the internal electrode paste 52 is not printed. The margin paste 53 can be formed by coating the margin material powder using the same method as in the solid electrolyte green sheet manufacturing process. As illustrated in Figure 9(b), multiple printed solid electrolyte green sheets 51 are stacked with alternating offsets. As illustrated in Figure 10, a laminate is obtained by pressing a cover sheet 54 from above and below in the stacking direction. In this case, a roughly rectangular parallelepiped green chip is obtained in the laminate such that the internal electrode paste 52 for the positive electrode layer 10 is exposed on one end face and the internal electrode paste 52 for the negative electrode layer 20 is exposed on the other end face. The cover sheet 54 can be formed by coating the cover layer material powder using the same method as in the solid electrolyte green sheet manufacturing process. The cover sheet 54 is formed to be thicker than the solid electrolyte green sheet 51. This thickness can be achieved during coating, or by layering multiple coated sheets.
[0056] (Binder removal and firing process) To sufficiently remove the binder before reaching the maximum temperature, a process (binder removal process) is included in which the product is held at a temperature lower than the maximum temperature (e.g., 450°C) in an oxidizing atmosphere. Subsequently, the firing conditions are under an oxidizing or non-oxidizing atmosphere, with the maximum temperature preferably set to 400°C to 1000°C, more preferably 500°C to 900°C, without any particular limitations. To reduce process costs, it is desirable to fire at the lowest possible temperature. After firing, a re-oxidation treatment may be performed.
[0057] (External electrode formation process) Subsequently, the first external electrode 40a and the second external electrode 40b are formed by applying, forming, and curing an external electrode paste to two end faces of the laminated chip 60.
[0058] In such manufacturing methods, when coating the solid electrolyte green sheet 51, a gradient in the amount of binder is provided in the thickness direction. For example, when coating a solid electrolyte green sheet 51 on which the internal electrode paste 52 for the positive electrode layer 10 is printed, the solid electrolyte green sheet 51 may be made by stacking a sheet with a large amount of binder on top of a sheet with a small amount of binder. Alternatively, three or more sheets (for example, six sheets) may be stacked in order so that the amount of binder gradually decreases. When coating a solid electrolyte green sheet 51 on which the internal electrode paste 52 for the negative electrode layer 20 is printed, the solid electrolyte green sheet 51 may be made by stacking a sheet with a large amount of binder on top of a sheet with a small amount of binder. Alternatively, six sheets may be stacked in order so that the amount of binder gradually increases.
[0059] Sheets with a large amount of binder will have more voids during the debinding process, while sheets with a small amount of binder will have fewer voids during the debinding process. By adjusting the amount of voids in this way, it becomes possible to form the low-void region 31 and the high-void region 32 as explained in Figure 3. [Examples]
[0060] (Examples 1-4) Solid electrolyte material Li obtained by melt-quenching method 1+x Al x Ge 2-x (PO4)3 glass was pulverized using a wet ball mill. The resulting solid electrolyte material was uniformly dispersed in water or an organic solvent along with a binder, plasticizer, etc., to obtain a slurry. A solid electrolyte green sheet of the desired thickness was prepared by coating with the obtained slurry. In this case, a single layer of solid electrolyte green sheet was prepared by stacking multiple sheets with different binder amounts.
[0061] A green chip was obtained by alternately laminating and pressing together 60 to 80 layers of solid electrolyte green sheets printed with internal electrode paste for the positive electrode layer and 60 to 80 layers of solid electrolyte green sheets printed with internal electrode paste for the negative electrode layer. The green chip was subjected to a binder removal process at 450°C under dry air, followed by a firing process at 650°C under an N2 atmosphere.
[0062] In the obtained all-solid-state battery, the XZ cross-section at the center in the Y-axis direction was exposed when viewed from the top side along the Z-axis direction, and the central solid electrolyte layer was observed with an electron microscope to capture a backscattered electron image. The porosity was measured for each of the regions A to F described in Figure 4.
[0063] The results are shown in Table 1. In Example 1, the porosity of region A was 0.5%, region B was 0.7%, region C was 1.3%, region D was 2.5%, region E was 6.2%, and region F was 8.8%. In Example 2, the porosity of region A was 0.5%, region B was 0.8%, region C was 1.2%, region D was 2.7%, region E was 11.8%, and region F was 13.5%. In Example 3, the porosity of region A was 0.5%, region B was 0.7%, region C was 1.1%, region D was 6.4%, region E was 7.2%, and region F was 9.1%. In Example 4, the porosity of region A was 0.4%, region B was 0.9%, region C was 5.5%, region D was 7.4%, region E was 8.5%, and region F was 9.2%. [Table 1]
[0064] (Presence or absence of cracks) Furthermore, crack formation was confirmed. Specifically, the crack formation status was checked from the SEM images of the XZ cross-sections mentioned above. If neither large cracks (large cracks connecting layers) nor small cracks (small cracks within layers) were observed, it was judged as very good ("◎"), if a small number of small cracks were observed, it was judged as good ("〇"), if many small cracks were observed, it was judged as somewhat good ("△"), and if large cracks were observed, it was judged as poor ("×").
[0065] In Example 1, the cracks were judged as good ("〇"). This is thought to be because the internal stress was relieved because regions E and F on the negative electrode layer side had a higher porosity than regions A to C on the positive electrode layer side. In Example 2, the cracks were judged as very good ("◎"). This is thought to be because the porosity of regions E and F was higher compared to Example 1. In Example 3, the cracks were judged as very good ("◎"). This is thought to be because the porosity of region D was also higher compared to Example 1. In Example 4, the cracks were judged as good ("〇"). This is thought to be because the regions with a porosity of 5% or more were thicker than the regions with a porosity of less than 5%.
[0066] (Tip hardness) Next, the Vickers hardness was measured by pressing an indenter only against the solid electrolyte layer whose porosity had been measured. The Vickers hardness was 500 kgf / mm². 2 If it exceeds 200 kgf / mm², it will be judged as very good ("◎"). 2 Exceeding 500 kgf / mm 2 The following conditions are judged as good ("〇") and the result is 70 kgf / mm². 2 Exceeding 200 kgf / mm 2 The following conditions are judged as slightly good ("△"), and the result is 70 kgf / mm². 2 The following were judged as defective ("×").
[0067] In Example 1, the tip hardness was judged as good ("〇"). This is thought to be because the porosity in regions A to D was reduced. In Example 2, the tip hardness was judged as somewhat good ("△"). This is thought to be because the porosity in regions E and F was higher compared to Example 1. In Example 3, the tip hardness was judged as somewhat good ("△"). This is thought to be because the porosity in region D was also higher compared to Example 1. In Example 4, the tip hardness was judged as somewhat good ("△"). This is thought to be because the porosity in regions C and D was also higher compared to Example 1.
[0068] (Ionic conductivity) Next, the ionic conductivity of the solid electrolyte layer whose porosity was measured was determined by impedance measurement. The ionic conductivity was 1 × 10⁻⁶. -4 If the S / cm is above average, it will be judged as very good ("◎"), and 5×10 -5 Exceeding S / cm 1 × 10 -4 If the value is less than or equal to S / cm, it is judged as good ("〇"), and 1 × 10 -5 Exceeding S / cm 5×10 -5 If the value is less than or equal to S / cm, it will be judged as "slightly good" ("△"), and 5 × 10 -5 If the value was less than S / cm, it was judged as defective ("×").
[0069] In Example 1, the ionic conductivity was judged as good ("○"). This is thought to be because the porosity in regions A to D was reduced. In Example 2, the ionic conductivity was judged as somewhat good ("△"). This is thought to be because the porosity in regions E and F was higher compared to Example 1. In Example 3, the ionic conductivity was judged as somewhat good ("△"). This is thought to be because the porosity in region D was also higher compared to Example 1. In Example 4, the ionic conductivity was judged as somewhat good ("△"). This is thought to be because the porosity in regions C and D was also higher compared to Example 1.
[0070] As described above, none of the samples in Examples 1 to 4 were judged to be unsatisfactory in terms of cracks, chip hardness, or ionic conductivity. This is thought to be because a low porosity region was provided on the positive electrode side and a nuchal porosity region was provided on the negative electrode side in the solid electrolyte layer.
[0071] (Comparative Examples 1 and 2) In Comparative Examples 1 and 2, a single-layer solid electrolyte green sheet was prepared by stacking multiple sheets with equal binder amounts. In Comparative Example 1, the binder amount was increased, while in Comparative Example 2, the binder amount was decreased. Other conditions were the same as in Example 1.
[0072] (Comparative Example 3) In Comparative Example 3, similar to Examples 1 to 4, multiple sheets with different binder amounts were stacked to create a high porosity region near the positive electrode layer and a low porosity region near the negative electrode layer.
[0073] The porosity of the solid electrolyte layer was measured in the same manner as in Example 1. In Comparative Example 1, the porosity of region A was 9.4%, region B was 6.1%, region C was 6.9%, region D was 7.6%, region E was 8.0%, and region F was 5.8%. In Comparative Example 2, the porosity of region A was 2.9%, region B was 2.7%, region C was 1.7%, region D was 1.4%, region E was 0.6%, and region F was 0.4%. In Comparative Example 3, the porosity of region A was 9.4%, region B was 8.7%, region C was 7.4%, region D was 5.8%, region E was 3.1%, and region F was 2.5%.
[0074] Similar to Example 1, the presence or absence of cracks, chip hardness, and ionic conductivity were examined. In Comparative Example 1, the cracks were judged as good ("○"). This is thought to be because the porosity of all regions A to F increased. In Comparative Example 2, the cracks were judged as poor ("×"). This is thought to be because the porosity of all regions A to F decreased. In Comparative Example 3, no cracks occurred during the binder removal and firing process, but cracks occurred during the first charging cycle because the negative electrode could not withstand the stress caused by expansion. Therefore, in Comparative Example 3, the cracks were judged as poor ("×"). In addition, no cracks were observed in Examples 1 to 4 due to repeated charging and discharging.
[0075] In Comparative Example 1, the tip hardness and ionic conductivity were judged as poor ("×"). This is thought to be because the porosity in all regions A to F was high. In Comparative Example 2, the tip hardness and ionic conductivity were judged as very good ("◎"). This is thought to be because the porosity in all regions A to F was low.
[0076] As described above, in Comparative Examples 1 to 3, at least one of the following criteria—cracks, chip hardness, and ionic conductivity—was judged as unacceptable. This is thought to be because no distribution of porosity was provided in the solid electrolyte layer.
[0077] Although embodiments of the present invention have been described in detail above, the present invention is not limited to these specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims. [Explanation of Symbols]
[0078] 10 Positive electrode layer 11 Cathode active material 12 Solid electrolyte 13 Conductive additives 20 Negative electrode layer 21 Negative electrode active material 22 Solid electrolyte 23 Conductive additive 30 Solid electrolyte layer 40a First external electrode 40b 2nd external electrode 50 Cover Layer 51 Solid Electrolyte Green Sheet 52 Paste for internal electrodes 53 Paste for margins 54 Cover Sheets 60-layer chip 100,100a all solid state battery
Claims
1. A positive electrode layer containing positive electrode active material, A negative electrode layer containing negative electrode active material, The system comprises a solid electrolyte layer sandwiched between the positive electrode layer and the negative electrode layer, An all-solid-state battery in which the region located on the negative electrode side of the solid electrolyte layer has a larger porosity than the region located on the positive electrode side.
2. The all-solid-state battery according to claim 1, wherein the solid electrolyte layer is divided into six equal regions along the stacking direction, and the porosity of the region located closest to the negative electrode layer is greater than the porosity of the region located closest to the positive electrode layer.
3. The all-solid-state battery according to claim 1, wherein in a cross-section of the solid electrolyte layer along the stacking direction, the region of 17% of the thickness of the solid electrolyte layer located on the negative electrode layer side has a greater porosity than the region of 17% of the thickness of the solid electrolyte layer located on the positive electrode layer side.
4. The all-solid-state battery according to claim 2, wherein the porosity of the region located furthest to the negative electrode among the six regions is 5.0% or more and less than 10.0%.
5. The all-solid-state battery according to claim 2, wherein the porosity of the region located closest to the positive electrode among the six regions is 0.0% or more and less than 5.0%.
6. Multiple solid electrolyte layers are provided, Multiple solid electrolyte layers are stacked in the order of the negative electrode layer, the solid electrolyte layer, the positive electrode layer, and the solid electrolyte layer. The all-solid-state battery according to claim 1, wherein in at least one of the multiple solid electrolyte layers, the porosity of the region located on the negative electrode layer side is greater than the porosity of the region located on the positive electrode layer side.
7. The all-solid-state battery according to claim 1, wherein in 50% or more of the multiple solid electrolyte layers, the porosity of the region located on the negative electrode layer side is greater than the porosity of the region located on the positive electrode layer side.