Gaming machine

Abstract

The objective is to achieve efficient control processing. [Solution] The frame-side control CPU executes a launch control process comprising at least the following: a third frame-side control load instruction that sets first information indicating permission to feed game balls in a fourth frame-side control register; a first frame-side control determination instruction that determines whether or not information indicating that balls are being removed is set in the communication system flag; a sixth frame-side control load instruction that sets the value of the fourth frame-side control register in the first frame-side control register when the determination result of the first frame-side control determination instruction is that information indicating that balls are being removed is set in the communication system flag; and a first frame-side control input / output instruction that writes the value of the first frame-side control register to the frame-side control output port.

Claims

[Claim 1] A launching device capable of launching game balls toward a game area formed on a game board, A frame-side control board equipped with a frame-side control microprocessor that performs various controls, A gaming machine equipped with, The aforementioned launching device, When information indicating permission to feed game balls is input to the launch control circuit, the launch control circuit controls the electrical drive source, thereby enabling the feeding of game balls to be launched. The frame-side control microprocessor includes: Frame-side control CPU, A frame-side control program executed by the frame-side control CPU, and a frame-side control ROM storing information referenced by the frame-side control program, A frame-side control RAM capable of storing information updated by the frame-side control program, A frame-side control output port outputs a ball feeding signal to the launch control circuit to grant permission for the game ball to be fed, It is built in to at least The aforementioned frame-side control CPU is Multiple 1-byte general-purpose frame control registers, A 1-byte frame-side control flag register, Having at least, The aforementioned frame-side control CPU is A first frame-side control load instruction loads the lower byte of the 3 bytes of the number of game balls stored in the frame-side control RAM into the first frame-side control register among the plurality of frame-side control general-purpose registers, A first frame-side control return instruction determines whether the value of the first frame-side control register loaded by the first frame-side control load instruction is 0, and if the determined value is not 0, the value of the zero flag in the frame-side control flag register becomes 0 and the process returns to the caller. When the determination value is 0, the value of the zero flag in the frame-side control flag register becomes 1, and a second frame-side control load instruction loads the upper two bytes of the number of game balls into the first frame-side control pair register, which is composed of the second frame-side control register and the third frame-side control register among the plurality of general-purpose frame-side control registers. Following the second frame-side control load instruction, a second frame-side control return instruction returns to the calling process, The game ball count determination process, which consists of at least the following, is called and executed from another process: The aforementioned frame-side control CPU is A third frame-side control load command sets a first piece of information indicating permission to feed game balls in the fourth frame-side control register among the plurality of frame-side control general-purpose registers, A first frame-side control determination command determines whether or not information indicating that ball removal is in progress is set in the communication system flag stored in the frame-side control RAM, If the result of the determination by the first frame-side control determination command is that the communication system flag does not contain information indicating that the ball is being removed, then a fourth frame-side control load command is issued to set the fourth frame-side control register with second information indicating that the feeding of the game balls has stopped. Following the fourth frame-side control load command, a first frame-side control call command is executed by calling the game ball count determination process, A second frame-side control determination command determines whether the determination value in the game ball count determination process is 0 based on the value of the zero flag in the frame-side control flag register obtained by the first frame-side control call command, If the determination result of the second frame-side control determination command is that the value of the zero flag in the frame-side control flag register is 0 and the determination value is not 0, then a fifth frame-side control load command sets third information, including the first information indicating permission to feed game balls, in the fourth frame-side control register. After the fifth frame-side control load instruction, if the determination result of the second frame-side control determination instruction is 0 because the value of the zero flag in the frame-side control flag register is 1, or if the determination result of the first frame-side control determination instruction is that the communication system flag has information indicating that the ball is being removed, then a sixth frame-side control load instruction is issued to set the value of the fourth frame-side control register in the first frame-side control register, A first frame-side control input / output command writes the value of the first frame-side control register to the frame-side control output port, It is possible to perform launch control processing consisting of at least the following: The aforementioned frame-side control CPU is The firing control process is repeatedly executed during the remaining time between the end of processing in the periodic interrupt cycle and the start of processing in the next periodic interrupt cycle. A gaming machine characterized by the following features.

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