Silicon quantum computer substrate, silicon quantum computer, and method for manufacturing a silicon quantum computer substrate

Abstract

The present invention provides a silicon quantum computer substrate with improved high-frequency characteristics, a silicon quantum computer, and a method for manufacturing a silicon quantum computer substrate. [Solution] A silicon substrate, a first SiGe layer on the silicon substrate, a BOX layer on the first SiGe layer, and on the BOX layer 28 Si layer and the above 28 A silicon quantum computer substrate, a silicon quantum computer, and a method for manufacturing a silicon quantum computer substrate, characterized by having a second SiGe layer on a Si layer.

Description

Technical Field

[0001] The present invention relates to a substrate for a silicon quantum computer, a silicon quantum computer, and a method for manufacturing a substrate for a silicon quantum computer.

Background Art

[0002] As a computer that can solve calculations that cannot be solved in a realistic time with a conventional computer, expectations are gathering for a quantum computer that utilizes quantum effects such as superposition and entanglement. The elements used for this quantum computer application are also mounted on a semiconductor substrate such as a silicon substrate.

[0003] There are several methods for the elements used in quantum computer applications, and the main ones include those that utilize the Josephson effect using a superconductor and those that convert quantum effects into electrical signals using electron spin (ESR).

[0004] In an element that uses electron spin using a silicon substrate, the quantum effect is read out by irradiating the electron spin placed in a magnetic field with microwaves, sweeping the frequency, and causing resonance.

[0005] As structures for that, quantum computers using an SOI substrate (Non-Patent Document 1) and those using a SiGe substrate (Non-Patent Document 2) have been proposed.

[0006] In Non-Patent Document 1, the principle using SOI is explained, and this is explained as the basis of a quantum computer. The BOX layer (also referred to as an embedded oxide film layer or simply an oxide film layer), which is an insulating film constituting SOI, and the element formed on the SOI layer above it confine electrons.

[0007] On the other hand, the one using a SiGe substrate introduced in Non-Patent Document 2 utilizes the difference in the band gaps between Si and SiGe to confine electrons.

[0008] The effect of Ge concentration in SiGe varies among researchers and models, but it is summarized in Non-Patent Document 3. According to this document, as the Ge concentration increases and the lattice mismatch ratio increases, the critical film thickness decreases. [Prior art documents] [Non-patent literature]

[0009] [Non-Patent Document 1] Takahiro Mori, "Realization of High-Temperature Operation of Silicon Qubits with a View to Quantum Computing," Applied Physics, Vol. 89, No. 5, 274 (2020). [Non-Patent Document 2] Seigo Tarucha, "Quantum Information Device Using Quantum Dots," Applied Physics, Vol. 87, No. 52, 88 (2020). [Non-Patent Document 3] Katsuaki Sato, "Fundamentals and Challenges of Heteroepitaxy," 1st Workshop Meeting of the Research Group on 3C-SiC Technology for IoT in Harsh Environments, July 5, 2019. [Overview of the Initiative] [Problems that the invention aims to solve]

[0010] When using electron spin, if unwanted spin components are present in the vicinity, the electron spin energy will split due to the Zeeman effect, making it impossible to read the correct quantum information and thus preventing the use of quantum effects in calculations. For this reason, nuclear spin is used. 29 We minimized the amount of nuts used. 28 It is necessary to form a silicon-rich (silicon-dominant) silicon layer.

[0011] For this purpose, isotope enrichment was performed. 28 Using SiH4 gas 28 A silicon substrate with a Si epitaxial layer is used. Furthermore, in order to create a single-electron layer (calculations become difficult due to the spin interactions between electrons when multiple electrons are present), electron containment (single-electron transistor) is necessary.

[0012] That is, isolating electrons as much as possible to form a so-called quantum well is one of the important points in realizing a high-performance silicon quantum computer.

[0013] Furthermore, when considering future high integration, a substrate with good high-frequency characteristics, particularly a substrate for a silicon quantum computer with low harmonics and little signal distortion, is required when considering a monolithic structure (integration of quantum elements and high-frequency elements for reading the state of electrons).

[0014] The present invention has been made to solve the above problems, and provides a substrate for a silicon quantum computer with better high-frequency characteristics, a silicon quantum computer, and a method for manufacturing a substrate for a silicon quantum computer.

Means for Solving the Problems

[0015] To solve the above problems, the present invention provides a substrate for a silicon quantum computer, comprising a silicon substrate, a first SiGe layer on the silicon substrate, a BOX layer on the first SiGe layer, and an 28 Si layer on the BOX layer, and a second SiGe layer on the 28 Si layer.

[0016] For such a substrate for a silicon quantum computer, first 28 the Si layer does not contain Si having a nuclear spin, suppressing the splitting of electron spin energy due to the influence of unnecessary nuclear spin components in the periphery, and enabling correct quantum information to be read, so that the quantum effect can be reliably used in calculations. Also, 29 since the Si layer is on the BOX layer which is an insulating layer, an SOI structure is formed, and the first SiGe layer directly under the BOX layer which is the oxide film layer of the SOI structure confines electrons, and the high-frequency characteristics are improved by the effect of the strain by the first SiGe layer. Furthermore 28 ... 28The Si layer is sandwiched between a first SiGe layer below and a second SiGe layer above. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This makes it possible to obtain a silicon quantum computer substrate with good high-frequency characteristics.

[0017] Furthermore, it is preferable that the silicon substrate has a resistivity of 1000 Ω·cm or more.

[0018] With such a high-resistance silicon substrate, even when using microwaves to read out the spin states of electrons and other elements exhibiting quantized behavior in quantum computers, signal distortion in the transmission path can be minimized. This results in a silicon quantum computer substrate that can stably extract signals obtained through spin resonance without distortion.

[0019] Furthermore, the first SiGe layer preferably has a Ge concentration of 30% or less. More preferably, it can be 20% or less.

[0020] With such a low Ge concentration in the first SiGe layer, the critical thickness at which dislocations do not form tends to decrease as the Ge concentration increases. However, it is possible to prevent the critical thickness from becoming too thin, and to obtain a first SiGe layer of sufficient thickness for use as a substrate for silicon quantum computers.

[0021] Furthermore, the BOX layer is the 28 It is preferable that the Si layer is formed by oxidation.

[0022] Such 28 If the BOX layer is formed by oxidizing the Si layer, it can reliably act as an insulating layer and form an SOI structure.

[0023] Furthermore, in order to solve the above problems, the present invention provides a silicon quantum computer characterized by being equipped with the above-described silicon quantum computer substrate.

[0024] Such a silicon quantum computer would use a silicon quantum computer substrate with good high-frequency characteristics, resulting in a high-performance silicon quantum computer.

[0025] Furthermore, in order to solve the above problems, the present invention provides a first substrate having a first SiGe layer on a first silicon substrate, and a second silicon substrate 28 Si layer and the above 28 Prepare a first substrate and a second substrate having a BOX layer on a Si layer, bond the first SiGe layer of the first substrate and the BOX layer of the second substrate, peel off the second silicon substrate, and the exposed part by peeling off the second silicon substrate 28 The present invention provides a method for manufacturing a silicon quantum computer substrate, characterized by stacking a second SiGe layer on a Si layer.

[0026] A manufacturing method for a silicon quantum computer substrate would involve a first silicon substrate, a first SiGe layer, a BOX layer on the first SiGe layer, and the BOX layer 28 Si layer and the above 28 A silicon quantum computer substrate having a second SiGe layer on a Si layer can be manufactured.

[0027] The silicon quantum computer substrates manufactured in this way are first 28 The Si layer has nuclear spin 29 Because it lacks silicon, it suppresses the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The presence of the Si layer on the insulating BOX layer forms an SOI structure, and the first SiGe layer directly beneath the BOX layer, which is the oxide film layer of the SOI structure, traps electrons, while the strain effect of the first SiGe layer improves high-frequency characteristics. 28The Si layer is sandwiched between a first SiGe layer below and a second SiGe layer above. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This allows for the fabrication of silicon quantum computer substrates with excellent high-frequency characteristics.

[0028] Furthermore, it is preferable that the first silicon substrate has a resistivity of 1000 Ω·cm or more.

[0029] With such a high-resistance first silicon substrate, microwaves are normally used to read out the spin states of electrons and other elements that exhibit quantized behavior in quantum computers. However, even when microwaves are used, signal distortion in the transmission path can be minimized. This makes it possible to manufacture silicon quantum computer substrates that can stably extract signals obtained by spin resonance without distortion.

[0030] Furthermore, it is preferable that the first SiGe layer has a Ge concentration of 30% or less.

[0031] With such a low Ge concentration in the first SiGe layer, although the critical thickness at which dislocations do not form tends to decrease as the Ge concentration increases, it is possible to prevent the critical thickness from becoming too thin and to manufacture a silicon quantum computer substrate with a first SiGe layer of sufficient thickness.

[0032] Furthermore, it is preferable to perform CMP processing on the first SiGe layer before bonding to achieve a surface roughness Sa of 1 nm or less.

[0033] By setting the surface roughness Sa of the first SiGe layer to 1 nm or less, the first SiGe layer is sufficiently planar and can be reliably bonded to the BOX layer of the second substrate.

[0034] Furthermore, the BOX layer is the 28 It is preferable to form the Si layer by oxidation.

[0035] In this way 28 By oxidizing the Si layer to form a BOX layer, it can reliably become an insulating layer and form an SOI structure.

[0036] Furthermore, before bonding the first SiGe layer of the first substrate to the BOX layer of the second substrate, the second substrate has a position deeper than the BOX layer 28 It is preferable to pre-inject hydrogen into the Si layer to form a hydrogen-implanted layer.

[0037] By pre-injecting hydrogen in this way to form a hydrogen-injected layer, the second silicon substrate can be easily peeled off after bonding, using this hydrogen-injected layer as a starting point.

[0038] Furthermore, it is preferable to remove the second silicon substrate by heat treatment, thereby removing it from the hydrogen-implanted layer.

[0039] By performing heat treatment with the hydrogen-injected layer formed in this manner, the bonds of the silicon crystals in the hydrogen-injected layer are broken (Smart Cut®), allowing for reliable removal of the second silicon substrate. [Effects of the Invention]

[0040] As described above, the silicon quantum computer substrate of the present invention is, first 28 The Si layer has nuclear spin 29 Because it lacks silicon, it suppresses the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The presence of the Si layer on the insulating BOX layer forms an SOI structure, and the first SiGe layer directly beneath the BOX layer, which is the oxide film layer of the SOI structure, traps electrons, while the strain effect of the first SiGe layer improves high-frequency characteristics. 28The Si layer is sandwiched between a first SiGe layer below and a second SiGe layer above. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This makes it possible to obtain a silicon quantum computer substrate with good high-frequency characteristics.

[0041] Furthermore, since the silicon quantum computer of the present invention uses a silicon quantum computer substrate with good high-frequency characteristics, it becomes a high-performance silicon quantum computer.

[0042] Furthermore, the present invention provides a method for manufacturing a silicon quantum computer substrate, comprising a first silicon substrate, a first SiGe layer, a BOX layer on the first SiGe layer, and on the BOX layer 28 Si layer and the above 28 A silicon quantum computer substrate having a second SiGe layer on a Si layer can be manufactured.

[0043] The silicon quantum computer substrates manufactured in this way are first 28 The Si layer has nuclear spin 29 Because it lacks silicon, it suppresses the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The presence of the Si layer on the insulating BOX layer forms an SOI structure, and the first SiGe layer directly beneath the BOX layer, which is the oxide film layer of the SOI structure, traps electrons, while the strain effect of the first SiGe layer improves high-frequency characteristics. 28 The Si layer is sandwiched between a first SiGe layer below and a second SiGe layer above. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This allows for the fabrication of silicon quantum computer substrates with excellent high-frequency characteristics.

[0044] Furthermore, the silicon quantum computer substrate with excellent high-frequency characteristics obtained in this invention can be used as a substrate unaffected by nuclear spin, allowing for the construction of high-frequency circuits for reading quantum information.

[0045] Furthermore, the silicon quantum computer substrate with excellent high-frequency characteristics obtained by this invention is also expected to enable high performance in monolithic structures. It will be possible to fully utilize the isotope effect suitable for quantum computers and easily form single-electron transistors. [Brief explanation of the drawing]

[0046] [Figure 1] This is a schematic diagram illustrating an example of the structure of a silicon quantum computer substrate according to the present invention. [Figure 2] This is a schematic diagram illustrating the flow of the manufacturing method for a silicon quantum computer substrate according to the present invention. [Figure 3] This is a schematic diagram illustrating the comparative example. [Modes for carrying out the invention]

[0047] The present invention will be described in detail below, but the present invention is not limited to these descriptions.

[0048] As described above, there was a need for silicon quantum computer substrates, silicon quantum computers, and methods for manufacturing silicon quantum computer substrates with better high-frequency characteristics.

[0049] Therefore, after further investigation into the above problem, the present inventors have found a first SiGe layer on a silicon substrate, a BOX layer on the first SiGe layer, and a BOX layer 28 Si layer, 28 A silicon quantum computer substrate having a second SiGe layer on top of a Si layer eliminates the influence of unwanted nuclear spins, allowing for accurate reading of quantum information. 28 We discovered that electrons can be trapped in the Si layer, improving high-frequency characteristics, and thus completed the present invention.

[0050] That is, the present invention comprises a silicon substrate, a first SiGe layer on the silicon substrate, a BOX layer on the first SiGe layer, and on the BOX layer 28 Si layer and the above 28 This is a silicon quantum computer substrate characterized by having a second SiGe layer on a Si layer.

[0051] Furthermore, the present invention is a silicon quantum computer characterized by being equipped with the above-described silicon quantum computer substrate.

[0052] Furthermore, the present invention relates to a first substrate having a first SiGe layer on a first silicon substrate, and a second silicon substrate having a first SiGe layer on a first silicon substrate. 28 Si layer and the above 28 Prepare a first substrate and a second substrate having a BOX layer on a Si layer, bond the first SiGe layer of the first substrate and the BOX layer of the second substrate, peel off the second silicon substrate, and the exposed part by peeling off the second silicon substrate 28 This is a method for manufacturing a silicon quantum computer substrate, characterized by stacking a second SiGe layer on a Si layer.

[0053] Embodiments of the present invention will be described below with reference to the drawings.

[0054] (Substrate for silicon quantum computer) Figure 1 is a schematic diagram illustrating an example of the structure of a silicon quantum computer substrate according to the present invention.

[0055] The silicon quantum computer substrate 10 consists of a silicon substrate 1, a first SiGe layer 2 on the silicon substrate 1, a BOX layer 3 (also called an embedded oxide layer or simply an oxide layer) on the first SiGe layer 2, and on the BOX layer 3 28 Si layer 4 and, 28 It has a second SiGe layer 5 on top of a Si layer 4.

[0056] If we have a silicon quantum computer substrate 10 like this, first 28Si layer 4 has nuclear spin 29 Because it lacks silicon, it suppresses the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The presence of the Si layer 4 on the insulating BOX layer 3 forms an SOI structure, and the first SiGe layer 2 directly beneath the BOX layer 3, which is an oxide film layer of the SOI structure, traps electrons, while the strain effect of the first SiGe layer 2 improves high-frequency characteristics. 28 The Si layer 4 is sandwiched between the lower first SiGe layer 2 and the upper second SiGe layer 5. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. This makes it possible to obtain a silicon quantum computer substrate 10 with good high-frequency characteristics.

[0057] Furthermore, the silicon substrate 1 is not particularly limited, but it is preferable that it has a resistivity of 1000 Ω·cm or more.

[0058] With such a high-resistance silicon substrate 1, even though microwaves are normally used to read out the spin states of electrons and other elements that exhibit quantized behavior in quantum computers, it is possible to minimize signal distortion in the transmission path even when microwaves are used. This results in a silicon quantum computer substrate 10 that can stably extract signals obtained by spin resonance without distortion.

[0059] Furthermore, the first SiGe layer 2 is not particularly limited, but it is preferable that the Ge concentration be 30% or less. More preferably, it can be 20% or less.

[0060] With such a low Ge concentration in the first SiGe layer 2, the critical thickness at which dislocations do not form tends to decrease as the Ge concentration increases, but it is possible to prevent the critical thickness from becoming too thin, and obtain a first SiGe layer 2 of sufficient thickness for use as a silicon quantum computer substrate 10.

[0061] Also, BOX layer 3 is not particularly limited. 28 It is preferable that the Si layer 4 is formed by oxidation.

[0062] Such 28 If the BOX layer 3 is formed by oxidizing the Si layer 4, it can reliably become an insulating layer and form an SOI structure.

[0063] Furthermore, a silicon quantum computer can be constructed using the silicon quantum computer substrate 10 described above.

[0064] Such a silicon quantum computer would be a high-performance silicon quantum computer because it would use a silicon quantum computer substrate 10 with good high-frequency characteristics.

[0065] Furthermore, in this specification, 28 Si is the percentage of silicon that makes up the total silicon 28 This means that the composition has a silicon content of 99.9% or more. 28 Si monosilane gas ( 28 (Also written as SiH4) refers to the proportion of monosilane (SiH4) gas in the total silicon. 28 This refers to monosilane gas with a composition containing 99.9% or more Si. Stable isotopes of silicon include: 28 Si, 29 Si, 30 There are three types of silicon (Si), with natural abundances of 92.23%, 4.67%, and 3.1%. For example, by centrifuging a silicon-containing gas (silane-based gas) consisting of natural Si isotope compositions, 28 It can manufacture silica source gas.

[0066] (Manufacturing method for silicon quantum computer substrates) Figure 2 is a schematic diagram illustrating the flow of the manufacturing method for the silicon quantum computer substrate 40 according to the present invention.

[0067] A first substrate 20 having a first SiGe layer 12a on a first silicon substrate 11, and a second silicon substrate 21 28Si layer 24 and, 28 A second substrate 30 having a BOX layer 23 on a Si layer 24 is prepared.

[0068] Next, the first SiGe layer 12a of the first substrate 20 and the BOX layer 23 of the second substrate 30 are bonded together.

[0069] Next, the second silicon substrate 21 is peeled off.

[0070] Finally, the second silicon substrate 21 was peeled off to expose the 28 A silicon quantum computer substrate 40 can be manufactured by stacking a second SiGe layer 35 on top of a Si layer 24a.

[0071] With such a method for manufacturing a silicon quantum computer substrate 40, a first SiGe layer 12a is placed on the first silicon substrate 11, a BOX layer 23 is placed on the first SiGe layer 12a, and on the BOX layer 23 28 Si layer 24a and, 28 A silicon quantum computer substrate 40 having a second SiGe layer 35 on a Si layer 24a can be manufactured.

[0072] The silicon quantum computer substrate 40 manufactured in this way is first 28 The Si layer 24a has nuclear spin 29 Because it lacks silicon, it suppresses the splitting of electron spin energy due to the influence of unwanted nuclear spin components in the surrounding area, allowing for the accurate reading of quantum information, thus enabling reliable use of quantum effects in calculations. 28 The Si layer 24a is located on the insulating BOX layer 23, forming an SOI structure. The first SiGe layer 12a directly beneath the BOX layer 23, which is an oxide film layer of the SOI structure, traps electrons, and the strain effect of the first SiGe layer 12a improves high-frequency characteristics. 28The Si layer 24a is sandwiched between the lower first SiGe layer 12a and the upper second SiGe layer 35. By utilizing the difference in band gaps between Si and SiGe, electrons can be confined simultaneously from both above and below. Thus, a silicon quantum computer substrate 40 with good high-frequency characteristics can be manufactured.

[0073] Furthermore, the first silicon substrate 11 is not particularly limited, but it is preferable that it has a resistivity of 1000 Ω·cm or more.

[0074] With such a high-resistance first silicon substrate 11, microwaves are normally used to read out the spin states of electrons and other elements that exhibit quantized behavior in quantum computers. However, even when microwaves are used, it is possible to minimize signal distortion in the transmission path. This makes it possible to manufacture a silicon quantum computer substrate 40 that can stably extract signals obtained by spin resonance without distortion.

[0075] Furthermore, the first SiGe layer 12a is not particularly limited, but it is preferable that the Ge concentration be 30% or less. More preferably, it can be 20% or less.

[0076] If the first SiGe layer 12a has such a low Ge concentration, the critical film thickness at which dislocations do not form tends to decrease as the Ge concentration increases. However, it is possible to prevent the critical film thickness from becoming too thin, and to manufacture a silicon quantum computer substrate 40 that has a first SiGe layer 12a of sufficient thickness.

[0077] Furthermore, although the first SiGe layer 12a is not particularly limited, it is preferable to perform CMP processing before bonding to achieve a surface roughness Sa of 1 nm or less.

[0078] By setting the surface roughness Sa of the first SiGe layer 12a to 1 nm or less, the first SiGe layer 12a is sufficiently planar and can be reliably bonded to the BOX layer 23 of the second substrate 30.

[0079] Here, we will describe an example of a method for manufacturing the first substrate 20. As shown in the upper part of Figure 2, first, a first SiGe layer 12 is epitaxially grown on the first silicon substrate 11, and then the first SiGe layer 12 is subjected to CMP processing to obtain a first SiGe layer 12a with a surface roughness Sa of 1 nm or less, thereby manufacturing the first substrate 20.

[0080] The first SiGe layer 12a of the first substrate 20 is to function as a stressor, so coherent growth, i.e., growth at a critical film thickness where no dislocations are generated, is preferred. On the other hand, since this first substrate 20 needs to be bonded to the next second substrate 30, it is preferable to planarize the surface to Sa = 1 nm or less. Furthermore, in order to make the critical film thickness as thick as possible while considering the amount to be removed by CMP, the Ge concentration is preferably 30% or less, preferably 20% or less.

[0081] The effect of Ge concentration in SiGe is summarized in Non-Patent Document 3. According to this document, as the Ge concentration increases and the lattice mismatch rate increases, the critical film thickness decreases. Considering CMP processing, a thickness of about 100 nm is required, and the Ge concentration should be 30% (lattice mismatch rate: 0.0014%) or less, preferably around 20% (lattice mismatch rate: 0.001%). Conversely, if the Ge concentration is low, the band curvature due to strain decreases, and as a result the effect of SiGe decreases. Therefore, it can be said that a Ge concentration of around 20% in SiGe is more preferable.

[0082] Next, the BOX layer 23 of the second substrate 30 is not particularly limited, 28 It is preferable to form the Si layer 24 by oxidation.

[0083] In this way 28 By oxidizing the Si layer 24 to form the BOX layer 23, it can reliably become an insulating layer and form an SOI structure.

[0084] Furthermore, although not particularly limited, before bonding the first SiGe layer 12a of the first substrate 20 to the BOX layer 23 of the second substrate 30, the second substrate 30 is positioned deeper than the BOX layer 23. 28 It is preferable to pre-inject hydrogen into the Si layer 24 to form a hydrogen-injected layer 26.

[0085] By pre-injecting hydrogen in this manner to form a hydrogen-injected layer 26, the second silicon substrate 21 can be easily peeled off after bonding, starting from this hydrogen-injected layer 26.

[0086] Here, we will describe an example of how to manufacture the second substrate 30. As shown in the middle of Figure 2, first the second silicon substrate 21 28 The Si layer 24 was epitaxially grown, and then 28 The Si layer 24 is oxidized to form the BOX layer 23, and further, at a position deeper than the BOX layer 23 28 A second substrate 30 can be manufactured by injecting hydrogen into the Si layer 24 to form a hydrogen-implanted layer 26.

[0087] Then, the first SiGe layer 12a of the first substrate 20, which was prepared as described above, and the BOX layer 23 of the second substrate 30 are joined together.

[0088] The process after joining will be explained by referring to the lower part of Figure 2.

[0089] The peeling of the second silicon substrate 21 is not particularly limited, but it is preferable to peel it off at the hydrogen-implanted layer 26 by heat treatment.

[0090] By performing heat treatment with the hydrogen-injected layer 26 formed in this manner, the bonds of the silicon crystals in the hydrogen-injected layer 26 can be severed (Smart Cut®), and the second silicon substrate 21 can be reliably peeled off.

[0091] And finally, the second silicon substrate 21 was peeled off to expose 28A silicon quantum computer substrate 40 can be manufactured by epitaxially growing a second SiGe layer 35 on the surface of the Si layer 24a.

[0092] In addition to the method of pre-implanting hydrogen into the second substrate 30 and performing SmartCut (registered trademark) as described above, the second silicon substrate 21 may also be removed by thinning it using methods such as grinding and polishing. [Examples]

[0093] The present invention will be specifically described below using examples, but the present invention is not limited thereto.

[0094] (Examples) As the first substrate, a boron-doped silicon substrate with a diameter of 300 mm (resistance: 1000 Ω·cm) was prepared, and a SiGe layer (Ge=20%) was grown at 90 nm in a vacuum CVD apparatus by supplying SiH2Cl2 gas at 500 sccm and GeH4 gas at 1500 sccm, 10 Torr, and 610°C. Next, this substrate was subjected to CMP with silica-based abrasive grains, and 20 nm was removed so that Sa=1 nm, preparing a substrate with a 70 nm SiGe layer.

[0095] Next, as a second substrate, another substrate is used. 28 Silicon epitaxial growth was performed using SiH4 (99.94% isotope) as the raw material. A 30 nm film was deposited under reduced pressure conditions of 850°C and 100 Torr. This substrate was oxidized to form a 20 nm thermal oxide film layer as the BOX layer by dry oxidation at 900°C, after which hydrogen was added at 10 keV at a rate of 1 e16 a / cm². 2 It was injected and prepared as the second substrate.

[0096] Then, the surface of the BOX layer of the second substrate was bonded to the surface of the SiGe layer of the first substrate.

[0097] Next, the bonded substrates were annealed at 450°C for 60 minutes to remove the hydrogen-injected layer. 28A second SiGe layer (Ge=30%) was formed on top of the Si layer.

[0098] A device was fabricated on this substrate by forming a CPW (path length: 2200 μm) with aluminum electrodes. Subsequently, the second harmonic characteristics (2HD characteristics) (frequency: 1 GHz, input power: 15 dBm) were measured. As a result, a 2HD value of -100 dBm was obtained.

[0099] (Comparative example) As the first substrate, a boron-doped silicon substrate with a diameter of 300 mm (resistance: 1000 Ω·cm) was prepared. This differs from the example in that it does not have a SiGe layer.

[0100] Next, as the second substrate, prepare a boron-doped silicon substrate with a diameter of 300 mm (resistance: 1000 Ω·cm), 28 Silicon epitaxial growth was performed using SiH4 (99.94% isotope) as the raw material. A 30 nm film was deposited under reduced pressure conditions of 850°C and 100 Torr. This substrate was then oxidized to form a 20 nm thermal oxide film layer as the BOX layer by dry oxidation at 900°C. A second substrate was then prepared by implanting hydrogen at 10 keV at 1E16 a / cm2.

[0101] Then, the surface of the BOX layer of the second substrate was bonded to the surface of the first substrate.

[0102] Next, the bonded substrates were annealed at 450°C for 60 minutes to remove the hydrogen-injected layer. 28 A SiGe layer (Ge=30%) was formed on the Si top layer.

[0103] Figure 3 is a schematic diagram of the comparative example substrate 50. Substrate 50 consists of a BOX layer 53 on a silicon substrate 51, and on the BOX layer 53 28 Si layer 54 and, 28 The configuration includes a SiGe layer 55 on a Si layer 54. The comparative example in Figure 3, compared to the example in Figure 1, has a configuration in which there is no SiGe layer directly beneath the BOX layer 53.

[0104] A device was fabricated on comparative substrate 50 by forming a CPW (path length: 2200 μm) with aluminum electrodes. Subsequently, the second harmonic characteristics (2HD characteristics) (frequency: 1 GHz, input power: 15 dBm) were measured. As a result, a 2HD value of -80 dBm was obtained.

[0105] The example (configuration with a SiGe layer directly beneath the BOX layer) exhibited better 2HD characteristics (20dB improvement) than the comparative example (configuration without a SiGe layer directly beneath the BOX layer). Consequently, it was confirmed that the distortion of high-frequency signals during quantum signal readout was smaller, making it superior as a substrate for quantum computers.

[0106] As described above, according to the embodiments of the present invention, a silicon quantum computer substrate with better high-frequency characteristics was obtained.

[0107] This specification includes the following embodiments: [1]: A silicon substrate and The first SiGe layer on the silicon substrate, The BOX layer on the first SiGe layer, On the aforementioned BOX layer 28 Si layer, The aforementioned 28 A second SiGe layer on the Si layer, A substrate for a silicon quantum computer, characterized by having the following features. [2]: The silicon substrate for a silicon quantum computer according to [1] above, characterized in that the silicon substrate has a resistivity of 1000 Ω·cm or more. [3]: The silicon quantum computer substrate according to [1] or [2] above, characterized in that the first SiGe layer has a Ge concentration of 30% or less. [4]: The aforementioned BOX layer is 28 A silicon quantum computer substrate according to any one of the above [1] to [3], characterized in that it is formed by oxidizing a Si layer. [5]: A silicon quantum computer comprising a substrate for a silicon quantum computer according to any one of the above [1] to [4]. [6]: A first substrate having a first SiGe layer on a first silicon substrate, On a second silicon substrate 28 An Si layer and the above-mentioned 28 A second substrate having a BOX layer on the Si layer, Prepare each of them, Bond the first SiGe layer of the first substrate and the BOX layer of the second substrate, Peel off the second silicon substrate, The above-mentioned exposed by peeling off the second silicon substrate 28 A method for manufacturing a substrate for a silicon quantum computer, characterized by laminating a second SiGe layer on the Si layer. [7]: The first silicon substrate has a resistivity of 1000 Ω·cm or more, and is the method for manufacturing a substrate for a silicon quantum computer according to the above [6]. [8]: The first SiGe layer has a Ge concentration of 30% or less, and is the method for manufacturing a substrate for a silicon quantum computer according to the above [6] or [7]. [9]: The first SiGe layer is subjected to CMP processing before bonding, and the surface roughness Sa is 1 nm or less, and is the method for manufacturing a substrate for a silicon quantum computer according to any one of the above [6] to [8]. ​​​​​​​​​​​​A method for manufacturing a silicon quantum computer substrate according to any one of the above [6] to

[10] , characterized in that hydrogen is pre-injected into the Si layer to form a hydrogen-implanted layer.

[12] : The method for manufacturing a silicon quantum computer substrate according to

[11] above, characterized in that the second silicon substrate is peeled off at the hydrogen-injected layer by heat treatment.

[0108] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention. [Explanation of Symbols]

[0109] 1, 51…Silicon substrate, 2, 12, 12a…First SiGe layer, 3, 23, 53…BOX layer, 4, 24, 24a, 54… 28 Si layer, 5, 35…Second SiGe layer, 10, 40…Substrate for silicon quantum computer, 11...First silicon substrate, 20...First substrate, 21...Second silicon substrate, 26...Hydrogen-injected layer, 30...Second substrate, 50...Substrate, 55...SiGe layer.

Claims

1. A silicon substrate and The first SiGe layer on the silicon substrate, The BOX layer on the first SiGe layer, On the aforementioned BOX layer ２８ Si layer, The aforementioned ２８ A second SiGe layer on the Si layer, A substrate for a silicon quantum computer, characterized by having the following features.

2. The silicon substrate for a silicon quantum computer according to claim 1, characterized in that the silicon substrate has a resistivity of 1000 Ω·cm or more.

3. The silicon quantum computer substrate according to claim 1, characterized in that the first SiGe layer has a Ge concentration of 30% or less.

4. The BOX layer is the ２８ A silicon quantum computer substrate according to claim 1, characterized in that it is formed by oxidizing a Si layer.

5. A silicon quantum computer characterized by comprising a silicon quantum computer substrate as described in claims 1 to 4.

6. A first substrate having a first SiGe layer on a first silicon substrate, On the second silicon substrate ２８ Si layer and the above ２８ A second substrate having a BOX layer on a Si layer, Prepare each of the following: The first SiGe layer of the first substrate and the BOX layer of the second substrate are joined together. The second silicon substrate is peeled off, The second silicon substrate is peeled off to expose the ２８ A method for manufacturing a silicon quantum computer substrate, characterized by stacking a second SiGe layer on a Si layer.

7. The method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the first silicon substrate has a resistivity of 1000 Ω·cm or more.

8. The method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the first SiGe layer has a Ge concentration of 30% or less.

9. The method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the first SiGe layer has a surface roughness Sa of 1 nm or less by performing CMP processing before bonding.

10. The BOX layer is the ２８ A method for manufacturing a silicon quantum computer substrate according to claim 6, characterized in that the Si layer is formed by oxidation.

11. Before bonding the first SiGe layer of the first substrate and the BOX layer of the second substrate, The second substrate is located at a position deeper than the BOX layer. ２８ A method for manufacturing a silicon quantum computer substrate according to claims 6 to 10, characterized in that hydrogen is pre-injected into the Si layer to form a hydrogen-injected layer.

12. The method for manufacturing a silicon quantum computer substrate according to claim 11, characterized in that the second silicon substrate is peeled off at the hydrogen-injected layer by heat treatment.

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