Display device and its driving method

Abstract

To provide a highly reliable liquid crystal display device with low power consumption and a method for driving it. [Solution] The display device has a plurality of pixels arranged in a matrix having a plurality of rows and a plurality of columns, each having a transistor and a liquid crystal element electrically connected to the transistor, and a red light-emitting element, a green light-emitting element, and a blue light-emitting element configured to illuminate the plurality of pixels. The driving method includes inputting a video signal to the plurality of pixels in row order during a first frame period, and after inputting the video signal to the plurality of pixels, lighting up one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element. During the first frame period, after inputting the video signal to the plurality of pixels, all transistors are kept in the off state.

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a display device and a method for driving the same. [Background technology]

[0002] Liquid crystal displays are used in a variety of electronic devices such as smartphones, mobile phones, tablets, televisions, computers, signage, head-mounted displays, and portable game consoles. Therefore, various methods for driving liquid crystal displays have been proposed depending on their size and application. For example, Patent Document 1 discloses a method for driving a liquid crystal display using a common inversion method, in which the operating voltage can be reduced by applying a constant potential to all pixels before inverting the polarity of the common electrode. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2019-78979 [Overview of the project] [Problems that the invention aims to solve]

[0004] One embodiment of the present invention aims to provide a liquid crystal display device having a novel structure and a method for driving the same. Alternatively, one embodiment of the present invention aims to provide a highly reliable liquid crystal display device with low power consumption and a method for driving the same. [Means for solving the problem]

[0005] One embodiment of the present invention is a method for driving a display device. The display device comprises a plurality of pixels, as well as a red light-emitting element, a green light-emitting element, and a blue light-emitting element. Each of the plurality of pixels has a transistor and a liquid crystal element electrically connected to the transistor. The red light-emitting element, the green light-emitting element, and the blue light-emitting element are configured to illuminate the plurality of pixels with light. The driving method includes inputting a video signal to the plurality of pixels during a first frame period, lighting up one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element after inputting the video signal to the plurality of pixels, and keeping the transistors of the plurality of pixels in the off state after inputting the video signal to the plurality of pixels until the start of a second frame period following the first frame period.

[0006] One embodiment of the present invention is a display device. The display device comprises a plurality of pixels, a drive circuit for controlling the plurality of pixels, a red light-emitting element, a green light-emitting element, a blue light-emitting element, and a light source drive circuit. Each of the plurality of pixels has a transistor and a liquid crystal element electrically connected to the transistor. The red light-emitting element, the green light-emitting element, and the blue light-emitting element are configured to illuminate the plurality of pixels. The light source drive circuit is configured to control the red light-emitting element, the green light-emitting element, and the blue light-emitting element. The drive circuit is configured to input a video signal to the plurality of pixels during a first frame period. The light source drive circuit is configured to light up one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element after inputting the video signal to the plurality of pixels during the first frame period. The drive circuit is further configured to keep the transistors of the plurality of pixels in the off state during the first frame period until the start of a second frame period following the first frame period. [Brief explanation of the drawing]

[0007] [Figure 1] A schematic unfolded view of a display device according to one embodiment of the present invention. [Figure 2] A schematic perspective view of a display device according to one embodiment of the present invention. [Figure 3]A schematic end view of a display device according to one embodiment of the present invention. [Figure 4] An equivalent circuit diagram of a pixel in a display device according to one embodiment of the present invention. [Figure 5] A schematic end view of a display device according to one embodiment of the present invention. [Figure 6] A schematic end view of a display device according to one embodiment of the present invention. [Figure 7] A schematic end view of a display device according to one embodiment of the present invention. [Figure 8] A schematic top view of a transistor included in a pixel of a display device according to one embodiment of the present invention. [Figure 9] A schematic top view of a transistor included in a pixel of a display device according to one embodiment of the present invention. [Figure 10] A timing chart showing a drive method according to one embodiment of the present invention. [Figure 11] A timing chart showing a drive method according to one embodiment of the present invention. [Modes for carrying out the invention]

[0008] The embodiments of the present invention will be described below with reference to the drawings and other materials. However, the present invention can be implemented in various forms without departing from its spirit, and is not to be interpreted as being limited to the embodiments described below.

[0009] While drawings may schematically represent the width, thickness, shape, etc., of each part compared to the actual embodiment in order to clarify the explanation, these are merely examples and do not limit the interpretation of the present invention. In this specification and each figure, elements having the same function as those described in previously shown figures are denoted by the same reference numeral, and redundant explanations may be omitted. This reference numeral is used to represent multiple identical or similar structures collectively, and when representing them individually, a hyphen and a natural number are added after the reference numeral.

[0010] In the present invention, when a single film is processed to form a plurality of films, these plurality of films may have different functions and roles. However, these plurality of films are derived from films formed as the same layer in the same process and have substantially the same layer structure, the same material, and the same morphology. Therefore, these plurality of films are defined as being present in the same layer.

[0011] In this specification and the claims, when expressing the manner of disposing one structure on top of another structure, if simply denoted as "on top", unless otherwise specified, it shall include both the case of disposing another structure directly on top so as to be in contact with a certain structure and the case of disposing another structure above a certain structure through yet another structure.

[0012] In this specification and the claims, the expression "a certain structure is exposed from another structure" means a mode in which a part of a certain structure is not covered by another structure, and the portion not covered by this other structure also includes a mode in which it is covered by yet another structure. Also, the mode represented by this expression includes a mode in which a certain structure is not in contact with another structure.

[0013] 1. Overall Configuration of Display Device FIG. 1 shows a schematic exploded view of a display device 100 according to one embodiment of the present invention. The display device 100 is a liquid crystal display device and includes a light source unit 110 and a display unit 120. Hereinafter, the light source unit 110 and the display unit 120 will be described respectively.

[0014] (1) Light Source Unit In the example shown in Figure 1, the light source unit 110 comprises a light source substrate 112, a plurality of light-emitting elements 114 arranged on the light source substrate 112, and a light source drive circuit 116. The light source substrate 112 is housed in a housing (not shown). The plurality of light-emitting elements 114 are each composed of inorganic light-emitting diodes (LEDs) and are arranged to irradiate the display unit 120 with light of the three primary colors. More specifically, a plurality of red light-emitting elements 114, a plurality of green light-emitting elements 114, and a plurality of blue light-emitting elements 114, each including an LED, are arranged on the light source substrate 112. The light source drive circuit 116 receives power and control signals from an external circuit (not shown) via a connector such as a flexible printed circuit board (FPC) (not shown). The light source drive circuit 116 is configured to execute a drive method described later, and generates signals to control the plurality of light-emitting elements 114 based on the input control signals, and supplies them to the plurality of light-emitting elements 114. As a result, light from the light-emitting elements 114 irradiates the pixels of the display unit 120 (described later). As described later, the display device 100 employs a so-called field sequential drive method. Therefore, the light source driving circuit 116 is configured to sequentially emit light from the red light-emitting element 114, multiple green light-emitting elements 114, and multiple blue light-emitting elements 114 for each frame period. Although not shown, a light diffuser plate, a prism sheet, etc., are provided between the light source unit 110 and the display unit 120. This allows the light from the light source unit 110 to be uniformly irradiated onto the display unit 120.

[0015] (2) Display unit The display unit 120 has an array substrate 122 and a counter substrate 124 facing the array substrate 122. The array substrate 122 and the counter substrate are fixed to each other by a sealing material (not shown). Various patterned conductive films, semiconductor films, insulating films, etc., formed using a photolithography process are arranged on the array substrate 122. By appropriately combining these conductive films, semiconductor films, insulating films, etc., a plurality of pixels 140 are formed, along with drive circuits for driving the pixels 140 (gate line drive circuit 126, signal line drive circuit 128), and a plurality of terminals 130 electrically connected to the drive circuits. Note that a part of the drive circuit (for example, all or part of the signal line drive circuit 128) may be formed using an integrated circuit formed on a semiconductor substrate.

[0016] As shown in Figure 1, the multiple pixels 140 are arranged in a matrix having multiple rows and multiple columns. As will be described later, each pixel 140 is provided with a liquid crystal element as a display element, and each pixel 140 functions as the smallest unit that provides color information. The smallest area including the multiple pixels 140 and adjacent pixels 140 is the display area, and the area surrounding the display area, where the drive circuit and terminals 130 are provided, is the frame area. Although not shown in Figure 1, multiple gate lines and multiple video signal lines are formed on the array substrate 122 by a patterned conductive film. The multiple gate lines extend in the row direction from the gate line drive circuit 126 to the display area, and the multiple video signal lines extend in the column direction from the signal line drive circuit 128 to the display area.

[0017] Multiple terminals 130 are arranged in parallel in the row or column direction. Although not shown, the multiple terminals 130 are connected to an external circuit (not shown) via a connector such as an FPC, and various control signals and power supply for driving the pixels 140 are supplied from the external circuit to the drive circuit via the connector and terminals 130. The gate line drive circuit 126 generates gate signals based on control signals supplied from the external circuit and supplies them to the pixels 140 via multiple gate lines so that the drive method described later can be executed. On the other hand, the signal line drive circuit 128 generates various signals, including video signals, based on control signals supplied from the external circuit and supplies them to the pixels 140 via multiple video signal lines so that the drive method described later can be executed. The multiple pixels 140 are controlled by these signals, thereby reproducing the image in the display area.

[0018] In the example shown in Figure 1, the light source unit 110 is positioned so as to overlap with a plurality of pixels 140 in the direction normal to the main surface of the array substrate 122 or the opposing substrate 124, and light from the light-emitting element 114 is irradiated onto the pixels 140. However, the arrangement of the light source unit 110 and the display unit 120 is not limited to this. For example, as shown in Figure 2, the light source unit 110 may be positioned on the array substrate 122 so as not to overlap with the display area, and a pair of light guide plates 102-1 and 102-2 may be provided to sandwich the array substrate 122 and the opposing substrate 124. As shown in the schematic diagram of the end face along the dashed line AA' in Figure 2 (Figure 3), the pair of light guide plates 102-1 and 102-2 are fixed to the array substrate 122 and the opposing substrate 124, respectively, by visible light-transmitting adhesive layers 188-1 and 188-2. The array substrate 122 and the opposing substrate 124 are fixed to each other by a sealing material 186 that is arranged to surround the display area, and the liquid crystal layer 180 is sealed within the space formed by the array substrate 122, the opposing substrate 124, and the sealing material 186. In the light source unit 110, a plurality of light-emitting elements 114 are arranged in a row or column direction, and the light source unit 110 is positioned to irradiate light onto the side surface of the light guide plate 102-2.

[0019] Furthermore, a low refractive index layer 108 is provided on the surface of the light guide plate 102-2 on the side facing the liquid crystal layer 180. The low refractive index layer 108 is configured to have a refractive index lower than that of the array substrate 122, the opposing substrate 124, and the light guide plate 102. The low refractive index layer 108 is provided on the light source unit 110 side of the light guide plate 102-1 and overlaps with a portion of the display area. In other words, a portion of the display area on the light source unit 110 side is covered by the low refractive index layer 108, while another portion is exposed from the low refractive index layer 108. Furthermore, a protective film 106 that is transparent to visible light is formed on the light guide plate 102-2 so as to cover the low refractive index layer 108. On the other hand, on the side of the light guide plate 102, array substrate 122, and opposing substrate 124 opposite to the light source unit 110, mirrors 104 are arranged to reflect light emitted from the light source unit 110 so as to cover these sides.

[0020] By adopting this configuration, light incident on the light guide plate 102-1 from the light-emitting element 114 via the side of the light guide plate 102-1 on the light source unit 110 side is repeatedly reflected by the main surfaces of the pair of light guide plates 102-1 and 102-2 due to the refractive index difference between the light guide plate 102 and air, and irradiates the pixels 140 (see the dashed line in Figure 3). In this configuration, the pixels 140 included in the display unit 120 and the light source unit 110 do not overlap in the direction normal to the main surface of the array substrate 122 or the opposing substrate 124. Therefore, by configuring each pixel 140 to transmit visible light to at least a portion of it, the display device 100 can function as a display device that transmits visible light, i.e., a transparent display. Furthermore, by providing a low refractive index layer 108, the critical angle of light incident on the low refractive index layer 108 can be made smaller than the critical angle of light incident on the adhesive layer 188. Therefore, the amount of light totally reflected in the region where the low refractive index layer 108 is provided, that is, on the side of the display area where the light source unit 110 is provided, can be increased, and as a result, a sufficient amount of light can be supplied to the display area on the opposite side of the light source unit 110. With this mechanism, the occurrence of brightness unevenness in the display area can be suppressed and uniform brightness can be ensured throughout the entire display area.

[0021] 2. Pixel configuration Figure 4 shows an equivalent circuit diagram of a single pixel 140. Each pixel 140 has a pixel circuit 142 and a liquid crystal element 170 that functions as a display element. The pixel circuit 142 is electrically connected to a corresponding gate line 132 and a corresponding video signal line 134, and the liquid crystal element 170 is electrically connected to a common line 136 together with the pixel circuit 142. Thus, one gate line 132 is electrically connected to multiple pixel circuits 142 arranged in the row direction, and one video signal line 134 is electrically connected to multiple pixel circuits 142 arranged in the column direction. The common line 136 is electrically connected to the liquid crystal elements 170 of all pixels 140. There are no restrictions on the configuration of the pixel circuit 142; as shown in Figure 4, each pixel circuit 142 can be composed of at least one transistor 150 and a retaining capacitance element 144. In this case, the gate of transistor 150 is electrically connected to the gate line 132, one terminal is electrically connected to the video signal line 134, and the other terminal is electrically connected to one electrode of the retaining capacitance element 144 and the liquid crystal element 170. The other electrode of the retaining capacitance element 144 is electrically connected to a capacitance line (not shown) to which a constant potential is supplied. The other electrode of the retaining capacitance element 144 may also be connected to the common line 136. The configuration of the pixel circuit 142 is not limited to the configuration shown in Figure 4, and each pixel circuit 142 may further have one or more transistors or one or more retaining capacitance elements.

[0022] There are no restrictions on the structure of the liquid crystal element 170. For example, the liquid crystal element 170 may be a so-called TN (Twist Nematic) liquid crystal element or a VA (Vertical Alignment) liquid crystal element. Alternatively, the liquid crystal element 170 may be an IPS (In-Plane Switching) liquid crystal element. As an example, Figure 5 shows a schematic end view of a display unit 120 including one pixel 140 when the liquid crystal element 170 is an IPS liquid crystal element. The elements constituting the pixel circuit 142 (for example, the transistor 150) are provided on the array substrate 122 either directly or via an undercoat 146 of any configuration. In the example shown in Figure 5, the transistor 150 is a top-gate type transistor and has a semiconductor film 152, a gate insulating film 154 covering the semiconductor film 152, a gate electrode 156 overlapping the semiconductor film 152 via the gate insulating film 154, one or more interlayer insulating films 158 covering the gate electrode 156, and a pair of terminals 160, 162 electrically connected to the semiconductor film 152 via openings provided in the interlayer insulating film 158 and the gate insulating film 154.

[0023] A planarization film 166 is provided on the pixel circuit to absorb irregularities caused by transistors 150 and other components, thereby providing a flat surface, and a liquid crystal element 170 is arranged on this planarization film 166. The liquid crystal element 170 has a common electrode 176 provided on the planarization film 166, a pixel electrode 172 electrically connected to terminals 162 and having a comb-shaped upper surface, an inter-electrode insulating film 174 for electrically insulating the pixel electrode 172 and the common electrode 176, a first alignment film 178 on the pixel electrode 172 and the common electrode 176, a liquid crystal layer 180 on the first alignment film 178, and a second alignment film 182 on the liquid crystal layer 180. On the opposing substrate 124 (below the opposing substrate 124 in Figure 5), a light-shielding film 184 is provided so as to overlap with the pixel circuit 142, and an overcoat 148 is provided so as to cover the light-shielding film 184. As described above, since the display device 100 is driven using a field sequential method, light of different colors is not emitted from the light source unit 110 simultaneously. Therefore, there is no need to provide a color filter.

[0024] The structure of transistor 150 is not limited to the structure described above; a bottom-gate type transistor may also be used as transistor 150. Alternatively, as shown in Figure 6, transistor 150 may be a transistor having a pair of gate electrodes 156-1 and 156-2 that sandwich a channel formed in the semiconductor film 152 from above and below. In this case, a first gate insulating film 154-1 is provided between one gate electrode 156-1 and the semiconductor film 152, and a second gate insulating film 154-2 is provided between the semiconductor film 152 and the other gate electrode 156-2. The pair of gate electrodes 156-1 and 156-2 may be electrically connected to each other and at the same potential.

[0025] The undercoat 146, gate insulating film 154, interlayer insulating film 158, interelectrode insulating film 174, and undercoat 146 described above may be composed of one or more films containing silicon-containing inorganic compounds such as silicon oxide or nitrogen oxide. These films are formed using methods such as sputtering or chemical vapor deposition (CVD). The gate electrode 156 and terminals 160, 162 may be composed of metals such as molybdenum, tantalum, titanium, tungsten, aluminum, or copper, or alloys containing metals selected from these metals. The gate electrode 156 and terminals 160, 162 may have a single-layer structure or a multilayer structure. The gate electrode 156 and terminals 160, 162 can also be provided using sputtering or CVD. The pixel electrode 172 and common electrode 176 are composed of conductive oxides such as indium-tin oxide or indium-zinc oxide so as to transmit visible light. This makes the liquid crystal element 170 light-transmitting. The pixel electrodes 172 and the common electrode 176 may be formed using a sputtering method. The first alignment film 178 and the second alignment film 182 contain polymers such as polyimide or polyamide, and their surfaces are rubbed. Alternatively, the first alignment film 178 and the second alignment film 182 may be formed using photo-alignment. In this case, rubbing is not required. This allows for control of the orientation of liquid crystal molecules contained in the liquid crystal layer 180. The light-shielding film 184 may be formed from a metal with low reflectivity to visible light, such as chromium, or from a resin containing a black or nearly black pigment.

[0026] There are no restrictions on the composition of the liquid crystal layer 180; the liquid crystal molecules contained in the liquid crystal layer 180 may be nematic liquid crystals, smectic liquid crystals, cholesteric liquid crystals, or chiral smectic liquid crystals. Alternatively, the liquid crystal layer 180 may be a polymer-dispersed liquid crystal. Since polymer-dispersed liquid crystals can take on both non-scattering and scattering states depending on the applied voltage, applying a polymer-dispersed liquid crystal to the display device 100 shown in Figures 2 and 3 and making the liquid crystal layer 180 a non-scattering state can impart light transmittance to the display device 100. On the other hand, in the scattering state, light can be scattered, so the light propagated by the light guide plates 102-1 and 102 can be scattered and used for display. This makes it possible to construct a transparent display.

[0027] The semiconductor film 152 may be composed of Group 14 elements, such as silicon, or of an oxide semiconductor containing indium. There are no restrictions on the crystallinity of the semiconductor film 152; it may be amorphous or polycrystalline. For example, if the semiconductor film 152 contains or is composed of an oxide semiconductor, it is preferable that the semiconductor film 152 contains indium and other metallic elements. The semiconductor film 152 containing or composed of an oxide semiconductor can be formed by sputtering or atomic layer deposition (ALD). For example, an amorphous oxide semiconductor film is formed using sputtering, and then the semiconductor film 152 is formed by etching. The semiconductor film 152 is then annealed at a high temperature (for example, 300°C to 500°C, or 350°C to 450°C).

[0028] Furthermore, as shown in Figure 7, the transistor 150 may have a metal oxide film 164 in contact with the semiconductor film 152 beneath the semiconductor film 152. The metal oxide film 164 is a film mainly composed of aluminum oxide, and may be composed of aluminum oxide. By forming the metal oxide film 164, hydrogen and oxygen released from the first gate insulating film 154-1 (undercoat 146 in the case of a top-gate type transistor) located beneath the metal oxide film 164 are blocked and their penetration into the semiconductor film 152 containing the oxide semiconductor is suppressed. This prevents a degradation of the transistor 150's characteristics caused by hydrogen trapping in oxygen vacancies in the semiconductor film 152. It also prevents the formation of defect levels generated by an excessive supply of oxygen to the semiconductor film 152. Due to these effects, by providing the metal oxide film 164, it is possible to form a semiconductor film 152 with fewer oxygen vacancies, and thus a transistor 150 with even higher mobility can be fabricated.

[0029] Figure 8 shows a schematic top view of transistor 150. As shown in Figure 8, a portion of the gate line 132 extending from the gate line drive circuit 126 functions as the gate electrode 156 and overlaps with the semiconductor film 152. A portion of the video signal line 134 extending from the signal line drive circuit 128 functions as terminal 160 and is electrically connected to the semiconductor film 152 via a contact hole indicated by a dotted circle. Similar to terminal 160, terminal 162, which is on the same layer as terminal 160, is also electrically connected to the semiconductor film 152. By supplying a potential above a threshold to the gate electrode 156, transistor 150 turns on, and signals such as the video signal supplied to the video signal line 134 are supplied from terminal 160 to terminal 162 via the semiconductor film 152. As a result, a potential corresponding to the video signal is input to the pixel 140.

[0030] The transistor 150 shown in Figure 8 has one channel formed by a single semiconductor film 152, but the transistor 150 may have multiple channels (multi-channel) arranged in parallel to each other. Specifically, as shown in Figure 9, the transistor 150 may have multiple semiconductor films 152 arranged in parallel to each other, each overlapping with the gate electrode 156 and electrically connected to terminals 160 and 162. There is no restriction on the number of semiconductor films 152; for example, they can be appropriately selected from a range of 2 to 6. By providing multiple semiconductor films 152 to form multiple channels, the amount of heat generated when the transistor 150 is driven can be reduced compared to the case where a single semiconductor film 152 with the same width as the total width of the channels is provided, and as a result, the on-resistance of the transistor 150 can be reduced.

[0031] 3. Method for driving the display device Figure 10 shows a timing chart illustrating the driving method of the display device 100. This figure shows the potential changes of all gate lines 132, the potential changes of the common electrode 176, and the states of the red, green, and blue light-emitting elements 114 over three consecutive frame periods (the first frame period, the second frame period, and the third frame period). The total number of gate lines 132 is m (where m is selected from an integer of 2 or more, e.g., 480), and in Figure 10, the potentials of the gate lines 132 range from G1 to G m It is shown as follows. Also, in Figure 10, the potential of the common electrode 176 is V com The states of the red, green, and blue light-emitting elements 114 are shown as RLED, GLED, and BLED, respectively. The light-emitting elements 114 emit light when they are ON and do not emit light when they are OFF. The polarity of the gate potential required to turn a transistor ON or OFF depends on the polarity of the transistor, but below we will explain assuming that when a high potential is input to the gate line 132, the transistor 150 of the pixel circuit 142 connected to it switches to the ON state.

[0032] The length of a single frame can be set arbitrarily according to the refresh rate. For example, the length of a single frame can be set arbitrarily between 1 / 180 second and 1 / 360 second. Alternatively, the length of a single frame can be less than 1 / 360 second.

[0033] (1) Writing period When a frame period begins, first, a video signal is written (input) to all pixels 140. Specifically, as shown in Figure 10, the potential of the gate lines 132 from the first row to the mth row is changed sequentially from low potential to high potential, starting from the first row. This turns on the transistors 150 of the pixel circuit 142 connected to the gate lines 132, starting from the first row. At the same time, the video signal corresponding to the image is supplied to the video signal line 134 for each column. This inputs a video signal to each pixel 140. The period during which a video signal is input to all pixels 140 is the writing period P. w Therefore, the write period P is for one frame period. w The ratio is set to be between 0.14 and 0.71.

[0034] In each row, once the video signal input is complete, the potential of the gate line 132 becomes low, and the transistor 150 switches to the off state, which is then maintained until the next frame period.

[0035] (2) Luminescence period Once the video signal input is complete for all pixels 140, one of the red, green, and blue light-emitting elements 114 is subsequently lit. In the example shown in Figure 10, during the first frame period, multiple red light-emitting elements 114 of the light source unit 110 are turned on, and red light is supplied to all pixels 140. The period during which the light-emitting elements 114 emit light in each frame period is called the emission period Pe. In the driving method according to the embodiment of the present invention, a relatively long emission period Pe is set for each frame period. Specifically, the ratio of the emission period Pe to one frame period is set to 0.25 or more and 0.83 or less. By providing such a long emission period Pe, even when the refresh rate is set high (for example, when the refresh rate is 360 Hz), the time during which the light-emitting elements 114 emit light can be set to be longer. Therefore, the brightness of the display device 100 can be improved. In other words, the power consumption of the display device 100 can be reduced.

[0036] When the light emission period Pe ends, the light-emitting element 114 is turned off, and then the potential V applied to the common electrode 176 is turned off. com The polarity of the light source is reversed relative to the potential of the pixel electrode 172 (i.e., the potential of the video signal). This marks the end of one frame period and transitions to the next frame period (the second frame period). The same operation is performed in the second frame period. However, the light-emitting element 114 that emits light in the second frame period is different from the light-emitting element 114 that emitted light in the first frame period. That is, one of the remaining red, green, and blue light-emitting elements 114 is selected and emits light. In the example shown in Figure 10, multiple green light-emitting elements 114 emit light during the emission period Pe. The same applies to the third frame period that follows the second frame period, where one of the remaining red, green, and blue light-emitting elements 114 is selected and emits light. In the example shown in Figure 10, multiple blue light-emitting elements 114 emit light during the emission period Pe.

[0037] As mentioned above, the writing period P wis set to be 0.14 or more and 0.71 or less for one frame period. Therefore, for example, when the refresh rate is 360 Hz, that is, one frame period is 2.78 ms, the writing period P w can be suppressed to a relatively short period of about 1.2 ms to 1.3 ms. Further, each transistor 150 is maintained in an off state until the next frame period after the input of the video signal to the pixel 140 is completed. For example, there is no need to provide a period (referred to as a refresh period, a period in which all the transistors 150 are turned on and a potential corresponding to 0 gradation is applied to the pixel electrode 172) for black display in order to refresh all the transistors 150 after the light emission period Pe. Therefore, in each frame period, the period during which a high potential for turning on the transistor 150 is applied to the gate electrode 156 is the period obtained by dividing the writing period P w by the number of gate lines 132, and although it also depends on the number of gate lines 132, it is about several μs. This value is extremely short compared with the refresh period (about 200 μs to 300 μs in each row) set in the conventional display device. Therefore, deterioration (enhancement shift of the threshold voltage, decrease in on-current, generation of dark spots due to these, etc.) caused by applying a high potential to the gate electrode 156 can be effectively suppressed. In particular, when the potential applied to the gate electrode 156 for turning on the transistor 150 is high (for example, when polymer-dispersed liquid crystal is used as the liquid crystal layer 180), by applying this driving method, deterioration of the transistor 150 can be effectively suppressed, and as a result, it becomes possible to provide a highly reliable display device.

[0038] (3) Response period As an arbitrary configuration, in each frame period, a period for the liquid crystal molecules to shift to the alignment state corresponding to the video signal may be provided. Specifically, as shown in FIG. 11, a certain period may be provided after the input of the video signal to all the pixels 140 is completed and before the light emission period Pe starts. This period is called the response period P r and is called. The response period P rThis should be set to between 0.1 and 0.5 for each frame period. Therefore, the response period P r Even if a sufficiently long luminescence period P is provided, e This ensures that a low power consumption display device can be provided.

[0039] Furthermore, as mentioned above, this driving method does not provide a refresh period. Therefore, if video signals with different potentials are input to pixel 140 during consecutive frame periods, depending on the response speed of the liquid crystal molecules, the liquid crystal molecules may not be able to transition to the orientation state corresponding to the video signal. However, the response period P r By providing this feature, the liquid crystal molecules can accurately assume an orientation state corresponding to the potential of the video signal input in each frame period, without depending on the potential of the video signal in the previous frame period. As a result, each pixel 140 can accurately provide light with the corresponding gradation to the video signal, preventing a decrease in display quality, such as a white float.

[0040] 4. Capacitance adjustment of retaining capacitance element As described above, each pixel 140 is provided with a liquid crystal element 170 and a retaining capacitance element 144. The capacitance Cs of the retaining capacitance element 144 is determined by the area of ​​a pair of electrodes, the distance between them, and the dielectric constant of the dielectric material provided between the pair of electrodes, and is constant regardless of the potential of the video signal. On the other hand, the liquid crystal element 170 is also a type of capacitance element, and its capacitance Clc is determined by the area of ​​the pixel electrode 172 and the common electrode 176, the distance between them, and the dielectric constant of the liquid crystal layer 180. However, the dielectric constant of the liquid crystal layer 180 changes depending on the orientation state of the liquid crystal molecules. Therefore, the capacitance Clc of the liquid crystal element 170 changes depending on the potential of the video signal. The total capacitance (pixel capacitance) of each pixel 140 is the sum of capacitance Cs and capacitance Clc. Therefore, the pixel capacitance of each pixel 140 at the end of a frame period changes depending on the potential of the video signal input during that frame period. As a result, Clc changes depending on the pixel voltage of the previous frame, so each frame is affected by the potential of the video signal of the previous frame, which can cause unevenness in the image and degrade display quality.

[0041] However, because transistor 150 has extremely high mobility and low on-resistance, the capacitance Cs of the retaining capacitance element 144 connected to transistor 150 can be increased without affecting the time constant of pixel 140. As a result, the proportion of capacitance Clc to the pixel capacitance can be reduced. This relatively reduces the contribution of capacitance Clc and mitigates the influence of the video signal potential during the previous frame period.

[0042] For example, the capacitance Cs of the retaining capacitance element 144 can be increased. This can be done, for example, by increasing the area of ​​the retaining capacitance element 144. This makes it possible to significantly increase the contribution of capacitance Cs to the pixel capacitance while maintaining the time constant of the pixel 140. Furthermore, by providing the metal oxide film 164 (see Figure 7), the mobility of the transistor 150 is further improved, so the capacitance Cs of the retaining capacitance element 144 can be further increased without affecting the time constant of the pixel 140. As a result, the influence of capacitance Clc can be reduced.

[0043] Furthermore, as shown in Figure 9, the on-resistance can be further reduced by using a multi-channel transistor 150. This allows for a further increase in capacitance Cs without affecting the time constant of the pixel 140, thereby increasing the contribution of capacitance Cs to the pixel capacitance. Although it depends on the size of the retaining capacitance element 144, the distance between electrodes, and the dielectric constant of the dielectric, it is possible to increase the contribution of capacitance Cs to the pixel capacitance by approximately twofold compared to the case where a conventional transistor containing an oxide semiconductor is used as transistor 150.

[0044] Thus, in the liquid crystal element and its driving method according to one embodiment of the present invention, by appropriately selecting the configuration of the transistor 150, it is possible not only to reduce power consumption and improve reliability, but also to reduce or eliminate the effects of not providing a refresh period. For this reason, by applying the embodiment of the present invention, it is possible to provide a highly reliable display device that has low power consumption and ensures display quality.

[0045] The embodiments described above as embodiments of the present invention can be combined and implemented as appropriate, insofar as they do not contradict each other. Furthermore, any additions, deletions, or design changes to components, or additions, omissions, or changes to processes based on these embodiments, made by those skilled in the art, are also included within the scope of the present invention, as long as they retain the essence of the present invention.

[0046] Any effects or benefits other than those brought about by the embodiments described above, if they are clear from the description herein or easily predictable to a person skilled in the art, are naturally considered to be brought about by the present invention. [Explanation of symbols]

[0047] 100: Display device, 102: Light guide plate, 104: Mirror, 106: Protective film, 108: Low refractive index layer, 110: Light source unit, 112: Light source substrate, 114: Light-emitting element, 116: Light source drive circuit, 120: Display unit, 122: Array substrate, 124: Opposing substrate, 126: Gate line drive circuit, 128: Signal line drive circuit, 130: Terminal, 132: Gate line, 134: Video signal line, 136: Common line, 140: Pixel, 142: Pixel circuit, 144: Holding capacitance element, 146: Undercoat, 148: Overcoat, 150: Transistor, 152: Semiconductor film, 154: Gate insulating film, 154-1: First gate insulating film, 154-2: Second gate insulating film, 156: Gate electrode, 156-1: Gate electrode, 156-2: Gate electrode, 158: Interlayer insulating film, 160: Terminal, 162: Terminal, 164: Metal oxide film, 166: Planarization film, 170: Liquid crystal element, 172: Pixel electrode, 174: Interelectrode insulating film, 176: Common electrode, 178: First alignment film, 180: Liquid crystal layer, 182: Second alignment film, 184: Light-shielding film, 186: Encapsulating material, 188: Adhesive layer

Claims

1. A method for driving a display device comprising a plurality of pixels, each having a transistor and a liquid crystal element electrically connected to the transistor, and a red light-emitting element, a green light-emitting element, and a blue light-emitting element configured to illuminate the plurality of pixels with light. During the first frame period, Inputting a video signal to the aforementioned multiple pixels, After the input of the video signal to the plurality of pixels, one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element is turned on, and A driving method comprising keeping the transistors of the plurality of pixels in an off state after the input of the video signal to the plurality of pixels until the start of a second frame period following the first frame period.

2. The liquid crystal element has a pixel electrode, a common electrode, and a liquid crystal layer. The driving method according to claim 1, further comprising, during the first frame period, turning off one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element, and then reversing the polarity of the potential of the common electrode with respect to the potential applied to the pixel electrode.

3. The driving method according to claim 1, wherein the ratio of the period during which one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element is lit to the first frame period is 0.25 or more and 0.83 or less.

4. The driving method according to claim 1, wherein the ratio of the period from when the input of the video signal to the plurality of pixels is completed to when one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element is lit to the first frame period is 0.1 or more and 0.5 or less.

5. During the second frame period described above, Inputting the video signal to the aforementioned plurality of pixels, After the input of the video signal to the plurality of pixels, the red light-emitting element, the green light-emitting element, and one other of the blue light-emitting elements are turned on, and The driving method according to claim 1, comprising keeping the transistors of the plurality of pixels in an off state after the input of the video signal to the plurality of pixels until the start of a third frame period following the second frame period.

6. The driving method according to claim 1, wherein the transistor further comprises a metal oxide film in contact with the at least one semiconductor film.

7. The driving method according to claim 6, wherein the metal oxide film contains or consists of aluminum oxide.

8. The driving method according to claim 1, wherein the at least one semiconductor film includes a plurality of semiconductor films arranged parallel to each other.

9. The display device further comprises an array substrate, The plurality of pixels are arranged on the array substrate, The driving method according to claim 1, wherein the red light-emitting element, the green light-emitting element, and the blue light-emitting element are exposed from the plurality of pixels in the direction normal to the main surface of the array substrate.

10. Each of the multiple pixels has a transistor and a liquid crystal element electrically connected to the transistor. A drive circuit that controls the plurality of pixels, A red light-emitting element, a green light-emitting element, and a blue light-emitting element configured to illuminate the plurality of pixels with light, The system includes a light source driving circuit that controls the red light-emitting element, the green light-emitting element, and the blue light-emitting element, The drive circuit is configured to input a video signal to the plurality of pixels during the first frame period. The light source driving circuit is configured to light up one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element after the input of the video signal to the plurality of pixels during the first frame period. The drive circuit is further configured to keep the transistors of the plurality of pixels in the OFF state during the first frame period until the start of a second frame period following the first frame period, in a display device.

11. The liquid crystal element has a pixel electrode, a common electrode, and a liquid crystal layer. The display device according to claim 10, wherein the drive circuit is further configured to reverse the polarity of the potential of the common electrode with respect to the potential applied to the pixel electrode after one of the red light-emitting element, the green light-emitting element, and the blue light-emitting element is turned off during the first frame period.

12. The display device according to claim 10, wherein the transistor further comprises a metal oxide film in contact with the at least one semiconductor film.

13. The display device according to claim 12, wherein the metal oxide film contains or consists of aluminum oxide.

14. The display device according to claim 10, wherein the at least one semiconductor film includes a plurality of semiconductor films arranged parallel to each other.

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