Glass substrates for semiconductors

By controlling the weight distribution of holes in semiconductor glass substrates within specific ranges, warping is suppressed, maintaining substrate flatness and stability.

JP2026094511APending Publication Date: 2026-06-10AGC INC

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
AGC INC
Filing Date
2023-04-03
Publication Date
2026-06-10

AI Technical Summary

Technical Problem

Semiconductor glass substrates warp due to uneven weight distribution caused by hole formation during manufacturing.

Method used

The glass substrate is designed such that the weight of glass removed during hole formation in each quadrant is maintained between 70% and 130% of the average weight, with appropriate distribution and arrangement of holes, and optionally using dummy holes to balance weight distribution.

Benefits of technology

This approach effectively suppresses warping of the semiconductor glass substrate, ensuring flatness and stability.

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Abstract

We provide technology to suppress warping of glass substrates for semiconductors. [Solution] The semiconductor glass substrate has a first main surface and a second main surface facing the opposite direction to the first main surface, and a wiring layer is planned to be formed on at least one of the first main surface and the second main surface. The semiconductor glass substrate has a plurality of holes formed on at least one of the first main surface and the second main surface. When the glass substrate is divided into four small pieces by two straight lines that are perpendicular to the center of the first main surface and divide the first main surface into four equal parts, the weight of glass removed in each small piece due to the formation of the holes is 70% to 130% of the average weight.
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Description

[Technical Field]

[0001] This disclosure relates to glass substrates for semiconductors. [Background technology]

[0002] In recent years, there has been progress in developing technology for mounting multiple semiconductor chips on an insulating substrate and electrically connecting these multiple semiconductor chips. Glass substrates and resin substrates are being considered as insulating substrates. Glass substrates offer superior flatness, thermal stability, and insulation compared to resin substrates. A glass substrate has a first main surface and a second main surface facing the opposite direction to the first main surface, and has holes formed in at least one of the first and second main surfaces. Electrodes, for example, are intended to be embedded in these holes (see, for example, Patent Documents 1-3). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2018-188351 [Patent Document 2] Patent No. 7014068 [Patent Document 3] Japanese Patent Publication No. 2012-019106 [Overview of the project] [Problems that the invention aims to solve]

[0004] Semiconductor glass substrates have numerous holes. The number and arrangement of these holes are selected as appropriate depending on the wiring pattern and other factors. If there is an uneven distribution of the weight of the glass removed during hole formation, the semiconductor glass substrate will warp.

[0005] One aspect of this disclosure provides a technology for suppressing warping of a semiconductor glass substrate. [Means for solving the problem]

[0006] A semiconductor glass substrate according to one aspect of the present disclosure has a first main surface and a second main surface facing the opposite direction to the first main surface, and a wiring layer is planned to be formed on at least one of the first main surface and the second main surface. The semiconductor glass substrate has a plurality of holes formed on at least one of the first main surface and the second main surface. When the glass substrate is divided into four small pieces by two straight lines that are perpendicular to the center of the first main surface and divide the first main surface into four equal parts, the weight of glass removed in each small piece by the formation of the holes is 70% or more and 130% or less of the average weight. [Effects of the Invention]

[0007] According to one aspect of this disclosure, warping of a semiconductor glass substrate can be suppressed. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is a plan view showing the first main surface of a glass substrate according to one embodiment. [Figure 2] Figure 2 is a plan view showing the second main surface of a glass substrate according to one embodiment. [Figure 3] Figure 3 is a cross-sectional view showing a glass substrate according to one embodiment. [Figure 4] Figure 4 is a plan view showing an example of measurement point d. [Modes for carrying out the invention]

[0009] The embodiments for implementing this disclosure will be described below with reference to the drawings. In each drawing, the same or corresponding components will be denoted by the same reference numeral, and their descriptions may be omitted. In the specification, the numeral "~" indicating a numerical range means that the numbers written before and after it are included as the lower and upper limits, respectively.

[0010] Referring to FIGS. 1 to 4, a glass substrate 10 for a semiconductor according to an embodiment will be described. Hereinafter, the glass substrate 10 for a semiconductor may also be simply referred to as the glass substrate 10. The glass substrate 10 is used as a substrate for semiconductor mounting in this embodiment, but may also be used as a substrate for passive elements or a probe guard substrate.

[0011] As shown in FIG. 3, the glass substrate 10 has a first main surface 11 and a second main surface 12 opposite to the first main surface 11. Wiring layers 21 and 22 are planned to be formed on at least one of the first main surface 11 and the second main surface 12. The wiring layer 21 is formed on the first main surface 11, and the wiring layer 22 is formed on the second main surface 12. The first main surface 11 and the second main surface 12 have a rectangular shape in this embodiment, but may have a circular shape. Note that a rectangle includes a square.

[0012] The glass substrate 10 has higher rigidity than a resin substrate. Therefore, even when the areas of the first main surface 11 and the second main surface 12 are large, warpage can be reduced. The areas of the first main surface 11 and the second main surface 12 are, for example, 1.0×10 2 mm 2 ~5.0×10 5 mm 2 and preferably 7.0×10 3 mm 2 ~3.0×10 5 mm 2 respectively.

[0013] The glass material of the glass substrate 10 is not particularly limited, and is, for example, non-alkali glass, quartz glass, or photosensitive glass. The glass material of the glass substrate 10 preferably has an average linear expansion coefficient of 0.5×10 -6 / °C to 13.0×10 -6 / °C at 5°C to 200°C. If the average linear expansion coefficient is within the above range, peeling of the wiring layers 21 and 22 can be suppressed.

[0014] The average value dave of the thickness d of the glass substrate 10 is, for example, from 0.05 mm to 2.0 mm. The smaller dave is, the easier it is to process the holes 13. Also, the smaller dave is, the more possible it is to thin the semiconductor device. Dave is preferably from 0.1 mm to 1.5 mm, and more preferably from 0.2 mm to 1.2 mm.

[0015] The thickness d of the glass substrate 10 is measured, for example, at 10 measurement points P1 shown in FIG. 4. The 10 measurement points P1 are arranged so as to equally divide the remaining range of the line segment L3, excluding the range A within 10 mm from both ends of the line segment L3. When the shape of the first main surface 11 is rectangular, the line segment L3 is the diagonal of the rectangle. Note that when the shape of the first main surface 11 is circular, the line segment L3 is the diameter of the circle and passes through the orientation flat or notch of the glass substrate 10.

[0016] As shown in FIG. 3, the glass substrate 10 has holes 13 formed in at least one of the first main surface 11 and the second main surface 12. The holes 13 are through holes formed to penetrate both the first main surface 11 and the second main surface 12 in the present embodiment, but may be non-through holes (bottomed holes) formed only in one of the first main surface 11 and the second main surface 12. Also, both through holes and non-through holes may be formed in a mixed manner.

[0017] At least one of the holes 13 is, for example, planned to be embedded with an electrode that is electrically connected to at least one of the wiring layer 21 and the wiring layer 22. When the glass substrate 10 is used as an interposer, at least one of the holes 13 is a through hole, and a through electrode is planned to be embedded in the through hole. The through electrode electrically connects the wiring layer 21 and the wiring layer 22.

[0018] Note that at least one of the holes 13 may be a dummy hole in which no electrode is planned to be embedded. The dummy hole is formed for the purpose of reducing the weight of the glass substrate 10 or preventing warping of the glass substrate 10. In order to distinguish a hole in which an electrode is planned to be embedded from a dummy hole, it may be hereinafter referred to as an electrode hole.

[0019] In this embodiment, hole 13 is a straight hole, as shown in Figure 3. A straight hole has a constant diameter regardless of its depth from the first main surface 11 or the second main surface 12. Alternatively, hole 13 may be a tapered hole. In a tapered hole, the diameter decreases as the depth from the first main surface 11 or the second main surface 12 increases.

[0020] Although not shown in the diagram, hole 13 may have a constriction in the middle and have two tapered holes flanking the constriction. One tapered hole has a diameter that decreases as the depth from the first main surface 11 increases. The other tapered hole has a diameter that decreases as the depth from the second main surface 12 increases. Alternatively, hole 13 may be a combination of a tapered hole and a straight hole.

[0021] If hole 13 is a through hole and a straight hole, the opening diameter D1 of hole 13 on the first main surface 11 and the opening diameter D2 of hole 13 on the second main surface 12 are the same. Note that hole 13 does not have to be a straight hole, and the opening diameters D1 and D2 do not have to be the same. Either opening diameter D1 or D2 may be larger.

[0022] The opening diameter D1 of the holes 13 in the first main surface 11 is, for example, 10 μm to 300 μm. Preferably, the opening diameter D1 is 20 μm to 200 μm, and more preferably 50 μm to 100 μm. Holes 13 with different opening diameters D1 may be mixed on the first main surface 11.

[0023] Similarly, the opening diameter D2 of the holes 13 on the second main surface 12 is, for example, 10 μm to 300 μm. Preferably, the opening diameter D2 is 20 μm to 200 μm, and more preferably 50 μm to 100 μm. Holes 13 with different opening diameters D2 may be mixed on the second main surface 12.

[0024] In both the first main surface 11 and the second main surface 12, the shape of the opening of the hole 13 is preferably circular from the viewpoint of machinability. However, the shape of the opening of the hole 13 is not limited to circular, and may be elliptical or polygonal, etc. The equivalent circular diameter of the opening of the hole 13 should be between 10 μm and 300 μm.

[0025] The ratio of the opening area of ​​the holes 13 on the first main surface 11 to the total area of ​​the first main surface 11 is, for example, 0.001% to 90%, preferably 0.07% to 80%, and more preferably 0.75% to 40%. Here, the total area of ​​the first main surface 11 includes the area where there are no holes 13 and the area where there are holes 13. In other words, the total area of ​​the first main surface 11 includes the opening area of ​​the holes 13 on the first main surface 11.

[0026] Similarly, the ratio of the opening area of ​​the holes 13 in the second main surface 12 to the total area of ​​the second main surface 12 is, for example, 0.001% to 90%, preferably 0.07% to 80%, and more preferably 0.75% to 40%. Here, the total area of ​​the second main surface 12 includes both the area without holes 13 and the area with holes 13. In other words, the total area of ​​the second main surface 12 includes the opening area of ​​the holes 13 in the second main surface 12.

[0027] The number and arrangement of the holes 13 are not limited to those shown in Figures 1 and 2. While the holes 13 are arranged in a matrix in Figures 1 and 2, they may also be arranged in a staggered pattern or randomly. The number and arrangement of the holes 13, particularly the number and arrangement of the electrode holes, are appropriately selected depending on the wiring patterns of the wiring layers 21 and 22.

[0028] The method for processing the hole 13 may be a general method, but in this embodiment, it is an ablation process. In an ablation process, the glass is locally evaporated or sublimated at the point of irradiation of the laser beam, and the glass is locally removed. Compared to drilling, the occurrence of defects can be suppressed. Defects include, for example, cracks or fissures.

[0029] The light source for ablation processing may be either a CW (Continuous Wave) laser or a pulsed laser, but a pulsed laser is preferred. Examples of pulsed lasers include CO2 lasers, YAG lasers, UV lasers, or ArF excimer lasers. The pulsed laser may also be a femtosecond laser or a picosecond laser.

[0030] The method for processing the holes 13 may be a general method as described above. For example, the method for processing the holes 13 may be drilling, etching, or blasting. Laser processing and etching may be combined. Laser processing creates a modified area by modifying a part of the glass substrate, and etching preferentially etches the modified area.

[0031] After processing the holes 13, an annealing treatment may be performed. The annealing treatment is a process that removes residual stress in the glass substrate 10 by heating the glass substrate 10.

[0032] The glass substrate 10 preferably satisfies the following requirement (A): (A) When the glass substrate 10 is divided into four small pieces 31-34 by two straight lines L1 and L2 that are perpendicular to the center of the first main surface 11 and divide the first main surface 11 into four equal parts, the weight of glass removed by the formation of holes 13 in each small piece 31-34 is 70% or more and 130% or less of the average weight. If the shape of the first main surface 11 is rectangular, the straight lines L1 and L2 are lines parallel to one of the sides of the rectangle. If the shape of the first main surface 11 is circular, the straight lines L1 and L2 are the diameters of the circle, and one of the straight lines L1 or L2 passes through the orientation flat or notch of the glass substrate 10.

[0033] Hereinafter, the weight of glass removed by the formation of the hole 13 in piece 31 will be denoted as M1. Similarly, the weight of glass removed by the formation of the hole 13 in piece 32 will be denoted as M2. Furthermore, the weight of glass removed by the formation of the hole 13 in piece 33 will be denoted as M3. And finally, the weight of glass removed by the formation of the hole 13 in piece 34 will be denoted as M4. The average of M1, M2, M3, and M4 will be denoted as Mave.

[0034] M1, M2, M3, and M4 are preferably 70% to 130% of Mave. In other words, it is preferable that all of the following equations (1) to (4) hold true. 0.70 × Mave ≤ M1 ≤ 1.30 × Mave···(1), 0.70 × Mave ≤ M2 ≤ 1.30 × Mave ···(2), 0.70 × Mave ≤ M3 ≤ 1.30 × Mave ···(3), 0.70 × Mave ≤ M4 ≤ 1.30 × Mave···(4).

[0035] If all of the above equations (1) to (4) are true, the bias of the holes 13 will be small, and the warping of the glass substrate 10 due to the formation of the holes 13 can be suppressed. M1, M2, M3, and M4 are preferably 70% to 130% of Mave, more preferably 80% to 120% of Mave, even more preferably 90% to 110% of Mave, and particularly preferably 95% to 105% of Mave.

[0036] As described above, at least one hole 13 is an electrode hole. Hereinafter, in small piece 31, the weight of glass removed due to the formation of the electrode hole will be denoted as m1. In small piece 32, the weight of glass removed due to the formation of the electrode hole will be denoted as m2. Furthermore, in small piece 33, the weight of glass removed due to the formation of the electrode hole will be denoted as m3. Furthermore, in small piece 34, the weight of glass removed due to the formation of the electrode hole will be denoted as m4. The average of m1, m2, m3, and m4 will be denoted as mave.

[0037] It is preferable that m1, m2, m3, and m4 are each between 70% and 130% of mave. In other words, it is preferable that all of the following equations (5) to (8) hold true. 0.70 × mave ≤ m1 ≤ 1.30 × mave ···(5), 0.70 × mave ≤ m² ≤ 1.30 × mave ···(6), 0.70 × mave ≤ m3 ≤ 1.30 × mave ···(7), 0.70 × mave ≤ m4 ≤ 1.30 × mave ... (8).

[0038] If all of the above equations (5) to (8) are true, the bias of the electrode holes will be small, and warping of the glass substrate 10 due to the formation of electrode holes can be suppressed. m1, m2, m3, and m4 are preferably 70% to 130% of mave, more preferably 80% to 120% of mave, even more preferably 90% to 110% of mave, and particularly preferably 95% to 105% of mave.

[0039] If all of the above equations (5) to (8) are true, then even if all of the holes 13 are electrode holes, equations (1) to (4) will still be true. Therefore, if all of the above equations (5) to (8) are true, dummy holes are not necessary. However, as stated above, the number and arrangement of electrode holes are appropriately selected according to the wiring patterns of the wiring layers 21 and 22. Therefore, it is possible that one or more of the above equations (5) to (8) may not be true.

[0040] Therefore, if one or more of the above equations (5) to (8) are not satisfied, dummy holes may be formed such that all of the above equations (1) to (4) are satisfied. Dummy holes are formed in one or more of the four small pieces 31 to 34. Dummy holes only need to be formed in the small piece of the four small pieces 31 to 34 in which the weight of glass removed by the formation of electrode holes is smallest. Dummy holes may also be formed in all of the four small pieces 31 to 34.

[0041] However, it is preferable that dummy holes are not formed in all four small pieces 31 to 34. In other words, it is preferable that one or more of the four small pieces 31 to 34 do not have dummy holes. This can suppress the unnecessary increase in the number of dummy holes and shorten the time required for processing the dummy holes. As described above, dummy holes only need to be formed in at least one of the four small pieces 31 to 34 in which the weight of glass removed by the formation of the electrode holes is smallest. [Examples]

[0042] The experimental data will be explained below.

[0043] In Examples 1-1 and 1-2, semiconductor glass substrates were fabricated under the same conditions, except for those shown in Table 1. Specifically, a glass substrate was prepared, and 400,000 through-holes were formed in the prepared glass substrate by ablation. The glass material of the glass substrate was alkali-free glass. The first and second main surfaces were squares with sides of 500 mm. The average thickness of the glass substrate was 300 μm. An ArF excimer laser system (Coherent, product name: LPX Pro 305) was used to form the through-holes. This system had a laser beam wavelength of 193 nm, a maximum pulse energy of 0.6 J, a repetition frequency of 50 Hz, and a pulse width of 25 ns. The ArF excimer laser system formed through-holes extending from the first main surface to the second main surface by irradiating the first main surface of the glass substrate with the laser beam. The average aperture diameter of the through-holes was 200 μm. Example 1-1 is an example, and Example 1-2 is a comparative example.

[0044] [Table 1] In Examples 1-1 and 1-2, measurements of M1, M2, M3, and M4, as well as warpage, were performed after the formation of the through-holes. M1, M2, M3, and M4 were determined as the weight difference of the small pieces before and after the formation of the through-holes. The weight of the small pieces after the formation of the through-holes was measured. The weight of the small pieces before the formation of the through-holes was calculated from the outer dimensions of the pieces and the density of the glass. Warpage was measured in the area where the through-holes had not been formed, using a warpage measuring device (SURFCOM 1400G-LCD, manufactured by Tokyo Seimitsu Co., Ltd.) before dividing the glass substrate into four small pieces. Warpage can also be measured by measuring the maximum gap between the surface plate and the bottom surface of the glass substrate placed on the surface plate using a gap gauge. In Table 1, "○" means that the warpage was 500 μm or less, and "×" means that the warpage exceeded 500 μm.

[0045] As shown in Table 1, according to Example 1-1, unlike Example 1-2, the requirement of (A) above is met, so the warping was small.

[0046] In Examples 2-1 and 2-2, semiconductor glass substrates were fabricated under the same conditions, except for the conditions shown in Table 2. Specifically, glass substrates were prepared, and 10,000 through-holes were formed in the prepared glass substrates by ablation. The glass material of the glass substrates was alkali-free glass. The first and second main surfaces were squares with sides of 300 mm. The average thickness of the glass substrates was 300 μm. An ArF excimer laser system (Coherent, product name: LPX Pro 305) was used to form the through-holes. This system had a laser beam wavelength of 193 nm, a maximum pulse energy of 0.6 J, a repetition frequency of 50 Hz, and a pulse width of 25 ns. The ArF excimer laser system formed through-holes extending from the first main surface to the second main surface by irradiating the first main surface of the glass substrate with the laser beam. The average aperture diameter of the through-holes was 200 μm. Example 2-1 is an example, and Example 2-2 is a comparative example.

[0047] [Table 2] In Examples 2-1 and 2-2, after the formation of the through holes, measurements of M1, M2, M3, and M4, as well as warpage, were performed in the same manner as in Examples 1-1 and 1-2. In Table 2, "○" indicates that the warpage was 500 μm or less, and "×" indicates that the warpage exceeded 500 μm.

[0048] As shown in Table 2, according to Example 2-1, unlike Example 2-2, the requirement of (A) above is met, so the warping was small.

[0049] The semiconductor glass substrate described above is not limited to the embodiments described herein. Various changes, modifications, substitutions, additions, deletions, and combinations are possible within the scope of the claims. These also naturally fall within the technical scope of this disclosure. [Explanation of symbols]

[0050] 10 Glass substrate 11. First Main Surface 12 Second Main Surface 13 holes 14 Identification Marks

Claims

[Claim 1] A semiconductor glass substrate having a first main surface and a second main surface facing the opposite direction to the first main surface, wherein a wiring layer is planned to be formed on at least one of the first and second main surfaces, It has a plurality of holes formed in at least one of the first main surface and the second main surface, When the glass substrate is divided into four small pieces by two straight lines that are perpendicular to the center of the first main surface and divide the first main surface into four equal parts, the weight of glass removed in each small piece by the formation of the holes is 70% to 130% of the average weight. Semiconductor glass substrate.