High-frequency devices and multiplexers

Abstract

To provide a high-frequency device, etc., that can suppress the occurrence of unwanted losses in high-frequency signals. [Solution] The high-frequency device 1 comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the first surface 31 of the substrate 30. The substrate 30 has a signal electrode 33, a signal line 34a, a lead line 34b, a reference potential electrode 35, and an inductor 40. The signal electrode 33 is provided on the second surface 32 and is conductive to the functional element 13 of the chip component 10 via the signal line 34a. The lead line 34b has one end e1 and the other end e2. One end 41 of the inductor 40 is connected to the other end e2 of the lead line 34b, and the other end 42 of the inductor 40 is connected to the reference potential electrode 35. One end e1 of the lead line 34b is connected to the signal electrode 33 or the signal line 34a on the second surface 32 side of the one end 41 of the inductor 40.

Description

Technical Field

[0006] , , , ,

[0001] The present invention relates to a high-frequency device and a multiplexer.

Background Art

[0002] Conventionally, as a high-frequency device provided in a mobile communication device or the like, a high-frequency device including a filter and an inductor is known. Patent Document 1 discloses a high-frequency device including a chip component mounted on a substrate and an inductor formed in the substrate. In this high-frequency device, a high-frequency signal input to the substrate is input to the filter of the chip component through a line in the substrate.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a conventional high-frequency device, there is a problem that a large current flows through a line in a substrate, and unnecessary loss occurs in a high-frequency signal.

[0005] The present invention has been made to solve the above problems, and provides a high-frequency device or the like that can suppress the occurrence of unnecessary loss in a high-frequency signal. ​​​​​To achieve the above objective, a high-frequency device according to one aspect of the present invention comprises a substrate having a first surface and a second surface, and a chip component mounted on the first surface of the substrate, wherein the substrate has a signal electrode, a signal line, a lead line, a reference potential electrode, and an inductor, the signal electrode is provided on the second surface and conducts to the functional element of the chip component via the signal line, the lead line has one end and the other end which are both ends of the lead line, one end of the inductor is connected to the other end of the lead line, the other end of the inductor is connected to the reference potential electrode, and one end of the lead line is connected to the signal electrode or the signal line on the second surface side of the one end of the inductor.

[0007] A multiplexer according to one aspect of the present invention includes the above-mentioned high-frequency device. [Effects of the Invention]

[0008] According to the high-frequency device of the present invention, it is possible to suppress the occurrence of unwanted losses in high-frequency signals. [Brief explanation of the drawing]

[0009] [Figure 1] This diagram schematically shows a cross-section of a comparative high-frequency device. [Figure 2] This is a circuit diagram of a high-frequency device according to an embodiment. [Figure 3] This figure schematically shows a cross-section of a high-frequency device according to an embodiment. [Figure 4] This figure shows the circuit patterns formed on the substrate sheets of each layer of the high-frequency device according to the embodiment. [Figure 5] This figure shows the insertion loss of high-frequency devices in embodiments and comparative examples. [Figure 6] This is a circuit diagram of a high-frequency device according to a modified example 1 of the embodiment. [Figure 7] This figure schematically shows a cross-section of a high-frequency device according to a modified example 1 of the embodiment. [Figure 8]This figure shows the insertion loss of a high-frequency device for a modified example 1 of the embodiment and an comparative example. [Figure 9] This figure schematically shows a cross-section of a high-frequency device according to a modified example 2 of the embodiment. [Figure 10] This figure schematically shows a cross-section of a high-frequency device according to a modified example 3 of the embodiment. [Figure 11] This figure schematically shows a cross-section of a high-frequency device according to a modified example 4 of the embodiment. [Figure 12] This figure schematically shows a cross-section of a high-frequency device according to a modified example 5 of the embodiment. [Modes for carrying out the invention]

[0010] (Background to the present invention) The background leading to this invention will be explained with reference to Figure 1.

[0011] Figure 1 is a schematic diagram showing a cross-section of the comparative high-frequency device 101.

[0012] The comparative example high-frequency device 101 comprises a substrate 130 and a chip component 10 mounted on the substrate 130. The area around the chip component 10 is sealed with resin 19.

[0013] The chip component 10 has a functional element 13 formed by a base material 14 and a functional electrode 16, and a functional element 13a formed by a base material 14 and a functional electrode 16a. The chip component 10 also has a conductor portion 15 and terminal electrodes 18. The conductor portion 15 is composed of functional electrodes 16, 16a and wiring electrodes 17 formed on the main surface of the base material 14. The conductor portion 15 is provided on the first opposing surface 11 of the chip component 10. The conductor portion 15 is electrically connected to the internal conductor of the substrate 130 via bump electrodes 50.

[0014] The substrate 130 has a signal electrode 133, a first line 134 connected to the signal electrode 133, a ground electrode 135, a second line 136 connected to the ground electrode 135, and an inductor 140. The first line 134 has a signal line 134a and a lead-out line 134b.

[0015] The signal electrode 133 is electrically connected to the functional elements 13 and 13a of the chip component 10 via the signal line 134a. One end 141 of the inductor 140 is connected to the signal electrode 133 via the lead-out line 134b and a part of the signal line 134a. The other end 142 of the inductor 140 is connected to the ground electrode 135 via the second line 136.

[0016] In the comparative example, the lead-out line 134b is drawn out horizontally from one end 141 of the inductor 140 and connected to the signal line 134a at the same height position as one end 141. Therefore, the distance from the point (connection point c1) where the signal line 134a is connected to the signal electrode 133 to the point (connection point c2) where the lead-out line 134b is connected to the signal line 134a becomes long. As a result, a large current flows through the signal line 134a from the connection point c1 to the connection point c2, and there is a problem that unnecessary loss occurs in the high-frequency signal.

[0017] On the other hand, the high-frequency device of the present embodiment has a configuration for suppressing a large current from flowing through the signal line in the substrate. Thereby, it is possible to suppress unnecessary loss from occurring in the high-frequency signal.

[0018] Embodiments of the present invention will be described in detail below with reference to the drawings. The embodiments described below are all general or specific examples. The numerical values, shapes, materials, components, arrangement of components, and connection configurations shown in the following embodiments are examples only and are not intended to limit the present invention. Furthermore, in each figure, substantially identical components are denoted by the same reference numerals, and redundant explanations may be omitted or simplified. Also, in the following embodiments, "connected" includes not only direct connections but also electrically connected connections via other elements.

[0019] (Embodiment) [Configuration of high-frequency devices] The configuration of the high-frequency device according to the embodiment will be described with reference to Figures 2 to 5.

[0020] Figure 2 is a circuit diagram of the high-frequency device 1 according to an embodiment.

[0021] As shown in Figure 2, the high-frequency device 1 comprises functional elements 13 and 13a and an inductor 40. The figure also shows an antenna element 97 and input / output terminals 91, 92, and 92a to which high-frequency signals are input and output.

[0022] Functional elements 13 and 13a are, for example, receiving filters. Functional elements 13 and 13a may be receiving filters or transmitting filters. Although two functional elements are shown in Figure 2, there may be one or more functional elements. Multiple functional elements may form a quadplexer with Band 1 and Band 3 as passbands.

[0023] Each of the functional elements 13 and 13a has one or more elastic wave resonators. The one or more elastic wave resonators include, for example, at least one of a SAW (Surface Acoustic Wave) resonator, a BAW (Bulk Acoustic Wave) resonator, and an XBAR (Transversely Excited Film Bulk Acoustic Resonator). Note that SAW includes not only surface waves but also boundary waves. A SAW resonator consists of a piezoelectric substrate (a piezoelectric film, a low-sound-velocity film, and a high-sound-velocity film or high-sound-velocity support substrate) and an IDT electrode formed thereon as a functional electrode 16. A BAW resonator consists of a support substrate such as silicon and a functional electrode 16 which is an electrode sandwiching a piezoelectric film.

[0024] Functional element 13 is located on path r1 connecting input / output terminal 91 and input / output terminal 92. Functional element 13a is located on path r2 connecting input / output terminal 91 and input / output terminal 92a. Antenna element 97 is connected to input / output terminal 91. One end of functional element 13 and one end of functional element 13a are also connected to input / output terminal 91.

[0025] An input / output terminal 92 is connected to the other end of functional element 13. An input / output terminal 92a is connected to the other end of functional element 13a. When each functional element 13 and 13a is a receiving filter, an LNA (Low Noise Amplifier) ​​and a signal processing circuit are connected to the input / output terminal 92 in this order, and an LNA and a signal processing circuit are connected to the input / output terminal 92a in this order. When multiple functional elements form a quadplexer with Band 1 and Band 3 as passbands, there are a total of four input / output terminals 92 and 92a, with an LNA and a signal processing circuit connected to two of these input / output terminals in this order, and a power amplifier and a signal processing circuit connected to the other two input / output terminals in this order.

[0026] The high-frequency device 1 may be configured to be included in the multiplexer 90. That is, the high-frequency device 1 may be configured such that the input / output terminals 91, 92, and 92a of the multiple functional elements 13, 13a are directly or indirectly connected to the antenna common terminal. The multiplexer 90 may, for example, be a diplexer if there are two multiple functional elements, a triplexer if there are three, and a quadplexer if there are four. Note that there may be five or more multiple functional elements.

[0027] An inductor 40 is connected to a portion of the path r12 between the input / output terminal 91 and the functional elements 13 and 13a. One end 41 of the inductor 40 is connected to a first node n1, which is part of the path r12, and the other end 42 of the inductor 40 is connected to ground.

[0028] In the high-frequency device 1 of this embodiment, the functional elements 13 and 13a are provided on the chip component 10, and the inductor 40 is provided on the substrate 30.

[0029] Figure 3 is a schematic diagram showing a cross-section of the high-frequency device 1.

[0030] As shown in Figure 3, the high-frequency device 1 comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the substrate 30. The area around the chip component 10 is sealed with resin 19. The resin 19 is formed to cover the first surface 31 of the substrate 30, as well as the top and side surfaces of the chip component 10. Note that the chip component 10 does not necessarily have to be covered with resin 19.

[0031] In Figure 3, the direction perpendicular to the substrate 30 is defined as the Z direction. This direction is the same as the thickness direction of the substrate 30. Furthermore, this direction is also perpendicular to the two main surfaces of the substrate 30, the first surface 31 and the second surface 32. In this embodiment, the direction of the arrow in the Z direction may be referred to as the upper side, and the direction opposite to the arrow direction may be referred to as the lower side.

[0032] The chip component 10 is mounted on the first surface 31 of the substrate 30 using bump electrodes 50.

[0033] The chip component 10 is positioned closer to the first surface 31 of the substrate 30 than to the second surface 32. The chip component 10 has a rectangular parallelepiped shape and has a first opposing surface 11 that faces the first surface 31 of the substrate 30. The first opposing surface 11 faces the first surface 31 through a space located between the substrate 30 and the chip component 10.

[0034] The chip component 10 has a functional element 13 formed by a base material 14 and a functional electrode 16, and a functional element 13a formed by a base material 14 and a functional electrode 16a. The chip component 10 also has a conductor portion 15 and terminal electrodes 18. The conductor portion 15 is composed of functional electrodes 16, 16a and wiring electrodes 17 formed on the main surface of the base material 14. The conductor portion 15 is provided on the first opposing surface 11 of the chip component 10.

[0035] The conductor portion 15 shown in Figure 3 is composed of functional electrodes 16, 16a and wiring electrodes 17, but the conductor portion 15 only needs to include at least one of the functional electrodes 16, 16a and wiring electrodes 17. In Figure 3, the wiring electrodes 17, which are part of the conductor portion 15, are provided inside the functional elements 13, 13a, but the wiring electrodes 17 may also be formed outside the functional elements 13, 13a.

[0036] The conductive portion 15 is exposed in the space between the substrate 30 and the chip component 10. A protective film (e.g., SiO2) may be formed on the surface of the conductive portion 15. Furthermore, the conductive portion 15 may be provided not only on the first opposing surface 11 but also inside the chip component 10. For example, the functional elements 13 and 13a may be provided in the hollow region inside the chip component 10.

[0037] The wiring electrodes 17 are drawn out from the functional elements 13 and 13a and connected to the bump electrodes 50 via terminal electrodes 18, which are part of the wiring electrodes 17. In other words, the conductor portion 15 is electrically connected to the internal conductor of the substrate 30 via the bump electrodes 50.

[0038] The substrate 30 has a rectangular parallelepiped shape. The substrate 30 is a multilayer substrate formed by stacking multiple substrate sheets, for example. The substrate 30 may be a circuit board containing ceramic material or a flexible circuit board containing resin material. In Figure 3, the interface between the stacked substrate sheets is also shown.

[0039] The two main surfaces of the substrate 30, the first surface 31 and the second surface 32, are parallel to each other. The first surface 31 is located on the surface of the substrate 30, and the second surface 32 is located on the back surface of the substrate 30, facing away from the surface. The first surface 31 is the surface on which the chip components 10 are mounted. The second surface 32 is the surface that faces the printed circuit board when the high-frequency device 1 is mounted on another printed circuit board.

[0040] The substrate 30 includes a signal electrode 33, a first line 34 connected to the signal electrode 33, a reference potential electrode 35, a second line 36 connected to the reference potential electrode 35, and an inductor 40. The signal electrode 33, the first line 34, the reference potential electrode 35, the second line 36, and the inductor 40 are formed from a metallic material, for example, one mainly composed of copper.

[0041] One end 41 of the inductor 40 is connected to the signal electrode 33 via the first line 34. Specifically, one end 41 of the inductor 40 is connected to the other end e2 of the lead line 34b, which is part of the first line 34. The other end 42 of the inductor 40 is electrically connected to the reference potential electrode 35. Specifically, the other end 42 of the inductor 40 is connected to the reference potential electrode 35 via the second line 36.

[0042] The inductor 40 is composed of multiple conductor patterns p and conductor vias vi (see Figure 4) connecting the conductor patterns p. Each conductor pattern p is formed on the base sheet of each layer and is parallel to the first surface 31. The inductor 40 is formed such that the coil axis of the inductor 40 is perpendicular to the substrate 30.

[0043] The inductor 40 shown in Figure 3 comprises three layers of conductor patterns p. The inductor 40 has a first conductor pattern p1 closest to the first surface 31, a second conductor pattern p2 closest to the second surface 32, and another conductor pattern p12 located between the first conductor pattern p1 and the second conductor pattern p2. Two or more conductor patterns may be provided between the first conductor pattern p1 and the second conductor pattern p2, or there may be no conductor patterns provided between them.

[0044] The first conductor pattern p1 is connected to the signal electrode 33 via the first line 34. The second conductor pattern p2 is connected to the reference potential electrode 35 via the second line 36.

[0045] The reference potential electrode 35 is provided on the second surface 32 of the substrate 30. The reference potential electrode 35 is, for example, an external terminal for grounding and is set to a reference potential (for example, ground potential). In this example, the reference potential electrode 35 corresponds to ground in the circuit diagram of Figure 2.

[0046] The second line 36 is a different line from the first line 34 and is located inside the substrate 30. The second line 36 is composed of a line pattern and conductive vias vg (see Figure 4) within the substrate 30. One end of the second line 36 is connected to the other end 42 of the inductor 40, and the other end of the second line 36 is connected to the reference potential electrode 35.

[0047] The signal electrode 33 is provided on the second surface 32 of the substrate 30. The signal electrode 33 is, for example, an external terminal for signal input, to which a high-frequency signal input to the antenna element 97 is received. The signal electrode 33 is electrically connected to the functional elements 13 and 13a of the chip component 10 via the signal line 34a, which is part of the first line 34, and the bump electrode 50.

[0048] The first transmission line 34 is provided inside the substrate 30 and on the first surface 31. The first transmission line 34 is composed of multiple transmission line patterns, conductive vias vs and conductive vias vd (see Figure 4) formed on the substrate 30. A land electrode 38, which is part of the first transmission line 34, is formed on the first surface 31. The first transmission line 34 has a signal line 34a and a lead line 34b.

[0049] The signal line 34a is a line that electrically connects the signal electrode 33 and the bump electrode 50. One end of the signal line 34a is connected to the signal electrode 33 on the second surface 32 of the substrate 30. The other end of the signal line 34a, the land electrode 38, is exposed on the first surface 31 of the substrate 30 and is connected to the bump electrode 50. In other words, the signal line 34a is formed from the second surface 32 to the first surface 31 and is electrically connected to the functional elements 13 and 13a of the chip component 10. In the figure, the signal line 34a is formed in a straight line by a line perpendicular to the second surface 32, but it is not limited to that. For example, the signal line 34a may be formed in a stepped manner by a line perpendicular to the second surface 32, a line parallel to the first surface 31, and a line perpendicular to the first surface 31.

[0050] The lead line 34b is a line for conducting electricity between the signal electrode 33 and the inductor 40. The lead line 34b is drawn from the end of the first conductor pattern p1, which is closest to the first surface 31 among the multiple conductor patterns p, and is connected to the signal electrode 33. The lead line 34b has two ends, one end e1 and the other end e2. The one end e1 of the lead line 34b is connected to the signal electrode 33, and the other end e2 of the lead line 34b is connected to one end 41 of the inductor 40.

[0051] In this embodiment, one end e1 of the lead line 34b is directly connected to the signal electrode 33 on the second surface 32 side of one end 41 of the inductor 40. Furthermore, one end e1 of the lead line 34b is connected to a different region on the signal electrode 33 than the signal line 34a. The signal electrode 33 to which one end e1 of the lead line 34b is connected corresponds to the input / output terminal 91 and the first node n1 in the circuit configuration diagram of Figure 2.

[0052] Here, we will explain in detail the circuit patterns of the substrate sheets in each layer on which the inductor 40, first transmission line 34, signal electrode 33, second transmission line 36, and reference potential electrode 35 are formed. Here, we will explain using a circuit pattern corresponding to a quadplexer with Band 1 and Band 3 as passbands as an example.

[0053] Figure 4 shows the circuit patterns formed on the substrate sheets of each layer of the high-frequency device 1. Figure 4 shows the circuit patterns of the first to sixth layers from the top in this order. The conductor vias vs, vg, vi, and vd shown below are conductors that extend in the depth direction of the paper so as to penetrate the substrate sheet.

[0054] The first layer circuit pattern includes land electrodes 38 and conductor vias vs, which are part of the signal line 34a, as well as a ground pattern pg and conductor vias vg located on the outer periphery of the substrate sheet. The land electrodes 38 are connected to the second layer signal line 34a via conductor vias vs. The first layer ground pattern pg is connected to the second layer ground pattern pg via conductor vias vg.

[0055] The second layer circuit pattern includes a first conductor pattern p1 with 7 / 8 turns, a conductor via vi of the inductor 40, a line pattern and conductor via vs that are part of the signal line 34a, a line pattern and conductor via vd that are part of the lead line 34b, and a ground pattern pg and conductor via vg located on the outer periphery of the base sheet. The first conductor pattern p1 is connected to the third layer conductor pattern p12 via conductor via vi. Part of the signal line 34a is connected to the third layer conductor via vs. Part of the lead line 34b is connected to the third layer conductor via vd. The second layer ground pattern pg is connected to the third layer ground pattern pg via conductor via vg.

[0056] The circuit pattern of the third layer includes a conductor pattern p12 with approximately 7 / 8 turns, a conductor via vi of the inductor 40, a conductor via vs which is part of the signal line 34a, a conductor via vd which is part of the lead line 34b, and a ground pattern pg and conductor via vg located on the outer periphery of the base sheet. Conductor pattern p12 is connected to the second conductor pattern p2 of the fourth layer via conductor via vi. Conductor via vs of the third layer is connected to conductor via vs which is part of the signal line 34a of the fourth layer. Conductor via vd of the third layer is connected to conductor via vd which is part of the lead line 34b of the fourth layer. Ground pattern pg of the third layer is connected to ground pattern pg of the fourth layer via conductor via vg.

[0057] The fourth layer circuit pattern includes a second conductor pattern p2 with 3 / 4 turns, a conductor via vs which is part of the second line 36 and part of the signal line 34a, a conductor via vd which is part of the lead line 34b, and a ground pattern pg and conductor via vg located on the outer periphery of the base sheet. The second conductor pattern p2 is connected to the ground pattern pg via the second line 36. The conductor via vs of the fourth layer is connected to the conductor via vs which is part of the signal line 34a of the fifth layer. The conductor via vd of the fourth layer is connected to the conductor via vd which is part of the lead line 34b of the fifth layer. The ground pattern pg of the fourth layer is connected to the ground pattern pg of the fifth layer via the conductor via vg.

[0058] The fifth layer circuit pattern includes a conductor via vs which is part of the signal line 34a, a conductor via vd which is part of the lead line 34b, and a ground pattern pg and conductor via vg located on the outer periphery of the base sheet. The conductor via vs of the fifth layer is connected to the signal electrode 33 of the sixth layer. The conductor via vd of the fifth layer is also connected to the signal electrode 33 of the sixth layer. The ground pattern pg of the fifth layer is connected to the reference potential electrode 35 of the sixth layer via conductor via vg.

[0059] The sixth layer circuit pattern has a signal electrode 33 and a reference potential electrode 35. Each of the signal electrode 33 and the reference potential electrode 35 is provided at the outer edge of the substrate sheet. The signal electrode 33 is connected to the upper signal line 34a via the aforementioned conductor vias vs, etc., and is also connected to the upper lead line 34b via the aforementioned conductor vias vd, etc. The conductor vias vs and vd are adjacent to each other when viewed from a direction perpendicular to the first surface 31 of the substrate 30, and are connected to different regions on the signal electrode 33.

[0060] The reference potential electrode 35 is formed in a region extending from the outer edge of the base sheet to the center. The reference potential electrode 35 is connected to the upper ground pattern pg via the aforementioned conductive vias vg. The ground patterns pg provided on each of the first to fifth base sheets are connected to each other via the conductive vias vg formed on each base sheet.

[0061] The sixth layer circuit pattern also includes terminals B1R, B1T, B3R, and B3T. These terminals correspond to input / output terminals 92 and 92a in the circuit diagram of Figure 2. Each terminal is connected to the terminal electrodes B1R, B1T, B3R, and B3T of the chip component 10 via conductive vias and bump electrodes provided in each layer (not shown).

[0062] For example, in the high-frequency device 1 shown in Figure 3, if input / output terminals 92 and 92a are formed on the second surface 32 of the substrate 30, the other ends of the functional elements 13 and 13a of the chip component 10 may be connected to the input / output terminals 92 and 92a via bump electrodes and conductive vias in the substrate 30 (not shown).

[0063] In the high-frequency device 1 of this embodiment, a signal electrode 33 provided on the second surface 32 of the substrate 30 is electrically connected to the functional elements 13 and 13a of the chip component 10 via a signal line 34a. Furthermore, the other end e2 of the lead line 34b is connected to one end 41 of the inductor 40, and one end e1 of the lead line 34b is connected to the signal electrode 33 on the second surface 32 side of the one end 41 of the inductor 40. With this configuration, the high-frequency signal input to the signal electrode 33 is transmitted by splitting at the signal electrode 33 into the signal line 34a and the lead line 34b. Therefore, it is possible to suppress the flow of a large current through the signal line 34a. This suppresses the occurrence of unnecessary losses in the high-frequency signal.

[0064] Although the above example shows the lead line 34b connected to the signal electrode 33, it is not limited to this. For example, the lead line 34b may be drawn out from one end 41 of the inductor 40 and connected to the signal line 34a on the second surface 32 side of that end 41.

[0065] [Effects, etc.] The effects of the high-frequency device 1 according to the embodiment will be explained with reference to Figure 5.

[0066] Figures 5(a) and 5(b) show the insertion losses of high-frequency devices in embodiments and comparative examples, respectively.

[0067] Figure 5 shows the insertion loss of the high-frequency signal input to the high-frequency device 1 or 101 from the input / output terminal 91. Figure 5(a) shows the insertion loss of a receiving filter with Band 66 as the passband, and (b) shows the insertion loss of a receiving filter with Band 3 as the passband.

[0068] As shown in Figure 5, the insertion loss in the passband is smaller in the embodiment than in the comparative example. The high-frequency device 1 of the embodiment can suppress the occurrence of insertion loss in the passband compared to the high-frequency device 101 of the comparative example.

[0069] [Modified Example 1 of the Embodiment] The configuration of the high-frequency device 1A according to Modification 1 of the embodiment will be described with reference to Figures 6 and 7. In Modification 1, the case in which the functional element 13 of the high-frequency device 1A is a transmitting filter will be used as an example.

[0070] Figure 6 is a circuit diagram of a high-frequency device 1A according to a modified example 1 of the embodiment.

[0071] As shown in Figure 6, the high-frequency device 1A comprises a functional element 13 and an inductor 40. The figure also shows a power amplifier 98 and input / output terminals 91 and 92 to which high-frequency signals are input and output.

[0072] The functional element 13 has one or more elastic wave resonators. The one or more elastic wave resonators include, for example, at least one of a SAW resonator, a BAW resonator, and an XBAR. Note that SAW includes not only surface waves but also boundary waves. In this modified example, the functional element 13 is, for example, a transmitting filter.

[0073] The functional element 13 is located on the path r1 connecting the input / output terminal 91 and the input / output terminal 92. One end of the functional element 13 is connected to the input / output terminal 91. The other end of the functional element 13 is connected to the input / output terminal 92. If the functional element 13 is a transmit filter, the power amplifier 98 and the signal processing circuit are connected to the input / output terminal 92 in that order.

[0074] An inductor 40 is connected to a portion of the path r1 between the functional element 13 and the input / output terminal 92. One end 41 of the inductor 40 is connected to a second node n2, which is part of the path r1, and the other end 42 of the inductor 40 is connected to ground.

[0075] In the high-frequency device 1A of the modified example 1, the functional element 13 is provided on the chip component 10, and the inductor 40 is provided on the substrate 30.

[0076] Figure 7 is a schematic diagram showing a cross-section of the high-frequency device 1A.

[0077] As shown in Figure 7, the high-frequency device 1A comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the substrate 30. The configuration of the chip component 10 in Modification 1 is substantially the same as that of the embodiment. The configuration of the substrate 30 in Modification 1 is substantially the same as that of the embodiment.

[0078] The substrate 30 includes a signal electrode 33, a first line 34 connected to the signal electrode 33, a reference potential electrode 35, a second line 36 connected to the reference potential electrode 35, and an inductor 40.

[0079] The reference potential electrode 35 is, for example, an external terminal for grounding, and is set to a reference potential (for example, ground potential). In this example, the reference potential electrode 35 corresponds to ground in the circuit diagram of Figure 6.

[0080] One end of the second line 36 is connected to the other end 42 of the inductor 40, and the other end of the second line 36 is connected to the reference potential electrode 35.

[0081] The signal electrode 33 is, for example, an external terminal for signal input, to which a high-frequency signal output from the power amplifier 98 is input. The signal electrode 33 is electrically connected to the functional element 13 of the chip component 10 via the signal line 34a, which is part of the first line 34, and the bump electrode 50.

[0082] The first track 34 has a signal track 34a and a lead track 34b.

[0083] The signal line 34a is a line that electrically connects the signal electrode 33 and the bump electrode 50. One end of the signal line 34a is connected to the signal electrode 33 on the second surface 32 of the substrate 30. The other end of the signal line 34a, the land electrode 38, is exposed on the first surface 31 of the substrate 30 and is connected to the bump electrode 50. In other words, the signal line 34a is formed from the second surface 32 to the first surface 31 and is electrically connected to the functional element 13 of the chip component 10.

[0084] The lead line 34b is a line for conducting electricity between the signal electrode 33 and the inductor 40. The lead line 34b is drawn out from the end of the first conductor pattern p1, which is the closest to the first surface 31 among the multiple conductor patterns p, and is connected to the signal electrode 33. One end e1 of the lead line 34b is connected to the signal electrode 33, and the other end e2 of the lead line 34b is connected to one end 41 of the inductor 40.

[0085] In this modified example, one end e1 of the lead line 34b is directly connected to the signal electrode 33 on the second surface 32 side of one end 41 of the inductor 40. Also, one end e1 of the lead line 34b is connected to a different region on the signal electrode 33 than the signal line 34a. The signal electrode 33 to which one end e1 of the lead line 34b is connected corresponds to the input / output terminal 92 and the second node n2 in the circuit diagram of Figure 6.

[0086] In the high-frequency device 1A of the modified example 1, a signal electrode 33 provided on the second surface 32 of the substrate 30 is electrically connected to the functional element 13 of the chip component 10 via a signal line 34a. In addition, the other end e2 of the lead line 34b is connected to one end 41 of the inductor 40, and one end e1 of the lead line 34b is connected to the signal electrode 33 on the second surface 32 side of the one end 41 of the inductor 40. With this configuration, the high-frequency signal input to the signal electrode 33 is transmitted by splitting at the signal electrode 33 into the signal line 34a and the lead line 34b. Therefore, it is possible to suppress the flow of a large current in the signal line 34a. This makes it possible to suppress the occurrence of unnecessary losses in the high-frequency signal.

[0087] [Effects, etc.] The effects of the high-frequency device 1A according to Modification 1 will be explained with reference to Figure 8.

[0088] Figure 8 shows the insertion loss of high-frequency devices for modified example 1 and comparative example of the embodiment.

[0089] Figure 8 shows the insertion loss of the high-frequency signal input to the high-frequency device 1A or 101 from the input / output terminal 92. Figure 8 also shows the insertion loss of the transmit filter with Band 1 as the passband.

[0090] As shown in Figure 8, Modification 1 exhibits lower insertion loss in the passband compared to the Comparative Example. The high-frequency device 1A of Modification 1 can suppress insertion loss in the passband compared to the high-frequency device 101 of the Comparative Example.

[0091] [Modified Example 2 of the Embodiment] The configuration of the high-frequency device 1B according to Modification 2 of the embodiment will be described with reference to Figure 9. In Modification 2, an example will be described in which one end e1 of the lead line 34b is connected to the signal line 34a.

[0092] Figure 9 is a schematic diagram showing a cross-section of the high-frequency device 1B.

[0093] As shown in Figure 9, the high-frequency device 1B comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the substrate 30. The configuration of the chip component 10 in the modified example 2 is the same as in the embodiment.

[0094] The substrate 30 includes a signal electrode 33, a first line 34 connected to the signal electrode 33, a reference potential electrode 35, a second line 36 connected to the reference potential electrode 35, and an inductor 40. The configuration of the signal electrode 33, the reference potential electrode 35, the second line 36, and the inductor 40 is the same as in the embodiment.

[0095] In the modified example 2, the lead line 34b is a line for conducting electricity between the signal electrode 33 and the inductor 40, but one end e1 of the lead line 34b is connected to a part of the signal line 34a. The connection point c2 of the signal line 34a to which one end e1 of the lead line 34b is connected corresponds to the first node n1 in the circuit diagram of Figure 2.

[0096] One end of the first transmission line 34 is connected to the signal electrode 33. The other end of the first transmission line 34 has two ends; the first end, the land electrode 38, is connected to the bump electrode 50, and the second end is connected to one end 41 of the inductor 40.

[0097] For example, the lead line 34b is led out from the end of the first conductor pattern p1, which is closest to the first surface 31 among the multiple conductor patterns p, and is connected to the signal line 34a. Specifically, one end e1 of the lead line 34b is connected to the signal line 34a on the second surface 32 side of one end 41 of the inductor 40. More specifically, one end e1 of the lead line 34b is connected to the connection point c2 of the signal line 34a on the second surface 32 side of the second conductor pattern p2, which is closest to the second surface 32 among the multiple conductor patterns p.

[0098] In the high-frequency device 1B of the modified example 2, a signal electrode 33 provided on the second surface 32 of the substrate 30 is electrically connected to the functional elements 13 and 13a of the chip component 10 via a signal line 34a. In addition, the other end e2 of the lead line 34b is connected to one end 41 of the inductor 40, and one end e1 of the lead line 34b is connected to the signal line 34a on the second surface 32 side of the one end 41 of the inductor 40. With this configuration, the distance from the point where the signal line 34a is connected to the signal electrode 33 (connection point c1) to the point where the lead line 34b is connected to the signal line 34a (connection point c2) can be made shorter than in the comparative example. Therefore, the high-frequency signal input to the signal electrode 33 is transmitted by splitting at connection point c2, which is located near the signal electrode 33, into the signal line 34a and the lead line 34b. This shortens the portion of the signal line 34a through which a large current flows, thereby suppressing unnecessary losses in the high-frequency signal.

[0099] [Modification of the embodiment 3] The configuration of the high-frequency device 1C according to the third modified embodiment will be described with reference to Figure 10. In the third modified embodiment, an example will be described in which the inductor 40 is formed by a single layer of conductor pattern p.

[0100] Figure 10 is a schematic diagram showing a cross-section of the high-frequency device 1C.

[0101] As shown in Figure 10, the high-frequency device 1C comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the substrate 30. The configuration of the chip component 10 in Modification 3 is the same as in the embodiment.

[0102] The substrate 30 includes a signal electrode 33, a first transmission line 34 connected to the signal electrode 33, a reference potential electrode 35, a second transmission line 36 connected to the reference potential electrode 35, and an inductor 40. The configuration of the signal electrode 33, the first transmission line 34, the reference potential electrode 35, and the second transmission line 36 is the same as in the embodiment.

[0103] One end 41 of the inductor 40 is connected to the signal electrode 33 via the lead line 34b. The other end 42 of the inductor 40 is electrically connected to the reference potential electrode 35.

[0104] Specifically, the inductor 40 of the modified example 3 is composed of a conductor pattern p with 3 / 4 turns. The conductor pattern p is formed on a base sheet and is parallel to the first surface 31. One end of the conductor pattern p is connected to the signal electrode 33 via the first line 34, and the other end of the conductor pattern p is connected to the reference potential electrode 35 via the second line 36.

[0105] In the high-frequency device 1C of the modified example 3, one end e1 of the lead line 34b is connected to the signal electrode 33 on the second surface 32 side of one end 41 of the inductor 40. This allows for the same effects as in the embodiment.

[0106] [Modification of the embodiment 4] The configuration of the high-frequency device 1D according to the fourth modified embodiment will be described with reference to Figure 11. In the fourth modified embodiment, an example in which the inductor 40 is inverted will be described.

[0107] Figure 11 is a schematic diagram showing a cross-section of the high-frequency device 1D.

[0108] As shown in Figure 11, the high-frequency device 1D comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the substrate 30. The configuration of the chip component 10 in Modification 4 is the same as in the embodiment.

[0109] The substrate 30 includes a signal electrode 33, a first transmission line 34 connected to the signal electrode 33, a reference potential electrode 35, a second transmission line 36 connected to the reference potential electrode 35, and an inductor 40. The configuration of the signal electrode 33, the first transmission line 34, the reference potential electrode 35, and the second transmission line 36 is the same as in the embodiment.

[0110] In the modified example 4, one end 41 of the inductor 40 is located closer to the second surface 32 of the substrate 30 than the other end 42. In other words, in the modified example 4, the other end 42 of the inductor 40 is located closer to the first surface 31 of the substrate 30 than the one end 41. One end 41 of the inductor 40 is connected to the signal electrode 33 via the lead line 34b. The other end 42 of the inductor 40 is electrically connected to the reference potential electrode 35.

[0111] Specifically, the inductor 40 of the modified example 4 comprises three layers of conductor patterns p. The inductor 40 has a first conductor pattern p1 closest to the first surface 31, a second conductor pattern p2 closest to the second surface 32, and another conductor pattern p12 located between the first conductor pattern p1 and the second conductor pattern p2. The second conductor pattern p2 is connected to the signal electrode 33 via a lead line 34b. The first conductor pattern p1 is connected to the reference potential electrode 35 via a second line 36.

[0112] In the high-frequency device 1D of the modified example 4, one end e1 of the lead line 34b is directly connected to the signal electrode 33 on the second surface 32 side of one end 41 of the inductor 40. This allows for the same effects as in the embodiment.

[0113] Furthermore, in the high-frequency device 1D, since the lead line 34b is drawn from the end of the second conductor pattern p2 that is closest to the second surface 32 among the multiple conductor patterns p, the length of the lead line 34b can be shortened and the resistance of the lead line 34b can be reduced.

[0114] Furthermore, in the high-frequency device 1D, the second conductor pattern p2 connected to the signal electrode 33 is separated from the conductor portion 15 of the chip component 10, and the first conductor pattern p1 connected to the reference potential electrode 35 is located between the second conductor pattern p2 and the conductor portion 15, thus suppressing degradation of high-frequency characteristics.

[0115] [Modification of Embodiment 5] The configuration of the high-frequency device 1E according to Modification 5 of the embodiment will be described with reference to Figure 12. Modification 5 describes an example in which the configuration of the high-frequency device 1 of the embodiment is incorporated into a module board.

[0116] Figure 12 is a schematic diagram showing a cross-section of the high-frequency device 1E.

[0117] As shown in Figure 12, the high-frequency device 1E comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the substrate 30. The configuration of the chip component 10 in Modification 5 is the same as in the embodiment.

[0118] Figure 12 also shows another chip component 10E mounted on the first surface 31 of the substrate 30. The chip component 10E is, for example, an LNA or a power amplifier, and is connected to the other end of the functional element 13 of the chip component 10.

[0119] The substrate 30 is, for example, a multilayer substrate formed by laminating multiple substrate sheets. The substrate 30 may be a circuit board containing a ceramic material, or a flexible circuit board containing a resin material.

[0120] The two main surfaces of the substrate 30, the first surface 31 and the second surface 32, are parallel to each other. The first surface 31 is located on the surface of the substrate 30, and the second surface 32 is located inside the substrate 30. The first surface 31 is the surface on which the chip components 10 are mounted. The second surface 32 is not the back surface 39 of the substrate 30, but the interface between the base material sheet and the signal electrode 33 and the reference potential electrode 35.

[0121] The substrate 30 includes a signal electrode 33, a first line 34 connected to the signal electrode 33, a reference potential electrode 35, a second line 36 connected to the reference potential electrode 35, and an inductor 40.

[0122] One end 41 of the inductor 40 is connected to the signal electrode 33 via the first line 34. The other end 42 of the inductor 40 is electrically connected to the reference potential electrode 35. Specifically, the other end 42 of the inductor 40 is connected to the reference potential electrode 35 via the second line 36.

[0123] The inductor 40 is composed of multiple conductor patterns p and conductor vias vi connecting the conductor patterns p. Each conductor pattern p is formed on the base sheet of each layer and is parallel to the first surface 31. The inductor 40 is formed such that the coil axis of the inductor 40 is perpendicular to the substrate 30.

[0124] The inductor 40 shown in Figure 12 comprises three layers of conductor patterns p. The inductor 40 has a first conductor pattern p1 closest to the first surface 31, a second conductor pattern p2 closest to the second surface 32, and another conductor pattern p12 located between the first conductor pattern p1 and the second conductor pattern p2. The first conductor pattern p1 is connected to the signal electrode 33 via a first line 34. The second conductor pattern p2 is connected to the reference potential electrode 35 via a second line 36.

[0125] The reference potential electrode 35 is provided on the second surface 32 of the substrate 30. The reference potential electrode 35 is, for example, an internal terminal for grounding and is set to a reference potential (e.g., ground potential). In this example, the reference potential electrode 35 corresponds to ground in the circuit diagram of Figure 2. The reference potential electrode 35 is connected to an external terminal 35E on the back surface 39 of the substrate 30 via a conductive via v within the substrate 30.

[0126] The second line 36 is located inside the substrate 30. One end of the second line 36 is connected to the other end 42 of the inductor 40, and the other end of the second line 36 is connected to the reference potential electrode 35.

[0127] The signal electrode 33 is provided on the second surface 32 of the substrate 30. The signal electrode 33 is, for example, an internal terminal for signal input, to which a high-frequency signal input to the antenna element 97 is received. In this example, the signal electrode 33 corresponds to the input / output terminal 91 in the circuit diagram of Figure 2. The signal electrode 33 is electrically connected to the functional elements 13 and 13a of the chip component 10 via the signal line 34a, which is part of the first line 34, and the bump electrode 50. The signal electrode 33 is also connected to the external terminal 33E on the back surface 39 of the substrate 30 via a conductive via v within the substrate 30.

[0128] The first transmission line 34 is provided inside the substrate 30 and on the first surface 31. The first transmission line 34 is composed of multiple transmission line patterns, conductive vias vs and conductive vias vd formed on the substrate 30. Land electrodes 38, which are part of the first transmission line 34, are formed on the first surface 31. The first transmission line 34 has a signal line 34a and a lead line 34b.

[0129] The signal line 34a is a line that electrically connects the signal electrode 33 and the bump electrode 50. One end of the signal line 34a is connected to the signal electrode 33 on the second surface 32 of the substrate 30. The other end of the signal line 34a, the land electrode 38, is exposed on the first surface 31 of the substrate 30 and is connected to the bump electrode 50. In other words, the signal line 34a is formed from the second surface 32 to the first surface 31 and is electrically connected to the functional elements 13 and 13a of the chip component 10.

[0130] The lead line 34b is a line for making the signal electrode 33 and the inductor 40 conductive. One end e1 of the lead line 34b is connected to the signal electrode 33, and the other end e2 of the lead line 34b is connected to one end 41 of the inductor 40.

[0131] In this modified example, one end e1 of the lead line 34b is directly connected to the signal electrode 33 on the second surface 32 side of one end 41 of the inductor 40. Also, one end e1 of the lead line 34b is connected to a different region on the signal electrode 33 than the signal line 34a. The signal electrode 33 to which one end e1 of the lead line 34b is connected corresponds to the input / output terminal 91 and the first node n1 in the circuit diagram of Figure 2.

[0132] In the high-frequency device 1E of the modified example 5, a signal electrode 33 provided on the second surface 32 of the substrate 30 is electrically connected to the functional elements 13 and 13a of the chip component 10 via a signal line 34a. In addition, the other end e2 of the lead line 34b is connected to one end 41 of the inductor 40, and one end e1 of the lead line 34b is connected to the signal electrode 33 on the second surface 32 side of the one end 41 of the inductor 40. With this configuration, the high-frequency signal input to the signal electrode 33 is transmitted by splitting at the signal electrode 33 into the signal line 34a and the lead line 34b. Therefore, it is possible to suppress the flow of a large current in the signal line 34a. This makes it possible to suppress the occurrence of unnecessary losses in the high-frequency signal.

[0133] Although the above example shows the lead line 34b connected to the signal electrode 33, it is not limited to this. For example, the lead line 34b may be drawn out from one end 41 of the inductor 40 and connected to the signal line 34a on the second surface 32 side of that end 41.

[0134] (summary) An example of a high-frequency device according to one aspect of the present invention is provided below.

[0135] The high-frequency device of Example 1 comprises a substrate 30 having a first surface 31 and a second surface 32, and a chip component 10 mounted on the first surface 31 of the substrate 30. The substrate 30 has a signal electrode 33, a signal line 34a, a lead line 34b, a reference potential electrode 35, and an inductor 40. The signal electrode 33 is provided on the second surface 32 and is conductive to the functional element 13 of the chip component 10 via the signal line 34a. The lead line 34b has one end e1 and the other end e2, which are the ends of the lead line 34b. One end 41 of the inductor 40 is connected to the other end e2 of the lead line 34b, and the other end 42 of the inductor 40 is connected to the reference potential electrode 35. One end e1 of the lead line 34b is connected to the signal electrode 33 or the signal line 34a on the second surface 32 side of the one end 41 of the inductor 40.

[0136] For example, if one end e1 of the lead line 34b is connected to the signal electrode 33 on the second surface 32 side of one end 41 of the inductor 40, the high-frequency signal input to the signal electrode 33 is split and transmitted to the signal line 34a and the lead line 34b with the signal electrode 33 as the branching point. Therefore, it is possible to suppress the flow of a large current through the signal line 34a. This suppresses the occurrence of unnecessary losses in the high-frequency signal.

[0137] Alternatively, for example, if one end e1 of the lead line 34b is connected to the signal line 34a on the second surface 32 side of one end 41 of the inductor 40, the high-frequency signal input to the signal electrode 33 is split and transmitted to the signal line 34a and the lead line 34b, with the end e1 of the lead line 34b acting as a branching point. As a result, the section of the signal line 34a through which a large current flows can be shortened. This suppresses the occurrence of unnecessary losses in the high-frequency signal.

[0138] The high-frequency device of Example 2 is the high-frequency device described in Example 1, wherein one end 41 of the inductor 40 is connected to a signal electrode 33 or signal line 34a via a lead line 34b, and the other end 42 of the inductor 40 is connected to a reference potential electrode 35 via another line (e.g., a second line 36) different from the signal line 34a and the lead line 34b.

[0139] According to this configuration, the high-frequency signal input to the signal electrode 33 is transmitted separately to the signal line 34a and the lead line 34b. Therefore, it is possible to suppress the flow of a large current through the signal line 34a. This suppresses the occurrence of unnecessary losses in the high-frequency signal.

[0140] The high-frequency device of Example 3 is the high-frequency device described in Example 1 or 2, wherein the inductor 40 includes a plurality of conductor patterns p and conductor vias vi formed on the substrate 30, and the lead line 34b may be led out from the end of the conductor pattern closest to the first surface 31 among the plurality of conductor patterns p and connected to a signal electrode 33 or a signal line 34a.

[0141] According to this, even if the lead line 34b is drawn from the end of the conductor pattern close to the first surface 31, the high-frequency signal input to the signal electrode 33 is transmitted by splitting at the signal electrode 33 or connection point c2 into the signal line 34a and the lead line 34b. Therefore, it is possible to suppress the flow of a large current through the signal line 34a. This suppresses the occurrence of unnecessary losses in the high-frequency signal.

[0142] The high-frequency device of Example 4 is the high-frequency device described in Example 1 or 2, wherein the inductor 40 has a plurality of conductor patterns p and conductor vias vi formed on the substrate 30, and one end e1 of the lead line 34b may be connected to the signal line 34a on the second surface 32 side of the conductor pattern p that is closest to the second surface 32.

[0143] According to this, the distance from the point where the signal line 34a is connected to the signal electrode 33 (connection point c1) to the point where one end e1 of the lead line 34b is connected to the signal line 34a (connection point c2) can be shortened. As a result, the high-frequency signal input to the signal electrode 33 is transmitted by splitting at connection point c2 (or one end e1) into the signal line 34a and the lead line 34b. This shortens the section of the signal line 34a through which a large current flows, thereby suppressing unnecessary losses in the high-frequency signal.

[0144] The high-frequency device of Example 5 is the high-frequency device described in Example 1 or 2, wherein the inductor 40 includes a plurality of conductor patterns p and conductor vias vi formed on the substrate 30, and the lead line 34b may be led out from the end of the conductor pattern closest to the second surface 32 among the plurality of conductor patterns p and connected to a signal electrode 33 or a signal line 34a.

[0145] This configuration allows for a shorter lead line 34b and a reduced resistance in the lead line 34b. This helps to suppress unwanted losses in the high-frequency signal.

[0146] The high-frequency device of Example 6 is a high-frequency device described in any of Examples 1 to 5, wherein the chip component 10 has a functional element 13 formed by a substrate 14 and a functional electrode 16, and the functional element 13 has one or more elastic wave resonators, and the one or more elastic wave resonators may include at least one of a SAW resonator, a BAW resonator, and an XBAR.

[0147] According to this, insertion loss can be suppressed in the passband of high-frequency devices.

[0148] The high-frequency device in Example 7 is a high-frequency device described in any of Examples 1 to 6, wherein a high-frequency signal is input to the signal electrode 33, and the reference potential electrode 35 may be set to ground potential.

[0149] According to this, when a high-frequency signal is input to the signal electrode 33, it is possible to suppress the flow of a large current through the signal line 34a. This suppresses the occurrence of unnecessary losses in the high-frequency signal.

[0150] The high-frequency device of Example 8 is a high-frequency device described in any of Examples 1 to 7, wherein the first surface 31 is located on the surface of the substrate 30, the second surface 32 is located on the back surface of the substrate 30, and the signal electrode 33 and the reference potential electrode 35 may each be provided on the second surface 32.

[0151] According to this, a surface-mount type high-frequency device consisting of a substrate 30 and chip components 10 can be provided.

[0152] The high-frequency device of Example 9 is a high-frequency device described in any of Examples 1 to 7, wherein the first surface 31 is located on the surface of the substrate 30, and the second surface 32 is parallel to the first surface 31 and may be located inside the substrate 30.

[0153] According to this, a modular high-frequency device including a substrate 30 and chip components 10 can be provided.

[0154] The multiplexer 90 in Example 10 includes a high-frequency device as described in any of Examples 1 to 9.

[0155] According to this, it is possible to provide a multiplexer 90 that can suppress the occurrence of unwanted losses in high-frequency signals.

[0156] (Other embodiments) Although the high-frequency devices and multiplexers of the present invention have been described above, the present invention is not limited to individual embodiments. Without departing from the spirit of the present invention, various modifications to the embodiments that a person skilled in the art can conceive, or forms constructed by combining components from different embodiments, may also be included within the scope of one or more aspects of the present invention. [Industrial applicability]

[0157] The present invention can be widely used in communication devices such as mobile phones as a high-frequency device or multiplexer that can suppress unwanted losses in high-frequency signals. [Explanation of symbols]

[0158] 1, 1A, 1B, 1C, 1D, 1E High-Frequency Devices 10, 10E chip components 11. First opposing surface 14 Base material 15 Conductor section 13, 13a Functional elements 16, 16a functional electrode 17 Wiring electrode 18 terminal electrode 19 resin 30 circuit boards 31 Page 1 32 2nd page 33 Signal electrodes 33E External terminal 34. First track 34a signal line 34b Drawer track 35 Reference potential electrode 35E External terminal 36. Second track 38 Land electrodes 39 Back side 40 Inductors 41 One end 42 The other end 50 Bump electrodes 90 Multiplexer 91, 92, 92a input / output terminals 97 antenna element 98 Power Amplifier c1, c2 connection point e1 One end of the siding track e2 Other end of the siding track n1, n2 nodes p, p12 Conductor Pattern p1 First conductor pattern p2 Second conductor pattern pg ground pattern r1, r2, r12 routes v, vi, vs, vd, vg Conductor vias

Claims

1. A substrate having a first surface and a second surface, A chip component mounted on the first surface of the substrate, Equipped with, The substrate has a signal electrode, a signal line, a lead line, a reference potential electrode, and an inductor. The signal electrode is provided on the second surface and is electrically connected to the functional element of the chip component via the signal line. The aforementioned lead track has one end and the other end, which are the two ends of the lead track. One end of the inductor is connected to the other end of the lead line, and the other end of the inductor is connected to the reference potential electrode. One end of the lead line is connected to the signal electrode or the signal line on the second side of one end of the inductor. High-frequency devices.

2. One end of the inductor is connected to the signal electrode or the signal line via the lead line. The other end of the inductor is connected to the reference potential electrode via another line different from the signal line and the lead line. The high-frequency device according to claim 1.

3. The inductor includes a plurality of conductor patterns and conductor vias formed on the substrate. The lead line is drawn from the end of the conductor pattern closest to the first surface among the plurality of conductor patterns and is connected to the signal electrode or the signal line. The high-frequency device according to claim 1 or 2.

4. The inductor has a plurality of conductor patterns and conductor vias formed on the substrate, One end of the lead line is connected to the signal line on the second surface side of the conductor pattern closest to the second surface among the plurality of conductor patterns. The high-frequency device according to claim 1 or 2.

5. The inductor includes a plurality of conductor patterns and conductor vias formed on the substrate. The aforementioned lead line is drawn from the end of the conductor pattern closest to the second surface among the plurality of conductor patterns and is connected to the signal electrode or the signal line. The high-frequency device according to claim 1 or 2.

6. The chip component has the functional element formed by a substrate and a functional electrode, The functional element has one or more elastic wave resonators, The one or more elastic wave resonators include at least one of the following: a SAW (Surface Acoustic Wave) resonator, a BAW (Bulk Acoustic Wave) resonator, and an XBAR (Transverse Excitation Film Bulk Acoustic Resonator). A high-frequency device according to any one of claims 1 to 5.

7. A high-frequency signal is input to the aforementioned signal electrode. The aforementioned reference potential electrode is set to ground potential. A high-frequency device according to any one of claims 1 to 6.

8. The first surface is located on the surface of the substrate, The second surface is located on the back surface of the substrate, The signal electrode and the reference potential electrode are each provided on the second surface. A high-frequency device according to any one of claims 1 to 7.

9. The first surface is located on the surface of the substrate, The second surface is parallel to the first surface and is located inside the substrate. A high-frequency device according to any one of claims 1 to 7.

10. A multiplexer comprising the high-frequency device described in any one of claims 1 to 9.

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