Semiconductor device and method for manufacturing a semiconductor device

Abstract

It is desirable to ensure insulation between electrodes, which becomes narrower as semiconductor devices are miniaturized. [Solution] A semiconductor device is provided comprising a circuit board having wiring, a semiconductor device having a first main electrode and a second main electrode arranged on a first main surface, a joint portion that joins the first main electrode, the second main electrode and the wiring, and a resin portion provided in contact with the circuit board and the semiconductor device in a region where the first main electrode and the second main electrode are not provided, wherein the joint portion contains resin, and the resin portion contains a resin having the same components as the resin of the joint portion.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device.

Background Art

[0002] Patent Document 1 describes a circuit board assembly including "a circuit board 1 and electrical components 3 embedded in a cured plastic layer 2" (paragraph 0031). In its manufacturing method, it is described that "when applying the plastic layer 2 onto the circuit board 1 with electrical components 3 mounted on one or both sides, uncured plastic for the plastic layer 2 is placed onto the circuit board 1 as a film or plate. Subsequently or beforehand, a window 2A is cut into the plastic at the position of the component 3 to be cooled. In the region of the window 2A, solder 5 is applied onto the component 3 to be cooled." (paragraph 0039). Patent Document 1: Japanese Patent Application Laid-Open No. 2019-536283

Summary of the Invention

Problems to be Solved by the Invention

[0003] It is desirable to ensure insulation between electrodes, which becomes narrower due to miniaturization of semiconductor devices.

Means for Solving the Problems

[0004] To solve the above problems, in a first aspect of the present invention, there is provided a semiconductor device including a circuit board having wiring, a semiconductor device having a first main electrode and a second main electrode disposed on a first main surface, and a bonding portion that bonds the first main electrode and the second main electrode to the wiring. The semiconductor device may include a resin portion provided in contact with the circuit board and the semiconductor device in a region where the first main electrode and the second main electrode are not provided. In any of the above semiconductor devices, the bonding portion may contain resin. In any of the above semiconductor devices, the resin portion may contain resin having the same components as the resin of the bonding portion.

[0005] In any of the semiconductor devices described above, the resin portion may be provided between the first main electrode and the second main electrode.

[0006] In any of the semiconductor devices described above, the distance between the first main electrode and the second main electrode may be less than 3.5 mm.

[0007] In any of the semiconductor devices described above, the resin portion may also be provided on the outside of the first main electrode and / or on the outside of the second main electrode, at least one of the two.

[0008] In any of the semiconductor devices described above, the resin portion may cover at least a portion of the side surface of the semiconductor device.

[0009] Any of the above semiconductor devices may comprise a plurality of the semiconductor devices. In any of the above semiconductor devices, the resin portion may be provided between the plurality of semiconductor devices.

[0010] Any of the above semiconductor devices may include a cooler positioned on the opposite side of the semiconductor device from the circuit board. Any of the above semiconductor devices may include a sintered portion that joins the cooler and the semiconductor device.

[0011] In any of the semiconductor devices described above, the sintered portion and the resin portion do not need to be in contact.

[0012] To solve the above problems, a second aspect of the present invention provides a method for manufacturing a semiconductor device, in which a bonding material containing resin is placed between a semiconductor device having a first main electrode and a second main electrode arranged on a first main surface and a circuit board having wiring, and a portion of the resin is pushed out of the bonding region which is the region between the first main electrode and the second main electrode and the wiring to form a bonding portion that bonds the first main electrode and the second main electrode and the wiring.

[0013] In the above-described method for manufacturing a semiconductor device, the bonding material may contain solder. In any of the above-described methods for manufacturing a semiconductor device, the solder may be agglomerated by heating the bonding material, thereby extruding the resin.

[0014] In any of the above-described methods for manufacturing a semiconductor device, heating the bonding material may form a resin portion containing the same resin as the resin in a region other than the bonding region between the semiconductor device and the circuit board.

[0015] In any of the above-described methods for manufacturing a semiconductor device, the resin portion may cover at least a portion of the side surface of the semiconductor device.

[0016] In any of the above methods for manufacturing a semiconductor device, the resin portion does not need to cover the side of the semiconductor device opposite to the circuit board.

[0017] In any of the above methods for manufacturing a semiconductor device, after forming the resin portion, the side of the semiconductor device opposite to the circuit board may be sintered onto a cooler.

[0018] In any of the above methods for manufacturing a semiconductor device, a plurality of the semiconductor devices may be bonded to the circuit board at once. In any of the above methods for manufacturing a semiconductor device, a plurality of the semiconductor devices may be sintered to the cooler at once.

[0019] The above summary of the invention does not enumerate all the necessary features of the present invention. Furthermore, subcombinations of these features may also constitute an invention. [Brief explanation of the drawing]

[0020] [Figure 1] This is a perspective view of the semiconductor chip 10 according to this embodiment. [Figure 2] This is a perspective view of device 200 according to this embodiment. [Figure 3] This is a perspective view of the mounted substrate 210 according to this embodiment. [Figure 4] FIG. 1 is a perspective view of a mounting substrate 210 according to the present embodiment, in a state where a semiconductor chip 10, a source electrode 220, a gate electrode 240, and a sub-source electrode 250 are joined thereto. [Figure 5] FIG. 2 is a side view of a device 200 according to the present embodiment. [Figure 6] FIG. 3 is a cross-sectional view taken along line A-A' shown in FIG. 2 or FIG. 3. [Figure 7] FIG. 4 is a cross-sectional view of a semiconductor device 800 according to the present embodiment. [Figure 8] FIG. 5 is a flowchart showing an example of a method for manufacturing a semiconductor device 800. [Figure 9A] FIG. 6 is a view showing a circuit board preparation step S1010. [Figure 9B] FIG. 7 is a view showing a bonding material application step S1020. [Figure 9C] FIG. 8 is a view showing a device mounting step S1030. [Figure 9D] FIG. 9 is a view showing a heating step S1040. [Figure 9E] FIG. 10 is a view showing a sintering material preparation step S1050. [Figure 9F] FIG. 11 is a view showing a sintering bonding step S1060. [Figure 10A] FIG. 12 is a view for explaining a formation process of a joint portion 40 in the heating step S1040. [Figure 10B] FIG. 13 is a view for explaining a formation process of a joint portion 40 in the heating step S1040. [Figure 10C] FIG. 14 is a view for explaining a formation process of a joint portion 40 in the heating step S1040. [Figure 11] FIG. 15 is a schematic view showing an example of the inside of the joint portion 40.

BEST MODE FOR CARRYING OUT THE INVENTION

[0021] The present invention will be described below through embodiments of the invention, but these embodiments are not intended to limit the invention as defined in the claims. Furthermore, not all combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0022] In this specification, the terms "identical" or "equal" may include cases where there are errors due to manufacturing variations, etc. Such errors are, for example, within 10%.

[0023] Figure 1 is a perspective view of the semiconductor chip 10 according to this embodiment. The semiconductor chip 10 is a switching element such as a MOSFET (metal-oxide-semiconductor field-effect transistor). The semiconductor chip 10 may be a vertical switching element. The semiconductor chip 10 in this example is a vertical MOSFET. The semiconductor chip 10 may be a Si semiconductor element such as a Si-MOSFET, or a SiC semiconductor element such as a SiC-MOSFET that can switch at a higher speed, and may use a wide-bandgap semiconductor such as GaN, diamond, gallium nitride-based material, gallium oxide-based material, AlN, AlGaN, or ZnO. Alternatively, the semiconductor chip 10 may be a semiconductor switching element such as an IGBT (insulated gate bipolar transistor), or a SiC-IGBT. Furthermore, the semiconductor chip 10 may be a HEMT (high electron mobility transistor).

[0024] The semiconductor chip 10 has an upper surface 21 and a lower surface 23. The upper surface 21 and the lower surface 23 are the two main surfaces of the semiconductor chip 10. The semiconductor chip 10 has a source pad 100 and a gate pad 110 located on the upper surface 21, and a drain pad 120 located on the lower surface 23. The source pad 100 is an example of a first main pad, and the drain pad 120 is an example of a second main pad. For example, if the semiconductor chip 10 is an IGBT, an emitter pad is provided instead of the source pad 100 as the first main pad, and a collector pad is provided instead of the drain pad 120 as the second main pad. Each pad may be formed of a metal such as aluminum. By applying a predetermined gate voltage to the gate pad 110, a main current flows between the source pad 100 and the drain pad 120. The semiconductor chip 10 may further have a sense pad 130 on the upper surface 21.

[0025] Figure 2 is a perspective view of the device 200 according to this embodiment. A semiconductor module using a switching element, such as the semiconductor chip 10 shown in Figure 1, generally has a structure in which a pad (drain pad 120) provided on one side of the switching element (e.g., the bottom surface 23) is bonded to a wiring pattern on the substrate, and each pad (e.g., source pad 100, gate pad 110, and sense pad 130) on the other side (e.g., the top surface 21) is electrically connected to other wiring patterns by wire bonding. Such a semiconductor module is realized as an integrated module by resin-encapsulating the substrate on which the switching element is mounted, each bonding wire, and each metal plate connected to the positive terminal, negative terminal, and output terminal.

[0026] In contrast, the device 200 has a structure in which each electrode electrically connected to each pad of the semiconductor chip 10 is exposed on one side of the plate-shaped device 200. In this embodiment, the device 200 comprises a mounting substrate 210, a source electrode 220, a drain electrode 230, a gate electrode 240, a sub-source electrode 250, and a sealing portion 260.

[0027] The mounting substrate 210 has a semiconductor chip 10 mounted on its mounting surface 25 (upper surface in the figure). The source electrode 220 is electrically connected to the source pad 100 of the semiconductor chip 10. The drain electrode 230 is electrically connected to the drain pad 120 of the semiconductor chip 10. The gate electrode 240 is electrically connected to the gate pad 110 of the semiconductor chip 10. The sub-source electrode 250 is electrically connected to the source pad 100 of the semiconductor chip 10.

[0028] The source electrode 220 is an example of a first main electrode, and the drain electrode 230 is an example of a second main electrode. The first and second main electrodes are electrodes through which the main current of the semiconductor chip 10 flows. The main current refers to the current with the largest amplitude among the currents flowing through the semiconductor chip 10. The main current is, for example, the current flowing between the emitter and collector in an IGBT, or the current flowing between the source and drain in a MOSFET. For example, if the semiconductor chip 10 is an IGBT, the emitter electrode is provided as the first main electrode instead of the source electrode 220, and the collector electrode is provided as the second main electrode instead of the drain electrode 230. Also, the sub-source electrode 250 is an example of a sub-electrode. If the semiconductor chip 10 is an IGBT, the sub-emitter electrode is provided as a sub-electrode instead of the sub-source electrode 250.

[0029] The side of the device 200 opposite to the mounting substrate 210 is designated as the first main surface 261. The first main surface 261 is also the surface of the sealing portion 260. The side of the device 200 opposite to the sealing portion 260 is designated as the second main surface 262. The second main surface 262 is also the main surface of the mounting substrate 210 opposite to the mounting surface 25. The source electrode 220, drain electrode 230, gate electrode 240, and sub-source electrode 250 are arranged on the first main surface 261. The sealing portion 260 covers the semiconductor chip 10 and the mounting surface 25 while exposing at least a portion of the source electrode 220, drain electrode 230, gate electrode 240, and sub-source electrode 250. The sealing portion 260 may be made of a molding material. However, the sealing portion 260 is not required.

[0030] Instead of modularizing switching elements such as the semiconductor chip 10 as described above, by using the device 200 of this embodiment and bonding each electrode of the first main surface 261 of the device 200 to the wiring pattern on the substrate, all the necessary electrodes on the semiconductor chip 10 can be electrically connected to the wiring on the substrate without wire bonding. As a result, as will be described later, it can be directly bonded to a printed circuit board or the like, reducing the thickness of the module and significantly decreasing inductance and thermal resistance.

[0031] The device 200 may further have electrodes on its first main surface 261 that are electrically connected to the sense pad 130. Both the source electrode 220 and the sub-source electrode 250 are electrically connected to the source pad 100 of the semiconductor chip 10. The source electrode 220 has a large surface area and is used to carry a large current (main current), while the sub-source electrode 250, in conjunction with the gate electrode 240, is used to control the semiconductor chip 10. In other embodiments, the device 200 does not need to include the sub-source electrode 250; in this case, the source electrode 220 is also used to control the semiconductor chip 10.

[0032] Figure 3 is a perspective view of the mounting substrate 210 according to this embodiment. The mounting substrate 210 has an insulating substrate 500, a source electrode wiring 510, a gate electrode wiring 520, and a sub-source electrode wiring 530.

[0033] The insulating substrate 500 may be a substrate made of Si, silicon nitride, or aluminum nitride, or it may be made using other ceramic materials. Wiring patterns for source electrode wiring 510, gate electrode wiring 520, and sub-source electrode wiring 530 are provided on the mounting surface 25, which is the surface of the insulating substrate 500.

[0034] The source electrode wiring 510 is formed from a conductive metal film or metal plate such as copper. The source electrode wiring 510 includes a source pad contact 513, wiring 515, and source electrode contact 517. The source pad contact 513 is the area connected to the source pad 100 of the semiconductor chip 10. The wiring 515 electrically connects the source pad contact 513 and the source electrode contact 517. The source electrode contact 517 is the area connected to the source electrode 220. In Figure 3, the source pad contact 513 and the source electrode contact 517 are hatched. The source electrode wiring 510 is an example of first main electrode wiring. For example, if the semiconductor chip 10 is an IGBT, the first main electrode wiring will be emitter electrode wiring instead of source electrode wiring 510.

[0035] The gate electrode wiring 520, like the source electrode wiring 510, is formed from a conductive metal film or metal plate such as copper. The gate electrode wiring 520 includes a gate pad contact 523, wiring 525, and gate electrode contact 527. The gate pad contact 523 is the area connected to the gate pad 110 of the semiconductor chip 10. Wiring 525 electrically connects the gate pad contact 523 and the gate electrode contact 527. The gate electrode contact 527 is the area connected to the gate electrode 240. In Figure 3, the gate pad contact 523 and the gate electrode contact 527 are hatched.

[0036] The sub-source electrode wiring 530, like the source electrode wiring 510, is formed from a conductive metal film or metal plate such as copper. The sub-source electrode wiring 530 includes a source pad contact 513, wiring 535, and a sub-source electrode contact 537. The source pad contact 513 is shared with the source electrode wiring 510. The sub-source electrode wiring 530 may utilize a portion of the source pad contact 513 used by the source electrode wiring 510. Wiring 535 electrically connects the source pad contact 513 and the sub-source electrode contact 537. Wiring 535 may have a smaller wiring width than wiring 515. The sub-source electrode contact 537 is the area connected to the sub-source electrode 250. In Figure 3, hatching is applied to the sub-source electrode contact 537. The sub-source electrode wiring 530 is an example of sub-electrode wiring. For example, if the semiconductor chip 10 is an IGBT, the sub-electrode wiring will be sub-emitter electrode wiring instead of sub-source electrode wiring 530.

[0037] Figure 4 is a perspective view showing the semiconductor chip 10, source electrode 220, gate electrode 240, and sub-source electrode 250 bonded to the mounting substrate 210 according to this embodiment. In this example, a drain electrode 230 is bonded to the drain pad 120 of the semiconductor chip 10. The drain electrode 230 is also a conductive plate-shaped member such as a copper plate. In Figure 4, the position of the semiconductor chip 10 located below the drain electrode 230 is indicated by a dotted line.

[0038] The drain electrode 230 may be joined to the drain pad 120 using silver sintering bonding. It may also be joined by direct bonding between metals. Direct bonding involves directly joining the drain pad 120 and the drain electrode 230, and the metals may be gold to gold or copper to copper. In addition to the above, it may also be joined via solder material or gold pillars. Alternatively, the drain electrode 230 may be joined to the drain pad 120 of the semiconductor chip 10 by a plurality of bumps arranged regularly or irregularly on the drain electrode 230. This electrically connects the drain electrode 230 to the drain pad 120. However, the drain electrode 230 is not required. In that case, the drain pad 120 may be directly exposed on the first main surface 261 of the device 200. The drain electrode 230 as described herein also includes the drain pad 120 in that case.

[0039] The semiconductor chip 10 is bonded to the mounting surface 25 of the mounting substrate 210 with its upper surface 21 facing downwards as shown in Figure 1. As a result, the source pad 100 of the semiconductor chip 10 is bonded to the source pad contact 513 of the source electrode wiring 510 and sub-source electrode wiring 530, and the gate pad 110 of the semiconductor chip 10 is bonded to the gate pad contact 523 of the gate electrode wiring 520. These bonding methods may be the same as the bonding method for the drain electrode 230 to the drain pad 120.

[0040] In Figure 4, the source electrode 220, gate electrode 240, and sub-source electrode 250 are bonded to the mounting substrate 210 according to this embodiment. The source electrode 220 is bonded to the source electrode contact 517 of the source electrode wiring 510. The gate electrode 240 is bonded to the gate electrode contact 527 of the gate electrode wiring 520. The sub-source electrode 250 is bonded to the sub-source electrode contact 537 of the sub-source electrode wiring 530. These bonding methods may be the same as the bonding method for the drain electrode 230 to the drain pad 120.

[0041] As a result, the source electrode 220 is electrically connected to the source pad 100, and the gate electrode 240 is electrically connected to the gate pad 110. A main current flows between the drain electrode 230 and the source electrode 220, and the control signal from the semiconductor chip 10 is input to the gate electrode 240.

[0042] As shown in Figure 4, the source electrode 220 is positioned so as not to overlap with the semiconductor chip 10. The gate electrode 240 and sub-source electrode 250 are positioned similarly. This ensures sufficient distance between the semiconductor chip 10 and each electrode, thereby suppressing the effects of heat generation from the semiconductor chip 10.

[0043] Figure 5 is a side view of the device 200 according to this embodiment. As described above, a sealing portion 260 is provided above the mounting substrate 210. Parts of the source electrode 220, drain electrode 230, and gate electrode 240 are covered by the sealing portion 260, and parts of them are exposed above the first main surface 261 of the sealing portion 260. In other words, at least a portion of the space between each electrode in a plane horizontal to the first main surface 261 is not filled with the sealing portion 260. The same may apply to the sub-source electrode 250.

[0044] Figure 6 is a cross-sectional view along the line A-A' shown in Figure 2 or Figure 3. The cross-section along line A-A' is a cross-section that crosses the semiconductor chip 10, source electrode 220, drain electrode 230, gate electrode 240, source electrode wiring 510, and gate electrode wiring 520. In this cross-section, the semiconductor chip 10 is connected to the drain electrode 230, source pad contact 513, and gate pad contact 523. Also, the source electrode 220 is connected to the source electrode contact 517, and the gate electrode 240 is connected to the gate electrode contact 527. All of these connection points may be covered by the sealing portion 260. Furthermore, no electrodes are provided on the second main surface 262, and the second main surface 262 is insulated.

[0045] Figure 7 is a cross-sectional view of the semiconductor device 800 according to this embodiment. The semiconductor device 800 comprises a device 200, a circuit board 810, a bonding portion 40, and a resin portion 50. The semiconductor device 800 may further comprise a cooler 60 and a sintered portion 70.

[0046] Device 200 is the device 200 described in Figures 1 to 6. However, in Figure 7, the internal configuration of device 200 described in Figure 6 is omitted from the illustration. The semiconductor device 800 may comprise one device 200 or multiple devices 200. The semiconductor device 800 in this example comprises device 200-1 and device 200-2. Device 200-2 is positioned in a plane parallel to the device mounting surface of the circuit board 810, rotated 180° from device 200-1. In Figure 7, the orientation of each electrode of device 200-2 (for example, the direction from the source electrode 220 toward the gate electrode 240) is 180° different from the orientation of each electrode of device 200-1.

[0047] Device 200 may be a power device (power semiconductor) that controls and converts high voltage and high current. Device 200 does not have to be a logic semiconductor used for information processing or a semiconductor device used in MEMS (Micro Electro Mechanical System). For example, the rated current of device 200 may be 1A or more. Semiconductor device 800 may be used as an inverter for automotive applications, for example.

[0048] The circuit board 810 has wirings 818-1 to 818-6. At least a portion of these wirings is located inside the circuit board 810 and transmits current or signals to the device 200. Figure 7 shows the wirings 818-1 to 818-6 exposed on surface 825, which is the surface facing the device 200, one of the two main surfaces of the circuit board 810. The circuit board 810 may be a printed circuit board. In this specification, components of device 200-1 may be denoted by -1, and components of device 200-2 may be denoted by -2. For example, the source electrode 220 of device 200-1 may be referred to as source electrode 220-1.

[0049] The junction 40 connects the source electrode 220-1 to the wiring 818-3, and the drain electrode 230-1 to the wiring 818-2. The junction 40 also connects the source electrode 220-2 to the wiring 818-4, and the drain electrode 230-2 to the wiring 818-5. The junction 40 may also connect the wiring 818-1 to another electrode, such as the gate electrode 240-1 or the sub-source electrode 250-1. The junction 40 may also connect the wiring 818-6 to another electrode, such as the gate electrode 240-2 or the sub-source electrode 250-2. The junction 40 electrically connects each electrode to each wiring 818-1 to 818-6. Devices 200-1 and 200-2 may be connected in parallel. That is, source electrode 220-1 and source electrode 220-2 may be connected by wiring 818-3 and wiring 818-4. Also, drain electrode 230-1 and drain electrode 230-2 may be connected by wiring 818-2 and wiring 818-5. In another example, device 200-1 and device 200-2 may be connected in series to form one arm. That is, source electrode 220-1 and drain electrode 230-2 may be connected by wiring 818-2 and wiring 818-5. In Figure 7, the junction 40 is shown with fine hatching. The junction 40 may be solder.

[0050] The resin portion 50 is provided in contact with the circuit board 810 and the power device 200 in areas where the source electrode 220 and drain electrode 230 are not provided. The resin portion 50 may fill the space between the circuit board 810 and the power device 200. In this example, the resin portion 50 is provided between the first main surface 261 of the device 200 and the surface 825 of the circuit board 810, between the devices 200, and on a part of the side surface of the device 200. In Figure 7, the resin portion 50 is given a rough hatching. The resin portion 50 may be a thermosetting resin or an epoxy resin.

[0051] The joint 40 in this example contains resin. If the joint 40 is made of solder, voids may be formed in the solder, and these voids may contain resin. The joint 40 is the part responsible for the electrical connection between the electrode and the wiring 818-1 to 818-6, and resin may be contained inside this part. The resin contained in the joint 40 can be identified by allowing the resin to penetrate the solder during or after solder mounting X-ray inspection. The resin contained in the joint 40 in an internal region away from the end face of the joint 40 may be considered as the resin contained in the joint 40. The internal region may be 1 mm or more away from the end face of the joint 40, 2 mm or more away, or 5 mm or more away.

[0052] In this example, the resin part 50 contains a resin with the same components as the resin of the joint part 40. In other words, the joint part 40 contains a resin with the same components as the resin of the resin part 50. This resin may be distributed throughout the entire resin part 50. The main resin in the resin part 50 may be the same component as the resin contained in the joint part 40. The main resin may be the resin with the largest total weight among the resins contained in the resin part 50, or it may be the resin with the largest total volume. Such a joint part 40 and resin part 50 can be manufactured using epoxy flux-cored solder, as described later, as an example.

[0053] The resin portion 50 may be provided between the source electrode 220 and the drain electrode 230. Providing the resin portion 50 between the electrodes can improve the insulation performance between the electrodes. In cross-section, the resin portion 50 may be provided over the entire region enclosed by the source electrode 220, the drain electrode 230, the first main surface 261 of the power device 200, and the surface 825 of the circuit board 810. That is, the resin portion 50 may fill the region. The resin portion 50 may also be provided between the source electrode 220 and the gate electrode 240, or between the drain electrode 230 and the gate electrode 240. The same may apply to the sub-source electrode 250.

[0054] The distance between the source electrode 220 and the drain electrode 230 may be less than 3.5 mm. For example, if air is filled between the source electrode 220 and the drain electrode 230, approximately 3.5 mm is required to guarantee 1.2 kV insulation. The resin part 50 may have a higher dielectric strength than air. This makes it possible to guarantee 1.2 kV insulation even if the distance is less than 3.5 mm. The distance may be less than 3.0 mm, less than 2.5 mm, less than 2.0 mm, less than 1.5 mm, or less than 1.0 mm. The distance may be greater than 0.1 mm. The distance between the source electrode 220 and the gate electrode 240, or between the drain electrode 230 and the gate electrode 240, may be similar. The distance between the sub-source electrode 250 and other electrodes may also be similar.

[0055] The resin portion 50 may also be provided on the outside of at least one of the source electrode 220 or the drain electrode 230. "Outside" refers to the end side of the device 200, beyond the center. In this example, "outside of the drain electrode 230" may refer to the area between the drain electrode 230 and the end of the device 200 in a direction perpendicular to the plane of the paper. In this example, the resin portion 50 is provided on both the outside of the source electrode 220 and the outside of the drain electrode 230. The resin portion 50 may also be provided on the outside of the gate electrode 240 or the outside of the sub-source electrode 250.

[0056] The resin portion 50 may cover at least a portion of the side surface of the device 200. In this example, the resin portion 50 covers the entire side surface of the sealing portion 260 and a portion of the side surface of the mounting substrate 210. This ensures the voltage withstand capability of the edges of the device 200, and allows the use of a non-insulating TIM (Thermal Interface Material), as described later.

[0057] The resin part 50 does not need to cover the second main surface 262 of the device 200. This prevents the resin part 50 from becoming a thermal resistance when the device 200 dissipates heat. The resin part 50 does not need to cover at least a portion of the side surface of the device 200. In other examples, the resin part 50 may cover the entire side surface of the device 200.

[0058] The resin portion 50 may be provided between multiple devices 200. The space between multiple devices 200 may be between electrodes of multiple devices 200, or it may be between sides of devices 200.

[0059] The cooler 60 is positioned on the opposite side of the circuit board 810 from the device 200. Devices 200-1 and 200-2 in this example are mounted on the cooler 60. The cooler 60 may be, for example, a heat spreader, a heat sink, or a heat exchanger for liquid cooling.

[0060] The cooler 60 and each device 200 may be joined by a sintered portion 70. The sintered portion 70 is an example of a TIM. The sintered material constituting the sintered portion 70 may be conductive. The sintered material may be silver. Since the second main surface 262 of the device 200 in this example is insulated, a non-insulating TIM can be used. For example, the thermal conductivity of silver sintered material is about 200 times greater than that of heat dissipation grease. Therefore, the heat dissipation performance of the semiconductor device 800 in this example can be greatly improved. The thickness of the sintered portion 70 may be 5 mm or less, 1 mm or less, or 0.1 mm or more. The sintered portion 70 may protrude outward from the area between the device 200 and the cooler 60. If the sintered portion 70 protrudes from between the device 200 and the cooler 60, it can be determined that the cooler 60 and the device 200 are sintered by the sintered portion 70. Furthermore, it may be determined that a sintered portion 70 is provided by analyzing the protruding portion mentioned above or the composition of the material between the device 200 and the cooler 60.

[0061] The sintered portion 70 and the resin portion 50 do not need to be in contact. This prevents the resin portion 50 from being positioned between the sintered portion 70 and the device 200 and becoming a thermal resistance. However, the sintered portion 70 and the resin portion 50 may be in contact. Even in that case, it is preferable that the resin portion 50 is not provided between the sintered portion 70 and the device 200. Similarly, it is preferable that the resin portion 50 is not provided between the sintered portion 70 and the cooler 60. The resin portion 50 does not need to be in contact with the cooler 60.

[0062] Figure 8 is a flowchart showing an example of a method for manufacturing a semiconductor device 800. The manufacturing method in this example comprises a circuit board preparation step S1010, a bonding material coating step S1020, a device mounting step S1030, a heating step S1040, a sintering material preparation step S1050, and a sintering bonding step S1060.

[0063] Figure 9A shows the circuit board preparation process S1010. In the circuit board preparation process S1010, the circuit board 810 described in Figure 7 is prepared. Note that in the explanation from this process to the heating process S1040, the semiconductor device 800 is shown upside down compared to Figure 7.

[0064] Figure 9B shows the bonding material application process S1020. In the bonding material application process S1020, bonding material 32 is applied to the surface 825 of the circuit board 810. The bonding material 32 may be applied so as to cover the wiring 818-1 to 818-6. In Figure 9B, hatching is applied to the bonding material 32.

[0065] The bonding material 32 may contain solder. The bonding material 32 may also contain resin. That is, the bonding material 32 may be a mixture of solder and resin. The bonding material 32 may have solder powder distributed within the resin. The solder may contain tin and may contain lead. The solder may be, for example, SAC305 solder, eutectic solder, or high-temperature solder. The bonding material 32 may be flux-cored solder. Epoxy flux may be used as the flux. The volume ratio of resin to solder in the bonding material 32 is, for example, 7:3 or 6:4. This volume ratio may be appropriately changed depending on the electrode area and inter-electrode distance of the device 200.

[0066] Figure 9C shows the device mounting process S1030. In the device mounting process S1030, the device 200 is mounted so as to be in contact with the bonding material 32. The surface of the device 200 that is in contact with the bonding material 32 is the first main surface 261, and each electrode of the device 200 may also be covered by the bonding material 32.

[0067] Each electrode of the device 200 and the wirings 818-1 to 818-6 may be arranged to overlap in a direction perpendicular to the first main surface 261. The region between the source electrode 220 and the drain electrode 230 and the wirings 818-1 to 818-6 is defined as the junction region 90. The junction region 90 may be filled with the bonding material 32. The region between other electrodes, such as the gate electrode 240, and the wirings 818-1 to 818-6 may also be defined as the junction region 90.

[0068] In the processes from the circuit board preparation step S1010 to the device mounting step S1030, a bonding material 32 is placed between the device 200 and the circuit board 810. However, the manufacturing method in this example is just one example; for example, the bonding material 32 may be applied to the first main surface 261 of the device 200, and the circuit board 810 may be mounted on top of it.

[0069] Figure 9D shows the heating process S1040. In the heating process S1040, the bonding material 32 is heated. Due to the heating, the solder (e.g., solder powder) contained in the bonding material 32 aggregates in the region between each electrode of the metal material and the wirings 818-1 to 818-6. This pushes a portion of the resin contained in the bonding material 32 between each electrode and the wirings 818-1 to 818-6 out of the bonding region 90, forming the joint 40. The joint 40 bonds the source electrode 220 and the drain electrode 230 to the wirings 818-1 to 818-6. In Figure 9D, the joint 40 is shown with fine hatching. The process of forming the joint 40 in the heating process S1040 will be described later.

[0070] In the heating step S1040, a resin portion 50 is formed in the area between the device 200 and the circuit board 810, excluding the bonding region 90. The resin portion 50 contains the same resin as the bonding material 32. The resin portion 50 may contain resin extruded from the bonding region 90. No solder that was contained in the bonding material 32 remains in the resin portion 50. The formation of the resin portion 50 improves the insulation performance as described above. In particular, when the device 200 is miniaturized and the distance between electrodes becomes small, it is desirable to form a resin portion 50 between the electrodes to improve insulation performance. However, because the distance between electrodes is small, it becomes difficult to form the resin portion 50 after bonding the device 200 and the circuit board 810. In the manufacturing method of this example, the resin portion 50 can be formed between electrodes even if the distance between electrodes is small. In addition, since bonding the device 200 and the circuit board 810 and forming the resin portion 50 can be performed simultaneously, the increase in the number of processes can be suppressed. The resin portion 50 does not need to contain solder. In Figure 9D, the resin part 50 is given a coarse hatching pattern.

[0071] At the end of the heating process S1040, the resin portion 50 may be provided between the electrodes of the device 200, as described in Figure 7, or it may be provided on the outside of the electrodes. This can improve the insulation performance. The resin portion 50 may also cover at least a portion of the side surface of the device 200. This ensures the withstand voltage of the edges of the device 200, as described above, and allows the use of non-insulating TIM.

[0072] The resin part 50 does not need to cover the second main surface 262 of the device 200 (the surface opposite to the circuit board 810). This prevents the resin part 50 from becoming a thermal resistance. The resin part 50 does not need to cover the entire second main surface 262. The end of the resin part 50 on the second main surface 262 side may be located closer to the first main surface 261 than to the second main surface 262. Also, if there are multiple devices 200, the resin part 50 may be provided on all devices 200, or it may be provided between multiple devices 200.

[0073] Figure 9E shows the sintering material preparation step S1050. In the sintering material preparation step S1050, sintering material 72 is formed on the surface of the cooler 60. As mentioned above, the sintering material 72 may be conductive, and silver is one example.

[0074] Figure 9F shows the sintering bonding process S1060. In the sintering bonding process S1060, the sintered material 72 is heated and pressure is applied to sinter the second main surface 262 of the device 200 to the cooler 60. In the sintering bonding process S1060, the sintered material 72 is sintered to become a sintered part 70 such as sintered silver.

[0075] In the manufacturing process, after forming the resin part 50, the second main surface 262 of the device 200 may be sintered onto the cooler 60. The misalignment of each electrode and wiring 818-1 to 818-6 of the device 200 is less acceptable than the misalignment between the cooler 60 and the device 200. By joining the electrodes and wiring 818-1 to 818-6 first, the misalignment of the electrodes and wiring 818-1 to 818-6 can be reduced. However, in that case, the joint between the circuit board 810 and the device 200 must withstand the pressure during sintering. The pressure during sintering is approximately 20 MPa as an example. Even if a non-pressurized sintering material is used as the sintering material 72, a pressure of approximately 5 MPa is applied. In this embodiment, since the resin part 50 is formed between the device 200 and the circuit board 810, or between multiple devices 200, the joint strength between the device 200 and the circuit board 810 is improved, and it can withstand the pressure during sintering. Furthermore, pressure applied from the side opposite to the surface 825 of the circuit board 810 is transmitted through the joint 40 and the resin part 50 and applied uniformly to the sintered material 72.

[0076] If there are multiple devices 200, the multiple devices 200 may be joined to the circuit board 810 all at once. Joining all at once means, for example, bringing the multiple devices 200 into contact with the circuit board 810 via the joining material 32 before heating, and then heating the circuit board 810 and the multiple devices 200 to join them. This heating may be performed, for example, by placing the circuit board 810 and the multiple devices 200 into a furnace and heating the whole assembly.

[0077] If there are multiple devices 200, the multiple devices 200 may be sintered together in the cooler 60. Sintering together means, for example, that the multiple devices 200 are in contact with the cooler 60 via the sintered material 72 before sintering, and the circuit board 810 and the multiple devices 200 are heated and pressurized to sinter them together.

[0078] Figures 10A to 10C illustrate the formation process of the joint 40 in the heating process S1040. Figure 10A shows the state of the joining material 32 before heating. In Figures 10A to 10C, the joining material 32 is epoxy flux-cored solder. In this example, the joining material 32 contains solder powder 34 and resin 36. At this stage, the solder powder 34 and resin 36 are mixed together. In Figure 10A, the solder powder 34 is hatched.

[0079] Figure 10B shows the state of the bonding material 32 during heating. When the bonding material 32 is heated, the solder powder 34 attracts each other by intermolecular forces or surface tension, and aggregates self-organizingly, forming a layer of solder (bond) in the bonding region 90. In addition, a solder-repellent resist may be applied to the parts of the circuit board 810 other than the wiring 818-1 to 818-6. Furthermore, the sealing portion 260 of the device 200 is made of epoxy resin, so the solder does not wet it. Therefore, the solder layer is formed between the electrode and the wiring 818-1 to 818-6.

[0080] Figure 10C shows the state of the bonding material 32 after heating. Further solder aggregation progresses from Figure 10B, forming the joint 40. Also, the viscosity of the resin 36 decreases and hardens over time, forming the resin part 50. As the solder aggregates, some of the resin 36 that was present in the bonding region 90 is pushed out of the bonding region 90 and becomes part of the resin part 50. However, the remaining portion of the resin 36 that was present in the bonding region 90 is incorporated into the joint 40. As a result, the resin part 50 and the joint 40 contain resin 36 of the same component.

[0081] Figure 11 is a schematic diagram showing an example of the interior of the joint 40. In this example, the joint 40 includes a solder layer 42 and resin 36. As the joint 40 is formed, voids are formed in the solder layer 42. The resin 36 that was present in the joint region 90 remains in these voids, and thus the joint 40 contains resin 36. The volume of resin 36 in the joint 40 may be 1% or less, 0.1% or less, or 0.01% or more of the total volume of the joint 40.

[0082] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications or improvements can be made to the above embodiments. It will be clear from the claims that such modified or improved forms may also be included in the technical scope of the present invention.

[0083] It should be noted that the execution order of operations, procedures, steps, and stages in the apparatus, systems, programs, and methods shown in the claims, specifications, and drawings is not explicitly stated as "before," "prior to," etc., and that these can be implemented in any order unless the output of a previous process is used in a later process. Even if the operation flow in the claims, specifications, and drawings is described using phrases such as "first," "next," etc. for convenience, it does not mean that it is essential to perform the operations in that order. [Explanation of Symbols]

[0084] 10...Semiconductor chip, 21...Top surface, 23...Bottom surface, 25...Mounting surface, 32...Bonding material, 34...Solder powder, 36...Resin, 40...Bond, 42...Solder layer, 50...Resin part, 60...Cooler, 70...Sintered part, 72...Sintered material, 90...Bonding area, 100...Source pad, 110...Gate pad, 120...Drain pad, 130...Sense pad, 200...Device, 210...Mounting substrate, 220...Source electrode, 230...Drain electrode, 240...Gate electrode, 250...Sub-source Electrode, 260...Sealing portion, 261...First main surface, 262...Second main surface, 500...Insulating substrate, 510...Source electrode wiring, 513...Source pad contact, 515...Wiring, 517...Source electrode contact, 520...Gate gate wiring, 523...Gate pad contact, 525...Wiring, 527...Gate gate contact, 530...Sub-source electrode wiring, 535...Wiring, 537...Sub-source electrode contact, 800...Semiconductor device, 810...Circuit board, 818-1~818-6...Wiring, 825...Surface

Claims

1. A circuit board having wiring, A semiconductor device having a first main electrode and a second main electrode arranged on a first main surface, A joint portion that connects the first main electrode and the second main electrode and the wiring, In the region where the first main electrode and the second main electrode are not provided, the resin portion provided in contact with the circuit board and the semiconductor device Equipped with, The aforementioned joint contains resin, The resin portion includes a resin having the same components as the resin of the joint portion. Semiconductor equipment.

2. The resin portion is provided between the first main electrode and the second main electrode. The semiconductor device according to claim 1.

3. The distance between the first main electrode and the second main electrode is less than 3.5 mm. The semiconductor device according to claim 2.

4. The resin portion is also provided on the outside of the first main electrode and / or on the outside of the second main electrode. The semiconductor device according to claim 2.

5. The resin portion covers at least a part of the side surface of the semiconductor device. The semiconductor device according to claim 1.

6. The semiconductor device comprises a plurality of the aforementioned semiconductor devices, The resin portion is provided between the plurality of semiconductor devices. The semiconductor device according to claim 5.

7. A cooler is provided for the semiconductor device, which is located on the opposite side from the circuit board. A sintered portion that joins the cooler and the semiconductor device. A semiconductor device according to any one of claims 1 to 6, comprising:

8. The sintered portion and the resin portion are not in contact. The semiconductor device according to claim 7.

9. A bonding material containing resin is placed between a semiconductor device having a first main electrode and a second main electrode arranged on a first main surface and a circuit board having wiring. A portion of the resin is pushed out of the bonding region, which is the area between the first and second main electrodes and the wiring, to form a bonding portion that joins the first and second main electrodes and the wiring. A method for manufacturing a semiconductor device.

10. The aforementioned joining material includes solder, By heating the bonding material, the solder is agglomerated, and the resin is extruded. The method for manufacturing a semiconductor device according to claim 9.

11. By heating the bonding material, a resin portion containing the same resin as the aforementioned resin is formed in the region between the semiconductor device and the circuit board, excluding the bonding region. A method for manufacturing a semiconductor device according to claim 10.

12. The resin portion covers at least a part of the side surface of the semiconductor device. A method for manufacturing a semiconductor device according to claim 11.

13. The resin portion does not cover the side of the semiconductor device opposite to the circuit board. The method for manufacturing a semiconductor device according to claim 12.

14. After forming the resin portion, the side of the semiconductor device opposite to the circuit board is sintered onto the cooler. A method for manufacturing a semiconductor device according to any one of claims 11 to 13.

15. Multiple semiconductor devices are bonded to the circuit board in a single operation. Multiple semiconductor devices are sintered into the cooler at once. The method for manufacturing a semiconductor device according to claim 14.

Images