Synchronization control device

Abstract

Even if there are variations in the correction frequency, the current time can be corrected accurately according to the rate. [Solution] The synchronization control device is a synchronization control device that includes a first calculation means for calculating an average correction frequency indicating the number of time corrections per unit time by receiving time information multiple times from a time server via a wireless network, and a correction means for determining the rate based on the average correction frequency and correcting the current time of the synchronization control device according to the rate.

Description

Technical Field

[0001] The present disclosure relates to a synchronization control device, a synchronous shooting system, a control method of the synchronization control device, and a program.

Background Art

[0002] In recent years, there has been an increasing number of cases where electronic devices such as digital cameras, printers, mobile phones, and smartphones are equipped with a wireless communication function and these devices are connected to a wireless network for use.

[0003] Patent Document 1 discloses a technique in which a digital camera of a slave device performs time synchronization with a digital camera of a master device using a wireless communication packet, thereby implementing a synchronous shutter with a plurality of digital cameras.

[0004] Patent Document 2 discloses content related to time synchronization technology in a wireless environment. Specifically, when the network delay of a packet generated during the transmission and reception of a time synchronization packet exceeds an adjustable threshold value, the time synchronization packet is discarded, thereby reducing the accuracy degradation due to network delay.

[0005] Patent Document 3 discloses a time correction method related to time synchronization technology. Specifically, a method of matching the time with a synchronization source by adjusting the pace, which is the progress rate per unit time of the time, is disclosed.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

[0007] When the destination device performs time synchronization by adjusting its rate, there is a concern that if the time setting differs from that of the source device for a longer period than expected, the time difference between the source and destination devices will increase (overshoot).

[0008] In particular, as described in Patent Document 2, when selecting and using each time synchronization packet after considering whether or not it is affected by network delay, it is possible that the correction interval may become too long. In such cases, when performing time synchronization using rate correction, it is necessary to appropriately control the occurrence of overshoot.

[0009] The purpose of this disclosure is to enable accurate correction of the current time according to the rate, even when there are variations in the correction frequency. [Means for solving the problem]

[0010] The synchronization control device is a synchronization control device comprising: a first calculation means that calculates an average correction frequency indicating the number of time corrections per unit time by receiving time information multiple times from a time server via a wireless network; and a correction means that determines the rate based on the average correction frequency and corrects the current time of the synchronization control device according to the rate. [Effects of the Invention]

[0011] According to this disclosure, even if there are variations in the correction frequency, the current time can be corrected accurately according to the rate. [Brief explanation of the drawing]

[0012] [Figure 1] This figure shows an example configuration of a synchronized imaging system. [Figure 2] This figure shows an example of the hardware configuration of a synchronous control device. [Figure 3]It is a diagram showing a functional configuration example of a synchronization control device. [Figure 4] It is a diagram showing time synchronization using PTP. [Figure 5] It is an overall flowchart of the synchronization control device. [Figure 6] It is a flowchart for calculating the specified delay of the synchronization control device. [Figure 7] It is a flowchart of the time correction process of the synchronization control device.

Embodiments for Carrying Out the Invention

[0013] (First Embodiment) Hereinafter, the synchronization control device according to this embodiment will be described with reference to the drawings. Note that the technical scope of the present invention is determined by the scope of the claims and is not limited by the following individual embodiments.

[0014] First, the synchronous shooting system will be described. FIG. 1 is a diagram showing a configuration example of a synchronous shooting system 100 in the first embodiment. The synchronous shooting system 100 includes a wireless network 101, a time server 102, an access point 103, and synchronization control devices 201-a, 201-b, and 201-c.

[0015] The synchronization control devices 201-a, 201-b, and 201-c are, for example, imaging devices, and hereinafter, they will be collectively referred to as the synchronization control device 201. The synchronous shooting system 100 includes a plurality of synchronization control devices 201.

[0016] The access point 103 operates as the master device of the wireless network 101 and constructs a wireless network 101 with the synchronization control device 201. Here, it is assumed that a wireless LAN compliant with the IEEE802.11 series is used for wireless communication. For wireless communication, public wireless such as 5G or Bluetooth may be used.

[0017] The time server 102 has a function of performing time distribution to the synchronization control device 201.

[0018] Next, the operation of the synchronous shooting system 100 will be described. First, all the synchronous control devices 201-a, 201-b, and 201-c start time synchronization processing with the time server 102. After all the synchronous control devices 201 are synchronized with the time server 102, the start time of synchronous shooting is input to the synchronous control device 201-a by a user operation.

[0019] The synchronous control device 201-a notifies the synchronous control devices 201-b and 201-c of the shooting start time via the wireless network 101. All the synchronous control devices 201-a, 201-b, and 201-c that have received the shooting start time can perform synchronous shooting as the synchronous shooting system 100 by respectively performing shooting from the shooting start time. The above is the description of the synchronous shooting system 100.

[0020] Next, a hardware configuration example of the synchronous control device 201 will be described using the block diagram of FIG. 2.

[0021] The synchronous control device 201 includes a CPU 202, a system bus 203, a storage unit 204, a wireless communication processing unit 205, an antenna 206, a time processing unit 207, and a time stamp storage unit 209. The time processing unit 207 includes a register unit 212, a correction processing unit 213, a time reference unit 214, a time counter unit 215, and a timing generation unit 217.

[0022] The CPU 202 controls the entire synchronous control device 201 by executing a control program stored in the storage unit 204. Each control program will be described later.

[0023] The system bus 203 is a bus used for the access of the CPU 202 to each functional block and the movement of various data (packet data, imaging data, etc.).

[0024] The memory unit 204 stores control programs executed by the CPU 202, imaging data generated by the imaging unit 216, and communication packets used for communication with other devices.

[0025] The imaging unit 216 is a block that performs imaging processing. The imaging timing of the imaging unit 216 is configured to include a mode in which it operates at a timing instructed by the CPU 202 via the system bus 203, and a mode in which primitive timing control can be performed by timing signals 218.

[0026] The wireless communication processing unit 205 is a processing unit for performing wireless LAN communication. The wireless communication processing unit 205 has the function of storing packets received from the outside via the antenna 206 into the storage unit 204. The wireless communication processing unit 205 also has the function of transmitting packets stored in the storage unit 204 to the outside via the antenna 206 upon instruction from the CPU 202. The wireless communication processing unit 205 is configured to receive the current time 210 as input. The wireless communication processing unit 205 also has the function of storing the value of the current time 210 at the time of sending and receiving a packet as a timestamp 211 in the timestamp storage unit 209.

[0027] The time processing unit 207 handles time information used in time synchronization processing. The time counter unit 215 is a counter that indicates the time. This counter is incremented based on a periodically occurring pulse signal (not described), and this count value is output as the current time 210. The time counter unit 215 also has a function to correct the counter value based on correction information 219 input from the correction processing unit 213.

[0028] The correction information 219 includes two types: correction method information and the correction amount used in that method. There should be three types of correction methods. The first is a method that directly overwrites the counter value (direct value correction method). The second is a method that receives an addition / subtraction value from the counter value and performs addition / subtraction correction by that amount (offset correction method). The third is a method that corrects the amount of time advance of the time counter unit 215 per unit time (rate correction method).

[0029] The timing generation unit 217 has the function of outputting a timing signal 218 with a fixed period. The timing generation unit 217 can generate a timing signal with a fixed period by changing the value of the signal from 1 to 0 each time the current time 210 advances by a predetermined amount. When to start generation and what the frequency should be should be determined from the setting information set in the register unit 212.

[0030] The register section 212 is a register accessed by the CPU 202, and is configured to allow the CPU 202 to set information for the correction processing section 213 and the timing generation section 217. Furthermore, the register section 212 is configured to allow the current time 210 to be referenced via the time reference section 214. This concludes the explanation of the time processing section 207, or rather, the synchronization control device 201.

[0031] The CPU 202 functions as a control unit and performs imaging by the imaging unit 216 based on the current time 210 of the synchronization control device 201. The synchronized imaging system 100 has multiple synchronization control devices 201. Each CPU 202 of the multiple synchronization control devices 201 performs imaging by the imaging unit 216 when the current time 210 of each of the multiple synchronization control devices 201 reaches the start time for synchronized imaging. This enables synchronized imaging by the multiple synchronization control devices 201.

[0032] Next, an example of the functional configuration of the synchronization control device 201 will be explained in Figure 3. The synchronization control device 201 includes an application 301, a wireless communication control unit 302, a communication protocol processing unit 303, an imaging control unit 305, and a time processing control unit 306. The communication protocol processing unit 303 includes a PTP processing unit 304.

[0033] Application 301 is software for various applications handled by the synchronous control device 201.

[0034] The imaging control unit 305 is a functional unit that controls the imaging unit 216 by having the CPU 202 execute a program.

[0035] The wireless communication control unit 302 is a functional unit that controls the wireless communication processing unit 205 by having the CPU 202 execute a program.

[0036] The time processing unit 306 is a functional unit that controls the time processing unit 207 by having the CPU 202 execute a program.

[0037] The communication protocol processing unit 303 is a functional unit that processes various communication protocols when the CPU 202 executes a program. The communication protocol processing unit 303 includes a PTP processing unit 304 that processes PTP (Precision Time Protocol). This concludes the explanation of Figure 3.

[0038] Next, in explaining the synchronization process performed by the synchronization control device 201, the mechanism of the synchronization process using PTP will be explained using Figure 4. Figure 4 shows the exchange of PTP packets, which are time synchronization packets, between the time server 102 and the synchronization control device 201. For the sake of simplicity, the access point 103 will be omitted. Also, the synchronization control device 201 will be explained as a single unit.

[0039] First, in step S401, the time server 102 sends a Sync packet. At the same time, the time server 102 stores the time T1 of the time server 102 when it sent the Sync packet. The synchronization control device 201 stores the time T2 of the synchronization control device 201 when it receives the Sync packet.

[0040] Next, in step S402, the time server 102 sends a Follow Up packet. The Follow Up packet contains the time T1 when the Sync packet was sent. The synchronization control device 201, upon receiving the Follow Up packet, extracts the time T1 when the time server 102 sent the Sync packet from the Follow Up packet and stores it.

[0041] Next, in step S403, the synchronization control device 201 sends a Delay Request packet to the time server 102. At the same time, the synchronization control device 201 stores the time T3 of the synchronization control device 201 when it sent the Delay Request packet. The time server 102, upon receiving the Delay Request packet, stores the time T4 of when it received the Delay Request packet.

[0042] Then, in step S404, the time server 102 sends a Delay Response packet to the synchronization control device 201. The time server 102 stores the time T4 in the Delay Response packet and sends it. The synchronization control device 201, upon receiving the Delay Response packet, retrieves the time T4 from the Delay Response packet and stores it.

[0043] By sending and receiving a series of PTP packets, the synchronization control device 201 can obtain four time points T1 to T4. From these four time points T1 to T4, the following two can be determined: First, the transmission delay time (hereinafter referred to as immediate transmission delay) that occurs in the network between the time server 102 and the synchronization control device 201. Second, the time difference (hereinafter referred to as offset) between the time server 102 and the synchronization control device 201. These can be determined as follows.

[0044] Immediate transmission delay = ((T4-T1)-(T3-T2)) / 2 …(Equation 1) Offset = ((T2-T1)-(T4-T3)) / 2 …(Equation 2)

[0045] The synchronous control device 201 uses the immediate transmission delay and offset obtained from the above calculation formula to correct the current time 210 of the synchronous control device 201 and perform synchronous control. This concludes the explanation of Figure 4.

[0046] Next, the operation of the synchronous control device 201 will be explained. First, the overall processing of the synchronous control device 201 will be explained using the flowchart in Figure 5. The control method of the synchronous control device 201 will be explained below.

[0047] First, in step S518, CPU 202 determines whether or not it has received a PTP packet from time server 102. If it has not received a PTP packet (No in S518), it proceeds to step S517. If it has received a Sync packet as a PTP packet, it proceeds to step S501. If it has received a Follow Up packet as a PTP packet, it proceeds to step S504. If it has received a Delay Response packet as a PTP packet, it proceeds to step S509.

[0048] In step S501, the CPU 202 obtains the reception time T2 of the Sync packet. Upon receiving the Sync packet, the wireless communication processing unit 205 outputs a timestamp 211 and stores this timestamp as the reception time T2 in the timestamp storage unit 209. Therefore, the PTP processing unit 304 can obtain the time T2 by reading the timestamp 211 from the timestamp storage unit 209.

[0049] Next, in step S502, the CPU 202 extracts time T1, which is the packet transmission time of the time server 102, from the Sync packet. However, this process only needs to be performed in 1Step mode (a mode that does not use Follow Up packets). The CPU 202 can obtain time T1 by accessing the Sync packet stored in the memory unit 204. In 2Step mode (a mode that uses Follow Up packets), time T1 is obtained from the Follow Up packet, not from the Sync packet (described later).

[0050] Then, in step S503, CPU202 discards the Sync packet. After that, the process proceeds to step S517.

[0051] In step S504, the CPU 202 determines whether the reception time T2 of the Sync packet is stored in the timestamp storage unit 209. If the reception time T2 of the Sync packet is not stored (No in S504), the process proceeds to step S508. If the reception time T2 of the Sync packet is stored (Yes in S504), the process proceeds to step S505.

[0052] In step S505, the CPU 202 reads the time T1, which is the time the Sync packet was sent, from the received Follow Up packet and stores it in the timestamp storage unit 209.

[0053] Then, in step S506, CPU 202 sends a Delay Request packet to time server 102.

[0054] Next, in step S507, the CPU 202 stores the timestamp 211 in the timestamp storage unit 209 as the transmission time T3 of the Delay Request packet. Once processing up to step S507 is complete, the process proceeds to step S508.

[0055] In step S508, CPU202 discards the Follow Up packet. Then, the process proceeds to step S517.

[0056] In step S509, the CPU 202 determines whether or not times T1, T2, and T3 are stored in the timestamp storage unit 209. If times T1, T2, and T3 are not stored (No in S509), the process proceeds to step S515. If times T1, T2, and T3 are stored (Yes in S509), the process proceeds to step S510.

[0057] In step S510, the CPU 202 reads the time T4 from the received Delay Response packet and stores it in the timestamp storage unit 209.

[0058] Then, in step S511, the CPU 202 calculates the immediate transmission delay and offset from times T1, T2, T3, and T4. This calculation can be obtained from (Equation 1) and (Equation 2).

[0059] The CPU 202 calculates the immediate transmission delay based on the transmission time T1 of the time server 102, the reception time T2 of the synchronization control device 201, the transmission time T3 of the synchronization control device 201, and the reception time T4 of the time server 102, using (Equation 1). The immediate transmission delay is the transmission delay time.

[0060] Furthermore, the CPU 202 calculates an offset based on the transmission time T1 of the time server 102, the reception time T2 of the synchronization control device 201, the transmission time T3 of the synchronization control device 201, and the reception time T4 of the time server 102, using (Equation 2).

[0061] The transmission time T1 is the transmission time of the Sync packet. The reception time T2 is the reception time of the Sync packet. The transmission time T3 is the transmission time of the Delay Request packet. The reception time T4 is the reception time of the Delay Request packet. The Sync packet, Follow Up packet, Delay Request packet, and Delay Response packet are examples of PTP packets.

[0062] Time T1 is the time when time server 102 sent the Sync packet. Time T2 is the time when synchronization control device 201 received the Sync packet. Time T3 is the time when synchronization control device 201 sent the Delay Request packet. Time T4 is the time when time server 102 received the Delay Request packet.

[0063] Next, in step S512, the CPU 202 calculates / updates the specified transmission delay. This specified transmission delay is used to determine whether a significant transmission delay occurred in the wireless network 101 for the time synchronization packets previously sent and received between the time server 102 and the synchronization control device 201. The method for calculating this specified transmission delay will be described later with reference to Figure 6.

[0064] In step S513, the CPU 202 determines whether the immediate transmission delay is less than or equal to the specified transmission delay. The specified transmission delay is an example of the first threshold. If the immediate transmission delay is less than or equal to the specified transmission delay (less than or equal to the first threshold) (Yes in S513), it is assumed that no significant transmission delay occurred when the recently received Sync packet or the recently sent Delay Request packet was sent or received, and the process proceeds to step S514. If the immediate transmission delay is not less than or equal to the specified transmission delay (less than or equal to the first threshold) (No in S513), the process proceeds to step S515.

[0065] In step S514, the CPU 202 performs time correction processing. Details of the time correction processing will be described later using Figure 7. If the answer in S513 is No, time correction processing is not performed.

[0066] In step S515, CPU202 discards the Delay Response packet.

[0067] In step S516, the CPU 202 discards the time information T1 to T4 that was used to calculate the immediate transmission delay / offset. Then, the process proceeds to step S517.

[0068] In step S517, the CPU 202 determines whether to continue based on the user's instructions. If it chooses to continue (Yes in S517), it returns to step S518. If it chooses not to continue (No in S517), it terminates the process shown in the flowchart in Figure 5. This completes the overall time synchronization process.

[0069] Next, the calculation and update process for the specified transmission delay will be explained using Figure 6. Figure 6 is a flowchart that provides a detailed explanation of the process in step S512 in Figure 5, which was explained earlier.

[0070] In step S601, CPU202 determines whether it is the first boot or not. If it is the first boot (Yes in S601), proceed to step S602. If it is not the first boot (No in S601), proceed to step S603.

[0071] In step S602, CPU202 initializes various settings. Specifically, CPU202 sets the default transmission delay to an invalid value and sets the number of stored values ​​m for immediate transmission delay to 0. This process is performed only on the first startup.

[0072] In step S603, the CPU 202 determines whether the number of stored immediate transmission delays m is a predetermined number x (x=10 in this example). In this embodiment, x is set to 10, but it is preferable to determine it statically or dynamically based on the synchronization accuracy required by the synchronization control device 201 and the state of the wireless network 101. If the wireless network 101 is congested with packets, and the jitter of the immediate transmission delay that occurs when transmitting time-synchronized packets varies greatly from one execution to the next, or if there is a high requirement for time-synchronization accuracy, it is preferable to increase x. That is, by increasing x, more time-synchronized packets can be sampled, and the probability of including time-synchronized packets that satisfy the desired conditions among x increases. If the number of stored immediate transmission delays m is 10 (Yes in S603), proceed to step S604. If the number of stored immediate transmission delays m is not 10 (No in S603), proceed to step S605.

[0073] In step S604, CPU202 removes the oldest immediate transmission delay and decrements the memory by several m.

[0074] In step S605, the CPU 202 then saves the immediate transmission delay obtained by the processing in step S511 in Figure 5 and increments the memory by several units m.

[0075] In step S606, the CPU 202 again determines whether the number of stored immediate transmission delays m is a predetermined number x=10. If the number of stored immediate transmission delays m is 10 (Yes in S606), the process proceeds to step S607. If the number of stored immediate transmission delays m is not 10 (No in S606), the process shown in the flowchart in Figure 6 is terminated.

[0076] In step S607, the CPU 202 sets the value of the y-th (third in this example) smallest immediate transmission delay from among the stored immediate transmission delays as the specified transmission delay. The value of y should be determined statically or dynamically based on the synchronization accuracy required by the synchronization control device 201 and the state of the wireless network 101, similar to the predetermined number x mentioned earlier. In the wireless environment of the wireless network 101, if packets are congested and the jitter of the immediate transmission delay that occurs during the transmission of time synchronization packets varies greatly from one execution to the next, or if the requirement for time synchronization accuracy is high, it is advisable to reduce y. This is because reducing y makes the conditions for the immediate transmission delay required for time synchronization packets used in the calculation of synchronization accuracy stricter, and time synchronization packets with large jitter will not be used in the correction process. If the number of stored immediate transmission delays m has not reached the predetermined number x (No in S606), the process in step S607 is not performed. This concludes the explanation of Figure 6.

[0077] Next, the details of the correction process will be explained using the flowchart in Figure 7. The flowchart in Figure 7 is a flowchart detailing the time synchronization process in step S514 of Figure 5 mentioned earlier.

[0078] In step S701, CPU202 determines whether it is the first boot or not. If it is the first boot (Yes in S701), proceed to step S702. If it is not the first boot (No in S701), proceed to step S703.

[0079] In step S702, CPU202 initializes various parameters. Specifically, CPU202 sets the correction count n, which is the number of time corrections performed so far, to 0. It also sets the accumulated offset Sum_o, which is the sum of the offsets calculated so far, to 0. Furthermore, CPU202 sets the training completion flag to 0. The process in step S702 is executed only on the first startup when the synchronization process is initiated.

[0080] Next, in step S703, the CPU 202 determines whether the training completion flag is 1 or not. The training completion flag represents whether the training necessary for performing rate correction has been completed. If the training completion flag is 0, that is, if training is not yet complete (No in S703), the process proceeds to step S704. If the training completion flag is 1, that is, if training is complete (Yes in S703), the process proceeds to step S715.

[0081] In step S704, the CPU 202 performs offset correction. That is, the CPU 202 instructs the time processing unit 207 to add (or subtract) the offset calculated in step S511 of Figure 5 to the current time 210. The CPU 202 then corrects the current time 210 of the synchronization control device 201 based on the offset calculated in step S511, using the time processing unit 207.

[0082] In step S705, the CPU 202 determines whether the number of corrections n is 0 or not. If the number of corrections n is 0 (Yes in S705), the process proceeds to step S714. If the number of corrections n is not 0 (No in S705), the process proceeds to step S706.

[0083] In step S714, the CPU 202 obtains the current time from the time processing unit 207 and stores this current time as the time when time synchronization started, Tstart. Then, the process proceeds to step S713.

[0084] In step S706, the CPU 202 calculates the cumulative offset Sum_o. The cumulative offset Sum_o is used to calculate the ratio of the deviation between the rate of the time server 102 and the synchronization control device 201 when performing rate correction. The CPU 202 uses the offset [k] calculated in step S511 in Figure 5 and the cumulative offset Sum_o[k-1] up to that point to calculate the current cumulative offset Sum_o[k-1] as follows.

[0085] Sum_o[k] = Sum_o[k-1] + offset[k] …(Equation 3)

[0086] The reason the cumulative offset calculation was not performed when n=0 is that, before the time synchronization process begins, the time on the time server 102 and the synchronization control device 201 may be significantly out of sync. Therefore, the offset calculated when n=0 may have a large absolute value and is not suitable for use in calculations of the ratio of subsequent rate deviations.

[0087] Next, in step S707, CPU202 obtains the current time Tnow.

[0088] Then, in step S708, the CPU 202 determines whether the number of corrections n has reached a predetermined value z (100 in this example). The number of corrections n is the number of time corrections. The predetermined value z is an example of a second threshold. In this embodiment, z is set to 100, but it is advisable to set a sufficient number of trials as the initial value when determining the difference in rate between the time server 102 and the synchronization control device 201. Alternatively, instead of the number of corrections performed, a predetermined time interval may be used as the condition. For example, if you want to calculate the rate difference after 100 corrections, and the time until 100 corrections is approximately 200 seconds, then the condition may be the elapsed time of 200 seconds. If the number of corrections n has reached the predetermined value z (Yes in S708), proceed to step S709. If the number of corrections n has not reached the predetermined value z (No in S708), proceed to step S712.

[0089] In step S709, CPU202 stores the current time Tnow, which was obtained earlier in step S707, as the end time of the training period Tend_t.

[0090] Then, in step S710, the CPU 202 calculates the ratio of the rate difference between the time server 102 and the synchronization control device 201, known as Dratio, using the following formula.

[0091] Dratio = (Tend_t - Tstart + Sum_o

[0100] ) / (Tend_t - Tstart) ... (Equation 4)

[0092] The CPU 202 calculates the ratio of the rate deviation, Dratio, based on the accumulated offset Sum_o

[0100] and the time (Tend_t-Tstart) until the number of corrections n reaches a predetermined value z, using (Equation 4). The accumulated offset Sum_o

[0100] is the accumulated value of the offset calculated in step S511 in Figure 5.

[0093] Here, for example, let's assume that Tend_t-Tstart = 100 [seconds] and Sum_o

[0100] = 0.00000001 [seconds].

[0094] From this, we can find that Dratio = 100.00000001 [%].

[0095] This indicates that the rate of the synchronization control device 201, without any rate correction applied, is faster than the rate of the time server 102. This difference in rate is due to an error in the frequency of the pulse signal generated by the oscillator used for timing in the synchronization control device 201 compared to the ideal frequency. The Dratio calculated here is used when actually performing rate correction (S715).

[0096] Next, in step S711, CPU202 sets the training completion flag to 1.

[0097] Then, in step S712, the CPU202 calculates the average correction frequency Favg. Favg is calculated using the following formula.

[0098] Favg = n / (Tnow - Tstart) …(Equation 5)

[0099] In equation 5 above, Tnow-Tstart is the elapsed time from the start of the time synchronization process to the current time, and n is the number of corrections.

[0100] In step S518 of Figure 5, the CPU 202 receives multiple (n+1) Delay Response packets containing time information from the time server 102 via the wireless network 101. Based on this, in step S712, the CPU 202 calculates the average correction frequency Favg, which indicates the number of time corrections per unit time.

[0101] Then, in step S713, the CPU202 performs an increment process with correction count n.

[0102] The above offset correction process and training process continue until the training completion flag is set to 1. If the training completion flag is 1 (Yes in S703), proceed to step S715.

[0103] In step S715, the CPU 202 sets the rate R and performs rate correction. The rate R to be set is determined as follows:

[0104] R = ((Favg - Offset) / Favg) / Dratio …(Equation 6)

[0105] (Favg - offset) / Favg is the rate expected by the synchronization control device 201, assuming the rate of the time server 102 is 1. Furthermore, even without rate correction, there is a difference of only Dratio in the rate ratio between the time server 102 and the synchronization control device 201, so taking this into account results in the actual rate R to be set. The CPU 202 performs a correction on the rate R, which is the amount of time advance of the time counter unit 215 per unit time.

[0106] The CPU 202 calculates the rate R based on the average correction frequency Favg, offset, and ratio Dratio, and corrects the current time 210 of the synchronization control device 201 according to the rate R.

[0107] In step S716, CPU 202 obtains the current time Tnow. Then, the process proceeds to steps S712 and S713. This concludes the explanation of Figure 7.

[0108] (Second embodiment) In the first embodiment, an example was described in which the ratio of the deviation amount, Dratio, is not changed (updated) during rate correction execution, that is, after the training completion flag is set to 1. However, a method of changing the ratio of the deviation amount, Dratio, even during rate correction execution may be used. For example, a counter that counts up without changing the rate is provided separately from the time counter unit 215 that reflects the synchronization processing results while performing actual rate correction. By constantly monitoring the rate deviation using the value of this counter, it becomes possible to update the ratio of the deviation amount, Dratio, even during rate correction processing after the training completion flag has been set to 1.

[0109] Furthermore, in the first embodiment, the average correction frequency (S712) was calculated by determining the average correction frequency Favig from the number of corrections performed and the time information. As an alternative method, for example, if the reception of Delay Response packets occurs at regular intervals, the average correction frequency can also be determined from the ratio of received packets and the probability (Yes in S513) that the immediate transmission delay is below a specified value.

[0110] Furthermore, in the first embodiment, when performing rate correction, the rate R is determined based on the average correction frequency Favg (Equation 6). Therefore, if the timing of the next correction process is delayed by more than the average correction cycle time calculated from the average correction frequency Favg, there is a possibility of overshoot occurring by the amount of time delayed. As a way to suppress this, one method is to reset the rate correction value to Dratio after performing one rate correction, based on the elapsed time of the average correction cycle. By doing so, the occurrence of overshoot can be reduced.

[0111] As described above, according to the first and second embodiments, even when there are variations in the timing of time correction, it becomes possible to perform time synchronization using rate correction with high accuracy.

[0112] Each time the CPU 202 receives a Delay Response packet in step S518 of Figure 5, it corrects the current time 210 according to the rate R in step S715 of Figure 7. The rate R is the amount of deviation of the current time 210 per unit time. When Delay Response packets are received at equal intervals, the CPU 202 can perform rate correction with high accuracy.

[0113] The problems and effects of this embodiment will be explained. If the reception intervals of Delay Response packets are not equal, the accuracy of rate correction will deteriorate unless the average correction frequency Favg is used. The reason why the reception intervals of Delay Response packets are not equal is that there is loss of PTP packets or the transmission delay time of PTP packets is long in the wireless network 101.

[0114] Therefore, in step S712, the CPU 202 calculates the average correction frequency Favg. In step S715, the CPU 202 determines the rate R based on the average correction frequency Favg and corrects the current time 210 according to the rate R. This allows the CPU 202 to perform rate correction with high accuracy even when the reception intervals of the Delay Response packets are not equal.

[0115] (Other embodiments) This disclosure can also be implemented by supplying a program that implements one or more of the functions of the embodiments described above to a system or device via a network or storage medium, and by having one or more processors in the computer of that system or device read and execute the program. It can also be implemented by a circuit (e.g., an ASIC) that implements one or more functions.

[0116] Furthermore, the embodiments described above are merely examples illustrating how to implement this disclosure, and they should not be interpreted as limiting the technical scope of this disclosure. In other words, this disclosure can be implemented in various ways without departing from its technical concept or its main features.

[0117] This embodiment includes the following configuration. (Item 1) A synchronous control device, A first calculation means that calculates the average correction frequency, which indicates the number of time corrections per unit time, by receiving time information multiple times from a time server via a wireless network, Correction means for determining the rate based on the average correction frequency and correcting the current time of the synchronization control device according to the rate, A synchronous control device characterized by having the following features. (Item 2) The system further includes a first calculation means for calculating a transmission delay time based on the transmission time of the time server and the reception time of the synchronization control device. The correction means is If the transmission delay time is less than or equal to the first threshold, the rate is determined based on the average correction frequency, the transmission time of the time server, and the reception time of the synchronization control device, and the current time of the synchronization control device is corrected according to the rate. The synchronization control device according to item 1, characterized in that the current time of the synchronization control device is not corrected if the transmission delay time is not less than or equal to a first threshold. (Item 3) The correction means is Before the number of time corrections reaches the second threshold, the current time of the synchronization control device is corrected according to the offset based on the transmission time of the time server and the reception time of the synchronization control device. The synchronous control device according to item 1 or 2, characterized in that, after the number of time corrections reaches a second threshold, the current time of the synchronous control device is corrected according to the rate. (Item 4) The synchronization control device according to item 3, characterized in that the correction means determines the rate based on the ratio of the average correction frequency to the rate deviation. (Item 5) The synchronization control device according to item 4, characterized in that the ratio of the rate deviation is not updated after the number of time corrections reaches the second threshold. (Item 6) The synchronization control device according to item 4, characterized in that after the number of time corrections reaches the second threshold, the ratio of the rate deviation is updated. (Item 7) The system further includes a second calculation means for calculating an offset based on the transmission time of the time server and the reception time of the synchronization control device. The synchronization control device according to item 3, characterized in that the correction means determines the rate based on the average correction frequency and the offset. (Item 8) The synchronization control device according to item 7, characterized in that the correction means determines the rate based on the average correction frequency and the ratio of the offset to the rate deviation. (Item 9) The synchronization control device according to item 8, further comprising a second calculation means for calculating the ratio of the rate deviation amount based on the accumulated value of the offset and the time until the number of time corrections reaches the second threshold, when the number of time corrections reaches the second threshold. (Item 10) The transmission time of the aforementioned time server is the transmission time of the PTP packet. The synchronization control device according to any one of items 7 to 9, characterized in that the reception time of the synchronization control device is the reception time of the PTP packet. (Item 11) The synchronization control device according to item 10, characterized in that the second calculation means calculates the offset based on the time when the time server sent the Sync packet, the time when the synchronization control device received the Sync packet, the time when the synchronization control device sent the Delay Request packet, and the time when the time server received the Delay Request packet. (Item 12) The synchronization control device according to any one of items 1 to 11, further comprising control means for performing imaging by the imaging unit based on the current time of the synchronization control device. (Item 13) The system has multiple synchronous control devices as described in item 12, A synchronized imaging system characterized in that each of the control means of the plurality of synchronization control devices performs imaging by the imaging unit when the current time of each of the plurality of synchronization control devices reaches the start time of synchronized imaging. (Item 14) A control method for a synchronous control device, A first calculation step involves calculating the average correction frequency, which indicates the number of time corrections per unit time, by receiving time information multiple times from a time server via a wireless network. A correction step which involves determining the rate based on the average correction frequency and correcting the current time of the synchronization control device according to the rate. A control method for a synchronous control device, characterized by having the following features. (Item 15) A program to cause a computer to function as a synchronous control device as described in any one of items 1 through 12. [Explanation of symbols]

[0118] 301 Application 302 Wireless Communication Control Unit 303 Communication Protocol Processing Unit 304 PTP Processing Unit 305 Imaging Control Unit 306 Time Processing Unit

Claims

1. A synchronous control device, A first calculation means that calculates the average correction frequency, which indicates the number of time corrections per unit time, by receiving time information multiple times from a time server via a wireless network, Correction means for determining the rate based on the average correction frequency and correcting the current time of the synchronization control device according to the rate, A synchronous control device characterized by having the following features.

2. The system further includes a first calculation means for calculating the transmission delay time based on the transmission time of the time server and the reception time of the synchronization control device. The correction means is If the transmission delay time is less than or equal to the first threshold, the rate is determined based on the average correction frequency, the transmission time of the time server, and the reception time of the synchronization control device, and the current time of the synchronization control device is corrected according to the rate. The synchronization control device according to claim 1, characterized in that the current time of the synchronization control device is not corrected if the transmission delay time is not less than or equal to a first threshold.

3. The correction means is Before the number of time corrections reaches the second threshold, the current time of the synchronization control device is corrected according to the offset based on the transmission time of the time server and the reception time of the synchronization control device. The synchronization control device according to claim 1, characterized in that, after the number of time corrections reaches a second threshold, the current time of the synchronization control device is corrected according to the rate.

4. The synchronization control device according to claim 3, characterized in that the correction means determines the rate based on the ratio of the average correction frequency to the rate deviation.

5. The synchronization control device according to claim 4, characterized in that the ratio of the rate deviation is not updated after the number of time corrections reaches the second threshold.

6. The synchronization control device according to claim 4, characterized in that the ratio of the rate deviation is updated after the number of time corrections reaches the second threshold.

7. The system further includes a second calculation means for calculating an offset based on the transmission time of the time server and the reception time of the synchronization control device. The synchronization control device according to claim 3, characterized in that the correction means determines the rate based on the average correction frequency and the offset.

8. The synchronization control device according to claim 7, characterized in that the correction means determines the rate based on the average correction frequency and the ratio of the offset to the rate deviation.

9. The synchronization control device according to claim 8, further comprising a second calculation means for calculating the ratio of the rate deviation amount based on the accumulated value of the offset and the time until the number of time corrections reaches the second threshold, when the number of time corrections reaches the second threshold.

10. The transmission time of the aforementioned time server is the transmission time of the PTP packet. The synchronization control device according to claim 7, characterized in that the reception time of the synchronization control device is the reception time of the PTP packet.

11. The synchronization control device according to claim 10, characterized in that the second calculation means calculates the offset based on the time when the time server transmitted the Sync packet, the time when the synchronization control device received the Sync packet, the time when the synchronization control device transmitted the Delay Request packet, and the time when the time server received the Delay Request packet.

12. The synchronization control device according to claim 1, further comprising control means for performing imaging by the imaging unit based on the current time of the synchronization control device.

13. The system has a plurality of synchronous control devices as described in claim 12, A synchronized imaging system characterized in that each of the control means of the plurality of synchronization control devices performs imaging by the imaging unit when the current time of each of the plurality of synchronization control devices reaches the start time of synchronized imaging.

14. A control method for a synchronous control device, A first calculation step involves calculating the average correction frequency, which indicates the number of time corrections per unit time, by receiving time information multiple times from a time server via a wireless network. A correction step which involves determining the rate based on the average correction frequency and correcting the current time of the synchronization control device according to the rate. A control method for a synchronous control device, characterized by having the following features.

15. A program for causing a computer to function as a synchronous control device according to any one of claims 1 to 12.

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