Liquid dispensing device, head unit, and inspection method for liquid dispensing device

Abstract

This suppresses overcharging and undercharging in the charging of the capacity parasitic on the second switch. [Solution] The liquid dispensing device comprises a piezoelectric element driven by a drive signal supplied to a drive electrode via a first wiring harness, a dispensing unit that dispensing liquid in response to the driving of the piezoelectric element, a detection unit that detects the potential of the drive electrode via a second wiring harness, an inspection unit that inspects the dispensing unit based on the detection result of the detection unit, a first switch that switches the presence or absence of an electrical connection between the first wiring harness and the drive electrode, a second switch that switches the presence or absence of an electrical connection between the second wiring harness and the drive electrode, a third switch that switches the presence or absence of an electrical connection between the first wiring harness and the second wiring harness, and a designation unit that specifies the electrical connection state of the third switch. The designation unit performs a first charging operation in which the third switch is turned ON for at least a portion of the preparation period before the inspection of the dispensing unit by the inspection unit, and terminates the first charging operation when the potential signal corresponding to the potential detected by the detection unit satisfies specific conditions.

Description

Technical Field

[0004] , ,

[0005] , ,

[0001] The present invention relates to a liquid ejection device, a head unit, and a method for inspecting a liquid ejection device.

Background Art

[0002] Liquid ejection devices including a discharge unit that discharges liquid by means of a piezoelectric element driven by a drive signal, such as an inkjet printer, are widespread. For example, Patent Document 1 discloses a liquid ejection device including a piezoelectric element provided with a drive electrode and driven by a drive signal supplied to the drive electrode via a first wiring, a detection unit that detects the potential of the drive electrode via a second wiring, an inspection unit that inspects the discharge unit based on the detection result of the detection unit, a first switch that switches whether or not to electrically connect the first wiring and the drive electrode, and a second switch that switches whether or not to electrically connect the second wiring and the drive electrode. In Patent Document 1, in order to suppress a decrease in the inspection accuracy of the discharge unit by the inspection unit due to the capacitance parasitic on the second switch, a technique related to a charging operation for charging the capacitance parasitic on the second switch via the first switch and the second switch by the drive signal supplied to the first wiring prior to the inspection of the discharge unit by the inspection unit has been proposed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, according to the conventional technology, in the charging operation for charging the capacitance parasitic on the second switch, there is a possibility that overcharging or undercharging may occur.

Means for Solving the Problems

[0005] To solve the above problems, the liquid dispensing device according to the present invention comprises a dispensing unit that dispenses liquid in response to the driving of a piezoelectric element driven by a drive signal supplied to a drive electrode via a first wiring, a detection unit that detects the potential of the drive electrode via a second wiring, an inspection unit that inspects the dispensing unit based on the detection result of the detection unit, a first switch that switches whether or not to electrically connect the first wiring and the drive electrode, a second switch that switches whether or not to electrically connect the second wiring and the drive electrode, a third switch that switches whether or not to electrically connect the first wiring and the second wiring, and a designating unit that specifies the electrical connection state of the third switch, wherein the designating unit performs a first charging operation in which the third switch is turned ON during at least one preparation period before the inspection of the dispensing unit by the inspection unit, and terminates the first charging operation if the potential signal corresponding to the potential detected by the detection unit satisfies specific conditions, and continues the first charging operation if the specific conditions are not satisfied.

[0006] Furthermore, the head unit according to the present invention comprises a piezoelectric element driven by a drive signal supplied to a drive electrode via a first wiring, a discharge unit that discharges liquid in response to the driving of the piezoelectric element, a detection unit that detects the potential of the drive electrode via a second wiring and supplies a result signal indicating the detection result to an inspection unit that inspects the discharge unit based on the result signal, a first switch that switches whether or not to electrically connect the first wiring and the drive electrode, a second switch that switches whether or not to electrically connect the second wiring and the drive electrode, a third switch that switches whether or not to electrically connect the first wiring and the second wiring, and a designation unit that specifies the electrical connection state of the third switch, wherein the designation unit performs a first charging operation in which the third switch is turned ON during at least one preparation period before the inspection of the discharge unit by the inspection unit, and terminates the first charging operation if the potential signal corresponding to the potential detected by the detection unit satisfies specific conditions, and continues the first charging operation if the specific conditions are not satisfied.

[0007] Furthermore, the method for inspecting a liquid dispensing device according to the present invention is a method for inspecting a liquid dispensing device comprising: a dispensing unit that dispenses liquid in response to the driving of a piezoelectric element driven by a drive signal supplied to a drive electrode via a first wiring; a detection unit that detects the potential of the drive electrode via a second wiring; an inspection unit that inspects the dispensing unit based on the detection result of the detection unit; a first switch that switches whether or not to electrically connect the first wiring and the drive electrode; a second switch that switches whether or not to electrically connect the second wiring and the drive electrode; and a third switch that switches whether or not to electrically connect the first wiring and the second wiring, wherein, during at least one preparation period before the inspection of the dispensing unit by the inspection unit, a first charging operation is performed in which the third switch is turned ON, and if the potential signal corresponding to the potential detected by the detection unit satisfies specific conditions, the first charging operation is terminated, and if the specific conditions are not satisfied, the first charging operation is continued. [Brief explanation of the drawing]

[0008] [Figure 1] This block diagram shows an example of the configuration of an inkjet printer 1 according to an embodiment of the present invention. [Figure 2] This is a perspective view showing an example of the general internal structure of inkjet printer 1. [Figure 3] This is a cross-sectional view illustrating an example of the structure of the discharge section D[m]. [Figure 4] This is a plan view showing an example of the arrangement of nozzles N in an inkjet printer 1. [Figure 5] This block diagram shows an example of the configuration of head unit 3. [Figure 6] This is a block diagram showing an example of the configuration of the detection circuit 33. [Figure 7] This is a timing chart illustrating an example of a signal supplied to head unit 3. [Figure 8] This is an explanatory diagram illustrating an example of the operation of the connection status specification circuit 310. [Figure 9]It is an explanatory diagram for explaining an example of the operation of the connection state specifying circuit 310. [Figure 10] It is a timing chart for explaining an example of the signal supplied to the head unit 3. [Figure 11] It is an explanatory diagram for explaining an example of the operation of the connection state specifying circuit 310. [Figure 12] It is an explanatory diagram for explaining an example of the operation of the connection state specifying circuit 310. [Figure 13] It is a flowchart showing an example of the operation of the inkjet printer 1 when non-printing processing is executed. [Figure 14] It is an explanatory diagram for explaining an example of the detection potential signal SL. [Figure 15] It is an explanatory diagram showing an example of the operation of the head unit 3 when low-speed charging processing is executed. [Figure 16] It is a block diagram showing an example of the operation of the head unit 3 in low-speed charging processing. [Figure 17] It is a block diagram showing an example of the operation of the head unit 3 in low-speed charging processing. [Figure 18] It is a block diagram showing an example of the operation of the head unit 3 in low-speed charging processing. [Figure 19] It is a block diagram showing an example of the operation of the head unit 3 in low-speed charging processing. [Figure 20] It is a block diagram showing an example of the operation of the head unit 3 in low-speed charging processing. [Figure 21] It is an explanatory diagram showing an example of the operation of the head unit 3 when high-speed charging processing is executed. [Figure 22] It is a block diagram showing an example of the operation of the head unit 3 in high-speed charging processing. [Figure 23] It is a block diagram showing an example of the operation of the head unit 3 in high-speed charging processing. [Figure 24] It is a block diagram showing an example of the operation of the head unit 3 in high-speed charging processing. [Figure 25]It is a block diagram showing an example of the operation of the head unit 3 in high-speed charging processing. [Figure 26] It is a block diagram showing an example of the operation of the head unit 3 in high-speed charging processing. [Figure 27] It is an explanatory diagram showing an example of the operation of the head unit 3 when inspection processing is executed. [Figure 28] It is a block diagram showing an example of the operation of the head unit 3 in inspection processing. [Figure 29] It is a block diagram showing an example of the operation of the head unit 3 in inspection processing. [Figure 30] It is a block diagram showing an example of the operation of the head unit 3 in inspection processing. [Figure 31] It is a block diagram showing an example of the operation of the head unit 3 in inspection processing. [Figure 32] It is a block diagram showing an example of the operation of the head unit 3 in inspection processing. [Figure 33] It is an explanatory diagram for explaining an example of the operation of the inspection unit 5. [Figure 34] It is an explanatory diagram for explaining an example of the detection potential signal SL according to Modification 1 of the present invention. [Figure 35] It is a flowchart showing an example of the operation of the inkjet printer 1 when the printing external processing according to Modification 2 of the present invention is executed.

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. However, in each figure, the dimensions and scales of each part are appropriately different from the actual ones. Further, the embodiments described below are preferred specific examples of the present invention, and thus various technically preferable limitations are imposed. However, the scope of the present invention is not limited to these embodiments unless there is a description specifically limiting the present invention in the following description.

[0010] <<A. Embodiment>> In this embodiment, an inkjet printer 1, which ejects ink to form an image on recording paper (PP), is used as an example to explain the liquid ejection device.

[0011] <<1. Overview of Inkjet Printers>> Hereinafter, an example of the configuration of the inkjet printer 1 according to this embodiment will be described with reference to Figures 1 to 4.

[0012] Figure 1 is a functional block diagram showing an example of the configuration of inkjet printer 1.

[0013] As shown in Figure 1, the inkjet printer 1 is supplied with print data (Img) from a host computer such as a personal computer or digital camera, which indicates the image that the inkjet printer 1 should form. The inkjet printer 1 performs a printing process to form the image indicated by the print data (Img) supplied from the host computer onto the recording paper (PP).

[0014] As shown in Figure 1, the inkjet printer 1 comprises a control unit 2 that controls various parts of the inkjet printer 1, a head unit 3 equipped with an ink ejection unit D, a drive signal generation unit 4 that generates a drive signal Com for driving the ejection unit D, an inspection unit 5 that inspects the ejection unit D, a determination unit 6 that determines the end of the charging process performed before the inspection of the ejection unit D, a transport unit 7 for changing the relative position of the recording paper PP with respect to the head unit 3, and a storage unit 8 for storing various information. Note that inkjet printer 1 is an example of a "liquid ejection device," ink is an example of a "liquid," inspection unit 5 is an example of an "inspection unit," decision unit 6 is an example of a "decision unit," and memory unit 8 is an example of a "memory device."

[0015] In this embodiment, we assume that the inkjet printer 1 comprises one or more head units 3, one or more drive signal generation units 4 corresponding one-to-one with one or more head units 3, one or more inspection units 5 corresponding one-to-one with one or more head units 3, and one or more decision units 6 corresponding one-to-one with one or more head units 3. Specifically, in this embodiment, we assume that the inkjet printer 1 comprises four head units 3, four drive signal generation units 4 corresponding one-to-one with the four head units 3, four inspection units 5 corresponding one-to-one with the four head units 3, and four decision units 6 corresponding one-to-one with the four head units 3. However, for the sake of clarity, the following explanation will focus on one of the four head units 3, one of the four drive signal generation units 4 that corresponds to one of the head units 3, one of the four inspection units 5 that corresponds to one of the head units 3, and one of the four determination units 6 that corresponds to one of the head units 3, as shown in Figure 1.

[0016] The memory unit 8 is configured to include one or both of the following: volatile memory such as RAM (Random Access Memory) and non-volatile memory such as ROM (Read Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), or PROM (Programmable ROM), and stores the control program for the inkjet printer 1.

[0017] The control unit 2 is comprised of one or more CPUs (Central Processing Units). However, the control unit 2 may include a programmable logic device such as an FPGA (field-programmable gate array) instead of, or in addition to, a CPU. The control unit 2 executes a control program stored in the memory unit 8 and controls each part of the inkjet printer 1 by operating according to the control program.

[0018] Specifically, the control unit 2 generates a waveform specification signal dCom and supplies the generated waveform specification signal dCom to the drive signal generation unit 4. The waveform specification signal dCom is a digital signal that defines the waveform of the drive signal Com. The drive signal Com is an analog signal for driving the discharge unit D. The drive signal generation unit 4 includes a DA conversion circuit and generates a drive signal Com having the waveform defined by the waveform specification signal dCom.

[0019] Furthermore, the control unit 2 generates a designated signal SI and supplies the generated designated signal SI to the head unit 3. The designated signal SI is a digital signal that specifies the type of operation of the ejection unit D. Specifically, the designated signal SI specifies whether or not to drive the ejection unit D by supplying a drive signal Com to the ejection unit D, thereby specifying the type of operation of the ejection unit D.

[0020] When printing is performed, the control unit 2 generates signals to control the head unit 3, such as a specified signal SI, based on the print data Img. Also, when printing is performed, the control unit 2 generates signals to control the drive signal generation unit 4, such as a waveform specified signal dCom. Furthermore, when printing is performed, the control unit 2 generates signals to control the transport unit 7. In this way, during printing, the control unit 2 controls the transport unit 7 to change the relative position of the recording paper PP with respect to the head unit 3, while adjusting the presence or absence of ink ejection from the ejection unit D, the timing of ink ejection, etc., and controls each part of the inkjet printer 1 so that an image corresponding to the print data Img is formed on the recording paper PP.

[0021] Furthermore, the control unit 2 generates a mode signal Mod and supplies the generated mode signal Mod to the head unit 3. The mode signal Mod is a signal that indicates a value corresponding to the process being performed by the inkjet printer 1. In this embodiment, as an example, it is assumed that the mode signal Mod is set to a value of "1" to indicate that the inkjet printer 1 is performing a printing process when the inkjet printer 1 is performing a printing process, and to a value of "0" to indicate that the inkjet printer 1 is performing a process other than printing when the inkjet printer 1 is performing a process other than printing. In this embodiment, processes other than printing include the charging process described above and the inspection process described later. Hereafter, processes other than printing, including the charging process and the inspection process, may be referred to as non-printing processes.

[0022] As shown in Figure 1, the head unit 3 comprises a supply circuit 31, a recording head 32, and a detection circuit 33.

[0023] The recording head 32 is equipped with M ejection units D. Here, the value M is a natural number satisfying "M≧2". In the following, the m-th ejection unit D among the M ejection units D provided on the recording head 32 may be referred to as ejection unit D[m]. Here, the variable m is a natural number satisfying "1≦m≦M". Furthermore, in the following, if a component or signal of the inkjet printer 1 corresponds to ejection unit D[m] among the M ejection units D, the subscript [m] may be added to the code used to represent that component or signal.

[0024] The supply circuit 31 switches whether or not to supply the drive signal Com to the discharge unit D[m] based on the specified signal SI. Hereinafter, the drive signal Com supplied to the discharge unit D[m] may be referred to as the supply drive signal Vin[m]. Furthermore, the supply circuit 31 switches whether or not to supply the electrode potential signal VX[m] to the detection circuit 33 based on the specified signal SI. Here, the electrode potential signal VX[m] is a signal indicating the potential of the upper electrode Zu[m] provided on the piezoelectric element PZ[m] that is equipped in the discharge unit D[m]. The piezoelectric element PZ[m] and the upper electrode Zu[m] will be described later in Figure 3.

[0025] The detection circuit 33 generates a detection result signal SK[m] based on the electrode potential signal VX[m] supplied from the discharge unit D[m] via the supply circuit 31. Here, the detection result signal SK[m] is a signal indicating a potential corresponding to the potential of the electrode potential signal VX[m]. More specifically, in this embodiment, the detection result signal SK[m] is a signal obtained by amplifying the electrode potential signal VX[m] and removing noise components from the amplified electrode potential signal VX[m]. Furthermore, the detection circuit 33 generates a detected potential signal SL. Here, the detected potential signal SL is a signal that indicates the potential corresponding to the potential detection result by the detection circuit 33. Note that the detection circuit 33 is an example of a "detection unit," the detection result signal SK[m] is an example of a "result signal," and the detection potential signal SL is an example of a "potential signal."

[0026] The inspection unit 5 inspects the discharge section D[m] based on the detection result signal SK[m] supplied from the detection circuit 33, and outputs an inspection result signal SS[m] indicating the result of the inspection. Hereinafter, the discharge section D[m] that is the subject of inspection by the inspection unit 5 may be referred to as the inspected discharge section DK.

[0027] The inkjet printer 1 performs an inspection process, which is a series of processes including inspection of the ejection unit DK to be inspected by the inspection unit 5, and driving the ejection unit DK to be inspected, which is performed for the inspection of the ejection unit DK to be inspected. When the inspection process is executed, the control unit 2 supplies a designated signal SI to the head unit 3. This allows the control unit 2 to select the discharge unit DK to be inspected from among the discharge units D[1] to D[M]. The control unit 2 then controls the head unit 3 so that the discharge unit DK to be inspected is driven by the drive signal Com, and the electrode potential signal VX[m] detected from the discharge unit DK to be inspected is supplied to the detection circuit 33. When the inspection process is executed, the detection circuit 33 generates a detection result signal SK[m] based on the electrode potential signal VX[m] detected from the discharge unit DK to be inspected. When the inspection process is executed, the inspection unit 5 inspects the discharge unit D[m] driven as the discharge unit DK to be inspected based on the detection result signal SK[m] supplied from the detection circuit 33, and outputs an inspection result signal SS[m] indicating the inspection result.

[0028] Furthermore, in this embodiment, as described above, prior to the inspection process including the inspection of the discharge section D[m] by the inspection unit 5, a charging process is performed to charge the parasitic capacitance that has accumulated on the supply path of the electrode potential signal VX[m] in the supply circuit 31. The decision unit 6 determines the end of the charging process based on the detected potential signal SL supplied from the detection circuit 33, and outputs a charging end designation signal ST indicating the result of the decision. Hereinafter, the discharge section D[m] used as the charging path for parasitic capacitance in the charging process may be referred to as the charging path discharge section DC.

[0029] In this embodiment, it is assumed that the inkjet printer 1 is capable of both a low-speed charging mode and a high-speed charging mode for charging. Hereinafter, the low-speed charging mode will be referred to as the low-speed charging mode, and the high-speed charging mode will be referred to as the high-speed charging mode. Here, the high-speed charging mode is a process that charges parasitic capacity at a faster speed than the low-speed charging mode. The inkjet printer 1 can selectively perform either the low-speed charging mode or the high-speed charging mode as its charging process.

[0030] Figure 2 is a perspective view showing an example of the schematic internal structure of inkjet printer 1.

[0031] As shown in Figure 2, in this embodiment, it is assumed that the inkjet printer 1 is a serial printer. Specifically, when the inkjet printer 1 performs a printing process, it transports the recording paper PP in the X1 direction, and while moving the head unit 3 back and forth in the Y1 direction which intersects the X1 direction and the Y2 direction which is the opposite direction of the Y1 direction, it ejects ink from the ejection unit D[m] to form dots on the recording paper PP according to the print data Img.

[0032] In the following, the X1 direction and its opposite direction, the X2 direction, will be collectively referred to as the "X-axis direction," the Y1 direction intersecting the X-axis direction and its opposite direction, the Y2 direction, will be collectively referred to as the "Y-axis direction," and the Z1 direction intersecting the X-axis and Y-axis directions and its opposite direction, the Z2 direction, will be collectively referred to as the "Z-axis direction." In this embodiment, as an example, the case in which the X-axis direction, Y-axis direction, and Z-axis direction are mutually orthogonal will be described. However, the present invention is not limited to this embodiment. The X-axis direction, Y-axis direction, and Z-axis direction only need to intersect each other. In this embodiment, the Z1 direction is the direction in which ink is ejected from the ejection section D [m].

[0033] As shown in Figure 2, the inkjet printer 1 according to this embodiment comprises a housing 100 and a carriage 110 that is capable of reciprocating within the housing 100 in the Y-axis direction and is equipped with four head units 3.

[0034] In this embodiment, as shown in Figure 2, it is assumed that the carriage 110 houses four ink cartridges 120, each corresponding one-to-one with four inks: cyan, magenta, yellow, and black. Furthermore, as described above, this embodiment assumes that the inkjet printer 1 has four head units 3, each corresponding one-to-one with the four ink cartridges 120. Each ejection unit D[m] receives ink from the ink cartridge 120 corresponding to the head unit 3 on which the ejection unit D[m] is located. As a result, each ejection unit D[m] fills itself with the supplied ink, and the ink filled inside the ejection unit D[m] can be ejected from the nozzle N provided in the ejection unit D[m]. Note that the ink cartridges 120 may be located outside the carriage 110.

[0035] Furthermore, as described above, the inkjet printer 1 according to this embodiment includes a transport unit 7. As shown in Figure 2, the transport unit 7 comprises a carriage transport mechanism 71 for reciprocating the carriage 110 in the Y-axis direction, a carriage guide shaft 76 for supporting the carriage 110 so that it can reciprocate in the Y-axis direction, a media transport mechanism 73 for transporting the recording paper PP, and a platen 75 provided in the Z1 direction of the carriage 110. Therefore, when a printing process is performed, the transport unit 7 uses the carriage transport mechanism 71 to reciprocate the head unit 3 together with the carriage 110 along the carriage guide shaft 76 in the Y-axis direction, and the media transport mechanism 73 transports the recording paper PP on the platen 75 in the X1 direction, thereby changing the relative position of the recording paper PP with respect to the head unit 3 and enabling ink to land on the entire recording paper PP.

[0036] Figure 3 is a schematic partial cross-sectional view of the recording head 32, cut to include the ejection section D[m].

[0037] As shown in Figure 3, the ejection unit D[m] comprises a piezoelectric element PZ[m], a cavity CV[m] filled with ink, a nozzle N communicating with the cavity CV[m], and a diaphragm 321. The ejection unit D[m] ejects ink from the cavity CV[m] through the nozzle N when the piezoelectric element PZ[m] is driven by a supply drive signal Vin[m]. The cavity CV[m] is a space partitioned by a cavity plate 324, a nozzle plate 323 on which the nozzle N is formed, and a diaphragm 321. The cavity CV[m] communicates with a reservoir 325 via an ink supply port 326. The reservoir 325 communicates with an ink cartridge 120 corresponding to the ejection unit D[m] via a common liquid chamber 327. The piezoelectric element PZ[m] has an upper electrode Zu[m], a lower electrode Zd[m], and a piezoelectric body Zm[m] provided between the upper electrode Zu[m] and the lower electrode Zd[m]. The lower electrode Zd[m] is electrically connected to a power supply line Ld set to a predetermined potential VBS. When a supply drive signal Vin[m] is supplied to the upper electrode Zu[m] and a voltage is applied between the upper electrode Zu[m] and the lower electrode Zd[m], the piezoelectric element PZ[m] is displaced in the Z1 or Z2 direction according to the applied voltage, and as a result the piezoelectric element PZ[m] vibrates. The lower electrode Zd[m] is joined to the diaphragm 321. Therefore, when the piezoelectric element PZ[m] is driven by the supply drive signal Vin[m] and vibrates, the diaphragm 321 also vibrates. Then, the vibration of the diaphragm 321 changes the volume of the cavity CV[m] and the pressure inside the cavity CV[m], causing the ink filled in the cavity CV[m] to be ejected from the nozzle N. In this embodiment, the upper electrode Zu[m] is an example of a "driving electrode".

[0038] Figure 4 is an explanatory diagram illustrating an example of the arrangement of four head units 3 and a total of 4M nozzles N provided on the four head units 3, when the inkjet printer 1 is viewed from above in the Z2 direction. As shown in Figure 4, the head unit 3 is provided with nozzle rows Ln. Here, nozzle row Ln is a plurality of nozzles N arranged to extend in a row in a predetermined direction. In this embodiment, as an example, it is assumed that each nozzle row Ln consists of M nozzles N arranged to extend in the X-axis direction.

[0039] <<2. Head Unit 3 Configuration>> The configuration of the head unit 3 will be described below with reference to Figures 5 and 6.

[0040] Figure 5 is a block diagram showing an example of the configuration of the head unit 3.

[0041] As shown in Figure 5, the head unit 3 comprises a supply circuit 31, a recording head 32, and a detection circuit 33. The head unit 3 also includes a wiring Lc to which a drive signal Com is supplied from the drive signal generation unit 4, a power supply line Ld set to potential VBS, and a wiring Ls for supplying an electrode potential signal VX[m] to the detection circuit 33. Note that wiring Lc is an example of "first wiring," and wiring Ls is an example of "second wiring."

[0042] The supply circuit 31 comprises M switches Wc[1] to Wc[M] that correspond one-to-one with M discharge units D[1] to D[M], M switches Ws[1] to Ws[M] that correspond one-to-one with M discharge units D[1] to D[M], a switch Wf, a resistor Rf, and a connection state specifying circuit 310 that specifies the connection state of each switch.

[0043] The connection status specification circuit 310 generates a connection status specification signal Qc[m] that specifies whether switch Wc[m] is on or off, a connection status specification signal Qs[m] that specifies whether switch Ws[m] is on or off, a connection status specification signal Qf that specifies whether switch Wf is on or off, a connection status specification signal Q1 that specifies whether switch W1 (described later) is on or off, and a connection status specification signal Q2 that specifies whether switch W2 (described later) is on or off, based on at least some of the following signals supplied from the control unit 2: the specification signal SI, the latch signal LAT, the change signal CH, and the period specification signal Tsig, the mode signal Mod, and the clock signal CL.

[0044] The switch Wc[m] switches between conductivity and non-conductivity between the wiring Lc and the upper electrode Zu[m] of the piezoelectric element PZ[m] based on the connection status specification signal Qc[m]. In this embodiment, the switch Wc[m] is turned on when the connection status specification signal Qc[m] is high level and turned off when it is low level. When the switch Wc[m] is turned on, the drive signal Com supplied to the wiring Lc is supplied to the upper electrode Zu[m] of the discharge section D[m] as the supply drive signal Vin[m]. The switch Ws[m] switches between conduction and non-conductivity between the wiring Ls and the upper electrode Zu[m] of the piezoelectric element PZ[m] based on the connection state specification signal Qs[m]. In this embodiment, the switch Ws[m] is turned on when the connection state specification signal Qs[m] is at a high level and turned off when it is at a low level. When the switch Ws[m] is turned on, the potential of the upper electrode Zu[m] provided in the discharge section D[m] is supplied to the detection circuit 33 via the wiring Ls as the electrode potential signal VX[m]. Switch Wf switches the conduction and deconduction between wiring Lc and wiring Ls based on the connection state designation signal Qf. In this embodiment, switch Wf turns on when the connection state designation signal Qf is high level and turns off when it is low level. When switch Wf is on, the drive signal Com supplied to wiring Lc is supplied to node Nd0, which is part of wiring Ls, via a resistor Rf electrically connected between switch Wf and wiring Ls. The resistor Rf is placed between the switch Wf and the wiring Ls. However, the resistor Rf may also be placed between the wiring Lc and the switch Wf.

[0045] In this embodiment, the connection state designation circuit 310 is an example of a "designation unit," switch Wc[m] is an example of a "first switch," switch Ws[m] is an example of a "second switch," switch Wf is an example of a "third switch," and resistor Rf is an example of a "resistor element."

[0046] In this embodiment, the detection circuit 33 generates a detection result signal SK[m] having a waveform corresponding to the waveform of the electrode potential signal VX[m] supplied from the wiring Ls, based on the electrode potential signal VX[m]. Specifically, the detection circuit 33 generates a signal that is an amplified version of the electrode potential signal VX[m], with noise components removed from the electrode potential signal VX[m], and outputs this generated signal as the detection result signal SK[m]. The detection circuit 33 also generates a detection potential signal SL based on the potential of the wiring Ls detected by the detection circuit 33.

[0047] Figure 6 is a block diagram showing an example of the configuration of the detection circuit 33.

[0048] As shown in Figure 6, the detection circuit 33 comprises a pre-stage detection circuit 331 and a post-stage detection circuit 332. The pre-stage detection circuit 331 comprises a capacitor CP1, operational amplifiers OP1 to OP2, switches W1 to W2, and resistors RS1 to RS3. The post-stage detection circuit 332 comprises a capacitor CP2, resistors RS4 to RS5, and a bandpass filter 333.

[0049] Capacitor CP1 has one electrode electrically connected to node Nd0 and the other electrode electrically connected to node Nd1. Resistor RS1 is electrically connected at one end to node Nd1 and at the other end to analog ground AGND, which is set to a fixed potential. Switch W1 switches between conduction and non-conductivity between one end of resistor RS1 and analog ground AGND. In this embodiment, switch W1 is turned on when the connection status specification signal Q1 is high level and turned off when it is low level. In this embodiment, the capacitor CP1, resistor RS1, and switch W1 function as a high-pass filter.

[0050] The operational amplifier OP1 includes a non-inverting input terminal electrically connected to node Nd1, an output terminal electrically connected to node Nd2, and an inverting input terminal electrically connected to node Nd2 via resistor RS2 and electrically connected to analog ground AGND via resistor RS3. In this embodiment, the operational amplifier OP1, resistors RS2 and RS3 function as an amplification circuit that amplifies the amplitude of the signal input to node Nd1 and outputs it to node Nd2.

[0051] The operational amplifier OP2 includes a non-inverting input terminal electrically connected to node Nd2, an inverting input terminal electrically connected to node Nd3, and an output terminal electrically connected to node Nd3. In this embodiment, the operational amplifier OP2 functions as a buffer that converts impedance and outputs a low-impedance signal to node Nd3.

[0052] Switch W2 switches between conduction and non-conduction between node Nd3 and node Nd4. In this embodiment, switch W2 turns on when the connection status specification signal Q2 is high level and turns off when it is low level. In this embodiment, the detection circuit 33 outputs the signal supplied from switch W2 to node Nd4 as the detection potential signal SL.

[0053] Capacitor CP2 has one electrode electrically connected to node Nd4 and the other electrode electrically connected to analog ground AGND. Resistor RS4 is electrically connected at one end to node Nd4 and at the other end to a power supply line LH set to a fixed potential. Specifically, the potential of power supply line LH may be, for example, the high-potential power supply potential supplied to the head unit 3. Resistor RS5 is electrically connected to node Nd4 at one end and to analog ground AGND at the other end. The bandpass filter 333 outputs a detection result signal SK[m], which is a signal in which specific frequency components are extracted from the signal input to node Nd4, to node Nd5. Node Nd5 is electrically connected to the inspection unit 5.

[0054] As described above, the detection circuit 33 generates a detection result signal SK[m] based on the electrode potential signal VX[m] input to node Nd0, and outputs the generated detection result signal SK[m] from node Nd5. In addition, the detection circuit 33 generates a detection potential signal SL based on the potential of node Nd0, i.e., the potential of wiring Ls, and outputs the generated detection potential signal SL from node Nd4.

[0055] <<3. Overview of Head Unit 3 Operation>> The operation of the head unit 3 will be explained below with reference to Figures 7 through 12.

[0056] In this embodiment, when the inkjet printer 1 performs a printing process, a charging process, or an inspection process, one or more unit periods TP are set as the operating period of the inkjet printer 1. In this embodiment, the inkjet printer 1 can drive each ejection unit D[m] for the printing process, a charging process, or an inspection process during each unit period TP. In the following, the k-th unit period TP among K consecutive unit periods TP may be expressed as unit period TP(k). Here, the value K is a natural number satisfying "K≧1", and the variable k is a natural number satisfying "1≦k≦K".

[0057] Figure 7 is a timing chart showing an example of various signals, such as the drive signal Com, supplied to the head unit 3 during a unit period TP(k) when printing is performed during that unit period TP(k).

[0058] As shown in Figure 7, when the printing process is executed, the control unit 2 outputs a latch signal LAT having multiple pulse PLLs. This allows the control unit 2 to define a unit period TP(k) as the period from the rising edge of one pulse PLL to the rising edge of the next pulse PLL.

[0059] When the printing process is executed, the control unit 2 outputs a change signal CH with a pulse PLC during the unit period TP(k). As a result, the control unit 2 divides the unit period TP(k) into a control period TQ1 from the rising edge of the pulse PLL to the rising edge of the pulse PLC, and a control period TQ2 from the rising edge of the pulse PLC to the rising edge of the pulse PLL.

[0060] As shown in Figure 7, the designation signal SI includes M individual designation signals Sd[1] to Sd[M] that correspond one-to-one with M ejection units D[1] to D[M]. The individual designation signals Sd[m] specify the mode of operation of the ejection unit D[m] in each unit period TP(k) when the inkjet printer 1 performs printing, charging, or inspection processing.

[0061] When a printing, charging, or inspection process is performed, the control unit 2 supplies a designation signal SI containing M individual designation signals Sd[1] to Sd[M] to the connection state designation circuit 310 in synchronization with the clock signal CL prior to the unit period TP(k). Also, when a printing, charging, or inspection process is performed, the control unit 2 supplies a mode signal Mod to the connection state designation circuit 310 prior to the unit period TP(k). The connection state designation circuit 310 then generates connection state designation signals Qc[m] and Qs[m] based on the individual designation signal Sd[m] during the unit period TP(k) in which the printing, charging, or inspection process is performed. Also, during the unit period TP(k) in which the printing, charging, or inspection process is performed, the connection state designation circuit 310 generates connection state designation signals Qf, Q1, and Q2 based on the mode signal Mod.

[0062] As shown in Figure 8, which will be described later, in this embodiment, the individual designation signal Sd[m] can take any one of four values ​​during the unit period TP(k) in which the printing process is performed: a value of "1" which designates the ejection unit D[m] as the large dot forming ejection unit DP-1, a value of "2" which designates the ejection unit D[m] as the medium dot forming ejection unit DP-2, a value of "3" which designates the ejection unit D[m] as the small dot forming ejection unit DP-3, and a value of "4" which designates the ejection unit D[m] as the non-dot forming ejection unit DP-4.

[0063] Here, the large dot-forming discharge section DP-1 is the discharge section D that forms large dots in a unit period TP(k). The medium dot-forming discharge section DP-2 is the discharge section D that forms medium dots in a unit period TP(k). The small dot-forming discharge section DP-3 is the discharge section D that forms small dots in a unit period TP(k). The non-dot-forming discharge section DP-4 is the discharge section D that does not form dots in a unit period TP(k).

[0064] As shown in Figure 7, when a printing process is performed, the drive signal generation unit 4 supplies a printing drive signal Com-P as the drive signal Com in each unit period TP(k). The printing drive signal Com-P has waveforms PP1 and PP2, which are provided in each unit period TP(k). Waveform PP1 is provided in the control period TQ1 of the unit period TP(k), and is a waveform that returns to the reference potential V0, passing through a potential VL1 which is lower than the reference potential V0, and a potential VH1 which is higher than the reference potential V0. Waveform PP1 is determined so that when a supply drive signal Vin[m] having waveform PP1 is supplied to the ejection unit D[m], ink corresponding to the ink amount ξ1 is ejected from the ejection unit D[m]. Waveform PP2 is provided during the control period TQ2 of the unit period TP(k), and is a waveform that returns to the reference potential V0 after passing through a potential VL2 which is lower than the reference potential V0, and a potential VH2 which is higher than the reference potential V0. Waveform PP2 is defined such that when a supply drive signal Vin[m] having waveform PP2 is supplied to the ejection unit D[m], ink corresponding to the ink amount ξ2 is ejected from the ejection unit D[m]. In this embodiment, it is assumed that large dots are formed from the sum of ink amounts ξ1 and ξ2, medium dots are formed from ink amount ξ1, and small dots are formed from ink amount ξ2.

[0065] In this embodiment, as an example, we assume that when the potential of the supply drive signal Vin[m] supplied to the ejection unit D[m] is high, the volume of the cavity CV[m] in the ejection unit D[m] becomes smaller compared to when the potential is low. Therefore, when the ejection unit D[m] is driven by a supply drive signal Vin[m] having waveform PP1 or waveform PP2, the ink in the ejection unit D[m] is ejected from the nozzle N as the potential of the supply drive signal Vin[m] changes from low to high.

[0066] Figure 8 is an explanatory diagram showing an example of the operation of the connection state specification circuit 310 during a unit period TP(k) in which the printing process is performed.

[0067] As shown in Figure 8, when the individual designation signal Sd[m] indicates a value of "1" which designates the ejection unit D[m] as the large dot forming ejection unit DP-1 during a unit period TP(k), the connection state designation circuit 310 maintains the connection state designation signal Qc[m] at a high level for the entire unit period TP(k). In this case, the switch Wc[m] is turned on for the entire unit period TP(k). Therefore, during the unit period TP(k), the ejection unit D[m] is driven by the supply drive signal Vin[m] having waveforms PP1 and PP2, and ejects ink equivalent to the amount of a large dot, which is the sum of ink amounts ξ1 and ξ2. Furthermore, if the individual designation signal Sd[m] indicates a value of "2" which designates the ejection unit D[m] as the medium dot forming ejection unit DP-2 in a unit period TP(k), the connection state designation circuit 310 maintains the connection state designation signal Qc[m] at a high level during the control period TQ1. In this case, the switch Wc[m] is turned on during the control period TQ1. Therefore, during the control period TQ1, the ejection unit D[m] is driven by the supply drive signal Vin[m] having waveform PP1 and ejects ink with an ink quantity ξ1, which corresponds to the medium dot. Furthermore, if the individual designation signal Sd[m] indicates a value of "3" which designates the ejection unit D[m] as the small dot forming ejection unit DP-3 in a unit period TP(k), the connection state designation circuit 310 maintains the connection state designation signal Qc[m] at a high level during the control period TQ2. In this case, the switch Wc[m] is turned on during the control period TQ2. Therefore, during the control period TQ2, the ejection unit D[m] is driven by the supply drive signal Vin[m] having waveform PP2 and ejects ink with an ink quantity ξ2, which corresponds to a small dot. Furthermore, if the individual designation signal Sd[m] indicates a value of "4" which designates the ejection unit D[m] as the dot-non-forming ejection unit DP-4 during a unit period TP(k), the connection status designation circuit 310 maintains the connection status designation signal Qc[m] and the connection status designation signal Qs[m] at a low level for the unit period TP(k). In this case, the switches Wc[m] and Ws[m] are turned off for the unit period TP(k). As a result, the supply drive signal Vin[m] is not supplied to the ejection unit D[m] during the unit period TP(k), and no ink is ejected from the ejection unit D[m].

[0068] Figure 9 is an explanatory diagram showing an example of the operation of the connection state specification circuit 310 during a unit period TP(k) in which the printing process is performed.

[0069] As shown in Figure 9, when a printing process is performed and the mode signal Mod indicates a value of "1" indicating that a printing process is being performed, the connection state designation circuit 310 maintains the connection state designation signal Qf at a low level for a unit period TP(k), maintains the connection state designation signal Q1 at a high level for a unit period TP(k), and maintains the connection state designation signal Q2 at a low level for a unit period TP(k). Therefore, when a printing process is performed, switch Wf is off for a unit period TP(k), switch W1 is on for a unit period TP(k), and switch W2 is off for a unit period TP(k).

[0070] Figure 10 is a timing chart showing an example of various signals, such as the drive signal Com, supplied to the head unit 3 during a unit period TP(k) when non-printing processing (i.e., charging or inspection processing) is performed during that unit period TP(k).

[0071] As shown in Figure 10, when non-print processing is performed, the control unit 2 outputs a latch signal LAT having multiple pulse PLLs. This allows the control unit 2 to define a unit period TP(k) as the period from the rising edge of one pulse PLL to the rising edge of the next pulse PLL.

[0072] When non-printing processing is performed, control unit 2 outputs a period specification signal Tsig having pulses PLT1 and PLT2 in a unit period TP(k). As a result, control unit 2 divides the unit period TP(k) into control period TT1 from the rising edge of pulse PLL to the rising edge of pulse PLT1, control period TT2 from the rising edge of pulse PLT1 to the falling edge of pulse PLT1, control period TT3 from the falling edge of pulse PLT1 to the rising edge of pulse PLT2, control period TT4 from the rising edge of pulse PLT2 to the falling edge of pulse PLT2, and control period TT5 from the rising edge of pulse PLT2 to the rising edge of pulse PLL.

[0073] As shown in Figure 11, which will be described later, in this embodiment, the individual designation signal Sd[m] can take any one of three values ​​during the unit period TP(k) in which non-printing processing is performed: a value of "5" which designates the ejection unit D[m] as the standby ejection unit DT, a value of "6" which designates the ejection unit D[m] as the charging path ejection unit DC, and a value of "7" which designates the ejection unit D[m] as the inspection target ejection unit DK.

[0074] Here, the standby ejection unit DT is an ejection unit D that is neither designated as the charging path ejection unit DC nor as the inspection target ejection unit DK in the non-printing processing. The charging path discharge section DC is a discharge section D used in the charging process as a charging path for parasitic capacitance generated on the supply path of the electrode potential signal VX[m]. The discharge unit DK to be inspected is the discharge unit D that is subject to inspection by the inspection unit 5 during the inspection process.

[0075] In this embodiment, it is assumed that the inkjet printer 1 can selectively perform either a charging process or an inspection process as an extra-printing process in each unit period TP(k). Furthermore, as described above, this embodiment assumes that the inkjet printer 1 can selectively perform either a slow charging process or a fast charging process as the charging process in each unit period TP(k).

[0076] In this embodiment, we assume that in a unit period TP(k) in which the low-speed charging process is performed, all M discharge units D[1] to D[M] are designated as standby discharge units DT. Furthermore, in this embodiment, it is assumed that in a unit period TP(k) in which the fast charging process is performed, one of the M discharge units D[1] to D[M] is designated as the charging path discharge unit DC, and the remaining (M-1) discharge units D other than the discharge unit D designated as the charging path discharge unit DC are designated as standby discharge units DT. However, the present invention is not limited to this embodiment. In a unit period TP(k) in which the fast charging process is performed, two or more discharge units D may be designated as charging path discharge units DC, and the remaining discharge units D other than the two or more discharge units D designated as charging path discharge units DC may be designated as standby discharge units DT. Furthermore, in this embodiment, it is assumed that in a unit period TP(k) in which the inspection process is performed, one discharge unit D is designated as the discharge unit DK to be inspected, and the remaining (M-1) discharge units D other than the discharge unit D designated as the discharge unit DK to be inspected are designated as standby discharge units DT.

[0077] In this embodiment, it is assumed that the parasitic capacitance to be charged in the charging process is the capacitance parasitic to the switch Ws[m]. However, the present invention is not limited to this embodiment. The parasitic capacitance to be charged in the charging process may also be the capacitance parasitic to the wiring Ls.

[0078] As shown in Figure 10, when non-printing processing is performed, the drive signal generation unit 4 supplies a test drive signal Com-K as the drive signal Com in each unit period TP(k). The test drive signal Com-K has a waveform PS provided in each unit period TP(k). The waveform PS is such that in the control period TT1, the potential changes from a reference potential V0, through a potential VS1 lower than the reference potential V0, to a potential VS2 higher than the reference potential V0, the potential VS2 is maintained in the control periods TT2, TT3, and TT4, and in the control period TT5, the potential changes from VS2 to the reference potential V0. In this embodiment, the waveform PS is determined so that ink is not ejected from the ejection unit D[m] when a supply drive signal Vin[m] having the waveform PS is supplied to the ejection unit D[m].

[0079] Figure 11 is an explanatory diagram illustrating an example of the operation of the connection state specification circuit 310 during a unit period TP(k) in which non-printing processing (i.e., charging processing or inspection processing) is performed.

[0080] As shown in Figure 11, when the individual designation signal Sd[m] indicates a value of "5" which designates the discharge unit D[m] as the standby discharge unit DT during a unit period TP(k), the connection status designation circuit 310 maintains the connection status designation signals Qc[m] and Qs[m] at a low level for the unit period TP(k). In this case, switches Wc[m] and Ws[m] are turned off for the unit period TP(k). Therefore, the discharge unit D[m] is not supplied with the supply drive signal Vin[m] during the unit period TP(k), and the potential of the upper electrode Zu[m] does not affect the potential of the wiring Ls. Furthermore, if the individual designation signal Sd[m] indicates a value of "6" which designates the discharge unit D[m] as the charging path discharge unit DC in a unit period TP(k), the connection state designation circuit 310 maintains the connection state designation signal Qc[m] at a high level during control periods TT1 and TT2, and maintains the connection state designation signal Qs[m] at a high level during control periods TT2, TT3, and TT4. In this case, the switch Wc[m] is turned on during control periods TT1 and TT2, and the switch Ws[m] is turned on during control periods TT2, TT3, and TT4. Furthermore, if the individual designation signal Sd[m] indicates a value of "7" which designates the discharge unit D[m] as the discharge unit DK to be inspected during a unit period TP(k), the connection status designation circuit 310 maintains the connection status designation signal Qc[m] at a high level during control periods TT1, TT2, and TT5, and maintains the connection status designation signal Qs[m] at a high level during control periods TT2, TT3, and TT4. In this case, the switch Wc[m] is turned on during control periods TT1, TT2, and TT5, and the switch Ws[m] is turned on during control periods TT2, TT3, and TT4.

[0081] Figure 12 is an explanatory diagram illustrating an example of the operation of the connection state specification circuit 310 during a unit period TP(k) in which non-printing processing (i.e., charging processing or inspection processing) is performed.

[0082] As shown in Figure 12, when an off-print process is performed and the mode signal Mod indicates a value of "0" indicating that an off-print process is being performed, the connection state designation circuit 310 maintains the connection state designation signal Qf at a high level during control periods TT2, TT3, and TT4, maintains the connection state designation signal Q1 at a high level during control periods TT1, TT2, TT4, and TT5, and maintains the connection state designation signal Q2 at a high level during control period TT3. Therefore, when a printing process is performed, switch Wf is turned on during control periods TT2, TT3, and TT4, switch W1 is turned on during control periods TT1, TT2, TT4, and TT5, and switch W2 is turned on during control period TT3.

[0083] <<4. Overview of non-print processing>> The following outlines the non-printing process, with reference to Figures 13 and 14.

[0084] Figure 13 is a flowchart illustrating an example of the operation of the inkjet printer 1 when charging and inspection processes are performed as non-printing processes. In this embodiment, it is assumed that the non-printing processes include slow charging, fast charging, and inspection processes.

[0085] As shown in Figure 13, when the non-printing process is started, the control unit 2 sets the variable k to "1" (S101).

[0086] Next, the inkjet printer 1 performs the charging process (S110).

[0087] Specifically, the inkjet printer 1 first performs a slow charging process during a unit period TP(k) as part of the charging process (S111). Next, the determination unit 6 provided in the inkjet printer 1 performs a charging process to determine whether the detected potential signal SL satisfies specific conditions (S113). Hereafter, the process in step S113 in which the determination unit 6 determines whether or not specific conditions are satisfied may be referred to as the specific condition determination process. The specific conditions will be described later. Then, if the result of the determination in step S113 is negative, the inkjet printer 1 adds "1" to the variable k (S115) and proceeds to step S111. On the other hand, if the result of the determination in step S113 is positive, the inkjet printer 1 adds "1" to the variable k (S117) and proceeds to step S119. Next, the inkjet printer 1 performs a fast charging process for a unit period TP(k) (S119) as part of the charging process, and then terminates the charging process.

[0088] Subsequently, the inkjet printer 1 performs an inspection process (S120) within the unit period TP(k), and then terminates the non-printing process.

[0089] Figure 14 is an explanatory diagram illustrating the potential change of the detected potential signal SL and the specific conditions when an off-print process is performed. In Figure 14, it is assumed that the slow charging process is repeatedly performed in seven unit periods TP(1) to TP(7) until the specific conditions are met. Furthermore, it is assumed that at the start of unit period TP(1), the parasitic capacitance of switch Ws[m] is not charged. In the following, the control period TT3 included in unit period TP(k) may be referred to as control period TT3(k).

[0090] As shown in Figure 14, when the non-printing process is initiated and slow charging is performed during unit period TP(1), the potential of the detected potential signal SL fluctuates significantly between the upper limit potential VS-u and the lower limit potential VS-d during control period TT3(1) because the charging of the parasitic capacitance in switch Ws[m] is not yet complete. Similarly, the potential of the detected potential signal SL also fluctuates significantly between the upper limit potential VS-u and the lower limit potential VS-d during unit periods TP(2) and TP(3) because the charging of the parasitic capacitance in switch Ws[m] is not yet complete. Subsequently, during unit period TP(4), the charging of the parasitic capacitance in switch Ws[m] progresses, and the lowest potential of the detected potential signal SL becomes higher than the lower limit potential VS-d. As a result, the range of variation in the potential of the detected potential signal SL during unit period TP(4) becomes smaller than the range of variation during unit periods TP(1) to TP(3).

[0091] Then, during the unit period TP(5) to TP(7), the charging of the parasitic capacitance on the switch Ws[m] progresses further, so the minimum potential of the detected potential signal SL becomes greater than or equal to the threshold potential Vth0, and the range of potential fluctuation of the detected potential signal SL during the unit period TP(5) to TP(7) becomes less than or equal to the allowable fluctuation amount dVS1. In this embodiment, the condition that the amount of potential fluctuation of the detected potential signal SL during the unit period TP(k) is less than or equal to the allowable fluctuation amount dVS1 is adopted as a specific condition. In other words, in this embodiment, the specific condition is satisfied when the amount of potential fluctuation of the detected potential signal SL during the unit period TP(k) is less than or equal to the allowable fluctuation amount dVS1. In the example shown in Figure 14, the amount of potential fluctuation of the detected potential signal SL during the unit period TP(5) is less than or equal to the allowable fluctuation amount dVS1, so the specific condition is satisfied during the unit period TP(5).

[0092] Here, the allowable fluctuation dVS1 is the potential fluctuation of node Nd4 corresponding to the case when the maximum rated current flows through switch Ws[m]. Specifically, it is the potential fluctuation of node Nd4 in a unit period TP(k) when switch Ws[m] is turned on and the maximum rated current of switch Ws[m] flows through switch Ws[m] during that unit period TP(k). However, the present invention is not limited to this embodiment. The allowable fluctuation dVS1 may also be, for example, the value obtained by multiplying the potential difference between the upper limit potential VS-u and the lower limit potential VS-d by a coefficient less than 1. The allowable fluctuation dVS1 may also be, for example, the value obtained by multiplying the potential difference between the upper limit potential VS-u and the lower limit potential VS-d by "0.5". Furthermore, the threshold potential Vth0 is the potential obtained by subtracting the allowable variation dVS1 from the upper limit potential VS-u. In this embodiment, it is assumed that the threshold potential Vth0 is higher than the lower limit potential VS-d.

[0093] The decision unit 6 determines, based on the detected potential signal SL, whether the potential fluctuation amount of the detected potential signal SL during a unit period TP(k) (more precisely, the control period TT3(k)) is less than or equal to the allowable fluctuation amount dVS1. If the potential fluctuation amount of the detected potential signal SL during a unit period TP(k) is less than or equal to the allowable fluctuation amount dVS1, it outputs a charging termination signal ST indicating the value "1" to indicate that the slow charging process will be terminated. On the other hand, if the potential fluctuation amount of the detected potential signal SL during a unit period TP(k) is greater than the allowable fluctuation amount dVS1, it outputs a charging termination signal ST indicating the value "0" to indicate that the slow charging process will be continued.

[0094] In this embodiment, the period from the start of non-printing processing to the start of inspection processing is an example of a "preparation period". For example, in the example shown in Figure 14, if slow charging processing is performed during the period from unit period TP(1) to unit period TP(5), specific conditions are met in unit period TP(5), fast charging processing is performed in unit period TP(6), and inspection processing is performed in unit period TP(7), then the period from unit period TP(1) to unit period TP(6) corresponds to the "preparation period". Furthermore, in this embodiment, the operation of the supply circuit 31 during the execution of the slow charging process is an example of the "first charging operation," the operation of the supply circuit 31 during the execution of the fast charging process is an example of the "second charging operation," the allowable fluctuation amount dVS1 is an example of the "determined amount," the upper limit potential VS-u is an example of the "first threshold," the threshold potential Vth0 is an example of the "second threshold," the condition that the detected potential signal SL maintains a potential of VS-u or less in a unit period TP(k) is an example of the "first condition," and the condition that the detected potential signal SL maintains a potential of VS-u or more in a unit period TP(k) is an example of the "second condition."

[0095] <<5. Overview of Low-Speed ​​Charging Process>> The following outline of the low-speed charging process will be explained with reference to Figures 15 to 20.

[0096] Figure 15 is a timing chart illustrating an example of the operation of the head unit 3 when slow charging processing is performed in the inkjet printer 1. Figures 16 to 20 are circuit diagrams illustrating an example of the operation of the head unit 3 when slow charging processing is performed in the inkjet printer 1. Specifically, Figure 16 shows an example of the operation of the head unit 3 during the control period TT1 of the unit period TP(k) in which slow charging processing is performed; Figure 17 shows an example of the operation of the head unit 3 during the control period TT2 of the unit period TP(k) in which slow charging processing is performed; Figure 18 shows an example of the operation of the head unit 3 during the control period TT3 of the unit period TP(k) in which slow charging processing is performed; Figure 19 shows an example of the operation of the head unit 3 during the control period TT4 of the unit period TP(k) in which slow charging processing is performed; and Figure 20 shows an example of the operation of the head unit 3 during the control period TT5 of the unit period TP(k) in which slow charging processing is performed.

[0097] As shown in Figure 15, during the control period TT1 of the unit period TP(k) in which the slow charging process is performed, the connection status designation signals Qc[1]~Qc[M] remain at a low level, the connection status designation signals Qs[1]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a low level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 16, during the control period TT1 of the unit period TP(k), switches Wc[1]~Wc[M] remain in the off state, switches Ws[m]~Ws[M] remain in the off state, switch Wf remains in the off state, switch W1 remains in the on state, and switch W2 remains in the off state.

[0098] Therefore, during the control period TT1 of the unit period TP(k) in which the slow charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 remain in a state where they are not electrically connected to wiring Lc and piezoelectric element PZ[m].

[0099] As shown in Figure 15, during the control period TT2 of the unit period TP(k) in which the slow charging process is performed, the connection status designation signals Qc[1]~Qc[M] remain at a low level, the connection status designation signals Qs[1]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 17, during the control period TT2 of the unit period TP(k), switches Wc[1]~Wc[M] remain in the off state, switches Ws[m]~Ws[M] remain in the off state, switch Wf remains in the on state, switch W1 remains in the on state, and switch W2 remains in the off state.

[0100] Therefore, during the control period TT2 of the unit period TP(k) in which the slow charging process is performed, node Nd0 of the detection circuit 33 and wiring Ls are electrically connected to wiring Lc via switch Wf and resistor Rf. During the control period TT2 of the unit period TP(k), the potential of the drive signal Com is potential VS2. For this reason, during the control period TT2 of the unit period TP(k) in which the slow charging process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic to switch Ws[m], and the parasitic capacitance CPs[m] is charged. In this embodiment, it is assumed that the resistance value of resistor Rf is sufficiently large compared to the on-resistance of switch Wc[m] and the on-resistance of switch Ws[m]. Specifically, a resistor with a resistance value of about 10kΩ to 9000kΩ may be used as resistor Rf.

[0101] As shown in Figure 15, during the control period TT3 of the unit period TP(k) in which the slow charging process is performed, the connection status designation signals Qc[1]~Qc[M] remain at a low level, the connection status designation signals Qs[1]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a low level, and the connection status designation signal Q2 remains at a high level. Therefore, as shown in Figure 18, during the control period TT3 of the unit period TP(k), switches Wc[1]~Wc[M] remain in the off state, switches Ws[m]~Ws[M] remain in the off state, switch Wf remains in the on state, switch W1 remains in the off state, and switch W2 remains in the on state.

[0102] Therefore, during the control period TT3 of the unit period TP(k) in which the slow charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wf and resistor Rf. During the control period TT3 of the unit period TP(k), the potential of the drive signal Com is potential VS2. For this reason, during the control period TT3 of the unit period TP(k) in which the slow charging process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic to switch Ws[m], and the parasitic capacitance CPs[m] is charged. Also, during the control period TT3 of the unit period TP(k) in which the slow charging process is performed, switch W2 is turned on, so node Nd3 and node Nd4 are electrically connected. Node Nd3 is set to a potential corresponding to the potential of node Nd0 connected to wiring Ls. Therefore, during the control period TT3 of the unit period TP(k) in which the slow charging process is performed, a detection potential signal SL having a potential corresponding to the potential of node Nd0 connected to wiring Ls is output from node Nd4.

[0103] As shown in Figure 15, during the control period TT4 of the unit period TP(k) in which the slow charging process is performed, the connection status designation signals Qc[1]~Qc[M] remain at a low level, the connection status designation signals Qs[1]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 19, during the control period TT4 of the unit period TP(k), switches Wc[1]~Wc[M] remain in the off state, switches Ws[m]~Ws[M] remain in the off state, switch Wf remains in the on state, switch W1 remains in the on state, and switch W2 remains in the off state.

[0104] Therefore, during the control period TT4 of the unit period TP(k) in which the slow charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wf and resistor Rf. During the control period TT4 of the unit period TP(k), the potential of the drive signal Com is potential VS2. For this reason, during the control period TT4 of the unit period TP(k) in which the slow charging process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic to switch Ws[m], and the parasitic capacitance CPs[m] is charged.

[0105] As shown in Figure 15, during the control period TT5 of the unit period TP(k) in which the slow charging process is performed, the connection status designation signals Qc[1]~Qc[M] remain at a low level, the connection status designation signals Qs[1]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a low level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 20, during the control period TT5 of the unit period TP(k), switches Wc[1]~Wc[M] remain in the off state, switches Ws[m]~Ws[M] remain in the off state, switch Wf remains in the off state, switch W1 remains in the on state, and switch W2 remains in the off state.

[0106] Therefore, during the control period TT5 of the unit period TP(k) in which the slow charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 remain in a state where they are not electrically connected to wiring Lc and piezoelectric element PZ[m].

[0107] As described above, according to this embodiment, in the slow-speed charging process, the parasitic capacitance CPs[m] is charged via a resistor Rf having a sufficiently large resistance value. Therefore, according to this embodiment, in the slow-speed charging process, it is possible to suppress the flow of current exceeding the maximum rated current to switches Wc[m], Ws[m], and Wf. In other words, according to this embodiment, in the slow-speed charging process, excessive charging of the parasitic capacitance CPs[m] is suppressed, and the risk of failure of switches Wc[m], Ws[m], and Wf due to excessive charging of the parasitic capacitance CPs[m] is reduced.

[0108] Furthermore, according to this embodiment, when slow charging is performed in unit period TP(k), the decision unit 6 determines, based on the detected potential signal SL, whether or not to perform slow charging again in unit period TP(k+1). In other words, according to this embodiment, if the parasitic capacity CPs[m] cannot be sufficiently charged by performing slow charging in unit period TP(k), it becomes possible to repeatedly perform slow charging in unit period TP(k+1). Therefore, according to this embodiment, it is possible to suppress situations in which the parasitic capacity CPs[m] is not sufficiently charged.

[0109] In this embodiment, the period from control period TT2 to control period TT4 within the unit period TP(k) in which the low-speed charging process is performed is an example of a "charging period".

[0110] <<6. Overview of High-Speed ​​Charging Process>> The following outline of the fast charging process will be explained with reference to Figures 21 to 26.

[0111] Figure 21 is a timing chart illustrating an example of the operation of the head unit 3 when high-speed charging is performed in the inkjet printer 1. Figures 22 to 26 are circuit diagrams illustrating an example of the operation of the head unit 3 when high-speed charging is performed in the inkjet printer 1. Specifically, Figure 22 shows an example of the operation of the head unit 3 during the control period TT1 of the unit period TP(k) in which high-speed charging is performed; Figure 23 shows an example of the operation of the head unit 3 during the control period TT2 of the unit period TP(k) in which high-speed charging is performed; Figure 24 shows an example of the operation of the head unit 3 during the control period TT3 of the unit period TP(k) in which high-speed charging is performed; Figure 25 shows an example of the operation of the head unit 3 during the control period TT4 of the unit period TP(k) in which high-speed charging is performed; and Figure 26 shows an example of the operation of the head unit 3 during the control period TT5 of the unit period TP(k) in which high-speed charging is performed. In Figures 21 to 26, we assume, as an example, that the discharge unit D[1] is designated as the charging path discharge unit DC, and the discharge units D[2] to D[M] are designated as the standby discharge units DT.

[0112] As shown in Figure 21, during the control period TT1 of the unit period TP(k) in which the fast charging process is performed, the connection status designation signal Qc[1] remains at a high level, the connection status designation signal Qs[1] remains at a low level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a low level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 22, during the control period TT1 of the unit period TP(k), switch Wc[1] remains in the ON state, switch Ws[1] remains in the OFF state, switches Wc[2]~Wc[M] remain in the OFF state, switches Ws[2]~Ws[M] remain in the OFF state, switch Wf remains in the OFF state, switch W1 remains in the ON state, and switch W2 remains in the OFF state.

[0113] Therefore, during the control period TT1 of the unit period TP(k) in which the fast charging process is performed, a drive signal Com is supplied from the wiring Lc to the upper electrode Zu[1] via the switch Wc[1], and as a result, the piezoelectric element PZ[1] is driven. Also, during the control period TT1 of the unit period TP(k) in which the fast charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 remain disconnected from the wiring Lc and the piezoelectric element PZ[m].

[0114] As shown in Figure 21, during the control period TT2 of the unit period TP(k) in which the fast charging process is performed, the connection status designation signal Qc[1] remains at a high level, the connection status designation signal Qs[1] remains at a high level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 23, during the control period TT2 of the unit period TP(k), switch Wc[1] remains in the ON state, switch Ws[1] remains in the ON state, switches Wc[2]~Wc[M] remain in the OFF state, switches Ws[2]~Ws[M] remain in the OFF state, switch Wf remains in the ON state, switch W1 remains in the ON state, and switch W2 remains in the OFF state.

[0115] Therefore, during the control period TT2 of the unit period TP(k) in which the fast charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wf and resistor Rf. Also, during the control period TT2 of the unit period TP(k) in which the fast charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wc[1] and switch Ws[1]. During the control period TT2 of the unit period TP(k) in which the fast charging process is performed, the potential of the drive signal Com is potential VS2. For this reason, during the control period TT2 of the unit period TP(k) in which the fast charging process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic on switch Ws[m] via two paths: one via switch Wf and resistor Rf, and the other via switch Wc[1] and switch Ws[1], and the parasitic capacitance CPs[m] is charged.

[0116] As shown in Figure 21, during the control period TT3 of the unit period TP(k) in which the fast charging process is performed, the connection status designation signal Qc[1] remains at a low level, the connection status designation signal Qs[1] remains at a high level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a low level, and the connection status designation signal Q2 remains at a high level. Therefore, as shown in Figure 24, during the control period TT3 of the unit period TP(k), switch Wc[1] remains in the off state, switch Ws[1] remains in the on state, switches Wc[2]~Wc[M] remain in the off state, switches Ws[2]~Ws[M] remain in the off state, switch Wf remains in the on state, switch W1 remains in the off state, and switch W2 remains in the on state.

[0117] Therefore, during the control period TT3 of the unit period TP(k) in which the fast charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wf and resistor Rf. During the control period TT3 of the unit period TP(k) in which the fast charging process is performed, the potential of the drive signal Com is potential VS2. For this reason, during the control period TT3 of the unit period TP(k) in which the fast charging process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic on switch Ws[m] via the path through switch Wf and resistor Rf, and the parasitic capacitance CPs[m] is charged.

[0118] Furthermore, during the control period TT3 of the unit period TP(k) in which the high-speed charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to the upper electrode Zu[1] via switch Ws[1]. Therefore, during the control period TT3 of the unit period TP(k) in which the high-speed charging process is performed, the potential of node Nd0 becomes the potential based on the potential of the electrode potential signal VX[1], and the potential of node Nd4 becomes the potential based on the potential of node Nd0. In this case, a detection potential signal SL having a potential corresponding to the potential of node Nd0 connected to wiring Ls is output from node Nd4. Also in this case, a detection result signal SK[1] having a waveform corresponding to the potential change of the electrode potential signal VX[1] is output from node Nd5.

[0119] As shown in Figure 21, during the control period TT4 of the unit period TP(k) in which the fast charging process is performed, the connection status designation signal Qc[1] remains at a low level, the connection status designation signal Qs[1] remains at a high level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 25, during the control period TT4 of the unit period TP(k), switch Wc[1] remains in the off state, switch Ws[1] remains in the on state, switches Wc[2]~Wc[M] remain in the off state, switches Ws[2]~Ws[M] remain in the off state, switch Wf remains in the on state, switch W1 remains in the on state, and switch W2 remains in the off state.

[0120] Therefore, during the control period TT4 of the unit period TP(k) in which the fast charging process is performed, node Nd0 of the detection circuit 33 and wiring Ls are electrically connected to wiring Lc via switch Wf and resistor Rf. During the control period TT4 of the unit period TP(k) in which the fast charging process is performed, the potential of the drive signal Com is potential VS2. For this reason, during the control period TT4 of the unit period TP(k) in which the fast charging process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] attached to switch Ws[m] via the path through switch Wf and resistor Rf, and the parasitic capacitance CPs[m] is charged.

[0121] As shown in Figure 21, during the control period TT5 of the unit period TP(k) in which the fast charging process is performed, the connection status designation signal Qc[1] remains at a low level, the connection status designation signal Qs[1] remains at a low level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a low level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 26, during the control period TT5 of the unit period TP(k), the switch Wc[1] remains in the off state, the switch Ws[1] remains in the off state, the switches Wc[2]~Wc[M] remain in the off state, the switches Ws[2]~Ws[M] remain in the off state, the switch Wf remains in the off state, the switch W1 remains in the on state, and the switch W2 remains in the off state.

[0122] Therefore, during the control period TT5 of the unit period TP(k) in which the high-speed charging process is performed, node Nd0 and wiring Ls of the detection circuit 33 remain in a state where they are not electrically connected to wiring Lc and piezoelectric element PZ[m].

[0123] As described above, according to this embodiment, in the high-speed charging process, the parasitic capacitance CPs[m] is charged via two paths: one through switch Wf and resistor Rf, and another through switch Wc[1] and switch Ws[1]. Therefore, according to this embodiment, even if the charging of the parasitic capacitance CPs[m] by the low-speed charging process is insufficient, the parasitic capacitance CPs[m] can be reliably charged by the high-speed charging process.

[0124] Furthermore, according to this embodiment, after charging the parasitic capacity CPs[m] by slow charging, charging the parasitic capacity CPs[m] is performed by fast charging. Therefore, according to this embodiment, compared to the embodiment in which fast charging is performed without slow charging (hereinafter referred to as "proportional"), it is possible to reduce the possibility of a current exceeding the maximum rated current flowing through switches Wc[m], Ws[m], and Wf during fast charging. Therefore, according to this embodiment, the risk of failure of switches Wc[m], Ws[m], and Wf during fast charging can be reduced.

[0125] <<7. Overview of the Inspection Process>> The following outline of the inspection process will be explained with reference to Figures 27 to 33.

[0126] Figure 27 is a timing chart illustrating an example of the operation of the head unit 3 when an inspection process is performed in the inkjet printer 1. Figures 28 to 32 are circuit diagrams illustrating an example of the operation of the head unit 3 when an inspection process is performed in the inkjet printer 1. Specifically, Figure 28 shows an example of the operation of the head unit 3 during the control period TT1 of the unit period TP(k) in which the inspection process is performed; Figure 29 shows an example of the operation of the head unit 3 during the control period TT2 of the unit period TP(k) in which the inspection process is performed; Figure 30 shows an example of the operation of the head unit 3 during the control period TT3 of the unit period TP(k) in which the inspection process is performed; Figure 31 shows an example of the operation of the head unit 3 during the control period TT4 of the unit period TP(k) in which the inspection process is performed; and Figure 32 shows an example of the operation of the head unit 3 during the control period TT5 of the unit period TP(k) in which the inspection process is performed. In Figures 28 to 32, we assume, as an example, that discharge unit D[1] is designated as the discharge unit DK to be inspected, and discharge units D[2] to D[M] are designated as standby discharge units DT.

[0127] As shown in Figure 27, during the control period TT1 of the unit period TP(k) in which the inspection process is performed, the connection status designation signal Qc[1] remains at a high level, the connection status designation signal Qs[1] remains at a low level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a low level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 28, during the control period TT1 of the unit period TP(k), switch Wc[1] remains in the ON state, switch Ws[1] remains in the OFF state, switches Wc[2]~Wc[M] remain in the OFF state, switches Ws[2]~Ws[M] remain in the OFF state, switch Wf remains in the OFF state, switch W1 remains in the ON state, and switch W2 remains in the OFF state.

[0128] Therefore, during the control period TT1 of the unit period TP(k) in which the inspection process is performed, a drive signal Com is supplied from the wiring Lc to the upper electrode Zu[1] via the switch Wc[1], which drives the piezoelectric element PZ[1] and causes vibration in the discharge section D[1].

[0129] As shown in Figure 27, during the control period TT2 of the unit period TP(k) in which the inspection process is performed, the connection status designation signal Qc[1] remains at a high level, the connection status designation signal Qs[1] remains at a high level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 29, during the control period TT2 of the unit period TP(k), switch Wc[1] remains in the ON state, switch Ws[1] remains in the ON state, switches Wc[2]~Wc[M] remain in the OFF state, switches Ws[2]~Ws[M] remain in the OFF state, switch Wf remains in the ON state, switch W1 remains in the ON state, and switch W2 remains in the OFF state.

[0130] Therefore, during the control period TT2 of the unit period TP(k) in which the inspection process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wf and resistor Rf. Also, during the control period TT2 of the unit period TP(k) in which the inspection process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wc[1] and switch Ws[1]. During the control period TT2 of the unit period TP(k) in which the inspection process is performed, the potential of the drive signal Com is potential VS2. For this reason, during the control period TT2 of the unit period TP(k) in which the inspection process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic on switch Ws[m] via two paths: one via switch Wf and resistor Rf, and the other via switch Wc[1] and switch Ws[1], thereby charging the parasitic capacitance CPs[m].

[0131] Furthermore, vibrations generated in the discharge unit D[1] during the control period TT1 of the unit period TP(k) in which the inspection process is performed persist during the control period TT2 of the unit period TP(k). Then, during the control period TT2 of the unit period TP(k) in which the inspection process is performed, the potential of the upper electrode Zu[1] changes due to the vibrations remaining in the discharge unit D[1]. Then, during the control period TT2 of the unit period TP(k) in which the inspection process is performed, the potential of the upper electrode Zu[1] is supplied to node Nd0 as an electrode potential signal VX[1] via switch Ws[1].

[0132] As shown in Figure 27, during the control period TT3 of the unit period TP(k) in which the inspection process is performed, the connection status designation signal Qc[1] remains at a low level, the connection status designation signal Qs[1] remains at a high level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a low level, and the connection status designation signal Q2 remains at a high level. Therefore, as shown in Figure 30, during the control period TT3 of the unit period TP(k), switch Wc[1] remains in the off state, switch Ws[1] remains in the on state, switches Wc[2]~Wc[M] remain in the off state, switches Ws[2]~Ws[M] remain in the off state, switch Wf remains in the on state, switch W1 remains in the off state, and switch W2 remains in the on state.

[0133] Therefore, during the control period TT3 of the unit period TP(k) in which the inspection process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to wiring Lc via switch Wf and resistor Rf. During the control period TT3 of the unit period TP(k) in which the inspection process is performed, the potential of the drive signal Com is potential VS2. For this reason, during the control period TT3 of the unit period TP(k) in which the inspection process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic on switch Ws[m] via the path through switch Wf and resistor Rf, and the parasitic capacitance CPs[m] is charged.

[0134] Furthermore, during the control period TT3 of the unit period TP(k) in which the inspection process is performed, node Nd0 and wiring Ls of the detection circuit 33 are electrically connected to the upper electrode Zu[1] via switch Ws[1]. Therefore, during the control period TT3 of the unit period TP(k) in which the inspection process is performed, the potential of node Nd0 becomes the potential based on the potential of the electrode potential signal VX[1], and the potential of node Nd4 becomes the potential based on the potential of node Nd0. In this case, a detection potential signal SL having a potential corresponding to the potential of node Nd0 connected to wiring Ls is output from node Nd4. Also in this case, a detection result signal SK[1] having a waveform corresponding to the potential change of the electrode potential signal VX[1] is output from node Nd5.

[0135] As shown in Figure 27, during the control period TT4 of the unit period TP(k) in which the inspection process is performed, the connection status designation signal Qc[1] remains at a low level, the connection status designation signal Qs[1] remains at a high level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a high level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 31, during the control period TT4 of the unit period TP(k), switch Wc[1] remains in the off state, switch Ws[1] remains in the on state, switches Wc[2]~Wc[M] remain in the off state, switches Ws[2]~Ws[M] remain in the off state, switch Wf remains in the on state, switch W1 remains in the on state, and switch W2 remains in the off state.

[0136] Therefore, during the control period TT4 of the unit period TP(k) in which the inspection process is performed, node Nd0 of the detection circuit 33 and wiring Ls are electrically connected to wiring Lc via switch Wf and resistor Rf. During the control period TT4 of the unit period TP(k) in which the inspection process is performed, the potential of the drive signal Com is potential VS2. For this reason, during the control period TT4 of the unit period TP(k) in which the inspection process is performed, the drive signal Com with potential VS2 supplied to wiring Lc is supplied to the parasitic capacitance CPs[m] parasitic on switch Ws[m] via the path through switch Wf and resistor Rf, and the parasitic capacitance CPs[m] is charged.

[0137] As shown in Figure 27, during the control period TT5 of the unit period TP(k) in which the inspection process is performed, the connection status designation signal Qc[1] remains at a high level, the connection status designation signal Qs[1] remains at a low level, the connection status designation signals Qc[2]~Qc[M] remain at a low level, the connection status designation signals Qs[2]~Qs[M] remain at a low level, the connection status designation signal Qf remains at a low level, the connection status designation signal Q1 remains at a high level, and the connection status designation signal Q2 remains at a low level. Therefore, as shown in Figure 32, during the control period TT5 of the unit period TP(k), switch Wc[1] remains in the ON state, switch Ws[1] remains in the OFF state, switches Wc[2]~Wc[M] remain in the OFF state, switches Ws[2]~Ws[M] remain in the OFF state, switch Wf remains in the OFF state, switch W1 remains in the ON state, and switch W2 remains in the OFF state.

[0138] Therefore, during the control period TT5 of the unit period TP(k) in which the inspection process is performed, a drive signal Com is supplied from the wiring Lc to the upper electrode Zu[1] via the switch Wc[1], and as a result, the piezoelectric element PZ[1] is driven.

[0139] As described above, according to this embodiment, during the control period TT3 of the unit period TP(k) in which the inspection process is performed, the node Nd5 outputs a detection result signal SK[1] having a waveform corresponding to the potential change of the electrode potential signal VX[1]. Furthermore, according to this embodiment, during the control period TT3 of the unit period TP(k) in which the inspection process is performed, the parasitic capacitance CPs[m] is sufficiently charged in the charging process performed in advance, so the occurrence of a situation in which the current of the electrode potential signal VX[1] is used to charge the parasitic capacitance CPs[m] can be suppressed. Therefore, according to this embodiment, the detection circuit 33 can output a detection result signal SK[1] that accurately represents the waveform based on the vibration remaining in the discharge section D[1] during the control period TT3 of the unit period TP(k) in which the inspection process is performed.

[0140] Figure 33 is an explanatory diagram illustrating an example of the operation of the inspection unit 5 during the inspection process.

[0141] The inspection unit 5 inspects whether the ink ejection state at the ejection unit D[m] is normal based on the detection result signal SK[m], that is, whether the ejection state at the ejection unit D[m] is normal and no ejection abnormality has occurred, and outputs an inspection result signal SS[m] indicating the result of the inspection. Here, ejection abnormality is a general term for a state in which the ink ejection state at the ejection unit D[m] is abnormal, that is, a state in which ink cannot be accurately ejected from the nozzle N provided by the ejection unit D[m]. For example, ejection abnormality includes a state in which ink cannot be ejected from the ejection unit D[m], a state in which the ejection unit D[m] ejects an amount of ink different from the amount of ink ejection defined by the drive signal Com, and a state in which the ejection unit D[m] ejects ink at a speed different from the ink ejection speed defined by the drive signal Com, etc.

[0142] Generally, the vibrations remaining in the ejection section D[m] have a natural vibration period determined by the shape of the nozzle N of the ejection section D[m], the weight of the ink filled in the cavity CV[m] of the ejection section D[m], and the viscosity of the ink filled in the cavity CV[m] of the ejection section D[m]. Generally, if an ejection abnormality occurs due to air bubbles being mixed into the cavity CV[m] of the ejection section D[m], the period of the vibrations remaining in the ejection section D[m] will be shorter compared to when the ejection state is normal. Also, generally, if an ejection abnormality occurs due to foreign matter such as paper dust adhering near the nozzle N of the ejection section D[m], the period of the vibrations remaining in the ejection section D[m] will be longer compared to when the ejection state is normal. Furthermore, generally, if an ejection abnormality occurs due to increased viscosity of the ink in the cavity CV[m] of the ejection section D[m], the period of the vibrations remaining in the ejection section D[m] will be longer compared to when the ejection state is normal. Thus, the period of residual vibration in the ejection section D[m] varies depending on the ink ejection state at the ejection section D[m]. Therefore, the ink ejection state at the ejection section D[m] can be inspected based on the period of residual vibration at the ejection section D[m].

[0143] As described above, the waveform of the detection result signal SK[m] represents the waveform of the residual vibration in the ejection unit D[m] driven as the ejection unit DK to be inspected. In other words, the period TC[m] of the waveform of the detection result signal SK[m] is the period of the residual vibration in the ejection unit D[m] driven as the ejection unit DK to be inspected. Therefore, the ink ejection state in the ejection unit D[m] driven as the ejection unit DK to be inspected can be inspected based on the period TC[m] of the waveform of the detection result signal SK[m].

[0144] In this embodiment, the inspection unit 5 identifies the period TC[m] of the waveform of the detection result signal SK[m] based on the detection result signal SK[m]. Then, as shown in Figure 33, the inspection unit 5 inspects the ink ejection state at the ejection unit D[m] driven as the ejection unit DK to be inspected by comparing the period TC[m] with one or both of the threshold values ​​TL and TH, and generates an inspection result signal SS[m] indicating the result of the inspection. Here, the threshold value TL is an estimated boundary value between the period TC[m] of vibration occurring in the ejection unit D[m] when the ejection state of the ejection unit D[m] is normal and the period TC[m] of vibration occurring in the ejection unit D[m] when air bubbles are mixed into the cavity CV[m] of the ejection unit D[m]. Furthermore, threshold TH is a value greater than threshold TL and is an estimated boundary between the period TC[m] of vibration occurring in the ejection unit D[m] when the ejection state of the ejection unit D[m] is normal and the period TC[m] of vibration occurring in the ejection unit D[m] when foreign matter adheres near the nozzle N of the ejection unit D[m] or when the ink in the cavity CV[m] of the ejection unit D[m] becomes thicker.

[0145] As shown in FIG. 33, when the period TC[m] satisfies "TL ≤ TC[m] ≤ TH", the inspection unit 5 determines that the ink ejection state in the ejection unit D[m] is normal, and sets the value "1" indicating that the ink ejection state in the ejection unit D[m] is normal for the inspection result signal SS[m]. Further, when the period TC[m] satisfies "TC[m] < TL", the inspection unit 5 determines that ejection abnormality has occurred because air bubbles have entered the cavity CV[m] of the ejection unit D[m], and sets the value "2" indicating that ejection abnormality due to air bubbles has occurred in the ejection unit D[m] for the inspection result signal SS[m]. Further, when the period TC[m] satisfies "TH < TC[m]", the inspection unit 5 determines that ejection abnormality has occurred because foreign substances such as paper dust adhere near the nozzle N of the ejection unit D[m], or because the ink in the cavity CV[m] of the ejection unit D[m] has thickened, and sets the value "3" indicating that ejection abnormality due to foreign substances or thickening has occurred in the ejection unit D[m] for the inspection result signal SS[m]. As described above, the inspection unit 5 generates the inspection result signal SS[m] based on the period TC[m] of the waveform of the detection result signal SK[m].

[0146] <<8. Summary of this Embodiment>> As described above, according to this embodiment, in the low-speed charging process, the parasitic capacitance CPs[m] is charged via the resistor Rf having a sufficiently large resistance value. Therefore, according to this embodiment, in the low-speed charging process, the risk of failure of the switch Wc[m], the switch Ws[m], and the switch Wf can be reduced.

[0147] Further, according to this embodiment, when the parasitic capacitance CPs[m] cannot be sufficiently charged by executing the low-speed charging process in the unit period TP(k), the low-speed charging process is repeatedly executed in the unit period TP(k + 1). Therefore, according to this embodiment, it is possible to suppress the occurrence of a situation where the charging of the parasitic capacitance CPs[m] becomes insufficient.

[0148] Also, according to the present embodiment, in the high-speed charging process, the parasitic capacitance CPs[m] is charged via two paths: a path through the switch Wf and the resistor Rf, and a path through the switch Wc[1] and the switch Ws[1]. Therefore, according to the present embodiment, the parasitic capacitance CPs[m] can be surely charged by the high-speed charging process.

[0149] Also, according to the present embodiment, after charging the parasitic capacitance CPs[m] by the low-speed charging process, charging of the parasitic capacitance CPs[m] is performed by the high-speed charging process. Therefore, according to the present embodiment, the risk of failure of the switch Wc[m], the switch Ws[m], and the switch Wf in the high-speed charging process can be reduced.

[0150] Also, according to the present embodiment, in the control period TT3 of the unit period TP(k) in which the inspection process is executed, the current of the electrode potential signal VX[m] can be suppressed from generating a situation used for charging the parasitic capacitance CPs. Therefore, according to the present embodiment, in the control period TT3 of the unit period TP(k) in which the inspection process is executed, the detection circuit 33 can output a detection result signal SK[m] that accurately represents the waveform based on the vibration remaining in the ejection unit D[m].

[0151] <<B. Modification Example>> Each of the above embodiments can be variously modified. Specific modification modes are exemplified below. Two or more modes arbitrarily selected from the following examples can be appropriately combined within a range where they do not conflict with each other. For elements whose actions and functions are equivalent to those of the embodiment in the modification examples exemplified below, the reference numerals referred to in the above description are reused, and the detailed description of each is appropriately omitted.

[0152] <<Modification Example 1>> In the above-described embodiment, the case in which the detected potential signal SL is a signal indicating the potential of node Nd4 was illustrated, but the present invention is not limited to this embodiment. The detected potential signal SL may be a signal indicating the potential at any point in the detection circuit 33. For example, the detected potential signal SL may be a signal indicating the potential of node Nd0, or a signal indicating the potential of node Nd5.

[0153] Figure 34 is an explanatory diagram illustrating the potential change of the detected potential signal SL during the non-printing processing in this modified example. In this modified example, the case in which the detected potential signal SL is a signal indicating the potential of node Nd5 is used as an example. The inkjet printer 1 in this modified example has the same configuration as the inkjet printer 1 in the embodiment, except that the detected potential signal SL is a signal indicating the potential of node Nd5. In Figure 34, it is assumed that the slow charging process is repeatedly executed in seven unit periods TP(1) to TP(7) until specific conditions are met. It is assumed that at the start of unit period TP(1), the capacity parasitic on switch Ws[m] is not charged.

[0154] As shown in Figure 34, when the non-printing process is started and the slow charging process is performed in unit period TP(1), the potential of the detected potential signal SL fluctuates significantly from a potential below the upper threshold potential Vth1 to a potential higher than the upper threshold potential Vth1 because the charging of the parasitic capacity in the switch Ws[m] is not yet complete. Similarly, in unit periods TP(2), TP(3), and TP(4), the potential of the detected potential signal SL also fluctuates significantly from a potential lower than the lower threshold potential Vth2 to a potential higher than the upper threshold potential Vth1 because the charging of the parasitic capacity in the switch Ws[m] is not yet complete.

[0155] Subsequently, during the unit period TP(5) to TP(7), the charging of the parasitic capacitance in switch Ws[m] progresses, and the highest potential of the detected potential signal SL becomes a potential below the upper threshold potential Vth1, while the lowest potential of the detected potential signal SL becomes a potential above the lower threshold potential Vth2. In other words, during the unit period TP(5) to TP(7), the range of potential fluctuation of the detected potential signal SL becomes less than or equal to the allowable fluctuation amount dVS2, and is smaller than the range of fluctuation during the unit period TP(1) to TP(4). Here, the allowable fluctuation amount dVS2 is the value obtained by subtracting the lower threshold potential Vth2 from the upper threshold potential Vth1. The allowable fluctuation amount dVS2 may also be, for example, the potential fluctuation amount of node Nd5 corresponding to the case when the maximum rated current flows through switch Ws[m]. Furthermore, in this modified example, the conditions are adopted as specific conditions that the highest potential of the detected potential signal SL in a unit period TP(k) is less than or equal to the upper threshold potential Vth1, and the lowest potential of the detected potential signal SL in a unit period TP(k) is greater than or equal to the lower threshold potential Vth2. In the example shown in Figure 34, the specific conditions are satisfied in a unit period TP(5). However, in this modified example, the condition that the potential fluctuation amount of the detected potential signal SL in a unit period TP(k) is less than or equal to the allowable fluctuation amount dVS2 may also be adopted as a specific condition.

[0156] As described above, according to this modified version, the parasitic capacitance CPs[m] is charged by a slow charging process, and the necessity of repeating the slow charging process is determined based on the detected potential signal SL. Therefore, according to this modified version, the risk of failure of switches Wc[m], Ws[m], and Wf during the charging process can be reduced, and the occurrence of situations in which the parasitic capacitance CPs[m] is not sufficiently charged can be suppressed.

[0157] In this modified example, the allowable fluctuation dVS2 is an example of a "predetermined amount," the upper threshold potential Vth1 is an example of a "first threshold," the lower threshold potential Vth2 is an example of a "second threshold," the condition that the detected potential signal SL maintains a potential below the upper threshold potential Vth1 during a unit period TP(k) is an example of a "first condition," and the condition that the detected potential signal SL maintains a potential above the lower threshold potential Vth2 during a unit period TP(k) is an example of a "second condition."

[0158] <<Modification 2>> In the embodiments and modification 1 described above, the charging process was explained as an example in which the process includes one or more slow charging processes and a fast charging process performed after the one or more slow charging processes. However, the present invention is not limited to such embodiments. The charging process only needs to include at least one or more slow charging processes.

[0159] Figure 35 is a flowchart illustrating an example of the operation of the inkjet printer 1 when the non-printing processing described in this modified example is performed. In this modified example, it is assumed that the non-printing processing includes slow charging processing and inspection processing.

[0160] As shown in Figure 35, when the non-printing process is started, the control unit 2 sets the variable k to "1" (S101). Next, the inkjet printer 1 performs the charging process according to this modified example (S110B). Specifically, the inkjet printer 1 first performs a slow charging process during a unit period TP(k) as part of the charging process (S111). Next, the determination unit 6 provided in the inkjet printer 1 determines, as part of the charging process, whether or not the detected potential signal SL satisfies specific conditions (S113). Then, if the result of the determination in step S113 is negative, the inkjet printer 1 adds "1" to the variable k (S115) and proceeds to step S111. On the other hand, if the result of the determination in step S113 is positive, the inkjet printer 1 adds "1" to the variable k (S117), terminates the charging process, and proceeds to step S120. Subsequently, the inkjet printer 1 performs an inspection process (S120) within the unit period TP(k), and then terminates the non-printing process.

[0161] As described above, according to this modified version, similar to the embodiment, the parasitic capacitance CPs[m] is charged by a slow charging process, and the necessity of repeating the slow charging process is determined based on the detected potential signal SL. Therefore, according to this modified version, the risk of failure of switches Wc[m], Ws[m], and Wf during the charging process can be reduced, and the occurrence of a situation in which the parasitic capacitance CPs[m] is not sufficiently charged can be suppressed.

[0162] <<Modification 3>> In the embodiments and modifications 1 and 2 described above, the determination unit 6 determines the termination of the slow charging process based on the detected potential signal SL, but the present invention is not limited to these embodiments. The termination of the slow charging process may also be determined based on the number of charge cycles stored in the memory unit 8. Here, the number of charge cycles information is information indicating the number of times the slow charging process is performed (hereinafter referred to as the "required number of charge cycles"; an example of the "first number of charge cycles") that is necessary for the parasitic capacitance CPs[m] to be charged and specific conditions to be met.

[0163] In this modified example, if the storage unit 8 does not have charging cycle information stored, the control unit 2 performs the non-printing process shown in Figure 13 or Figure 35. Then, in this modified example, the control unit 2 determines the required number of charging cycles based on the results of the non-printing process shown in Figure 13 or Figure 35, and stores the charging cycle information indicating the required number of charging cycles in the storage unit 8. Specifically, in this modified example, the control unit 2 determines the number of slow charging processes performed in the non-printing process shown in Figure 13 or Figure 35 as the required number of charging cycles, and stores the charging cycle information indicating the required number of charging cycles in the storage unit 8. In this modified example, the charging cycle information may be generated in advance before the inkjet printer 1 is shipped.

[0164] On the other hand, in this modified example, if the storage unit 8 has stored the charging cycle information, the control unit 2 repeats the slow charging process for the required number of charging cycles indicated by the charging cycle information during the non-printing process. In this case, the decision unit 6 does not need to perform the specific condition determination process.

[0165] <<Modification 4>> In the embodiments and modifications 1 to 3 described above, the connection state designation circuit 310 was described as generating connection state designation signals Qf, Q1, and Q2 based on the mode signal Mod, but the present invention is not limited to such embodiments. The connection state designation circuit 310 may generate connection state designation signals Qf, Q1, and Q2 based on the designation signal SI. In this case, the control unit 2 does not need to supply the mode signal Mod to the head unit 3.

[0166] For example, if the connection status designation circuit 310 includes an individual designation signal Sd[m] indicating one of "1", "2", "3", or "4", it considers that printing is being performed and maintains the connection status designation signal Qf at a low level for a unit period TP(k), maintains the connection status designation signal Q1 at a high level for a unit period TP(k), and maintains the connection status designation signal Q2 at a low level for a unit period TP(k). Furthermore, for example, if the connection status designation circuit 310 includes an individual designation signal Sd[m] indicating one of "5", "6", or "7", it considers that an off-print process is being performed, and maintains the connection status designation signal Qf at a high level during control periods TT2, TT3, and TT4, maintains the connection status designation signal Q1 at a high level during control periods TT1, TT2, TT4, and TT5, and maintains the connection status designation signal Q2 at a high level during control period TT3.

[0167] <<Modification 5>> In the embodiments and modifications 1 to 4 described above, the detection circuit 33 was explained as comprising a pre-stage detection circuit 331 and a post-stage detection circuit 332, but the present invention is not limited to such embodiments. The detection circuit 33 only needs to include at least a pre-stage detection circuit 331. In this case, the post-stage detection circuit 332 may be provided in the inspection unit 5.

[0168] <<Modification 6>> In the embodiments and modifications 1 to 5 described above, it was assumed that the inkjet printer 1 is equipped with four head units 3, but the present invention is not limited to this form. The inkjet printer 1 may be equipped with one to three head units 3, or it may be equipped with five or more head units 3.

[0169] <<Modification 7>> In the above-described embodiments and Modifications 1 to 6, the case where the inkjet printer 1 is a serial printer has been exemplified. However, the present invention is not limited to such a mode. The inkjet printer 1 may be a so-called line printer in which a plurality of nozzles N are provided in the head unit 3 so as to extend wider than the width of the recording paper PP.

[0170] <<C. Supplementary Note>> Aspects related to the above embodiments and modifications are appended below. In order to facilitate understanding of each aspect, the following descriptions are provided with reference numerals of the drawings, but the present invention is not intended to be limited to the illustrated aspects.

[0171] <<Supplementary Note 1>> The inkjet printer 1 according to Supplementary Note 1 includes a piezoelectric element PZ[m] that is driven by a drive signal Com supplied to the upper electrode Zu[m] via the wiring Lc, and a discharge unit D[m] that discharges ink in response to the drive of the upper electrode Zu[m], a detection circuit 33 that detects the potential of the upper electrode Zu[m] via the wiring Ls, an inspection unit 5 that inspects the discharge unit D[m] based on the detection result of the detection circuit 33, a switch Wc[m] that switches whether to electrically connect the wiring Lc and the upper electrode Zu[m], a switch Ws[m] that switches whether to electrically connect the wiring Ls and the upper electrode Zu[m], a switch Wf that switches whether to electrically connect the wiring Lc and the wiring Ls, and a connection state specifying circuit 310 that specifies the electrical connection state of the switch Wf. The connection state specifying circuit 310 executes a first charging operation for specifying the connection state of the switch Wf so that a low-speed charging process in which the switch Wf is in an on state is executed in at least one period of a preparation period consisting of one or a plurality of unit periods TP(k) before the inspection of the discharge unit D[m] by the inspection unit 5. When the detection potential signal SL corresponding to the potential detected by the detection circuit 33 satisfies a specific condition, the first charging operation is terminated. When the detection potential signal SL does not satisfy the specific condition, the first charging operation is continued.

[0172] According to Appendix 1, the termination of the first charging operation is determined based on the detected potential signal SL corresponding to the potential detected by the detection circuit 33, making it possible to suppress overcharging or undercharging of the parasitic capacitance CPs[m] that is parasitic to the switch Ws[m].

[0173] <<Note 2>> The inkjet printer 1 according to Appendix 2 is the inkjet printer 1 according to Appendix 1, characterized in that it includes a resistor Rf provided between the switch Wf and the wiring Ls, or between the wiring Lc and the switch Wf.

[0174] According to Appendix 2, since the parasitic capacitance CPs[m] is charged via resistor Rf, failure of switch Wf during charging of parasitic capacitance CPs[m] can be suppressed.

[0175] <<Note 3>> The inkjet printer 1 according to Appendix 3 is the inkjet printer 1 according to Appendix 1 or Appendix 2, characterized in that the connection state designation circuit 310 designates the electrical connection state of switch Wc[m] and switch Ws[m], and when the detected potential signal SL satisfies specific conditions, it executes a second charging operation that designates the connection state of switch Wc[m], switch Ws[m] and switch Wf so that a high-speed charging process is performed in which switch Wc[m], switch Ws[m] and switch Wf are turned ON for at least a portion of the preparation period after the completion of the first charging operation.

[0176] According to Appendix 3, since slow charging is performed before fast charging, compared to the configuration in which fast charging is performed without slow charging, it is possible to suppress the occurrence of a situation in which the current increases to charge the parasitic capacitance CPs[m] at the start of fast charging. Therefore, according to Appendix 3, the possibility of failure of switches Wc[m] and Ws[m] due to the increase in current at the start of fast charging can be reduced.

[0177] <<Note 4>> The inkjet printer 1 according to Appendix 4 is the inkjet printer 1 according to Appendix 1 to Appendix 3, and is equipped with a storage unit 8 for storing charge cycle information, the drive signal Com is a signal having a waveform PS that is repeated at a frequency of a unit period TP(k) which includes the charging period from control period TT2 to control period TT4, and the connection state designation circuit 310 is characterized in that, when the charge cycle information indicates the required number of charges, it performs the first charging operation by turning on the switch Wf in each of the charging periods of the required number of charges which are included in the unit period TP(k) of the required number of charges.

[0178] According to Appendix 4, since the number of repetitions of the unit period TP(k) in which the first charging operation is performed is stored, the processing can be simplified compared to the method in which the termination of the first charging operation is determined each time.

[0179] <<Note 5>> The inkjet printer 1 according to Appendix 5 is the inkjet printer 1 according to Appendix 1 to Appendix 4, and is characterized in that it includes a decision unit 6 that determines whether or not to terminate the first charging operation based on a detected potential signal SL, the drive signal Com is a signal having a waveform PS that is repeated with a period of unit time TP(k), and the decision unit 6 determines to terminate the first charging operation if the amount of fluctuation of the potential indicated by the detected potential signal SL in unit time TP(k) is less than or equal to a predetermined amount.

[0180] According to Appendix 5, the first charging operation is terminated after the fluctuation of the potential of the detected potential signal SL over a unit period TP(k) has become sufficiently small, thereby suppressing overcharging or undercharging relative to the parasitic capacitance CPs[m].

[0181] <<Note 6>> The inkjet printer 1 according to Appendix 5 is the inkjet printer 1 according to Appendix 1 to Appendix 5, characterized in that the decision unit 6 determines to terminate the first charging operation when the first condition is met in a unit period TP(k) such that the detected potential signal SL maintains a potential of less than or equal to a first threshold, and the second condition is met in a unit period TP(k) such that the detected potential signal SL maintains a potential of greater than or equal to a second threshold that is less than the first threshold.

[0182] According to Appendix 6, the first charging operation is terminated after the fluctuation of the potential of the detected potential signal SL over a unit period TP(k) has become sufficiently small, thereby suppressing overcharging or undercharging relative to the parasitic capacitance CPs[m]. [Explanation of symbols]

[0183] 1... Inkjet printer, 2... Control unit, 3... Head unit, 4... Drive signal generation unit, 5... Inspection unit, 6... Decision unit, 7... Transport unit, 8... Memory unit, 31... Supply circuit, 32... Recording head, 33... Detection circuit, 310... Connection status specification circuit, PZ[m]... Piezoelectric element, Rf... Resistor, Wc[m]... Switch, Ws[m]... Switch, Wf... Switch, Zu[m]... Upper electrode.

Claims

1. It comprises a piezoelectric element driven by a drive signal supplied to a drive electrode via a first wiring, and a discharge unit that discharges liquid in response to the driving of the piezoelectric element, A detection unit that detects the potential of the drive electrode via a second wiring, An inspection unit that inspects the discharge unit based on the detection result of the detection unit, A first switch for switching whether or not to electrically connect the first wiring and the drive electrode, A second switch for switching whether or not to electrically connect the second wiring and the drive electrode, A third switch for switching whether or not to electrically connect the first wiring and the second wiring, A designation unit that specifies the electrical connection state of the third switch, Equipped with, The designated part is, During at least one period of the preparation period before the inspection of the discharge section by the inspection unit, a first charging operation is performed in which the third switch is turned ON. If the potential signal corresponding to the potential detected by the detection unit satisfies a specific condition, the first charging operation is terminated; if the specific condition is not satisfied, the first charging operation is continued. A liquid dispensing device characterized by the following features.

2. A resistive element is provided between the third switch and the second wiring, or between the first wiring and the third switch. The liquid dispensing device according to claim 1, characterized in that...

3. The designated part is, Specify the electrical connection state of the first switch and the second switch, If the aforementioned potential signal satisfies the aforementioned specific conditions, Of the aforementioned preparation period, at least a portion of the period after the completion of the first charging operation, A second charging operation is performed in which the first switch, the second switch, and the third switch are turned ON. The liquid dispensing device according to claim 2, characterized in that

4. Equipped with a storage device that stores information on the number of charging cycles, The drive signal is a signal having a waveform that repeats with a period of a unit period including the charging period, When the charging cycle information indicates a first cycle, the designated unit performs the first charging operation by turning on the third switch during each of the charging periods of the first cycle included in the unit period of the first cycle. The liquid dispensing device according to claim 1, characterized in that...

5. The unit includes a determination unit that determines whether or not to terminate the first charging operation based on the potential signal, The aforementioned drive signal is a signal having a waveform that repeats with a period of one unit period, The determination unit determines to terminate the first charging operation if the amount of fluctuation of the potential indicated by the potential signal during the unit period is less than or equal to a predetermined amount. The liquid dispensing device according to claim 1, characterized in that...

6. The aforementioned determination unit, In the aforementioned unit period, the first condition is that the potential signal maintains a potential below a first threshold, and If, during the aforementioned unit period, the second condition is met in which the potential signal maintains a potential greater than or equal to a second threshold that is smaller than the first threshold, It is decided to terminate the first charging operation. The liquid dispensing device according to claim 5, characterized in that...

7. It comprises a piezoelectric element driven by a drive signal supplied to a drive electrode via a first wiring, and a discharge unit that discharges liquid in response to the driving of the piezoelectric element, A detection unit detects the potential of the drive electrode via a second wiring and supplies a result signal indicating the detection result to an inspection unit that inspects the discharge unit based on the result signal. A first switch for switching whether or not to electrically connect the first wiring and the drive electrode, A second switch for switching whether or not to electrically connect the second wiring and the drive electrode, A third switch for switching whether or not to electrically connect the first wiring and the second wiring, A designation unit that specifies the electrical connection state of the third switch, Equipped with, The designated part is, During at least one period of the preparation period before the inspection of the discharge section by the inspection unit, a first charging operation is performed in which the third switch is turned ON. If the potential signal corresponding to the potential detected by the detection unit satisfies a specific condition, the first charging operation is terminated; if the specific condition is not satisfied, the first charging operation is continued. A head unit characterized by the following features.

8. A resistive element is provided between the third switch and the second wiring, or between the first wiring and the third switch. The head unit according to claim 7, characterized in that

9. The designated part is, Specify the electrical connection state of the first switch and the second switch, If the aforementioned potential signal satisfies the aforementioned specific conditions, Of the aforementioned preparation period, at least a portion of the period after the completion of the first charging operation, A second charging operation is performed in which the first switch, the second switch, and the third switch are turned ON. The head unit according to claim 8, characterized in that

10. The drive signal is a signal having a waveform that repeats with a period of a unit period including the charging period, The designated unit, when the charge count information stored in the storage device indicates a first charge count, performs the first charge operation by turning on the third switch during each of the charge periods included in the unit period of the first charge count. The head unit according to claim 7, characterized in that

11. The detection unit supplies the potential signal to the decision unit, which determines whether or not to terminate the first charging operation based on the potential signal. The aforementioned drive signal is a signal having a waveform that repeats with a period of one unit period, The determination unit determines to terminate the first charging operation if the amount of fluctuation of the potential indicated by the potential signal during the unit period is less than or equal to a predetermined amount. The head unit according to claim 7, characterized in that

12. The aforementioned determination unit, In the aforementioned unit period, the first condition is that the potential signal maintains a potential below a first threshold, and If, during the aforementioned unit period, the second condition is met in which the potential signal maintains a potential greater than or equal to a second threshold greater than the first threshold, It is decided to terminate the first charging operation. The head unit according to claim 11, characterized in that...

13. It comprises a piezoelectric element driven by a drive signal supplied to a drive electrode via a first wiring, and a discharge unit that discharges liquid in response to the driving of the piezoelectric element, A detection unit that detects the potential of the drive electrode via a second wiring, An inspection unit that inspects the discharge unit based on the detection result of the detection unit, A first switch for switching whether or not to electrically connect the first wiring and the drive electrode, A second switch for switching whether or not to electrically connect the second wiring and the drive electrode, A third switch for switching whether or not to electrically connect the first wiring and the second wiring, A method for inspecting a liquid dispensing device, comprising: During at least one period of the preparation period before the inspection of the discharge section by the inspection unit, a first charging operation is performed in which the third switch is turned ON. If the potential signal corresponding to the potential detected by the detection unit satisfies a specific condition, the first charging operation is terminated; if the specific condition is not satisfied, the first charging operation is continued. A method for inspecting a liquid dispensing device, characterized by the following features.

14. A resistive element is provided between the third switch and the second wiring, or between the first wiring and the third switch. The inspection method according to claim 13, characterized in that

15. If the aforementioned potential signal satisfies the aforementioned specific conditions, Of the aforementioned preparation period, at least a portion of the period after the completion of the first charging operation, A second charging operation is performed in which the first switch, the second switch, and the third switch are turned ON. The inspection method according to claim 14, characterized in that

16. The drive signal is a signal having a waveform that repeats with a period of a unit period including the charging period, When the charge cycle information stored in the storage device indicates a first charge cycle, the first charge operation is performed by turning on the third switch during each of the charge periods of the first charge cycle included in the unit period of the first charge cycle. The inspection method according to claim 13, characterized in that

17. The aforementioned drive signal is a signal having a waveform that repeats with a period of one unit period, If the amount of fluctuation of the potential indicated by the potential signal during the unit period is less than or equal to a predetermined amount, it is decided to terminate the first charging operation. The inspection method according to claim 13, characterized in that

18. In the aforementioned unit period, the first condition is that the potential signal maintains a potential below a first threshold, and If, during the aforementioned unit period, the second condition is met in which the potential signal maintains a potential greater than or equal to a second threshold greater than the first threshold, It is decided to terminate the first charging operation. The inspection method according to claim 17, characterized in that

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