Touch panels, display input devices, and electronic devices
A touch panel with alternating thick and thin wiring patterns addresses moiré interference and resistance issues, ensuring high visibility and detection speed by optimizing electrode unit cell configurations.
JP2026109921APending Publication Date: 2026-07-02VTS TOUCHSENSOR CO LTD
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- VTS TOUCHSENSOR CO LTD
- Filing Date
- 2024-12-20
- Publication Date
- 2026-07-02
AI Technical Summary
Technical Problem
The integration of a touch panel with a display panel can lead to moiré interference due to differing grid arrangements, deteriorating display quality, and narrowing conductor line widths increases resistance and susceptibility to noise, affecting detection speed and accuracy.
Method used
A touch panel design with alternating thick and thin wiring patterns in electrode unit cells, ensuring a high ratio of thick intersections, maintains visibility while reducing resistance and time constants, thereby enhancing detection speed and accuracy.
Benefits of technology
The design effectively suppresses display quality deterioration while maintaining redundancy and preventing decreases in detection speed and accuracy, improving overall performance.
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Smart Images
Figure 2026109921000001_ABST
Abstract
To maintain redundancy in the touch panel electrode wiring, reduce wiring resistance, and suppress a decrease in display quality in the display input device. [Solution] A touch panel in which a superimposed electrode 39 consisting of a first electrode, a transmitting electrode 32, and a second electrode, a receiving electrode 35, has a structure in which a plurality of superimposed unit cells 39U, each composed of four vertices K and four edges S, are repeated sharing vertices K and edges S, and at least a portion of the edges S consists of thick or thin wiring, and with respect to a cell J having an intersection at its center, a region in which cells J are included that alternately consist of a thick intersection cell adjacent area WV2 in which one, two, or three thick intersection cells with three or four thick wirings extending from them are lined up in one direction, and a thin intersection cell adjacent area NV2 in which the same number and direction as the thick intersection cell adjacent area consists of thin intersection cells with three or four thin wirings extending from them, accounts for 75% or more of the total number of cells J.
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