Semiconductor device manufacturing methods

Abstract

This provides an advantageous technique for manufacturing semiconductor devices in which multiple chips are arranged on a substrate. [Solution] A method for manufacturing a semiconductor device comprising a first substrate 101 on which a plurality of components 102 are arranged, and a plurality of chips 103 arranged on the first substrate corresponding to each of the plurality of components, comprising the steps of: preparing a member having the first substrate and the plurality of chips arranged on the first substrate; applying a precursor 104 to the member such that the amount applied to the upper part of the chips is less than that applied to other parts, thereby forming a first film 105 having a flat upper surface; and separating the member into individual pieces.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device.

Background Art

[0002] A method for manufacturing a semiconductor device is known in which a plurality of chips are arranged on a substrate such as a semiconductor wafer and then separated into individual pieces. In the technique described in Patent Document 1, a manufacturing method is disclosed in which after a plurality of chips arranged on a semiconductor wafer are embedded with an oxide film, a support substrate is provided.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Document 1, the embedding process of a plurality of chips and the planarization process after the embedding process have not been examined in detail. Therefore, an object of the present invention is to provide an advantageous technique in a method for manufacturing a semiconductor device in which a plurality of chips are arranged on a substrate.

Means for Solving the Problems

[0005] According to one disclosure of the present specification, a method for manufacturing a semiconductor device including a first substrate on which a plurality of components are arranged and a plurality of chips arranged on the first substrate corresponding to each of the plurality of components, the method comprising: preparing a member having the first substrate and the plurality of chips arranged on the first substrate; applying a precursor onto the member such that an application amount on the upper part of the chip is less than that on other parts to form a first film having a flat upper surface; and separating the member into individual pieces. [Effects of the Invention]

[0006] According to the present invention, it is possible to provide an advantageous technique for manufacturing semiconductor devices in which multiple chips are arranged on a substrate. [Brief explanation of the drawing]

[0007] [Figure 1] A schematic diagram showing the configuration of a planarization device. [Figure 2] A schematic diagram illustrating the flattening process. [Figure 3] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the first embodiment. [Figure 4] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the first embodiment. [Figure 5] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the first embodiment. [Figure 6] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the second embodiment. [Figure 7] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the second embodiment. [Figure 8] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the second embodiment. [Figure 9] A schematic diagram illustrating an application example of the semiconductor device of the third embodiment. [Modes for carrying out the invention]

[0008] The embodiments will be described below with reference to the drawings. Note that the embodiments described below do not limit the invention as defined in the claims. While multiple features are described in the embodiments, not all of these features are essential to the invention, and the features may be combined in any way. Furthermore, in the attached drawings, the same or similar configurations are given the same reference numeral, and redundant descriptions may be omitted.

[0009] Embodiments of the present invention will be described in detail below with reference to the drawings. In the following description, terms indicating specific directions or positions (e.g., "up," "down," "right," "left," and other terms including these terms) will be used as needed. The use of these terms is for the purpose of facilitating the understanding of embodiments with reference to the drawings, and the meaning of these terms does not limit the technical scope of the present invention.

[0010] In this specification, a plan view refers to a view taken from a direction perpendicular to the top surface of the semiconductor substrate. A cross-sectional view refers to a surface perpendicular to the top surface of the semiconductor substrate. If the top surface of the semiconductor substrate is rough when viewed microscopically, the plan view is defined based on the top surface of the semiconductor substrate as viewed macroscopically. The top surface of the semiconductor substrate is defined as the surface on which elements formed on the semiconductor substrate, such as the gate of a transistor, are provided, or the surface on which connections to contact plugs are located.

[0011] Furthermore, expressions such as "A or B," "at least one of A and B," "at least one of A and / or B," and "one or more of A and / or B" include all possible combinations of the enumerated items unless explicitly defined otherwise. That is, the above expressions are understood to disclose all cases where at least one A is included, where at least one B is included, and where at least one A and at least one B are included. This applies equally to combinations of three or more elements.

[0012] This section explains the "approximately equal" relationship in this invention. While the design assumes an equal relationship, slight differences may occur due to manufacturing tolerances. This "approximately equal" relationship includes these slight differences resulting from manufacturing tolerances.

[0013] <First Embodiment> Figure 1 is a schematic diagram showing the configuration of the planarization apparatus 100 according to this embodiment. Directions are indicated in an XYZ coordinate system where the horizontal plane is the XY plane. Generally, the substrate 1, which is the object to be processed, is placed on the substrate stage 3 so that its surface is parallel to the horizontal plane (XY plane). Therefore, in the following, the directions that are orthogonal to each other in the plane along the surface of the substrate 1 will be referred to as the X axis and the Y axis, and the direction perpendicular to the X axis and the Y axis will be referred to as the Z axis. Also, in the following, the directions parallel to the X axis, Y axis and Z axis in the XYZ coordinate system will be referred to as the X direction, Y direction and Z direction, respectively, and the rotational directions around the X axis, Y axis and Z axis will be referred to as the θX direction, θY direction and θZ direction, respectively. The substrate 1 will be described later, but it is a material to which semiconductor processes can be applied, such as a semiconductor wafer, a semiconductor wafer with a wiring structure formed on it, a glass substrate with an element formed on it, or a metal substrate.

[0014] The underlying pattern on the substrate has an uneven profile resulting from the pattern formed in the previous process, and especially with the recent increase in the multilayer structure of memory elements, process substrates are now sometimes found to have steps of around 100 nm. Steps caused by gentle undulations across the entire substrate can be corrected by the focus tracking function of the scan exposure equipment used in the photoprocessing stage. However, fine-pitched irregularities that fit within the exposure slit area of ​​the exposure equipment may fall outside the exposure equipment's DOF ​​(Depth of Focus). Conventionally, methods such as SOC (Spin On Carbon) and CMP (Chemical Mechanical Polishing) have been used to smooth the underlying pattern of the substrate by forming or flattening a planarization layer. However, conventional techniques have the problem of not being able to obtain sufficient planarization performance. For example, manufacturing processes are evolving to new technology nodes such as 22 nm, 16 nm, 14 nm, and 10 nm. Even if a planarization layer that was practically sufficient was obtained at the previous node, that planarization layer may not be practical at the next node. For example, surface irregularities in the planarization layer that were acceptable in the previous node may not be acceptable in the next node. Furthermore, CMP is expensive and its applicability is limited, while the difference in substrate irregularities due to multi-layer construction is expected to increase further in the future.

[0015] To solve this problem, a planarization apparatus that uses imprint technology to planarize substrates is being investigated. The planarization apparatus brings a flat surface of a component, or a component without a pattern (a planar template), into contact with an uncured composition that has been supplied to the substrate in advance, thereby planarizing a localized area or the entire surface of the substrate. Subsequently, the composition is cured while in contact with the planar template, and the planar template is separated from the cured composition. This forms a planarized layer on the substrate. This planarization apparatus is not affected by the unevenness of the pattern surface of the substrate, unlike the planarization method using a commonly used SOC sacrificial film, and is therefore expected to improve the accuracy of planarization compared to existing methods.

[0016] The planarization device 100 in FIG. 1 can be implemented by a molding device that molds the composition on the substrate 1 using a plate (super straight) 9 as a pressing member. The planarization device 100 cures the composition while the material on the substrate 1 and the plate 9 are in contact, and forms a planarized layer of the material on the substrate 1 by separating the plate 9 from the cured composition.

[0017] The substrate 1 is a semiconductor, insulator, or metal substrate, and its shape can be circular like a silicon wafer or a quartz wafer, or rectangular like (mother) glass for FPD (Flat Panel Display). The material of the substrate 1 can be a single crystal silicon wafer, but is not limited thereto. The material of the substrate can be an elemental semiconductor or a compound semiconductor such as silicon, germanium, diamond, silicon carbide, silicon germanium, gallium nitride, gallium arsenide, indium arsenide, cadmium telluride. Also, the material of the substrate 1 can be an inorganic insulator such as silicon oxide, silicon nitride, aluminum oxide, aluminum nitride. Also, the material of the substrate 1 can be an organic insulator such as polyimide, polyamide, polycarbonate. Also, the substrate 1 may be aluminum, a titanium-tungsten alloy, an aluminum-silicon alloy, an aluminum-copper-silicon alloy. In short, the substrate 1 can be composed of any one or a plurality of materials selected from the materials listed above. Note that at least one layer of a semiconductor, insulator, or metal film may be formed on the surface of the substrate 1, and its surface may be flat or have formed irregularities. Also, a substrate having a adhesion layer formed on its surface by surface treatment such as silane coupling treatment, silazane treatment, film formation of an organic thin film, etc., to improve the adhesion to the composition may be used. Note that the substrate 1 is typically circular with a diameter of 300 mm, but is not limited thereto.

[0018] As the plate 9, it can be made of a light-transmissive material in consideration of the light irradiation process. The material of such a material is, for example, a light-transmissive inorganic material such as glass or quartz, or a light-transmissive organic material such as PMMA (Polymethyl methacrylate) or polycarbonate resin. The plate 9 may be a rigid plate or a flexible film. And the surface of the plate 9 in contact with the composition is flat. Note that the plate 9 preferably has a circular shape with a diameter larger than 300 mm and smaller than 500 mm, but is not limited thereto. Also, the thickness of the plate 9 is preferably 0.25 mm or more and less than 2 mm, but is not limited thereto. When the composition is a thermosetting material instead of a photocurable material, the plate 9 does not need to be transparent, and any material having the above characteristics may be used.

[0019] The composition is a precursor that cures to become at least part of the planarizing film and is a curable composition that can be cured by receiving light or thermal energy. A curable composition that can be cured by receiving light or thermal energy is a photocurable composition that cures when irradiated with light, a thermosetting composition that cures when heated, or a photothermal curable composition that cures by receiving both light and thermal energy. Examples of the photocurable composition include UV curable liquids. As the UV curable liquid, typically monomers such as acrylates and methacrylates can be used. The curable composition may be referred to as a moldable material. Hereinafter, the moldable material is also simply referred to as "material".

[0020] As shown in Figure 1, the planarization device 100 includes a substrate chuck 2, a substrate stage 3, a base platen 4, a support column 5, a top plate 6, a guide bar 7, a support column 8, a plate chuck 11, a head 12, and an alignment shelf 13. The planarization device 100 further includes a pressure adjustment unit 15, a supply unit 17, a substrate transport unit 18, an alignment scope 19, a light source 20, a stage drive unit 21, a plate transport unit 22, a cleaning unit 23, an input unit 24, and a control unit 200. The substrate chuck 2 and substrate stage 3 can hold and move the substrate 1. The plate chuck 11 and head 12 can hold and move the plate 9.

[0021] The substrate 1 is brought in from outside the planarization device 100 by a substrate transport unit 18, which includes a transport hand, and is held by a substrate chuck 2. The substrate stage 3 is supported by a base platen 4 and is driven in the X and Y directions to position the substrate 1 held by the substrate chuck 2 in a predetermined position. The stage drive unit 21 includes, for example, a linear motor or an air cylinder, and drives the substrate stage 3 in at least the X and Y directions, but may also have the function of driving the substrate stage 3 in two or more axes (for example, six axes). The stage drive unit 21 also includes a rotation mechanism and can rotate the substrate chuck 2 or the substrate stage 3 in the θZ direction.

[0022] The pressing member, plate 9, is brought in from outside the flattening device 100 by a plate transport unit 22, including a transport hand, and held by a plate chuck 11. The plate 9 has, for example, a circular or rectangular outer shape and a first surface including a flat surface 10 that contacts the material placed on the substrate 1, and a second surface opposite to the first surface. In this embodiment, the flat surface 10 is the same size as the substrate 1 or larger than the substrate 1. The plate chuck 11 is supported by a head 12 and may have the function of correcting the position of the plate 9 in the θZ direction (tilt around the Z axis). Each of the plate chuck 11 and the head 12 includes an aperture that allows light (ultraviolet light) irradiated from the light source 20 through a collimator lens to pass through. The plate chuck 11 functions as a holding part that mechanically holds the plate 9. For example, the plate chuck 11 holds the plate 9 by pulling the second surface of the plate 9 upwards. The head 12 also mechanically holds the plate chuck 11. The plate chuck 11 and the head 12 constitute a forming unit 50 that performs the process of forming a planarized film. The head 12 includes a drive mechanism (not shown) for positioning the distance between the substrate 1 and the plate 9 when the plate 9 is brought into contact with and separated from the material on the substrate 1, and moves the plate 9 in the Z direction. The drive mechanism of the head 12 may be composed of an actuator such as a linear motor, an air cylinder, or a voice coil motor. A load cell may also be placed in the plate chuck 11 or the head 12 for measuring the pressing force (imprinting force) of the plate 9 against the material on the substrate. The plate deformation mechanism (plate deformation unit) first includes a sealing member 14 that seals the spatial region A formed by the space inside the plate chuck 11 and the internal space surrounded by the plate 9. The plate deformation mechanism also includes a pressure adjustment unit 15 installed outside the plate chuck 11 that adjusts the pressure in the spatial region A. The sealing member 14 is made of a light-transmitting flat plate member such as quartz glass, and is provided with a connection port (not shown) for a pipe 16 connected to the pressure adjustment unit 15. The pressure adjustment unit 15 can increase the amount by which the plate 9 deforms convexly toward the substrate side by increasing the pressure in the spatial region A.Furthermore, the pressure adjustment unit 15 can reduce the amount of convex deformation of the plate 9 by lowering the pressure in spatial region A. Support columns 5 that support the top plate 6 are arranged on the base plate 4. The guide bar 7 is suspended from the top plate 6, passes through the alignment shelf 13, and is fixed to the head 12. The alignment shelf 13 is suspended from the top plate 6 via support columns 8. The guide bar 7 passes through the alignment shelf 13. In addition, the alignment shelf 13 is equipped with a height measuring system (not shown) for measuring the height (flatness) of the substrate 1 held by the substrate chuck 2, for example, using an oblique incidence image misalignment method.

[0023] The alignment scope 19 includes an optical system and imaging system for observing a reference mark provided on the substrate stage 3 and an alignment mark provided on the plate 9. However, if no alignment mark is provided on the plate 9, the alignment scope 19 may not be necessary. The alignment scope 19 is used for alignment, measuring the relative position of the reference mark provided on the substrate stage 3 and the alignment mark provided on the plate 9, and correcting any misalignment.

[0024] The supply unit 17 includes a dispenser with nozzles that dispense uncured material onto the substrate 1, and supplies (coats) the material onto the substrate. The supply unit 17 employs, for example, a piezo jet system or a micro solenoid system, and can supply a minute volume of material of about 1 pL (picoliters) onto the substrate 1 while the substrate stage 3 is scanning. There is no limit to the number of nozzles in the supply unit 17; there may be one (single nozzle) or multiple (for example, 100 or more). Multiple nozzles may form a linear nozzle array of one or more rows. Dispensers of the type known as an inkjet head are particularly suitable because they can apply liquid material to the substrate as minute droplets. A piezo inkjet head, which is equipped with at least one piezoelectric energy generator at each nozzle, is particularly suitable because it can change the volume of the ejected droplets.

[0025] The cleaning unit 23 cleans the plate 9 while it is held in the plate chuck 11. In this embodiment, the cleaning unit 23 removes material adhering to the plate 9, particularly to the flat surface 10, by separating the plate 9 from the hardened material on the substrate. The cleaning unit 23 may, for example, wipe off the material adhering to the plate 9, or it may remove the material adhering to the plate 9 using UV irradiation, electrostatic discharge, wet cleaning, dry plasma cleaning, or the like.

[0026] The control unit 200 is composed of a computer device including a CPU and memory, and controls the entire planarization apparatus 100. The control unit 200 functions as a processing unit that comprehensively controls each part of the planarization apparatus 100 and performs the planarization process. Here, the planarization process is a process in which the flat surface 10 of the plate 9 is brought into contact with the material on the substrate, and the flat surface 10 is made to conform to the surface shape of the substrate 1, thereby flattening the material. Generally, the planarization process is performed on a lot basis, that is, for each of the multiple substrates included in the same lot.

[0027] Next, the planarization process will be explained with reference to Figure 2. First, the material IM is supplied to the substrate 1 on which the base pattern 1a is formed by the supply unit 17. Figure 2(a) shows the state after the material IM has been placed on the substrate 1 but before the plate 9 is brought into contact with it. Next, as shown in Figure 2(b), the material IM on the substrate 1 is brought into contact with the flat surface 10 of the plate 9. The plate 9 presses against the material IM, causing the material IM to spread across the entire surface of the substrate 1. Figure 2(b) shows the state where the entire flat surface 10 of the plate 9 is in contact with the material IM on the substrate 1, and the flat surface 10 of the plate 9 conforms to the surface shape of the substrate 1. Then, in the state shown in Figure 2(b), light is irradiated from the light source 20 through the plate 9 onto the material IM on the substrate 1, thereby hardening the material IM. After that, the plate 9 is separated from the hardened material IM on the substrate 1. This forms a layer of material IM of uniform thickness (planarization layer) across the entire surface of the substrate 1. Figure 2(c) shows the state in which a planarization layer made of material IM has been formed on the substrate 1. Hereafter, the contact (adhesion) or separation between the flat surface 10 of the plate 9 and the material IM on the substrate 1 will be simply referred to as "contact (adhesion) or separation" between the plate 9 and the material IM on the substrate 1. Also below, the material IM in the state supplied to the substrate 1 will be referred to as a precursor, and the material IM after curing will be referred to as a film.

[0028] Next, a method for manufacturing articles (semiconductor devices, liquid crystal display devices, color filters, MEMS, etc.) using this planarization apparatus 100 will be described. This manufacturing method includes the steps of: planarizing a composition by bringing it into contact with a mold on a substrate (wafer, glass substrate, etc.) using the aforementioned planarization apparatus; curing the composition; and separating the composition from the mold. This forms a planarized film on the substrate. Then, the substrate on which the planarized film has been formed is subjected to processing such as patterning using a lithography apparatus, and the processed substrate is processed in other well-known processing steps to manufacture an article. Other well-known processes include etching, resist stripping, dicing, bonding, packaging, etc. According to this manufacturing method, articles of higher quality than conventional methods can be manufactured.

[0029] The following describes a method for manufacturing a semiconductor device, using a semiconductor device as a specific example. Let the semiconductor device be, for example, a photoelectric conversion sensor. The semiconductor device manufacturing method in this embodiment applies the planarization method described in Figures 1 and 2 to a configuration having multiple chips arranged on a substrate.

[0030] Figure 3 is a schematic plan view illustrating the manufacturing method of the semiconductor device according to this embodiment. Figure 3(a) shows the process of preparing a substrate 101 (first substrate) having components 102. Figure 3(a) is also a diagram showing the planar layout of the substrate 101. The substrate 101 is circular in shape, and a plurality of components 102 are arranged on it. The substrate 101 may include a semiconductor wafer and a wiring structure formed thereon. The substrate 101 is a semiconductor substrate that includes, for example, a silicon single crystal substrate as the semiconductor wafer. Component 102 may include a portion formed on the semiconductor wafer and a portion formed on the wiring structure, for example, a semiconductor element. The substrate 101 and component 102 are formed by a general semiconductor device manufacturing method.

[0031] Figure 3(b) shows the process of preparing a component in which the chip 103 is placed on top of the configuration shown in Figure 3(a). In the following steps, the substrate 101 and the chip 103 may be collectively referred to as the component. Figure 3(b) is also a diagram showing the planar layout of the substrate 101 on which the chip 103 is placed. This process can be carried out, for example, by joining the substrate 101 and the chip 103 together using conductive patterns. In this embodiment, an example is shown in which two chips 103 are provided for one component 102. The chip 103 may have circuits for operating the component 102 or circuits for processing signals output from the component 102. Furthermore, the number of chips provided for one component 102 is not limited to two. In addition, multiple chips 103 with the same function may be provided for the component 102, or multiple chips 103 with different functions may be provided. Note that the chip 103 is, for example, a semiconductor chip.

[0032] Next, the chip 103 placed on the substrate 101 is embedded. Figures 4(a), 4(b), and 4(c) are schematic cross-sectional views along line A and B in Figure 3(b). The process of embedding the chip 103 is described below. The substrate 101 has a first surface P1 and a second surface P2 opposite to the first surface P1. In this specification, the first surface P1 may be referred to as the upper surface of the substrate 101, and the second surface P2 may be referred to as the lower surface of the substrate 101.

[0033] Component 102 may include, for example, a photoelectric converter that converts light into electric charge. Typically, component 102 has multiple photoelectric converters arranged in an array of multiple rows and columns. The photoelectric converter generates an electric charge corresponding to the light incident from the second surface P2, and a transfer transistor (not shown) transfers the charge from the photoelectric converter to a floating diffusion region (not shown). An output circuit having an amplification transistor (not shown) outputs a signal based on the amount of charge transferred to the floating diffusion region to a column circuit (not shown). This column circuit is provided, for example, on chip 103 and performs various processes such as AD conversion processing to convert the input signal into a digital signal and processing to reduce noise components. Then, the digital signals are sequentially read out from the multiple column circuits. As a result, a semiconductor device including a photoelectric converter can generate a signal based on the charge incident on the photoelectric converter.

[0034] Figure 4(a) shows the process of applying a liquid precursor 104 (material IM mentioned earlier) onto a substrate 101 on which the chip 103 is placed. The amount of precursor 104 applied is predetermined so that there is less on the top of the chip 103 and more on the top of the other parts. The liquid precursor 104 may be a precursor of an energy-curable resin or a precursor of SOC (Spin On Carbon). The energy-curable resin may be, for example, a composition that hardens when exposed to light.

[0035] Uncured material is applied to the top of a pre-formed chip 103 using an inkjet head equipped with a piezoelectric element as an ejection actuator. Specifically, droplets are injected N times per unit area (N is a natural number) onto the top of the chip 103, and N+1 or more times per unit area onto the flat surfaces of the substrate 101 (between multiple chips 103). The number of droplets injected can be determined according to the arrangement pattern of the chips 103. Specifically, droplets are injected while changing the relative position between the ejection port and the substrate 101, according to a drawing map that determines the number (or amount) of droplets to be injected onto the substrate 101 and the injection position within the first surface P1, based on the arrangement pattern data of the chips 103. In addition to changing the number of droplets of the liquid precursor 104, the amount injected can also be controlled by changing the size of the droplets, and both can be adjusted.

[0036] In Figure 4(b), the flat surface of plate 9 is pressed onto the precursor 104 to cure the liquid. This process improves the flatness on the chip 103. Alternatively, the precursor 104 may be cured by irradiating it with light through plate 9. For curing, an exposure apparatus can be used, for example. It may be an ArF immersion exposure apparatus, an ArF dry exposure apparatus, or a KrF exposure apparatus. The amount of exposure may be adjusted according to the arrangement pattern of the chip 103.

[0037] Subsequently, as shown in Figure 4(c), the plate 9 is separated from the cured precursor 104. This planarization process forms a first film 105 having a highly flat upper surface. At this point, a portion of the first film 105 located on the upper part of the chip 103 may be removed.

[0038] Next, in Figure 5(a), the substrate 101 having the first film 105 and the support substrate 107 (second substrate) are integrated. Specifically, an adhesive layer 106 is applied to the first film 105 and the support substrate 107 is bonded to it. Alternatively, the materials for the parts forming the bonding surface of the first film 105 and the parts forming the bonding surface of the support substrate 107 may be appropriately selected to bond the materials together at the bonding surface (for example, by covalent bonding).

[0039] In Figure 5(b), substrate 101 is thinned to form substrate 108 (the third substrate). Thinning can be performed by methods such as etching, mechanical polishing, or chemical mechanical polishing. If substrate 101 is an SOI substrate, thinning can be performed using a water jet. This process reduces the thickness of the semiconductor layer on substrate 101, resulting in at least one effect such as miniaturization or improved heat dissipation.

[0040] Subsequently, as shown in Figure 5(c), the entire component is divided into the desired number of individual pieces, and the semiconductor device is completed.

[0041] As described above, the method for manufacturing a semiconductor device according to this embodiment makes it possible to provide an advantageous technique for manufacturing a semiconductor device in which multiple chips are arranged on a substrate. In this embodiment, the flatness of the upper parts of the multiple chips 103 and the upper parts of the portions between the multiple chips 103 is improved. Furthermore, the flatness of the bonding surface of the first film 105 with the support substrate 107 is improved, thereby improving the bonding strength between the support substrate 107 and the first film 105.

[0042] In this embodiment, when applying the material IM, the inkjet head is controlled so that fewer droplets are ejected from the upper part of the chip 103 than from the upper part of the area other than the area where the chip 103 is provided. However, the embodiment is not limited to this. For example, when applying the material IM, droplets are applied uniformly to the upper part of the chip 103 and the upper part of the area other than the area where the chip 103 is provided. Then, a flat plate 9 is brought into contact with the material IM. This method also makes it possible to reduce the amount of material IM located on the upper part of the chip 103 compared to the amount of material IM located on the upper part of the area other than the area where the chip 103 is provided. Such a method is also included in the step of applying a precursor so that the amount applied to the upper part of the chip 103 is less than that applied to other parts.

[0043] In addition, in Figure 4(b), the support substrate 107 shown in Figure 5(a) may be used instead of plate 9. In that case, the liquid precursor 104 (material IM) is preferably a composition that hardens upon heating. Then, as shown in Figure 5(b), the substrate 101 is thinned to form substrate 108 (third substrate). Then, as shown in Figure 5(c), the entire component is divided into the desired number of pieces to complete the semiconductor device. In this manufacturing method, it is possible to reduce the steps of separating plate 9 from the hardened precursor 104 (the step shown in Figure 4(c)) and applying the adhesive layer 106 (a part of the step shown in Figure 5(a)).

[0044] <Second Embodiment> The method for manufacturing the semiconductor device of this embodiment will now be described. Figure 6 is a schematic diagram illustrating the method for manufacturing the semiconductor device of the second embodiment. This embodiment differs from the first embodiment in that, in addition to the chip 103, a chip of a different size from the chip 103 is also placed on the component 102. Hereinafter, the same configuration and process as in the first embodiment will not be described in detail.

[0045] Figure 6 is a schematic plan view illustrating the manufacturing method of the semiconductor device according to this embodiment. Figure 6(a) shows the process of preparing a substrate 101 (first substrate) having component 102. Figure 6(a) is also a diagram showing the planar layout of the substrate 101.

[0046] Figure 6(b) shows the process of preparing a component in which chips 103 and 201 are further arranged on the configuration of Figure 6(a). In the following steps, the substrate 101, chips 103 and 201 may be collectively referred to as the component. Figure 6(b) is also a diagram showing the planar layout of the substrate 101 on which chips 103 and 201 are arranged. This embodiment describes an example in which two chips 103 and one chip 201 of a different size from chip 103 are provided for one component 102. Chip 201 may have circuits for operating component 102 and circuits for processing signals output from component 102. Note that chip 201 is, for example, a semiconductor chip.

[0047] Figure 7 is a schematic cross-sectional view along line AB in Figure 6(b). Here, the process of embedding chips 103 and 201 is described. The height H1 of chip 103 is greater than the height H2 of chip 201. The width W1 of chip 103 is smaller than the width W2 of chip 201. The distance W3 between one chip 103 and chip 201 is approximately equal to the distance W4 between the other chip 103 and chip 201. For example, heights H1 and H2 are preferably about 1 to 30 μm. For example, widths W1 and W2 are preferably about 1 to 10 mm.

[0048] Figure 7(a) shows the process of applying liquid precursor 104 (material IM, as described above) onto a substrate 101 on which chips 103 and 201 are arranged. The amount of precursor 104 to be applied is predetermined so that a first amount is applied to the top of chip 103, a second amount to the top of chip 201, and a third amount to the top of the remaining parts. The remaining parts refer to, for example, the area between chip 103 and chip 201. Here, the first amount is less than the second amount, and the second amount is less than the third amount.

[0049] The liquid precursor 104 may be a precursor of an energy-curable resin or a precursor of SOC (Spin On Carbon). The energy-curable resin may, for example, be a composition that hardens upon exposure to light.

[0050] Uncured material is applied to the pre-formed chips 103 and 201 using an inkjet head equipped with a piezoelectric element as an ejection actuator. Specifically, droplets are injected N times per unit area (N is a natural number) onto the top of chip 103, and M times per unit area (M is a natural number greater than N) onto the top of chip 201. Furthermore, L or more times per unit area (L is a natural number greater than M) are injected onto the remaining flat surfaces of the substrate 101 (between chips 103 and 201). The number of droplets injected can be determined according to the arrangement pattern of chips 103 and 201. Specifically, droplets are injected while changing the relative position between the ejection port and the substrate 101 according to a drawing map that determines the number (or amount) of droplets to be injected onto the substrate 101 and their injection positions within the first surface P1, based on the arrangement pattern data of chips 103 and 201. Furthermore, the amount of liquid precursor 104 can be controlled not only by changing the number of droplets, but also by changing the size of the droplets, and both can be adjusted.

[0051] In Figure 7(b), the flat surface of plate 9 is pressed onto the precursor 104 to cure the liquid. This process improves the flatness of the top surfaces of chips 103 and 201. Alternatively, the precursor 104 may be cured by irradiating it with light through plate 9. For curing, an exposure apparatus can be used, such as an ArF immersion exposure apparatus, an ArF dry exposure apparatus, or a KrF exposure apparatus. The amount of exposure may be adjusted depending on the arrangement pattern of chips 103 and 201.

[0052] Subsequently, as shown in Figure 7(c), the plate 9 is separated from the cured precursor 104. This planarization process forms a first film 105 having a highly flat upper surface. Here, a portion of the first film 105 located on the top of the chips 103 and 201 may be removed.

[0053] Next, in Figure 8(a), the substrate 101 having the first film 105 and the support substrate 107 (second substrate) are integrated. Specifically, an adhesive layer 106 is applied to the first film 105 and the support substrate 107 is bonded to it. Alternatively, the materials for the parts forming the bonding surface of the first film 105 and the parts forming the bonding surface of the support substrate 107 may be appropriately selected to bond the materials together at the bonding surface (for example, by covalent bonding).

[0054] Then, in Figure 8(b), substrate 101 is thinned to form substrate 108 (the third substrate). Thinning can be performed by methods such as etching, mechanical polishing, or chemical mechanical polishing. In addition, if substrate 101 is an SOI substrate, thinning can be performed using a water jet. This process makes it possible to reduce the thickness of the semiconductor layer on substrate 101, and at least one effect can be obtained, such as miniaturization or improved heat dissipation.

[0055] Subsequently, the entire component is divided into the desired number of individual pieces, and the semiconductor device is completed.

[0056] As described above, the method for manufacturing a semiconductor device according to this embodiment makes it possible to provide an advantageous technique for manufacturing a semiconductor device in which multiple chips are arranged on a substrate. In this embodiment, the flatness of the upper parts of the multiple chips 103, the upper parts of the chips 201, and the upper parts of the portions between chips 103 and chips 201 is increased. That is, even when multiple chips having different heights and widths are provided on the component 102, a first film 105 with high flatness can be formed by adjusting the amount of precursor. Furthermore, the flatness of the bonding surface of the first film 105 with the support substrate 107 is improved, thereby improving the bonding strength between the support substrate 107 and the first film 105.

[0057] The number of chips, chip widths, chip heights, and distances between multiple chips provided on a single component 102 are not limited to those shown in Figure 6. The amount of precursor 104 to be coated can be determined based on the number of chips, chip widths, chip heights, and distances between multiple chips. For example, distances W3 and W4 may be different, and even in that case, a first film 105 with high flatness can be formed.

[0058] In this embodiment, when applying the material IM, the inkjet head is controlled so that different amounts of droplets are ejected depending on the chip 103, chip 201, and the rest of the surface. However, the embodiment is not limited to this. For example, when applying the material IM, droplets are applied uniformly to the top of chip 103, the top of chip 201, and the top of the parts other than the parts where the chips are provided. Then, a flat plate 9 is brought into contact with the material IM. This method also allows for the application of a first amount of material IM to the top of chip 103, a second amount to the top of chip 201, and a third amount to the parts other than chip 103 and chip 201. Such a method also includes a step of applying a precursor so that the amount applied to the top of chip 103 is less than that applied to the rest of the surface.

[0059] Note that in Figure 7(b), the support substrate 107 shown in Figure 8(a) may be used instead of plate 9. In that case, the liquid precursor 104 (material IM) is preferably a composition that hardens upon heating. Then, as shown in Figure 8(b), the substrate 101 is thinned to form substrate 108 (third substrate). The entire component is then divided into the desired number of pieces to complete the semiconductor device. This manufacturing method makes it possible to reduce the steps of separating plate 9 from the hardened precursor 104 (the step shown in Figure 7(c)) and applying the adhesive layer 106 (a part of the step shown in Figure 8(a)).

[0060] <Third Embodiment> This embodiment describes application examples using semiconductor devices manufactured by the manufacturing methods of the first and second embodiments. The semiconductor device 910 is, for example, a photoelectric conversion sensor.

[0061] Figure 9(a) is a schematic diagram illustrating an application example, device 9191. Device 9191 has a semiconductor device 930. The semiconductor device 930 includes a semiconductor device 910 and a package 920 that houses the semiconductor device 910. The semiconductor device 910 may be manufactured by a manufacturing method of another embodiment. The package 920 may include a substrate on which the semiconductor device 910 is fixed and a lid, such as glass, facing the semiconductor device 910. The package 920 may further include bonding members such as bonding wires or bumps that connect terminals provided on the substrate and terminals provided on the semiconductor device 910.

[0062] The device 9191 may include at least one of the following: an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 is, for example, a lens, shutter, or mirror, and includes an optical system that directs light to the semiconductor device 930. The control device 950 controls the semiconductor device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0063] The processing unit 960 processes the signals output from the semiconductor device 930. The processing unit 960 is a semiconductor device such as a CPU or ASIC that constitutes an AFE (analog front end) or DFE (digital front end). The display device 970 is an EL display device or liquid crystal display device that displays the information (image) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or semiconductor device that stores the information (image) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as SRAM or DRAM, or a non-volatile memory such as flash memory or a hard disk drive.

[0064] The mechanical device 990 has movable parts or propulsion parts such as motors and engines. The device 9191 displays signals output from the semiconductor device 930 on the display device 970 or transmits them to the outside using a communication device (not shown) provided in the device 9191. For this purpose, it is preferable that the device 9191 further includes a storage device 980 and a processing device 960, separate from the memory circuits and arithmetic circuits of the semiconductor device 930. The mechanical device 990 may be controlled based on signals output from the semiconductor device 930.

[0065] Furthermore, the device 9191 is suitable for electronic devices such as information terminals with shooting capabilities (e.g., smartphones and wearable devices) and cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). In a camera, the mechanical device 990 can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in a camera can move the semiconductor device 930 for vibration damping.

[0066] Furthermore, the device 9191 may be a transport device such as a vehicle, ship, or aircraft. The mechanical device 990 in the transport device may be used as a mobile device. The device 9191 as a transport device is suitable for transporting the semiconductor device 930 or for assisting and / or automating driving (operation) through its imaging function. The processing device 960 for assisting and / or automating driving (operation) can perform processing to operate the mechanical device 990 as a mobile device based on information obtained from the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring instrument such as a distance sensor, an analytical instrument such as an electron microscope, an office machine such as a copier, or an industrial machine such as a robot.

[0067] According to the embodiments described above, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. Increasing value here means at least one of the following: addition of functions, improvement of performance, improvement of characteristics, improvement of reliability, improvement of manufacturing yield, reduction of environmental impact, cost reduction, miniaturization, and weight reduction.

[0068] Therefore, by using the semiconductor device 930 according to this embodiment in the device 9191, the value of the device can also be improved. For example, by mounting the semiconductor device 930 on a transport device, excellent performance can be obtained when taking external images of the transport device or measuring the external environment. Therefore, when manufacturing and selling transport devices, deciding to mount the semiconductor device according to this embodiment on the transport device is advantageous in improving the performance of the transport device itself. In particular, the semiconductor device 930 is suitable for transport devices that use information obtained from the semiconductor device to assist in driving and / or perform automated driving.

[0069] Next, as another application example, we will describe a moving object. Figure 9(b) shows an example of a photoelectric conversion system for an in-vehicle camera. The photoelectric conversion system 80 has a semiconductor device 800. The semiconductor device 800 is, for example, a photoelectric conversion device (imaging device). The photoelectric conversion system 80 has an image processing unit 801 that performs image processing on a plurality of image data acquired by the semiconductor device 800, and a parallax acquisition unit 802 that calculates parallax (phase difference of parallax image) from the plurality of image data acquired by the photoelectric conversion system 80. Here, the photoelectric conversion system 80 may include an optical system (not shown) that guides light to the semiconductor device 800, such as a lens, shutter, or mirror. Also, a plurality of photoelectric conversion units that are substantially conjugate to the pupil of the optical system may be arranged in pixels of the semiconductor device 800. For example, a plurality of photoelectric conversion units substantially conjugate to the pupil may be arranged corresponding to one microlens. Multiple photoelectric conversion units receive light beams that have passed through different positions in the pupil of the optical system, and the semiconductor device 800 outputs image data corresponding to the light beams that have passed through different positions. The parallax acquisition unit 802 may then calculate the parallax using the output image data. The photoelectric conversion system 80 also includes a distance acquisition unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means that acquire distance information to an object. That is, distance information is information related to parallax, defocus amount, distance to an object, etc. The collision determination unit 804 may use any of this distance information to determine the possibility of collision. Note that the distance information may be acquired by ToF (Time of Flight). The distance information acquisition means may be implemented by specially designed hardware or by a software module. Furthermore, it may be implemented using FPGAs (Field Programmable Gate Arrays) or ASICs (Application Specific Integrated Circuits), or a combination thereof.

[0070] The photoelectric conversion system 80 is connected to the vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 80 is also connected to the control ECU 820, which is a control device that outputs a control signal to generate braking force on the vehicle based on the judgment result of the collision judgment unit 804. The photoelectric conversion system 80 is also connected to the warning device 830, which issues a warning to the driver based on the judgment result of the collision judgment unit 804. For example, if the collision judgment result of the collision judgment unit 804 indicates a high probability of collision, the control ECU 820 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 830 warns the user by sounding an alarm, displaying warning information on a screen such as a car navigation system, or vibrating the seat belt or steering wheel.

[0071] In this embodiment, the photoelectric conversion system 80 images the area around the vehicle, for example, in front of or behind it. Figure 9(c) shows the photoelectric conversion system 80 when imaging the area in front of the vehicle (imaging range 850). The vehicle information acquisition device 810 sends instructions to the photoelectric conversion system 80 or the semiconductor device 800. This configuration can further improve the accuracy of distance measurement.

[0072] The above example describes control to prevent collisions with other vehicles, but it can also be applied to control systems that automatically follow other vehicles or control systems that automatically stay within their lanes. Furthermore, the photoelectric conversion system 80 can be applied not only to vehicles such as automobiles, but also to mobile bodies (mobile devices) such as ships, aircraft, or industrial robots. This mobile body mainly includes a drive force generation unit that generates the driving force used for the movement of the mobile body, and one or both of a rotating body mainly used for the movement of the mobile body. The drive force generation unit may be an engine, motor, etc. The rotating body may be a tire, wheel, ship's screw, propeller, etc. In addition, it can be applied not only to mobile bodies, but also to a wide range of devices that utilize object recognition, such as intelligent transportation systems (ITS).

[0073] The equipment of this embodiment may be transportation equipment such as vehicles, ships, or aircraft. Mechanical devices in transportation equipment can be used as mobile devices. Equipment as transportation equipment is suitable for transporting semiconductor devices or for assisting and / or automating driving (piloting) through imaging functions. The processing device for assisting and / or automating driving (piloting) can perform processing to operate the mechanical device as a mobile device based on information obtained from the semiconductor device.

[0074] In this embodiment, a photoelectric conversion device was used as an example of a semiconductor device, but other semiconductor devices may be used, or both may be used.

[0075] Furthermore, the disclosure of this embodiment includes the following configuration.

[0076] (Method 1) A method for manufacturing a semiconductor device comprising a first substrate on which a plurality of components are arranged, and a plurality of chips arranged on the first substrate corresponding to each of the plurality of components, the method comprising: a step of preparing a member having the first substrate and the plurality of chips arranged on the first substrate; a step of applying a precursor to the member such that the amount applied to the upper part of the chips is less than that applied to other parts, thereby forming a first film having a flat upper surface; and a step of separating the member into individual pieces.

[0077] (Method 2) A method for manufacturing a semiconductor device according to Method 1, characterized in that, in the step of forming the first film, the upper surface of the precursor is flattened and cured to have a flat upper surface.

[0078] (Method 3) A method for manufacturing a semiconductor device according to method 1 or 2, characterized in that, in the step of forming the first film, a superstraight is brought into contact with the precursor.

[0079] (Method 4) A method for manufacturing a semiconductor device according to any one of methods 1 to 3, characterized in that, in the step of forming the first film, the precursor is cured while the superstraight is in contact with the precursor.

[0080] (Method 5) A method for manufacturing a semiconductor device according to any one of methods 1 to 4, characterized in that, in the step of forming the first film, the second substrate is brought into contact with the precursor and the precursor is cured, and the second substrate is bonded to the first film.

[0081] (Method 6) A method for manufacturing a semiconductor device according to any one of methods 1 to 5, characterized in that, after the step of forming the first film, a step of bonding a second substrate to the first film.

[0082] (Method 7) A method for manufacturing a semiconductor device according to any one of methods 1 to 6, characterized by comprising the steps of bonding a second substrate to the first film and thinning the first substrate, before the step of separating the member into individual pieces.

[0083] (Method 8) A method for manufacturing a semiconductor device according to any one of methods 1 to 7, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the chip is less than the amount applied to the upper part of the portion between the plurality of chips.

[0084] (Method 9) A method for manufacturing a semiconductor device according to any one of methods 1 to 8, characterized in that, in the step of forming the first film, the amount of the precursor applied to the upper part of the chip is less than the amount applied to the upper part of a plurality of chips that are different from the chip.

[0085] (Method 10) A method for manufacturing a semiconductor device according to any one of methods 1 to 9, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the plurality of chips is less than that applied to the other parts.

[0086] (Method 11) A method for manufacturing a semiconductor device according to any one of methods 1 to 10, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the plurality of chips is less than the amount applied to the upper part of the portion between the plurality of chips.

[0087] (Method 12) A method for manufacturing a semiconductor device according to any one of methods 1 to 11, characterized in that the plurality of components include photoelectric conversion elements, and the chip is provided with a circuit for processing signals output from the photoelectric conversion elements. [Explanation of Symbols]

[0088] 101 circuit board 103 chips 105 First membrane

Claims

1. A method for manufacturing a semiconductor device comprising a first substrate on which a plurality of components are arranged, and a plurality of chips arranged on the first substrate corresponding to each of the plurality of components, A step of preparing the first substrate and the member having the plurality of chips arranged on the first substrate, The process involves applying a precursor onto the member such that the amount applied to the upper part of the chip is less than that applied to other parts, thereby forming a first film having a flat upper surface. A method for manufacturing a semiconductor device, characterized by comprising the step of separating the aforementioned member into individual pieces.

2. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the upper surface of the precursor is flattened and cured to have a flat upper surface.

3. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, a superstraight is brought into contact with the precursor.

4. The method for manufacturing a semiconductor device according to claim 3, characterized in that, in the step of forming the first film, the precursor is cured while the superstraight is in contact with the precursor.

5. A method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the second substrate is brought into contact with the precursor and the precursor is cured, and the second substrate is bonded to the first film.

6. A method for manufacturing a semiconductor device according to claim 1, characterized in that, after the step of forming the first film, a step of bonding a second substrate to the first film.

7. A method for manufacturing a semiconductor device according to claim 1, characterized in that, before the step of separating the member into individual pieces, the method includes a step of bonding a second substrate to the first film and a step of thinning the first substrate.

8. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the chip is less than the amount applied to the upper part of the portion between the plurality of chips.

9. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the chip is less than the amount applied to the upper part of a plurality of chips that are different from the chip.

10. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the plurality of chips is less than that applied to the other parts.

11. The method for manufacturing a semiconductor device according to claim 9, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the plurality of chips is less than the amount applied to the upper part of the portion between the plurality of chips.

12. The aforementioned plurality of components include a photoelectric conversion element, The method for manufacturing a semiconductor device according to claim 1, characterized in that the chip is provided with a circuit for processing the signal output from the photoelectric conversion element.

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