Liquid crystal display device

Abstract

A semiconductor device that can prevent yield reduction due to electrostatic discharge. [Solution] A scan line driving circuit that supplies signals to the scan line for selecting multiple pixels is provided above It has a shift register that generates the signal, and in the above shift register, multiple A single conductive film that functions as the gate electrode of a transistor is divided into multiple parts, and the divided conductive film The films are electrically connected by the divided conductive films and conductive films formed in different layers. The configuration is as follows: The transistors on the output side of the shift register are among the multiple transistors mentioned above. It shall be included.

Description

[Technical Field]

[0001] This invention relates to a semiconductor device using an insulated-gate field-effect transistor. [Background technology]

[0002] In recent years, high mobility has been obtained from polycrystalline silicon and microcrystalline silicon, and amorphous silicon As a new semiconductor material that combines uniform device characteristics obtained by, oxide semiconductors Metal oxides exhibiting semiconductor properties, known as [name of metal oxide], are attracting attention. Metal oxides are used in a variety of applications. It is used in various applications; for example, indium oxide, a well-known metal oxide, is used in liquid crystal displays. It is used as a transparent electrode material in display devices, etc. As a metal oxide exhibiting semiconductor properties... For example, there are tungsten oxide, tin oxide, indium oxide, zinc oxide, and so on. Transistors that use metal oxides exhibiting semiconductor properties in the channel formation region are already known. (Patent Documents 1 and 2) [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Overview of the project] [Problems that the invention aims to solve]

[0004] By the way, semiconductor displays composed of transistors having amorphous silicon or oxide semiconductors The device is compatible with fifth-generation (1200mm wide x 1300mm high) or larger glass substrates. Therefore, it has the advantages of high productivity and low cost. As the panel size increases, the semiconductor surface In the pixel section of a display device, a wiring called a bus line is connected to multiple pixels, for example, a running line. The load on scan lines and signal lines increases. Therefore, a drive is needed to supply potential to scan lines and signal lines. The circuit requires a large current supply capacity, so the transistors that make up the drive circuit, especially The transistors located on the output side, depending on their electrical characteristics, may also increase in size as the panel gets larger. The number of cases is increasing.

[0005] As the size of the above transistor increases, the gate electrode of the transistor in the drive circuit and The area of ​​the wiring that functions increases due to layout constraints. Therefore, dry etching In manufacturing processes using plasma, such as those involving galvanic technology, electric charge accumulates in the wiring, a phenomenon known as the antenna effect. This phenomenon is prone to occurring, and the discharge of the above-mentioned charge accumulated in the wiring causes electrostatic discharge. The probability of this happening increases.

[0006] In particular, transistors made of amorphous silicon or oxide semiconductors are made of polycrystalline silicon or single crystal silicon. Amorphous silicon tends to have a lower on-current compared to transistors using silicon. Using transistors with oxide semiconductors, it is possible to enlarge the panel size through the process. However, to meet the current supply capacity of the drive circuit, a larger transistor size must be designed. This necessitates... Therefore, the probability of electrostatic discharge damage to the wiring increases due to the increased wiring area, and This is likely to lead to a decrease in yield.

[0007] Given the technical background described above, the present invention aims to prevent yield reduction due to electrostatic discharge. One of our challenges is to provide semiconductor devices that can do this.

Means for Solving the Problem

[0008] In one aspect of the present invention, in order to prevent the accumulation of charges on the conductive film due to the antenna effect, a single conductive film that functions as the gate electrodes of a plurality of transistors is divided into a plurality of parts. The divided conductive films are separated from each other. Then, the divided conductive films are electrically connected to each other by a conductive film different from the divided conductive films. The plurality of transistors shall include the transistors on the output side of the drive circuit.

[0009] Alternatively, in one aspect of the present invention, a scan line drive circuit that supplies a signal for selecting a plurality of pixels to a scan line has a shift register that generates the signal, and in the shift register, a single conductive film that functions as the gate electrodes of a plurality of transistors is divided into a plurality of parts. The divided conductive films are separated from each other. Then, the divided conductive films are electrically connected to each other by a conductive film different from the divided conductive films. The plurality of transistors shall include the transistors on the output side of the shift register.

[0010] The conductive film different from the divided conductive films may be provided in a layer different from the divided conductive films. And the conductive film formed in the different layer may be formed in the same layer as the source electrodes and drain electrodes of the plurality of transistors.

[0011] In one aspect of the present invention, the plurality of transistors may have amorphous silicon or an oxide semiconductor as an active layer.

[0012] In one aspect of the present invention, a plurality of conductive films that function as gate electrodes are formed in different layers. By electrically connecting with the conductive film, one conductive film can function as multiple gate electrodes. This allows for a smaller surface area for each conductive film that functions as a gate electrode compared to the case where... Therefore, the size of the transistors located on the output side of the drive circuit increases as the panel size increases. Even so, the area of ​​the conductive film that functions as the gate electrode of the above transistor is kept small. This allows for processes such as forming gate electrodes by etching, which utilize plasma. In the manufacturing process, the above conductive film can be prevented from being electrostatically damaged by the antenna effect. Cut.

[0013] Specifically, a semiconductor device according to one aspect of the present invention comprises a drive circuit that supplies signals to a plurality of pixels. The above drive circuit has multiple transistors, and among the above multiple transistors, At least one transistor on the output side of the unit, and at least one other transistor on the output side than the above-mentioned transistor Another type of transistor is one in which the gate electrodes of two transistors are separated by a conductive film that is different from the gate electrode. They are connected by energy. [Effects of the Invention]

[0014] In a semiconductor device according to one aspect of the present invention, the above configuration reduces yield due to electrostatic discharge. This can prevent it. [Brief explanation of the drawing]

[0015] [Figure 1] A diagram showing the configuration of the semiconductor device of the present invention. [Figure 2] Top view and cross-sectional view of a transistor. [Figure 3] Top view and cross-sectional view of a transistor. [Figure 4] A circuit diagram showing the configuration of the semiconductor device of the present invention. [Figure 5]A diagram showing the configuration of a shift register. [Figure 6] A timing chart showing the operation of a pulse output circuit. [Figure 7] A schematic diagram showing the jth pulse generation circuit. [Figure 8] A diagram showing the configuration of a pulse generation circuit. [Figure 9] A diagram showing the configuration of a pulse generation circuit. [Figure 10] A diagram showing the configuration of a pulse generation circuit. [Figure 11] Cross-sectional view of the drive circuit and pixels. [Figure 12] A diagram showing the panel configuration. [Figure 13] A diagram of an electronic device. [Modes for carrying out the invention]

[0016] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is... Not limited to the following description, the present invention may have forms and characteristics that do not depart from the spirit and scope of the invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention This shall not be interpreted as being limited to the contents of the embodiments described below.

[0017] Furthermore, the present invention relates to integrated circuits, RF tags, semiconductor display devices, and other devices that utilize transistors. This category includes all kinds of semiconductor devices. Note that integrated circuits include microprocessors, image processors, etc. Circuitry, DSP (Digital Signal Processor), Microcontroller LSI (Large Scale Integrated Circuit) including Trolla t), FPGA (Field Programmable Gate Array) and C Programmable logic circuits such as PLDs (Complex PLDs) (PLD: Progr Amplifiable Logic Devices (AMMABLE Logic Devices) fall into this category. Also, semiconductor tables... The display device uses light-emitting elements, such as liquid crystal displays and organic light-emitting elements (OLEDs), in each pixel. Equipped with a light-emitting device, electronic paper, and DMD (Digital Micromirror Display). device), PDP (Plasma Display Panel), FED (Fie Circuit elements using semiconductor films, such as ld Emission Display, are used as driving circuits. The semiconductor display devices that it possesses are included in that category.

[0018] In this specification, a semiconductor display device refers to a device in which display elements such as liquid crystal elements and light-emitting elements each screen. A panel formed in its raw state, and a model in which an IC including a controller is mounted on the panel. This includes Joules.

[0019] (Embodiment 1) Figure 1 shows an example of the circuit configuration of a semiconductor device according to one aspect of the present invention. The device 100 includes at least transistor 101 and a plurality of transistors including transistor 102. It has a lunger.

[0020] The semiconductor device 100 receives a high-level potential VH via wiring 105 and wiring 106, or A low-level potential VL is applied. In Figure 1, potential VH is applied through wiring 105. A potential VL is applied to the semiconductor device 100 via the wiring 106. This illustrates a case where the device is connected. Furthermore, the semiconductor device 100 receives input signals via wiring 103. A potential Vin is given. In semiconductor device 100, transistor 101 and transistor Multiple transistors, including transistor 102, switch according to the potential Vin. Then, either potential VH or potential VL is selected by the above switching, and the selected The resulting potential is output as the potential Vout of the output signal, and is output from the semiconductor device 100 via the wiring 104. To be empowered.

[0021] Transistor 102 has either its source terminal or drain terminal connected to wiring 104. It is configured such that transistor 102 is located on the output side of semiconductor device 100. It has a function to control the output of the potential Vout to line 104. And, in one aspect of the present invention, , the gate electrode of transistor 101 (indicated by G) and the gate electrode of transistor 102 ( The gate electrode (indicated by G) is electrically connected by a different wiring 107 than the gate electrode described above. .

[0022] In this specification, unless otherwise specified, "connection" refers to electrical connections and direct connections. It means both, and corresponds to a state in which current, voltage, or potential is available or available for transmission. Therefore, the state of being connected does not necessarily refer to a state of being directly connected. Wiring, conductive film, resistors, etc., so that current, voltage, or potential can be supplied or transmitted. This also includes situations where devices are indirectly connected via elements such as diodes and transistors. It is included in.

[0023] Furthermore, the source terminal of a transistor is the source region, which is part of the active layer, or the active layer. It refers to the connected source electrode. Similarly, the drain terminal of a transistor refers to the active layer This refers to a drain region, or a drain electrode connected to the active layer.

[0024] The source and drain terminals of a transistor are related to the polarity of the transistor and the relationship between each electrode. The name changes depending on the level of potential obtained. Generally, n-channel transistors In a zista, the electrode to which a low potential is applied is called the source terminal, and the electrode to which a high potential is applied is called the source terminal. The terminal is called the drain terminal. Also, in p-channel transistors, a low potential is applied. The electrode that is subjected to a high potential is called the drain terminal, and the electrode to which a high potential is applied is called the source terminal. For convenience, this specification assumes that the source terminal and drain terminal are fixed. While the connection relationships of transistors are sometimes explained, in reality, they follow the potential relationships described above. The names for the S terminal and the drain terminal are reversed.

[0025] Furthermore, there are high-load connections called bus lines that are connected to multiple pixels, such as scan lines and When supplying the potential Vout output from the semiconductor device 100 to a signal line, etc., the above potential The transistor 102 that controls the output of Vout requires a large current supply capability. Therefore, the channel width W of transistor 102 is equal to the channel width of transistor 101. It is desirable to design it to a value greater than W.

[0026] Figure 2(A) shows the top views of transistors 101 and 102 shown in Figure 1. This is shown as an example. However, in Figure 2(A), transistors 101 and 102 To clarify the layout, a top view is shown with the gate insulating film 111 omitted. An example of a cross-sectional view of transistor 102 shown in 2(A) along the dashed line A1-A2 is shown below. This is shown in Figure 2(B).

[0027] In Figure 2(A), transistor 101 has a conductive film 110 that functions as a gate electrode, and The gate insulating film 111 on the electrical film 110, and the gate insulating film 111 overlapping with the conductive film 110. A semiconductor film 112 is provided at a certain position, and a source electrode or a dot is placed on the semiconductor film 112. It has conductive films 113 and 114 that function as rain electrodes.

[0028] Furthermore, in Figures 2(A) and 2(B), transistor 102 functions as a gate electrode. A conductive film 115, a gate insulating film 111 on the conductive film 115, and on the gate insulating film 111 A semiconductor film 116 is provided in a position that overlaps with the conductive film 115, and on the semiconductor film 116 It has conductive films 117 and 118 that function as source electrodes or drain electrodes. ru.

[0029] Furthermore, in one aspect of the present invention, the transistor 102 located on the output side is the transistor It has a higher current supply capacity than Ta101. Therefore, in one aspect of the present invention, as shown in Figure 2(A) Uni, channel length L of transistor 102 102 Channel width W 102 The ratio of Channel length L of Rangista 101 101 Channel width W 101 Larger than the ratio It is desirable to design it to a specific value. Specifically, channel length L 102 Channel width W 10 The ratio of 2 is the channel length L 101 Channel width W 101 More than twice the ratio, more preferable It is desirable that the ratio be 3 times or more.

[0030] Furthermore, conductive film 110 and conductive film 115 are separated. This means they exist in physical separation. And in Figures 2(A) and 2(B), The conductive film 110 and the conductive film 115 are electrically connected via the conductive film 119, which functions as wiring. They are connected. Specifically, conductive film 110 and conductive film 115 are shaped to form the gate insulating film 111. The conductive film 119 is connected through the openings 120 and 121 that have been formed.

[0031] Furthermore, the conductive film 110 and conductive film 115 shown in Figures 2(A) and 2(B) are on the insulating surface. The formed conductive film is then processed into a desired shape by etching or other means. And conductive film 113 and conductive film 114, conductive film 117 and conductive film 118 The conductive film 119 is formed so as to cover the openings 120 and 121, and the gate insulating film 111 A conductive film formed on top is processed into a desired shape by etching or the like. This is possible. In other words, the conductive film 119 is different from the conductive film 110 and the conductive film 115. It is formed in layers.

[0032] As shown in Figures 2(A) and 2(B), in one aspect of the present invention, the gate electrode functions as The conductive films 110 and 115 are formed in layers different from the conductive films 110 and 115. The conductive film 119 provides electrical connection.

[0033] As a comparative example, Figure 2(C) shows transistors 101 and 102 shown in Figure 1. Another example of a top view is shown. However, in Figure 2(C), transistor 101 and To clarify the layout of the transistor 102, a top view with the gate insulating film omitted is shown. vinegar.

[0034] In Figure 2(C), transistor 101 has a conductive film 122 that functions as a gate electrode, and A gate insulating film on the conductive film 122, and a gate insulating film provided at a position overlapping with the conductive film 122 on the gate insulating film A semiconductor film 123 is cut, and a source electrode or drain electrode is placed on the semiconductor film 123. It has conductive films 124 and 125 that function as conductive films.

[0035] Furthermore, in Figure 2(C), the transistor 102 is connected to the conductive film 122 which functions as a gate electrode. And, the gate insulating film on the conductive film 122 and the part on the gate insulating film that overlaps with the conductive film 122 A semiconductor film 126 is provided in the position, and a source electrode or drain is placed on the semiconductor film 126. It has conductive films 127 and 128 that function as electrodes.

[0036] In other words, in Figure 2(C), transistors 101 and 102 are connected to the conductive film 12 2 is shared, and the conductive film 122 is the gate electrode of transistor 101 and transistor 1 It functions as the gate electrode of O2. Therefore, in the case of Figure 2(C), it functions as the gate electrode. The area of ​​the conductive film 122 functions as the gate electrode in Figures 2(A) and 2(B). The area becomes larger than the area of ​​conductive film 110 and conductive film 115, respectively.

[0037] Therefore, in one aspect of the present invention, conductive films 110 and 115 function as gate electrodes. Since the area of ​​each of the conductive films can be kept smaller compared to the area of ​​the conductive film 122 of the comparative example, the conductive film When manufacturing 110 and conductive film 115 by etching, the conductive film 110 and conductive film 115 To minimize the amount of charge accumulated in each, that is, to reduce the antenna effect. This can be done. Therefore, in one aspect of the present invention, conductive film 110 and conductive film 115 are etched. When fabricating using the method described above, the conductive film 110 and conductive film 11 This makes it less likely for electrostatic discharge (5) to occur.

[0038] Furthermore, in one aspect of the present invention, the semiconductor film 112 and semiconductor film on the conductive film 110 and conductive film 115 are also included. When fabricating the body film 116 by etching, the conductive film 110 and conductive film due to the antenna effect This makes it less likely for electrostatic discharge (115) to occur.

[0039] Next, Figure 3(A) shows the top surfaces of transistors 101 and 102 as shown in Figure 1. The figure shows an example different from Figure 2(A). However, in Figure 3(A), transistor 101 and To clarify the layout of transistor 102, the gate insulating film 211 was omitted. A top view is shown. Also, the dashed line B1-B2 of transistor 102 shown in Figure 3(A) An example of a cross-sectional view is shown in Figure 3(B).

[0040] In Figure 3(A), transistor 101 functions as either a source electrode or a drain electrode. Conductive film 213 and conductive film 214, and semiconductor film 212 on conductive film 213 and conductive film 214 , a gate insulating film 211 on the semiconductor film 212, and a semiconductor film 2 on the gate insulating film 211 It has a conductive film 210 that functions as a gate electrode, located in a position overlapping with 12.

[0041] Furthermore, in Figures 3(A) and 3(B), transistor 102 is the source electrode or the drain. Conductive films 217 and 218 that function as electrodes, and conductive films 217 and 218 The semiconductor film 216 on top, the gate insulating film 211 on the semiconductor film 216, and the gate insulating film 211 A conductive film that functions as a gate electrode, provided above in a position overlapping with the semiconductor film 216. It has 215.

[0042] And in one aspect of the present invention, the transistor 102 located on the output side has a higher current supply capacity than the transistor 101. Therefore, in one aspect of the present invention, as shown in FIG. 3(A), the ratio of the channel width W to the channel length L of the transistor 102 102 is designed to be a larger value than the ratio of the channel width W 102 to the channel length L of the transistor 101. Specifically, the ratio of the channel width W to the channel length L of the transistor 102 101 is preferably designed to be at least twice, more preferably at least three times, the ratio of the channel width W 101 to the channel length L of the transistor 101. Specifically, the ratio of the channel width W 102 to the channel length L is preferably at least twice, more preferably at least three times, the ratio of the channel width W 10 to the channel length L of the transistor 102. 101 Specifically, the ratio of the channel width W 101 to the channel length L is preferably at least twice, more preferably at least three times, the ratio of the channel width W to the channel length L of the transistor 102.

[0043] Also, the conductive film 210 and the conductive film 215 are separated from each other. And in FIGS. 3(A) and 3(B), the conductive film 210 and the conductive film 215 are electrically connected through the conductive film 219 that functions as a wiring. Specifically, the conductive film 210 and the conductive film 215 are connected to the conductive film 219 through the openings 220 and 221 formed in the gate insulating film 211. Also, the conductive film 210 and the conductive film 215 shown in FIGS. 3(A) and 3(B) can be formed by processing a single conductive film formed on the gate insulating film 211 so as to cover the openings 220 and 221 into a desired shape by etching or the like. And the conductive film 213 and the conductive film 214, the conductive film 217 and the conductive film 218, and the conductive film 219 can be formed by processing a single conductive film formed on an insulating surface into a desired shape by etching or the like. Specifically, the conductive film 210 and the conductive film 215 are connected to the conductive film 219 through the openings 220 and 221 formed in the gate insulating film 211. Also, the conductive film 210 and the conductive film 215 shown in FIGS. 3(A) and (B) can be formed by processing a single conductive film formed on the gate insulating film 211 so as to cover the openings 220 and 221 into a desired shape by etching or the like. And the conductive film 213 and the conductive film 214, the conductive film 217 and the conductive film 218, and the conductive film 219 can be formed by processing a single conductive film formed on an insulating surface into a desired shape by etching or the like. are connected to the conductive film 219 through the openings 220 and 221 formed in the gate insulating film 211.

[0044] Also, the conductive film 210 and the conductive film 215 shown in FIGS. 3(A) and 3(B) can be formed by processing a single conductive film formed on the gate insulating film 211 so as to cover the openings 220 and 221 into a desired shape by etching or the like. And the conductive film 213 and the conductive film and the conductive film 214, the conductive film 217 and the conductive film 218, and the conductive film 219 can be formed by processing a single conductive film formed on an insulating surface into a desired shape by etching or the like. And the conductive film 213 and the conductive film 214, the conductive film 217 and the conductive film 218, and the conductive film 219 can be formed by processing a single conductive film formed on an insulating surface into a desired shape by etching or the like. And the conductive film 213 and the conductive film 214, the conductive film 217 and the conductive film 218, and the conductive film 219 can be formed by processing a single conductive film formed on an insulating surface into a desired shape by etching or the like. [[ID=4B]] 3 and the conductive film 214, the conductive film 217 and the conductive film 218, and the conductive film 219 can be formed by processing a single conductive film formed on an insulating surface into a desired shape by etching or the like. And the conductive film can be formed by processing a single conductive film formed on an insulating surface into a desired shape by etching or the like. This is possible. In other words, the conductive film 219 is different from the conductive film 210 and the conductive film 215. It is formed in layers.

[0045] As shown in Figures 3(A) and 3(B), in one aspect of the present invention, the gate electrode functions as The conductive films 210 and 215 are formed in layers different from the conductive films 210 and 215. The devices are electrically connected by a conductive film 219.

[0046] As a comparative example, Figure 3(C) shows transistors 101 and 102 as shown in Figure 1. Another example of a top view is shown. However, in Figure 3(C), transistor 101 and To clarify the layout of the transistor 102, a top view with the gate insulating film omitted is shown. vinegar.

[0047] In Figure 3(C), transistor 101 functions as either a source electrode or a drain electrode. Conductive film 224 and conductive film 225, and semiconductor film 223 on conductive film 224 and conductive film 225 , a gate insulating film on the semiconductor film 223, and overlapping with the semiconductor film 223 on the gate insulating film It has a conductive film 222 that functions as a gate electrode, provided at a specific position.

[0048] Furthermore, in Figure 3(C), transistor 102 is shown as either the source electrode or the drain electrode. Conductive films 227 and 228, and semiconductor films 2 on conductive films 227 and 228 26, a gate insulating film on the semiconductor film 226, and the semiconductor film 226 on the gate insulating film It has a conductive film 222 that functions as a gate electrode, provided at an overlapping position.

[0049] In other words, in Figure 3(C), transistors 101 and 102 are connected to the conductive film 22 2 is shared, and the conductive film 222 is the gate electrode of transistor 101 and transistor 1 It functions as the gate electrode of O2. Therefore, in the case of Figure 3(C), it functions as the gate electrode. The area of ​​the conductive film 222 functions as the gate electrode in Figures 3(A) and 3(B). The area becomes larger than the area of ​​conductive film 210 and conductive film 215, respectively.

[0050] Therefore, in one aspect of the present invention, conductive films 210 and 215 function as gate electrodes. Since the area of ​​each of the conductive films can be kept smaller compared to the area of ​​the conductive film 222 in the comparative example, the conductive film When manufacturing 210 and conductive film 215 by etching, the conductive film 210 and conductive film 215 To minimize the amount of charge accumulated in each, that is, to reduce the antenna effect. This can be done. Therefore, in one aspect of the present invention, conductive film 210 and conductive film 215 are etched. When fabricating using the method described above, the conductive film 210 and conductive film 21 This makes it less likely for electrostatic discharge (5) to occur.

[0051] Furthermore, in one aspect of the present invention, various conductive films on the conductive film 210 and conductive film 215 are etched. Even when processing into the desired shape, the static effect of the conductive film 210 and conductive film 215 due to the antenna effect This can reduce the likelihood of electrical breakdowns.

[0052] Next, regarding the configuration of a pulse generation circuit, which is one of the semiconductor devices according to one aspect of the present invention: Let me explain. Figure 4 shows an example of a pulse generation circuit in a semiconductor device according to one aspect of the present invention. show.

[0053] The pulse generation circuit 300 shown in Figure 4 comprises transistors 301 to 315 and It has a quantitative element 316. Transistor 302 is connected to transistor 101 shown in Figure 1. Corresponding to: Transistor 309, transistor 312, or transistor 315, Figure This corresponds to transistor 102 shown in 1. Also, the pulse generation circuit 300 is connected to wiring 31 Various potentials are applied from wiring 7 through 326, and these potentials are output to wirings 327 through 329. It has a structure.

[0054] By connecting multiple pulse generation circuits 300 in stages, a shift register can be constructed. can.

[0055] Specifically, if transistors 301 to 315 are of the n-channel type, the wiring A high-level potential VDD is applied to wire 317, and a low-level potential VSS is applied to wire 318. Given, a low-level potential VEE is given to wiring 326. The potential VEE is, It is desirable that the potential be the same as or higher than VSS. Also, wiring 319 The potential LIN is given to wiring 320, the potential INRES is given to wiring 321 A potential CLK2 is applied, a potential RIN is applied to wiring 322, and a potential C is applied to wiring 323. LK1 is given, potential PWC2 is given to wiring 324, and potential PWC The value 1 is given.

[0056] Furthermore, the potential GOUT1 output from the pulse generation circuit 300 is supplied to the wiring 327. The potential GOUT2 output from the pulse generation circuit 300 is applied to the wiring 328. The potential SROUT output from the rout generation circuit 300 is supplied to the wiring 329.

[0057] Potentials LIN, RIN, CLK2, and INRES are shown in Figure 1 for the semiconductor. This corresponds to the potential Vin in device 100. Potential GOUT1, potential GOUT2, and potential SROUT corresponds to the potential Vout in the semiconductor device 100 shown in Figure 1. (Voltage VS) S, potential VEE, potential PWC1, potential PWC2, and potential CLK1 are shown in Figure 1. This corresponds to the potential VH or potential VL in device 100.

[0058] Specifically, transistor 301 has its gate electrode connected to wiring 319. Transistor 301 has one of its source and drain terminals connected to wiring 317, and the other terminal connected to wiring 317. These are connected to either the source terminal or the drain terminal of transistor 302, respectively. The gate electrode of transistor 302 is connected to the gate electrode of transistor 315. Furthermore, the source terminal and the other of the drain terminal of transistor 302 are wired together. It is connected to 318. Transistor 303 has its gate electrode connected to wiring 320. It is also connected. The other end is connected to the gate electrode of transistor 302. The gate electrode of transistor 304 is connected to wiring 321. Also, transistor 3 04 has one of its source and drain terminals connected to wiring 317, and the other connected to transistor 3 Each is connected to the gate electrode of 02. Transistor 305 is connected to its gate electrode. It is connected to wiring 322. Also, transistor 305 has its source terminal and drain One end of the input terminal is connected to wiring 317, and the other end is connected to the gate electrode of transistor 302. The circuit continues. Transistor 306 has its gate electrode connected to wiring 319. Furthermore, transistor 306 has one of its source terminals and drain terminals connected to transistor 3 The gate electrode of transistor 02 is connected to wiring 318, and the other is connected to wiring 318. Transistor 30 7 has its gate electrode connected to wiring 317. Also, transistor 307 is One of the source terminals and drain terminals of the transistor 301 is connected to the source terminal and drain terminal of the transistor 301. The other end of the child is connected to the gate electrode of transistor 308. The inverter 308 has one of its source and drain terminals connected to wiring 323, and the other connected to wiring Each is connected to 329. Transistor 309 has its gate electrode connected to the transistor It is connected to the gate electrode of transistor 302. Also, transistor 309 has its source terminal connected. One of the child and drain terminals is connected to wiring 329, and the other is connected to wiring 318. Transistor 310 has its gate electrode connected to wiring 317. Also, Transistor 310 has one of its source and drain terminals connected to the source of transistor 301. The other end of the drain terminal and the other end of the gate electrode of transistor 311 are connected respectively. It is connected. Transistor 311 has either its source terminal or drain terminal wired. The other end is connected to wiring 328. Transistor 312 is The gate electrode is connected to the gate electrode of transistor 302. Also, transistor 3 12 has one of its source and drain terminals connected to wiring 328, and the other connected to wiring 318. They are each connected. Transistor 313 has its gate electrode connected to wiring 317. Furthermore, transistor 313 has one of its source and drain terminals connected to the transistor. The source terminal and drain terminal of transistor 301 are connected to the other end of the other end of transistor 314. The source and drain electrodes are connected to each other. Transistor 314 has its source terminal and drain One end of the input terminal is connected to wire 325, and the other end is connected to wire 327. The ZISTA 315 has one of its source and drain terminals connected to wiring 327, and the other connected to wiring 3 Each of the 26 is connected to the transistor 302. Capacitive element 316 has one electrode connected to transistor 302. The gate electrode of one electrode is connected to the other electrode, which is connected to the wiring 318.

[0059] Note that in Figure 4, the source terminal and the other drain terminal of the output transistor 315 are arranged Although connected to line 326, the present invention is not limited to this configuration. Output transistor The source terminal and the other drain terminal of 315 may also be connected to wiring 318. Furthermore, because the output transistor 315 is large in size, the transistor 315 is normal When it is a rion, the drain current is larger compared to other transistors. Therefore, If transistor 315 is normally on, then the source terminal and drain terminal of transistor 315 If the other end is connected to wiring 318, the potential of wiring 318 is determined by the drain current. This phenomenon is likely to occur where the voltage rises and the amplitude of the output potential, GOUT1, decreases. However, as shown in Figure 4, the source terminal and drain terminal of the output transistor 315 If the other end is connected to wire 326 instead of wire 318, transistor 315 will not Even if it was a mullion, and as a result the potential of wiring 326 increased, the transistor The potential of wiring 318, which supplies potential to the gate electrode of the zistor, is above the potential of wiring 326. It is unrelated to rising. Therefore, the power of wiring 326 is affected by the drain current of transistor 315. As the voltage level increases, the gate voltage of transistor 315 approaches a threshold voltage that has a negative value. Therefore, transistor 315 can be turned off even when it is normally on.

[0060] In one aspect of the present invention, transistor 309 corresponds to the output side transistor, Transistor 312, at least one of transistors 315, and transistor 302 are connected to each other. The gate electrode is electrically connected to the gate electrode via a conductive film different from the above gate electrode. With the above configuration, transistors 309, 312, 315, and Compared to the case where all gate electrodes of the transistor 302 are made of a single conductive film, The area of ​​each conductive film that functions as a gate electrode can be kept small. Therefore, the gate electrode This makes it possible to reduce electrostatic discharge (ESD) damage caused by the antenna effect of a conductive film that functions in this way. .

[0061] In one aspect of the present invention, two conductive films that function as gate electrodes are the two conductive films mentioned above. The configuration is not limited to one electrically connected via a conductive film distinct from the other. For example, Two conductive films functioning as gate electrodes are connected via multiple conductive films different from the two conductive films mentioned above. They may be electrically connected. In this case, at least one of the above multiple conductive films is The two conductive films that function as gate electrodes are assumed to be formed in different layers.

[0062] Furthermore, in one aspect of the present invention, a plurality of conductive films that function as gate electrodes, and the plurality of conductive films The configuration is not limited to one in which an insulating film is provided between the film and a conductive film for electrically connecting the film. i. In one aspect of the present invention, a plurality of conductive films that function as gate electrodes, and the plurality of conductive films It is sufficient if the conductive film for electrically connecting them is manufactured in a different manufacturing process. Therefore, a plurality of conductive films that function as gate electrodes, and the plurality of conductive films that are electrically connected It is not necessary for an insulating film to be formed between the conductive film and the conductive film used for this purpose.

[0063] (Embodiment 2) In this embodiment, the pulse generation circuit 300 shown in Figure 4 is configured by connecting multiple stages. This explains the shift register.

[0064] The shift register shown in Figure 5 consists of pulse generation circuit 300_1 to pulse generation circuit 300_y It has (y is a natural number) and a dummy pulse generation circuit 300_d. Pulse generation circuit 30 0_1 to pulse generation circuit 300_y are, respectively, the pulse generation circuit 300 shown in Figure 4. It has the same configuration as the other circuit. Furthermore, the pulse generation circuit 300_d is connected to a wire to which the potential RIN is applied. In terms of not being connected to 322 and not having transistor 305, Figure 4 shows The configuration differs from the pulse generation circuit 300 shown.

[0065] Furthermore, in the shift register shown in Figure 5, the pulse generation circuit 300_j (where j is less than or equal to y) The positions of wires 319 to 325 and wires 327 to 329 connected to the natural numbers of This is schematically shown in Figure 7. As can be seen from Figures 5 and 7, the wiring of the pulse generation circuit 300_j 319 receives the potential SR output from wiring 329 of the preceding pulse generation circuit 300_j-1. OUTj-1 is given as the potential LIN. However, the first stage pulse generation circuit 300 The wiring 319 of _1 is configured to receive the potential of the start pulse signal GSP.

[0066] Furthermore, the wiring 322 connected to the pulse generation circuit 300_j has a pulse generation circuit one stage further down the line. The potential SROUTj+1 output from wiring 329 of path 300_j+1 is set as potential RIN. It is given as follows. However, the wiring 322 of the y-stage pulse generation circuit 300_y is pulse generation The SROUTd output from wiring 329 of the raw circuit 300_d is given as the potential RIN. The configuration will be such that...

[0067] Wirings 321 and 323 receive one of the clock signals GCK1 to GCK4. The potentials of any two clock signals are applied to each of them. Specifically, the pulse generation cycle In path 300_4m+1, the potential of the clock signal GCK1 is wired as potential CLK1 in wiring 32 The potential of the clock signal GCK2, which is given to 3, is applied to wiring 321 as potential CLK2. In the pulse generation circuit 300_4m+2, the potential of the clock signal GCK2 is the potential CL The potential of the clock signal GCK3 is given as K1 to wiring 323, and the potential of CLK2 is given as potential CLK2. The signal is supplied to wiring 321. In the pulse generation circuit 300_4m+3, the clock signal GCK3 The potential of is applied to wiring 323 as potential CLK1, and the potential of the clock signal GCK4 is, The potential CLK2 is applied to wiring 321. In pulse generation circuit 300_4m+4, The potential of the lock signal GCK4 is applied to wiring 323 as potential CLK1, and the clock signal The potential of GCK1 is applied to wiring 321 as potential CLK2. Pulse generation circuit 300 In _d, the potential of the clock signal GCK1 is applied to wiring 323 as potential CLK1. The potential of the clock signal GCK2 is applied to wiring 321 as potential CLK2. However, Let m be any integer such that the total number of pulse generation circuits 300 is y.

[0068] Furthermore, wiring 324 and wiring 325 are connected to pulse width control signals PWCA or pulse width control signals PWCD and either of the pulse width control signals PWCa or PWCd The potentials of the two pulse width control signals are each applied. Specifically, the pulse generation circuit 30 In 0_4m+1, the potential of the pulse width control signal PWCa is wired as potential PWC1 to 325 The potential of the pulse width control signal PWCA is given to the wiring 324 as potential PWC2. In the pulse generation circuit 300_4m+2, the potential of the pulse width control signal PWCb is... The potential of the pulse width control signal PWCB is applied to wiring 325 as potential PWC1, and the potential of the pulse width control signal PWCB is set to potential PW It is supplied to wiring 324 as C2. In the pulse generation circuit 300_4m+3, pulse width control The potential of signal PWCc is applied to wiring 325 as potential PWC1, and the pulse width control signal is also applied. The potential of PWCC is applied to wiring 324 as potential PWC2. Pulse generation circuit 300 In _4m+4, the potential of the pulse width control signal PWCd is set to potential PWC1 on wiring 325. Given, the potential of the pulse width control signal PWCD is applied to the wiring 324 as potential PWC2. In the pulse generation circuit 300_d, the potential of the pulse width control signal PWCa is the potential PWC The potential of the pulse width control signal PWCA, which is supplied to wiring 325 as 1, becomes potential PWC2. This is then supplied to wiring 324.

[0069] The potential GOUT1 of the wiring 327 connected to the pulse generation circuit 300_j is equal to the scan line GLaj. It is given to.

[0070] The potential SROUT_j of the wiring 329 connected to the pulse generation circuit 300_j is the inverter Its polarity is reversed by 351_j and applied to scan line GLBj. Specifically, The converter 351_4m+1 has the clock signal GCK2 input, and the clock signal GC When the potential of K2 is low, the polarity of the potential SROUT_4m+1 is reversed, and the scan line The signal is supplied to GLb4m+1. The inverter 351_4m+2 receives the clock signal GCK3 as input. When the potential of the clock signal GCK3 is low, the potential SROUT_4m+ The polarity of 2 is reversed and applied to scan line GLb4m+2. Inverter 351_4m+3 is The clock signal GCK4 is input, and the potential of the clock signal GCK4 is low. Occasionally, the polarity of the potential SROUT_4m+3 is reversed and applied to the scan line GLb4m+3. Inverter 351_4m+4 has the clock signal GCK1 input, and the clock signal When the potential of GCK1 is low, the polarity of the potential SROUT_4m+4 is reversed, The signal is applied to the GLb4m+4 line. The inverter 351_d receives the clock signal GCK2 as input. When the potential of the clock signal GCK2 is low, the polarity of the potential SROUT_d Invert the result and apply it to the scan line GLbd.

[0071] Furthermore, the potential GOUT2 of the wiring 328 connected to the pulse generation circuit 300_j is an inverter. Its polarity is reversed by 350_j and applied to scan line GLCj. Specifically, Converter 350_4m+1 has the clock signal GCK2 input, and the clock signal G When the potential of CK2 is low, the polarity of the potential GOUT2 is reversed, and scan line GLc4 It is supplied to m+1. Inverter 350_4m+2 receives the clock signal GCK3. When the potential of the clock signal GCK3 is low, the polarity of the potential GOUT2 is reversed. Then, it is applied to scan line GLc4m+2. Inverter 350_4m+3 is the clock signal GC When K4 is input and the potential of the clock signal GCK4 is low, the potential GOUT The polarity of 2 is reversed and applied to scan line GLc4m+3. Inverter 350_4m+4 is When the clock signal GCK1 is input and the potential of the clock signal GCK1 is low level Sometimes, the polarity of the potential GOUT2 is reversed and applied to the scan line GLc4m+4. (Inverter) 350_d has the clock signal GCK2 input, and the potential of the clock signal GCK2 is When the level is low, the polarity of the potential GOUT2 is reversed and applied to the scan line GLcd.

[0072] Next, regarding the operation of the pulse generation circuit 300 shown in Figure 4, the timing shown in Figure 6 We will explain using a chart. Note that throughout the entire period, the potential INRES is at a low level. It shall be assumed that...

[0073] As shown in Figure 6, during period t1, the potential CLK1 applied to wiring 323 is low level. The potential CLK2 applied to wiring 321 is low level, and the pulse applied to wiring 325 is low level. The potential of the width control signal PWC1 is low level, and the pulse width control signal PW is applied to wiring 324. The potential of C2 is low, the potential LIN applied to wiring 319 is high, wiring 322 The potential RIN applied to it will be at a low level.

[0074] Therefore, during period t1, the pulse generation circuit 300 supplies the pulse to the wiring 325. The potential (low level) of the width control signal PWC1 is applied to wiring 327 as potential GOUT1. Furthermore, the potential (low level) of the pulse width control signal PWC2 applied to wiring 324 is The potential GOUT2 is applied to wiring 328. Also, the potential C is applied to wiring 323. LK1 (low level) is applied to wiring 329 as potential SROUT.

[0075] Next, as shown in Figure 6, during period t2, the potential CLK1 applied to wiring 323 is High level, potential CLK2 is applied to wiring 321. Low level, applied to wiring 325. The potential of the pulse width control signal PWC1 changes from a low level to a high level, and is connected to wiring 324. The potential of the given pulse width control signal PWC2 is low, and the potential applied to wiring 319 is low. LIN is at a high level, while the potential RIN applied to wiring 322 is at a low level.

[0076] Therefore, during period t2, the pulse generation circuit 300 supplies the pulse to the wiring 325. The potential of the width control signal PWC1 (changing from low level to high level) is equal to the potential of GOUT1. This is then supplied to wiring 327. Also, the pulse width control signal PWC2 is supplied to wiring 324. The potential (low level) of is applied to wiring 328 as potential GOUT2. Also, wiring 3 The potential CLK1 (high level) applied to 23 is supplied to wiring 329 as potential SROUT. It can be obtained.

[0077] Next, as shown in Figure 6, during period t3, the potential CLK1 applied to wiring 323 is High level, potential CLK2 is applied to wiring 321. Low level, applied to wiring 325. The potential of the pulse width control signal PWC1 is high level, and the pulse width control is applied to wiring 324. The potential of signal PWC2 is high level, and the potential LIN supplied to wiring 319 is also high level. As the level changes, the potential RIN applied to wiring 322 becomes low.

[0078] Therefore, during period t3, the pulse generation circuit 300 supplies the pulse to the wiring 325. The potential (high level) of the width control signal PWC1 is applied to wiring 327 as potential GOUT1. Furthermore, the potential (high level) of the pulse width control signal PWC2 applied to wiring 324 is The potential GOUT2 is applied to wiring 328. Also, the potential C is applied to wiring 323. LK1 (high level) is applied to wiring 329 as potential SROUT.

[0079] Next, as shown in Figure 6, during period t4, the potential CLK1 applied to wiring 323 is High level, potential CLK2 is applied to wiring 321. Low level, applied to wiring 325. The potential of the pulse width control signal PWC1 changes from high level to low level, and is connected to wiring 324. The potential of the given pulse width control signal PWC2 is high, and this is the potential applied to wiring 319. LIN is low level, and the potential RIN applied to wiring 322 is also low level.

[0080] Therefore, during period t4, the pulse generation circuit 300 supplies the pulse to the wiring 325. The potential of the width control signal PWC1 (changing from high level to low level) is equal to the potential of GOUT1. This is then supplied to wiring 327. Also, the pulse width control signal PWC2 is supplied to wiring 324. The potential (high level) of is applied to wiring 328 as potential GOUT2. Also, wiring 3 The potential CLK1 (high level) applied to 23 is supplied to wiring 329 as potential SROUT. It can be obtained.

[0081] Next, as shown in Figure 6, during period t5, the potential CLK1 applied to wiring 323 is Low level, potential CLK2 is applied to wiring 321, high level, applied to wiring 325 The potential of the pulse width control signal PWC1 is low level, and the pulse width control is applied to wiring 324. The potential of signal PWC2 is low, the potential LIN supplied to wiring 319 is low, The potential RIN applied to line 322 becomes high level.

[0082] Therefore, during period t5, the pulse generation circuit 300 applies the potential V to the wiring 326. EE (low level) is applied to wiring 327 as potential GOUT1. Also, wiring 31 The potential VSS (low level) applied to 8 is applied to wiring 328 as potential GOUT2. Furthermore, the potential VSS (low level) applied to wiring 318 is set to potential SROUT. This is then supplied to wiring 329.

[0083] In one aspect of the present invention, as described in Embodiment 1, the output transistor corresponds to at least one of transistors 309, 312, and 315 The gate electrodes of transistor 302 and transistor 302 are separated by a different conductive film from the gate electrode mentioned above. And they are electrically connected. With the above configuration, transistor 309 and transistor 3 12. All gate electrodes of transistors 315 and 302 are connected by a single conductive film. Compared to the configuration, the area of ​​each conductive film that functions as a gate electrode is kept smaller. Therefore, electrostatic discharge of the conductive film functioning as a gate electrode due to the antenna effect is possible. This makes it less likely for damage to occur. Therefore, the present invention using the above shift register A semiconductor device according to one embodiment is less susceptible to yield reduction due to electrostatic discharge.

[0084] This embodiment can be implemented in appropriate combination with other embodiments.

[0085] (Embodiment 3) An example of the configuration of a pulse generation circuit in a semiconductor device according to one aspect of the present invention will be described.

[0086] The pulse generation circuit 400 shown in Figure 8(A) consists of transistors 402 to 404 The pulse generation circuit 400 has transistors 415 to 420. By connecting multiple units in a row, a shift register can be constructed.

[0087] Transistor 402 has its gate electrode connected to transistors 403 and 404. It is connected to the gate electrode, with one of its source and drain terminals connected to wiring 406, and the other connected to It is connected to the gate electrode of transistor 420. Transistor 403 is its source. One of the terminals and the drain terminal is connected to wiring 406, and the other is connected to wiring 414. Transistor 404 has one of its source and drain terminals connected to wiring 407. The other end is connected to wiring 413.

[0088] Furthermore, transistor 415 has its gate electrode connected to wiring 408, and its source terminal And one of the drain terminals is connected to the gate electrode of transistor 420, and the other is connected to wiring 40 It is connected to 5. Transistor 416 has its gate electrode connected to wiring 409. One of its source and drain terminals is connected to transistor 402, transistor 403, and One end is connected to the gate electrode of transistor 404, and the other end is connected to wiring 405. The transistor 417 has its gate electrode connected to wiring 410, and its source terminal and drain One of the input terminals is connected to transistors 402, 403, and 404. One end is connected to the gate electrode, and the other end is connected to wiring 405. Transistor 418 is The gate electrode is connected to wiring 408, and one of its source and drain terminals is connected to wiring 4 It is connected to 06, and the other side is connected to transistors 402, 403, and 4 It is connected to the gate electrode of 04. Transistor 419 has its gate electrode connected to the transistor It is connected to the gate electrode of sta 420, and one of its source terminals and drain terminals is connected to wiring 41. One end is connected to 4, and the other end is connected to wiring 411. Transistor 420 is its source One of the terminals and the drain terminal is connected to wiring 413, and the other is connected to wiring 412. ru.

[0089] Transistors 402 through 404 and transistors 415 through 4 If 20 is an n-channel type, specifically, a potential VDD is applied to the wiring 405, and The potential VSS is applied to line 406, and the potential VEE is applied to wiring 407. The potentials of various signals, such as the clock signal, are applied to lines 408 through 412. Then, the potential GOUT is output from wiring 413, and the potential SROUT is output from wiring 414.

[0090] In one aspect of the present invention, transistor 403, which corresponds to the output side transistor, and At least one of the transistors 404 and transistor 402 have their gate electrodes connected as described above. The gate electrode is electrically connected via a conductive film provided in a different layer. As a result, all of transistors 403, 404, and 402 Compared to the case where the gate electrode is composed of a single conductive film, each conductive film that functions as the gate electrode The film area can be kept small. Therefore, the conductive film that functions as the gate electrode is This makes it less likely for electrostatic discharge to occur due to the antenna effect. Therefore, the above pulse generation A semiconductor device according to one aspect of the present invention, in which the raw circuit 400 is used as a shift register, etc., electrostatic This makes it less likely for yield to decrease due to damage.

[0091] Alternatively, in one aspect of the present invention, a transistor 420 corresponding to the output side transistor, Transistor 419 is a transistor in which the gate electrodes of each other are located on a different layer from the gate electrodes mentioned above. The components may be electrically connected via a conductive film. The above configuration constitutes the pulse generation circuit. A semiconductor device according to one aspect of the present invention, in which 400 is used in a shift register or the like, for electrostatic discharge This makes it less likely for yield to decrease due to [unspecified reason].

[0092] Note that in Figure 8(A), the source terminal and drain terminal of the output transistor 404 are shown. Although the other side is connected to wiring 407, the present invention is not limited to this configuration. It is acceptable if either the source terminal or drain terminal of the ZISTA 404 is connected to wiring 406. However, as shown in Figure 8(A), the source terminal and the dot of the output transistor 404 If one of the rain terminals is connected to wire 407 instead of wire 406, transistor 4 Even if 04 is normally on, turn off transistor 404 when it should be turned off. It is possible.

[0093] The pulse generation circuit 430 shown in Figure 8(B) consists of transistors 432 to 434 The pulse generation circuit 430 has transistors 446 to 452. By connecting multiple units in a row, a shift register can be constructed.

[0094] Transistor 432 has its gate electrode connected to transistors 433 and 434. It is connected to the gate electrode, and one of its source terminals and drain terminals is connected to wiring 436. The other end is connected to the gate electrodes of transistors 451 and 452. The transistor 433 has one of its source and drain terminals connected to wiring 436. The other end is connected to wiring 445. Transistor 434 has its source terminal and drain One end of the terminal is connected to wire 437, and the other end is connected to wire 444.

[0095] Furthermore, transistor 446 has its gate electrode connected to wiring 438, and its source terminal And one of the drain terminals is in contact with the gate electrodes of transistors 451 and 452. The other end is connected to wiring 435. Transistor 447 has its gate electrode It is connected to wiring 439, and one of its source and drain terminals is connected to transistor 432. The gate electrodes of transistors 433 and 434 are connected, and the other end is wire 43 It is connected to 5. Transistor 448 has its gate electrode connected to wiring 440. One of its source and drain terminals is connected to transistor 432, transistor 433, and One end is connected to the gate electrode of transistor 434, and the other end is connected to wiring 435. The transistor 449 has its gate electrode connected to wiring 438, and its source terminal and drain One of the input terminals is connected to wiring 436, and the other is connected to transistor 432, transistor 43 3, and connected to the gate electrode of transistor 434. Transistor 450 is The gate electrode is connected to wiring 441, and one of its source and drain terminals is connected to the transistor. It is connected to the gate electrodes of transistors 432, 433, and 434. The other end is connected to wiring 435. Transistor 451 has its source terminal and drain One end of the terminal is connected to wiring 445, and the other end is connected to wiring 442. Transis The 452 has one of its source and drain terminals connected to wiring 444, and the other is connected to wiring It is connected to line 443.

[0096] Transistors 432 through 434 and transistors 446 through 4 If 52 is an n-channel type, specifically, a potential VDD is applied to the wiring 435, and The potential VSS is applied to line 436, and the potential VEE is applied to wiring 437. The potentials of various signals, such as the clock signal, are applied to lines 438 through 443. Then, the potential GOUT is output from wiring 444, and the potential SROUT is output from wiring 445.

[0097] In one aspect of the present invention, transistor 433 corresponds to the output side transistor, and At least one of the transistors 434 and transistor 432 have their gate electrodes connected as described above. The gate electrode is electrically connected via a conductive film provided in a different layer. As a result, all of transistors 433, 434, and 432 Compared to the case where the gate electrode is composed of a single conductive film, each conductive film that functions as the gate electrode The film area can be kept small. Therefore, the conductive film that functions as the gate electrode is This makes it less likely for electrostatic discharge to occur due to the antenna effect. Therefore, the above pulse generation A semiconductor device according to one aspect of the present invention, in which the raw circuit 430 is used as a shift register, etc., electrostatic This makes it less likely for yield to decrease due to damage.

[0098] Alternatively, in one aspect of the present invention, a transistor 452 corresponding to the output transistor, Transistor 451 is a transistor in which the gate electrodes of each other are located on a different layer from the gate electrodes mentioned above. The components may be electrically connected via a conductive film. The above configuration constitutes the pulse generation circuit. A semiconductor device according to one aspect of the present invention, in which 430 is used in a shift register or the like, for electrostatic discharge This makes it less likely for yield to decrease due to [unspecified reason].

[0099] Note that in Figure 8(B), the source terminal and drain terminal of the output transistor 434 are shown. Although the other side is connected to wiring 437, the present invention is not limited to this configuration. It is acceptable if either the source terminal or drain terminal of Zista 434 is connected to wiring 436. However, as shown in Figure 8(B), the source terminal and the dot of the output transistor 434 If one of the rain terminals is connected to wire 437 instead of wire 436, transistor 4 Even if 34 is normally on, turn off transistor 434 when it should be turned off. It is possible.

[0100] The pulse generation circuit 460 shown in Figure 9(A) consists of transistors 462 to 464 The pulse generation circuit 460 has transistors 476 to 482. By connecting multiple units in a row, a shift register can be constructed.

[0101] Transistor 462 has its gate electrode connected to transistors 463 and 464. It is connected to the gate electrode, and one of its source and drain terminals is connected to wiring 466. , the other party is connected to one of the source terminal and the drain terminal of the transistor 477. The transistor 463 has one of its source terminal and drain terminal connected to the wiring 466, and the other is connected to the wiring 475. The transistor 464 has one of its source terminal and drain terminal connected to the wiring 467, and the other is connected to the wiring 474.

[0102] Also, for the transistor 476, its gate electrode is connected to the wiring 468, and one of its source terminal and drain terminal is connected to one of the source terminal and the drain terminal of the transistor 477, and the other is connected to the wiring 465. The transistor 477 has its gate electrode connected to the wiring 465, and the other of its source terminal and drain terminal is connected to the gate electrodes of the transistor 481 and the transistor 482. The transistor 478 has its gate electrode connected to the wiring 469, and one of its source terminal and drain terminal is connected to the gate 101 92>electrodes of the transistor 462, the transistor 463, and the transistor 464, and the other is connected to the wiring 465. The transistor 479 has its gate electrode connected to the wiring 468 continuously, and one of its source terminal and drain terminal is connected to the wiring 466, and the other is connected to the gate electrodes of the transistor 462, the transistor 463, and the transistor 464. The transistor 480 has its gate electrode connected to the wiring 470, and one of its source terminal and drain terminal is connected to the gate electrodes of the transistor 462, the transistor 463, and the transistor 464, and the other is connected to the wiring 465. The transistor 48 1 has one of its source terminal and drain terminal connected to the wiring 475, and the other is connected to the wiring 47 It is connected to 1. One of the source terminal and the drain terminal of the transistor 482 is connected to the wiring 474, and the other is connected to the wiring 472.

[0103] When the transistors 462 to 464 and the transistors 476 to 4 82 are of n-channel type, specifically, the potential VDD is applied to the wiring 465, and the potential VSS is applied to the wiring 466, and the potential VEE is applied to the wiring 467. Also, the potentials of various signals such as a clock signal are applied to the wirings 468 to 472. Then the potential GOUT is output from the wiring 474, and the potential SROUT is output from the wiring 475.

[0104] In one aspect of the present invention, at least one of the transistors 463 and 464 corresponding to the output-side transistors, and the transistor 462 have their gate electrodes electrically connected via a conductive film provided in a layer different from the [[ID=2�]]gate electrode. With the above configuration compared to the case where all the gate electrodes of the transistors 463, 464, and 462 are formed of a single conductive film, the area of each conductive film functioning as a gate electrode can be suppressed to be small. Therefore, electrostatic breakdown due to the antenna effect of the conductive film functioning as a gate electrode can be made less likely to occur. Thus, it is possible to make less likely the decrease in yield due to electrostatic breakdown in a semiconductor device according to one aspect of the present invention using the above pulse generation circuit 460 as a shift register or the like. breakdown in a semiconductor device according to one aspect of the present invention using the above pulse generation circuit 460 as a shift register or the like. breakdown in a semiconductor device according to one aspect of the present invention using the above pulse generation circuit 460 as a shift register or the like. breakdown in a semiconductor device according to one aspect of the present invention using the above pulse generation circuit 460 as a shift register or the like. breakdown in a semiconductor device according to one aspect of the present invention using the above pulse generation circuit 460 as a shift register or the like.

[0105] Alternatively, in one aspect of the present invention, the transistor 482 corresponding to the output-side transistor and the transistor 481 have their gate electrodes provided in a layer different from the gate electrode The components may be electrically connected via a conductive film. The above configuration constitutes the pulse generation circuit. A semiconductor device according to one aspect of the present invention, in which 460 is used in a shift register or the like, for electrostatic discharge This makes it less likely for yield to decrease due to [unspecified reason].

[0106] Note that in Figure 9(A), the source terminal and drain terminal of the output transistor 464 are shown. Although the other side is connected to wiring 467, the present invention is not limited to this configuration. It is acceptable if either the source terminal or drain terminal of ZISTA 464 is connected to wiring 466. However, as shown in Figure 9(A), the source terminal and the dot of the output transistor 464 If one of the rain terminals is connected to wire 467 instead of wire 466, transistor 4 Even if 64 is normally on, turn off transistor 464 when it should be turned off. It is possible.

[0107] The pulse generation circuit 500 shown in Figure 9(B) consists of transistors 502 to 504 The pulse generation circuit 500 has transistors 516 to 523. By connecting multiple units in a row, a shift register can be constructed.

[0108] Transistor 502 has its gate electrode connected to transistors 503 and 504. It is connected to the gate electrode, and one of its source terminals and drain terminals is connected to wiring 506. The other end is connected to either the source terminal or the drain terminal of transistor 517. The transistor 503 has one of its source and drain terminals connected to wiring 506. The other end is connected to wiring 515. Transistor 504 has its source terminal and drain One end of the terminal is connected to wiring 507, and the other end is connected to wiring 514.

[0109] Furthermore, transistor 516 has its gate electrode connected to wiring 508, and its source terminal And one of the drain terminals is connected to one of the source and drain terminals of transistor 517. The other end is connected to wiring 505. Transistor 517 has its gate electrode It is connected to wiring 505, and the source terminal and the other of the drain terminal are connected to transistor 521. It is connected to the gate electrode. Transistor 518 has its gate electrode connected to wiring 509. The source terminal and drain terminal of the transistor 502 and transistor 502 are connected. 03 is connected to the gate electrode of transistor 504, and the other is connected to wiring 505. Transistor 519 has its gate electrode connected to wiring 508 and its source terminal And one of the drain terminals is connected to wiring 506, and the other is connected to transistor 502, Trans It is connected to the gate electrodes of transistor 503 and transistor 504. Transistor 52 0 has its gate electrode connected to wiring 510, and one of its source terminals and drain terminals This contacts the gate electrodes of transistors 502, 503, and 504. The other end is connected to wiring 505. Transistor 521 has its source terminal and One end of the drain terminal is connected to wiring 515, and the other end is connected to wiring 511. The transistor 522 has its gate electrode connected to wiring 505, and its source terminal and drain One of the input terminals is connected to the gate electrode of transistor 521, and the other is connected to the transistor It is connected to the gate electrode of 523. Transistor 523 has its source terminal and drain One of the input terminals is connected to wiring 514, and the other is connected to wiring 512.

[0110] When transistors 502 to 504 and transistors 516 to 523 are of the n-channel type, specifically, a potential VDD is applied to wiring 505, a potential VSS is applied to wiring 506, and a potential VEE is applied to wiring 507. Also, potentials of various signals such as a clock signal are applied to wirings 508 to 512. Then, a potential GOUT is output from wiring 514, and a potential SROUT is output from wiring 515. When transistors 502 to 504 and transistors 516 to 523 are of the n-channel type, specifically, a potential VDD is applied to wiring 505, a potential VSS is applied to wiring 506, and a potential VEE is applied to wiring 507. Also, potentials of various signals such as a clock signal are applied to wirings 508 to 512. Then, a potential GOUT is output from wiring 514, and a potential SROUT is output from wiring 515. When transistors 502 to 504 and transistors 516 to 523 are of the n-channel type, specifically, a potential VDD is applied to wiring 505, a potential VSS is applied to wiring 506, and a potential VEE is applied to wiring 507. Also, potentials of various signals such as a clock signal are applied to wirings 508 to 512. Then, a potential GOUT is output from wiring 514, and a potential SROUT is output from wiring 515. When transistors 502 to 504 and transistors 516 to 523 are of the n-channel type, specifically, a potential VDD is applied to wiring 505, a potential VSS is applied to wiring 506, and a potential VEE is applied to wiring 507. Also, potentials of various signals such as a clock signal are applied to wirings 508 to 512. Then, a potential GOUT is output from wiring 514, and a potential SROUT is output from wiring 515. Then, a potential GOUT is output from wiring 514, and a potential SROUT is output from wiring 515. <00009​​​​​​​​​​​​​​​​​​​​​​​​​​​ However, as shown in Figure 9(B), the source terminal and the output side of transistor 504 are connected. If one of the rain terminals is connected to wire 507 instead of wire 506, transistor 5 Even if 04 is normally on, turn off transistor 504 when it should be turned off. It is possible.

[0113] The pulse generation circuit 530 shown in Figure 10 includes transistors 532 to 534, It has transistors 546 to 553. The pulse generation circuit 530 is duplicated By connecting several units in a row, a shift register can be constructed.

[0114] Transistor 532 has its gate electrode connected to transistors 533 and 534. It is connected to the gate electrode, and one of its source and drain terminals is connected to wiring 536. The other end is connected to either the source terminal or the drain terminal of transistor 452. The transistor 533 has one of its source and drain terminals connected to wiring 536. The other end is connected to wiring 545. Transistor 534 has its source terminal and drain One end of the terminal is connected to wiring 537, and the other end is connected to wiring 544.

[0115] Furthermore, transistor 546 has its gate electrode connected to wiring 538, and its source terminal And one of the drain terminals is connected to one of the source and drain terminals of transistor 532. The other end is connected to wiring 535. Transistor 547 has its gate electrode It is connected to wiring 539, and one of its source terminals and drain terminals is connected to transistor 532. It is connected to the gate electrodes of transistors 533 and 534, and the other end is wire 53 It is connected to 5. Transistor 548 has its gate electrode connected to wiring 540. One of its source and drain terminals is connected to transistor 532, transistor 533, and One end is connected to the gate electrode of transistor 534, and the other end is connected to wiring 535. The transistor 549 has its gate electrode connected to wiring 538, and its source terminal and drain One of the input terminals is connected to wiring 536, and the other is connected to transistor 532, transistor 53 3, and is connected to the gate electrode of transistor 534. Transistor 550 is The gate electrode is connected to wiring 535, and one of its source terminal and drain terminal is connected to the transistor. It is connected to one of the source and drain terminals of the ZISTA 552, and the other is connected to the transistor. It is connected to the gate electrode of 551. Transistor 551 has its source terminal and drain One end of the input terminal is connected to wiring 545, and the other end is connected to wiring 541. Transition Component 552 has its gate electrode connected to wiring 535, and its source and drain terminals The other end of this child is connected to the gate electrode of transistor 553. Transistor 553 is One of its source and drain terminals is connected to wiring 544, and the other is connected to wiring 542. It continues.

[0116] Transistors 532 through 534 and transistors 546 through 5 If 53 is an n-channel type, specifically, a potential VDD is applied to the wiring 535, and The potential VSS is applied to line 536, and the potential VEE is applied to wiring 537. The potential of various signals, such as the clock signal, is applied to lines 538 through 542. Then, the potential GOUT is output from wiring 544, and the potential SROUT is output from wiring 545.

[0117] In one aspect of the present invention, transistor 533 corresponds to the output side transistor, and At least one of the transistors 534 and transistor 532 have their gate electrodes connected as described above. The gate electrode is electrically connected via a conductive film provided in a different layer. As a result, all of transistors 533, 534, and 532 Compared to the case where the gate electrode is composed of a single conductive film, each conductive film that functions as the gate electrode The film area can be kept small. Therefore, the conductive film that functions as the gate electrode is This makes it less likely for electrostatic discharge to occur due to the antenna effect. Therefore, the above pulse generation A semiconductor device according to one aspect of the present invention, in which the raw circuit 530 is used as a shift register, etc., electrostatic This makes it less likely for yield to decrease due to damage.

[0118] Note that in Figure 10, one of the source terminals and drain terminals of the output transistor 534 is Although connected to wiring 537, the present invention is not limited to this configuration. Output side transistor Either the source terminal or the drain terminal of terminal 534 may be connected to wiring 536. However, as shown in Figure 10, the source terminal and drain terminal of the output transistor 534 If one of the child wires is connected to wire 537 instead of wire 536, transistor 534 will Even with Marion, it's possible to turn off transistor 534 when it should be turned off. .

[0119] This embodiment can be implemented in appropriate combination with other embodiments.

[0120] (Embodiment 4) Taking an OLED-based light-emitting device as an example, the pixels of a semiconductor display device according to one aspect of the present invention The cross-sectional structure of the drive circuit will be explained using Figure 11. Figure 11 shows the pixel 840 and the drive A cross-sectional view of circuit 841 is shown as an example.

[0121] In Figure 11, pixel 840 controls the current supply to light-emitting element 832. The pixel 840 has the above-mentioned light-emitting element 832 and transistor 831. In addition to the 831, there are transistors that control the input of the image signal to the 840 pixel, and the image signal It may also have various semiconductor elements, such as capacitive elements that maintain the potential of a certain value.

[0122] Furthermore, in Figure 11, the drive circuit 841 has a transistor 830. Specifically, The zista 830 is a shift register that corresponds to part of the drive circuit 841, and has an output side It corresponds to a transistor. The drive circuit 841, in addition to the above transistor 830, It may also have various semiconductor elements such as static and capacitive elements.

[0123] Transistor 831 is a conductive electrode that functions as a gate electrode on a substrate 800 having an insulating surface. The conductive film 816, the gate insulating film 802 on the conductive film 816, and the position overlapping with the conductive film 816 The semiconductor film 817 is provided on the gate insulating film 802, and the source terminal or drain terminal It has conductive films 815 and 818 that function as children and are located on the semiconductor film 817. The conductive film 816 also functions as a scanning line.

[0124] The transistor 830 is a conductive electrode that functions as a gate electrode on a substrate 800 having an insulating surface. The conductive film 812, the gate insulating film 802 on the conductive film 812, and the position overlapping with the conductive film 812 The semiconductor film 813 is provided on the gate insulating film 802, and the source terminal or drain terminal It has conductive films 814 and 819 that function as children and are located on the semiconductor film 813. .

[0125] Furthermore, the conductive film 850 provided on the substrate 800 having an insulating surface is a transistor 830 It functions as a gate electrode of a transistor different from the one described above. And the conductive film 812 and the conductive film 850 provides an opening in the conductive film 812 and the gate insulating film 802 on the conductive film 850. It is connected to the conductive film 851 on the gate insulating film 802 via this.

[0126] Furthermore, on conductive film 814, conductive film 815, conductive film 818, conductive film 819, and conductive film 851 The insulating film 820 and insulating film 821 are arranged to be stacked in order. Conductive films 852 and 853 are provided on the edge film 821. The conductive film 853 is transmitted through the openings provided in the insulating film 820 and the insulating film 821, through the conductive film 8 It is connected to 51 and the conductive film 818, respectively.

[0127] Furthermore, an insulating film 854 is provided on the conductive film 852 and the conductive film 853. A conductive film 822, which functions as an anode, is provided on the edge film 854. It is connected to the conductive film 853 through an opening formed in the insulating film 854.

[0128] Furthermore, the insulating film 824 has an opening that exposes a portion of the conductive film 822, and the insulating film 85 It is provided on 4. On a part of the conductive film 822 and on the insulating film 854, there is an EL layer 825 and A conductive film 826, which functions as a cathode, is arranged in a stacked manner. The region where 2, the EL layer 825, and the conductive film 826 overlap corresponds to the light-emitting element 832. ru.

[0129] In one aspect of the present invention, transistors 830 and 831 are amorphous, micro Semiconductors such as silicon or germanium, which are crystalline, polycrystalline, or single crystals, are used in semiconductor films. It is fine if they are included, and wide-bandgap semiconductors such as oxide semiconductors are used in semiconductor films. It's okay to be there.

[0130] The semiconductor film of transistors 830 and 831 is amorphous, microcrystalline, polycrystalline or When a single crystal semiconductor such as silicon or germanium is used, a single conductive material is added. The impurity elements are added to the semiconductor film to function as either a source region or a drain region. This forms an impurity region. For example, by adding phosphorus or arsenic to the semiconductor film, An impurity region having n-type conductivity can be formed. Also, for example, boron can be used as described above. By adding it to a semiconductor film, it is possible to form an impurity region with p-type conductivity.

[0131] In cases where oxide semiconductors are used in the semiconductor films of transistors 830 and 831 In addition, a dopant is added to the above semiconductor film to function as a source region or drain region. An impurity region may be formed. Dopant addition can be performed using ion implantation. Dopants are, for example, noble gases such as helium, argon, and xenon, as well as nitrogen, phosphorus, Group 15 elements such as arsenic and antimony can be used. For example, nitrogen can be used as dopan. When used as a toner, the concentration of nitrogen atoms in the impurity region is 5 × 10⁻⁶. 19 / cm 3 The above 1× 10 22 / cm 3 The following is preferable:

[0132] Furthermore, silicon semiconductors are produced using vapor phase growth methods such as plasma CVD or sputtering. Amorphous silicon produced by the annealing method, amorphous silicon subjected to treatments such as laser annealing Hydrogen ions and other substances are implanted into polycrystalline silicon and single-crystal silicon wafers to form a crystallized surface layer. Single-crystal silicon from which a portion has been peeled off can be used.

[0133] Furthermore, the oxide semiconductor contains at least indium (In) or zinc (Zn). It is preferable that it contains In and Zn. As a stabilizer to reduce variations in the electrical characteristics of the converters, in addition to them It is preferable to have gallium (Ga). Also, tin (Sn) as a stabilizer is preferable. It is preferable to have it. Furthermore, it is preferable to have hafnium (Hf) as a stabilizer. It is preferable. Furthermore, it is preferable to have aluminum (Al) as a stabilizer.

[0134] Also, other stabilizers include lanthanides such as lanthanum (La) and cerium ( Ce, praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Mium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), Lu It may contain one or more types of tecium (Lu).

[0135] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and the oxide of binary metals. These are In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, and Zn-Mg oxides. Oxides, Sn-Mg oxides, In-Mg oxides, In-Ga oxides, ternary metals In-Ga-Zn oxides (also written as IGZO), In-Al-Zn oxides Oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn acids oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In-La-Zn oxides Materials, In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides, I n-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides, In -Lu-Zn ​​oxides, In-Sn-Ga-Zn oxides which are oxides of quaternary metals, I n-Hf-Ga-Zn oxides, In-Al-Ga-Zn oxides, In-Sn-Al- Using Zn-based oxides, In-Sn-Hf-Zn-based oxides, and In-Hf-Al-Zn-based oxides It is possible for it to be present. Furthermore, the above oxide semiconductor may also contain silicon.

[0136] For example, an In-Ga-Zn oxide is an oxide containing In, Ga, and Zn. This is about taste, and the ratio of In, Ga, and Zn is not important. Also, metal elements other than In, Ga, and Zn are not considered. It may also contain [something]. In-Ga-Zn oxides have sufficiently high resistance in the absence of an electric field and are off-electric. Because it can reduce the flow rate sufficiently and also has high mobility, it is used in semiconductor devices. It is suitable as a semiconductor material.

[0137] For example, In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3) or In:G In-Ga-Zn system oxidation with atomic ratio a:Zn=2:2:1 (=2 / 5:2 / 5:1 / 5) Oxides with a similar composition to the substance can be used. Alternatively, In:Sn:Zn=1: 1:1(=1 / 3:1 / 3:1 / 3), In:Sn:Zn=2:1:3(=1 / 3:1 / 6:1 / 2) or In:Sn:Zn=2:1:5 (=1 / 4:1 / 8:5 / 8) It is advisable to use In-Sn-Zn oxides with a specific ratio or oxides with a similar composition.

[0138] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. However, Furthermore, even with In-Ga-Zn oxides, mobility can be increased by reducing the bulk defect density. It is possible to do so.

[0139] Furthermore, impurities such as water or hydrogen, which act as electron donors, are reduced, and acid Oxide semiconductors that have been purified by reducing elemental defects are type i (intrinsic semiconductor) or It is very close to type i. Therefore, the off-current of the above oxide semiconductor transistor is It has the characteristic of being extremely low. Furthermore, the band gap of oxide semiconductors is 2 eV or more. Preferably 2.5 eV or higher, more preferably 3 eV or higher. Acids that have been purified by sufficiently reducing the concentration of pure substances and reducing oxygen deficiency. By using a synthetic semiconductor film, the off-current of the transistor can be reduced.

[0140] Specifically, transistors using highly purified oxide semiconductors as semiconductor films have a low off-current. This can be proven through various experiments. For example, if the channel width is 1 × 10⁻⁶ 6 micrometers Even with an element with a channel length of 10 μm, the voltage between the source terminal and the drain terminal (drain voltage) When the voltage is in the range of 1V to 10V, the off-current is measured by a semiconductor parameter analyzer. Below the limit, i.e., 1 × 10⁻⁶ -13 It is possible to obtain the characteristic of being A or less. In this case, The off-current, which corresponds to the value obtained by dividing the f-current by the transistor's channel width, is 100 Hz / μF. It can be seen that it is less than or equal to m. Also, by connecting the capacitive element and the transistor, the current flows through the capacitive element. A circuit is used to control the charge flowing out from an input or capacitive element using the transistor, and the off-power Current measurements were performed. In these measurements, a highly purified oxide semiconductor film was applied to the transistor. Used in the channel formation region, the transition of the charge amount per unit time of the capacitive element is used to determine the transient. The off-current of the transistor was measured. As a result, the voltage between the source and drain terminals of the transistor was measured. It was found that an even lower off-current of several tens of yA / μm can be obtained when the voltage is 3V. Therefore, transistors that use a highly purified oxide semiconductor film in the channel formation region are The off-current is significantly lower compared to transistors using crystalline silicon.

[0141] Unless otherwise specified, in this specification, off-current refers to the off-current of an n-channel transistor. In this state, with the drain terminal at a higher potential than the source terminal and gate electrode, When the potential of the gate electrode is 0 or less with respect to the potential of the source terminal, the source terminal and This refers to the current flowing between the drain terminals. Alternatively, in this specification, off-current means p In channel transistors, the drain terminal is lower than the source terminal and gate terminal. In a state where the potential is such that the potential of the gate electrode is 0 or less when the potential of the source terminal is used as a reference. This refers to the current flowing between the source and drain terminals when the voltage is at its highest.

[0142] For example, oxide semiconductor films include In (indium), Ga (gallium), and Zn ( It can be formed by sputtering using a target containing zinc. When depositing a Zn-based oxide semiconductor film by sputtering, preferably, the atomic ratio is In :Ga:Zn=1:1:1, 4:2:3, 3:1:2, 1:1:2, 2:1:3, or A target of an In-Ga-Zn oxide system, represented by the ratio 3:1:4, is used. To deposit an oxide semiconductor film using an In-Ga-Zn-based oxide target having the following properties. Then, polycrystalline or CAAC (C Axis Aligned Crystal) is formed. It becomes easier to break down. Also, the relative density of targets containing In, Ga, and Zn is 90% or more. It is less than 00%, preferably between 95% and less than 100%. A target with high relative density is used. As a result, the deposited oxide semiconductor film becomes a dense film.

[0143] Furthermore, when using an In-Zn-based oxide material as the oxide semiconductor, the target used The atomic ratio of the metal elements is, in terms of atomic ratio, In:Zn = 50:1 to 1:2 (converted to mole ratio). Then In2O3:ZnO=25:1~1:4), preferably In:Zn=20:1~1 :1 (converted to a molar ratio of In2O3:ZnO = 10:1 to 1:2), more preferably In:Zn = 1.5:1 to 15:1 (converted to a mole ratio of In2O3:ZnO = 3: (4-15:2) For example, it is used in the formation of oxide semiconductor films that are In-Zn based oxides. The target is when the atomic ratio is In:Zn:O=X:Y:Z, and Z>1.5X+Y. By keeping the Zn ratio within the above range, it is possible to improve mobility.

[0144] Furthermore, oxide semiconductor films can be single crystals, polycrystalline (also called polycrystals), or amorphous. Which state will it take?

[0145] Preferably, the oxide semiconductor film is CAAC-OS(C Axis Aligned Cr The film is a ystalline oxide semiconductor film.

[0146] CAAC-OS films are neither perfectly single crystals nor perfectly amorphous. This is an oxide semiconductor film having a crystalline-amorphous multiphase structure with crystalline and amorphous parts in the amorphous phase. Yes, it exists. Furthermore, the crystalline portion must be small enough to fit within a cube with sides less than 100 nm long. There are many. Also, transmission electron microscopes (TEM) In the image observed using a microscope, the amorphous region contained in the CAAC-OS film and The boundary with the crystalline portion is not clear. Also, TEM revealed grain boundaries in the CAAC-OS film. Also called inboundary. ) cannot be confirmed. Therefore, the CAAC-OS film has grain boundaries. The resulting decrease in electron mobility is suppressed.

[0147] The crystalline portion contained in the CAAC-OS film has a c-axis that is the normal vector to the surface on which the CAAC-OS film is formed. Aligned in a direction parallel to the normal vector of the plane or surface, and triangular when viewed from a direction perpendicular to the ab plane. Having a shape or hexagonal atomic arrangement, the metal atoms are layered or when viewed from a direction perpendicular to the c-axis. Metal atoms and oxygen atoms are arranged in layers. Furthermore, between different crystalline regions, the a-axis is... The orientation of the b-axis may be different. In this specification, when simply referred to as vertical, 8 The range of 5° to 95° is also included. Furthermore, when simply describing something as parallel, -5 This will include the range of 5° to 5°.

[0148] Furthermore, in the CAAC-OS film, the distribution of crystalline regions does not need to be uniform. For example, CAA In the formation process of a C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, the shape The proportion of crystalline material may be higher near the surface compared to near the surface of the material. Also, CA By adding impurities to the AC-OS film, the crystalline region in the impurity-added area becomes amorphous. It can also become qualitative.

[0149] The c-axis of the crystalline portion contained in the CAAC-OS film is the normal vector to the surface on which the CAAC-OS film is formed. Because it aligns in a direction parallel to the normal vector of the surface or the material, the shape of the CAAC-OS film (formed Depending on the cross-sectional shape of the surface or face, they may face in different directions. Oh, the direction of the c-axis of the crystalline portion is the normal vector to the surface on which the CAAC-OS film was formed. The direction is parallel to the normal vector of the crystalline or surface. The crystalline portion is formed by deposition, and It is formed by performing crystallization treatments such as heat treatment after film formation.

[0150] Transistors using CAAC-OS film exhibit changes in electrical characteristics due to irradiation with visible light or ultraviolet light. Dynamics can be reduced. Therefore, this transistor is highly reliable.

[0151] CAAC-OS films are used, for example, for polycrystalline oxide semiconductor sputtering targets. The film is deposited using a sputtering method. Ions are directed onto the sputtering target. Upon collision, the crystalline region contained in the sputtering target cleaves from the ab plane, and a -The sputtering particles are exfoliated as flat or pellet-shaped sputtering particles having a surface parallel to the -b surface. In this case, the flat sputtering particles maintain their crystalline state and form a base By reaching the plate, the CAAC-OS film can be deposited.

[0152] Furthermore, it is preferable to apply the following conditions for forming the CAAC-OS film.

[0153] By reducing the inclusion of impurities during film formation, it is possible to suppress the disruption of the crystalline state due to impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, and nitrogen, etc.) present in the deposition chamber. It would be good to reduce it. Also, it would be good to reduce the impurity concentration in the film formation gas. Specifically, the dew point is A film-forming gas with a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0154] Furthermore, by increasing the substrate heating temperature during film deposition, the sputtering particles can be prevented from migrating after reaching the substrate. A reaction occurs. Specifically, the substrate heating temperature is preferably between 100°C and 740°C. The film is deposited at a temperature between 200°C and 500°C. By increasing the substrate heating temperature during film deposition, the flat When plate-shaped sputtering particles reach the substrate, migration occurs on the substrate. The flat surface of the sputtered particles adheres to the substrate.

[0155] Furthermore, by increasing the oxygen content in the deposition gas and optimizing the power, plasma damage during film deposition can be reduced. It is preferable to reduce this. The oxygen content in the film-forming gas is 30% by volume or more, preferably 100% by volume. Let the product be %.

[0156] As an example of a target for sputtering, an In-Ga-Zn-O compound target is used. The following is an example.

[0157] InO X powder, GaO Y Powder and ZnO Z The powder is mixed in a predetermined number of moles and then subjected to pressure treatment. By heat treatment at temperatures between 1000°C and 1500°C, polycrystalline In-Ga -Zn-O compounds are used as the target. X, Y, and Z are arbitrary positive numbers. The given molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z The powder is 2 The ratios are 2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, or 3:1:2. The type of powder and the molar ratio in which they are mixed will be determined by the sputtering target being prepared. You can adjust it as needed depending on the situation.

[0158] This embodiment can be implemented in appropriate combination with other embodiments.

[0159] (Embodiment 5) In this embodiment, an example of a panel, which corresponds to one form of a semiconductor display device, will be described. The panel shown in Figure 12 consists of a substrate 700, a pixel section 701 on the substrate 700, and a signal line driving circuit. 702a, signal line drive circuit 702b, scan line drive circuit 703a, and scan line drive circuit 70 It has 3b.

[0160] The pixel unit 701 has multiple pixels, and each pixel has a display element and a control for the operation of the display element. One or more transistors are provided to drive the scan line. Scan line driving circuit 703a and The scan line driving circuit 703b controls the pixel section 70 by supplying potential to the scan lines connected to each pixel. Select the pixel that 1 has. Signal line drive circuits 702a and 702b drive Image signals to pixels selected by scan line drive circuit 703a and scan line drive circuit 703b Control the supply.

[0161] In Figure 12, the scan line drive circuit 703a and the scan line drive circuit 703b control the pixel section. This illustrates the case where potential is supplied to each scan line from both ends of 701. Therefore, even if the scan line becomes longer due to the enlargement of the pixel section 701, the scanning within the pixel section 701 will still be possible. This prevents potential drops caused by the wiring resistance of the inspection wires.

[0162] Furthermore, the signal line drive circuits 702a and 702b drive the image signals to the pixels. The power is supplied via the signal line. In Figure 12, the signal line drive circuit 702a supplies the odd-numbered power. Image signals are supplied to the pixels via the eye's signal lines, and the signal line drive circuit 702b This illustrates a case where image signals are supplied to pixels via even-numbered signal lines.

[0163] Furthermore, in Figure 12, the scan line drive circuit 703a and the scan line drive circuit 703b are located in the pixel section 701 Together with the above, it is formed on the substrate 700, and the signal line driving circuit 702a and formed on the chip The signal line drive circuit 702b uses TAB (Tape Automated Bonding). The example shows the case where the chip is mounted on substrate 700 using the method. Scan lines formed on the chip The drive circuit 703a and the scan line drive circuit 703b may be mounted on the circuit board 700. Alternatively, the signal line drive circuit 702a and the signal line drive circuit 702b are based together with the pixel unit 701. The chip may be formed on a plate 700. Furthermore, the chip mounting method is not limited to the TAB method. The chip uses FPC (Flexible Printed Circuit), etc. It may be mounted on a 700 substrate. Alternatively, the COF (Chip On Film) method can be used. The chip may be mounted on board 700.

[0164] Since the scan line is connected to multiple pixels, the scan line drive circuit 703a and the scan line drive cycle A large current supply capacity is required for the circuit 703b. Therefore, the scan line drive circuit 703a and The transistor located on the output side of the pulse output circuit of the scan line drive circuit 703b is The size needs to be increased. In particular, if the number of pixels in the pixel section 701 increases, or the pixel section 7 If the area of ​​01 increases, the wiring resistance of the scan lines will increase, or the load connected to the scan lines will increase. This results in an increase in the above transistor, in order to meet the need for a larger current supply capacity. The size of the above transistor will need to be made even larger. Then, in scan line drive circuit 703a and scan line drive circuit 703b, multiple transistors The area of ​​the conductive film that functions as the gate electrode increases, and the above antenna effect occurs. This makes the wiring more susceptible to electrostatic discharge. However, in one aspect of the present invention, multiple gate electrodes are It is electrically connected to the above gate electrode via a conductive film provided in a different layer. Therefore, the area of ​​each conductive film that functions as a gate electrode can be kept small, so the pixel part Even if the number of pixels in 701 increases, or even if the area of ​​the pixel portion 701 increases, the antenna effect will remain the same. This can reduce the likelihood of electrostatic discharge (ESD).

[0165] In this embodiment, the scanning line drive circuit 703a and the scanning line drive circuit 703b are equipped with this generator. Although a description has been given of the case in which a configuration relating to one aspect of the present invention is applied, in one aspect of the present invention, the signal line By applying the configuration according to one aspect of the present invention to the drive circuit 702a and the signal line drive circuit 702b That's good too.

[0166] This embodiment can be implemented in appropriate combination with other embodiments.

[0167] (Embodiment 6) A semiconductor device according to one aspect of the present invention comprises a display device, a personal computer, and a recording medium. Image playback devices (typically DVDs: Digital Versatile Discs) To be used in a device that has a display capable of playing back recording media such as the above and displaying the images thereof. This is possible. In addition, electronic devices that can use a semiconductor device according to one aspect of the present invention And mobile phones, game consoles including portable devices, personal digital assistants, e-books, video cameras, digital cameras Cameras such as still cameras, goggle-type displays (head-mounted displays) Navigation systems, sound playback devices (car audio, digital audio players) (e.g., photocopiers, fax machines, printers, multifunction printers, ATMs) Examples include ATMs and vending machines. Specific examples of these electronic devices are shown in Figure 13. .

[0168] Figure 13(A) shows a portable game console, comprising a casing 5001, casing 5002, display unit 5003, Display unit 5004, microphone 5005, speaker 5006, operation keys 5007, stand It has illustration 5008, etc. A drive circuit for a portable game console, or a display unit 5003 or By using a semiconductor device according to one aspect of the present invention in the display unit 5004, a high yield can be achieved. A band-type game console can be provided. Note that the portable game console shown in Figure 13(A) is... It has two display units 5003 and 5004, but the display of a portable game console The number of copies is not limited to this.

[0169] Figure 13(B) shows a display device, which includes a housing 5201, a display unit 5202, a support base 5203, etc. The drive circuit of the display device, or the display unit 5202, is configured with a semiconductor display according to one aspect of the present invention. By using the device, it is possible to provide display devices with a high yield. This includes all information display applications such as personal computer use, TV broadcast reception, and advertising display. Display devices are included.

[0170] Figure 13(C) shows a notebook personal computer, consisting of a casing 5401 and a display unit 5402. It has a keyboard 5403, a pointing device 5404, etc. Notebook personal A drive circuit for a computer, or a semiconductor display according to one aspect of the present invention in the display unit 5402. By using this device, it is possible to provide notebook personal computers with a high yield. can.

[0171] Figure 13(D) shows a portable information terminal, consisting of a first housing 5601, a second housing 5602, and a first display unit. It includes 5603, a second display unit 5604, a connection unit 5605, an operation key 5606, etc. Table 1 The display unit 5603 is provided in the first housing 5601, and the second display unit 5604 is provided in the second housing 56 It is located at 02. And the first housing 5601 and the second housing 5602 are connected at the connection part 56 They are connected by 05, and the angle between the first housing 5601 and the second housing 5602 is the connection part It is made movable by 5605. The video switching in the first display unit 5603 is connected Switching according to the angle between the first housing 5601 and the second housing 5602 in section 5605 It is also acceptable to have a configuration that allows for this. Also, at least the first display unit 5603 and the second display unit 5604 Alternatively, a semiconductor display device with added functionality as a position input device may be used. Furthermore, the function as a position input device is achieved by providing a touch panel on the semiconductor display device. It can be added. Alternatively, its function as a position input device is also called a photosensor. This can also be added by providing the photoelectric conversion element in the pixel portion of a semiconductor display device. The present invention applies to the drive circuit of the band information terminal, or to the first display unit 5603 or the second display unit 5604. To provide a portable information terminal with a high yield by using a semiconductor device according to one embodiment of the present invention. It is possible.

[0172] Figure 13(E) is a mobile phone, consisting of a housing 5801, a display unit 5802, an audio input unit 5803, It has an audio output unit 5804, an operation key 5805, a light receiving unit 5806, etc. By converting the received light into an electrical signal, external images can be captured. A semiconductor device according to one aspect of the present invention is used in the drive circuit of the band telephone or in the display unit 5802. This allows us to provide mobile phones with a high yield rate.

[0173] This embodiment can be implemented in appropriate combination with other embodiments. [Explanation of Symbols]

[0174] 100 Semiconductor Equipment 101 Transistors 102 transistors 103 Wiring 104 Wiring 105 Wiring 106 Wiring 107 Wiring 110 Conductive film 111 Gate Insulator 112 Semiconductor film 113 Conductive film 114 Conductive film 115 Conductive film 116 Semiconductor film 117 Conductive film 118 Conductive film 119 Conductive film 120 opening 121 Opening 122 Conductive film 123 Semiconductor film 124 Conductive film 125 Conductive film 126 Semiconductor film 127 Conductive film 128 Conductive film 210 Conductive film 211 Gate insulating film 212 Semiconductor film 213 Conductive film 214 Conductive film 215 Conductive film 216 Semiconductor film 217 Conductive film 218 Conductive film 219 Conductive film 220 opening 221 Opening 222 Conductive film 223 Semiconductor film 224 Conductive film 225 Conductive film 226 Semiconductor film 227 Conductive film 228 Conductive film 300 pulse generation circuit 301 Transistors 302 Transistors 303 Transistors 304 transistors 305 Transistors 306 transistors 307 transistors 308 transistors 309 transistors 310 transistors 311 transistors 312 transistors 313 Transistors 314 transistors 315 transistors 316 Capacitive elements 317 Wiring 318 Wiring 319 Wiring 320 Wiring 321 Wiring 322 Wiring 323 Wiring 324 Wiring 325 Wiring 326 Wiring 327 Wiring 328 Wiring 329 Wiring 350 Inverter 351 Inverter 400 pulse generation circuit 402 transistors 403 Transistors 404 transistors 405 Wiring 406 Wiring 407 Wiring 408 Wiring 409 Wiring 410 Wiring 411 Wiring 412 Wiring 413 Wiring 414 Wiring 415 transistors 416 transistors 417 transistors 418 transistors 419 transistors 420 transistors 430 Pulse generation circuit 432 transistors 433 transistors 434 transistors 435 Wiring 436 Wiring 437 Wiring 438 Wiring 439 Wiring 440 Wiring 441 Wiring 442 Wiring 443 Wiring 444 Wiring 445 Wiring 446 transistors 447 transistors 448 transistors 449 transistors 450 transistors 451 transistors 452 transistors 460 pulse generation circuit 462 transistors 463 transistors 464 transistors 465 Wiring 466 Wiring 467 Wiring 468 Wiring 469 Wiring 470 Wiring 471 Wiring 472 Wiring 474 Wiring 475 Wiring 476 transistors 477 transistors 478 transistors 479 transistors 480 transistors 481 transistors 482 transistors 500 pulse generation circuit 502 Transistors 503 Transistors 504 Transistors 505 Wiring 506 Wiring 507 Wiring 508 Wiring 509 Wiring 510 Wiring 511 Wiring 512 Wiring 514 Wiring 515 Wiring 516 transistors 517 Transistors 518 transistors 519 Transistors 520 transistors 521 Transistors 522 transistors 523 Transistors 530 Pulse generation circuit 532 transistors 533 Transistors 534 transistors 535 Wiring 536 Wiring 537 Wiring 538 Wiring 539 Wiring 540 Wiring 541 Wiring 542 Wiring 544 Wiring 545 Wiring 546 transistors 547 transistors 548 transistors 549 transistors 550 transistors 551 transistors 552 transistors 553 Transistors 700 circuit boards 701 pixel section 702a Signal Line Drive Circuit 702b Signal line drive circuit 703a Scan line drive circuit 703b Scan line drive circuit 800 circuit boards 802 Gate Insulator 812 Conductive film 813 Semiconductor film 814 Conductive film 815 Conductive film 816 Conductive film 817 Semiconductor film 818 Conductive film 819 Conductive film 820 Insulating film 821 Insulating film 822 Conductive film 824 Insulating film 825 EL layer 826 Conductive film 830 transistors 831 Transistors 832 Light-emitting element 840 pixels 841 Drive Circuit 850 Conductive film 851 Conductive film 852 Conductive film 853 Conductive film 854 Insulating film 5001 enclosure 5002 enclosure 5003 Display section 5004 Display section 5005 Microphone 5006 Speaker 5007 Operation Keys 5008 Stylus 5201 enclosure 5202 Display section 5203 Support stand 5401 enclosure 5402 Display section 5403 Keyboard 5404 Pointing device 5601 enclosure 5602 enclosure 5603 Display section 5604 Display section 5605 Connection part 5606 Operation Keys 5801 enclosure 5802 Display section 5803 Voice Input Section 5804 Audio output section 5805 Operation Keys 5806 Light receiving section

Claims

[Claim 1] It has at least a first transistor and a second transistor, The gate electrode of the first transistor and the gate electrode of the second transistor are provided in the same layer, spaced apart from each other. The ratio of the channel width to the channel length of the first transistor is greater than the ratio of the channel width to the channel length of the second transistor. A liquid crystal display device in which the gate electrode of the first transistor and the gate electrode of the second transistor are electrically connected via a conductive film provided in a different layer from the gate electrode of the first transistor and the gate electrode of the second transistor.

Images