Semiconductor equipment

Abstract

To provide a semiconductor device having a circuit that experiences minimal degradation. [Solution] A first transistor, a second transistor, a first switch, a second switch It has a switch and a third switch, and the first terminal of the first transistor is connected to the first wiring. The second terminal is connected to the second wiring, and the gate and first of the second transistor The terminal is connected to the first wiring, and the second terminal is connected to the gate of the first transistor. The first switch is connected between the second wiring and the third wiring, and the second The switch is connected between the second wiring and the third wiring, and the third switch is A semiconductor device connected between the gate of transistor 1 and the third wiring.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a method for driving the same. [Background technology]

[0002] In recent years, the development of display devices has been actively pursued, driven by the increase in large-screen displays such as LCD televisions. In particular, transistors made of non-single-crystal semiconductors are used, and the same base as the pixel part is used. The technology of incorporating drive circuits such as gate drivers into a board reduces manufacturing costs and improves reliability. Development is actively underway to make a significant contribution to this.

[0003] However, transistors using non-single-crystal semiconductors degrade. As a result, the mobility decreases. This can cause a decrease in the threshold voltage, or an increase (or decrease) in the threshold voltage. In particular, in gate drivers, A transistor that has the function of supplying a negative voltage (also called an L-level potential) to the signal line. This degradation is particularly noticeable in pull-down transistors (also known as pull-down transistors). This is because the gate signal When no line is selected, the pull-down transistor turns on, This is because a negative voltage is supplied to the gate signal line. In other words, the gate signal line is not selected. Therefore, the pull-down transistor is on for most of the frame duration. ru.

[0004] To solve this problem, Patent Document 1 describes how to suppress the degradation of pull-down transistors. A gate driver capable of doing so is disclosed. Patent Document 1 discloses a pull-down transistor To suppress degradation, a circuit capable of outputting pulses (for example, Figure 7 of Patent Document 1) A holding control unit (350) is provided at each stage of the gate driver. The conduction state of the pull-down transistor is controlled using the output signal of the circuit. This circuit outputs pulses synchronized with a clock signal, etc. Therefore, pull-down transient This reduces the time the transistor is on, thus suppressing the degradation of the pull-down transistor. It can be controlled. However, a circuit capable of outputting the above pulses requires 1 frame. This includes transistor Q32, which is on for most of the duration. TaQ32 is deteriorating. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2005-50502 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] One aspect of the present invention is a semiconductor having first to second transistors and first to third switches. In the device, the degradation of the first to second transistors and the first to third switches is suppressed. or, in a semiconductor device having first to fifth transistors, the first to fifth To suppress transistor degradation. Or, a semiconductor device having a sixth transistor. In this, the degradation of the first to sixth transistors is suppressed. Or, further, the seventh transistor In a semiconductor device having a zista, the degradation of the first to seventh transistors is suppressed. [Means for solving the problem]

[0007] One aspect of the present invention is a first transistor, a second transistor, a first switch, a second having a switch and a third switch, a first terminal of the first transistor being connected to a first wiring and a second terminal being connected to a second wiring, a gate and a first terminal of the second transistor being connected to the first wiring, a second terminal being connected to a gate of the first transistor, the first switch being connected between the second wiring and a third wiring, the second switch being connected between the second wiring and the third wiring, and the third switch being connected between a gate of the first transistor and the third wiring, which is a semiconductor device.

[0008] In the above aspect, having a first period and a second period, in the first period, the first switch, the second switch and the third switch are turned off, a potential of the first wiring becomes H level, and in the second period, the first switch is turned off, the second switch and the third switch are turned on, and the potential of the first wiring may become L level.

[0009] One aspect of the present invention has a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, a first terminal of the first transistor being connected to a first wiring, a second terminal being connected to a second wiring, a gate and a first terminal of the second transistor being connected to the first wiring, a second terminal being connected to a gate of the first transistor, a gate of the third transistor being connected to a fourth wiring, a first terminal being connected to a third wiring, a second terminal being connected to the second wiring, a gate of the fourth transistor being connected to a fifth wiring, a first terminal being connected to the third wiring, a second terminal being connected to the second wiring, a gate of the fifth transistor being connected to the fifth wiring, and a first terminal being connected to the third The semiconductor device is connected, with the second terminal being connected to the gate of the first transistor.

[0010] In the above embodiment, the channel width of the fifth transistor is the channel width of the second transistor. Larger than the channel width of the first transistor, the channel width of the second transistor is greater than the channel width of the first transistor. It can be large as well.

[0011] In the above embodiment, there is a sixth transistor, and the gate of the sixth transistor is a second The wire is connected, the first terminal is connected to the third wire, and the second terminal is connected to the sixth wire. It's fine if you do that.

[0012] In the above embodiment, there are periods A and B, and in period A, the potential of the first wiring is H. The bell rings, the potential of the fifth wire and the potential of the fourth wire become L level, and the first transient The second and sixth transistors turn on, and the third transistor, The fourth and fifth transistors turn off, and the potential of the sixth wiring becomes low. During period B, the potential of the first wiring becomes L level, and the potential of the fifth wiring becomes H level. The bell becomes, the potential of the fourth wire becomes L level, and the first transistor, the second transistor The third and sixth transistors turn off, and the fourth transistor and The fifth transistor may also be turned on, and the potential of the sixth wiring may become low.

[0013] In the above embodiment, there is a seventh transistor, and the gate of the seventh transistor is the fourth The wire is connected, the first terminal is connected to the first wire, and the second terminal is connected to the sixth wire. That's fine.

[0014] In the above embodiment, there are periods A, B, C, D and E, and in period A The potential of the first wiring becomes H level, and the potentials of the fifth wiring and the fourth wiring become L level. This turns on the first transistor, the second transistor, and the sixth transistor. The third transistor, the fourth transistor, the fifth transistor and the seventh transistor The starter is turned off, the potential of the sixth wiring becomes L level, and during period B, the first wiring The potential becomes L level, the potential of the 5th wire becomes H level, and the potential of the 4th wire becomes L level It becomes a first transistor, a second transistor, a third transistor and a sixth transistor The transistor turns off, and the fourth and fifth transistors turn on, The potential of wiring 6 becomes L level, and during period C, the potential of wiring 1 becomes L level. The potential of the fifth wire and the potential of the fourth wire become high, and the first transistor and the second The transistors of and 6 are turned off, and the third transistor and the fourth transistor turn off. The fifth and seventh transistors turn on, and the potential of the sixth wire is reduced. The voltage of the first wiring becomes L level, and during period D, the potential of the fifth wiring becomes H level. The potential becomes L level, the potential of the fourth wire becomes H level, and the first transistor, the second The transistors turn on, the third transistor and the seventh transistor, and the fourth transistor The fifth and sixth transistors turn off, and the potential of the sixth wiring is reduced. The voltage becomes H level, and during period E, the potential of the first wiring becomes L level, and the voltage of the fifth wiring The potential becomes H level, the potential of the fourth wire becomes L level, and the first transistor, the second The transistors are O, the third transistor, the sixth transistor and the seventh transistor. The fourth and fifth transistors turn on, and the potential of the sixth wiring is reached. It's okay if it reaches L level.

[0015] In each of the above embodiments of the present invention, various types of switches can be used. It can be done. An electrical switch or a mechanical switch can be used as the switch. In other words, a switch can be anything that can control the current, and is not limited to any particular type. As an electrical switch, a transistor (for example, a bipolar transistor, a MOS transistor) can be used. (e.g., transistors), diodes (e.g., PN diodes, PIN diodes, Schottky diodes) - Diode, MIM (Metal Insulator Metal) diode, M IS (Metal Insulator Semiconductor) diode, Examples include transistors with oxide connections, or logic circuits combining these. Examples of switches include digital micromirror devices (DMDs) and MEMS ( There are switches that use micro-electro-mechanical system technology. The switch has mechanically movable electrodes, and as these electrodes move, conductivity is established. It operates by controlling the state of non-conductivity.

[0016] Furthermore, when a transistor is used as a switch, that transistor is not simply a switch. Because it operates in this manner, the polarity (conductivity type) of the transistor is not particularly limited. However, when off-voltage... To reduce current, it is desirable to use a transistor with the polarity that produces less off-current. Transistors with low off-current are transistors with an LDD region, or multi-gate transistors. Examples include transistors that have a specific structure.

[0017] Furthermore, in each of the above embodiments of the present invention, a transistor is used as a switch, and the transistor The ZIST operates when the source potential is close to the potential of the low-potential power supply (Vss, GND, 0V, etc.). In that case, it is desirable to use an N-channel transistor as a switch. Conversely, The transistor operates when the source potential is close to the potential of the high-potential power supply (Vdd, etc.). In such cases, it is desirable to use a P-channel transistor as a switch. In an N-channel transistor, when the source operates at a potential close to that of the low-potential power supply, In P-channel transistors, when the source operates at a potential close to that of the high-voltage power supply, This is because the absolute value of the voltage between the gate and the source can be increased. Therefore, a switch This is because it allows for more precise operation. Alternatively, the transistor is the source Because it rarely performs follower operation, the output voltage becomes smaller. Because there are few of them.

[0018] Furthermore, in each of the above embodiments of the present invention, the switch is an N-channel transistor and P A CMOS type switch may be used in conjunction with a channel transistor. When using an OS-type switch, the P-channel transistor and the N-channel transistor If either one of them conducts electricity, current will flow, making it easier to function as a switch. Therefore, whether the input signal voltage to the switch is high or low, it will output the appropriate voltage. This can be done. Alternatively, the voltage amplitude value of the signal to turn the switch on or off can be reduced. This allows for reduced power consumption.

[0019] When using a transistor as a switch, the switch is connected to the input terminal (source or (One side of the drain), an output terminal (the other side of the source or drain), and a terminal that controls conductivity. (Gate) may be present. On the other hand, when a diode is used as a switch, A transistor may not have terminals to control conductivity. Therefore, it may not have terminals to control conductivity. Using diodes as switches reduces the amount of wiring needed to control the terminals. It is possible.

[0020] In the inventions disclosed herein, transistors of various structures are used as transistors. It can be used. In other words, there are no restrictions on the configuration of the transistors used.

[0021] In this specification, semiconductor device refers to semiconductor element (transistor, diode, silicon). This refers to a device that has a circuit including (such as a t). However, by utilizing the semiconductor properties, it can function The term "semiconductor device" may refer to any device capable of doing so, or to any device containing semiconductor materials. In this document, a display device refers to a device that has a display element.

[0022] In this specification, "driving device" refers to a device having semiconductor elements, electrical circuits, and electronic circuits. This refers to, for example, a transistor (selective) that controls the input of a signal from the source signal line to the pixel. (Sometimes called a transistor for use, a switching transistor, etc.), and a voltage is applied to the pixel electrode. or transistors that supply current, transistors that supply voltage or current to light-emitting elements, etc. This is an example of a drive device. Furthermore, a circuit that supplies a signal to the gate signal line (gate drive) (Sometimes called gate line drive circuits, etc.), a circuit that supplies a signal to the source signal line (saw Examples of drive devices include (sometimes called screwdrivers, source line drive circuits, etc.).

[0023] Also, display devices, semiconductor devices, lighting devices, cooling devices, light-emitting devices, reflecting devices, and drive devices It is possible to combine these devices with each other, and such devices are also included in the embodiments of the present invention. For example, a display device may have a semiconductor device and a light-emitting device. Alternatively, a semiconductor The device may include a display device and a drive device.

[0024] Furthermore, in each aspect of the present invention, all the circuits necessary to realize a predetermined function are the same On a single substrate (for example, a glass substrate, a plastic substrate, a single crystal substrate, or an SOI substrate, etc.) It is possible to form it. In this way, cost reduction is achieved by reducing the number of parts, or the circuit part Reliability can be improved by reducing the number of connection points to the product.

[0025] Furthermore, it is possible to avoid forming all the circuits necessary to achieve a given function on the same circuit board. It is possible. In other words, some of the circuits necessary to realize a predetermined function are formed on a certain substrate. Furthermore, another part of the circuit necessary to achieve the predetermined function is formed on a separate substrate. It is possible to do so. For example, a part of the circuit necessary to realize a certain function is made of glass. Another part of the circuitry formed on the substrate and necessary to realize a predetermined function is a single crystal substrate. It can be formed on (or SOI substrate). And to realize a predetermined function A single crystal substrate (also called an IC chip) on which another part of the necessary circuitry is formed is called COG ( The IC is connected to a glass substrate via a Chip-On-Glass (Chip On Glass) and the IC is placed on the glass substrate. It is possible to place the chip. Alternatively, the IC chip can be placed using TAB (Tape Auto). omated Bonding), COF(Chip On Film), SMT(Su Using glass (rface Mount Technology), or printed circuit boards, etc. It can be connected to a circuit board.

[0026] In this specification, when it is explicitly stated that X and Y are connected, then X and Y are When they are electrically connected, when X and Y are functionally connected, and when X and Y are This includes cases where they are directly connected. Here, X and Y are objects (e.g., devices). (This refers to elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.). Therefore, the predetermined contact The following relationships, for example, are not limited to the relationships shown in diagrams or text, but are also shown in diagrams or text. This includes relationships other than those described above.

[0027] One example of a case where X and Y are electrically connected is the ability to make an electrical connection between X and Y possible. Elements such as switches, transistors, capacitive elements, inductors, resistive elements, and dies. It is possible for one or more ORDs (etc.) to be connected between X and Y.

[0028] One example of a functional connection between X and Y is enabling a functional connection between X and Y. Circuits that perform this function (for example, logic circuits (inverters, NAND gates, NOR gates, etc.), signal conversion) Circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits) Circuits (boost circuits, buck circuits, etc.), level shifter circuits that change the potential level of a signal, etc., voltage source , current source, switching circuit, amplification circuit (a circuit that can increase the signal amplitude or current amount, etc., operator Amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc., signal generation circuits, memory circuits One or more circuits (such as roads and control circuits) can be connected between X and Y. (Example) Even if another circuit is placed between X and Y, the signal output from X is transmitted to Y. In this case, X and Y are assumed to be functionally connected.

[0029] In this specification, where explicitly stated as singular, it is singular. This is preferable. However, even in this case, it is possible to have multiple items. Similarly, explicitly multiple items For items listed as numbers, it is preferable that there be multiples. However, in this case... However, it can also be singular.

[0030] In the figures of this application, the size, layer thickness, or area may be exaggerated for clarity. There is a compatibility. Therefore, it is not necessarily limited to that scale. The diagram schematically shows an ideal example. This is an illustration and is not limited to the shapes or values ​​shown in the figure. For example, the shape due to manufacturing technology Variation, shape variations due to errors, and variations in signals, voltages, or currents due to noise. This includes variations in signals, voltages, or currents due to timing discrepancies. It is possible.

[0031] Note that technical terms are often used to describe specific embodiments or examples. However, one aspect of the present invention is not to be interpreted as being limited by technical terms.

[0032] Note that undefined terms (including scientific and technical terms such as specialized or academic terms) are usually It can be used in the same sense as the general meaning understood by those skilled in the art. More defined wording should be interpreted in a way that is consistent with the background of the related technology. preferable.

[0033] Furthermore, terms such as "1st," "2nd," and "3rd" refer to various elements, components, areas, layers, zones, etc. These terms are used to distinguish and describe elements. Therefore, terms such as "first," "second," and "third" refer to elements and components. This does not limit the order or number of regions, layers, areas, etc. Furthermore, for example, "1 It is possible to replace "no" with "dai-ni no" (second no) or "dai-san no" (third no), etc.

[0034] Also, "upwards," "upwards," "downwards," "sideways," "to the right," "to the left," Spatial arrangement such as "diagonally," "towards the back," "towards the front," "inside," "outside," or "inside." The phrases used to indicate this briefly illustrate the relationship between one element or feature and another element or feature using diagrams. It is used to indicate the spatial arrangement of these things. However, its use is not limited to this, and is also used to indicate the spatial arrangement of these things. The terminology may include directions other than those depicted in the diagram. For example, "Y on top of X," and so on. When shown empirically, Y is not limited to being above X. The configuration in the diagram is inverted, or Since it's possible to rotate it 180°, it's possible to include situations where Y is below X. Thus, the phrase "upwards" includes not only the direction "upwards" but also the direction "downwards". This is possible. However, it is not limited to this, and the device in the figure can rotate in various directions. Since this is possible, the phrase "upwards" can mean "upwards" and "downwards," as well as "sideways." "To the right", "To the left", "Diagonally", "Further back", "Towards the front", "Inward", "Outward", also It can also include other directions such as "inside". In other words, it should be interpreted appropriately depending on the context. It is possible.

[0035] Furthermore, if Y is formed on top of X, or if Y is formed on top of X, explicitly state this. When describing it, it is not limited to the case that Y is formed in direct contact with X. This also includes cases where there is no intervening object between X and Y. Here, X and Y are the object (for example, a device, element, circuit, wiring, electrode, terminal, conductive film, layer, (etc.)

[0036] Therefore, for example, if we explicitly state that layer Y is formed on (or on layer X), If present, this could mean that layer Y is formed directly on top of layer X, or that layer Y is directly on top of layer X. Another layer (e.g., layer Z) is formed in contact with it, and layer Y is formed directly on top of it. This includes cases where this is the case. Furthermore, another layer (e.g., layer Z) may be a single layer or multiple layers. Layers are also acceptable.

[0037] Furthermore, the same applies when it is explicitly stated that Y is formed above X. This is not limited to the case where Y is directly in contact with X, but also includes cases where another object is interposed between X and Y. This includes cases where it exists. Therefore, for example, if layer Y is formed above layer X, In this case, there are two situations: when layer Y is formed in direct contact with layer X, and when layer Y is formed in direct contact with layer X. In a situation where another layer (e.g., layer Z) is formed, and layer Y is formed directly in contact with it... This includes the combination. Note that another layer (e.g., layer Z) may be a single layer or a multi-layered layer. stomach.

[0038] Furthermore, Y is formed on top of X, Y is formed on top of X, or Y is formed above X. When explicitly stating that something has been achieved, this includes cases where Y is formed diagonally above X. do.

[0039] The same applies to descriptions such as "Y below X" or "Y below X."

[0040] One aspect of the present invention is a first transistor, a second transistor, a first switch, a second It has a switch and a third switch. The first terminal of the first transistor is the first distribution The second terminal of the first transistor is connected to the second wire. The first terminal of the transistor is connected to the first wiring, and the second terminal of the second transistor is The gate of the first transistor is connected to the first wiring, and the gate of the second transistor is connected to the first wiring. The first switch is connected between the second and third wiring. The switch is connected between the second and third wiring. The third switch is connected to the first It is connected between the gate of the transistor and the third wiring.

[0041] Furthermore, one aspect of the present invention may have a first period and a second period. During the period, the first to third switches can be turned off. The potential of the line can reach the H level. During the second period, the first switch is off This allows the second and third switches to be turned on. And the first wiring It is possible for the electric potential to reach the L level. [Effects of the Invention]

[0042] One aspect of the present invention relates to a semiconductor device having first-second transistors and first-third switches. In this configuration, shorten the time that the first-to-second transistor and the first-to-third switches are on. Alternatively, the number of times it is turned on can be reduced, thus suppressing deterioration. Or, the 1st to the In a semiconductor device having 5 transistors, the first to fifth transistors turn on. By shortening the time or reducing the number of times it is turned on, degradation can be suppressed. Furthermore, in a semiconductor device having a sixth transistor, the first to sixth transistors are By shortening the time the device is on or reducing the number of times it is turned on, degradation can be suppressed. Or, in a semiconductor device having a seventh transistor, the first to seventh transistors By shortening the time the inverter is on or reducing the number of times it is turned on, degradation can be suppressed. It is possible. [Brief explanation of the drawing]

[0043] [Figure 1] A circuit diagram of a semiconductor device in Embodiment 1, its logic circuit, its logic expression, and its truth table. [Figure 2] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 1. [Figure 3] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 1. [Figure 4] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 1. [Figure 5] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 6] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 7] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 8] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 9] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 10] Circuit diagram of the semiconductor device in Embodiment 2. [Figure 11] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 12] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 13] A circuit diagram of a semiconductor device in Embodiment 1, its logic circuit, its logic expression, and its truth table. [Figure 14] A circuit diagram of the semiconductor device in Embodiment 2 and a schematic diagram illustrating its operation. [Figure 15] A timing chart illustrating the operation of the semiconductor device in Embodiment 2. [Figure 16] A circuit diagram of the semiconductor device in Embodiment 2 and a schematic diagram illustrating its operation. [Figure 17] A circuit diagram of the semiconductor device in Embodiment 2 and a timing chart for explaining its operation. [Figure 18] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 2. [Figure 19] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 2. [Figure 20] A circuit diagram of the semiconductor device in Embodiment 2 and a schematic diagram illustrating its operation. [Figure 21] A circuit diagram of the semiconductor device in Embodiment 2 and a timing chart for explaining its operation. [Figure 22] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 2. [Figure 23] A circuit diagram of the semiconductor device in Embodiment 2 and a schematic diagram illustrating its operation. [Figure 24] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 2. [Figure 25] A circuit diagram of the semiconductor device in Embodiment 2 and a timing chart for explaining its operation. [Figure 26] A schematic diagram illustrating the operation of the semiconductor device in Embodiment 2. [Figure 27] Circuit diagram of the semiconductor device in Embodiment 2. [Figure 28] Circuit diagram of the semiconductor device in Embodiment 2. [Figure 29]Circuit diagram of the semiconductor device in Embodiment 2. [Figure 30] Circuit diagram of the semiconductor device in Embodiment 2. [Figure 31] A circuit diagram of the semiconductor device in Embodiment 2 and a timing chart for explaining its operation. [Figure 32] A circuit diagram of the semiconductor device in Embodiment 2 and a timing chart for explaining its operation. [Figure 33] A block diagram of the display device and a circuit diagram of the pixels in Embodiment 3. [Figure 34] Circuit diagram of the shift register in Embodiment 3. [Figure 35] A timing chart illustrating the operation of the shift register in Embodiment 3. [Figure 36] A circuit diagram of the signal line drive circuit in Embodiment 4, a timing chart to explain its operation, and a block diagram of the display device. [Figure 37] Circuit diagram of the protection circuit in Embodiment 5. [Figure 38] Circuit diagram of the protection circuit in Embodiment 5. [Figure 39] Cross-sectional view of the semiconductor device in Embodiment 6. [Figure 40] A top view and a cross-sectional view of the display device in Embodiment 7. [Figure 41] A diagram illustrating the transistor fabrication process in Embodiment 8. [Figure 42] Layout diagram of the semiconductor device in Embodiment 9. [Figure 43] A diagram illustrating the electronic device in Embodiment 10. [Figure 44] A diagram illustrating the electronic device in Embodiment 10. [Figure 45] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 46] Circuit diagram of the semiconductor device in Embodiment 1. [Figure 47] Circuit diagram of the semiconductor device in Embodiment 2. [Modes for carrying out the invention]

[0044] The embodiments will be described below with reference to the drawings. However, the embodiments may differ in many ways. It is possible to implement it in any manner, and without deviating from its purpose and scope, its form and Those skilled in the art will readily understand that the details can be changed in various ways. The interpretation is not limited to the content described below. Parts or parts having similar functions are indicated by common reference numerals across different drawings, and the same part or Detailed explanations of parts with similar functions will be omitted.

[0045] (Embodiment 1) The configuration of this embodiment will be described with reference to Figure 45(A). Figure 45(A) shows the The circuit diagram of the semiconductor device of the embodiment is shown.

[0046] Circuit 100 includes transistor 101 (first transistor) and switch 102S (first Switch 103S (second switch), transistor 104 (second transistor) It has a zista, and a switch 105S (third switch).

[0047] Transistors 101 and 104 are N-channel type. In a transistor of this type, the potential difference (Vgs) between the gate and source is equal to the threshold voltage (Vth). It turns on when it exceeds the limit. However, it is not limited to this, and transistors 101 and 101 The 104 can be a P-channel type. A P-channel transistor is a gate It turns on when the potential difference (Vgs) between the source and the output falls below the threshold voltage (Vth). .

[0048] The first terminal of transistor 101 is connected to wiring 112 (first wiring), and the transistor The second terminal of terminal 101 is connected to wiring 111 (second wiring). Switch 102S is It is connected between wiring 111 and wiring 115 (third wiring). Switch 103S is It is connected between wire 111 and wiring 115. The first terminal of transistor 104 is connected to wiring 1 The second terminal of transistor 104 is connected to 12 and is in contact with the gate of transistor 101. Next, the gate of transistor 104 is connected to wiring 112. Switch 105S is It is connected between wiring 115 and the gate of transistor 101.

[0049] Switches 102S, 103S, and 105S have control terminals. It is possible to do so. Figure 45(B) shows the control terminal of switch 102S connected to wiring 114 (the The control terminal of switch 103S is connected to wiring 4 (fifth wiring), and the control terminal is connected to wiring 113 (fifth wiring). The configuration shown is when the control terminal of switch 105S is connected to wiring 113.

[0050] Note that switches 102S, 103S, and 105S are transitions It is possible to use a transistor. Figure 1(A) shows a transistor being used as a switch. Switch 102S, Switch 103S, and Switch 105S are, respectively, transistors Transistor 102 (third transistor), transistor 103 (fourth transistor), transistor An example of the case where transistor 105 (the fifth transistor) is used is shown. Transistor 102 The first terminal of transistor 102 is connected to wiring 115, and the second terminal of transistor 102 is connected to wiring 11 The gate of transistor 102 is connected to wire 114. The first terminal of transistor 103 is connected to wiring 115, and the second terminal of transistor 103 is connected to wiring The gate of transistor 103 is connected to wire 111 and wire 113. The first terminal of transistor 105 is connected to wiring 115, and the second terminal of transistor 105 It is connected to the gate of transistor 101, and the gate of transistor 105 is connected to wiring 11 It connects to 3.

[0051] Note that transistors 102, 103, and 105 are transistors It is the same N-channel type as transistor 101. However, transistors 102 and 103 The transistor 105 may also be a P-channel type.

[0052] Furthermore, the connection point between the gate of transistor 101 and the second terminal of transistor 104, The node is the connection point between the gate of transistor 101 and the second terminal of transistor 105. It is shown as 11.

[0053] Next, an example of an input or output signal or voltage to wiring 111 to 115, and these This explains the function of the wiring.

[0054] A signal OUT is output from wiring 111.

[0055] Signal IN1 is input to wiring 112. Signal IN2 is input to wiring 113. Signal IN3 is input to wiring 114.

[0056] Voltage V1 is supplied to wiring 115. Voltage V1 is the power supply voltage, reference voltage, and ground voltage. This is voltage, ground, or negative power supply voltage. However, it is not limited to these, and wiring 115 may also have a signal A clock signal or an inverted clock signal may be input (for example).

[0057] When referring to an L-level signal, L signal, L-level potential, or voltage V1, these The potential is approximately V1. A high-level signal, a high signal, a high-level potential, or a voltage V2. When written as such, these potentials are approximately V2 (V2 > V1). This is due to errors caused by noise, errors caused by process variations, and variations in the manufacturing process of the elements. This includes various errors such as errors and / or measurement errors (the same applies hereinafter).

[0058] For example, if the gate of a transistor is connected to a node, and the potential of that node is at an L level... In this case, the transistor turns off (or on). When the voltage level becomes L, the potential of that node turns the transistor off (or on). This refers to a value that can be reached. Alternatively, the potential of the node in question becoming L level means that The potential of the node is such that the circuit including the transistor can perform a predetermined operation. To the extent that the voltage (Vgs) between the gate and source of the transistor is reduced (or increased) This refers to a value that can be obtained by ( ).

[0059] Furthermore, if clock signals are used as signals IN1 to IN3, then the clock signal It is possible for it to be in equilibrium, and it is also possible for it to be in non-equilibrium (also called disequilibrium). Equilibrium is defined as the period in a cycle where the period at the H level and the period at the L level are roughly equal. This refers to a situation where the period of time when the temperature is at the H level differs from the period when it is at the L level. say.

[0060] For example, a clock signal is used as signal IN1, and a positional signal is used as signal IN2 from signal IN1. Signals with phases shifted by approximately 180° are used, and signals IN1 and IN2 are unbalanced. In this case, signal IN2 may not be the inverted signal of signal IN1.

[0061] Here, as shown in Figure 5(A), the wiring 112 to 115 receives signals from circuit 150. Voltage is supplied. Circuit 150 generates signals or voltages, etc., and wiring 112 to wiring 11 A signal or voltage is supplied to 5.

[0062] Circuit 150 can have circuits 151 to 154. Circuit 151 is a signal Alternatively, it has the function of generating voltage and supplying a signal or voltage to wiring 112. Circuit 152 is Circuit 153 has the function of generating a signal or voltage and supplying a signal or voltage to wiring 113. It has the function of generating a signal or voltage and supplying a signal or voltage to wiring 114. Circuit 1 54 has the function of generating a signal or voltage and supplying a signal or voltage to the wiring 115.

[0063] Circuits 150-154 are the amplifier circuit in Figure 5(B) and the bipolar transistor in Figure 5(C), respectively. SATA, MOS transistor in Figure 5(D), capacitive element in Figure 5(E), inverter in Figure 5(F) T, the DC voltage source in Figure 5(G), the AC voltage source in Figure 5(H), and / or the DC in Figure 5(I) Includes current sources, etc.

[0064] As shown in Figure 5(A), the protection circuit 160 is connected to wiring 112-114.

[0065] Next, the functions of circuit 100 and transistors 101-105 will be described.

[0066] Circuit 100 has the function of controlling the potential of wiring 111. Alternatively, circuit 100 has the function of controlling wiring 1 The potential of 12, the potential of wiring 113, the potential of wiring 114, or the potential of wiring 115 to wiring 111 It has a function to control the timing of supply to it. Alternatively, circuit 100 has wiring 111, It has a function to control the timing of supplying signals or voltages. Alternatively, circuit 100 has a function to control the timing of supplying signals or voltages. It has a function to control the timing of supplying an H signal or voltage V2 to line 111. Circuit 100 controls the timing of supplying an L signal or voltage V1 to wiring 111. It has the ability to control the timing of raising the potential of the wiring 111. It has the function of reducing the potential of the wiring 111. Alternatively, circuit 100 controls the timing of reducing the potential of the wiring 111. It has a function to control. Alternatively, circuit 100 maintains the timing of the potential of wiring 111. It has a control function. As described above, circuit 100 has the function of a control circuit. Note that circuit 100 does not need to have all of the above functions. Note that circuit 100 is a signal Controlled according to IN1 to IN3.

[0067] Furthermore, as shown in Figure 1(B), circuit 100 has the function of a logic circuit including AND. Specifically, circuit 100 is a combination of a 3-input AND gate and two NOT gates. It functions as a logic circuit. And, the signal IN1 is input to the first input terminal of the AND gate. And at the second input terminal of the AND gate, the signal IN2 is inverted by the first NOT gate. The signal IN3 is inverted by the second NOT gate at the third input terminal of the AND gate. A signal is input, and the signal OUT is output from the AND output. In other words, circuit 100 A function that realizes the logical formula shown in Figure 1(C), or a function that realizes the truth table shown in Figure 1(D). To have the ability.

[0068] Transistor 101 has the function of controlling the conductivity state between wiring 112 and wiring 111. Alternatively, transistor 101 may supply the potential of wiring 112 to wiring 111 at a specific time. It has a control function. Or, when a signal or voltage is input to wiring 112, the transistor The timing of supplying the signal or voltage input to wiring 112 to wiring 111 is determined by the timing of the signal or voltage input to wiring 112 to wiring 111. It has a control function. Alternatively, transistor 101 sends an H signal or voltage to wiring 111. It has a function to control the timing of supplying V2. Alternatively, transistor 101 distributes It has a function to control the timing of supplying an L signal or voltage V1 to line 111. Transistor 101 has the function of controlling the timing of raising the potential of wiring 111. Alternatively, transistor 101 controls the timing of reducing the potential of wiring 111. It has the function of performing bootstrap operation. Alternatively, transistor 101 has the function of performing bootstrap operation. It has. Alternatively, transistor 101 controls the potential of node 11 by bootstrap operation. It has the function of increasing the voltage. As described above, transistor 101 is a switch or a battery. It functions as a buffer. Furthermore, transistor 101 possesses all of the above functions. There is no need to do so.

[0069] Transistor 102 has the function of controlling the conductivity state between wiring 115 and wiring 111. Alternatively, transistor 102 provides the potential of wiring 115 to wiring 111 at the appropriate time. It has a control function. Or, when a signal or voltage is input to wiring 115, the transistor The timing of supplying the signal or voltage input to wiring 115 to wiring 111 is determined by the 102. It has a control function. Alternatively, transistor 102 sends an L signal or voltage to wiring 111. It has a function to control the timing of supplying V1. Alternatively, transistor 102 has a function to distribute It has a function to control the timing of reducing the potential of line 111. The transistor 102 functions as a switch. It is not necessary to have all the functions. Furthermore, transistor 102 is at the potential of wiring 114 (signal It can be controlled by (IN3).

[0070] Transistor 103 has the function of controlling the conductivity state between wiring 115 and wiring 111. Alternatively, transistor 103 provides the potential of wiring 115 to wiring 111 at the appropriate time. It has a control function. Or, if a signal or voltage is input to wiring 115, The inverter 103 supplies the signal or voltage input to the wiring 115 to the wiring 111 at the appropriate time. It has a function to control the ng. Alternatively, transistor 103 sends an L signal to wiring 111 or It has the function of controlling the timing of supplying voltage V1. Or, transistor 103 It has the function of controlling the timing of reducing the potential of wiring 111. As described above, Transistor 103 functions as a switch. It is not necessary to have all of the above functions. Note that transistor 103 is connected to the power supply of wiring 113. It can be controlled by position (signal IN2).

[0071] Transistor 104 has the function of controlling the conductivity state between wiring 112 and node 11. Alternatively, transistor 104 may supply the potential of wiring 112 to node 11 at a specific time. It has a control function. Or, when a signal or voltage is input to wiring 112, the transistor The timing of supplying the signal or voltage input to the wiring 112 to the node 11 is determined by the 104. It has a control function. Alternatively, transistor 104 sends an H signal or voltage to node 11. It has a function to control the timing of supplying V2. Alternatively, transistor 104 has a function to control the timing of supplying V2. It has a function to control the timing of raising the potential of 11. Or, a transistor 104 has the function of putting node 11 into a floating state. As described above, transistor 10 4 has functions as a switch, diode, or diode-connected transistor, etc. Transistor 104 does not need to have all of the above functions. The transistor 104 controls the potential of wiring 112 (signal IN1) and / or the potential of node 11. It can be controlled by [this method].

[0072] Transistor 105 has the function of controlling the conductivity state between wiring 115 and node 11. Alternatively, transistor 105 may supply the potential of wiring 115 to node 11 at a specific time. It has a control function. Or, when a signal or voltage is input to wiring 115, the transistor The timing of supplying the signal or voltage input to the wiring 115 to node 11 is determined by the 105. It has a control function. Alternatively, transistor 105 sends an L signal or voltage to node 11. It has a function to control the timing of supplying V1. Alternatively, transistor 105 is It has a function to control the timing of reducing the potential of the transistor 11. The transistor 105 functions as a switch. It is not necessary to have all the functions. Note that transistor 105 is at the potential of wiring 113 (signal It can be controlled by (IN2).

[0073] Next, regarding the operation of circuit 100, refer to the truth table (also called the operation table) in Figure 1(D). Let me explain. Figure 1(D) shows the truth table when signals IN1 to IN3 are digital signals. This is shown. Therefore, there are 8 possible combinations of high and low levels for signals IN1 to IN3. Yes, it is. In other words, circuit 100 is capable of performing at least 8 different operation patterns. Here, we will explain each of the eight patterns of operation.

[0074] Note that circuit 100 does not need to perform all eight of these operation patterns; it can select some of them. This can be done. Furthermore, circuit 100 can perform operations other than these eight patterns of operation. It is possible to do so. For example, when signals IN1 to IN3 have three or more values, If signals IN1 to IN3 are analog signals, circuit 100 can be any of these eight patterns. It is also possible to perform many more actions.

[0075] First, let's explain operation 1 of circuit 100 with reference to Figure 2(A). Signal IN2 is H Since it becomes a bell, transistor 105 turns on. Then, wiring 115 and node 11 and Since it becomes conductive, the potential of wiring 115 (e.g., voltage V1) is supplied to node 11. At this time, signal IN1 becomes high level, so transistor 104 turns on. As a result, wiring 112 and node 11 become conductive, and the potential of wiring 112 (for example, H level) The signal IN1) is supplied to node 11. In other words, node 11 receives the power from wiring 115. A voltage (e.g., voltage V1) and the potential of wiring 112 (e.g., a high-level signal IN1) are supplied. Here, the channel width of transistor 105 is greater than the channel width of transistor 104. Assume that it is also large. Therefore, the potential of node 11 becomes L level. Node 11 at this time The potential is greater than V1, and V1 + Vth101 (Vth101 is transistor 101) This value is smaller than the threshold voltage. As a result, transistor 101 turns off, Wiring 112 and wiring 111 become non-conductive.

[0076] Then, since signal IN2 becomes high level, transistor 103 turns on. Since signal IN3 becomes high level, transistor 102 turns on. Then, wiring 1 Since 15 and wiring 111 are in a conductive state, the potential of wiring 115 (for example, voltage V1) is the same as the wiring It is supplied to 111. Therefore, the potential of wiring 111 becomes V1, and the signal OUT is at the low level. It becomes a ru.

[0077] Note that "the channel width of transistor A is greater than the channel width of transistor B" is incorrect. The 1 / W (W being the channel width) of transistor A is smaller than the 1 / W of transistor B. "The channel length (L) of transistor A is smaller than the channel length (L) of transistor B." "Transistor A's 1 / L is greater than transistor B's 1 / L," The W / L of transistor A is greater than the W / L of transistor B, and the Vgs(Vg) of transistor A is greater than the W / L of transistor B. "s (where s is the potential difference between the gate and source) is greater than Vgs of transistor B," and so on. It is possible to rephrase this. The transistor has a multi-gate structure, and the transistor When there are multiple gates, "the number of gates of transistor A is equal to the number of gates of transistor B." "Less than the number of gates," or "The reciprocal of the number of gates of transistor A is the number of transistors." This can be rephrased as "greater than the reciprocal of the number of gates in B."

[0078] Next, operation 2 of circuit 100 will be explained with reference to Figure 2(B). Operation 2 is the same as operation 1. In comparison, the difference is that signal IN3 becomes L level. Since it becomes a loop, transistor 102 turns off. However, transistor 102 is turned off. However, transistor 103 turns on, just like in operation 1. That is, wiring 115 and Wiring 111 becomes conductive, just like in operation 1, so the power of wiring 115 is connected to wiring 111. A voltage (e.g., V1) is supplied. Therefore, the potential of wiring 111 becomes V1, and the signal OUT will be at L level.

[0079] Next, operation 3 of circuit 100 will be explained with reference to Figure 2(C). Signal IN2 is L Since it becomes a bell, transistor 105 turns off. Then, wiring 115 and node 11 and It becomes non-conductive. At this time, signal IN1 becomes high level, so transistor 104 It turns on. Then, wiring 112 and node 11 become conductive, so wiring 112 The potential (for example, a high-level signal IN1) is supplied to node 11. In other words, node 11 The potential of wiring 112 (for example, a high-level signal IN1) is supplied. Then, node 1 The potential at node 1 begins to rise. Eventually, the potential at node 11 becomes V1 + Vth101 + Va(Va When the value is positive, transistor 101 turns on. Then, wires 112 and 11 Since it becomes conductive with 1, the potential of wiring 112 (for example, a high-level signal IN1) is, It is supplied to 111. After that, the potential of node 11 continues to rise. Eventually, node 11 When the potential becomes V2-Vth104 (where Vth104 is the threshold voltage of transistor 104) Transistor 104 turns off. Then, wiring 112 and node 11 become non-conductive. Therefore, node 11 remains in a floating state while maintaining its potential at V2-Vth104. It will become.

[0080] Then, since signal IN2 becomes low, transistor 103 turns off. Since signal IN3 becomes high level, transistor 102 turns on. Then, wiring 1 Since 15 and wiring 111 are in a conductive state, the potential of wiring 115 (for example, voltage V1) is the same as the wiring It is supplied to 111. In other words, wiring 111 has the potential (e.g., voltage V1) of wiring 115 and The potential of wiring 112 (for example, a high-level signal IN1) is supplied. Here, the transistor Assume that the channel width of transistor 102 is greater than the channel width of transistor 101. Therefore The potential of wiring 111 becomes L level. At this time, the potential of wiring 111 is the voltage V1 and A value lower than the sum of the threshold voltages of any one of transistors 101 to 105. Let's assume this happens. Thus, the potential of wiring 111 becomes L level, and therefore signal OUT becomes L level. It becomes a ru.

[0081] Next, operation 4 of circuit 100 will be explained with reference to Figure 3(A). Operation 4 is the same as operation 3. In comparison, the difference is that signal IN3 becomes L level. As this occurs, transistor 102 turns off. At this time, transistor 103 also turns off. Therefore, wiring 115 and wiring 111 are in a non-conductive state. In other words, wiring 111 The potential of wiring 112 (for example, a high-level signal IN1) is supplied to it. Therefore, wiring 1 The potential at node 11 begins to rise. At this point, node 11 is in a floating state. Then, Due to the parasitic capacitance between the gate and the second terminal of the transistor 101, the potential at node 11 is It rises. As a result, the potential at node 11 becomes V2 + Vth101 + Va. This is a bootstrap operation. Thus, the potential of wiring 111 becomes V2, so the signal O UT will be at the H level.

[0082] Next, operation 5 of circuit 100 will be explained with reference to Figure 3(B). Signal IN2 is H Since it becomes a bell, transistor 105 turns on. Then, wiring 115 and node 11 and Since it becomes conductive, the potential of wiring 115 (e.g., voltage V1) is supplied to node 11. At this time, signal IN1 becomes low, so transistor 104 turns off. Then, wiring 112 and node 11 become non-conductive. In other words, node 11 has wiring 11 A potential of 5 (for example, voltage V1) is supplied. Therefore, the potential at node 11 becomes V1. As a result, transistor 101 turns off, and wires 112 and 111 become non-conductive. Yes.

[0083] Then, since signal IN2 becomes high level, transistor 103 turns on. Since signal IN3 becomes high level, transistor 102 turns on. Then, wiring 1 Since 15 and wiring 111 are in a conductive state, the potential of wiring 115 (for example, voltage V1) is the same as the wiring It is supplied to 111. Therefore, the potential of wiring 111 becomes V1, and the signal OUT is at the low level. It becomes a ru.

[0084] Next, operation 6 of circuit 100 will be explained with reference to Figure 3(C). Operation 6 is the same as operation 5. In comparison, the difference is that signal IN3 becomes L level. Since it becomes a loop, transistor 102 turns off. However, transistor 102 is turned off. However, transistor 103 turns on, just like in operation 5. That is, wiring 115 and Wiring 111 becomes conductive, similar to operation 5, so the potential of wiring 115 is present at wiring 111. (For example, voltage V1) is supplied. Therefore, the potential of wiring 111 becomes V1, so the signal O UT will be at the L level.

[0085] Next, the operation 7 of circuit 100 will be explained with reference to Figure 4(A). Signal IN2 is L Since it becomes a bell, transistor 105 turns off. Then, wiring 115 and node 11 and It becomes non-conductive. At this time, signal IN1 becomes low, so transistor 104 It turns off. Then, wiring 112 and node 11 become non-conductive. In other words, node Node 11 enters a floating state and maintains the potential from its previous state. Here, node 11 The potential is lower than V1 + Vth101. Therefore, transistor 101 is off. Therefore, wiring 112 and wiring 111 become non-conductive.

[0086] Then, since signal IN2 becomes low level, transistor 103 turns off. The signal IN3 becomes high level, so transistor 102 turns on. Then, the wiring... Since 115 and wiring 111 are in a conductive state, the potential of wiring 115 (for example, voltage V1) is It is supplied to line 111. Therefore, the potential of wiring 111 becomes V1, so signal OUT is L It becomes a bell.

[0087] Next, operation 8 of circuit 100 will be explained with reference to Figure 4(B). Operation 8 is the same as operation 7. In comparison, the difference is that signal IN3 becomes L level. As this occurs, transistor 102 turns off. At this time, transistor 103 also turns off. Therefore, wiring 115 and wiring 111 are in a non-conductive state. In other words, wiring 111 This results in an indeterminate state Z (a floating state, a floating state, or a high-impedance state). Therefore, if there are no potential fluctuations due to noise, the potential of wiring 111 will return to its previous state. The value is maintained. Therefore, for example, the operation immediately preceding operation 8 is operations 1-3 and operation 5. Assume it is one of the following: ~7. In this case, the signal OUT will be at a low level. Or, for example... Now, let's assume that the operation immediately preceding operation 8 is operation 4. In this case, the signal OUT will be at a high level. Yes.

[0088] As described above, transistors 101 to 105 are used in any of operations 1 to 8. Therefore, shorten the time the transistor is on, or the transistor turns on This reduces the number of times this occurs, thus suppressing transistor degradation. As a result, the characteristics of the transistor deteriorate (for example, an increase in threshold voltage or a decrease in mobility). It can be suppressed.

[0089] Alternatively, the degradation of the transistor can be suppressed, or the transistors in circuit 100 Since it is possible to make all transistor polarities N-channel type, the semiconductor layer of the transistor For example, materials that degrade more easily than single-crystal semiconductors (for example, amorphous semiconductors or microcrystalline semiconductors) It becomes possible to use non-single-crystal semiconductors such as conductors, organic semiconductors, or oxide semiconductors. Therefore, reducing the number of processes, increasing the yield, and / or manufacturing Cost reduction is possible. Or, for example, the semiconductor device of this embodiment can be displayed It is assumed that it will be used in a device. In this case, the display device can be made larger.

[0090] Alternatively, to account for transistor degradation, the channel width of the transistor can be increased. This eliminates the need to adjust the transistor's Vgs. Alternatively, the bootstrap operation can be used to adjust the transistor's Vgs. This allows for a larger value, thus enabling a smaller channel width for the transistor. Alternatively, the amplitude of the output signal can be set to the same value as the power supply voltage or the same value as the signal amplitude. Therefore, the amplitude of the output signal can be increased. Thus, the output signal controls The channel width of the transistor can be reduced. In other words, the channel width of the transistor can be reduced. This allows for a reduction in channel width, thereby reducing the area of ​​the transistor channel. It is possible.

[0091] Alternatively, the area of ​​the transistor channel can be reduced, thus reducing the layout area. This can be made smaller. As a result, for example, the semiconductor device of this embodiment can be used in a display device. It is assumed that this will be used. In this case, the resolution of the display device can be increased. Or, display The frame of the device can be made smaller.

[0092] Alternatively, the channel area of ​​the transistor can be reduced, so as a gate The area in which the functional material and the semiconductor layer overlap via the insulating layer can be reduced. As a result, the material that functions as a gate and the semiconductor layer are less likely to short-circuit. This can be eliminated. Therefore, it reduces variations in the output signal and prevents malfunctions. such as increasing the yield can be achieved.

[0093] Or, all the transistors can be of N-channel type, or all the transistors can be of P-channel type. Therefore, compared with a CMOS circuit, the number of process steps can be reduced, the yield can be improved, the reliability can be improved, or the manufacturing cost can be reduced. In particular , by making all the transistors of N-channel type, the semiconductor layer of the transistor and as such, a non-single crystal semiconductor such as an amorphous semiconductor or a microcrystalline semiconductor, an organic semiconductor, or an oxide semiconductor can be used. However, the transistors using these semiconductor layers are liable to deteriorate. However, the semiconductor device of the present embodiment can suppress the deterioration of the transistors .

[0094] Next, in addition to Operations 1 to 8, operations that the circuit 100 can perform will be described.

[0095] First, in Operations 1 and 2, by making the channel width of the transistor 104 larger than the channel width of the transistor 1 05, the transistor 101 can be turned on. Then, since the wiring 112 and the wiring 111 are in a conductive state, the potential of the wiring 112 (for example, the signal IN1 of H level) is supplied to the wiring 111. That is, to the wiring 111 are supplied the potential of the wiring 115 (for example, the voltage V1) and the potential of the wiring 112 (for example, the signal I N1 of H level). In this case, by making the current supply ability of the transistor 101 small and making the potential of the wiring 111 a value slightly higher than V1, the signal OUT can be set to L level. For this purpose, the channel width of the transistor 101 is the same as that of the transistor 101, the channel width of the transistor 101 is the same as that of the transistor and the channel width of the transistor 101 is the same as that of the transistor It is preferable that the channel width is smaller than that of the zista 102 or the channel width of the transistor 103. Alternatively, it is preferable that the Vgs of transistor 101 is smaller than V2-V1. More preferably, it is preferable that it is smaller than (V2-V1)×1 / 2. For example, By controlling the Vgs of the inverter 101, an analog voltage is output from the wiring 111. It is possible to do so. In other words, circuit 100 can be an analog buffer or an amplifier circuit, etc. It is possible to have the function of the transistor 101. The channel width of transistor 102 is greater than the sum of the channel widths of transistor 103. This makes it possible to set the signal OUT to a high level.

[0096] Next, signal IN1 changes from high level to low level, and signal IN2 changes from low level to high level. This will cause a switch from operation 4 to operation 6. In this case, see Figure 4(C). Thus, in operation 6, by turning on transistor 101 for a while, the wiring It is possible to supply a potential of 112 (for example, an L-level signal IN1) to wiring 111. By doing this, the falling edge time of the signal OUT can be shortened. To achieve this, the timing of when signal IN1 becomes low is earlier than the timing of when transistor 101 becomes low. It is possible to delay the timing of the switch off. Alternatively, when signal IN1 is at a low level... It is possible to delay the timing at which signal IN2 becomes high level compared to the timing at which the signal becomes high. Alternatively, it is possible to make the distortion of signal IN2 greater than the distortion of signal IN1. Yes. Or, the channel width of transistor 105 is greater than the channel width of transistor 103. The width can be reduced. Alternatively, one electrode of the capacitive element can be connected to node 11. It is possible to do so. The other electrode of the capacitive element is connected to a power line or signal line (for example, wiring 1). It can be connected to 15 or wiring 111, etc. The capacitive element is a transistor Parasitic transistors (e.g., transistor 101, transistor 104, or transistor 105) It is possible that it is a capacity. Alternatively, the wiring 113 is formed on the same board as circuit 100. A signal can be supplied from the circuit.

[0097] Next, in operations 7 and 8, the potential of node 11 is V1 + Vth101 + Va. It is possible to do so. In this case, transistor 101 will turn on, so the wiring 112 and The wire 111 becomes conductive. Then the potential of the wiring 112 (for example, an L-level signal IN1) ) is supplied to wiring 111. In this way, especially in operation 8, the power of wiring 111 Since the position can be fixed, the circuit can be made more resistant to malfunctions.

[0098] As described above, the semiconductor device of this embodiment performs various operations in addition to operations 1 to 8. It is possible.

[0099] Next, we will explain the channel width ratio of transistors 101 to 105.

[0100] First, the load that transistors 104-105 drive (for example, the gate of transistor 101) ) is the load driven by transistors 101-103 (for example, the load connected to wiring 111). It is smaller than (for example, the gate of a transistor). Therefore, the size of transistor 104 The channel width is the channel width of transistor 101, the channel width of transistor 102, and / Or, it can be smaller than the channel width of transistor 103. Or, the channel width of transistor 105 can be smaller than the channel width of transistor 101, the channel width of transistor 102, and / or the channel width of transistor 103. In such a case, the channel width of transistor 101 is preferably 20 times or less the channel width of transistor 104. More preferably, it is preferably 10 times or less. Even more preferably, it is preferably 7 times or less. The channel width of transistor 101 is preferably 10 times or less the channel width of transistor 105. More preferably, it is preferably 5 times or less. Even more preferably, it

[0101] is preferably 3 times or less. Next, when the signal OUT becomes the L level, the potential (for example, voltage V1) of the wiring 115 may be supplied to the wiring 111 through <000|| two transistors, transistor 102 and transistor 103. On the other hand, when the signal OUT becomes the H level, the potential of the wiring 112 (for example, the H-level signal IN1) may be supplied to the wiring 111 through one transistor, transistor 101. Therefore, the channel width of transistor 101 can be larger than the channel width of transistor 102 <|| and / or the channel width of transistor 103. In such a case, the channel width of transistor 101 is preferably three times or less the channel width of transistor 102 or the channel width of transistor 103. More

[0102] preferably, it is preferably two times or less. <|| Next, assume that the signal IN1 becomes the H level and transistor At this time, assume that transistor 102 or transistor 103 turns on. In this case, wiring To bring the potential of 111 to an L level, the channel width of transistor 102 is... It is possible to have a channel width greater than that of transistor 101. Alternatively, the channel width of transistor 103 The channel width can be greater than the channel width of transistor 101. In that case, the channel width of transistor 101 is the channel width of transistor 102 or the channel width of transistor 101. Preferably, it is 1 or less the channel width of the inverter 103. More preferably, 0.7 It is preferable that it be less than or equal to twice the original amount.

[0103] Let's assume that signal IN1 becomes high level and transistor 101 is turned on. In this case, transistor 103 turns on, but transistor 102 turns on less often. Therefore, the channel width of transistor 103 is greater than the channel width of transistor 102. It is also possible to make it small.

[0104] Next, in operations 1 and 2, transistors 104 and 105 are turned on. By doing so, node 11 receives the potential (e.g., voltage V1) of wiring 115 and the potential of wiring 112. A signal (for example, an H-level signal IN1) is supplied. Therefore, as already mentioned, To bring the potential of node 11 to an L level, the channel width of transistor 105 is set to the transistor It is possible to have a channel width larger than that of the ZISTA 104. In such cases, the transistor The channel width of transistor 105 should preferably be 15 times or less the channel width of transistor 104. It is preferable that it is 10 times or less. Even more preferable that it is 8 times or less. It is preferable that the channel length of transistor 104 is lower. For example, the channel length of transistor 104 is lower. By making the channel length greater than 5, the W / L ratio of transistor 105 is increased. It is possible to make the W / L ratio greater than that of ZISTA 104. In such cases, the transient The channel length of transistor 104 should preferably be no more than nine times the channel length of transistor 105. It is preferable that it is 6 times or less. More preferably, it is 3 times or less. It is preferable to do so.

[0105] As described above, it is preferable to set the ratio of the transistor channel width to an appropriate value. Considering the size ratio of the transistors mentioned above, the channel width of transistor 101 is Preferably, the thickness is 100 μm or more and 1000 μm or less. More preferably, 100 μm It is preferable that the thickness is m or more and 300 μm or less, or 500 μm or more and 800 μm or less. The channel width of transistor 102 or transistor 103 is 100 μm or larger. Preferably, the thickness is 1500 μm or less. More preferably, it is 100 μm or more, up to 300 μm. It is preferable that the thickness is less than or equal to m, or 700 μm or more and 1200 μm or less. Transistor 10 The channel width of 4 is preferably 10 μm or more and 300 μm or less. More preferably The diameter is preferably 20 μm or more and 100 μm or less. The width is preferably 30 μm or more and 500 μm or less. More preferably 50 μm It is preferable that the thickness is between m and 150 μm.

[0106] Next, we will describe a semiconductor device with a different configuration from that shown in Figure 1(A).

[0107] First, in the configuration shown in Figure 1(A), the first terminal of transistor 105 is connected to wiring 11 It is possible to connect to a different wire (for example, wire 112) than 5. Alternatively, The gate of inverter 105 is connected to a different wire (for example, wire 111, wire 116 or It can be connected to nodes such as node 11.

[0108] Furthermore, voltage V2 can be supplied to wiring 116. Therefore, wiring 116 It can also function as a power line. For example, a signal is input to wiring 116. It is possible for this to be done. Therefore, wiring 116 can function as a signal line. It is Noh.

[0109] Figure 6(A) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 105 is The configuration shown is connected to wiring 112. A high signal is supplied to the first terminal of transistor 105. This makes it possible to apply a reverse bias to transistor 105. Therefore, the degradation of transistor 105 can be suppressed.

[0110] Figure 6(B) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 105 is The configuration is such that the gate of transistor 105 is connected to node 11, and the wiring 112 is connected to node 11. This demonstrates that it becomes possible to supply an H signal to the first terminal of transistor 105. Therefore, a reverse bias can be applied to transistor 105, It can suppress deterioration.

[0111] Figure 6(C) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 105 is The gate of transistor 105 is connected to wiring 112 and is connected to wiring 116. This shows that the H-level signal IN1 is passed through transistors 104 and 105. This makes it possible to supply power to the 11. Therefore, the channel width of transistor 104 can be reduced. It can be done.

[0112] Next, in the configuration described in Figure 1(A) and Figures 6(A)-(C), transistor 103 The first terminal can be connected to a different wire (for example, wire 112) from wire 115. Alternatively, the gate of transistor 103 may be connected to a different wire (for example, a different wire) from wire 113. It can be connected to (111, wiring 116, or node 11, etc.).

[0113] Figure 6(D) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 103 is The configuration shown is connected to wiring 112. A high signal is supplied to the first terminal of transistor 103. This makes it possible to apply a reverse bias to transistor 103. Therefore, the degradation of transistor 103 can be suppressed.

[0114] Figure 6(E) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 103 is The gate of transistor 103 is connected to wiring 111, and wiring 112 is connected to wiring 111. This shows that a reverse bias can be applied to transistor 103, so This can suppress the deterioration of Zista 103.

[0115] Figure 6(F) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 103 is The gate of transistor 103 is connected to wiring 116, and wiring 112 is connected to it. This shows that the H-level signal IN1 is passed through transistors 103 and 101. This makes it possible to supply power to wiring 111. Therefore, the channel width of transistor 101 can be reduced. It can be cut.

[0116] Next, in the configuration described in Figure 1(A) and Figures 6(A) to (F), transistor 104 The first terminal is connected to a different wire (for example, wire 116) from wire 112. It is possible. Alternatively, the gate of transistor 104 may be connected to a different wire than wire 112 (for example). It can be connected to wiring 116, etc.

[0117] Figure 7(A) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 104 is This shows the configuration connected to wiring 116.

[0118] Figure 7(B) shows the gate of transistor 104 in the semiconductor device shown in Figure 1(A) and is wired. The configuration connected to 116 is shown. The potential of the wiring 112 is via transistor 104 (for example This makes it possible to supply an L-level signal (IN1). Therefore, the potential of node 11 can be fixed. Since this can be controlled, it is possible to obtain semiconductor devices that are resistant to noise.

[0119] Next, in the configuration described in Figures 1(A), 6(A)-(F), and 7(A)-(B) The first terminal of transistor 102 is connected to a different wire (for example, wire 113) from wire 115. It can be connected to line 114 or node 11, etc. Alternatively, transistor 1 The first terminal of 03 and / or the first terminal of transistor 105 are separate from the wiring 115. It can be connected to the wiring (for example, wiring 113, wiring 114, or node 11, etc.) be.

[0120] Figure 7(C) shows that in the semiconductor device of Figure 1(A), the first terminal of transistor 102 is The configuration shows the connection to wiring 113. A high signal is supplied to the first terminal of transistor 102. This makes it possible to apply a reverse bias to transistor 102. Therefore, the degradation of transistor 102 can be suppressed.

[0121] Figure 7(D) shows the first terminal of transistor 103 in the semiconductor device shown in Figure 1(A). The first terminal of transistor 105 is shown to be connected to wiring 114. A high signal is supplied to the first terminal of the sta 103 or the first terminal of the transistor 105. This becomes possible. Therefore, a reverse bias is applied to transistor 103 or transistor 105. This allows for the suppression of the degradation of transistor 103 or transistor 105. It is possible.

[0122] Next, in the configuration described in Figures 1(A), 6(A)-(F), and 7(A)-(D) Each terminal or electrode of a transistor can be connected to a separate wire. For example For example, the first terminal of transistor 101 and the first terminal of transistor 104 are separate. It is possible to connect the wiring. Alternatively, the gate of transistor 103 and the transistor The gate of ST105 can be connected to a separate wiring. Alternatively, the transition The first terminal of transistor 102, the first terminal of transistor 103, and transistor 105 The first terminal can be connected to separate wiring. To achieve this, It is possible to divide a wire into multiple wires.

[0123] Figure 7(E) shows that in the semiconductor device of Figure 1(A), wiring 112 is wiring 112A~11 It is divided into multiple wires called 2B, and wire 113 is divided into multiple wires 113A~113B The wiring is divided, and wiring 115 is further divided into multiple wirings, namely wiring 115A to 115C. The configuration is shown. The first terminal of transistor 101 is connected to wiring 112A, The first terminal of transistor 104 is connected to wiring 112B, and the gateway of transistor 104 The gate of transistor 103 is connected to wiring 112B. Alternatively, the gate of transistor 103 is connected to wiring 113. Connected to A, the gate of transistor 105 is connected to wiring 113B. Alternatively, The first terminal of transistor 102 is connected to wiring 115A, and the first terminal of transistor 103 The terminal of is connected to wiring 115B, and the first terminal of transistor 105 is connected to wiring 115C It is connected to this.

[0124] Furthermore, wiring 112A to 112B can have the same function as wiring 112. Alternatively, wiring 113A to 113B can have the same function as wiring 113. Alternatively, wiring 115A~115C can have the same function as wiring 115. Therefore, signal IN1 can be input to wiring 112A~112B. Alternatively, signal IN2 can be input to wiring 113A~113B. Therefore, voltage V1 can be supplied to wiring 115A~115C. For example, Lines 112A and 112B can be supplied with separate voltages or separate signals. Alternatively, it is possible to supply different voltages or different signals to wiring 113A~113B. Yes. Alternatively, separate voltages or separate signals can be supplied to wiring 115A~115C. This is possible.

[0125] Next, in the configuration described in Figures 1(A), 6(A)-(F), and 7(A)-(E) It is possible to newly provide transistor 105A and / or transistor 103A. That is the case.

[0126] Figure 8(A) shows a configuration in which transistor 105A is newly added to the semiconductor device shown in Figure 1(A). As shown, transistor 105A can correspond to transistor 105, and similarly. It is possible to have the following functions. The first terminal of transistor 105A is connected to wiring 112 and The second terminal of transistor 105A is connected to node 11, and the transistor The gate of 105A is connected to wiring 113. For example, as in Figures 6(B) to (C), The gate of transistor 105A can be connected to node 11 or wiring 116. Yes. For example, similar to Figures 6(B) to (C), the gate of transistor 105A is connected to wiring 1. It is connected to a different wire (for example, node 11, wire 116, or wire 111) than 13. This is possible.

[0127] Figure 8(B) shows a configuration in which transistor 103A is newly added to the semiconductor device shown in Figure 1(A). This shows that transistor 103A can correspond to transistor 103, and the same It is possible to have the following functions. The first terminal of transistor 103A is connected to wiring 112 The second terminal of transistor 103A is connected to the wiring 111, and the transistor The gate of TA103A is connected to wiring 113. For example, as in Figures 6(E) to (F). The gate of transistor 103A is connected to a different wire (for example, wire 111, wire 113) from wire 113. It is possible to connect to Node 116 or Node 11, etc.

[0128] Next, see Figures 1(A), 6(A)-(F), 7(A)-(E), and 8(A)-(B). In the configuration described below, it is possible to add a transistor 106.

[0129] Figure 8(C) shows a configuration in which transistor 106 is newly added to the semiconductor device shown in Figure 1(A). Transistor 106 is an N-channel type. However, this embodiment is not limited to this. It is not specified, and transistor 106 can be a P-channel type. The first terminal of transistor 106 is connected to wiring 115, and the second terminal of transistor 106 is connected to The gate of transistor 106 is connected to wire 114, which is connected to wire 111.

[0130] The function of transistor 106 will be described. Transistor 106 is connected to wiring 115 and It has a function to control the conductivity state with wire 11. Alternatively, transistor 106 controls the conductivity state with wiring 11. It has a function to control the timing of supplying potential 5 to node 11. Or, wiring 11 If a signal or voltage is input to 5, transistor 106 is input to wiring 115. It has a function to control the timing of supplying a signal or voltage to node 11. The transistor 106 controls the timing of supplying the L signal or voltage V1 to node 11. It has the function of reducing the potential of node 11. Alternatively, transistor 106 reduces the potential of node 11 at the appropriate time. It has the function of controlling the switching. As described above, transistor 106 acts as a switch. It is possible to have the above functions. Furthermore, transistor 106 possesses all of the above functions. There is no need to do so. Furthermore, transistor 106 is affected by the potential of wiring 114 (signal IN3). It can be controlled.

[0131] The operation of the semiconductor device shown in Figure 8(C) will be explained. Operation 1, Operation 3, Operation 5, and Operation 7 In this case, since signal IN3 becomes high level, transistor 106 turns on. Since wiring 115 and node 11 are in a conductive state, the potential of wiring 115 (for example, voltage V1) This is supplied to node 11. In this way, the potential of node 11 can be fixed. This allows for the creation of a semiconductor device that is resistant to noise. Alternatively, the potential of node 11 can be lowered. This makes it easier for transistor 101 to turn off. Alternatively, The channel width of the ST105 can be reduced, thus reducing the layout area. This is possible. On the other hand, in operations 2, 4, 6, and 8, signal IN3 is L Since it becomes a bell, transistor 106 turns off. In this way, transistor 106 turns off This shortens the time it takes to become a 'n' state, thus suppressing the degradation of transistor 106. can.

[0132] Next, see Figures 1(A), 6(A)-(F), 7(A)-(E), and 8(A)-(C). In the configuration described below, transistor 103 and / or transistor 105 are omitted. It is possible to do so.

[0133] Figure 8(D) shows a configuration in which transistor 103 is omitted in the semiconductor device shown in Figure 1(A). This indicates that the function is complete. Even if transistor 103 is omitted, for example, if transistor 101 is The timing of the switch from ON to OFF is the timing when signal IN1 changes from H level to L level. By delaying the signal, the potential of wiring 112 (for example, the L-level signal IN1) It becomes possible to supply power to wiring 111. Therefore, the potential of wiring 111 can be set to V1. Yes, it is possible. By omitting transistor 103 in this way, the number of transistors can be reduced. It can be done.

[0134] Furthermore, the timing at which transistor 101 switches from on to off is determined by signal IN1 being high. To delay the timing of the transition from bell to L level, the channel of transistor 105 The channel width can be smaller than the channel width of transistor 101. Alternatively, The channel area (e.g., L × W) of transistor 101 is determined by the transistors in circuit 100. The largest possible outcome is possible within that category.

[0135] Figure 8(E) shows a configuration in which transistor 105 is omitted in the semiconductor device shown in Figure 1(A). This demonstrates the ability to reduce the number of transistors by omitting transistor 105. It is possible.

[0136] Next, see Figures 1(A), 6(A)-(F), 7(A)-(E), and 8(A)-(E). In the configuration described below, a capacitive element 1 is placed between the gate and the second terminal of transistor 101. It is possible to connect 07. For example, a MOS capacitor can be used as the capacitive element. It is possible.

[0137] Figure 8(F) shows the semiconductor device of Figure 1(A), with the gate and second This shows a configuration in which a capacitive element 107 is connected between the terminals. During bootstrap operation, The potential of transistor 11 is more likely to rise. Therefore, increase the Vgs of transistor 101. This allows for a reduction in the channel width of transistor 101. Alternatively, the falling or rising time of the signal OUT can be shortened.

[0138] Furthermore, the material of one electrode of the capacitive element 107 is the same material as that of the gate of the transistor. Preferably, the material of the other electrode of the capacitive element 107 is the source of the transistor. Alternatively, it is preferable that it be made of the same material as the drain. In this way, the layout area is reduced. It is possible to do so. Alternatively, the capacity value can be increased.

[0139] Furthermore, the area where one electrode and the other electrode of the capacitive element 107 overlap is the area of ​​the transistor 101 In this case, the area of ​​overlap between the material used as the gate and the semiconductor layer is preferably smaller. It seems so.

[0140] Next, see Figures 1(A), 6(A)-(F), 7(A)-(E), and 8(A)-(F). In the configuration described above, it is possible to add a new circuit 120 to circuit 100.

[0141] Figure 9(A) shows the configuration when a new circuit 120 is added to the semiconductor device shown in Figure 1(A). The circuit 120 consists of wiring 113 and the gate of transistor 103 and transistor 1 It is connected between the connection point with gate 05 and the other point. Circuit 120 is input to wiring 113. It has the function of delaying the signal IN2. Therefore, for example, the gate of transistor 105 The timing of the potential increase is when the signal IN2 changes from a low level to a high level. It will also be slower. In other words, the timing of when transistor 105 turns on, or the timing of node 11 The timing of the decrease in potential is earlier than the timing of when signal IN2 changes from low to high level. This is also delayed. Therefore, for example, the timing of when transistor 101 switches from on to off The timing of the transition can be delayed compared to the timing when signal IN1 changes from a high level to a low level. This results in an L-level signal IN1 being supplied to wiring 111, so The fall time of the OUT signal can be shortened. For example, as shown in Figure 9(B), The gate of transistor 103 is connected to wiring 113 without going through circuit 120, and the transistor The gate of station 105 can be connected to wiring 113 via circuit 120. This is because the sooner transistor 103 turns on, the sooner it can supply voltage V1 to the wiring 111. This makes it possible to supply power. Therefore, the falling edge time of the signal OUT can be shortened. Therefore. As another example, the gate of transistor 105 is wired through circuit 120 1 It is possible to connect to 11. In this case, the gate of transistor 103 is It can be connected to the gate of ZISTA 105 and can be connected to wiring 113. It is possible.

[0142] The circuit 120 only needs to have at least a capacitive component and a resistive component. For example, circuit 120 includes resistors, capacitors, transistors, diodes, and these It is possible to use a combination of these elements, or various other elements. Figure 9 ( Figures C) to (D) show a configuration in which circuit 120 has a resistive element 121 and a capacitive element 122. As another example, circuit 120 includes a buffer circuit, an inverter circuit, a NAND circuit, and an NAND gate. OR gates, level shifter gates, circuits combining these gates, or various other gates It is possible to use a path. Figure 9(E) shows that circuit 120 has a buffer circuit 123. The following configuration is shown. Figure 9(F) shows a configuration in which circuit 120 has an inverter circuit 124. .

[0143] Furthermore, the capacitive component can be parasitic capacitance, and the resistive component can be parasitic resistance. This is possible. In other words, as circuit 120, wiring, the connection between the material of one layer and the material of another layer. It is possible to use tacts or FPC pads, etc. Therefore, for example, wiring 1 The resistance of wiring 13 is preferably greater than the resistance of wiring 112. Therefore, the minimum wiring width of wiring 113 is smaller than the minimum wiring width of wiring 112. Preferably, wiring 113 has the highest resistance among conductive materials compared to wiring 112. It is possible to include a large amount of material (for example, material containing the pixel electrode material). For example, suppose a certain material is used for both wiring 113 and wiring 112. In this case, The minimum film thickness of the material in wiring 113 is the same as the minimum film thickness of the material in wiring 112. It is possible to make it even thinner.

[0144] Furthermore, the buffer circuit 123 can be configured as shown in Figure 9(G). The buffer circuit consists of transistors 125, 126, 127, and It has a transistor 128. The first terminal of transistor 125 is connected to wiring 129. The second terminal of transistor 125 is connected to the gate of transistor 103, The gate of transistor 125 is connected to wiring 113. The first terminal of transistor 126 It is connected to wiring 130, and the second terminal of transistor 126 is connected to transistor 103. It is connected to the gate. The first terminal of transistor 127 is connected to wire 129, and the transistor The second terminal of transistor 127 is connected to the gate of transistor 126, The gate of transistor 127 is connected to wiring 129. The first terminal of transistor 128 is connected to wiring Connected to 130, the second terminal of transistor 128 is connected to the gate of transistor 126. The gate of transistor 128 is connected to wire 113. Note that wire 129 In many cases, high voltages such as voltage V2 are supplied to this, and wiring 130 is supplied with voltages such as voltage V1. A negative voltage is supplied.

[0145] Furthermore, the inverter circuit 124 can be configured as shown in Figure 9(H). The inverter circuit consists of transistor 131, transistor 132, transistor 133, and has transistor 134. The first terminal of transistor 131 is connected to wiring 129. The second terminal of transistor 131 is connected to the gate of transistor 103. The first terminal of transistor 132 is connected to the wiring 130, and the second terminal of transistor 132 Terminal 2 is connected to the gate of transistor 103, and the gate of transistor 132 is connected to the gate of transistor 132. It is connected to wiring 113. The first terminal of transistor 133 is connected to wiring 129. The second terminal of transistor 133 is connected to the gate of transistor 131, and the transistor The gate of transistor 133 is connected to wiring 129. The first terminal of transistor 134 is The second terminal of transistor 134 is connected to the wire 130, and the gateway of transistor 131 is connected to the gateway of transistor 131. The gate of transistor 134 is connected to wire 113.

[0146] Next, Figures 1(A), 6(A)-(F), 7(A)-(E), 8(A)-(F), In the configuration described in Figures 9(A) and 9(B), replace the transistor with a diode. It is possible to do so. For example, it is possible to connect transistors in a diode configuration.

[0147] Figure 11(A) shows the semiconductor device in Figure 1(A) where the transistor is placed on the diode. The interchangeable configuration is shown. Transistor 101 has one electrode (e.g., input terminal) at the node Diode 1 is connected to 11, and the other electrode (e.g., output terminal) is connected to wiring 111. It can be replaced with 01d. Alternatively, transistor 102 can be one electrode (For example, an input terminal) is connected to wiring 111, and the other electrode (for example, an output terminal) is connected to wiring 11 It can be replaced with diode 102d connected to 4. Alternatively, The zista 103 has one electrode (for example, the input terminal) connected to the wiring 111, and the other electrode ( For example, the output terminal can be replaced with a diode 103d connected to wiring 113. It is possible. Alternatively, the transistor 104 can be connected to the wiring 11, where one electrode (e.g., the input terminal) is connected to the other electrode 11. Diode 10 is connected to node 2, and the other electrode (e.g., output terminal) is connected to node 11. It can be replaced with 4d. Alternatively, transistor 105 has one electrode ( For example, one electrode (for input terminals) is connected to node 11, and the other electrode (for example, output terminals) is connected to wiring 113. It can be replaced with diode 105d connected to it. This means that the number of signals or power sources can be reduced. In other words, the number of wires can be reduced. Therefore, the connection between the substrate on which the circuit 100 is formed and the substrate for supplying signals to that substrate Reducing the number of successors can lead to improved reliability, higher yield, or reduced manufacturing costs. This can be achieved by measuring the multiple transistors (for example, transistors) that the circuit 100 has. Some of the transistors (101-105) can be replaced with diodes. .

[0148] Figure 11(B) shows that in the semiconductor device of Figure 1(A), the transistors are connected by diodes. The configuration in this case is shown. The first terminal of transistor 101 is connected to node 11. This is possible. Alternatively, the first terminal of transistor 102 is connected to wiring 114, The gate of the transistor 102 can be connected to wiring 111. Alternatively, The first terminal of transistor 103 is connected to wiring 113, and the gate of transistor 103 is It can be connected to wiring 111, or to the first terminal of transistor 105. It is connected to wiring 113, and the gate of transistor 105 is connected to node 11. This is possible. By doing so, the number of signals or power sources can be reduced. Therefore, the number of wires can be reduced. Thus, the substrate on which the circuit 100 is formed, and the substrate This reduces the number of connections to the board for supplying signals, thus improving reliability and yield. This can improve the efficiency or reduce manufacturing costs. The circuit 100 has multiple Some transistors (for example, transistors 101-105) are diodes It is possible to connect.

[0149] Next, Figure 1(A), Figure 6(A)-(F), Figure 7(A)-(E), Figure 8(A)-(F), Figure In the configuration described in 9(A)-(B) and Figure 11(A)-(B), the transistor is It is possible to replace it with a quantitative element. For example, without omitting the transistor, the quantitative element can be replaced. It is possible to add new quantitative elements.

[0150] Figure 11(C) shows that in the semiconductor device of Figure 1(A), transistor 104 is connected to wiring 11 This shows a configuration in which the capacitive element 104A connected between 2 and node 11 is replaced. 104A controls the potential of node 11 according to the potential of wiring 112 through capacitive coupling. This is possible. In this way, the transistor 104 can be replaced with the capacitive element 104A. This reduces the steady-state current, thereby lowering power consumption.

[0151] Figure 11(D) shows the semiconductor device of Figure 1(A) with a newly added capacitive element 104A. The configuration is shown. Since the potential change at node 11 can be made steeper, power consumption can be reduced. It is possible.

[0152] Figure 11(E) shows the semiconductor device in Figure 1(A), with transistor 102, and Transistor 103 and transistor 105 are connected between wiring 114 and wiring 111, respectively. Capacitive element 102A, capacitive element 103B connected between wiring 113 and wiring 111, This shows a configuration in which a capacitive element 105B is replaced between line 113 and node 11. .

[0153] Next, Figure 1(A), Figure 6(A)-(F), Figure 7(A)-(E), Figure 8(A)-(F), Figure In the configurations described in 9(A)-(B) and Figures 11(A)-(F), the transistor is resistive It can be replaced with an anti-static element.

[0154] Figure 11(F) shows that in the semiconductor device of Figure 1(A), transistor 104 is a resistor 1 The configuration in which 04R is replaced is shown. The resistor element 104R is connected between wiring 112 and node 11. It is connected in between.

[0155] Next, Figure 1(A), Figure 6(A)-(F), Figure 7(A)-(E), Figure 8(A)-(F), Figure In the configuration described in 9(A)-(B) and Figures 11(A)-(F), transistor 10 It is possible to add a new number 8.

[0156] Figure 46(A) shows that transistor 108 is newly added to the semiconductor device shown in Figure 1(A). The configuration is shown. Transistor 108 is an N-channel type. However, in this embodiment, Transistor 108 is not limited to this, and can also be a P-channel type. The first terminal of transistor 108 is connected to wiring 111, and the second terminal of transistor 108 It is connected to node 11, and the gate of transistor 108 is connected to wiring 112.

[0157] The operation of the semiconductor device shown in Figure 46(A) will be explained. In operations 1 to 3, signal IN1 is Since it becomes high level, transistor 108 turns on. Then, wiring 111 and node 1 Since it becomes conductive with 1, the potential of wiring 111 is supplied to node 11. Or, no The potential of D11 is supplied to wiring 111. However, in operation 4, signal IN3 is at the H level. However, since the potential of node 11 and the potential of wiring 111 become high, the transient The st 108 turns off. However, the transient remains active until the potential of wiring 111 reaches a high level. Node 108 turns on. Therefore, the potential of node 11 decreases. Then the transistor Since the Vgs of transistor 101 decreases, dielectric breakdown or degradation of transistor 101 is prevented. This is possible. On the other hand, in operations 5-8, signal IN1 becomes L level, so the transistor The zista 108 is turned off. Therefore, node 11 and wiring 111 become non-conductive.

[0158] Next, Figure 1(A), Figure 6(A)-(F), Figure 7(A)-(E), Figure 8(A)-(F), Figure In the configuration described in 9(A)-(B), Figures 11(A)-(F), and Figure 46(A), signal O It is possible to generate a signal different from UT. For this purpose, these semiconductor devices are equipped with It is possible to install a new Rangista 109.

[0159] Figure 46(B) shows a configuration in which a transistor 109 is newly added to the semiconductor device shown in Figure 1(A). This shows that transistor 109 has the same polarity as transistor 101. And, Transistor 109 can have the same function as transistor 101. The first terminal of transistor 109 is connected to wiring 112, and the second terminal of transistor 109 is connected to wiring 112. The gate of transistor 109 is connected to the wiring 117 and to node 11. It is possible.

[0160] Here, see Figures 1(A), 6(A)-(F), 7(A)-(E), 8(A)-(F), The configuration described in Figures 9(A)-(B), 11(A)-(F), and 46(A)-(B) can be adjusted as appropriate. It should be noted that they can be combined.

[0161] Figure 12(A) shows a combination of the configuration described in Figure 6(B) and the configuration described in Figure 6(E). The configuration is shown. The first terminal of transistor 103 is connected to wiring 112, and the transistor The second terminal of 103 is connected to wire 111, and the gate of transistor 103 is connected to wire 11 It is connected to 1. The first terminal of transistor 105 is connected to wiring 112, and the transistor The second terminal of transistor 105 is connected to node 11, and the gate of transistor 105 is connected to node 11. It is connected to the node 11. Thus, the signal IN2 and the wiring 113 can be omitted. Thereby, the number of signals or the number of wirings can be reduced. Therefore, it is possible to reduce the number of connection points between the substrate on which the circuit 100 is formed and another substrate, improve the reliability, reduce the manufacturing cost, and / or reduce the power consumption.

[0162] Fig. 12(B) shows a configuration in which the configuration described in Fig. 7(A) and the configuration described in Fig. 8(E) are combined. The transistor 105 is omitted, the first terminal of the transistor 104 is connected to the wiring 11, the second terminal of the transistor 104 is connected to the node 11, and the gate of the transistor 104 is connected to the wiring 116. Thus, the number of transistors can be reduced, so that the layout area can be reduced. Furthermore, since the potential of the node 11 can be fixed at the L level, a circuit that is resistant to noise can be obtained.

[0163] Fig. 12(C) shows a configuration in which the configuration described in Fig. 7(D) and the configuration described in Fig. 11(C) are combined. The first terminal of the transistor 103 is connected to the wiring 114, the first terminal of the transistor 105 is connected to the wiring 114, and the transistor 104 is replaced with a capacitive element 104A connected between the wiring 112 and the node 11.

[0164]

[0165] As described above, the present embodiment is not limited to the configuration described in Fig. 1(A), and various other configurations can also be used.

[0165] Next, Figs. 1(A), 6(A) to (F), 7(A) to (E), 8(A) to (F), Figs. 9(A) to (B), 11(A) to (F), 12(A) to (C), and Figs. 46(A) to In the configuration described in (B), a P-channel transistor is used as the transistor. This is possible. Only some of the transistors in a semiconductor device are of the P-channel type. It is possible that the semiconductor device of this embodiment is a CMOS circuit. This is possible.

[0166] Figure 13(A) shows that in the semiconductor device of Figure 1(A), the transistor is a P-channel. The configuration when type transistors are used is shown. Transistors 101p to 105p are... It has the same function as transistors 101-105 and is a P-channel type. In such cases, Voltage V2 is supplied to wiring 115.

[0167] In the semiconductor device shown in Figure 13(A), as shown in Figure 13(B), circuit 100 performs NAND It is possible to have the function of a logic circuit. Specifically, circuit 100 is 3 input It can function as a logic circuit combining a NAND gate and two NOT gates. It is possible. And, the signal IN1 can be input to the first input terminal of the NAND. Therefore, at the second input terminal of the NAND gate, the signal IN2 is inverted by the first NOT gate. A signal can be input, and the third input terminal of the NAND has a second signal IN3. A signal that is inverted by the NOT gate can be input, and from the output of the NAND gate... It is possible to output a signal OUT. In other words, circuit 100 is as shown in Figure 13(C). It has the function of realizing a logical formula, or the function of realizing a truth table obtained by this logical formula. Therefore, it is possible for signal IN1 to become L level, and signals IN2 and IN3 When the signal becomes high (H), the signal OUT becomes low (L), and for any other input signal, the signal Note that OUT will be at an H level. In Figure 13(D), signals IN1 to IN3 are digital. The truth table for a Tal signal is shown below.

[0168] Figure 12(D) shows that in the semiconductor device of Figure 1(A), some transistors are P-type transistors. This shows a configuration in which a channel-type transistor is used. The gate of transistor 104p is no It connects to D11.

[0169] (Embodiment 2) In this embodiment, elements or circuits are newly added to the semiconductor device of Embodiment 1. Let me explain the body apparatus.

[0170] First, a transistor 201 (the sixth transistor) is newly added to the semiconductor device of Embodiment 1. The configuration to be installed will be explained. Figure 14(A) shows the semiconductor device in Figure 1(A) with a transistor This shows the configuration with the newly added ZISTA 201.

[0171] Transistor 201 is an N-channel type. However, this embodiment is not limited to this. Furthermore, transistor 201 can be a P-channel type. Transistor 201 The first terminal of transistor 201 is connected to wire 115, and the second terminal of transistor 201 is connected to wire 21 The gate of transistor 201 is connected to wire 1 (the sixth wire) and is connected to wire 111. .

[0172] Note that the gate of transistor 201 is shown as node 12. In Embodiment 1, node 12 is Since it corresponds to the wiring 111 described above, when referring to wiring 111, wiring 111 is referred to as node 12 It can be rephrased as follows. Therefore, it is written as the potential of wiring 111 (the potential of signal OUT). In this case, the potential of wiring 111 (the potential of signal OUT) can be rephrased as the potential of node 12. This is possible.

[0173] The function of transistor 201 will be explained. Transistor 201 is connected to wiring 115 and wiring It has a function to control the conductivity state with 211. Alternatively, transistor 201 is connected to wiring 11 It has a function to control the timing of supplying potential 5 to wiring 211. Alternatively, wiring 11 If a signal or voltage is input to 5, transistor 201 is input to wiring 115. It has a function to control the timing of supplying a signal or voltage to the wiring 211. The transistor 201 controls the timing of supplying an L signal or voltage V1 to the wiring 211. It has the function of reducing the potential of the wiring 211. It has the function of controlling the switching. As described above, transistor 201 is a switch It is possible to have the above functions. Furthermore, transistor 201 possesses all of the above functions. There is no need to do so. Furthermore, transistor 201 is controlled by the output signal of circuit 100. It is possible to do so.

[0174] Next, the operation of the semiconductor device shown in Figure 14(A) will be explained with reference to Figure 15(A). 15(A) shows a timing chart that can be used in the semiconductor device of this embodiment. show.

[0175] Note that the timing chart in Figure 15(A) has periods A and B. In the timing chart of 5(A), periods A and B are arranged alternately. Figure 15( The timing chart in A) shows multiple periods A and multiple periods B arranged alternately. It is possible. Alternatively, the timing chart in Figure 15(A) can be used for periods other than period A and period B. It is possible to have a period in between, and it is possible to omit one of the periods, period A or period B. be.

[0176] Note that period A and period B are of roughly equal length. Or, for example, in this embodiment If a clock signal is input to a semiconductor device, the lengths of period A and period B are as follows: Its length is approximately equal to half a period of the clock signal. Or, for example, half of the clock signal in this embodiment. If the conductive device is used as a gate driver, the lengths of period A and period B are 1 This period is roughly equal to the gate selection period.

[0177] First, the operation of the semiconductor device during period A will be explained with reference to the schematic diagram in Figure 14(B). During period A, signal IN1 becomes high level, signal IN2 becomes low level, and signal I N3 becomes L level. Therefore, circuit 100 can perform operation 4 in Figure 3(A). As a result, the potential (signal OUT) at node 12 becomes high. Since 1 is turned on, wire 115 and wire 211 become electrically connected. Then wire 115 The potential (e.g., voltage V1) is supplied to wiring 211, so the potential of wiring 211 (signal G OUT) will be at L level.

[0178] Next, the operation of the semiconductor device during period B will be explained with reference to the schematic diagram in Figure 14(C). During period B, signal IN1 becomes L level, signal IN2 becomes H level, and signal I N3 becomes L level. Therefore, circuit 100 can perform operation 6 in Figure 3(C). Therefore, the potential (signal OUT) at node 12 becomes L level. As a result, transistor 2 Since 01 is turned off, wires 115 and 211 become non-conductive. Therefore, wire 2 Since 11 is in a floating state, the potential of wiring 211 is maintained at approximately V1.

[0179] As described above, transistor 201 is on during period A and off during period B. Therefore, the time that transistor 201 is on can be shortened. The degradation of the transistor can be suppressed. Also, in periods A and B, transistor 1 01, Transistor 102, Transistor 103, Transistor 104, Transistor 1 05 and transistor 201 will not remain on, and the on time will be shortened or turned off. This can reduce the number of times this happens.

[0180] Next, we will explain the functions of signals IN1 to IN3 and their characteristics.

[0181] First, signal IN1 alternates between high and low levels over time. Therefore, signal IN1 is It can function as a clock signal. Alternatively, wiring 112 is a clock It can function as a signal line (clock line, or clock supply line).

[0182] Next, signal IN2 alternates between high and low levels for a set period. Then, signal IN2 This is the inverted signal of signal IN1, or a signal that is 180° out of phase with signal IN1. Signal IN2 can function as an inverting clock signal. Alternatively, Line 113 can function as a clock signal line.

[0183] Next, let's assume that signals IN1 and IN2 function as clock signals. In this case, signals IN1 and IN2 can be balanced as shown in Figure 15(A). Furthermore, non-equilibrium is possible. Equilibrium is defined as the period within one cycle that is at the H level and This means that the period of time at the L level is roughly equal to the period of time at the H level. Non-equilibrium means that the period of time at the H level is roughly equal to the period of time at the L level. This refers to a difference in the period during which the L level is reached. Note that "different" here generally means roughly equal. It is assumed to be outside the scope of the agreement.

[0184] Figure 15(B) shows the timing chart in Figure 15(A) for signals IN1 and I The timing chart for the case where N2 is non-equilibrium is shown.

[0185] Next, the semiconductor device of this embodiment is capable of receiving an n-phase clock signal. Alternatively, the semiconductor device of this embodiment may receive some of the n-phase clock signals. It is possible to do so. An n-phase clock signal is a signal with periods that are shifted by 1 / n periods. This refers to individual clock signals.

[0186] Figure 15(C) shows that one of the three-phase clock signals is used as signal IN1, and the three-phase clock signal The timing chart shows the case where another unit of the unit is used as signal IN2.

[0187] As described above, signals IN1 to IN3 are shown in the timing chart in Figure 15(A). It is possible to create not only waveforms, but also various other types of waveforms.

[0188] Next, we will explain the channel width ratio of transistor 201. For example, wiring 211 is When functioning as a gate signal line, the wiring 211 is arranged to extend to the pixel area, and the image It may be connected to the raw material. In other words, a large load is connected to wiring 211. Therefore The channel width of transistor 201 is less than the channel width of the transistors in circuit 100. It is also larger. In such cases, the channel width of transistor 201 is greater than that of transistor 101. Preferably, it is 10 times or less the channel width of transistor 201. The channel width is preferably 5 times or less the channel width of transistor 101. More preferably, the channel width of transistor 201 is the same as the channel width of transistor 101. It is preferable that it be three times or less.

[0189] As described above, it is preferable to set the ratio of the transistor channel width to an appropriate value. Considering the channel width ratio of the above transistors, the channel of transistor 201 The width is preferably 1000 μm or more and 5000 μm or less. More preferably, The channel width of the Rangista 201 should preferably be between 1500 μm and 4000 μm. It is preferable that the channel width of transistor 201 be 2000 μm or more, 300 It is preferable that the particle size is 0 μm or less.

[0190] Next, we will describe a semiconductor device with a different configuration from that shown in Figure 14(A).

[0191] First, in the configuration described in Figure 14(A), the circuit 100 is not limited to the configuration in Figure 1(A). It is not fixed, and various configurations described in Embodiment 1 can be used. Circuit 100 Therefore, if the required functions can be met, a configuration other than the one described in Embodiment 1 can be used. It is possible to do so.

[0192] Figure 10(A) shows the configuration described in Figure 14(A), where circuit 100 is shown in Figure 7(B). This shows a configuration that uses the following structure.

[0193] Figure 10(B) shows the configuration described in Figure 14(A), where circuit 100 is shown in Figure 8(D). The configuration using this setup is shown. Noise is generated at node 12 via transistor 103. This can be prevented. Therefore, malfunctions can be prevented.

[0194] Figure 10(C) shows the configuration described in Figure 14(A), where circuit 100 is shown in Figure 8(C). The configuration when using this configuration is shown. Since the potential of node 11 can be made smaller, This prevents transistor 201 from turning on.

[0195] Next, in the configuration described in Figures 10(A)-(C) and Figure 14(A), transistor 202 It is possible to establish a new one.

[0196] Figure 16(A) shows the semiconductor device in Figure 14(A) with a transistor 202 newly added. This shows the result. Transistor 202 is an N-channel type. However, in this embodiment, Transistor 202 is not limited to this, and can also be a P-channel type. The first terminal of transistor 202 is connected to wiring 115, and the second terminal of transistor 202 is The gate of transistor 202 is connected to wiring 211 and to wiring 113. The gate of the transistor 202 can be connected to a different wire than the wire 113. Alternatively, the first terminal of transistor 202 may be connected to a different wire from wire 115. This is possible.

[0197] The function of transistor 202 will be explained. Transistor 202 is connected to wiring 115 and wiring It has a function to control the conductivity state with 211. Alternatively, transistor 202 is connected to wiring 11 It has a function to control the timing of supplying potential 5 to wiring 211. Alternatively, wiring 11 If a signal or voltage is input to 5, transistor 202 is input to wiring 115. It has a function to control the timing of supplying a signal or voltage to the wiring 211. The transistor 202 controls the timing of supplying an L signal or voltage V1 to the wiring 211. It has the function of reducing the potential of the wiring 211. It has the function of controlling the switching. As described above, transistor 202 acts as a switch. It is possible to have the above functions. Furthermore, transistor 202 possesses all of the above functions. There is no need to do so. Furthermore, transistor 202 is at the potential of wiring 113 (for example, signal IN2). It can be controlled by [this method].

[0198] The operation of the semiconductor device shown in Figure 16(A) will be explained. During period A, the signal IN2 is L As the bell is formed, transistor 202 turns off, as shown in Figure 16(B). Period B In this case, the signal IN2 becomes high level, so as shown in Figure 16(C), the transistor 202 turns on. Therefore, during period B, wiring 115 and wiring 211 remain in a conductive state. Therefore, the potential of wiring 115 (for example, voltage V1) is supplied to wiring 211. This can reduce noise in wiring 211. For example, the semiconductor device in Figure 16(A) When used in a display device, and the wiring 211 is connected to the gate of a pixel selection transistor, In this case, noise from wiring 211 causes noise to be transmitted to pixels belonging to another row. This can prevent the deno signal from being written. Alternatively, noise in wiring 211 can prevent it from being written. This prevents the video signal held by the pixel from changing. Therefore, display It can help improve the quality of the product.

[0199] Next, in the configuration described in Figures 10(A)-(C), Figure 14(A), and Figure 16(A), It is possible to add a new transistor, 203 (the seventh transistor).

[0200] Figure 17(A) shows a configuration in which a transistor 203 is newly added to the semiconductor device shown in Figure 14(A). This shows the result. Transistor 203 is an N-channel type. However, in this embodiment, Transistor 203 is not limited to this, and can also be a P-channel type. The first terminal of transistor 203 is connected to wiring 112, and the second terminal of transistor 203 is It is connected to wiring 211. The gate of transistor 203 is indicated as node 13. Furthermore, the gate of transistor 102 can be connected to node 13. Therefore, the potential (V13) of node 13 can be used as signal IN3.

[0201] The function of transistor 203 will be explained. Transistor 203 is connected to wiring 112 and wiring It has a function to control the conductivity state with 211. Alternatively, transistor 203 is connected to wiring 11 It has a function to control the timing of supplying potential 2 to wiring 211. Alternatively, wiring 11 If a signal or voltage is input to 2, transistor 203 is input to wiring 112. It has a function to control the timing of supplying a signal or voltage to the wiring 211. The transistor 203 controls the timing of supplying an H signal or voltage V2 to the wiring 211. It has the function of sending an L signal or voltage V1 to the wiring 211. It has a function to control the timing of supply. Alternatively, transistor 203 is connected to wiring 21 It has a function to control the timing of raising the potential of 1. Or, transistor 203 It has the function of controlling the timing of reducing the potential of wiring 211. Or, Trans Transistor 203 has the function of performing bootstrap operation. Alternatively, transistor 20 3 has the function of raising the potential of node 13 through bootstrap operation. As shown above, transistor 203 can function as a switch or a buffer. It is possible. However, transistor 203 does not need to possess all of the above functions. Oh, transistor 203 controls the potential of node 13, the potential of wiring 112 (signal IN1), and Alternatively, it can be controlled by the potential of wiring 211 (signal GOUT).

[0202] The operation of the semiconductor device in Figure 17(A) will be explained with reference to Figure 17(B). B) shows a timing chart that can be used in the semiconductor device of this embodiment.

[0203] Note that the timing chart in Figure 17(B) has periods A to E. In the timing chart, periods C, D, and E are arranged in order. During the periods other than those specified, periods A and B are arranged alternately. Periods A through E are arranged in various orders. It may be placed in [location].

[0204] The operation of the semiconductor device during period A will be explained with reference to the schematic diagram in Figure 18(A). During period A, signal IN1 becomes high level, signal IN2 becomes low level, and node 13 The potential (signal IN3) becomes L level. Therefore, circuit 100 performs operation 4 in Figure 3(A). This makes it possible for the potential (signal OUT) of node 12 to become high. Then, Transistor 201 turns on, so wires 115 and 211 become conductive. Then, the potential of wiring 115 (for example, voltage V1) is supplied to wiring 211. At this time, The potential of line 13 becomes L level, so transistor 203 turns off. Then, the wiring... Wiring 112 and wiring 211 become non-conductive. As a result, wiring 211 is connected to wiring 115 Since a potential (e.g., voltage V1) is supplied, the signal GOUT becomes low.

[0205] The operation of the semiconductor device during period B will be explained with reference to the schematic diagram in Figure 18(B). During period B, signal IN1 becomes L level, signal IN2 becomes H level, and node 13 The potential (signal IN3) remains at the low level. Therefore, circuit 100 operates as shown in Figure 3(C). Since step 6 can be performed, the potential (signal OUT) of node 12 will be at the L level. As a result, transistor 201 turns off, and wires 115 and 211 become non-conductive. At this time, the potential of node 13 becomes L level, so transistor 203 turns off. As a result, wiring 112 and wiring 211 become non-conductive. Since it is in a floating state, the potential of wiring 211 is maintained at approximately V1.

[0206] The operation of the semiconductor device during period C will be explained with reference to the schematic diagram in Figure 19(A). During period C, signal IN1 becomes low, signal IN2 becomes high, and node 13 The potential (signal IN3) becomes high. Therefore, circuit 100 performs operation 5 in Figure 3(B). Since this is possible, the potential (signal OUT) of node 12 becomes L level. Then, Since transistor 201 is turned off, wires 115 and 211 become non-conductive. At this point, the potential at node 13 becomes high, so transistor 203 turns on. As a result, wiring 112 and wiring 211 become conductive, and the potential of wiring 112 (L level) Signal IN1) is supplied to wiring 211. As a result, wiring 211 is connected to wiring 112 Since a potential (L-level signal IN1) is supplied, the signal GOUT becomes L-level.

[0207] The operation of the semiconductor device during period D will be explained with reference to the schematic diagram in Figure 19(B). During period D, signal IN1 becomes high level, signal IN2 becomes low level, and node 13 The potential (signal IN3) becomes high. Therefore, circuit 100 performs operation 3 in Figure 2(C). Since this is possible, the potential (signal OUT) of node 12 becomes L level. Then, Since transistor 201 is turned off, wires 115 and 211 become non-conductive. In this case, the potential at node 13 becomes high, so transistor 203 turns on. As a result, wiring 112 and wiring 211 become conductive, and the potential of wiring 112 (H level) The signal IN1 is supplied to wiring 211. As a result, wiring 211 is connected to wiring 11 Since a potential of 2 (high-level signal IN1) is supplied, the potential of wiring 211 begins to rise. At this point, node 13 is assumed to be in a floating state. Then, the gate of transistor 203... The parasitic capacitance between the terminal and the second terminal causes the potential of node 13 to rise. As a result, The potential of line 13 is V2 + Vth203 + Va. This is known as bootstrap operation. Therefore, the potential of wiring 211 becomes V2, and the signal GOUT becomes high. .

[0208] The operation of the semiconductor device during period E will be explained with reference to the schematic diagram in Figure 19(C). During period E, signal IN1 becomes L level, signal IN2 becomes H level, and node 13 The potential (signal IN3) becomes L level. Therefore, circuit 100 performs operation 6 in Figure 3(C). Since this is possible, the potential (signal OUT) of node 12 becomes L level. Then, Since transistor 201 is turned off, wires 115 and 211 become non-conductive. At that time, the potential of node 13 becomes L level. Then, transistor 203 turns off. Therefore, wiring 112 and wiring 211 become non-conductive. However, signal IN1 is at the H level. The timing of the transition from high to low level is when the potential of node 13 decreases from high level to low level. It is possible to do this earlier than the timing. In this case, if transistor 203 is on In other words, when wiring 112 and wiring 211 are in a conductive state, signal IN1 is at a low level. This can happen. Therefore, since an L-level signal IN1 is supplied to wiring 211, signal G OUT will be at L level.

[0209] Further details will be provided in Figures 10(A)-(C), 14(A), 16(A), and 17(A). In this configuration, the gate of transistor 203 can be connected to node 12. Alternatively, the gate of transistor 201 can be connected to node 13. (Figure 47(A)).

[0210] Note that Figures 10(A)-(C), 14(A), 16(A), 17(A), and 47 In the configuration described in (A), the circuit 100 and the other transistors are connected by separate wiring. It is possible to connect them. For example, as shown in Figure 47(B), transistor 203 The first terminal can be connected to a different wire (wire 112A) from wire 112. Alternatively, the first terminal of transistor 201 may be connected to a different wire (wire 115) from wire 115. It is possible to connect to A).

[0211] Next, see Figures 10(A)-(C), 14(A), 16(A), 17(A), and 47. In the configuration described in (A) and (B), it is possible to newly add transistor 204. be.

[0212] Figure 20(A) shows a configuration in which a transistor 204 is newly added to the semiconductor device shown in Figure 17(A). This shows the result. Transistor 204 is an N-channel type. However, in this embodiment, Transistor 204 is not limited to this, and can also be a P-channel type. The first terminal of transistor 204 is connected to wiring 115, and the second terminal of transistor 204 is The gate of transistor 204 is connected to node 12, and node 13 is connected to node 13.

[0213] The function of transistor 204 will be explained. Transistor 204 is connected to wiring 115 and No It has the function of controlling the conductivity state with D13. Alternatively, transistor 204 is connected to wiring 11 It has a function to control the timing of supplying potential 5 to node 13. Alternatively, wiring 11 If a signal or voltage is input to 5, transistor 204 is input to wiring 115. It has a function to control the timing of supplying a signal or voltage to node 13. The transistor 204 controls the timing of supplying the L signal or voltage V1 to node 13. It has the function of reducing the potential of node 13. It has the function of controlling the switching. As described above, transistor 204 acts as a switch. It is possible to have the above functions. Furthermore, transistor 204 possesses all of the above functions. There is no need to do so. Furthermore, transistor 204 is at the potential of node 12 (for example, signal OUT). It can be controlled by [this method].

[0214] The operation of the semiconductor device shown in Figure 20(A) will be explained. During period A, as shown in Figure 20(B) As such, circuit 100 outputs a high signal, so transistor 204 turns on. As a result, wiring 115 and node 13 become conductive, so the potential of wiring 115 (for example, voltage V) 1) is supplied to node 13. During periods B to E, circuit 100 outputs an L signal. Therefore, transistor 204 turns off. Thus, wiring 115 and node 13 are decoupled. It enters a normal state. Note that Figure 20(C) shows a model of the semiconductor device in Figure 20(A) during period B. The diagram is shown below.

[0215] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), and in the configuration described in Figures 47(A) to (B), a transistor 205 is newly provided. It is possible to do so.

[0216] Figure 21(A) shows a configuration in which a transistor 205 is newly added to the semiconductor device shown in Figure 17(A). This shows the result. Transistor 205 is an N-channel type. However, in this embodiment, Transistor 205 is not limited to this, and can also be a P-channel type. The first terminal of transistor 205 is connected to wiring 212, and the second terminal of transistor 205 is The gate of transistor 205 is connected to the wiring 212, and is connected to node 13.

[0217] The signals input to wiring 212 and the function of wiring 212 will be explained. Then, signal IN4 is input. Signal IN4 has the function of a start pulse. Yes, it is possible. Therefore, wiring 212 can function as a signal line. A constant voltage can be supplied to wire 212. Therefore, wiring 212 is a power supply. It is possible for it to function as a line.

[0218] Furthermore, if multiple semiconductor devices are connected, the wiring 212 will be connected to another semiconductor device (for example) It is connected to wiring 211 of the semiconductor device in the previous stage. Therefore, wiring 212 is the gate signal line. It can function as a scan line, selection line, capacitance line, or power line. Signal IN4 can function as a gate signal or a scan signal.

[0219] The function of transistor 205 will be explained. Transistor 205 is connected to wiring 212 and No. It has a function to control the conductivity state with D13. Alternatively, transistor 205 is connected to wiring 21 It has a function to control the timing of supplying potential 2 to node 13. Alternatively, wiring 21 When a signal or voltage is input to 2, transistor 205 is input to wiring 212. It has a function to control the timing of supplying a signal or voltage to node 13. The transistor 205 controls the timing of supplying an H signal or voltage V2 to node 13. It has the function of supplying a signal or voltage to node 13. It has the function of raising the potential of node 13. It has a function to control the staging. Alternatively, transistor 205 puts node 13 into a floating state. It has the function of being a switch, a diode, or It can function as a diode-connected transistor, etc. Transistor 205 does not need to have all of the above functions. It is controlled by the potential of wiring 212 (signal IN4) and / or the potential of node 13. It is possible to do so.

[0220] The operation of the semiconductor device in Figure 21(A) will be explained with reference to Figure 21(B). B) shows a timing chart that can be used in the semiconductor device of this embodiment. During period C, as shown in Figure 22(A), signal IN4 becomes high. Therefore, Transistor 205 turns on, so wiring 212 and node 13 become conductive. Then, the potential of wiring 212 (for example, a high-level signal IN4) is supplied to node 13. As a result, the potential of node 13 begins to rise. Subsequently, the potential of node 13 is the transistor From the gate potential of transistor 205 (e.g., V2), the threshold voltage of transistor 205 (Vth20) When the value obtained by subtracting (5) (V2 - Vth205) is reached, transistor 205 turns off. Therefore, node 13 becomes floating, and the potential of node 13 is V2-Vth2. It is maintained at 05. During periods A-B and D-E, signal IN4 is at an L level. Therefore, transistor 205 is turned off, and wiring 212 and node 13 are not conductive. This is the state it enters. Figure 22(B) shows the operation of the semiconductor device in Figure 21(A) during period B. A schematic diagram is shown.

[0221] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) In the configuration described in Figures 21(A) and 47(A)-(B), transistor 20 It is possible to add a new number, 6.

[0222] Figure 23(A) shows a configuration in which a transistor 206 is added to the semiconductor device shown in Figure 21(A). Transistor 206 is an N-channel type. However, this embodiment is not limited to this. Transistor 2 The first terminal of transistor 06 is connected to wiring 212, and the second terminal of transistor 206 is connected to no The gate of transistor 206 is connected to wire 113, which is connected to wire 13.

[0223] The function of transistor 206 will be explained. Transistor 206 is connected to wiring 212 and It has a function to control the conductivity state with D13. Alternatively, transistor 206 is connected to wiring 21 It has a function to control the timing of supplying potential 2 to node 13. Alternatively, wiring 21 If a signal or voltage is input to 2, transistor 206 is input to wiring 212. It has a function to control the timing of supplying a signal or voltage to node 13. The transistor 206 controls the timing of supplying the L signal or voltage V1 to node 13. It has the function of sending an H signal or voltage V2 to node 13. It has a function to control the timing of supply. Alternatively, transistor 206 is at node 1 It has a function to control the timing of decreasing the potential of 3. Or, transistor 206 It has the function of controlling the timing of raising the potential of node 13. As described above, Transistor 206 can function as a switch. The transistor 206 does not need to have all of the above functions. It can be controlled by the potential of wiring 113 (for example, signal IN2).

[0224] The operation of the semiconductor device shown in Figure 23(A) will be explained. During period C, as shown in Figure 23(B) Therefore, since signal IN2 becomes high level, transistor 206 turns on. Since wiring 212 and node 13 are in a conductive state, the potential of wiring 212 (for example, H level) The signal IN4) is supplied to node 13. Thus, during period C, node 13 Because the change in potential can be made steeper, the driving frequency of semiconductor devices can be increased. Cut.

[0225] In periods B and E, as in period C, signal IN2 will be at the H level, The transistor 206 turns on. Therefore, wiring 212 and node 13 become electrically connected. The potential of wiring 212 (for example, the low-level signal IN4) is then supplied to node 13. Thus, during period B, the potential of node 13 can be fixed, making it resistant to noise. A semiconductor device can be obtained. Alternatively, during period E, the potential of node 13 can be lowered. Therefore, transistor 203 can be turned off. Note in Figure 24(A Figure 23(A) shows a schematic diagram of the operation of the semiconductor device during period B.

[0226] During period A, as shown in Figure 24(B), the signal IN2 becomes L level, so the transistor The zista 206 is turned off. Therefore, wiring 212 and node 13 become non-conductive. Thus, transistor 206 is turned off, which suppresses the degradation of transistor 206. It is possible.

[0227] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) In the configuration described in Figures 21(A), 23(A), and 47(A)-(B), It is possible to install a new Rangista 207.

[0228] Figure 25(A) shows a configuration in which transistor 207 is newly added to the semiconductor device shown in Figure 17(A). This shows the result. Transistor 207 is an N-channel type. However, in this embodiment, Transistor 207 is not limited to this, and can also be a P-channel type. The first terminal of transistor 207 is connected to wiring 115, and the second terminal of transistor 207 is The gate of transistor 207 is connected to the wiring 213, and is connected to node 13.

[0229] The signals input to wiring 213 and the function of wiring 213 will be explained. Signal IN5 is input. Signal IN5 can function as a reset signal. It is possible. Therefore, wiring 213 can function as a signal line. A constant voltage can be supplied to 213. Therefore, wiring 213 is a power line. It is possible to have that function.

[0230] Furthermore, if multiple semiconductor devices are connected, the wiring 213 will be connected to another semiconductor device (for example) It is connected to wiring 211 of the next stage semiconductor device. Therefore, wiring 213 is the gate signal line. It can function as a scan line, selection line, capacitance line, or power line. Signal IN5 can function as a gate signal or a scan signal.

[0231] Let's explain the function of transistor 207. Transistor 207 is connected to wiring 115 and No It has the function of controlling the conductivity state with D13. Alternatively, transistor 207 is connected to wiring 11 It has a function to control the timing of supplying potential 5 to node 13. Alternatively, wiring 11 If a signal or voltage is input to 5, transistor 207 is input to wiring 115. It has a function to control the timing of supplying a signal or voltage to node 13. The transistor 207 controls the timing of supplying the L signal or voltage V1 to node 13. It has the function of reducing the potential of node 13. It has the function of controlling the switching. As described above, transistor 207 acts as a switch. It is possible to have the above functions. Furthermore, transistor 207 possesses all of the above functions. There is no need to do so. Furthermore, transistor 207 is at the potential of wiring 213 (for example, signal IN5). Therefore, it can be controlled.

[0232] The operation of the semiconductor device in Figure 25(A) will be explained with reference to Figure 25(B). B) shows a timing chart that can be used in the semiconductor device of this embodiment. During period E, as shown in Figure 26(A), signal IN5 becomes H level. Therefore, Since transistor 207 turns on, wiring 115 and node 13 become conductive. Then, the potential (e.g., voltage V1) of wiring 115 is supplied to node 13. As a result, The potential of 13 decreases. During periods A to D, signal IN5 becomes L level. Therefore As a result, transistor 207 turns off, and wiring 115 and node 13 become non-conductive. Figure 26(B) shows a schematic diagram of the operation of the semiconductor device shown in Figure 25(A) during period B. show.

[0233] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) The structure described in Figures 21(A), 23(A), 25(A), and 47(A)-(B) In this configuration, the gate of transistor 102 is connected to a different wire (for example, wire 21) from node 13. It can be connected to (1, etc.).

[0234] Figure 27(B) shows that in the semiconductor device of Figure 27(A), the gate of transistor 102 is The configuration shown is connected to wiring 211. A large voltage is applied to the gate of transistor 102. This prevents transistor 102 from undergoing dielectric breakdown or degradation. It can be stopped.

[0235] Note that the semiconductor device in Figure 27(A) is the semiconductor device in Figure 14(A) with transistor 20 The configuration involves adding numbers 1 through 207.

[0236] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(B), and Figure 47( In the configuration described in A) and (B), the first terminal of transistor 204 is connected to wiring 115. This is a separate wiring (for example, wiring 113, wiring 212, wiring 213, node 12, or node 1 It is possible to connect to (3, etc.). Alternatively, the gate of transistor 204 is no It is possible to connect to a different wire (for example, wire 112) from wire D12.

[0237] Figure 27(C) shows the semiconductor device of Figure 27(A), with the first terminal of transistor 204. The child is connected to wire 211, and the gate of transistor 204 is connected to wire 112. The configuration is shown. In this way, the potential of node 13 can be reduced during period D. That is, the transistor connected to node 13 (for example, transistor 102, transistor To prevent dielectric breakdown of transistors 203, 205, or 206, etc. Alternatively, the degradation of these transistors can be suppressed.

[0238] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), and Figure 47( In the configuration described in A) and (B), the first terminal of transistor 205 is connected to wiring 212. It can be connected to other wiring (for example, wiring 113, wiring 116, etc.). Alternatively, the gate of transistor 205 is connected to a different wire (for example, wire 113) from wire 212. It can be connected to wiring 116, etc.

[0239] Figure 28(A) shows the semiconductor device of Figure 27(A), with the first terminal of transistor 205. This shows a configuration in which the child is connected to wiring 116.

[0240] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) In the configuration described in Figures 47(A) and 47(B), the second terminal of transistor 207 is , a separate wiring from node 13 (for example, wiring 211, node 11, or node 12, etc.) It is possible to connect them. Alternatively, the first terminal of transistor 207 is connected to wiring 115. This is separate wiring (for example, wiring 112, wiring 116, node 11, or node 12, etc.) It is possible to connect.

[0241] Figure 28(B) shows the semiconductor device of Figure 27(A), with the second terminal of transistor 207. The child shows a configuration connected to wiring 211. During period E, the potential of wiring 115 (for example) Voltage V1) can be supplied to wiring 211 via transistor 207. Therefore, the falling edge time of the GOUT signal can be shortened.

[0242] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) In the configuration described in (B) and Figures 47(A) and (B), the first The terminal is a separate wire from wire 115 (for example, wire 113, wire 212, wire 213, no It can be connected to node 12, or node 13, etc. Alternatively, a transistor The first terminal of 202 is connected to a different wire from wire 115 (for example, wire 112, or node 12). It is possible to connect to ( ). Alternatively, the first terminal of transistor 204 is wired Other wiring than 115 (for example, wiring 113, wiring 212, wiring 213, node 12, or It is possible to connect to node 13, etc. Alternatively, the first of transistor 207 The terminal is a separate wire from wire 115 (for example, wire 112, wire 116, wire 212, no It is possible to connect to (such as D12). Each terminal of each transistor is connected as shown in the diagram. In addition to conventional connections, it can also be connected to various other types of wiring.

[0243] Figure 28(C) shows the first terminal of transistor 201 in the semiconductor device shown in Figure 27(A). The first terminal of transistor 202 is connected to wiring 113, and the first terminal of transistor 202 is connected to wiring 113. The first terminal of transistor 204 is connected to wiring 113, and the first terminal of transistor 207 is connected to wiring 113. Terminal 1 indicates a configuration connected to wiring 112. Transistor 201, Transistor 2 Input an H signal to the first terminals of transistors 204 and 207. This makes it possible to suppress the degradation of these transistors.

[0244] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) In the configurations described in (C) and Figures 47(A) and (B), the transistor is replaced with a diode. It is possible to replace it with a diode connection. For example, a transistor can be connected to a diode. It is Noh.

[0245] Figure 29(A) shows the semiconductor device in Figure 27(A) where the transistor is placed on the diode. The interchangeable configuration is shown. Transistor 201 has one electrode (e.g., input terminal) connected to the wiring. A diode connected to 211, with the other electrode (e.g., output terminal) connected to node 12. It can be replaced with 201d. Alternatively, transistor 202 can be replaced with one of the electric transistors. One electrode (e.g., input terminal) is connected to wiring 211, and the other electrode (e.g., output terminal) is connected to wiring 1 It can be replaced with diode 202d connected to 13. Alternatively, The converter 203 has one electrode (e.g., input terminal) connected to node 13, and the other electrode (For example, the output terminal) is replaced with a diode 203d connected to wiring 211. This is possible. Alternatively, transistor 204 has one electrode (e.g., input terminal) at the node Diode 2 is connected to node 13, and its other electrode (e.g., output terminal) is connected to node 12. It can be replaced with 04d. Alternatively, transistor 205 can be used as one electrode. (For example, an input terminal) is connected to wiring 212, and the other electrode (for example, an output terminal) is connected to node 1 It can be replaced with diode 205d connected to 3. Alternatively, The zista 207 has one electrode (e.g., input terminal) connected to node 13, and the other electrode ( For example, the output terminal can be replaced with a diode 207d connected to wiring 213. Yes, it is possible. In this way, the number of signals or power sources can be reduced. In other words, the number of wires can be reduced. Therefore, the substrate on which the semiconductor device of this embodiment is formed, and the substrate This reduces the number of connections to the board for supplying signals, thus improving reliability and yield. This can improve efficiency or reduce manufacturing costs. Some of the transistors in the zista can be replaced with diodes.

[0246] Figure 29(B) shows that in the semiconductor device of Figure 27(A), the transistor is diode-connected. The configuration is shown. For example, the first terminal of transistor 201 is connected to node 12. The gate of transistor 201 is connected to wiring 211. Alternatively, for example, The first terminal of transistor 202 is connected to wiring 113, and the gate of transistor 202 is connected to wiring It is connected to line 211. Alternatively, for example, the first terminal of transistor 203 is connected to node 1. Connected to 3, the gate of transistor 203 is connected to node 13. Or, for example The first terminal of transistor 204 is connected to node 12, and the transistor 204 The gate is connected to node 13, or, for example, the first terminal of transistor 207. It is connected to wiring 213, and the gate of transistor 207 is connected to node 13. In this way, the number of signals or power sources can be reduced. In other words, the number of wires can be reduced. Therefore, the substrate on which the semiconductor device of this embodiment is formed, and the supply of signals to the substrate This reduces the number of connections to the circuit board, thereby improving reliability, yield, and This allows for reductions in manufacturing costs, etc. Part of the multiple transistors in this embodiment The transistor can be connected in a diode configuration.

[0247] Figure 29(C) shows that in the semiconductor device shown in Figure 27(A), a P-channel type transistor is... The diode-connected configuration is shown. Transistor 201p, Transistor 202p, Transistor Transistor 203p, Transistor 204p, Transistor 205p, Transistor 207 p are transistors 201, 202, 203, and 203 respectively. It has the same function as transistors 204, 205, and 207, and is P-channel. It is of the same type. The semiconductor device in Figure 29(C) has the same connection relationship as the semiconductor device in Figure 29(B). However, in order to connect the transistors in diode mode, the semiconductor device shown in Figure 29(B) and By comparing them, the gate of transistor 201p is connected to node 12, and transistor 2 The gate of transistor 02p is connected to wire 113, and the gate of transistor 203p is connected to wire 211. The gate of transistor 204p is connected to node 12, and transistor 205 The gate of transistor p is connected to node 13, and the gate of transistor 207p is connected to wire 213. The difference lies in the distribution. In this way, the number of signals or power sources can be reduced. The number of lines can be reduced. Therefore, the substrate on which the semiconductor device of this embodiment is formed, This reduces the number of connections to the board that supplies signals to that board, thus improving reliability. Furthermore, it is possible to improve yield or reduce manufacturing costs. Some of the transistors can be connected in a diode configuration.

[0248] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) In the configuration described in Figures 29(A)-(C) and 47(A)-(B), Each terminal or electrode of the transistor can be connected to a separate wire. For example, The first terminal of transistor 101, the first terminal of transistor 104, and transistor The first terminal of 203 can be connected to a separate wire. Or, for example, The gate of transistor 103, the gate of transistor 105, and transistor 202 A gate can be connected to a separate wire. Or, for example, a transistor. The first terminal of 102, the first terminal of transistor 105, and the first terminal of transistor 201 The terminal of transistor 202, the first terminal of transistor 204, and The first terminal of the Rangista 207 can be connected to a separate wire. For example, the first terminal of transistor 205 and the first terminal of transistor 206 are, It is possible to connect to separate wiring. To achieve this, the wiring can be connected to multiple wires. It is possible to divide it.

[0249] Figure 30(A) shows that in the semiconductor device of Figure 27(A), wiring 112 is wiring 112A~ It is divided into multiple wires called 112C, and wire 113 is divided into multiple wires 113A~113D The wiring is divided into several parts, and wiring 115 is divided into multiple wirings called wiring 115A to 115G. Therefore, wiring 212 is divided into multiple wirings, namely wirings 212A to 212B. Then, the first terminal of transistor 201 is connected to wire 115D. The first terminal of transistor 202 is connected to wiring 115E, and the gate of transistor 202 It is connected to wiring 113C. Alternatively, the first terminal of transistor 203 is connected to wiring 11 It is connected to 2C. Alternatively, the first terminal of transistor 204 is connected to wire 115F. Alternatively, the first terminal and gate of transistor 205 are connected to wiring 212A. Alternatively, the first terminal of transistor 206 is connected to wiring 212B. The gate of transistor 206 is connected to wiring 113D. Alternatively, transistor 20 The first terminal of 7 is connected to wiring 115G.

[0250] Furthermore, wiring 112A to 112C can have the same function as wiring 112. Alternatively, wiring 113A to 113D can have the same function as wiring 113. Alternatively, wiring 115A~115G can have the same function as wiring 115. Alternatively, wiring 212A to 212B can have the same function as wiring 212. Yes, it is possible to input signal IN1 to wiring 112A~112C. Alternatively, signal IN2 can be input to wiring 113A~113D. Alternatively, voltage V1 can be supplied to wiring 115A~115G. Signal IN4 can be input to wiring 212A~212B. Wiring 112A It is possible to supply different voltages or different signals to ~112C. Alternatively, Lines 113A to 113D can be supplied with different voltages or different signals. Alternatively, separate voltages or signals can be supplied to wiring 115A-115G. Alternatively, separate voltages or separate signals are supplied to wiring 212A and 212B. It is possible.

[0251] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) The structure described in Figures ~(C), 29(A)~(C), 30(A), and 47(A)~(B) In the configuration, some transistors can be omitted. For example, It is possible to omit either transistor 201 or transistor 204. Or, for example, Assume the semiconductor device has a transistor 206. In this case, transistor 205 and the transistor 206 have a transistor 206. It is possible to omit either or both of the 207. Additionally, if necessary, It is possible to omit part of the Rangista.

[0252] Figure 30(B) shows the semiconductor device of Figure 27(A), with transistor 201 and tra This shows a configuration that omits transistor 205. Since the number of transistors is reduced, the layout area is reduced. It can be made smaller. Or, its power consumption can be reduced.

[0253] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) In Figures 29(A)-(C), 30(A)-(B), and 47(A)-(B), In the configuration described, a new capacitive element 220 is connected between node 13 and wiring 211. It is possible to install it there.

[0254] Figure 30(C) shows the semiconductor device in Figure 17(A) connected between node 13 and wiring 211. This shows a configuration in which a new capacitive element 220 is provided. During operation, the potential of node 13 tends to rise. Therefore, the voltage of transistor 203 This allows us to increase gs. As a result, we can reduce the channel width of transistor 203. This can be done by shortening the falling or rising time of the GOUT signal. This is possible. For example, it is possible to use MOS capacitors as capacitive elements.

[0255] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) In Figures 29(A)-(C), 30(A)-(C), and 47(A)-(B) In the configuration described, it is possible to generate a signal other than the GOUT signal. For example, In this embodiment, the semiconductor device generates a signal SOUT in addition to the signal GOUT. And, for example, suppose multiple semiconductor devices are connected. In this case, the signal SOUT is distributed The signal is not output to line 211, but is instead input as a start pulse to another stage of semiconductor equipment. It is possible. Therefore, the delay or smudge of signal SOUT is small compared to signal GOUT. Therefore, it is possible to drive semiconductor devices using signals with small delay or smudge. Therefore, it is possible to reduce the delay of the output signal of the semiconductor device. See Figures 14(A), 16(A), 17(A), 20(A), 21(A), and 23. (A), Figure 25(A), Figure 27(A)~(C), Figure 28(A)~(C), Figure 29(A)~ In the configuration described in (C), Figures 30(A)-(C), and Figures 47(A)-(B), It is possible to install a new 208 inverter.

[0256] Figure 31(A) shows a configuration in which a transistor 208 is newly added to the semiconductor device shown in Figure 17(A). It demonstrates that transistor 208 can have the same function as transistor 203. Yes, they have the same polarity. The first terminal of transistor 208 is connected to wiring 112, The second terminal of transistor 208 is connected to wiring 214 and the gate of transistor 208. It is connected to node 13. Wiring 214 can have the same function as wiring 211. It is possible. And, for example, if multiple semiconductor devices are connected, the wiring 211 is separate It is possible to connect to the wiring 212 of the semiconductor device (for example, the semiconductor device of the next stage). For example, as shown in Figure 31(B), it is possible to add a transistor 209. Yes, transistor 209 can have the same function as transistor 203. It is possible for them to have the same polarity. The first terminal of transistor 209 is connected to wiring 115 and The second terminal of transistor 209 is connected to wiring 214, and transistor 2 The gate 09 is connected to node 12. Note that Figure 31(C) shows the signal GOUT. A timing chart for generating the SOUT signal is shown separately.

[0257] As described above, this embodiment is not limited to the configuration shown in Figure 14(A), but can also be expressed in various other ways. It is possible to use a configuration.

[0258] Next, Figures 10(A)-(C), 14(A), 16(A), 17(A), and 20(A) ), Figure 21(A), Figure 23(A), Figure 25(A), Figure 27(A)~(C), Figure 28(A) ~(C), Figure 29(A)~(C), Figure 30(A)~(C), Figure 31(A)~(B), and In the configuration shown in Figures 47(A) and 47(B), the transistor is a P-channel type transistor. It is possible to use a transistor. Only some of the multiple transistors that the semiconductor device has It is possible for it to be a P-channel type. In other words, the semiconductor device of this embodiment is CMOS It can be a circuit.

[0259] Figure 32(A) shows the semiconductor device in Figure 27(A), where the transistor is a P-channel This shows a configuration in which a transistor of type 2 is used. Transistors 201p to 207p are transistors It has the same functions as the ZISTA 201-207 and is a P-channel type. In such cases, wiring Voltage V2 is supplied to 115. Note that this is shown in the timing chart in Figure 32(B). Sea urchin, signal IN1, signal IN2, signal IN4, signal IN5, potential of node 11, node 1 The potential at point 2, the potential at node 13, and the signal GOUT can be inverted. To record.

[0260] Next, regarding the ratio of channel widths of transistors 201 to 209, and the size of the transistors... I will explain.

[0261] First, transistor 201 supplies potential to wiring 211. Then, the load of wiring 211... This is greater than the load at node 12. Therefore, the channel width of transistor 201 is the circuit The channel width of the transistor is greater than that of 100. In such cases, the transistor The channel width of transistor 201 is preferably no more than 10 times the channel width of transistor 101. It is preferable that it be 5 times or less. Even more preferably, 3 times or less. It is preferable to have one.

[0262] Next, the gate potential of transistor 202 is greater than the gate potential of transistor 201. It changes abruptly. Therefore, the channel width of transistor 202 is the same as the channel width of transistor 201. It is preferable that it be smaller than the channel width. In such cases, the channel of transistor 201 The width is preferably 10 times or less the channel width of transistor 202. It is preferable that the ratio is 7 times or less. More preferably, it is preferable that the ratio is 5 times or less. stomach.

[0263] Next, transistor 203 supplies potential to wiring 211, thereby controlling wiring 211 The potential is changed. And wiring 211 has a large load (e.g., gate signal line, pixel, A transistor or capacitive element is connected. Therefore, the channel of transistor 203 The transistor width is the largest among the transistors in the semiconductor device of this embodiment. For example, The channel width of transistor 203 is preferably 10 times or less than that of transistor 201. It is preferable that it be 5 times or less. Even more preferably that it be 2 times or less. It is preferable to do so.

[0264] Next, transistor 204 supplies potential to node 13. Then, the load of node 13... This is greater than the load of node 12. Therefore, the channel width of transistor 204 is, It is smaller than the channel width of transistor 201. In such cases, the channel of transistor 201 The channel width is preferably 5 times or less the channel width of transistor 204. More preferably... It is preferable that it is three times or less. More preferably, it is preferable that it is two times or less. It's nice.

[0265] Next, by increasing the channel width of transistor 205, in period A, Since the potential change of 13 can be made steeper, the driving frequency of the semiconductor device can be increased. Therefore, the channel width of transistor 205 is equal to that of transistor 201, and It is greater than the channel width of the transistor in circuit 100. Or, transistor 2 The channel width of 05 is smaller than the channel width of transistor 203. In such a case, The channel width of transistor 203 is less than 10 times the channel width of transistor 205. It is preferable that it is 5 times or less. Even more preferably It is preferable that the ratio be 2 times or less.

[0266] Next, transistor 206 supplies potential to node 13, thereby controlling node 13 Maintain the potential. Therefore, the channel width of transistor 206 is the same as that of transistor 205. Smaller than the channel width. In this case, the channel width of transistor 205 is smaller than the channel width. It is preferable that the channel width is three times or less of the channel width of ST206. More preferably, it is two times or less. It is preferable that it be present. More preferably, it is preferable that it be 1.8 times or less.

[0267] Next, transistor 207 supplies potential to node 13, thereby controlling node 13 The potential is reduced. However, by slowing down the decrease in the potential at node 13, during period E... In this state, transistor 203 can be turned on. Thus, in period E Since transistor 203 can supply potential to wiring 211, The potential can be lowered quickly. Therefore, the channel width of transistor 207 is It is preferable that it be smaller than the channel width of transistor 205. In such cases, transistor 2 The channel width of 05 should preferably be 10 times or less the channel width of transistor 207. More preferably, it is 7 times or less. Even more preferably, it is 5 times or less. It is preferable to do so.

[0268] Next, transistor 208 supplies potential to wiring 214. Then, the load of wiring 214... This is smaller than the load on wiring 211. Therefore, the channel width of transistor 208 is, It is smaller than the channel width of transistor 203. In such cases, the channel of transistor 203 The channel width is preferably 10 times or less the width of transistor 208. More preferably 7 It is preferable that it is two times or less. More preferably, it is preferable that it is four times or less.

[0269] Next, transistor 209 supplies potential to wiring 214. Then, the load of wiring 214... This is smaller than the load on wiring 211. Therefore, the channel width of transistor 209 is, It is smaller than the channel width of transistor 203. In such cases, the channel of transistor 203 The channel width is preferably 7 times or less the channel width of transistor 209. More preferably... More preferably, it is 4 times or less. Even more preferably, it is 2.5 times or less. It seems so.

[0270] Furthermore, considering the channel width ratio of the above transistors, the channel of transistor 201 The flannel width is preferably 1000 μm or more and 5000 μm or less. The channel width of transistor 201 must be between 1500 μm and 4000 μm. Preferably, the channel width of transistor 201 is 2000 μm or more, and 3 It is preferable that the channel width of transistor 202 is 000 μm or less. Alternatively, the channel width of transistor 202 is 2 Preferably, the particle size is 00 μm or more and 3000 μm or less. More preferably, 300 μm or less. Preferably, the particle size is 2000 μm or less. More preferably, it is 400 μm or more, and 10 It is preferable that the channel width of transistor 203 be 00 μm or less. Alternatively, the channel width of transistor 203 is 20 Preferably, the thickness is between 00 μm and 30000 μm. More preferably, 3000 μm. Preferably, it is between m and 15000 μm. More preferably, it is 4000 μm or less. Preferably, the channel of transistor 204 is 10,000 μm or less. The width is preferably 200 μm or more and 2500 μm or less. More preferably 40 Preferably, the particle size is 0 μm or more and 2000 μm or less. More preferably, it is 700 μm or less. Preferably, it is 1500 μm or less. Alternatively, the channel width of transistor 205. It is preferably 500 μm or more and 3000 μm or less. More preferably 1000 Preferably, the particle size is between μm and 2500 μm. More preferably, it is 1500 μm or less. Preferably, the channel width of transistor 206 is 2000 μm or less. It is preferably 300 μm or more and 2000 μm or less. More preferably 500 μm. It is preferable that the thickness is between m and 1500 μm. More preferably, it is between 800 μm and 1 It is preferable that the channel width of transistor 207 is 300 μm or less. Alternatively, the channel width of transistor 207 is 1 Preferably, the thickness is between 00 μm and 1500 μm. More preferably, it is 300 μm or less. Preferably, the particle size is 1000 μm or less. More preferably, it is 400 μm or more, and 80 It is preferable that it be 0 μm or less. Alternatively, the channel width of transistor 208 is 300 Preferably, it is 500 μm or more and 5000 μm or less. More preferably, it is 500 μm or more. It is preferable that the particle size is 2000 μm or less. More preferably, it is 800 μm or more, and 1500 μm or more. It is preferable that it is less than or equal to m. Alternatively, the channel width of transistor 209 is 200 μm. Preferably, the thickness is 2000 μm or less. More preferably, the thickness of transistor 209 The channel width is preferably 400 μm or more and 1500 μm or less. More preferably The channel width of transistor 209 must be between 500 μm and 1000 μm. It is preferable.

[0271] (Embodiment 3) In this embodiment, a display device, pixels of the display device, and a shift register of the display device The shift register circuit will be described below. It is possible to have the semiconductor device described in state 2.

[0272] First, let's explain the display device by referring to Figures 33(A) to (D). The display device is a circuit It has 1001, circuit 1002, circuit 1003_1, pixel section 1004, and terminal 1005. Multiple wires extend from circuit 1003_1 and are arranged in the pixel section 1004. Yes, it is possible. These multiple wires can function as gate signal lines or scan lines. It is possible. Alternatively, multiple wires extend from the circuit 1002 and are arranged in the pixel section 1004. It is possible for these multiple wires to function as video signal lines or data lines. And, multiple wires are arranged extending from circuit 1003_1, and from circuit 1002 Multiple pixels are arranged in correspondence with multiple wirings that are extended and arranged from there. For example, pixels Various other wiring can be placed in section 1004. This wiring is a gate It can function as a signal line, data line, power line, or capacitance line, among other things.

[0273] Furthermore, circuit 1001 supplies signals, voltages, or currents to circuits 1002 and 1003. It has the function of supplying. Alternatively, circuit 1001 has the function of supplying circuit 1002 and circuit 1003 It has a control function. Thus, circuit 1001 is a controller, control circuit, timing It can function as a power generator, power supply circuit, or regulator, etc. be.

[0274] Furthermore, circuit 1002 has the function of supplying video signals to the pixel unit 1004. Or, Circuit 1002 has a function to control the brightness or transmittance of the pixels in the pixel section 1004. In this way, circuit 1002 is a drive circuit, source driver, or signal line drive circuit. It has a function as such.

[0275] Circuits 1003_1 and 1003_2 receive the scan signal or gate signal from the pixel unit 1. It has the function of supplying to 004. Alternatively, circuits 1003_1 and 1003_2 are diagrams. The element unit 1004 has a function to select pixels. Thus, circuit 1003_1 and Circuit 1003_2 has the function of a drive circuit, gate driver, or scan line drive circuit. Note that circuits 1003_1 and 1003_2 can drive the same wiring. Furthermore, it is possible to drive separate wiring. For example, circuit 1003_1 has an odd number of stages. The gate signal line of the eye is driven, and circuit 1003_2 drives the gate signal lines of the even-numbered stages. This is possible.

[0276] Note that circuits 1001, 1002, 1003_1, and 1003_2 are pixels It is possible to form it on the same substrate 1006 as part 1004, and it is separate from the pixel part 1004. It can be formed on a substrate (for example, a semiconductor substrate or an SOI substrate).

[0277] Figure 33(A) shows that circuit 1003_1 is formed on the same substrate 1006 as the pixel section 1004. This shows a configuration in which circuits 1001 and 1002 are formed on a separate substrate from the pixel section 1004. The drive frequency of circuit 1003_1 is slower compared to circuit 1001 or circuit 1002. For the semiconductor layer of a transistor, non-single-crystal semiconductors, amorphous semiconductors, microcrystalline semiconductors, and acid This makes it easier to use synthetic semiconductors, organic semiconductors, etc. As a result, the size of the display device can be increased. It is possible to manufacture display devices inexpensively.

[0278] Figure 33(B) shows that circuits 1003_1 and 1003_2 are on the same substrate as the pixel unit 1004. Circuits 1001 and 1002 are formed on 1006 and on a separate substrate from the pixel section 1004. The configuration is shown. The driving frequencies of circuits 1003_1 and 1003_2 are as follows: It is slower compared to circuit 01 or circuit 1002. Therefore, as the semiconductor layer of the transistor, non-single Using crystalline semiconductors, amorphous semiconductors, microcrystalline semiconductors, oxide semiconductors, organic semiconductors, etc. This makes it easier. As a result, the display device can be made larger. Display devices can be manufactured at low cost. It is possible.

[0279] Figure 33(C) shows circuits 1002, 1003_1, and 1003_2 in the pixel section 1 The circuit 1001 is formed on the same substrate 1006 as 004, and is formed on a different substrate from the pixel section 1004. This shows the resulting configuration.

[0280] Figure 33(D) shows a portion of circuit 1002, specifically circuit 1002a, circuit 1003_1, and circuit 1003_2 is formed on the same substrate 1006 as the pixel section 1004, and circuit 1001 and circuit 1 This shows a configuration in which the circuit 1002b of another part of 002 is formed on a separate substrate from the pixel part 1004. In this case, circuit 1002a includes a switch, a shift register, and / or a selector. It is possible to use circuits with low drive frequencies, such as kuta.

[0281] Next, the pixels of the pixel unit 1004 will be explained with reference to Figure 33(E). Pixel 3 020 has a transistor 3021, a liquid crystal element 3022, and a capacitive element 3023. The first terminal of transistor 3021 is connected to wiring 3031, and transistor 3021 The second terminal is in contact with one electrode of the liquid crystal element 3022 and one electrode of the capacitive element 3023. The gate of transistor 3021 is connected to wiring 3032. Liquid crystal element 302 The other electrode of 2 is connected to electrode 3034, and the other electrode of capacitive element 3023 is connected to wiring 3 It connects to 033.

[0282] The video signal is input to wiring 3031 from circuit 1002, as described in Figures 33(A) to (D). Therefore, wiring 3031 functions as a signal line, video signal line, or source signal line. It is possible to have the following. The wiring 3032 has the circuit 10 described in Figures 33(A) to (D). 03_1, and / or a scan signal, selection signal, or gate signal is input from circuit 1003_2. Therefore, wiring 3032 functions as a signal line, scan line, or gate signal line. It is possible to have. Wiring 3033 and electrode 3034 are shown in Figures 33(A) to (D). A constant voltage can be supplied from the circuit 1001 described. Therefore, wiring 303 3 can function as a power line or a capacitance line. Alternatively, electrode 303 4 can function as a common electrode or a counter electrode. For example, wiring 3 A precharge voltage can be supplied to 031. The precharge voltage is an electric This value is approximately equal to the voltage supplied to pole 3034. As another example, wiring 3033 A signal can be input to this. Thus, the voltage applied to the liquid crystal element 3022 This allows for control over the amplitude of the video signal, enabling features such as reduced amplitude and inverted drive. It is possible. As another example, a signal can be input to electrode 3034. This enables frame inversion drive.

[0283] Transistor 3021 is in a state of electrical conductivity between wiring 3031 and one electrode of liquid crystal element 3022. It has a function to control the timing of writing the video signal to the pixels. It has the ability. Thus, transistor 3021 has the function of a switch. The liquid crystal element 3023 is connected to the potential of one electrode of the liquid crystal element 3022 and the potential of the wiring 3033. It has a function to maintain the position difference, or to keep the voltage applied to the liquid crystal element 3022 constant. It has the function of holding in this manner. Thus, the capacitive element 3023 has the function of a holding capacitor. It holds.

[0284] Next, the shift register circuit will be explained with reference to Figure 34. The path is included in circuit 1002, circuit 1003_1, and / or circuit 1003_2. This is possible.

[0285] The shift register circuit 1100 is a flip-flop circuit 1101_1~1101_N(N It has multiple flip-flop circuits (where is a natural number). Note that flip-flop circuit 1 101_1 to 1101_N are semiconductors described in Embodiment 1 and Embodiment 2, respectively. It is possible to use the device.

[0286] The shift register circuit 1100 has wiring 1111_1~1111_N, wiring 1112, wiring It is connected to wires 1113, 1114, 1115, and 1116. In the flop-up circuit 1101_i (where i is a natural number from 1 to N), wiring 2 Wire 11 is connected to wire 1111_i, wire 112 is connected to wire 1112, and wire 1 Wire 13 is connected to wire 1113, and wire 212 is connected to wire 1111_i-1, Wire 213 is connected to wiring 1111_i+1, and wiring 115 is connected to wiring 1115. However, the odd-numbered flip-flop circuits and the even-numbered flip-flop circuits The connections of wire 112 and wire 113 are reversed. Note that the flip-flop circuit 110 In 1_1, wiring 212 is connected to wiring 1114. Note that the flip-flop circuit In path 1101_N, wiring 213 is connected to wiring 1116.

[0287] Next, we will explain an example of the signals or voltages input to or output to each wire, and the function of each wire. The signals GOUT_1 to GOUT_N are respectively transmitted from wiring 1111_1 to 1111_N. The following is output. Signals GOUT_1 to GOUT_N are each from the flip-flop circuit 110. It is often the output signal of 1_1~1101_N and has the same function as the GOUT signal. This is possible. Therefore, wiring 1111_1~1111_N functions similarly to wiring 211. It is possible to have this capability. Signal GCK1 is input to wiring 1112, and wiring 111 Signal GCK2 is input to 3. Signal GCK1 is the same as signal IN2 or signal IN3. It is possible to have the following functions, and signal GCK2 is similar to signal IN2 or signal IN3. It is possible to have the function. Therefore, wiring 1112 is connected to wiring 112 or wiring 113. It is possible to have similar functions, and wiring 1113 is the same as wiring 112 or wiring 113. It is possible to have the following functions. The signal GSP is input to wiring 1114. GSP can have the same function as signal IN4. Therefore, wiring 1114 It can have the same function as wiring 212. Voltage V1 is supplied to wiring 1115. It is supplied. Therefore, wiring 1115 can have the same function as wiring 115. The signal GRE is input to wiring 1116. The signal GRE has the same function as signal IN5. It is possible to have this. Therefore, wiring 1116 has the same function as wiring 213. It is possible.

[0288] Next, regarding the operation of the shift register circuit in Figure 34 during one frame, see the timing in Figure 35. I will explain by referring to the chart.

[0289] For example, suppose the signal GOUT_i-1 becomes high. Then, the flip-flop circuit 1101_i starts operation during period C. Subsequently, signals GCK1 and GC are activated. When K2 is inverted, the flip-flop circuit 1101_i begins operation during period D. Therefore, signal GOUT_i becomes high level. Signal GOUT_i is a flip-flop Since it is input to the flip-flop circuit 1101_i+1, the flip-flop circuit 1101_i+1 Then, the operation in period C begins. After that, signals GCK1 and GCK2 are inverted. Then, the flip-flop circuit 1101_i+1 begins operation during period D. The signal GOUT_i+1 becomes high level. The signal GOUT_i+1 is flip-flop Since it is input to the flip-flop circuit 1101_i, the flip-flop circuit 1101_i operates during period E. The operation at [location] begins. Therefore, the signal GOUT_i becomes L level. After that, the signal G Each time CK1 and signal GCK2 are inverted, the flip-flop circuit 1101_i performs the following operation: The operation in period A and the operation in period B are repeated alternately. Therefore, the signal GOUT_i It is maintained at the L level. Note that in Figure 35, one of the signals GCK1 and GCK2 is GC This is denoted as K.

[0290] The shift register in this embodiment is a semiconductor device as described in Embodiments 1 and 2. It is possible to use this. Therefore, the H level values ​​of signals GOUT_1 to GOUT_N This allows us to raise the voltage up to V2, thus increasing the time during which the transistors in the pixels are turned on. This allows for longer recording times. As a result, the video signal can be written to the pixels with sufficient time. Therefore, the display quality can be improved. Alternatively, signals GOUT_1~GOUT_N Since the fall time and rise time can be shortened, the selected row belongs This prevents the video signal intended for a pixel belonging to a different row from being written to that pixel. This can be done. As a result, the display quality can be improved. Alternatively, signal GOUT_1 ~This can suppress variations in the falling time of GOUT_N, so the pixels retain This can suppress variations in the effect of feedthrough to the video signal. It can suppress display irregularities such as loss talk. Alternatively, the size of the transistor can be reduced. This allows for reducing the load on the shift register (e.g., parasitic capacitance). This allows for the supply of signals or voltages to the shift register. The circuit, and its current supply capacity, can be reduced, thus reducing the size of the external circuit, or the The size of display devices with external circuits can be reduced.

[0291] (Embodiment 4) This embodiment describes a signal line driving circuit. Note that the signal line driving circuit is a semiconductor device. It can be described as a circuit or a signal generation circuit.

[0292] First, the configuration of the signal line drive circuit will be explained with reference to Figure 36(A). The path has circuits 2001 and 2002. Circuit 2002 is a combination of circuits 2002_1 and 2002_1. It has multiple circuits called 2002_N (where N is a natural number). Circuits 2002_1~2002_ N is a set of multiple transistors, each called transistor 2003_1 to 2003_k (where k is a natural number). It has transistors. Transistors 2003_1 to 2003_k are N-channel type. However, it is not limited to this; transistors 2003_1 to 2003_k are P-channel type. It is possible to do so, and it is also possible to use a CMOS type switch.

[0293] The connection relationships of the signal line drive circuit will be explained using circuit 2002_1 as an example. Transis The first terminals of TA2003_1~2003_k are connected to wiring 2004_1~2004_k, respectively. The second terminals of transistors 2003_1 to 2003_k are connected to the wiring S. It is connected to 1~Sk. The gate of transistor 2003_1~2003_k is wired to 20 It connects to 05_1.

[0294] Circuit 2001 outputs high-level signals sequentially to wiring 2005_1 to 2005_N. It has a function to control the timing. Alternatively, select circuits 2002_1 to 2002_N in order. It has a selection function. Thus, circuit 2001 has the function of a shift register. Circuit 2001 sends high-level signals in various order to wiring 2005_1 to 2005_N. It is possible to output. Alternatively, circuits 2002_1 to 2002_N can be selected in various orders. It is possible to select. Thus, circuit 2001 has the function of a decoder. It is possible.

[0295] Circuit 2002_1 is a circuit where wiring 2004_1~2004_k and wiring S1~Sk are electrically connected. It has a function to control the timing. Alternatively, circuit 2002_1 is connected to wiring 2004_1~2 This has a function to control the timing of supplying the potential of 004_k to the wiring S1~Sk. Thus, circuit 2002_1 can function as a selector. Circuits 2002_2 to 2002_N can have the same functionality as circuit 2002_1. That is the case.

[0296] Transistors 2003_1 to 2003_N are connected to wiring 2004_1 to 2004_k respectively. It has a function to control the timing of the conductivity between wiring S1 and Sk. Alternatively, a transistor 2003_1 to 2003_N each control the potential of wiring 2004_1 to 2004_k, respectively, through wiring S. It has a function to control the timing of supplying 1 to Sk. For example, transistor 2003 _1 has the function of controlling the timing at which wiring 2004_1 and wiring S1 become electrically connected. Alternatively, transistor 2003_1 supplies the potential of wiring 2004_1 to wiring S1. It has a function to control the timing. Thus, transistor 2003_1~2003_ Each of the N components can function as a switch.

[0297] Furthermore, signals are input to wiring 2004_1 to 2004_k, respectively. These signals are used for the picture. It is an analog signal corresponding to image information or an image signal. Thus, the signal is a video signal. It is possible to have the function of such a thing. Therefore, wiring 2004_1~2004_k is It can function as a signal line. For example, depending on the pixel configuration, it can function as a digital signal line. It can be a signal, it can be an analog voltage, and it can be an analog current. It is possible that this is the case.

[0298] Next, regarding the operation of the signal line drive circuit in Figure 36(A), see the timing chart in Figure 36(B). Refer to the diagram for explanation. Figure 36(B) shows signals 2015_1 to 2015_N, and signal Signals 2014_1 to 2014_k are shown. Signals 2015_1 to 2015_N are, respectively, in circuit 2. These are the output signals of 001, and signals 2014_1 to 2014_k are, respectively, connected to wiring 2004_1 This is the signal input to ~2004_k. Note that the operating period of the signal line drive circuit is the display device This corresponds to the 1-gate selection period in the configuration. The 1-gate selection period is period T0 and period T1 The period is divided into TN. During period T0, the pixels belonging to the selected row are charged for precharging. This is a period for applying pressure simultaneously and can function as a pre-charge period. It is possible. During periods T1 to TN, the video signal is written to the pixels belonging to the selected row. This is a period for writing, and it can function as a writing period.

[0299] First, during period T0, circuit 2001 has H level wiring 2005_1~2005_N. The signal is supplied. Then, for example, in circuit 2002_1, transistor 200 Since 3_1~2003_k will be turned on, wires 2004_1~2004_k and wire S1 ~Sk becomes conductive. At this time, wiring 2004_1~2004_k has prechart The precharge voltage Vp is supplied. Therefore, the precharge voltage Vp is the transistor 2003_ Outputs are sent to wiring S1 to Sk via 1 to 2003_k. Therefore, the preacher The voltage Vp is written to the pixels belonging to the selected row, so the pixels belonging to the selected row The base is pre-charged.

[0300] During periods T1 to TN, circuit 2001 receives a high-level signal via wiring 2005_1 to 2 Outputs to 005_N in order. For example, during period T1, circuit 2001 outputs H level The signal is output to wiring 2005_1. Then, transistors 2003_1~2003_k Since it turns on, wiring 2004_1~2004_k and wiring S1~Sk become conductive. Yes. At this time, the wiring 2004_1~2004_k will have Data(S1)~Data( Sk) is input. Data(S1) to Data(Sk) are each from transistor 20 Through 03_1~2003_k, the pixels belonging to the selected row, from column 1 to column k It is written to the pixel. In this way, for the period T1 to TN, the pixels belonging to the selected row are written to The video signal is written sequentially, in k columns at a time.

[0301] As described above, the video signal is written to the pixels in multiple columns, The number of connections or wires can be reduced. Therefore, the number of connections to external circuits can be reduced. Therefore, it is possible to improve yield, improve reliability, reduce the number of parts, and / or reduce costs. This can reduce the amount of data. Alternatively, by writing the video signal to the pixels in multiple columns, This allows for longer writing times, thus preventing insufficient writing of the video signal. This allows for an improvement in the quality of the displayed information.

[0302] Furthermore, increasing k can reduce the number of connections to external circuits. However, If k is too large, the time it takes to write to the pixels decreases. Therefore, it is preferable that k ≤ 6. It is preferable that k ≤ 3. Even more preferable that k = 2. This is preferable.

[0303] In particular, if a pixel has n color elements (where n is a natural number), then k = n, or k = n × d (where d is a natural number). It is preferable that the number is natural. For example, if the color elements of a pixel are red (R), green (G), and blue (B) When divided into three parts, it is preferable that k=3 or k=3×d. For example, pixels m (where m is a natural number) subpixels (subpixels are also called sub-pixels or secondary pixels) When divided into parts, it is preferable that k=m or k=m×d. For example, if there are 2 pixels When divided into subpixels, it is preferable that k=2. Alternatively, if the color elements of the pixel are n If there are individual elements, it is preferable that k = m × n or k = m × n × d.

[0304] For example, this embodiment is used in a display device. In this case, the signal line driving circuit of this embodiment is It is possible to form it on the same substrate as the pixel portion, or on a different substrate from the pixel portion (for example, silicon It can be formed on a substrate (such as a crystalline substrate or SOI substrate). Alternatively, the crystalline of this embodiment A portion of the line drive circuit (for example, circuit 2002) is formed on the same substrate as the pixel section, in the form of this embodiment. Another part of the signal line driving circuit (e.g., circuit 2001) is formed on a separate substrate from the pixel section. It is possible.

[0305] Figure 36(C) shows that circuits 2001 and 2002 are formed on the same substrate as the pixel section 2007. This shows the configuration. In this way, the number of connections between the substrate on which the pixel section is formed and the external circuit is reduced. This allows for improved yield, increased reliability, reduced number of parts, or reduced costs. This can be achieved in particular with scan line drive circuit 2006A and scan line drive circuit 2006B By forming it on the same substrate as the pixel section 2007, the number of connections to external circuits is further reduced. It can be done.

[0306] Figure 36(D) shows that circuit 2002 is formed on the same substrate as pixel unit 2007, and pixel unit 200 7 shows a configuration in which the circuit 2001 is formed on a separate substrate. In this case as well, the pixel portion is formed. This reduces the number of connections between the circuit board and external circuits, thereby improving yield and reliability. Furthermore, it is possible to reduce the number of parts or reduce costs. Alternatively, the pixel section 2007 Since fewer circuits are formed on the same substrate, the bezel can be made smaller.

[0307] Furthermore, the shift register circuit of Embodiment 3 can be used as circuit 2001. This makes it possible to make the polarity of all transistors N-channel type, It is possible to reduce the number of manufacturing steps, or to suppress the degradation of transistors. Therefore, the lifespan of the signal line drive circuit can be extended.

[0308] (Embodiment 5) In this embodiment, a protection circuit will be described. The protection circuit is a semiconductor connected to a certain wiring. Body devices (such as transistors, capacitive elements, circuits, etc.) are susceptible to ESD (electrostatic discharge). Therefore, it is provided for the purpose of preventing destruction.

[0309] First, the protection circuit will be explained with reference to Figure 37(A). Protection circuit 3000 is a trap It has transistor 3001 and transistor 3002. The transistor 3002 is assumed to be an N-channel type. However, this embodiment is not limited to this. It is not fixed and can be a P-channel type.

[0310] The connection relationships of the protection circuit 3000 will be explained. The first terminal of transistor 3001 is: The second terminal of transistor 3001 is connected to wiring 3012 and to wiring 3011. The gate of transistor 3001 is connected to wiring 3011. Transistor 300 The first terminal of transistor 2 is connected to wiring 3013, and the second terminal of transistor 3002 is connected to wiring The gate of transistor 3002 is connected to wire 3013, and wire 3011 is connected to the gate of transistor 3002.

[0311] Examples of signals or voltages input to wiring 3011-3013, and the functions of these wirings. This will be explained. Wiring 3011 carries signals (e.g., scan signals, video signals, clock signals). Signals, start signals, reset signals, or selection signals, or voltage (negative power supply voltage, etc.) Land voltage, positive power supply voltage, etc. are supplied. Therefore, wiring 3011 is a signal line, power line It can have functions such as the above. Wiring 3012 has a positive power supply voltage (VDD) This is supplied. Therefore, wiring 3012 can function as a power line. Wiring 3013 is supplied with a negative power supply voltage (VSS) or ground voltage, etc. Therefore, wiring 3013 can function as a power line.

[0312] The operation of protection circuit 3000 will be explained. The potential of wiring 3011 is approximately VSS~VD If the value is between D, transistors 3001 and 3002 will be turned off. Therefore, the voltage or signal supplied to wiring 3011 is connected to the semiconductor It is supplied to the body device. However, due to the effects of static electricity, etc., the power supply may be affected by the wiring 3011. A potential higher than the voltage, or a potential lower than the power supply voltage, is supplied. And this power supply voltage The semiconductor device connected to wiring 3011 is either at a higher potential or at a potential lower than the power supply voltage. The vise may be damaged. To prevent electrostatic discharge damage to such semiconductor devices... When transistor 3001 or transistor 3002 is turned on, wiring 30 Suppress the change in 11. For example, when a potential higher than the power supply voltage is supplied to wiring 3011. In total, transistor 3001 turns on. Then, the charge on wire 3011 is transferred to the transistor. Since the current moves to wiring 3012 via 3001, the potential of wiring 3011 decreases. This prevents electrostatic discharge damage to semiconductor devices. On the other hand, for example, in wiring 3011 When a potential lower than the power supply voltage is supplied, transistor 3002 turns on. The charge on wire 3011 is transferred to wire 3013 via transistor 3002, The potential of wiring 3011 rises. In this way, the semiconductor device connected to wiring 3011 It can prevent electrostatic discharge.

[0313] In the configuration described in Figure 37(A), transistor 3001 and transistor 3 One of the 002s can be omitted. Figure 37(B) shows the protection circuit of Figure 37(A). In this configuration, transistor 3002 is omitted. Figure 37(C) shows the configuration in which transistor 3002 is omitted. The protection circuit in A) shows a configuration in which transistor 3001 is omitted.

[0314] In the configuration described in Figures 37(A) to (C), between wiring 3011 and wiring 3012 It is possible to connect multiple transistors in series. Alternatively, wiring 3011 and It is possible to connect multiple transistors in series between line 3013. (Figure 37) D) In ​​the protection circuit of Figure 37(A), between wiring 3011 and wiring 3012, This shows a configuration in which transistor 3001 and transistor 3003 are connected in series. Between wiring 3011 and wiring 3013, transistors 3002 and 3004 This shows a configuration in which the transistors are connected in series. The first terminal of transistor 3003 is connected to wiring 3012. Connected, the second terminal of transistor 3003 is connected to the first terminal of transistor 3001. The gate of transistor 3003 is connected to the first terminal of transistor 3001. The first terminal of transistor 3004 is connected to wiring 3013, and the transistor The second terminal of 3004 is connected to the first terminal of transistor 3002, and the transistor The gate of transistor 3004 is connected to the first terminal of transistor 3004. See, for example, Figure 37. As shown in (E), the gate of transistor 3001 and the gate of transistor 3003 It is possible to connect the gate of transistor 3002 and the transistor. It is possible to connect to gate 3004, or to wiring 3011 and wiring 301 Between 2 and between wiring 3011 and wiring 3013, multiple transistors It is possible to connect the two devices in series.

[0315] In the configuration described in Figures 37(A) to (E), between wiring 3011 and wiring 3012 It is possible to connect multiple transistors in parallel. Alternatively, wiring 3011 and Multiple transistors can be connected in parallel between wiring 3013 and the circuit shown in Figure 37. (F) In the protection circuit of Figure 37(A), between wiring 3011 and wiring 3012, This shows a configuration in which transistors 3001 and 3003 are connected in parallel. Between wiring 3011 and wiring 3013, transistors 3002 and 3004 This shows a configuration in which the two are connected in parallel. The first terminal of transistor 3003 is connected to wiring 3012 The second terminal of transistor 3003 is connected to wiring 3011, and the transistor The gate of transistor 3003 is connected to wiring 3011. The first terminal of transistor 3004 The child is connected to wiring 3013, and the second terminal of transistor 3004 is connected to wiring 3011. The gate of transistor 3004 is connected to wiring 3013.

[0316] In the configuration described in Figures 37(A) to (F), the gate of the transistor and the first terminal It is possible to connect a capacitive element and a resistive element in parallel between them. It is possible to connect only one of the capacitive element or the resistive element between the terminal and the first terminal. Figure 37(G) shows the protection circuit of Figure 37(A), where the gate of transistor 3001 A capacitive element 3005 and a resistive element 3006 are connected in parallel between the terminal and the first terminal. This shows the result. Then, between the gate of transistor 3002 and the first terminal, capacitive element 30 This shows a configuration in which 07 and resistor element 3008 are connected in parallel. In this way, the protection circuit 3000 It can prevent damage or deterioration of the body. For example, if the wiring 3011 has a voltage higher than the power supply voltage When potential is supplied, the Vgs of transistor 3001 increases. Therefore, Since transistor 3001 turns on, the potential of wiring 3011 decreases. However, the transistor A large voltage is applied between the gate and the second terminal of the 3001 transistor. 3001 can be destroyed or degraded. To prevent this, Transis The gate potential of transistor 3001 is increased to decrease the Vgs of transistor 3001. To achieve this, a capacitive element 3005 is used. Transistor 3001 is turned on. When this happens, the potential of the first terminal of transistor 3001 rises instantaneously. Then the capacitance element The capacitive coupling of transistor 3005 causes the gate potential of transistor 3001 to rise. This makes it possible to reduce the Vgs of transistor 3001, and transistor 3001 Damage or deterioration can be suppressed. Similarly, the wiring 3011 is at a potential lower than the power supply voltage. When power is supplied, the potential of the first terminal of transistor 3002 decreases instantaneously. The capacitive coupling of the capacitive element 3007 reduces the gate potential of transistor 3002. This allows the Vgs of transistor 3002 to be reduced, so the transistor This can suppress the destruction or deterioration of STA3002.

[0317] Furthermore, the parasitic capacitance between the gate and the first terminal of the transistor is used as the capacitive element. This is possible. Therefore, the material used as the gate of a transistor and the transistor The area where the material used as the first terminal of the transistor overlaps with the material used as the gate of the transistor. The overlapping area between the material that can be used and the material used as the second terminal of the transistor is greater than Larger is preferable.

[0318] The resistive element is the material used in wiring 3011 or the gate of the transistor. Materials with lower conductivity than the materials used (for example, the same material as the pixel electrode, a translucent electrode, etc.) It is possible to use semiconductor layers (such as those doped with pure substances).

[0319] Here, the protection circuits described in Figures 37(A) to (G) are various circuits or wiring (for example, signal lines). Drive circuit, scan line drive circuit, level shift circuit, gate signal line, source signal line, power line, It can be used for capacitance lines, etc. Figure 38(A) shows a protection circuit on the gate signal line. The configuration when provided is shown. In this case, wiring 3012 and wiring 3013 are gate dry It can be connected to any of the wires connected to the BA3100. Therefore, the number of power supplies and wiring can be reduced. Figure 38(B) shows FPC, etc. This shows the configuration when a protection circuit is provided at a terminal to which a signal or voltage is supplied from the outside. In this case, wiring 3012 and wiring 3013 can be connected to either of the external terminals. For example, wiring 3012 is connected to terminal 3101a, and wiring 3013 is connected to terminal 310 Assume that it is connected to 1b. In this case, in the protection circuit provided at terminal 3101a, The transistor 3001 can be omitted. Similarly, the transistor provided at terminal 3101b In the protection circuit, transistor 3002 can be omitted. Therefore, the number of transistors can be reduced, thus reducing the layout area. It is possible.

[0320] (Embodiment 6) In this embodiment, the transistor is described with reference to Figures 39(A), (B), and (C). explain.

[0321] Figure 39(A) shows a top-gate type transistor and a display element formed on it. This is a diagram. Figure 39(B) shows a bottom-gate type transistor and the surface formed on it. This is a diagram showing the elements.

[0322] The transistor in Figure 39(A) consists of a substrate 5260 and an insulating layer formed on the substrate 5260. 5261 and formed on the insulating layer 5261, region 5262a, region 5262b, region 5 A semiconductor layer 5262 having region 262c, region 5262d, and region 5262e, and semiconductor layer 52 An insulating layer 5263 is formed to cover 62, and the semiconductor layer 5262 and the insulating layer 5263 A conductive layer 5264 is formed on top of the insulating layer 5263 and the conductive layer 5264, An insulating layer 5265 having an opening, and a shape formed on the insulating layer 5265 and in the opening of the insulating layer 5265. It has a conductive layer 5266 formed therein.

[0323] The transistor in Figure 39(B) consists of a substrate 5300 and a conductive layer formed on the substrate 5300. 5301, an insulating layer 5302 formed to cover the conductive layer 5301, and the conductive layer 5301 and a semiconductor layer 5303a formed on the insulating layer 5302, and on the semiconductor layer 5303a The semiconductor layer 5303b is formed, and on the semiconductor layer 5303b and on the insulating layer 5302 A conductive layer 5304 is formed, and an insulating layer 5302 and a conductive layer 5304 are formed on top of it. An insulating layer 5305 having an opening, and formed on the insulating layer 5305 and in the opening of the insulating layer 5305 It has a conductive layer 5306.

[0324] The transistor in Figure 39(C) is located on a semiconductor substrate 53 having regions 5353 and 5355. 52, an insulating layer 5356 formed on the semiconductor substrate 5352, and the semiconductor substrate 5352 An insulating layer 5354 is formed on top of the insulating layer 5356, and a conductive layer 5357 is formed on top of the insulating layer 5356. Formed on insulating layer 5354, insulating layer 5356, and conductive layer 5357, and having openings An insulating layer 5358 and a conductive layer formed on the insulating layer 5358 and in the openings of the insulating layer 5358. It has 5359. Thus, region 5350 and region 5351 are each a transistor It is created.

[0325] Furthermore, in the transistors described in Figures 39(A) to (C), as shown in Figure 39(A) On top of the transistor, on top of the conductive layer 5266 and on top of the insulating layer 5265, openings An insulating layer 5267 having and formed on the insulating layer 5267 and in the openings of the insulating layer 5267 A conductive layer 5268 is formed on the insulating layer 5267 and on the conductive layer 5268, and the opening is An insulating layer 5269 having and formed on the insulating layer 5269 and in the opening of the insulating layer 5269 A light-emitting layer 5270 and a conductive layer 52 formed on the insulating layer 5269 and on the light-emitting layer 5270. It is possible to form 71 and .

[0326] Furthermore, in the transistors described in Figures 39(A) to (C), as shown in Figure 39(B) A liquid crystal layer is placed on top of the transistor, on top of the insulating layer 5305 and on top of the conductive layer 5306. It is possible to form 5307 and a conductive layer 5308 formed on the liquid crystal layer 5307. That is the case.

[0327] The insulating layer 5261 can function as an undercoat. The insulating layer 5354 is between elements. It functions as a separation layer (e.g., a field oxide film). Insulating layer 5263, insulating layer 5302, The insulating layer 5356 can function as a gate insulating film. The conductive layer 5264, The electrode layer 5301 and the conductive layer 5357 can function as gate electrodes. Insulating layer 5265, insulating layer 5267, insulating layer 5305, and insulating layer 5358 are interlayer films or flat It can function as a film. Conductive layer 5266, conductive layer 5304, and conductive layer 5 359 can function as wiring, a transistor electrode, or a capacitive element electrode, etc. It is possible. The conductive layer 5268 and the conductive layer 5306 are used as pixel electrodes or reflective electrodes, etc. It is possible for it to function. The insulating layer 5269 can function as a partition. The conductive layer 5271 and the conductive layer 5308 function as counter electrodes or common electrodes, etc. This is possible.

[0328] Substrates 5260 and 5300 are glass substrates, quartz substrates, semiconductor substrates (e.g., silica (Single crystal substrates, or single crystal substrates), SOI substrates, plastic substrates, metal substrates, stainless steel substrates , substrates with stainless steel foil, tungsten substrates, tungsten foil Examples include substrates having or flexible substrates. Examples of glass substrates include barium borosilicate glass. Examples include aluminoborosilicate glass. Flexible substrates include polyethylene terephthalate. Polyethylene naphthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (P) Examples include plastics such as ES, or flexible synthetic resins such as acrylic. In addition, laminated films (polypropylene, polyester, vinyl, polyfluorinated vinyl) Paper containing fibrous materials (such as polyvinyl chloride, polyvinyl chloride, etc.), base film (polyester, polyamide, polyamide, polyvinyl chloride, etc.) Examples include mids, polyimides, inorganic vapor-deposited films, and paper products.

[0329] As the semiconductor substrate 5352, a single-crystal Si substrate having an n-type or p-type conductivity is used. This is possible. However, it is not limited to this, and can be used on the semiconductor substrate 5352. The substrate can also be used in part or all to form a semiconductor substrate 5352. Region 5353 is This is a region in the semiconductor substrate 5352 where impurities are added, and it functions as a well. If the semiconductor substrate 5352 has a p-type conductivity, then region 5353 has an n-type conductivity. And it functions as an n-well. On the other hand, if the semiconductor substrate 5352 has an n-type conductivity, Region 5353 has a p-type conductivity and functions as a p-well. Region 5355 is impure. The material is added to the semiconductor substrate 5352, and functions as either a source region or a drain region. It is possible to form an LDD region on the semiconductor substrate 5352.

[0330] The insulating layer 5261 is silicon dioxide (SiO₂). x ), silicon nitride (SiN x ), silicon oxide nitride (SiO x N y (x>y>0), silicon nitride (SiN x O y )(x>y>0) etc. This includes films containing oxygen or nitrogen, or laminated structures thereof. The insulating layer 5261 consists of two layers. When provided in the structure, a silicon nitride film is provided as the first insulating layer, and as the second insulating layer It is possible to provide a silicon oxide film. When the insulating layer 5261 is provided in a three-layer structure, 1 A silicon oxide film is provided as the first insulating layer, a silicon nitride film is provided as the second insulating layer, and the third layer A silicon oxide film can be provided as an insulating layer.

[0331] Semiconductor layer 5262, semiconductor layer 5303a, and semiconductor layer 5303b are non-single crystal semiconductors. Conductors (e.g., amorphous silicon, polycrystalline silicon, microcrystalline silicon, etc.) ), single-crystal semiconductors, compound semiconductors, or oxide semiconductors (for example, ZnO, InGaZn) O, SiGe, GaAs, IZO (Indium Zinc Oxide), ITO (Indium Tin Oxide) Materials, SnO, TiO, AlZnSnO(AZTO), organic semiconductors, or carbon nano There are tubes and other things.

[0332] For example, region 5262a is an intrinsic region where no impurities are added to the semiconductor layer 5262. This state functions as a channel region. However, an impurity is added to region 5262a. It is possible that the impurities added to region 5262a are region 5262b, region 526 The concentration of impurities added to region 2c, region 5262d, or region 5262e is lower than that of the impurities added to region 5262e. Preferred. Regions 5262b and 5262d are region 5262c or region 5262e This is a region where a lower concentration of impurities is added, and is called LDD (Lightly Doped It functions as a Drain region. However, regions 5262b and 5262d are omitted. It is possible to do so. Regions 5262c and 5262e have high concentrations of impurities in the semiconductor. This region is added to body layer 5262 and functions as either a source region or a drain region.

[0333] Furthermore, semiconductor layer 5303b is a semiconductor layer to which phosphorus and other impurity elements are added. It has an n-type conductivity.

[0334] In addition, when an oxide semiconductor or a compound semiconductor is used as the semiconductor layer 5303a, the semiconductor layer 5303b can be omitted.

[0335] As the insulating layer 5263, the insulating layer 5302, and the insulating layer 5356, silicon oxide (SiO x ) , silicon nitride (SiN<00憨豆先生000008>), silicon oxynitride (SiO x N y )(x > y > 0), silicon nitride oxide (SiN x O y )(x > y > 0), and other films containing oxygen or nitrogen, or a stacked structure thereof exist.

[0336] [[ID=憨豆先生28]]As the conductive layer 5264, the conductive layer 5266, the conductive layer 5268, the conductive layer 5271, the conductive layer 5301, the conductive layer 5304, the conductive layer 5306, the conductive layer 5308, the conductive layer 5357, and the conductive layer 5憨豆先生5 9, there are a single-layer conductive film or a stacked structure thereof. As the conductive film, , aluminum (Al), tantalum (Ta), titanium (Ti), molybdenum (Mo), ta<憨豆先生023>ngsten (W), neodymium (Nd), chromium (Cr), nickel (Ni), platinum (Pt ), gold (Au), silver (Ag), copper (Cu), manganese (Mn), cobalt (Co), nio bium (Nb), silicon (Si), iron (Fe), palladium (Pd), carbon (C), scan dium (Sc), zinc (Zn), gallium (Ga), indium (In), tin (Sn), zirconium (Zr), cerium (Ce), a group composed of these, a single-layer film of one element selected from this group, or a chemical combination containing one element or a plurality of elements selected from this group exist. In addition, the single-layer film or the compound contains phosphorus (P), boron (B), arsenic ( As), <000303憨豆先生0>It may contain as(as), and / or oxygen (O), etc.

[0337] The compound in question may contain one or more elements selected from the aforementioned group of elements. Compounds containing (e.g., alloys), one or more elements selected from the aforementioned multiple elements. Compounds of elements and nitrogen (e.g., nitride films), one element selected from the aforementioned multiple elements, Alternatively, compounds of multiple elements with silicon (e.g., silicide films), or nanotube materials. These include indium tin oxide (ITO) and indium zinc oxide (ITO). ZO), indium tin oxide (ITSO) containing silicon oxide, zinc oxide (ZnO), tin oxide (SnO), tin cadmium oxide (CTO), aluminum neodymium (Al-Nd), Al Aluminum tungsten (Al-W), aluminum zirconium (Al-Zr), aluminum Titanium nium (Al-Ti), aluminum cerium (Al-Ce), magnesium silver ( Mg-Ag, molybdenum niobium (Mo-Nb), molybdenum tungsten (Mo-W) Examples include molybdenum tantalum (Mo-Ta). Examples of nitride films include titanium nitride and titanium nitride. Examples include tin, molybdenum nitride, etc. As for silicide films, tungsten silicide, Titanium silicide, nickel silicide, aluminum silicon, molybdenum silicon, etc. These include carbon nanotubes, organic nanotubes, and inorganic nanotubes. Examples include nanotubes, or metallic nanotubes.

[0338] Insulating layer 5265, insulating layer 5267, insulating layer 5269, insulating layer 5305, and insulating layer 535 8 includes a single-layer insulating layer, or a laminated structure thereof. silicon dioxide (SiO₂) x), silicon nitride (SiN x ), or silicon oxide nitride (SiO x N y (x>y>0), silicon nitride (SiN x O y )(x>y>0) such as oxygen or nitrogen A film containing carbon, such as DLC (diamond-like carbon), or siloxane Resins, epoxy, polyimides, polyamides, polyvinylphenols, benzocyclobutene Alternatively, there are organic materials such as acrylic.

[0339] The light-emitting layer 5270 can be an organic EL element or an inorganic EL element. For example, a hole injection layer made of a hole injection material, a hole transport layer made of a hole transport material, and a light-emitting material. A light-emitting layer made of an electron transport material, an electron transport layer made of an electron injection material, and an electron injection layer made of an electron injection material. or a single layer structure of a mixture of multiple materials, or these It has a layered structure, among others.

[0340] Furthermore, an insulating layer that functions as an alignment film is placed on top of the insulating layer 5305 and on top of the conductive layer 5306. It is possible to form insulating layers and other structures that function as protrusions.

[0341] Furthermore, on top of the conductive layer 5308, there are color filters, black matrices, or protrusions. It is possible to form insulating layers and the like that which function as conductive layers. Below the conductive layer 5308, there is an alignment film and It is possible to form an insulating layer that functions in this way.

[0342] The transistor of this embodiment is used in the semiconductor device described in Embodiments 1 and 2. It is possible to do so. In particular, in Figure 39(B), a non-single-crystal semiconductor is used as the semiconductor layer. When using amorphous semiconductors, microcrystalline semiconductors, organic semiconductors, or oxide semiconductors, The zista deteriorates. However, the semiconductor devices of Embodiments 1 to 6, the shifter In dysgraphs or display devices, transistor degradation can be suppressed, making them useful. .

[0343] (Embodiment 7) In this embodiment, the cross-sectional structure of the display device is shown in Figures 40(A), (B), and (C). Refer to the explanation.

[0344] Figure 40(A) is a top view of the display device. The substrate 5391 contains the drive circuit 5392 and the pixel section. 5393 is formed. The drive circuit 5392 is a scan line drive circuit or a signal line It includes drive circuits, etc.

[0345] Figure 40(B) shows the AB cross-section of Figure 40(A). And Figure 40(B) shows the substrate 5400, a conductive layer 5401 formed on the substrate 5400, and a covering for the conductive layer 5401 An insulating layer 5402 is formed on the conductive layer 5401 and the insulating layer 5402. A semiconductor layer 5403a, a semiconductor layer 5403b formed on the semiconductor layer 5403a, and A conductive layer 5404 formed on the conductive layer 5403b and the insulating layer 5402, and an insulating layer 5 An insulating layer 5405 having an opening is formed on 402 and on the conductive layer 5404, and A conductive layer 5406 formed on top of layer 5405 and in the openings of the insulating layer 5405, and insulating layer 54 An insulating layer 5408 is placed on top of 05 and on top of the conductive layer 5406, and on top of the insulating layer 5405 The liquid crystal layer 5407 is formed, and the insulating layer 5408 is formed on top of the liquid crystal layer 5407. The conductive layer 5409 and the substrate 5410 formed on the conductive layer 5409 are shown.

[0346] The conductive layer 5401 can function as a gate electrode. The insulating layer 5402 is a gate electrode. It can function as a conductive insulating film. The conductive layer 5404 is used for wiring and transistors. It can function as an electrode, or an electrode of a capacitive element. The insulating layer 5405 is a layer It can function as an interlayer or planarization layer. The conductive layer 5406 is used for wiring, pixel electricity It can function as a pole or a reflector electrode. The insulating layer 5408 is a sealing material. It is possible for it to function. The conductive layer 5409 can function as a counter electrode or a common electrode. It is possible.

[0347] In this case, parasitic capacitance may occur between the drive circuit 5392 and the conductive layer 5409. As a result, the output signal of the drive circuit 5392 or the potential of each node may have a smudge or delay. This can happen. Or, power consumption will increase. However, as shown in Figure 40(B)... Furthermore, an insulating layer 5408 capable of functioning as a sealant is placed on top of the drive circuit 5392. By forming this, the parasitic capacitance that occurs between the drive circuit 5392 and the conductive layer 5409 is eliminated. This can be reduced because the dielectric constant of the sealing material is lower than that of the liquid crystal layer. Therefore, there is a smear or delay in the output signal of the drive circuit 5392 or the potential of each node. This can reduce the power consumption of the drive circuit 5392. .

[0348] Furthermore, as shown in Figure 40(C), a portion of the drive circuit 5392 is placed on top of it, functioning as a sealing material. It is possible to form an insulating layer 5408 that allows for this. This makes it possible to reduce the parasitic capacitance that occurs between the drive circuit 5392 and the conductive layer 5409. Therefore, the output signal of the drive circuit 5392 or the potential of each node can be reduced. Yes, it is possible. However, it is not limited to this, and on the drive circuit 5392, a material that functions as a sealant can be used. It is possible that an insulating layer 5408 is not formed.

[0349] Furthermore, the display element is not limited to liquid crystal elements, but can include various other elements such as EL elements or electrophoretic elements. It is possible to use indicative elements.

[0350] In this embodiment, the cross-sectional structure of the display device has been described. It is possible to combine the semiconductor devices of Embodiment 1 to Embodiment 2. For example, The semiconductor layer of the transistor can be a non-single-crystal semiconductor, a microcrystalline semiconductor, an organic semiconductor, or an oxide. When semiconductors are used, the channel width of the transistor becomes larger. However, in the form of this implementation As shown above, reducing the parasitic capacitance of the drive circuit allows for a reduction in the transistor's channel width. This is possible. Therefore, the layout area can be reduced, and the display device can be... The bezel can be made narrower. Alternatively, the display device can be made higher resolution.

[0351] (Embodiment 8) This embodiment describes the manufacturing process of a semiconductor device. Here, transistors, The fabrication process for the capacitive element will be explained. In particular, an oxide semiconductor is used as the semiconductor layer. The manufacturing process in this case will be explained.

[0352] Refer to Figures 41(A) to (C) to explain the manufacturing process for transistors and capacitive elements. Figures 41(A) to (C) show the fabrication of transistor 5441 and capacitive element 5442. This is the process. Transistor 5441 is an inverse staggered thin-film transistor and an oxide semiconductor transistor. A transistor in which wiring is provided on the body layer via a source electrode or drain electrode. ru.

[0353] First, a first conductive layer is formed over the entire surface of the substrate 5420 by sputtering. Next, Using a resist mask formed by a photolithography process using a first photomask Then, the first conductive layer is selectively etched to form conductive layer 5421 and conductive layer 5422. The conductive layer 5421 can function as a gate electrode, and the conductive layer 542 Element 2 can function as one electrode of a capacitive element. However, it is not limited to this. Furthermore, the conductive layer 5421 and the conductive layer 5422 are connected to the electrodes of wiring, gate electrodes, or capacitive elements. It is possible to have a part that functions in this way. After this, the resist mask is removed.

[0354] Next, the insulating layer 5423 is formed over the entire surface using plasma CVD or sputtering. The insulating layer 5423 can function as a gate insulating layer, and the conductive layer 5421 , and is formed to cover the conductive layer 5422. The thickness of the insulating layer 5423 is 50n It is between m and 250 nm.

[0355] Next, a resist mask formed by a photolithography process using a second photomask. Using this method, the insulating layer 5423 is selectively etched to reach the conductive layer 5421. Hole 5424 is formed. After this, the resist mask is removed. However, this is not limited to this. Therefore, it is possible to omit the contact hole 5424. Alternatively, an oxide semiconductor layer After the formation of the first layer, it is possible to form the contact hole 5424. The cross-sectional view corresponds to Figure 41(A).

[0356] Next, an oxide semiconductor layer is formed over the entire surface by sputtering. However, this is not limited to this method. Furthermore, an oxide semiconductor layer is formed by sputtering, and a buffer layer is then placed on top of it (e.g. eba n + It is possible to form a layer. The thickness of the oxide semiconductor layer is 5 nm or more. It is less than 200 nm.

[0357] Next, a resist mask formed by a photolithography process using a third photomask. The oxide semiconductor layer is selectively etched using this method. After this, the resist mask is removed. do.

[0358] Next, a second conductive layer is formed over the entire surface by sputtering. Then, a fourth photomask is formed. The resist mask formed by the photolithography process used is selectively used to create a second conductive material. The layers are etched to form conductive layers 5429, 5430, and 5431. The conductive layer 5429 is connected to the conductive layer 5421 via the contact hole 5424. The conductive layers 5429 and 5430 function as source electrodes or drain electrodes. This is possible, and the conductive layer 5431 can function as the other electrode of the capacitive element. However, this is not limited to conductive layer 5429, conductive layer 5430, and conductive layer 54 31 is a part that functions as a wiring, source or drain electrode, or electrode of a capacitive element. It is possible to include it. The cross-sectional view at this stage corresponds to Figure 41(B).

[0359] Next, a heat treatment is performed at 200°C to 600°C in an atmospheric or nitrogen atmosphere. The process rearranges the In-Ga-Zn-O non-single crystal layer at the atomic level. Furthermore, heat treatment (including photo-annealing) releases strains that hinder carrier movement. Oh, the timing of this heat treatment is not limited; it can be done in various ways after the formation of the oxide semiconductor. It can be done at any time.

[0360] Next, an insulating layer 5432 is formed over the entire surface. The insulating layer 5432 has a single-layer structure. This is possible, and a laminated structure is also possible. For example, as the insulating layer 5432 is organic When using an insulating layer, the composition that is the material for the organic insulating layer is applied and placed in an atmospheric or nitrogen atmosphere. An organic insulating layer is formed by heat treatment at 200°C to 600°C under atmospheric conditions. By forming an organic insulating layer in contact with the oxide semiconductor layer, a thin film with highly reliable electrical properties can be produced. A film transistor can be fabricated. Note that an organic insulating layer is used as the insulating layer 5432. In such cases, a silicon nitride film or a silicon oxide film can be provided beneath the organic insulating layer.

[0361] Next, a third conductive layer is formed over the entire surface. Then, a photolithograph is performed using a fifth photomask. The third conductive layer is selectively etched using the resist mask formed by the process, The electrolytic layer 5433 and the conductive layer 5434 are formed. A cross-sectional view at this stage is shown in Figure 41(C). ) corresponds to the conductive layer 5433 and conductive layer 5434, wiring, pixel electrodes, reflective electrodes, transparent It can function as a photoelectrode or an electrode for a capacitive element. In particular, conductive layer 5434 Since it is connected to the conductive layer 5422, it can function as an electrode of the capacitive element 5442. It is possible. However, it is not limited to this, and it has the function of connecting the first conductive layer and the second conductive layer. It is possible to do so by connecting conductive layer 5433 and conductive layer 5434. Then, conductive layer 5422 and conductive layer 5430 are combined into a third conductive layer (conductive layer 5433 and conductive layer 5433 4) This makes it possible to connect via this method.

[0362] Through the above process, the transistor 5441 and the capacitive element 5442 can be manufactured. .

[0363] Furthermore, as shown in Figure 41(D), an insulating layer 5435 is formed on the oxide semiconductor layer 5425. It is possible to do so. Note that in Figure 41(D), reference number 5437 is the conductive layer, and 5436 is This shows a semiconductor layer.

[0364] Furthermore, as shown in Figure 41(E), after patterning the second conductive layer, the oxide semiconductor layer It is possible to form 5425. Note that in Figure 41(E), reference numbers 5438 and 54 Each of the 39s represents a conductive layer.

[0365] Note that the substrate, insulating layer, conductive layer, and semiconductor layer in this embodiment are different from those in other embodiments. The materials described herein, or similar materials, may be used.

[0366] (Embodiment 9) In this embodiment, the layout diagram (also called the top view) of the semiconductor device will be described. In this embodiment, the layout diagram of the semiconductor device shown in Figure 1(A) will be described. The content described in the form of implementation can be appropriately combined with the content described in other embodiments. Yes. Note that the layout diagram of this embodiment is just one example, and the layout diagram of the semiconductor device is It should be noted that this is not the only example.

[0367] The layout diagram of this embodiment will be described with reference to Figure 42. Figure 42 shows Figure 1( A) shows the layout diagram of the semiconductor device.

[0368] The transistor or wiring shown in Figure 42 consists of a conductive layer 901, a semiconductor layer 902, and a conductive layer 9 It is composed of 03, a conductive layer 904, and a contact hole 905. However, this It is possible to form a new conductive layer, insulating film, or contact hole, without limitation. It is possible. For example, a contact hole for connecting conductive layer 901 and conductive layer 903 It is possible to add new entries.

[0369] The conductive layer 901 may include portions that function as gate electrodes or wiring. The conductive layer 902 may include a portion that functions as a semiconductor layer of the transistor. The conductive layer 903 may include portions that function as wiring, sources, or drains. The conductive layer 904 may include portions that function as light-transmitting electrodes, pixel electrodes, or wiring. Yes, it is possible. The contact hole 905 has the function of connecting the conductive layer 901 and the conductive layer 904. or it has the function of connecting the conductive layer 903 and the conductive layer 904.

[0370] Furthermore, a semiconductor layer 902 is formed in the portion where the conductive layer 901 and the conductive layer 903 overlap. This is possible. By doing so, the parasitic capacitance between the conductive layer 901 and the conductive layer 903 can be reduced. Because it can be made smaller, noise can be reduced. For the same reason, conductive layer A semiconductor layer 902 or a conductive layer 903 is formed in the portion where 901 and the conductive layer 904 overlap. It is possible.

[0371] Furthermore, a conductive layer 904 is formed on a part of the conductive layer 901, and the conductive layer 901 is contact It is possible to connect to the conductive layer 904 via the tohole 905. This can reduce the wiring resistance. Alternatively, a conductive layer 903 can be placed on top of a portion of the conductive layer 901. , and a conductive layer 904 is formed, and the conductive layer 901 is contacted via the contact hole 905 The conductive layer 903 is connected to the conductive layer 904 via another contact hole 905. It is possible to connect to the conductive layer 904. By doing so, the wiring resistance is reduced. It can be lowered further.

[0372] Furthermore, a conductive layer 904 is formed on a part of the conductive layer 903, and the conductive layer 903 is contact It is possible to connect to the conductive layer 904 via the tohole 905. This can reduce wiring resistance.

[0373] Furthermore, a conductive layer 901 or a conductive layer 903 is formed beneath a portion of the conductive layer 904, and the conductive layer 904, through the contact hole 905, passes through the conductive layer 901 or the conductive layer 903 It is possible to connect them in this way. By doing so, the wiring resistance can be reduced. .

[0374] As already mentioned, in transistor 101, between the gate and the first terminal It is possible to increase the parasitic capacitance between the gate and the second terminal more than the parasitic capacitance. For this purpose, in transistor 101, the conductive layer 90 has the function of a second terminal. The area where 3 and the conductive layer 901 which functions as a gate overlap is the area where the first terminal functions The area where the conductive layer 903, which has the function of a gate, and the conductive layer 901, which has the function of a gate, overlap is Larger is preferable.

[0375] (Embodiment 10) In this embodiment, an example of an electronic device will be described.

[0376] Figures 43(A)-(H) and 44(A)-(D) show electronic devices. The sub-device consists of a housing 5000, a display unit 5001, a speaker 5003, and an LED lamp 5004. Operation key 5005 (including power switch or operation switch), connection terminal 5006, sensor SA5007 (Force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature) Degree, chemical substance, sound, time, hardness, electric field, electric current, voltage, power, radiation, flow rate, humidity, gradient (including functions for measuring vibration, odor or infrared radiation), microphone 5008, etc. It is possible to have.

[0377] Figure 43(A) shows a mobile computer, and in addition to the above, it includes switch 5009, It may have an infrared port 5010, etc. Figure 43(B) shows a portable device equipped with a recording medium. This is a type of image playback device (for example, a DVD player), and in addition to the above, a second display It may have a section 5002, a recording medium reading section 5011, etc. Figure 43(C) is a goggle. It is a type display, and in addition to the above, it has a second display unit 5002, a support unit 5012, It may have earphones 5013, etc. Figure 43(D) is a portable gaming machine, as described above. In addition to the above, it may also have a recording medium reading unit 5011, etc. Figure 43(E) is It is a projector and, in addition to the above-mentioned components, includes a light source 5033, a projection lens 5034, etc. This is possible. Figure 43(F) shows a portable gaming machine, and in addition to the above, a second display unit It may have 5002, a recording medium reading unit 5011, etc. Figure 43(G) shows a television receiver. It is an image device, and in addition to the above-mentioned components, it may also have a tuner, an image processing unit, etc. (Figure) 43(H) is a portable television receiver, and in addition to the above, it is capable of transmitting and receiving signals. It may have a charger 5017, etc. Figure 44(A) is a display, and the above In addition to the above, it may have a support base 5018, etc. Figure 44(B) is a camera. In addition to the above, there is an external connection port 5019, a shutter button 5015, and an image receiving unit. 5016, etc. may be included. Figure 44(C) is a computer, as described above. In addition, there is a pointing device 5020, an external connection port 5019, and a reader / writer 5 021, etc. may be included. Figure 44(D) is a mobile phone, and in addition to the above, Antennas, tuners for 1-segment partial reception services for mobile phones and mobile terminals, etc. It can have.

[0378] The electronic devices shown in Figures 43(A)-(H) and 44(A)-(D) have various functions. This allows for the display of various types of information (still images, videos, text images, etc.) on the display unit. Features include touch panel functionality, calendar, date or time display, and various software functions. Functions that control processing by software (programs), wireless communication functions, and the use of wireless communication functions It has the ability to connect to various computer networks and uses wireless communication to provide various data Functions for sending or receiving data, and for reading programs or data recorded on a recording medium. It can have functions such as displaying on the display unit. Furthermore, an electric power supply having multiple display units In the sub-device, one display unit primarily displays image information, and another display unit primarily displays... A function to display text information, or to display images that take parallax into account on multiple display units. It can have functions such as displaying three-dimensional images. Furthermore, it can have an electric field with an image receiving unit. The sub-device has functions for taking still images, taking videos, and automatically saving the captured images. Alternatively, it can perform manual corrections and save captured images to a recording medium (external or built into the camera). It can have functions such as displaying captured images on the display unit. (See Figure 43) The functions that electronic devices shown in A) to (H) and Figures 44(A) to (D) can have are these It is not limited to this and can have a variety of functions.

[0379] The electronic device described in this embodiment has a display unit for displaying some kind of information. This embodiment is characterized by the electronic device of this embodiment and the semiconductor device of Embodiments 1 to 5. By combining it with a shift register or display device, reliability and yield can be improved. This allows for improvements in performance, cost reduction, larger display area, and higher resolution display area. .

[0380] Next, we will explain some application examples of semiconductor devices.

[0381] Figure 44(E) shows an example of a semiconductor device being installed as an integral part of a building. ) consists of a housing 5022, a display unit 5023, a remote control device 5024 which is the operating unit, and a speaker 5 Includes 025, etc. The semiconductor equipment is wall-mounted and integrated with the building, and the installation space It can be installed without requiring a large space.

[0382] Figure 44(F) shows another example in which semiconductor equipment is installed within a building and integrated with the building itself. The display panel 5026 is installed together with the unit bath 5027, and the bather This allows viewing of the display panel 5026.

[0383] In this embodiment, walls and a unit bathroom were used as examples of buildings, but the actual form The configuration is not limited to this, and semiconductor devices can be installed in various types of buildings.

[0384] Next, we will show an example in which a semiconductor device is integrated with a mobile device.

[0385] Figure 44(G) shows an example of a semiconductor device installed in an automobile. (Display panel) 5028 is attached to the vehicle body 5029 and is controlled by the movement of the vehicle body or from inside or outside the vehicle body The system can display the entered information on demand. It also includes a navigation function. It's okay to do so.

[0386] Figure 44(H) shows an example of a semiconductor device being integrated with a passenger aircraft. Yes. Figure 44(H) shows a display panel 5031 on the ceiling 5030 above the seats of a passenger airplane. This diagram shows the shape of the unit when installed and in use. The display panel 5031 is located on the ceiling 50 30 is attached integrally with the hinge portion 5032, and the extension and retraction of the hinge portion 5032 Passengers will be able to view the display panel 5031. The display panel 5031 can be operated by passengers. It has the function of displaying information by doing so.

[0387] In this embodiment, examples of mobile bodies include automobile bodies and aircraft fuselages. However, this is not limited to motorcycles, four-wheeled vehicles (including automobiles, buses, etc.), and trains (monorails). It can be installed on various things, including railroads, railways, ships, etc. [Explanation of symbols]

[0388] 11 nodes 12 nodes 13 nodes 100 circuits 101 Transistors 101d diode 101pF transistor 102 transistors 102A Capacitive element 102d diode 102S Switch 103 Transistors 103A Transistor 103B Capacitive element 103d diode 103S Switch 104 transistors 104A Capacitive element 104d diode 104pF transistor 104R Resistor 105 transistors 105A Transistor 105B Capacitive element 105D Capacitive elements 105S Switch 106 transistors 107 Capacitive elements 108 transistors 109 transistors 111 Wiring 112 Wiring 112A wiring 112B Wiring 112C wiring 113 Wiring 113A Wiring 113B Wiring 113C wiring 113D Wiring 114 Wiring 115 Wiring 115A wiring 115B Wiring 115C wiring 115D Wiring 115E Wiring 115F Wiring 115G wiring 116 Wiring 117 Wiring 120 circuits 121 Resistor element 122 Capacitive elements 123 Buffer Circuit 124 Inverter Circuit 125 transistors 126 transistors 127 transistors 128 transistors 129 Wiring 130 Wiring 131 transistors 132 transistors 133 transistors 134 transistors 150 circuits 151 circuits 152 circuits 153 circuits 154 circuits 160 Protection circuit 201 Transistors 201d diode 201pF transistor 202 transistors 202d diode 202pF transistor 203 Transistors 203d diode 203pF transistor 204 transistors 204d diode 204pF transistor 205 transistors 205d diode 205pF transistor 206 transistors 207 transistors 207d diode 207pF transistor 208 transistors 209 transistors 211 Wiring 212 Wiring 212A Wiring 212B Wiring 213 Wiring 214 Wiring 220 capacity 350 Holding Control Unit 901 Conductive layer 902 Semiconductor layer 903 Conductive layer 904 Conductive layer 905 Contact Hole 1001 Circuit 1002 Circuit 1002a Circuit 1002b Circuit 1003 Circuit 1004 pixel section 1005 terminal 1006 substrate 1100 Shift Register Circuit 1101 Flip-flop circuit 1111 Wiring 1112 Wiring 1113 Wiring 1114 Wiring 1115 Wiring 1116 Wiring 2000 circuits 2001 Circuit 2002 Circuit 2003 Transistor 2004 Wiring 2005 Wiring 2006A Scan Line Drive Circuit 2006B Scan Line Drive Circuit 2007 Pixel section 2014 signal 2015 signal 2206 Transistor 3000 protection circuit 3001 Transistor 3002 Transistors 3003 Transistor 3004 Transistor 3005 Capacitive element 3006 Resistor element 3007 Capacitive element 3008 Resistor element 3011 Wiring 3012 Wiring 3013 Wiring 3020 pixels 3021 Transistor 3022 liquid crystal element 3023 Capacitive element 3031 Wiring 3032 Wiring 3033 Wiring 3034 Electrode 3100 Gate Driver 3101a terminal 3101b terminal 5000 cabinets 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation Keys 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared Port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Support stand 5019 External connection port 5020 Pointing Device 5021 Leader / Writer 5022 enclosure 5023 Display section 5024 Remote control device 5025 Speaker 5026 Display Panel 5027 Unit Bathroom 5028 Display Panel 5029 Car body 5030 Ceiling 5031 Display Panel 5032 Hinge section 5033 Light source 5034 Projection Lens 5260 circuit board 5261 Insulating layer 5262 Semiconductor layer 5262a area 5262b area 5262c area 5262d area 5262e area 5263 Insulating layer 5264 Conductive layer 5265 Insulating layer 5266 Conductive layer 5267 Insulating layer 5268 Conductive layer 5269 Insulating layer 5270 Emitting layer 5271 Conductive layer 5273 Insulating layer 5300 circuit boards 5301 Conductive layer 5302 Insulating layer 5303a Semiconductor layer 5303b Semiconductor layer 5304 Conductive layer 5305 Insulating layer 5306 Conductive layer 5307 Liquid crystal layer 5308 Conductive layer 5350 area 5351 area 5352 Semiconductor substrate 5353 area 5354 Insulating layer 5355 area 5356 Insulating layer 5357 Conductive layer 5358 Insulating layer 5359 Conductive layer 5391 circuit board 5392 Drive Circuit 5393 pixel section 5400 circuit boards 5401 Conductive layer 5402 Insulating layer 5403a Semiconductor layer 5403b Semiconductor layer 5404 Conductive layer 5405 Insulating layer 5406 Conductive layer 5407 Liquid crystal layer 5408 Insulating layer 5409 Conductive layer 5410 circuit board 5420 circuit board 5421 Conductive layer 5422 Conductive layer 5423 Insulating layer 5424 Contact Hole 5425 Oxide semiconductor layer 5429 Conductive layer 5430 Conductive layer 5431 Conductive layer 5432 Insulating layer 5433 Conductive layer 5434 Conductive layer 5435 Insulating layer 5441 Transistor 5442 Capacitive element

Claims

[Claim 1] It has a first transistor, a second transistor, a first switch, a second switch, and a third switch, The first terminal of the first transistor is electrically connected to the first wiring, and the second terminal of the first transistor is electrically connected to the second wiring. The gate of the second transistor is electrically connected to the first wiring, the first terminal of the second transistor is electrically connected to the first wiring, and the second terminal of the second transistor is electrically connected to the gate of the first transistor. The second wiring is electrically connected to the third wiring via the first switch, and is electrically connected to the third wiring via the second switch. A semiconductor device characterized in that the gate of the first transistor is electrically connected to the third wiring via the third switch.

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