Semiconductor equipment, multiphase DC / DC converters

Abstract

This suppresses the rapid current changes that occur when switching phases, thereby suppressing fluctuations in output voltage. [Solution] A semiconductor device (20) configured to control a multiphase DC / DC converter (100) comprises a main output stage drive unit (3) and a sub-output stage drive unit (4), wherein the sub-output stage drive unit (4) is configured to turn off the high-side switching element (11_2) when the current (IL_2) flowing through the high-side switching element (11_2) of the sub-output stage (Ch2) exceeds a threshold current (IL_TH), and when changing the number of sub-output stages (Ch2) supplied with current, the sub-output stage drive unit (4) changes the threshold current (IL_TH) in steps.

Description

Technical Field

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[0001] The present invention relates to a semiconductor device and a multi-phase DC / DC converter.

Background Art

[0002] Conventionally, a DC / DC converter having a plurality of output stages and switching the number of active phases to supply power to a load has been known (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003] <0000​​​​​​​​​​​​​​​​​​​​Figure 1 is a schematic diagram showing the general configuration of an example of a multiphase DC / DC converter. [Figure 2] Figure 2 is a block diagram showing the schematic configuration of the overcurrent detection unit. [Figure 3] Figure 3 is a timing chart showing the state when both the main output stage and the sub-output stage are operating. [Figure 4] Figure 4 shows the timing chart when only the main output stage is operating. [Figure 5] Figure 5 shows the relationship between the switching voltage and the inductor current when the high-side switching element is at a high level. [Figure 6] Figure 6 is a timing chart showing the operation during switching to stop the sub-output stage. [Figure 7] Figure 7 is a timing chart showing the operation during switching to activate the sub-output stage.

[0007] [Detailed explanation] In this specification, a MOS (Metal Oxide Semiconductor) field-effect transistor refers to a transistor whose gate structure consists of at least three layers: "a layer made of a conductor or a semiconductor such as polysilicon with low resistance," "an insulating layer," and "a P-channel, N-channel, or intrinsic semiconductor layer." In other words, the gate structure of a MOS field-effect transistor is not limited to a three-layer structure of metal, oxide, and semiconductor. Furthermore, a MOS field-effect transistor may be simply referred to as a MOS transistor. In addition, a P-channel MOS transistor will be referred to as a PMOS transistor, and an N-channel MOS transistor as an NMOS transistor.

[0008] In relation to any element, line, or other part forming a circuit, "connection" includes both mechanical connection and electrical connection, in other words, a state in which electricity flows. Therefore, "to connect" includes "to connect electrically."

[0009] Figure 1 is a circuit diagram showing the schematic configuration of an example of a multiphase DC / DC converter. Figure 2 is a block diagram showing the schematic configuration of the overcurrent detection unit 42. Figure 3 is a timing chart showing the state when both the main output stage Ch1 and the sub-output stage Ch2 are operating. Figure 4 is a timing chart showing the state when only the main output stage Ch1 is operating. Figure 5 is a diagram showing the relationship between the switching voltage Vsw_1 and the inductor current IL_1 when the high-side switching element 11 is at a high level. Figure 6 is a timing chart showing the operation when switching to stop the sub-output stage Ch2. Figure 7 is a timing chart showing the operation when switching to operate the sub-output stage Ch2.

[0010] <Multiphase DC / DC Converter 100> As shown in Figure 1, the multiphase DC / DC converter 100 receives an input voltage VIN and outputs an output voltage Vout that is lower than the input voltage VIN. The multiphase DC / DC converter 100 is on-time controlled. On-time control is a control method that sets an on-time to turn on the switching element for a certain period of time after detecting a voltage drop.

[0011] The multiphase DC / DC converter 100 includes an output unit 10 and a semiconductor device 20. The output unit 10 of the multiphase DC / DC converter 100 has a configuration with multiple output stages. The number of output stages in the multiphase DC / DC converter 100 is arbitrary and determined according to the load. In this embodiment, the multiphase DC / DC converter 100 has two channels, with the output stage that constantly outputs current being designated as the main output stage Ch1, and the remaining output stage being designated as the sub-output stage Ch2. As described above, the multiphase DC / DC converter 100 may also have three or more output stages, in which case it may have multiple main output stages Ch1 or multiple sub-output stages Ch2. It may also have a configuration with three or more output stages.

[0012] <Output section 10> The main output stage Ch1 and the sub-output stage Ch2 of the output unit 10 each have a high-side switching element 11, a low-side switching element 12, and an inductor 13, respectively. In this specification, as needed, the main output stage Ch1 will be referred to as the high-side switching element 11_1, the low-side switching element 12_1, and the inductor 13_1. Similarly, the sub-output stage Ch2 will be referred to as the high-side switching element 11_2, the low-side switching element 12_2, and the inductor 13_2.

[0013] In each output stage, the high-side switching element 11 and the low-side switching element 12 are connected in series to form a bridge circuit. In each output stage, the high-side switching element 11 and the low-side switching element 12 are NMOS transistors.

[0014] The drain of the high-side switching element 11 is connected to the input line 101. In other words, the input voltage VIN is supplied to the drain of the high-side switching element 11. In the output stage, the source of the low-side switching element 12 is connected to ground GND.

[0015] In each output stage, the source of the high-side switching element 11 and the drain of the low-side switching element 12 are connected at connection point P11 or connection point P12. Switching voltages Vsw_1 and Vsw_2 are generated at connection points P11 and P12. The high-side switching element 11 may be a PMOS transistor. When a PMOS transistor is used as the high-side switching element 11, the source of the high-side switching element 11 is connected to the input line 101, and the drain is connected to the low-side switching element.

[0016] In the main output stage Ch1, the gate of the high-side switching element 11_1 is connected to the main output stage drive unit 3, which will be described later, and the high-side drive signal HG is input to it. Also, the gate of the low-side switching element 12_1 is connected to the main output stage drive unit 3, and the low-side drive signal LG is input to it.

[0017] In the sub-output stage Ch2, the gate of the high-side switching element 11_2 is connected to the sub-output stage drive unit 4, which will be described later, and the high-side drive signal HG is input to it. Also, the gate of the low-side switching element 12_2 is connected to the sub-output stage drive unit 4, and the low-side drive signal LG is input to it.

[0018] In each output stage, when the high-side drive signal HG is at a high level, the high-side switching element 11 is turned on, and when the high-side drive signal HG is at a low level, the high-side switching element 11 is turned off. Similarly, when the low-side drive signal LG is at a high level, the low-side switching element 12 is turned on, and when the low-side drive signal LG is at a low level, the low-side switching element 12 is turned off.

[0019] In the bridge circuit of each output stage, the high-side switching element 11 and the low-side switching element 12 are controlled to be either both off, or one on and the other off. Furthermore, the high-side switching element 11 and the low-side switching element 12 are controlled to never be both on.

[0020] In each output stage, the switching voltage Vsw is determined by the on / off states of the high-side switching element 11 and the low-side switching element 12. To explain further, when the high-side switching element 11 is in the on state and the low-side switching element 12 is in the off state, the switching voltage Vsw becomes high level. Also, when the high-side switching element 11 is in the off state and the low-side switching element 12 is in the on state, the switching voltage Vsw becomes low level. Furthermore, when both the high-side switching element 11 and the low-side switching element 12 are in the off state, the switching voltage Vsw becomes Hi-Z state.

[0021] In the main output stage Ch1, the first end of the inductor 13_1 is connected to the connection point P11. And the second end of the inductor 13_1 in the main output stage Ch1 is connected at the common connection point P2 with the inductor 13_2 described later in the sub-output stage Ch2. The connection point P2 is connected to the output line 102.

[0022] In the sub-output stage Ch2, the first end of the inductor 13_2 is connected to the connection point P12. And the second end of the inductor 13_2 in the sub-output stage Ch2 is connected to the connection point P2.

[0023] In the main output stage Ch1, by operating the high-side switching element 11_1 and the low-side switching element 12_1, an inductor current IL_1 flows through the inductor 13_1. Also, in the sub-output stage Ch2, by operating the high-side switching element 11_2 and the low-side switching element 12_2, an inductor current IL_2 flows through the inductor 13_2.

[0024] For example, when both the main output stage Ch1 and the sub-output stage Ch2 are operating, the inductor current IL_1 in the main output stage Ch1 and the inductor current IL_2 in the sub-output stage Ch2 are combined at the connection point P2.

[0025] In the multiphase DC / DC converter 100, when the load current required is low, only the main output stage Ch1 is operated to supply the output current Iout to the load. When the load current required is high, in addition to the main output stage Ch1, the sub-output stage Ch2 is also operated to supply the combined output current Iout from both output stages to the load.

[0026] Furthermore, the output section 10 is provided with an output capacitor 14 common to both the main output stage Ch1 and the sub-output stage Ch2. The output capacitor 14 is located between the output line 102 and the ground GND. The output capacitor 14 smooths the output voltage Vout. Figure 1 also shows the equivalent series resistance of the output capacitor 14.

[0027] Furthermore, the multiphase DC / DC converter 100 has resistors R1 and R2 that divide the output voltage Vout and generate a feedback voltage Vfb corresponding to the output voltage Vout. The feedback voltage Vfb is fed back to the error amplifier 23 of the semiconductor device 20, which will be described later.

[0028] <Semiconductor device 20> The semiconductor device 20 is, for example, a functional IC (Integrated Circuit) integrated on a single semiconductor substrate. The semiconductor device 20 determines whether to activate only the main output stage Ch1 or to activate both the main output stage Ch1 and the sub-output stage Ch2 based on the output current Iout. The high-side switching elements 11 and low-side switching elements 12 of the main output stage Ch1 and the sub-output stage Ch2 may also be integrated into the semiconductor device 20. As shown in Figure 1, the semiconductor device 20 includes an OR circuit 21, a ramp voltage generation circuit 22, an error amplifier 23, a comparator 24, a main output stage drive unit 3, and a sub-output stage drive unit 4.

[0029] As shown in Figure 1, the OR gate 21 receives the switching voltage Vsw_1 from the main output stage Ch1 and the switching voltage Vsw_2 from the sub-output stage Ch2. The output of the OR gate 21 is input to the ramp voltage generation circuit 22.

[0030] The ramp voltage generation circuit 22 generates a ramp voltage Vramp in response to the signal from the OR circuit 21, and inputs it to the comparator 24. As shown in Figures 3 and 4, the ramp voltage Vramp is a waveform that repeatedly changes between a maximum value and a minimum value.

[0031] Error amplifier 23 is a current-output type transconductance amplifier. A feedback voltage Vfb is input to the inverting input terminal of error amplifier 23, and a reference voltage Vref is input to the non-inverting input terminal of error amplifier 23. The reference voltage Vref is a DC voltage of a predetermined positive value. Error amplifier 23 outputs a current signal corresponding to the difference between the feedback voltage Vfb and the reference voltage Vref. Error amplifier 23 operates to bring the feedback voltage Vfb closer to the reference voltage Vref.

[0032] A phase compensation circuit 25, consisting of a resistor 251 and a capacitor 252, is connected to the output terminal of the error amplifier 23. The phase compensation circuit 25 receives the current signal output from the error amplifier 23 and generates an error voltage Verr. The phase compensation circuit 25 compensates for the phase of the error voltage Verr. The error voltage Verr is output to the comparator 24.

[0033] The comparator 24 receives the ramp voltage Vramp, the error voltage Verr, and the feedback voltage Vfb as inputs. The comparator 24 compares the error voltage Verr with the feedback voltage Vfb. Based on the comparison result of the error voltage Verr and feedback voltage Vfb and the ramp voltage Vramp, it outputs a control signal COMPOUT. The control signal COMPOUT output from the comparator 24 is input to the main output stage drive unit 3 and the sub-output stage drive unit 4.

[0034] <Main output stage drive unit 3> Based on the control signal COMPOUT, the main output stage driving unit 3 drives the high-side switching element 11_1 and the low-side switching element 12_1 of the main output stage Ch1.

[0035] The main output stage driving unit 3 outputs a high-side driving signal HG for driving the high-side switching element 11_1 to the gate of the high-side switching element 11_1. At the same time, the main output stage driving unit 3 outputs a low-side driving signal LG for driving the low-side switching element 12_1 to the gate of the low-side switching element 12_1. The high-side driving signal HG is a voltage signal for turning on the high-side switching element 11_1. The low-side driving signal LG is a voltage signal for turning on the low-side switching element 12_1.

[0036] The main output stage driving unit 3 detects the rising timing of the control signal COMPOUT and outputs the timing information at that timing to the TON setting unit 31 as timing information TMG_1.

[0037] <TON setting unit 31> Based on the timing information TMG_1 from the main output stage driving unit 3, the TON setting unit 31 outputs a fixed-time elapsed completion signal ONTIME_1 for determining the period during which the switching voltage Vsw_1 is output to the main output stage driving unit 3. The fixed-time elapsed completion signal ONTIME_1 is a signal that becomes high level or low level. More specifically, the TON setting unit 31 has a timer circuit (not shown), generates a fixed-time elapsed completion signal ONTIME_1 that becomes high level according to the timing information TMG_1 and becomes low level when the time specified by the timer circuit has elapsed.

[0038] The main output stage drive unit 3 generates a high-side drive signal HG and a low-side drive signal LG based on the time completion signal ONTIME_1. The main output stage drive unit 3 outputs the high-side drive signal HG and the low-side drive signal LG of the main output stage Ch1 so that the switching voltage Vsw_1 is at a high level while the time completion signal ONTIME_1 is at a high level. In other words, the time completion signal ONTIME_1 is a signal that specifies the period during which the high-side switching element 11_1 of the main output stage Ch1 is in the ON state.

[0039] <Overcurrent detection unit 32> The overcurrent detection unit 32 detects that the inductor current IL_1 of the main output stage Ch1 is an overcurrent and outputs the detection result as a detection signal OCDET_2 to the main output stage drive unit 3. The detection signal OCDET_1 is a signal that is either high-level or low-level, and becomes high-level when an overcurrent is detected. Specifically, the detection signal OCDET_1 becomes high-level when the inductor current IL_1 exceeds the threshold current IL_TH.

[0040] The main output stage drive unit 3 controls the high-side switching element 11_1 to reduce its on-duty cycle when a high-level detection signal OCDET_1 is input. For example, when a high-level detection signal OCDET_1 is input, the main output stage drive unit 3 operates to switch the high-side drive signal HG to a low level. As a result, the current flowing from the drain to the source of the high-side switching element 11_1 decreases, and the inductor current IL_1 decreases.

[0041] The overcurrent detection unit 32 is configured to detect (monitor) whether an overcurrent is occurring in the inductor current IL_1 based on the current flowing from the drain to the source of the high-side switching element 11_1. In practice, however, it monitors the current by referring to the switching voltage Vsw_1 of the main output stage Ch1. The specific operation of the overcurrent detection unit 32 will be explained with reference to the drawings.

[0042] As shown in Figure 5, in the main output stage Ch1, when the high-side switching element 11_1 switches to a high level, the switching voltage Vsw_1 also switches to a high level. When the switching voltage Vsw_1 switches to a high level, a current is generated in the high-side switching element 11_1, flowing from the drain to the source. The current flowing from the drain to the source of the high-side switching element 11_1 flows through the inductor 13_1. Therefore, the current flowing from the drain to the source of the high-side switching element 11_1 is approximately the same as the inductor current IL_1. For this reason, the overcurrent detection unit 32 processes the current flowing from the drain to the source of the high-side switching element 11_1 as the inductor current IL_1.

[0043] The high-side switching element 11_1 has element resistance between its drain and source. When the inductor current IL_1 increases, the switching voltage Vsw_1 decreases due to the voltage drop across the current and the element resistance. The overcurrent detection unit 32 has a threshold voltage DACOUT_1 set to the switching voltage when a voltage drop occurs due to the flow of the threshold current IL_TH. When the switching voltage Vsw_1 falls below the threshold voltage DACOUT_1, the overcurrent detection unit 32 determines that the inductor current IL_1 has exceeded the threshold current IL_TH and outputs a high-level detection signal OCDET_1 to the main output stage drive unit 3.

[0044] For example, in the main output stage Ch1, the inductor current IL_1 may become overcurrent when the multiphase DC / DC converter 100 is started up or stopped. When the inductor current IL_1 becomes overcurrent, the overcurrent detection unit 32 detects the overcurrent, and the main output stage drive unit 3 suppresses the on-duty cycle of the high-side switching element 11_1 by keeping it small, thereby suppressing the rise in the inductor current IL_1 and preventing malfunctions in the circuits and elements constituting the output unit 10 and semiconductor device 20 due to overcurrent.

[0045] <Backflow detection unit 33> The reverse current detection unit 33 detects the current flowing from the drain to the source of the low-side switching element 12_1 of the main output stage Ch1. The reverse current detection unit 33 outputs a reverse current signal ZXOUT_1 to the main output stage drive unit 3. The reverse current signal ZXOUT_1 is a signal that is either high level or low level. When the reverse current detection unit 33 detects the current flowing from the drain to the source of the low-side switching element 12_1, it outputs a high-level reverse current signal ZXOUT_1 to the main output stage drive unit 3. For example, when the reverse current signal ZXOUT_1 switches to a high level, the main output stage drive unit 3 switches the low-side switching element 12_1 to the off state.

[0046] Furthermore, the main output stage drive unit 3 receives a current monitor signal ISS, which monitors the output current Iout (see Figure 1). In response to the current monitor signal ISS, the main output stage drive unit 3 outputs an ON signal PHASE_ON to the sub-output stage drive unit 4, instructing the sub-output stage Ch2 to operate. The ON signal PHASE_ON is either high-level or low-level. The ON signal PHASE_ON becomes high-level when the current monitor signal ISS is above a predetermined threshold, and low-level when it is below the threshold.

[0047] For example, if the output current Iout is large and the inductor current IL_1 of the main output stage Ch1 is insufficient (when the current monitor signal ISS is above the threshold), the ON signal PHASE_ON is set to a high level to drive the sub-output stage Ch2 and output the inductor current IL_2. Conversely, if the output current Iout is small and the inductor current IL_1 of the main output stage Ch1 is sufficient (when the current monitor signal ISS is below the threshold), the ON signal PHASE_ON is set to a low level to stop the sub-output stage Ch2 and stop the output of the inductor current IL_2.

[0048] In this embodiment, the ON signal PHASE_ON is configured to be input from the main output stage drive unit 3 to the sub-output stage drive unit 4, but this is not limited to this configuration. For example, it may be input from an external controller (not shown). Even in such a case, when the output current Iout increases, the ON signal PHASE_ON switches to a high level, and when the output current Iout decreases, the ON signal PHASE_ON switches to a low level.

[0049] <Sub-output stage drive unit 4> The sub-output stage drive unit 4 drives the high-side switching element 11_2 and the low-side switching element 12_2 of the sub-output stage Ch2 based on the control signal COMPOUT.

[0050] The sub-output stage drive unit 4 outputs a high-side drive signal HG to the gate of the high-side switching element 11_2 to drive the high-side switching element 11_2. At the same time, the sub-output stage drive unit 4 also outputs a low-side drive signal LG to the gate of the low-side switching element 12_2 to drive the low-side switching element 12_2. The high-side drive signal HG is a voltage signal that turns on the high-side switching element 11_2. The low-side drive signal LG is a voltage signal that turns on the low-side switching element 12_2.

[0051] The sub-output stage drive unit 4 receives the ON signal PHASE_ON. When the ON signal PHASE_ON is at a high level, the sub-output stage drive unit 4 outputs a high-side drive signal HG and a low-side drive signal LG so that a switching voltage Vsw_2 is output from the sub-output stage Ch2. Furthermore, after the ON signal PHASE_ON switches to a low level and a predetermined condition is met, the sub-output stage drive unit 4 drives the sub-output stage Ch2 to stop the output of the inductor current IL_2. At this time, the sub-output stage drive unit 4 outputs a high-level stop signal PHASE_STP to the overcurrent detection unit 42.

[0052] The sub-output stage driving unit 4 detects the rising timing of the control signal COMPOUT and outputs the timing information at that timing as timing information TMG_2 to the TON setting unit 41.

[0053] <TON setting unit 41> Based on the timing information TMG_2 from the sub-output stage driving unit 4, the TON setting unit 41 outputs a fixed-time elapsed completion signal ONTIME_2 that determines the period during which the switching voltage Vsw_2 is output, to the sub-output stage driving unit 4. The fixed-time elapsed completion signal ONTIME_2 is a signal that becomes high level or low level. More specifically, the TON setting unit 41 has a timer circuit (not shown), generates a fixed-time elapsed completion signal ONTIME_2 that becomes high level according to the timing information TMG_2 and becomes low level when the time specified by the timer circuit has elapsed.

[0054] The sub-output stage driving unit 4 generates a high-side driving signal HG and a low-side driving signal LG based on the fixed-time elapsed completion signal ONTIME_2. The sub-output stage driving unit 4 outputs the high-side driving signal HG and the low-side driving signal LG of the sub-output stage Ch2 so that the switching voltage Vsw_2 becomes high level while the fixed-time elapsed completion signal ONTIME_2 is high level. That is, the fixed-time elapsed completion signal ONTIME_2 is a signal that specifies the period during which the high-side switching element 11_2 of the sub-output stage Ch2 is in the on state.

[0055] <Overcurrent detection unit 42> The overcurrent detection unit 42 detects that the inductor current IL_2 of the high-side switching element 11_ of the sub-output stage Ch2 is an overcurrent, and outputs the detection result as a detection signal OCDET_2 to the sub-output stage driving unit 4. The detection signal OCDET_2 is a signal that becomes high level or low level and becomes high level when an overcurrent is detected. The operation of outputting the detection signal OCDET_2 of the overcurrent detection unit 42 is executed in the same manner as that of the overcurrent detection unit 32. In FIG. 5, the switching voltage Vsw_2, the detection signal OCDET_2, the inductor current IL_2, and the threshold voltage DACOUT_2 are shown.

[0056] The sub-output stage drive unit 4 controls the high-side switching element 11_2 to reduce its on-duty cycle when a high-level detection signal OCDET_2 is input. As a result, the current flowing from the drain to the source of the high-side switching element 11_2 decreases, and the inductor current IL_2 decreases.

[0057] Furthermore, unlike the overcurrent detection unit 32, the overcurrent detection unit 42 has a configuration that allows it to change the reference value OCP_DAC_2. As shown in Figure 2, the overcurrent detection unit 42 includes a counter unit 421, a DA converter 422, a comparator 423, and a storage unit 424.

[0058] The counter unit 421 outputs a reference value OCP_DAC_2 for setting the threshold voltage DACOUT_2. The counter unit 421 receives the ON signal PHASE_ON, the stop signal PHASE_STP, and the switching voltage Vsw_2 of the sub-output stage Ch2 as inputs.

[0059] The counter unit 421 determines the current state and next operation of the sub-output stage Ch2 based on the switching voltage Vsw_2, the ON signal PHASE_ON, and the stop signal PHASE_STP.

[0060] The counter unit 421 sets a reference value OCP_DAC_2 for setting overcurrents of the inductor current IL_2 when the sub-output stage Ch2 is stably outputting the inductor current IL_2. For example, the counter unit 421 can operate using the value of the reference value OCP_DAC_2 stored in the memory unit 424.

[0061] Furthermore, the counter unit 421 is composed of a digital processing circuit and has the function of outputting a new reference value OCP_DAC_2 obtained by adding or subtracting a predetermined value (here, "1") from the current reference value OCP_DAC_2 at predetermined intervals. In addition, when the stop signal PHASE_STP switches to a high level, the counter unit 421 stops calculating the new reference value OCP_DAC_2. At this time, the counter unit 421 may continue to output the current reference value OCP_DAC_2, or it may stop outputting it.

[0062] The counter unit 421 of the overcurrent detection unit 42 sets the value to be added to or subtracted from the reference value OCP_DAC_2 to "1", but is not limited to "1". Furthermore, the timing for adding to or subtracting from the reference value OCP_DAC_2 could be the timing of the switching cycle change, but is not limited to this.

[0063] The reference value OCP_DAC_2 output from the counter unit 421 is output to the DA converter 422. The DA converter 422 converts the digital reference value OCP_DAC_2 into an analog threshold voltage DACOUT_2. As the reference value OCP_DAC_2 increases or decreases, the threshold voltage DACOUT_2 output from the DA converter 422 also increases or decreases (see Figure 5, DACOUT_2). The threshold voltage DACOUT_2 from the DA converter 422 is then input to the comparator 423.

[0064] The threshold voltage DACOUT_2 is input to the non-inverting input terminal of comparator 423. The switching voltage Vsw_2 is input to the inverting input terminal of comparator 423. Comparator 423 outputs a low-level detection signal OCDET_2 when the switching voltage Vsw_2 is higher than the threshold voltage DACOUT_2. Comparator 423 also outputs a high-level detection signal OCDET_2 when the switching voltage Vsw_2 is lower than the threshold voltage DACOUT_2.

[0065] The memory unit 424 stores the value of the reference value OCP_DAC_2. For example, the memory unit 424 stores the reference value OCP_DAC_2 used to set the threshold voltage DACOUT_2 for detecting overcurrent when the sub-output stage Ch2 outputs the inductor current IL_2 in the normal operating state. The memory unit 424 also stores the value of the reference value OCP_DAC_2 output from the counter unit 421 when the stop signal PHASE_STP switches to a high level. Other numerical values ​​may also be stored in the memory unit 424.

[0066] <Backflow detection unit 43> The reverse current detection unit 43 detects the current flowing from the drain to the source of the low-side switching element 12_2 of the sub-output stage Ch2. The reverse current detection unit 43 has the same configuration as the reverse current detection unit 33. The reverse current detection unit 43 outputs a reverse current signal ZXOUT_2 to the sub-output stage drive unit 4. The reverse current signal ZXOUT_2 is a signal that is either high level or low level. When the reverse current detection unit 43 detects the current flowing from the drain to the source of the low-side switching element 12_2, it outputs a high-level reverse current signal ZXOUT_2 to the sub-output stage drive unit 4.

[0067] The multiphase DC / DC converter 100 has the configuration described above. Next, the phase switching operation of the multiphase DC / DC converter 100 will be described with reference to the drawings.

[0068] As shown in Figure 3, when both the main output stage Ch1 and the sub-output stage Ch2 are operating, the ON signal PHASE_ON is at a high level. The control signal COMPOUT is output from the comparator 24 to both the main output stage drive unit 3 and the sub-output stage drive unit 4. The control signal COMPOUT is pulsed, either at a high level or a low level, and the main output stage drive unit 3 and the sub-output stage drive unit 4 alternately detect the timing of the rising edge of the control signal COMPOUT to a high level.

[0069] The main output stage drive unit 3 then detects the timing of the rise of the control signal COMPOUT to a high level and outputs timing information TMG_1 to the TON setting unit 31. The TON setting unit 31 outputs a completion signal ONTIME_1 from the timing information TMG_1, indicating that a certain period of time has elapsed.

[0070] Furthermore, the sub-output stage drive unit 4 detects the timing of the rise to a high level of the control signal COMPOUT, which is different from that of the main output stage drive unit 3, and outputs timing information TMG_2 to the TON setting unit 41. The TON setting unit 41 outputs a completion signal ONTIME_2 from the timing information TMG_2, which indicates that a certain period of time has elapsed.

[0071] In this way, by shifting the switching timing of the main output stage Ch1 and the sub-output stage Ch2, the load on the power supply and the noise level can be suppressed. Then, the inductor current IL_1 output from the main output stage Ch1 and the inductor current IL_2 output from the sub-output stage Ch2 are combined and output as the output current Iout.

[0072] Furthermore, when both the main output stage Ch1 and the sub-output stage Ch2 are operating, the output current Iout is larger than when only the main output stage Ch1 is operating. In other words, in the multi-phase DC / DC converter 100, when the output current Iout required by the load is less than a certain current value, only the main output stage Ch1 operates, and when it is greater than a certain current value, both the main output stage Ch1 and the sub-output stage Ch2 operate.

[0073] In this configuration, where the operation of the sub-output stage Ch2 is switched, if the sub-output stage Ch2 is suddenly switched to the normal operating state or suddenly switched from the normal operating state to the stopped state, an overcurrent may flow as the inductor current IL_2 of the sub-output stage Ch2, causing large fluctuations in the output voltage Vout. The multi-phase DC / DC converter 100 is configured to suppress large changes in the output voltage Vout during operation stop switching and operation start switching by utilizing the overcurrent detection unit 42 of the sub-output stage Ch2. The operation stop switching and operation start switching of the sub-output stage Ch2 will be described below.

[0074] <Regarding the operation stop switching of sub-output stage Ch2> First, we will explain how to switch from a state where both the main output stage Ch1 and the sub-output stage Ch2 are operating to a state where the sub-output stage Ch2 is stopped.

[0075] As shown in Figure 6, when both the main output stage Ch1 and the sub-output stage Ch2 are operating stably, the main output stage Ch1 outputs a switching voltage Vsw_1 and an inductor current IL_1. Similarly, the sub-output stage Ch2 outputs a switching voltage Vsw_2 and an inductor current IL_2. At this time, the reference value OCP_DAC_2 of the sub-output stage drive unit 4 is "M".

[0076] As shown in Figure 6, when the output current Iout required by the load decreases, the current monitor signal ISS falls below a threshold. As a result, the main output stage drive unit 3 switches the ON signal PHASE_ON to a low level. When the ON signal PHASE_ON switches to a low level, the counter unit 421 of the overcurrent detection unit 42 of the sub-output stage drive unit 4 switches the reference value OCP_DAC_2 to a value stored in the storage unit 424, in this case, "N". Note that "N" is a value smaller than "M". Furthermore, "N" may be a predetermined value, or it may be a value obtained from values ​​used when switching the number of phases up to now (for example, an arithmetic mean).

[0077] In other words, in the multi-phase DC / DC converter 100, when switching from a state where the main output stage Ch1 and sub-output stage Ch2 are operating to the operation of only the main output stage Ch1, the threshold voltage DACOUT_1 of the main output stage Ch1 remains the same, while the threshold voltage DACOUT_2 of the sub-output stage Ch2 decreases. In other words, when switching from a state where the main output stage Ch1 and sub-output stage Ch2 are operating to the operation of only the main output stage Ch1, the threshold current IL_TH of the main output stage Ch1 remains the same, while the threshold current IL_TH of the sub-output stage Ch2 decreases (see Figure 6).

[0078] In the sub-output stage Ch2, when the inductor current IL_2 becomes greater than the threshold current IL_TH, the overcurrent detection unit 42 outputs a high-level detection signal OCDET_2. When the detection signal OCDET_2 becomes high, the sub-output stage drive unit 4 controls the on-duty cycle of the high-side switching element 11_2 in the sub-output stage Ch2 to decrease. Specifically, the sub-output stage drive unit 4 switches the high-side switching element 11_2 to the off state when the detection signal OCDET_2 switches to a high level. In the sub-output stage Ch2, as the threshold current IL_TH decreases, the on-duty cycle of the high-side switching element 11_2 decreases, and the inductor current IL_2 decreases.

[0079] Then, the counter unit 421 of the overcurrent detection unit 42 of the sub-output stage drive unit 4 decreases the reference value OCP_DAC_2 with each switching cycle. As a result, in the sub-output stage Ch2, the threshold current IL_TH gradually decreases with each switching cycle. Consequently, in the sub-output stage Ch2, the inductor current IL_2 output from the sub-output stage Ch2 also gradually decreases.

[0080] In the sub-output stage Ch2, when the on-duty cycle of the high-side switching element 11_2 decreases, the energy stored in the inductor 13_2 decreases, and after the energy stored in the inductor 13_2 is released, a current flows in the reverse direction. At this time, current flows from the drain to the source in the low-side switching element 12_2.

[0081] The reverse current detection unit 43 outputs a high-level reverse current signal ZXOUT_2 to the sub-output stage drive unit 4 when current flows from the drain to the source in the low-side switching element 12_2. When the ON signal PHASE_ON is at a low level and the reverse current signal ZXOUT_2 switches to a high level, the sub-output stage drive unit 4 operates the sub-output stage Ch2 to stop the output of the inductor current IL_2 from the sub-output stage Ch2. At the same time, it holds the timing information TMG_2 at a low level and switches the stop signal PHASE_STP to a high level.

[0082] In the TON setting unit 41, while the timing information TMG_2 is at a low level, the completion signal ONTIME_2 is also maintained at a low level. In addition, in the overcurrent detection unit 42, when the stop signal PHASE_STP switches to a high level, the reference value OCP_DAC_2 output from the counter unit 421 is stored as the memory value K in the memory unit 424.

[0083] In the multiphase DC / DC converter 100, when switching the output stage from a state where both the main output stage Ch1 and the sub-output stage Ch2 are driven to a state where only the main output stage Ch1 is driven, the inductor current IL_2 of the sub-output stage Ch2 is gradually reduced. By controlling it in this way, abrupt changes in the inductor current IL_2 of the sub-output stage Ch2 are suppressed, and large changes in the output current Iout are suppressed. In addition, when stopping the operation of the sub-output stage Ch2 from a state where both the main output stage Ch1 and the sub-output stage Ch2 are operating simultaneously, large fluctuations in the output current Iout are suppressed, and thus fluctuations in the output voltage Vout are suppressed.

[0084] Next, the switching process from a state where only the main output stage Ch1 is operating to a state where both the main output stage Ch1 and the sub-output stage Ch2 are operating will be explained with reference to the diagram.

[0085] As shown in Figure 7, when only the main output stage Ch1 is operating, the main output stage Ch1 outputs a switching voltage Vsw_1 and an inductor current IL_1. The sub-output stage Ch2 is stopped.

[0086] In the multiphase DC / DC converter 100, when the required output current Iout increases, the current monitor signal ISS exceeds a threshold. As a result, the main output stage drive unit 3 switches the ON signal PHASE_ON to a high level.

[0087] Furthermore, when the ON signal PHASE_ON switches to a high level, the sub-output stage drive unit 4 switches the stop signal PHASE_STP from a high level to a low level. Then, the overcurrent detection unit 42 receives both the high-level ON signal PHASE_ON and the low-level stop signal PHASE_STP.

[0088] In this state, the counter unit 421 of the overcurrent detection unit 42 retrieves the stored value K from the storage unit 424 and sets the reference value OCP_DAC_2 to "K". The stored value K is the value of the reference value OCP_DAC_2 stored in the storage unit 424 when the multiphase DC / DC converter 100 switches from a state where the main output stage Ch1 and sub-output stage Ch2 are operating to a state where the sub-output stage Ch2 is stopped. However, it is not limited to this, and a predetermined value may be used, or a value set by the user, operator, etc.

[0089] The sub-output stage drive unit 4 drives the high-side switching element 11_2 and the low-side switching element 12_2 of the sub-output stage Ch2, causing the sub-output stage Ch2 to output an inductor current IL_2.

[0090] The sub-output stage drive unit 4 drives the sub-output stage Ch2 to turn on the high-side switching element 11_2 until a high-level detection signal OCDET_2 is output from the overcurrent detection unit 42. At this time, the on-duty cycle of the high-side switching element 11_2 is adjusted so as not to exceed the on-duty cycle of the high-side switching element 11_2 during normal operation. In other words, even before the detection signal OCDET_2 switches to a high level, if the on-duty cycle of the high-side switching element 11_2 reaches the on-duty cycle of normal operation, the sub-output stage drive unit 4 switches the high-side switching element 11_2 to the off state.

[0091] When the detection signal OCDET_2 is switched to a high level, or when the high-side switching element 11_2 is switched to the off state, the sub-output stage drive unit 4 increases DAC2 with each switching cycle in the counter unit 421. The increase is set to "1", the same as when decreasing, but is not limited to "1".

[0092] Then, the sub-output stage drive unit 4 switches the high-side switching element 11_2 to the ON state after the high-side switching element 11_2 has been in the OFF state for a certain period of time.

[0093] At the start of driving the sub-output stage Ch2, the inductor current IL_2 of the sub-output stage Ch2 is not flowing, i.e., it is in a state of "0". The reference value OCP_DAC_2 at the start of driving is the stored value K, which is smaller than during normal operation. Therefore, after the inductor current IL_2 becomes the threshold current IL_TH, it may become negative during the process of decreasing. In other words, the reverse current detection unit 43 may output a high-level reverse current signal ZXOUT_2. The sub-output stage drive unit 4 may tolerate a high-level reverse current signal ZXOUT_2 up to a few times (for example, 3 times) after starting to output the inductor current IL_2 from the sub-output stage Ch2, and may continue driving the sub-output stage Ch2 even if the reverse current signal ZXOUT_2 switches to a high level. For example, the sub-output stage drive unit 4 may tolerate the reverse current signal ZXOUT_2 switching to a high level a predetermined number of times when the ON signal PHASE_ON is high level and the stop signal PHASE_STP is low level.

[0094] As described above, the duty cycle of the high-side switching element 11_2 is set so as not to exceed the duty cycle during normal operation. After a certain number of switching cycles, even if the high-side switching element 11_2 is switched with the same duty cycle as during normal operation, the inductor current IL_2 will no longer exceed the threshold current IL_TH. In other words, the sub-output stage Ch2 is controlled by the sub-output stage drive unit 4 in the same state as during normal operation.

[0095] Then, when it is confirmed that the detection signal OCDET_2 did not switch to a high level during multiple (for example, two) consecutive switching cycles, the counter unit 421 of the overcurrent detection unit 42 replaces the reference value OCP_DAC_2 with "M", which is the value when the sub-output stage Ch2 is operating normally, and outputs it.

[0096] As shown above, when the sub-output stage Ch2 is operated in addition, the inductor current IL_2 of the sub-output stage Ch2 is limited to an upper limit by the threshold current IL_TH. Since the threshold current IL_TH increases stepwise with each switching cycle, it is possible to suppress the flow of overcurrent as the inductor current IL_2 of the sub-output stage Ch2 (see Figure 7).

[0097] In this embodiment, a multi-phase DC / DC converter 100 having two output stages, a main output stage Ch1 and a sub-output stage Ch2, was described as an example. However, the number of output stages is not limited to two and may be three or more. In the case of three or more, the conditions for switching the number of operating output stages will differ, but it is possible to switch them in a similar manner.

[0098] In other words, the multi-phase DC / DC converter 100 can suppress overcurrent flow to the connected load and suppress voltage fluctuations when changing the number of operating output stages.

[0099] <Other> The embodiments described above should be considered illustrative and not restrictive in all respects, and the technical scope of the present invention is indicated by the claims rather than by the description of the embodiments described above, and should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0100] <Note> The semiconductor device (20) described above is configured to control a multiphase DC / DC converter (100) having a main output stage (Ch1) and a sub-output stage (Ch2) configured to supply output current (Iout) by switching high-side switching elements (11_1, 11_2) and low-side switching elements (12_1, 12_2), A main output stage drive unit (3) is configured to constantly control the main output stage (Ch1) to output current, It has a sub-output stage drive unit (4) configured to control the sub-output stage (Ch2) so as to switch between outputting or stopping current according to the load, The sub-output stage drive unit (4) has a configuration that turns off the high-side switching element (12_2) when the current (IL_2) flowing through the high-side switching element (12_2) of the sub-output stage (Ch2) exceeds the threshold current (IL_TH). When changing the number of sub-output stages (Ch2) that supply current, the sub-output stage drive unit (4) is configured to change the threshold current (IL_TH) in steps (first configuration).

[0101] In the semiconductor device (20) with the first configuration described above, the sub-output stage drive unit (4) has a configuration (second configuration) that gradually reduces the threshold current (IL_TH) when the number of sub-output stages (Ch2) to which current is supplied is reduced.

[0102] In the semiconductor device (20) of the first or second configuration described above, the sub-output stage drive unit (4) is configured to stop supplying current from the sub-output stage (Ch2) when it detects a reverse current flowing through the low-side switching element (12_2) of the sub-output stage (Ch2) when it reduces the number of sub-output stages (Ch2) to which it supplies current (third configuration).

[0103] In a semiconductor device (20) having any of the above configurations from the first to the third, The sub-output stage drive unit (4) has a configuration (fourth configuration) in which the threshold current (IL_TH) is increased in steps when the number of sub-output stages (Ch2) to which current is supplied is increased.

[0104] In a semiconductor device (20) having any of the above configurations 1 to 4, The sub-output stage drive unit (4) is configured (fifth configuration) to control the high-side switching elements (11_2) and low-side switching elements (12_2) with a predetermined on-duty cycle after the current flowing through the high-side switching elements of the sub-output stage (Ch2) reaches a certain value when the number of sub-output stages (Ch2) to which current is supplied is increased.

[0105] In a semiconductor device (20) having any of the above configurations 1 to 5, At least the main output stage drive unit (3) and the sub-output stage drive unit (4) are integrated on a single semiconductor substrate (sixth configuration).

[0106] The multiphase DC / DC converter (100) described above is A semiconductor device (20) as described in any of the above 1 to 6, The main output stage (Ch1) of the semiconductor device (20) is controlled by the main output stage drive unit (3), This configuration (the seventh configuration) includes a sub-sub-output stage (Ch2) controlled by a sub-output stage drive unit (4) of the semiconductor device (20). [Explanation of Symbols]

[0107] 100 Multiphase DC / DC Converter 101 input lines 102 output lines 10 Output section Ch1 main output stage Ch2 sub output stage 11 High-side switching element 12 Low-side switching elements 13 Inductors 14 Output Capacitors 20 Semiconductor equipment 21 OR circuits 22 Lamp voltage generation circuit 23 Error Amplifier 24 Comparators 25 Phase compensation circuit 251 resistors 252 Capacitors 3. Main output stage drive unit 31 TON setting section 32 Overcurrent detection unit 33 Backflow detection unit 4. Sub-output stage drive unit 41 TON adjustment section 42 Overcurrent detection unit 421 Counter section 422 DA converter 423 Comparator 424 Storage section 43 Backflow detection unit COMPOUT control signal GND (Ground) HG High-Side Drive Signal LG Low-Side Drive Signal OCDET detection signal P11 Connection point P12 connection point P2 connection point

Claims

1. A semiconductor device configured to control a multiphase DC / DC converter having a main output stage and a sub-output stage configured to supply output current by switching high-side switching elements and low-side switching elements, A main output stage drive unit configured to constantly control the main output stage to output current, It includes a sub-output stage drive unit configured to control the sub-output stage so as to switch between outputting or stopping current according to the load, The sub-output stage drive unit has a configuration that turns off the high-side switching element when the current flowing through the high-side switching element of the sub-output stage exceeds the threshold current. A semiconductor device having a configuration in which the sub-output stage drive unit changes the threshold current in steps when changing the number of sub-output stages that supply current.

2. The semiconductor device according to claim 1, wherein the sub-output stage drive unit is configured to gradually reduce the threshold current when the number of sub-output stages to which current is supplied is reduced.

3. The semiconductor device according to claim 1, wherein the sub-output stage drive unit is configured to stop supplying current from the sub-output stage when it detects a reverse current flowing through the low-side switching element of the sub-output stage when it reduces the number of sub-output stages to which it supplies current.

4. The semiconductor device according to claim 1, wherein the sub-output stage drive unit is configured to gradually increase the threshold current when increasing the number of sub-output stages to which current is supplied.

5. The semiconductor device according to claim 1, wherein the sub-output stage drive unit is configured to control the high-side switching element and the low-side switching element with a predetermined on-duty cycle after the current flowing through the high-side switching element of the sub-output stage reaches a certain value when the number of sub-output stages to which current is supplied is increased.

6. The semiconductor device according to claim 1, wherein at least the main output stage drive unit and the sub-output stage drive unit are integrated on a single semiconductor substrate.

7. A semiconductor device according to any one of claims 1 to 6, The main output stage of the semiconductor device is configured to be controlled by the main output stage drive unit of the semiconductor device, A multiphase DC / DC converter configured to include a sub-output stage that is controlled by a sub-output stage drive unit of the semiconductor device.

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