An ultrasonic flaw detection system

Abstract

The utility model provides a kind of ultrasonic flaw detection system, in the system, controller controls transmitting circuit to generate high voltage pulse;High voltage circuit provides high voltage power supply for transmitting circuit;Transmitting circuit emits high voltage pulse to transducer, drives transducer to emit ultrasonic signal;Transducer emits the ultrasonic signal of set frequency to the sample to be measured, and receives the flaw detection echo signal returned by the sample to be measured, conversion is input to gain amplifier circuit as electric signal;Gain amplifier circuit carries out gain amplification processing to the electric signal corresponding to flaw detection echo signal;Analog-digital converter carries out analog-digital conversion to flaw detection echo signal, obtains flaw detection echo digital signal, and input to controller.The utility model improves system structure, realizes the feature information extraction and noise reduction processing of high-speed echo signal, also improve the signal-to-noise ratio of echo signal, effectively solve the problem of system missed detection caused by small sample defect, weak echo signal.

Description

Technical Field

[0001] This utility model relates to the field of ultrasonic flaw detection technology, and more specifically to an ultrasonic flaw detection system. Background Technology

[0002] Ultrasonic testing utilizes the propagation characteristics of ultrasonic waves within materials to detect internal defects. Ultrasonic waves propagate in a straight line in a homogeneous medium. When these waves encounter internal defects (such as cracks, pores, or inclusions), some are reflected back. By receiving these reflected signals and analyzing their intensity, duration, and spectral characteristics, the location, size, and type of the defect can be determined. Due to its high efficiency, economy, and reliability, ultrasonic testing is one of the most widely used, frequently employed, and rapidly developing non-destructive testing technologies both domestically and internationally. With the continuous emergence of new materials and processes, ultrasonic testing technology is also constantly innovating, providing strong support for quality control and safety monitoring across various industries.

[0003] Currently, existing online ultrasonic flaw detection systems typically employ uniform downsampling to extract feature signals due to the large volume of acquired echo signal data and the limited number of display points on the screen. However, this method struggles to simultaneously extract feature information from high-speed acquired ultrasonic echo signals while processing noise. When detecting minor flaws in samples, the weak echo signals and poor signal-to-noise ratio can easily lead to missed detections, failing to meet the demands for higher precision flaw detection. Utility Model Content

[0004] The purpose of this invention is to provide an ultrasonic flaw detection system that improves the system structure, realizes the extraction and noise reduction of feature information of high-speed echo signals, and improves the signal-to-noise ratio of echo signals, effectively solving the problem of missed detections caused by small sample defects and weak echo signals.

[0005] To achieve the above objectives, this utility model provides the following solution:

[0006] An ultrasonic flaw detection system includes a transducer, a gain amplifier circuit, an analog-to-digital converter, a controller, a transmitting circuit, and a high-voltage circuit.

[0007] The controller is electrically connected to the transmitting circuit, the high-voltage circuit, and the analog-to-digital converter, respectively, and the controller is used to control the transmitting circuit to generate high-voltage pulses;

[0008] The high-voltage circuit is connected to the transmitting circuit and is used to provide high-voltage power to the transmitting circuit;

[0009] The transmitting circuit is connected to the transducer and is used to transmit high-voltage pulses to the transducer to drive the transducer to transmit ultrasonic signals.

[0010] The transducer is used to transmit an ultrasonic signal of a set frequency to the sample under test and to receive the flaw detection echo signal returned by the sample under test. It is also used to convert the flaw detection echo signal into an electrical signal and input it into a gain amplifier circuit.

[0011] The input terminal of the gain amplifier circuit is connected to the transducer and is used to amplify the electrical signal corresponding to the flaw detection echo signal.

[0012] The analog-to-digital converter is connected to the output of the gain amplifier circuit and is used to perform analog-to-digital conversion on the flaw detection echo signal to obtain a flaw detection echo digital signal, which is then input to the controller.

[0013] Furthermore, the controller is communicatively connected to a PC.

[0014] Furthermore, the controller includes RAM, an FIR filtering module, a signal extraction module, an error comparison module, a transmission module, and a data buffer mounted on the FPGA chip;

[0015] The RAM is configured in two parts, namely dual-port RAM1 and dual-port RAM2; the data buffer is configured in two parts, namely data buffer 1 and data buffer 2.

[0016] The dual-port RAM1 is used to buffer the flaw detection echo digital signal input from the analog-to-digital converter;

[0017] The input terminal of the FIR filtering module is connected to the dual-port RAM1 and is used to perform FIR filtering on the flaw detection echo digital signal; the output terminal of the FIR filtering module is connected to the data buffer 1.

[0018] The input terminal of the signal extraction module is connected to the dual-port RAM1, and the output terminal is connected to the data buffer 2;

[0019] The data buffer 1 and data buffer 2 are respectively connected to the input terminal of the error comparison module;

[0020] The output of the error comparison module is connected to a dual-port RAM2.

[0021] The output of the transmitting module is connected to the transmitting circuit, and the input is connected to the FPGA chip of the controller.

[0022] Furthermore, the frequency of the flaw detection echo signal acquired by the transducer is in the range of 1MHz to 20MHz, and the input bandwidth of the analog-to-digital converter is greater than 40MHz.

[0023] According to the specific embodiments provided by this utility model, the following technical effects are disclosed: The ultrasonic flaw detection system provided by this utility model includes a transducer, a gain amplifier circuit, an analog-to-digital converter, a controller, a transmitting circuit, and a high-voltage circuit. Through the coordinated design of the transmitting circuit and the high-voltage circuit, the penetration power of ultrasonic waves is ensured; through the gain amplification processing of the gain amplifier circuit, weak echo electrical signals are amplified in multiple stages and noise interference is suppressed, thereby improving the detection sensitivity of small defects; the controller performs noise reduction, feature extraction, and signal analysis on the digital signal, which improves the overall system structure, realizes the feature information extraction and noise reduction processing of high-speed echo signals, and also improves the signal-to-noise ratio of the echo signal, effectively solving the problem of missed detection by the system due to small sample defects and weak echo signals. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the ultrasonic flaw detection system of this utility model;

[0026] Figure 2 This is a flowchart illustrating the signal extraction and noise reduction method of the ultrasonic flaw detection system of this utility model. Detailed Implementation

[0027] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0028] The purpose of this invention is to provide an ultrasonic flaw detection system that improves the system structure, realizes the extraction and noise reduction of feature information of high-speed echo signals, and improves the signal-to-noise ratio of echo signals, effectively solving the problem of missed detections caused by small sample defects and weak echo signals.

[0029] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0030] Example 1

[0031] like Figure 1 As shown, the ultrasonic flaw detection system provided by this utility model includes a transducer, a gain amplifier circuit, an analog-to-digital converter, a controller, a transmitting circuit, and a high-voltage circuit.

[0032] The controller is electrically connected to the transmitting circuit, the high-voltage circuit, and the analog-to-digital converter, respectively. The controller is used to control the transmitting circuit to generate high-voltage pulses. The controller can control the triggering timing, frequency, and pulse width of the high-voltage pulses.

[0033] The high-voltage circuit is connected to the transmitting circuit and is used to provide high-voltage power to the transmitting circuit to ensure the amplitude and energy of the high-voltage pulse.

[0034] The transmitting circuit is connected to the transducer and is used to transmit high-voltage pulses to the transducer to drive the transducer to transmit ultrasonic signals.

[0035] The transducer is used to transmit an ultrasonic signal of a set frequency to the sample under test and receive the flaw detection echo signal returned by the sample under test. It is also used to convert the flaw detection echo signal into an electrical signal and input it to the gain amplifier circuit. For example, multiple transducer arrays are distributed in a preset layout, and the controller controls the transmission and reception of each channel in a time-sharing manner, which can be used to realize multi-channel synchronous detection.

[0036] The input terminal of the gain amplifier circuit is connected to the transducer and is used to amplify the electrical signal corresponding to the flaw detection echo signal; it can amplify weak echo electrical signals in multiple stages and suppress noise interference.

[0037] The analog-to-digital converter is connected to the output of the gain amplifier circuit and is used to perform analog-to-digital conversion on the flaw detection echo signal to obtain a flaw detection echo digital signal, which is then input to the controller.

[0038] The controller performs feature information extraction and noise reduction on the digital signal of the flaw detection echo. Feature information extraction and noise reduction can be achieved using conventional techniques in the field of ultrasonic flaw detection, which will not be elaborated here.

[0039] The controller is connected to a PC, which then collects and displays the flaw detection echo signal.

[0040] In the above description, the frequency of the echo signal received by the transducer is in the range of 1MHz to 20MHz. According to the Nyquist sampling theorem, the input bandwidth of the analog-to-digital converter (ADC) of the system should be greater than 40MHz. An ADC with an input bandwidth of 100MHz can accurately sample high-frequency flaw detection echo signals and avoid output distortion of the echo signal.

[0041] Specifically, the controller internally includes RAM, an FIR filtering module, a signal extraction module, an error comparison module, a transmission module, and a data buffer;

[0042] The RAM is configured in two parts, namely dual-port RAM1 and dual-port RAM2; the data buffer is configured in two parts, namely data buffer 1 and data buffer 2.

[0043] The dual-port RAM1 is used to buffer the flaw detection echo digital signal input from the analog-to-digital converter;

[0044] The input terminal of the FIR filtering module is connected to the dual-port RAM1 and is used to perform FIR filtering on the flaw detection echo digital signal; the output terminal of the FIR filtering module is connected to the data buffer 1.

[0045] The input terminal of the signal extraction module is connected to the dual-port RAM1, and the output terminal is connected to the data buffer 2;

[0046] The data buffer 1 and data buffer 2 are respectively connected to the input terminal of the error comparison module;

[0047] The output of the error comparison module is connected to a dual-port RAM2.

[0048] The output of the transmitting module is connected to the transmitting circuit, and the input is connected to the FPGA chip of the controller.

[0049] The FIR filtering module uses an FIR low-pass filter. The signal extraction module, error comparison module, and transmission module can all be implemented with reference to existing technologies, and will not be described in detail here.

[0050] Data buffer 1 and data buffer 2 have a first-in-first-out characteristic, internal read and write pointers, can automatically manage read and write data, can perform cross-clock domain processing, and are used for data transmission between different frequency clocks. They are particularly suitable for high-speed data transmission and buffering.

[0051] Example 2

[0052] This utility model also provides a signal extraction and noise reduction method for an ultrasonic flaw detection system, applied to the aforementioned ultrasonic flaw detection system, comprising the following steps:

[0053] (1) The flaw detection echo signal received by the transducer in the ultrasonic flaw detection system is converted into an electrical signal output, which is then amplified by a gain amplifier circuit and input to a high-speed, high-precision analog-to-digital converter.

[0054] (2) The analog-to-digital converter converts the received electrical signal into a set of digital signals containing the characteristic information of the flaw detection echo signal at a certain sampling frequency and sends them to the controller;

[0055] (3) The controller stores the received digital signal into dual-port RAM1. The address of dual-port RAM1 represents the position information of the flaw detection echo digital signal, and the written data represents the amplitude value of the flaw detection echo signal.

[0056] (4) The controller outputs a high-voltage transmission signal to the transducer for ultrasonic flaw detection, based on the formula for ultrasonic propagation distance. (S refers to the distance the ultrasonic wave travels, measured in meters, which is the one-way distance from the transducer to a target such as a defect in the sample.) v The speed of sound in a medium is measured in meters per second (m / s). t The time it takes for an ultrasonic wave to travel (in seconds) and the start time t of sampling the ultrasonic echo signal. s The sampling frequency of the analog-to-digital converter f S Sampling N data points, using the formula S=(N / f S + t s )* v / 2， The S position information corresponding to the sampled digital signal can be calculated, that is, the position information mentioned in step (3).

[0057] (5) Read the data in the dual-port RAM1 one by one according to the address, enter the signal extraction module, and take each k (k=2N / M integer part, N is the number of ultrasonic echo signal sampling data in one frame, M is the number of screen display points, N>>M) as a group. Query the maximum and minimum values ​​of each group of data, and write the maximum and minimum values ​​of the data into the data buffer 1 in sequence. Therefore, the flaw detection echo digital signal sequence Y1 with a sample size of M is obtained. The sequence Y1 contains all the feature information (position and amplitude) of the ultrasonic echo signal, as well as the background noise information.

[0058] (6) Simultaneously with step (5), the sampling frequency is used as the reading frequency to read the data in the dual-port RAM1 and input it into the FIR filtering module. After FIR filtering, the flaw detection echo digital signal sequence Y2 with M points is obtained and stored in the data buffer 2 one by one. The sequence Y2 contains all the feature information of the flaw detection echo signal. Due to the characteristics of the FIR filter, its sample sequence can filter out the background noise information of the ultrasonic echo signal and retain the feature information of the ultrasonic echo signal, but the amplitude is attenuated, which is not conducive to the identification and detection of small damage types in flaw detection.

[0059] (7) When the number of data in both data buffer 1 and data buffer 2 is greater than 0, read the data Y1n in sequence Y1 in data buffer 1 and the data Y2n in sequence Y2 in data buffer 2, n=[0,1,...,M-1], calculate the absolute error En between the two data Y1n and Y2n, and determine the relationship between the absolute error En and the threshold E. When the absolute error En is greater than the threshold E, take the smaller number of the two data Y1n and Y2n and store it in dual-port RAM2. When the absolute error En is less than or equal to the threshold E, take the larger number of the two data Y1n and Y2n and store it in dual-port RAM2.

[0060] (8) Repeat steps (5)-(7) until the absolute error comparison of the nth (n=M-1) data in step (7) is completed and stored in dual-port RAM2. At this time, dual-port RAM2 contains the processed flaw detection echo signal data, which has both the characteristic information of the signal and the noise reduction processing of the background noise.

[0061] The signal extraction and noise reduction method for the ultrasonic flaw detection system provided by this utility model adopts a pipelined data processing approach. Through steps such as data sampling, storage, segmented feature information extraction, FIR filtering, threshold comparison, and further storage, the processed data is sequentially passed as input to the next step until all data processing is complete. To ensure the correct flow and processing of data between each step, this solution uses a clock signal to synchronize and coordinate the data processing rhythm of each step, ensuring that each step receives, processes, and transmits data at the appropriate time, avoiding data conflicts or loss.

[0062] This invention provides a signal extraction and noise reduction method for an ultrasonic flaw detection system. By sequentially performing feature extraction, FIR filtering for noise reduction, and absolute error comparison on the acquired echo signal, it achieves feature information extraction and noise reduction processing of the high-speed echo signal. The processed results can then be uploaded to a PC screen for display. This invention addresses two key issues: firstly, it ensures that the signal's feature information (signal amplitude, position, etc.) is not lost while meeting the screen display requirements; secondly, it achieves noise reduction processing while simultaneously enabling high-speed signal extraction, improving the signal-to-noise ratio and solving the problem of missed detections due to small sample defects and weak echo signals. This invention employs a high-speed pipeline data processing method, meeting the high-speed acquisition and signal processing requirements of online ultrasonic flaw detection systems.

[0063] This document uses specific examples to illustrate the principles and implementation methods of this utility model. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this utility model. Furthermore, those skilled in the art will recognize that, based on the ideas of this utility model, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this utility model.

Claims

1. An ultrasonic flaw detection system, characterized in that, It includes transducers, gain amplifier circuits, analog-to-digital converters, controllers, transmitting circuits, and high-voltage circuits; The controller is electrically connected to the transmitting circuit, the high-voltage circuit, and the analog-to-digital converter, respectively, and the controller is used to control the transmitting circuit to generate high-voltage pulses; The high-voltage circuit is connected to the transmitting circuit and is used to provide high-voltage power to the transmitting circuit; The transmitting circuit is connected to the transducer and is used to transmit high-voltage pulses to the transducer to drive the transducer to transmit ultrasonic signals. The transducer is used to transmit an ultrasonic signal of a set frequency to the sample under test and to receive the flaw detection echo signal returned by the sample under test. It is also used to convert the flaw detection echo signal into an electrical signal and input it into a gain amplifier circuit. The input terminal of the gain amplifier circuit is connected to the transducer and is used to amplify the electrical signal corresponding to the flaw detection echo signal. The analog-to-digital converter is connected to the output of the gain amplifier circuit and is used to perform analog-to-digital conversion on the flaw detection echo signal to obtain a flaw detection echo digital signal, which is then input to the controller.

2. The ultrasonic flaw detection system according to claim 1, characterized in that, The controller is connected to a PC for communication.

3. The ultrasonic flaw detection system according to claim 1, characterized in that, The controller includes RAM, an FIR filtering module, a signal extraction module, an error comparison module, a transmission module, and a data buffer mounted on an FPGA chip; The RAM is configured in two parts, namely dual-port RAM1 and dual-port RAM2; the data buffer is configured in two parts, namely data buffer 1 and data buffer 2. The dual-port RAM1 is used to buffer the flaw detection echo digital signal input from the analog-to-digital converter; The input terminal of the FIR filtering module is connected to the dual-port RAM1 and is used to perform FIR filtering on the flaw detection echo digital signal. The output of the FIR filter module is connected to the data buffer 1; The input terminal of the signal extraction module is connected to the dual-port RAM1, and the output terminal is connected to the data buffer 2; The data buffer 1 and data buffer 2 are respectively connected to the input terminal of the error comparison module; The output of the error comparison module is connected to a dual-port RAM2. The output of the transmitting module is connected to the transmitting circuit, and the input is connected to the FPGA chip of the controller.

4. The ultrasonic flaw detection system according to claim 1, characterized in that, The frequency of the flaw detection echo signal acquired by the transducer is in the range of 1MHz to 20MHz, and the input bandwidth of the analog-to-digital converter is greater than 40MHz.

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