Semiconductor devices and AC / DC converters

Abstract

Reduce power consumption. [Solution] The semiconductor device (10) includes a charging circuit (120) configured to supply a charging current to a target capacitor (C12) based on a pulsating voltage (Vpls) obtained by rectifying an AC voltage (Vac), and a control circuit (110) configured to drive the target capacitor using its charging voltage as a power supply voltage (VCC). The control circuit controls the supply or non-supply of a charging current to the target capacitor through control of the charging circuit, according to the level of the pulsating voltage.

Description

[Technical Field]

[0001] This disclosure relates to semiconductor devices and AC / DC converters. [Background technology]

[0002] An example of a circuit configuration that handles AC voltage is an AC / DC converter (see, for example, Patent Document 1 below). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] International Publication No. 2021 / 84964

[0004] [overview] A semiconductor device can be configured to obtain its own power supply voltage based on an AC voltage. In this case, reducing the power consumption of the semiconductor device is required.

[0005] A semiconductor device according to one aspect of the present disclosure includes a charging circuit configured to supply a charging current to a target capacitor based on a pulsating voltage obtained by rectifying an AC voltage, and a control circuit configured to drive the target capacitor using the charging voltage of the target capacitor as a power supply voltage, wherein the control circuit controls the supply or non-supply of the charging current to the target capacitor through control of the charging circuit according to the level of the pulsating voltage. [Brief explanation of the drawing]

[0006] [Figure 1] Figure 1 is an overall configuration diagram of an AC / DC converter according to the present disclosure. [Figure 2] Figure 2 is an external perspective view of the primary side control device according to an embodiment of this disclosure. [Figure 3] Figure 3 is an overall diagram of a reference AC / DC converter. [Figure 4]Figure 4 shows the timing chart for a reference AC / DC converter in standby mode. [Figure 5] Figure 5 is an overall configuration diagram of an AC / DC converter relating to a first embodiment belonging to the embodiments of this disclosure. [Figure 6] Figure 6 is a timing chart in standby mode relating to a first embodiment belonging to the embodiments of this disclosure. [Figure 7] Figure 7 is a flowchart relating to the on / off control of a switch, relating to a first embodiment belonging to the embodiments of this disclosure. [Figure 8] Figure 8 is an overall configuration diagram of an AC / DC converter relating to a fourth embodiment belonging to the embodiments of this disclosure. [Figure 9] Figure 9 is a flowchart relating to the on / off control of a switch, relating to a fourth embodiment belonging to the embodiments of this disclosure. [Figure 10] Figure 10 is an overall configuration diagram of an AC / DC converter relating to a sixth embodiment belonging to the embodiments of this disclosure. [Figure 11] Figure 11 is an overall configuration diagram of an AC / DC converter relating to a seventh embodiment belonging to the embodiments of this disclosure. [Figure 12] Figure 12 is an overall configuration diagram of an AC / DC converter relating to an eighth embodiment belonging to the embodiments of this disclosure. [Figure 13] Figure 13 is an overall configuration diagram of an AC / DC converter relating to a ninth embodiment belonging to the embodiments of this disclosure.

[0007] [Detailed explanation] Hereinafter, examples of embodiments of this disclosure will be specifically described with reference to the drawings. In each of the referenced drawings, the same parts are denoted by the same reference numerals, and redundant descriptions relating to the same parts are omitted as a general rule. In addition, in this specification, for the sake of simplification of description, symbols or reference numerals that refer to information, signals, physical quantities, functional parts, circuits, elements, or components may be indicated, and the names of the information, signals, physical quantities, functional parts, circuits, elements, or components corresponding to such symbols or reference numerals may be omitted or abbreviated.

[0008] First, some terms used in the description of the embodiments of the present disclosure will be explained. The level refers to the level (height) of the electric potential, and for any signal or voltage of interest, the high level has a higher electric potential than the low level.

[0009] For any transistor configured as a FET (field effect transistor) exemplified by a MOSFET, the on state refers to a state where the drain and source of the transistor are conducting, and the off state refers to a state where the drain and source of the transistor are non-conducting (blocked state). The same applies to transistors not classified as FETs. Unless otherwise specified, a MOSFET is understood to be an enhancement-mode MOSFET. MOSFET is an abbreviation of "metal-oxide-semiconductor field-effect transistor". Also, unless otherwise specified, in any MOSFET, the back gate may be considered to be short-circuited to the source.

[0010] Any switch can be configured with one or more FETs (field effect transistors). When a certain switch is in the on state, the two ends of the switch are conducting, while when a certain switch is in the off state, the two ends of the switch are non-conducting.

[0011] Hereinafter, for any transistor or switch, the on state and the off state may also be simply expressed as on and off. Also, for any transistor or switch, the period during which the transistor or switch is in the on state is referred to as the on period, and the period during which the transistor or switch is in the off state is referred to as the off period.

[0012] For any signal having a high-level or low-level signal level, the period during which the level of the signal is high is referred to as the high-level period, and the period during which the level of the signal is low is referred to as the low-level period.

[0013] Unless otherwise specified, the connection between multiple components forming a circuit, such as any circuit element, wiring, terminal, and node, etc., can be understood to refer to an electrical connection.

[0014] When any two voltages to be compared are voltage v1 and v2, "v1>v2" represents that voltage v1 is higher than voltage v2, "v1<v2" represents that voltage v1 is lower than voltage v2, and "v1=v2" represents that the value of voltage v1 is the same as the value of voltage v2. The same applies to other expressions including physical quantities other than voltage.

[0015] FIG. 1 is an overall configuration diagram of the AC / DC converter 1 according to this embodiment. The AC / DC converter 1 generates an output voltage Vout in a switching manner using a transformer TR from an input voltage Vin obtained by rectifying and smoothing an AC voltage Vac. The input voltage Vin is the primary-side voltage of the AC / DC converter 1, and the output voltage Vout is the secondary-side voltage of the AC / DC converter 1. The AC / DC converter 1 is composed of a primary-side circuit arranged on the primary side of the AC / DC converter 1 and a secondary-side circuit arranged on the secondary side of the AC / DC converter 1, and the primary-side circuit and the secondary-side circuit are electrically insulated from each other. In this specification, insulation means that the transmission of DC signals and power is blocked.

[0016] The primary-side circuit of the AC / DC converter 1 is provided with rectifier circuits 3 and 4, a primary-side control device 10, an input capacitor C11, a power supply capacitor C12, a capacitor C13, a rectifier diode D11, and a sense resistor Rsns. Wires WR11 and WR12 are wires within the primary-side circuit.

[0017] The secondary-side circuit of the AC / DC converter 1 is provided with a secondary-side control device 20, a rectifier diode D21, an output capacitor C21, voltage-dividing resistors R21 and R22, and a resistor R23. The load LD is provided outside the AC / DC converter 1 on the secondary side of the AC / DC converter 1. Wires WR21 and WR22 are wires within the secondary-side circuit.

[0018] The AC / DC converter 1 includes a transformer TR, which is a power transformer having a primary winding W1 and a secondary winding W2. In the AC / DC converter 1 shown in Figure 1, a flyback method is employed, and the primary winding W1 and the secondary winding W2 are electrically isolated from each other while being magnetically coupled with opposite polarities in the transformer TR. An auxiliary winding W3 is also provided on the primary side of the transformer TR. The AC / DC converter 1 is also equipped with a photocoupler PC.

[0019] In the primary circuit, the ground is referred to as "GND1," and in the secondary circuit, the ground is referred to as "GND2." Any voltage or signal in the primary circuit, including the input voltage Vin, is a voltage or signal referenced to ground GND1 and has a potential as seen from ground GND1. Any voltage or signal in the secondary circuit, including the output voltage Vout, is a voltage or signal referenced to ground GND2 and has a potential as seen from ground GND2. In both the primary and secondary circuits, ground refers to a reference conductor with a reference potential of 0V (zero volts) or to the reference potential itself. However, since ground GND1 and ground GND2 are insulated from each other, they may have different potentials. The reference conductor is formed of a conductor such as metal.

[0020] Figure 2 shows an external perspective view of the primary control device 10. The primary control device 10 is an electronic component (semiconductor device) comprising a semiconductor chip having a semiconductor integrated circuit formed on a semiconductor substrate, a housing (package) CS housing the semiconductor chip, and a plurality of external terminals exposed from the housing CS to the outside of the primary control device 10. The primary control device 10 is formed by enclosing the semiconductor chip in a housing CS made of resin. Note that the number of external terminals and the type of housing of the primary control device 10 shown in Figure 2 are merely examples, and they can be designed arbitrarily. Terminals TM1 to TM6 shown in Figure 1 are external terminals provided on the primary control device 10. Other external terminals may also be provided on the primary control device 10.

[0021] AC voltage source 2 is provided outside the AC / DC converter 1 on the primary side of the AC / DC converter 1. The AC voltage Vac supplied from AC voltage source 2 is applied between input terminals IN1 and IN2. The AC voltage Vac is assumed to be a sinusoidal AC voltage. AC voltage source 2 may be a commercial AC voltage source. However, the supply of AC voltage Vac to input terminals IN1 and IN2 may be interrupted. That is, there are two states for the supply of AC voltage Vac between input terminals IN1 and IN2: supply ON state and supply OFF state. Supply ON state refers to the state in which AC voltage Vac is supplied between input terminals IN1 and IN2. Supply OFF state refers to the state in which the supply of AC voltage Vac between input terminals IN1 and IN2 is interrupted. In the supply OFF state, except in transient states, there is no potential difference between input terminals IN1 and IN2. Figure 1 shows the AC / DC converter 1 in the supply ON state. Unless otherwise specified, it is assumed that an AC voltage Vac is continuously supplied between input terminals IN1 and IN2.

[0022] Rectifier circuit 3 is connected to input terminals IN1 and IN2 and rectifies the AC voltage Vac between input terminals IN1 and IN2. Input capacitor C11 is connected to rectifier circuit 3 and generates the input voltage Vin by smoothing the voltage obtained after rectification by rectifier circuit 3. In other words, rectifier circuit 3 and input capacitor C11 constitute a rectifier-smoothing circuit that generates the input voltage Vin (primary voltage) by rectifying and smoothing the AC voltage Vac.

[0023] In the AC / DC converter 1 shown in Figure 1, the rectifier circuit 3 is a diode bridge circuit that full-wave rectifies the AC voltage Vac, and the input capacitor C11 generates the input voltage Vin by smoothing the voltage obtained by the full-wave rectification of the rectifier circuit 3. Specifically, the rectifier circuit 3 is composed of diodes 3a to 3d. The anode of diode 3a and the cathode of diode 3c are connected to input terminal IN1. The anode of diode 3b and the cathode of diode 3d are connected to input terminal IN2. The cathodes of diodes 3a and 3b are connected to wiring WR11. The anodes of diodes 3c and 3d are connected to wiring WR12. The first end of the input capacitor C11 is connected to wiring WR11, and the second end of the input capacitor C11 is connected to wiring WR12. Wiring WR12 is connected to ground GND1. The first and second ends of the input capacitor C11 function as the anode and cathode, respectively. The voltage at wiring WR11 is the input voltage Vin. In other words, a potential equal to the input voltage Vin is applied to wiring WR11 relative to the potential of wiring WR12. The input voltage Vin has a positive voltage value. The input voltage Vin can be considered as a positive DC voltage. However, the input voltage Vin may have some pulsating current components.

[0024] Rectifier circuit 4 is connected to input terminals IN1 and IN2, and generates a pulsating voltage Vpls by rectifying the AC voltage Vac between input terminals IN1 and IN2, separately from rectifier circuit 3. In the AC / DC converter 1 of Figure 1, rectifier circuit 4 generates a pulsating voltage Vpls by full-wave rectifying the AC voltage Vac. Specifically, rectifier circuit 3 is composed of diodes 4a and 4b. The anode of diode 4a is connected to input terminal IN1, and the anode of diode 4b is connected to input terminal IN2. The cathodes of diodes 4a and 4b are connected in common to terminal TM4. The voltage at terminal TM4 is the pulsating voltage Vpls.

[0025] The primary control device 10 comprises, as its main components and circuit elements, a control circuit 110, a charging circuit 120, a voltage detection circuit 130, and a switching transistor M1. In the configuration example shown in Figure 1, the switching transistor M1 is an N-channel MOSFET. The drain of the switching transistor M1 is connected to terminal TM1, and the source of the switching transistor M1 is connected to terminal TM5. Terminal TM5 is connected to the first end of the sense resistor Rsns, and the second end of the sense resistor Rsns is connected to wiring WR12 (i.e., to ground GND1). The voltage at terminal TM5 is called the sense voltage Vsns. The sense voltage Vsns has a voltage value proportional to the current flowing between the drain and source of the switching transistor M1.

[0026] The control circuit 110 is connected to terminals TM2, TM3, TM5, and TM6, and also to the gate of the switching transistor M1. Terminal TM2 is connected to ground GND1. The voltage at terminal TM3 is the power supply voltage VCC. The control circuit 110 is driven based on the power supply voltage VCC. The charging circuit 120 and the voltage detection circuit 130 may be driven based on the pulsating voltage Vpls or the power supply voltage VCC. The current supplied to the control circuit 110 from terminal TM3 or from the wiring connected to terminal TM3 is the current consumption ICC of the control circuit 110. The control circuit 110 controls the switching transistor M1 to be on or off by controlling the gate potential of the switching transistor M1. The control circuit 110 can perform switching control to alternately switch the state of the switching transistor M1 between the on state and the off state. In this case, the control circuit 110 can perform switching control according to the sense voltage Vsns at terminal TM5 and the feedback voltage Vfb at terminal TM6.

[0027] In the transformer TR, the first end of the primary winding W1 is connected to the wiring WR11, thereby receiving the input voltage Vin through the primary winding W1. The second end of the primary winding W1 is connected to terminal TM1. Therefore, the switching transistor M1 and the primary winding W1 are connected in series with each other. The current flowing through the primary winding W1 is called the primary current Ip. The primary current Ip flows from the wiring WR11 through the primary winding W1 towards the switching transistor M1.

[0028] The first end of auxiliary winding W3 is connected to the anode of rectifier diode D11, and the second end of auxiliary winding W3 is connected to wiring WR12 (and therefore to ground GND1). The cathode of rectifier diode D11 is connected to terminal TM3 and also to the first end of power supply capacitor C12. The second end of power supply capacitor C12 is connected to wiring WR12 (and therefore to ground GND1).

[0029] The charging circuit 120 is connected to terminals TM3 and TM4. Under the control of the control circuit 110, the charging circuit 120 can supply a current based on the pulsating voltage Vpls to the power supply capacitor C12 as a charging current for the power supply capacitor C12.

[0030] The voltage detection circuit 130 is connected to terminal TM4. Based on the voltage at terminal TM4, the voltage detection circuit 130 determines whether or not an AC voltage Vac is supplied between input terminals IN1 and IN2, and outputs a signal indicating the result of this determination to the control circuit 110. When the voltage detection circuit 130 detects that the supply state of the AC voltage Vac has switched from the ON state to the OFF state, the voltage detection circuit 130 outputs a brownout signal to the control circuit 110. When the control circuit 110 receives the brownout signal, the control circuit 110 stops the switching control of the switching transistor M1 and keeps the switching transistor M1 in the OFF state. Even after the supply state of the AC voltage Vac has switched from the ON state to the OFF state, the normal operation of the control circuit 110 is ensured for a while based on the power supply voltage VCC. The voltage detection circuit 130 also detects the level of the pulsating voltage Vpls and outputs a signal to the control circuit 110 according to the detection result of the pulsating voltage Vpls level, separately from the brownout signal (the operation of the control circuit 110 based on this detection result will be described later). The level of the pulsating voltage Vpls refers to the instantaneous value of the pulsating voltage Vpls.

[0031] The first end of the secondary winding W2 is connected to the anode of the rectifier diode D21, and the cathode of the rectifier diode D21 is connected to the wiring WR21. The second end of the secondary winding W2 is connected to the wiring WR22. The wiring WR21 is connected to the output terminal OUTp, and the wiring WR22 is connected to the output terminal OUTn and ground GND2. The first end of the output capacitor C21 is connected to the wiring WR21, and the second end of the output capacitor C21 is connected to the wiring WR22. In the secondary circuit, the output voltage Vout is applied to the wiring WR21. That is, the potential of the wiring WR21 is higher than the potential of the wiring WR22 by the output voltage Vout. The output voltage Vout has a positive voltage value. The current flowing through the secondary winding W2 is called the secondary current Is. During all or part of the off period of the switching transistor M1, the secondary current Is flows from the wiring WR22 towards the wiring WR21 through the secondary winding W2 and the rectifier diode D21.

[0032] The first end of voltage divider resistor R21 is connected to wiring WR21. The second end of voltage divider resistor R21 is connected to the first end of voltage divider resistor R22, and the second end of voltage divider resistor R22 is connected to ground GND2. The connection node between voltage divider resistors R21 and R22 is connected to the secondary control device 20. The secondary control device 20 is also connected to ground GND2 and wiring WR21. The secondary control device 20 is driven based on the output voltage Vout, with the potential of ground GND2 as the reference. The voltage Vq at the connection node between voltage divider resistors R21 and R22 is the voltage division of the output voltage Vout.

[0033] In the AC / DC converter 1, a photocoupler PC is provided across the primary and secondary circuits. The photocoupler PC has a light-emitting element PCa provided in the secondary circuit and a light-receiving element PCb provided in the primary circuit. The first end of resistor R23 is connected to the node to which the output voltage Vout is applied, and the light-emitting element PCa is provided between the second end of resistor R23 and the secondary control device 20. The light-receiving element PCb is connected in parallel to capacitor C13. The first end of capacitor C13 is connected to terminal TM6, and the second end of capacitor C13 is connected to ground GND1. The voltage at the first end of capacitor C13 is the feedback voltage Vfb.

[0034] Load LD is the load of AC / DC converter 1. Load LD is any load connected to a pair of output terminals OUTp and OUTn and driven based on the output voltage Vout. For example, Load LD can be a microcomputer, a DSP (Digital Signal Processor), a power supply circuit, lighting equipment, an analog circuit, or a digital circuit.

[0035] The basic operation of the AC / DC converter 1 configured as described above will now be explained. The control circuit 110 controls the switching transistor M1 to turn on by supplying a high-level signal to the gate of the switching transistor M1, and controls the switching transistor M1 to turn off by supplying a low-level signal to the gate of the switching transistor M1. In switching control, the control circuit 110 alternately switches the state of the switching transistor M1 between the on state and the off state. During the on period of the switching transistor M1, the primary side current Ip flows from the wiring WR11 through the primary side winding W1, terminal TM1, the channel of the switching transistor M1 (between drain and source), terminal TM5, and sense resistor Rsns to ground GND1. During the off period of the switching transistor M1, the primary side current Ip through the switching transistor M1 is cut off. In other words, the control circuit 110 controls the primary side winding W1 and the primary side current Ip through the switching transistor M1 by controlling the switching of the switching transistor M1.

[0036] During the ON period of the switching transistor M1, the primary current Ip increases over time, and energy corresponding to the primary current Ip is stored in the primary winding W1. Then, during the OFF period of the switching transistor M1, the stored energy is released from the secondary winding W2 (more specifically, the secondary current Is based on the stored energy flows through the rectifier diode D21 during the OFF period of the switching transistor M1), charging the output capacitor C21 and producing the output voltage Vout.

[0037] The secondary control device 20 supplies a current to the light-emitting element PCa of the photocoupler PC corresponding to the voltage Vq generated at the connection node between the voltage divider resistors R21 and R22. As a result, a current corresponding to the amount of current supplied to the light-emitting element PCa is generated in the photodetector PCb of the photocoupler PC, causing the feedback voltage Vfb to fluctuate. Although not specifically shown, a pull-up resistor is provided in series between the node to which a constant positive voltage based on the power supply voltage VCC is applied and terminal TM6 in the primary control device 10, and the feedback voltage Vfb is generated through the cooperation of this pull-up resistor and capacitor C13. The secondary control device 20 controls the amount of current supplied to the light-emitting element PCa so that the voltage Vq matches a predetermined reference voltage, thereby generating a feedback voltage Vfb in the primary circuit corresponding to the output voltage Vout. The control circuit 110 controls the switching of the switching transistor M1 based on the feedback voltage Vfb, thereby stabilizing the output voltage Vout at a predetermined target voltage Vtg (not shown).

[0038] More specifically, the secondary control device 20 compares the voltage Vq with a predetermined reference voltage Vref_q (not shown). If the voltage Vq is higher than the reference voltage Vref_q, it increases the amount of current supplied to the light-emitting element PCa. If the voltage Vq is lower than the reference voltage Vref_q, it decreases the amount of current supplied to the light-emitting element PCa. An increase in the amount of current supplied to the light-emitting element PCa leads to a decrease in the feedback voltage Vfb, and a decrease in the amount of current supplied to the light-emitting element PCa leads to an increase in the feedback voltage Vfb. The control circuit 110 can switch-control the switching transistor M1 using a pulse width modulation method. In this case, the control circuit 110 decreases the on-duty cycle of the switching transistor M1 as the feedback voltage Vfb decreases, and increases the on-duty cycle of the switching transistor M1 as the feedback voltage Vfb increases. This realizes feedback control in which the error between the voltage Vq and the reference voltage Vref_q is maintained at zero or near zero. When "Vq = Vref_q", "Vout = Vtg". The on-duty cycle of the switching transistor M1 refers to the ratio of the length of the ON period of the switching transistor M1 to the length of the switching period in each switching cycle of the switching transistor M1. Note that the control method of the switching transistor M1 by the control circuit 110 is not limited to pulse width modulation. Therefore, for example, the control circuit 110 may control the switching of the switching transistor M1 using pulse frequency modulation at a switching frequency corresponding to the feedback voltage Vfb.

[0039] A sense voltage Vsns is also input to the control circuit 110. The control circuit 110 can perform overcurrent protection processing based on the sense voltage Vsns. Specifically, for example, if the sense voltage Vsns exceeds a predetermined overcurrent detection voltage during each switching cycle of the switching transistor M1, the control circuit 110 performs overcurrent protection processing by immediately turning off the switching transistor M1. In addition, if the control circuit 110 determines that the switching transistor M1 is in an overcurrent state based on the sense voltage Vsns, it can also stop the switching control of the switching transistor M1 for a certain period of time and keep the switching transistor M1 in the off state.

[0040] A voltage corresponding to the magnetic flux generated in the primary winding W1 is induced in the auxiliary winding W3. In the steady state, the voltage induced in the auxiliary winding W3 based on the magnetic flux generated in the primary winding W1 is rectified and smoothed by the rectifier diode D11 and the power supply capacitor C12, so that a sufficiently high power supply voltage VCC (a voltage equal to or greater than the charge judgment voltage VM described later: see Figure 6) is continuously applied to terminal TM3. The steady state refers to the state in which the switching transistor M1 is continuously switched at a sufficiently high frequency, and in the steady state, the power consumption of the load LD is sufficiently large. In the steady state, the control circuit 110 operates in normal mode.

[0041] The AC / DC converter 1 may also be in a standby state. The standby state is a state in which the power consumption of the load LD is sufficiently small compared to the steady state, and includes a state in which the power consumption of the load LD is virtually zero. When the switching transistor M1 is switched in the standby state, the output voltage Vout quickly reaches the target voltage Vtg and exceeds the target voltage Vtg, and the state of "Vout > Vtg" causes a decrease in the feedback voltage Vfb. When the feedback voltage Vfb falls below a certain voltage, the operating mode of the control circuit 110 switches from normal mode to burst mode, and thereafter the control circuit 110 operates in burst mode until the feedback voltage Vfb exceeds the said certain voltage. In burst mode as well, the control circuit 110 controls the switching of the switching transistor M1, but the number of times the switching transistor M1 switches within a certain time (the number of times the switching transistor M1 switches between on and off) is much smaller in burst mode than in normal mode. For this reason, in the standby state, the charging of the power supply capacitor C12 based on the induced voltage in the auxiliary winding W3 may be insufficient or may be insufficient.

[0042] The charging circuit 120 operates particularly effectively in situations where the power supply capacitor C12 is not sufficiently charged due to the induced voltage in the auxiliary winding W3, such as in a standby state, and supplies a charging current based on the pulsating voltage Vpls to the power supply capacitor C12 at the necessary timing. As will be described later, it is also possible to configure the AC / DC converter 1 without the auxiliary winding W3, in which case the power supply voltage VCC is secured solely based on the charging current from the charging circuit 120.

[0043] Figure 3 shows a reference AC / DC converter 1_ref with a different configuration from the AC / DC converter 1 according to this embodiment. Figure 4 shows the timing chart of the reference AC / DC converter 1_ref in standby mode. In the reference AC / DC converter 1_ref, when the power supply voltage VCC falls below the lower limit determination voltage VL, the control circuit 110 operates to supply current Ia_ref from the rectifier circuit 4 to the primary side control device 10_ref through terminal TM4. During the period when current Ia_ref is supplied, a portion of current Ia_ref becomes the current consumption ICC of the control circuit 110, and the remainder of current Ia_ref becomes the charging current of the power supply capacitor C12. Subsequently, in the primary side control device 10_ref, when the power supply voltage VCC reaches a charging stop voltage VH that is higher than the lower limit determination voltage VL, the control circuit 110 operates to stop supplying current Ia_ref to the primary side control device 10_ref. During the period when current Ia_ref is not supplied, the power supply capacitor C12 is discharged by the current consumption ICC, and the power supply voltage VCC gradually decreases. Then, when the power supply voltage VCC falls below the lower limit determination voltage VL again, the primary side control device 10_ref returns to a state where current Ia_ref is supplied. The same operation is then repeated. This allows the primary side control device 10_ref to maintain the power supply voltage VCC at or above the lower limit determination voltage VL.

[0044] In the primary control device 10_ref, the above-mentioned control related to charging is performed regardless of the level of the pulsating voltage Vpls. That is, although the pulsating voltage Vpls generally fluctuates between 0V and the maximum voltage value of the AC voltage Vac, in the primary control device 10_ref, the supply and non-supply of current Ia_ref is determined based only on the relationship between the power supply voltage VCC, the lower limit determination voltage VL, and the charging stop voltage VH, regardless of the level of the pulsating voltage Vpls. In the primary control device 10_ref, the average current value of current Ia_ref is equal to the value of the current consumption ICC of the control circuit 110. Then, during the period when power supply from the auxiliary winding W3 to the power supply capacitor C12 is stopped, the power consumption PW_ref of the primary control device 10_ref is expressed as the product of the average voltage of the pulsating voltage Vpls and the current consumption ICC (here, the power consumption of circuits other than the control circuit 110 in the primary control device 10_ref is considered small and ignored). If the average voltage of the pulsating voltage Vpls is 300V (volts) and the current consumption ICC is 0.3mA (milliamperes), then the power consumption PW_ref of the primary side control device 10_ref will be 90mW (milliwatts) because "300 × 0.3 = 90".

[0045] In contrast, the primary control device 10 in the AC / DC converter 1 shown in Figure 1 switches whether or not the charging circuit 120 can supply charging current to the power supply capacitor C12 according to the level of the pulsating voltage Vpls (details will be described later).

[0046] The following describes several specific configuration examples, operation examples, application techniques, and modification techniques related to the AC / DC converter 1 in several practical examples. Unless otherwise specified and without contradiction, the matters described above apply to each of the following examples. In the event of any inconsistency between the above and the above in any example, the description in the example may take precedence. Furthermore, unless there is a contradiction, the matters described in any of the following examples can be applied to any other example (i.e., any two or more examples from the multiple examples can be combined).

[0047] <<First Example>> A first embodiment will be described. Figure 5 is an overall configuration diagram of the AC / DC converter 1 according to the first embodiment. In the AC / DC converter 1 of Figure 5, the charging circuit 120 is configured with a transistor 121, a constant current circuit 122, and a switch 123, and the voltage detection circuit 130 is configured with a comparator 131 and voltage divider resistors 132 and 133.

[0048] Transistor 121 is an N-channel JFET (junction field-effect transistor). Transistor 121 is a normally-marion field-effect transistor. That is, transistor 121 conducts between its drain and source even when the gate-source voltage of transistor 121 is 0V. The drain of transistor 121 is connected to terminal TM4, and the source of transistor 121 is connected to the first terminal of constant current circuit 122. The second terminal of constant current circuit 122 is connected to the first terminal of switch 123, and the second terminal of switch 123 is connected to terminal TM3. In this way, transistor 121, constant current circuit 122, and switch 123 are connected in series with respect to terminals TM4 and TM3.

[0049] Transistor 121 functions as a clamper element to limit the voltage applied to the first terminal of the constant current circuit 122 to below the pinch-off voltage of transistor 121. This allows the constant current circuit 122 to be constructed using low-voltage components. The constant current circuit 122 is driven based on the source voltage of transistor 121 with respect to the potential of ground GND1, and maintains a constant current value I CNST A current Ia can be generated. However, current Ia occurs only during the ON period of switch 123. Current Ia is interrupted during the OFF period of switch 123 (i.e., current Ia is zero). During the ON period of switch 123, current Ia flows from the rectifier circuit 4 through terminal TM4, transistor 121, constant current circuit 122, and switch 123 to terminal TM3. Switch 123 is an analog switch composed of one or more MOSFETs, and under the control of the control circuit 110, switching 123 on or off causes conduction or interruption between the constant current circuit 122 and terminal TM3.

[0050] The first end of the voltage dividing resistor 132 is connected to the terminal TM4, and the second end of the voltage dividing resistor 132 is connected to the node 134 together with the first end of the voltage dividing resistor 133. The second end of the voltage dividing resistor 133 is connected to the ground GND1. The voltage Vdiv at the node 134 is a divided voltage of the pulsating current voltage Vpls. That is, the voltage dividing resistors 132 and 133 form a voltage dividing circuit, and by dividing the pulsating current voltage Vpls, a voltage Vdiv proportional to the pulsating current voltage Vpls is generated.

[0051] The inverting input terminal of the comparator 131 is connected to the node 134 and receives the supply of the voltage Vdiv. A reference voltage Vref having a predetermined positive DC voltage value is input to the non-inverting input terminal of the comparator 131. The reference voltage Vref may be generated based on the power supply voltage VCC by a reference voltage generation circuit (not shown) provided in the primary side control device 10. The comparator 131 compares the voltage Vdiv with the reference voltage Vref and outputs a signal S131 indicating their high and low relationship. The signal S131 is input to the control circuit 110. The signal S131 is a binary signal having a low level or a high level. When "Vdiv < Vref" holds, the signal S131 has a high level, and when "Vdiv > Vref" holds, the signal S131 has a low level. When "Vdiv = Vref" holds, the signal S131 has a high level or a low level.

[0052] The control circuit 110 sets the switch 123 to on or off according to the signal S131. The control circuit 110 may also have a function of controlling the value of the current Ia during the on period of the switch 123. Further, the control circuit 110 has a function of detecting the power supply voltage VCC, and in addition to the signal S131, also considers the value of the power supply voltage VCC and sets the switch 123 to on or off.

[0053] Fig. 6 shows a timing chart in the standby state of the AC / DC converter 1. In Fig. 6, from top to bottom, the waveforms of the pulsating current voltage Vpls, the power supply voltage VCC, the waveform of the signal 131, the state of the switch 123, and the waveform of the current Ia are shown. The pulsating current voltage Vpls generally varies between 0V and the maximum voltage value of the alternating current voltage Vac. The charge permission voltage Vchg has a positive predetermined voltage value lower than the maximum voltage value of the alternating current voltage Vac (i.e., a positive voltage value smaller than the amplitude of the alternating current voltage Vac). The values of the reference voltage Vref and the voltage dividing resistors 132 and 133 are set such that when "Vpls > Vchg" holds, "Vdiv > Vref" and the signal S131 has a low level, and when "Vpls < Vchg" holds, "Vdiv < Vref" and the signal S131 has a high level.

[0054] In the control circuit 110, a lower limit determination voltage VL, a charge stop voltage VH, and a charge determination voltage VM are preset in relation to the power supply voltage VCC. "0 < VL < VM ≤ VH" holds. Here, although the following description is made assuming "VM < VH", "VM = VH" may also be possible. When "VM = VH", the charge stop voltage VH and the charge determination voltage VM refer to the same voltage.

[0055] The control circuit 110 can individually detect the magnitude relationship between the power supply voltage VCC, the lower limit determination voltage VL, the charge stop voltage VH, and the charge determination voltage VM. In Fig. 6, a reference case is assumed in which the power supply voltage VCC does not fall below the lower limit determination voltage VL in the standby state. In the reference case, the control circuit 110 can control the switch 123 to be on only during the high level period of the signal S131.

[0056] Specifically, the control circuit 110 sets the high level period of the signal S131 as the charge permission period and the low level period of the signal S131 as the charge suppression period. The control circuit 110 permits the switch 123 to be turned on during the charge permission period, thereby setting the current value I. CNSTThe charging circuit 120 allows charging of the power supply capacitor C12 with a current Ia having the value I. CNST A current Ia (constant current) with the value I is output to terminal TM3 through switch 123. CNST The current consumption I is greater than the value of the control circuit 110's current consumption ICC. Therefore, the current value I CNST During the period when a current Ia is output from the charging circuit 120, a portion of the current Ia is supplied to the control circuit 110 as the current consumption ICC, and the remainder of the current Ia (i.e., the remaining portion of the current Ia) is supplied to the power supply capacitor C12 as the charging current to the power supply capacitor C12. The power supply voltage VCC rises due to the charging current based on the current Ia. The control circuit 110 suppresses the supply of charging current to the power supply capacitor C12 by setting switch 123 to the OFF position during the charging suppression period. Assuming that power supply from the auxiliary winding W3 to the power supply capacitor C12 is stopped, during the OFF period of switch 123 (in other words, during the period when the current Ia is zero), the power supply capacitor C12 is discharged by the current consumption ICC, and the power supply voltage VCC gradually decreases.

[0057] The operation of the primary control device 10 in the reference case will be explained in detail along with the timing chart in Figure 6. For the sake of clarity, we will focus on the three times t1, t2, t3, and t4 shown in Figure 6. As time progresses, times t1, t2, t3, and t4 occur in this order. The difference between times t1 and t4 corresponds to half a cycle of the AC voltage Vac. The difference between times t1 and t3 is shorter than half a cycle of the AC voltage Vac.

[0058] At time t1, the state changes from the state where "Vpls > Vchg" holds to the state where "Vpls < Vchg". Therefore, at time t1, the level of signal S131 switches from the low level to the high level, and at time t1, the charging inhibition period switches to the charging permission period. The control circuit 110 according to the first embodiment switches switch 123 from off to on when the power supply voltage VCC is lower than a predetermined charging determination voltage VM during the charging permission period. When the power supply voltage VCC is equal to or higher than the charging determination voltage VM during the charging permission period, the control circuit 110 does not switch switch 123 from off to on. In the reference case of FIG. 6, the power supply voltage VCC at time t1 is lower than the charging determination voltage VM. Therefore, the control circuit 110 switches switch 123 from off to on at time t1. At time t1, with the switching of switch 123 from off to on, the value of current Ia abruptly rises from zero to the current value I CNST to a steep increase.

[0059] After time t1, during the on period of switch 123, a part of the current Ia having the current value I CNST is supplied to the control circuit 110 as the consumption current ICC of the control circuit 110, and the remainder of the current Ia (i.e., the remaining part of the current Ia) is supplied to the power supply capacitor C12 as the charging current for the power supply capacitor C12. Therefore, during the on period of switch 123, the power supply voltage VCC rises due to the charging current based on current Ia. At time t2 due to the rise of the power supply voltage VCC, the power supply voltage VCC reaches the charging stop voltage VH. That is, at time t2, the state changes from the state where "VCC < VH" holds to the state where "VCC ≥ VH" holds (or changes to the state where "VCC > VH" holds). At time t2, in response to the power supply voltage VCC reaching the charging stop voltage VH, the control circuit 110 switches switch 123 from on to off, thereby stopping the supply of the charging current to the power supply capacitor C12 based on current Ia. At time t2, the value of current Ia abruptly drops from the current value I CNST to zero.

[0060] Thereafter, after the pulsating voltage Vpls rises, it switches from the state where "Vpls < Vchg" holds to the state where "Vpls > Vchg" at time t3. For this reason, the level of signal S131 switches from high level to low level at time t3, and switches from the charge permission period to the charge inhibition period with time t3 as the boundary. Incidentally, from time t1 onwards until time t3, "Vpls < Vchg" is maintained, and it is assumed that the power supply voltage VCC remains higher than the charge determination voltage VM between times t2 and t3. For this reason, on the premise that the power supply from the auxiliary winding W3 to the power supply capacitor C12 is stopped, after time t2 until the next charge permission period arrives, the power supply capacitor C12 is discharged by the consumption current ICC, and the power supply voltage VCC gradually decreases. After time t3, when it switches again from the state where "Vpls > Vchg" holds to the state where "Vpls < Vchg" at time t4, the same operations as the series of operations starting from time t1 are repeated.

[0061] In the state where the power supply from the auxiliary winding W3 to the power supply capacitor C12 is stopped, the average current value of the current Ia is equal to the value of the consumption current ICC of the control circuit 110. Then, during the period when the power supply from the auxiliary winding W3 to the power supply capacitor C12 is stopped, the power consumption PW of the primary side control device 10 is represented by the product of the average voltage of the pulsating voltage Vpls during the on period of the switch 123 and the consumption current ICC (here, the power consumption of circuits other than the control circuit 110 in the primary side control device 10 is ignored as being small). The average voltage of the pulsating voltage Vpls during the on period of the switch 123 is less than 50V if the charge permission voltage Vchg is 50V. Therefore, if the consumption current ICC is 0.3 mA (milliamperes), during the period when the power supply from the auxiliary winding W3 to the power supply capacitor C12 is stopped, the power consumption PW of the primary side control device 10 is less than 15 mW from "50 × 0.3 = 15". This is significantly smaller compared to the power consumption PW_ref (90 mW) of the primary side control device 10_ref in the reference AC / DC converter 1_ref in FIG. 3.

[0062] On the premise that the power supply from the auxiliary winding W3 to the power supply capacitor C12 has stopped, the current value I CNST The time required to raise the power supply voltage VCC from the lower limit determination voltage VL to the charge stop voltage VH by the current Ia having is referred to as the charge time Tm. It is preferable that the capacitance value of the power supply capacitor C12 is set in consideration of the value of the charge permission voltage Vchg so that the charge time Tm is shorter than the length of one charge permission period.

[0063] <<Second Embodiment>> The second embodiment will be described. The second embodiment and each of the embodiments described later are embodiments based on the first embodiment, and the description of the first embodiment is also applicable to the second embodiment and each of the embodiments described later for matters not particularly described in the second embodiment.

[0064] Depending on the capacitance value of the power supply capacitor C12, unlike the reference case in FIG. 6, the power supply voltage VCC may drop to the lower limit determination voltage VL during the charge suppression period. The control circuit 110 can operate normally on the premise that the power supply voltage VCC is higher than the operation guarantee lower limit voltage slightly lower than the lower limit determination voltage VL. In order to ensure the normal operation of the control circuit 110, when the power supply voltage VCC drops to the lower limit determination voltage VL during the charge suppression period (that is, when switching from the state where "VCC>VL" holds to the state where "VCC≦VL" holds or the state where "VCC<VL" holds), regardless of the level of the pulsating current voltage Vpls at that time (that is, regardless of the level of the signal S131), the switch 123 is switched from off to on. As the switch 123 is switched from off to on during the charge suppression period, the value of the current Ia switches from zero to the current value I CNST and the supply of the charging current to the power supply capacitor C12 is started by the current Ia having the current value I CNST . After that, when the power supply voltage VCC reaches the charge stop voltage VH, that is, when switching from the state where "VCC<VH" holds to the state where "VCC≧VH" holds (or when switching to the state where "VCC>VH" holds), the control circuit 110 switches the switch 123 from on to off, thereby stopping the charging of the power supply capacitor C12 by the current Ia.

[0065] FIG. 7 shows a flowchart of the on / off control for the switch 123 of the control circuit 110. However, the flowchart in FIG. 7 is the flowchart after the activation of the control circuit 110. After the activation of the control circuit 110, after the power supply voltage VCC reaches the charge stop voltage VH and the switch 123 is set to off, it is assumed that the process proceeds to step S11. At the stage of step S11, the switch 123 is off. After step S11, the process proceeds to step S12.

[0066] In step S12, the control circuit 110 determines the validity of the first inequality "VCC < VL" by comparing the power supply voltage VCC with the lower limit determination voltage VL. The first inequality may be "VCC ≦ VL". In step S12, when the first inequality holds (Y in step S12), the process proceeds to step S15, while when the first inequality does not hold (N in step S12), the process proceeds to step S13.

[0067] In step S13, the control circuit 110 checks whether the output signal S131 of the comparator 131 has a high level. In step S13, when the signal S131 has a high level (Y in step S13), the process proceeds to step S14, while when the signal S131 has a low level (N in step S13), the process returns to step S12. The high level period of the signal S131 corresponds to the charge permission period, and the low level period of the signal S131 corresponds to the charge suppression period (see FIG. 6 as appropriate).

[0068] In step S14, the control circuit 110 determines the validity of the second inequality "VCC < VM" by comparing the power supply voltage VCC with the charge determination voltage VM. The second inequality may be "VCC ≦ VM". In step S14, when the second inequality holds (Y in step S14), the process proceeds to step S15, while when the second inequality does not hold (N in step S14), the process returns to step S12.

[0069] In step S15, the control circuit 110 switches switch 123 from off to on. As switch 123 switches from off to on, the value of current Ia changes from zero to current value I CNST Switches to, current value I CNST The current Ia generates the charging current to the power supply capacitor C12. After step S15, the process proceeds to step S16.

[0070] In step S16, the control circuit 110 compares the power supply voltage VCC with the charge stop voltage VH to determine whether the third inequality "VCC≧VH" is true or false. The third inequality may also be "VCC>VH". In step S16, if the third inequality is true (Y in step S16), the process proceeds to step S17; however, if the third inequality is false (N in step S16), the determination process in step S16 is repeated. That is, when the process progresses from step S15 to step S16, the process does not proceed to step S17 until the third inequality is true, at which point the process proceeds to step S17.

[0071] In step S17, the control circuit 110 switches switch 123 from on to off. As switch 123 switches from on to off, the value of current Ia changes to the current value I CNST The value switches from zero, and as a result, the supply of charging current to the power supply capacitor C12 is stopped. After step S17, the process returns to step S12.

[0072] The operation of the control circuit 110 before and after startup will be explained, starting from a state where the AC voltage Vac is in the OFF state and the power supply voltage VCC is 0V. At the first timing, assume that the AC voltage Vac has switched from the OFF state to the ON state. At the first timing, the power supply voltage VCC is 0V and the control circuit 110 has not started. At the second timing immediately following the first timing, a positive voltage based on the pulsating voltage Vpls is applied to the first terminal of the constant current circuit 122 through the normally-on transistor 121, thereby bringing the constant current circuit 122 into a state where it can generate current Ia. At the second timing, the power supply voltage VCC is also 0V and the control circuit 110 has not started. However, before the control circuit 110 starts, the constant current circuit 122 turns on the switch 123 based on the source potential of transistor 121, thereby generating the current value Ia. CNST A current Ia flows through switch 123 toward terminal TM3. Note that switch 123 may be a normally-on analog switch.

[0073] After the second timing, the current value I CNST The current Ia charges the power supply capacitor C12, and the power supply voltage VCC gradually rises from 0V. As a result, at the third timing, which occurs after the second timing, the power supply voltage VCC reaches the lower limit voltage at which the control circuit 110 is guaranteed to operate, causing the control circuit 110 to start up. After the control circuit 110 starts up, it controls the on or off state of switch 123. However, immediately after the control circuit 110 starts up, it keeps switch 123 on until the power supply voltage VCC reaches the charging stop voltage VH, at which point it switches switch 123 off. After the control circuit 110 switches switch 123 off for the first time, the process proceeds to step S11. Before the control circuit 110 starts up, the switching transistor M1 is off. After the control circuit 110 starts up, it begins switching control over the switching transistor M1.

[0074] <<Third Example>> A third embodiment will be described. Numerical examples of the unit charging time Tchg, unit discharging time Tdischg, and ripple voltage ΔV in the reference case shown in Figure 6 are given. The unit charging time Tchg is the charging time for one cycle of the power supply capacitor C12 with current Ia, and corresponds to the difference between times t1 and t2 in Figure 6. The unit discharging time Tdischg is the time from the end of charging of the power supply capacitor C12 with current Ia until the start of charging of the power supply capacitor C12 with current Ia in the next cycle, and corresponds to the difference between times t2 and t4 in Figure 6. The ripple voltage ΔV is the fluctuation range of the power supply voltage VCC, and corresponds to the difference between the power supply voltage VCC at time t1 and the power supply voltage VCC at time t2.

[0075] Assume that the effective value of the AC voltage Vac is 300V (volts) and the frequency of the AC voltage Vac is 50Hz (hertz). Also, assume that the charging allow voltage Vchg is 50V and the power supply capacitor C12 has a capacitance value of 10μF (microfarads). Furthermore, assume that the current consumption ICC of the control circuit 110 is 0.3mA (milliamperes), and the current value I CNST Assume that the current is 6mA. Furthermore, assume that the lower limit judgment voltage VL is 9V and the charging stop voltage VH is 11V. Also, assume that the difference between the charging judgment voltage VM and the charging stop voltage VH is small or zero, and immediately after the signal S131 switches from low level to high level, the current value I CNST Assume that a current Ia with the following properties is generated.

[0076] In the reference case shown in Figure 6, it is obvious from the circuit configuration in Figure 5 that equations (1) and (2) below hold. From equations (1) and (2), equation (3) below holds. Note that the symbol "C12" in equations (1) to (3) represents the capacitance value of the power supply capacitor C12. ΔV=(I CNST -ICC)×Tchg / C12 ···(1) ΔV=ICC×Tdischg / C12 (2) Tdischg=( I CNST -ICC)×Tchg / ICC ···(3)

[0077] When applying the sum of the unit charge time Tchg and the unit discharge time Tdischg being 10 ms (milliseconds) to Equations (1) to (3), it is derived that the unit charge time Tchg is 0.5 ms, the unit discharge time Tdischg is 9.5 ms, and the ripple voltage ΔV is 0.285 V.

[0078] <<Fourth Embodiment>> The fourth embodiment will be described. As long as the above-described charge control for the power supply capacitor C12 is realized, the internal configuration of the primary side control device 10 is arbitrary. For example, the primary side control device 10 may be configured as shown in FIG. 8. In the primary side control device of FIG. 8, the control circuit 110 includes a comparator 111 and an OR circuit 112. The comparator 111 compares the power supply voltage VCC with the lower limit determination voltage VL, and generates and outputs a signal S111 that has a high level when "VCC <VL" holds and has a low level when "VCC> VL" holds. When "VCC = VL" holds, the signal S111 has a high level or a low level.

[0079] Signals S131 and S111 are input to the OR circuit 112. The OR circuit 112 outputs a high-level signal to the switch 123 during a period in which at least one of the signals S131 and S111 has a high level. The OR circuit 112 outputs a low-level signal to the switch 123 during a period in which both of the signals S131 and S111 have a low level. The switch 123 is in an on state during a period in which a high-level signal is output from the OR circuit 112, and the switch 123 is in an off state during a period in which a low-level signal is output from the OR circuit 112.

[0080] In the AC / DC converter 1 having the primary side control device 10 of FIG. 8, in the above-described reference case (see FIG. 6), as shown in FIG. 9, the switch 123 is maintained in the on state throughout the entire charge permission period. Therefore, the control circuit 110 of FIG. 8 has a function of controlling the current Ia, and during the on period of the switch S123, the value of the current Ia is set to zero or the current value I according to the power supply voltage VCC. CNST is set.

[0081] Specifically, the control circuit 110 in FIG. 8 generally sets the value of current Ia to zero. The control circuit 110 in FIG. 8 determines the validity of the second inequality "VCC < VM" during the charge permission period. When the establishment of the second inequality is confirmed, thereafter, until the third inequality "VCC ≥ VH" holds, the value of current Ia is set to the current value I CNST and when the third inequality "VCC ≥ VH" holds, the value of current Ia is returned to zero. The control circuit 110 in FIG. 8 determines the validity of the first inequality "VCC < VL" during the charge suppression period. When the establishment of the first inequality is confirmed, thereafter, until the third inequality "VCC ≥ VH" holds, the value of current Ia is set to the current value I CNST and when the third inequality "VCC ≥ VH" holds, the value of current Ia is returned to zero. As described above, the first inequality may be "VCC ≤ VL", the second inequality may be "VCC ≤ VM", and the third inequality may be "VCC > VH".

[0082] <<Example 5>> Example 5 will be described. Hysteresis characteristics may be imparted to the comparator 131. In this case, the level of the output signal S131 of the comparator 131 changes as follows. Starting from the state where the voltage Vdiv is sufficiently higher than the reference voltage Vref and the level of the signal S131 has a low level, the change in the level of the signal S131 will be described. When switching from the established state of "Vdiv > Vref" to the established state of "Vdiv < Vref" during the decreasing process of the voltage Vdiv, the level of the signal S131 switches from the low level to the high level. Thereafter, the comparator 131 having hysteresis characteristics maintains the level of the signal S131 at the high level until "Vdiv > Vref + ΔV HYS " holds, and when "Vdiv > Vref + ΔV HYS " holds, the level of the signal S131 is switched from the high level to the low level. Here, the voltage ΔV HYS represents the hysteresis width and has a predetermined positive voltage value.

[0083] <<Example 6>> A sixth embodiment will now be described. In any of the first to fifth embodiments, a modified MOD6 may be applied to the AC / DC converter 1, which removes the auxiliary winding W3. Figure 10 shows the overall configuration of the AC / DC converter 1 obtained by applying modified MOD6 to the AC / DC converter 1 of Figure 5. With the application of modified MOD6, the rectifier diode D11 (see Figure 5) is removed from the AC / DC converter 1. When the AC / DC converter 1 is not provided with the auxiliary winding W3, the AC / DC converter 1 operates according to the timing chart in Figure 6 or Figure 9, regardless of whether the state of the AC / DC converter 1 is a steady state or a standby state.

[0084] <<Example 7>> A seventh embodiment will now be described. In any of the first to sixth embodiments, a modified MOD7 may be applied to the AC / DC converter 1, in which the rectifier circuit 4 is a half-wave rectifier circuit. Figure 11 shows the overall configuration of the AC / DC converter 1 obtained by applying modified MOD7 to the AC / DC converter 1 of Figure 5. In the AC / DC converter 1 of Figure 11, the rectifier circuit 4 is composed only of diode 4b, and a pulsating voltage Vpls is generated by half-wave rectification of the AC voltage Vac. The anode of diode 4b is connected to the input terminal IN2, and the cathode of diode 4b is connected to terminal TM4.

[0085] When Modified MOD7 is applied, the length of a single charge permission period is halved compared to when Modified MOD7 is not applied, and the unit discharge time Tdischg is approximately doubled (the same applies when Modified MOD8, described later, is applied). Therefore, in order to maintain "VCC>VL" during the charge suppression period, the current value Ia must be greater than when Modified MOD7 is not applied. CNST Furthermore, measures such as sufficiently increasing the capacitance value of the power supply capacitor C12 will be necessary (the same applies when applying the modified MOD8 described later).

[0086] <<Example 8>> An eighth embodiment will now be described. In any of the first to sixth embodiments, a modified MOD 8 may be applied to the AC / DC converter 1 in which both rectifier circuits 3 and 4 are half-wave rectifier circuits. Figure 12 shows the overall configuration of the AC / DC converter 1 obtained by applying modified MOD 8 to the AC / DC converter 1 of Figure 5. The AC / DC converter 1 of Figure 12 has rectifier circuits 3A and 4A as rectifier circuits 3 and 4. Rectifier circuit 3A consists only of diode 3e, and rectifier circuit 4A consists only of diode 4c. In the AC / DC converter 1 of Figure 12, the anodes of diodes 3e and 4c are connected to terminal TM1, the cathode of diode 3e is connected to wiring WR11, and the cathode of diode 4c is connected to terminal TM4. Also, in the AC / DC converter 1 of Figure 12, the input terminal IN2 is connected to wiring WR12 (and therefore to ground GND1).

[0087] In the AC / DC converter 1 shown in Figure 12, the rectifier circuit 3A half-wave rectifies the AC voltage Vac, and the input voltage Vin is generated by smoothing the voltage obtained by the half-wave rectification of the rectifier circuit 3A with the input capacitor C11. That is, the rectifier circuit 3A and the input capacitor C11 constitute a rectifier and smoothing circuit that generates the input voltage Vin (primary voltage) by rectifying and smoothing the AC voltage Vac. In the AC / DC converter 1 shown in Figure 12, the rectifier circuit 4A generates a pulsating voltage Vpls by half-wave rectifying the AC voltage Vac.

[0088] <<Ninth Example>> A ninth embodiment will now be described. In any of the first to eighth embodiments, a modified MOD9 may be applied to the AC / DC converter 1, in which the switching transistor M1 is placed outside the primary side control device 10. Figure 13 shows the overall configuration of the AC / DC converter 1 obtained by applying modified MOD9 to the AC / DC converter 1 of Figure 5.

[0089] In the AC / DC converter 1 shown in Figure 13, the primary control device 10 is provided with terminal TM7 instead of terminal TM1 (see Figure 5). Terminal TM7 is one of the external terminals provided on the primary control device 10. In the AC / DC converter 1 shown in Figure 13, the control circuit 110 is connected to the gate of the switching transistor M1 via terminal TM7, and the switching transistor M1 is set to on or off by controlling the gate potential of the switching transistor M1 via terminal TM7. In the AC / DC converter 1 shown in Figure 13, the first end of the primary winding W1 is connected to wiring WR11, and the second end of the primary winding W1 is connected directly to the drain of the switching transistor M1 without going through the primary control device 10. The source of the switching transistor M1 is connected to wiring WR12 via sense resistor Rsns (and therefore to ground GND1).

[0090] <<Tenth Example>> In addition, various modification techniques can be applied to the AC / DC converter 1. Modification techniques or supplementary information applicable to the AC / DC converter 1 will be described in the 10th embodiment. The matters shown in the 10th embodiment can be applied to any of the AC / DC converters 1 of the 1st to 9th embodiments.

[0091] Although not specifically shown in the diagram, the voltage divider resistors 132 and 133 that constitute the voltage divider circuit may be located outside the primary side control device 10.

[0092] Although not specifically shown in the diagram, the rectifier circuit 4 or 4A may be built into the primary side control device 10. That is, the diodes 4a and 4b that constitute the rectifier circuit 4 or the diode 4c that constitutes the rectifier circuit 4A may be built into the primary side control device 10.

[0093] The feedback voltage Vfb is an example of a feedback signal corresponding to the output voltage Vout. The method of transmitting the feedback signal to the primary control device 10 is not limited to using a photocoupler PC. For example, the feedback signal may be transmitted to the primary control device 10 using a pulse transformer or a capacitor. Furthermore, transmission of the feedback signal to the primary control device 10 is not essential in the AC / DC converter 1.

[0094] Here, we have given an example of the configuration of AC / DC converter 1 employing a diode rectification method, but the AC / DC converter 1 can be any configuration as long as it generates an output voltage Vout on the secondary side from the primary side input voltage Vin using a switching method. For example, a synchronous rectification AC / DC converter 1 may be configured by providing a synchronous rectification transistor (not shown) in place of the rectification diode D21 in the secondary side circuit. In this case, a synchronous rectification transistor is inserted between one end of the secondary side winding W2 and the output terminal OUTp or OUTn, and the synchronous rectification transistor is turned on by the secondary side control device 20 during all or part of the off period of the switch transistor M1. Alternatively, for example, a forward method may be employed in the AC / DC converter 1.

[0095] A power adapter may be configured using the AC / DC converter 1. Alternatively, an electrical device with a built-in AC / DC converter 1 may be configured. The type of electrical device is not particularly limited. Any electrical device that has a built-in AC / DC converter 1 can be used, such as a television receiver, audio equipment, refrigerator, washing machine, or vacuum cleaner.

[0096] With respect to any signal or voltage, the relationship between their high and low levels can be the reverse of that described above, without undermining the main point stated above.

[0097] The channel types of the FETs (field-effect transistors) shown in the embodiments described above are illustrative. Without compromising the intent described above, the channel type of any FET can be changed between P-channel and N-channel types.

[0098] As long as no inconvenience arises, any transistor described above may be any type of transistor. For example, any transistor described above as a MOSFET (especially switching transistor M1) can be replaced with a junction FET, IGBT (Insulated Gate Bipolar Transistor), or bipolar transistor, as long as no inconvenience arises. Any transistor has a first electrode, a second electrode, and a control electrode. In an FET, one of the first and second electrodes is the drain and the other is the source, and the control electrode is the gate. In an IGBT, one of the first and second electrodes is the collector and the other is the emitter, and the control electrode is the gate. In a bipolar transistor that does not belong to the IGBT category, one of the first and second electrodes is the collector and the other is the emitter, and the control electrode is the base.

[0099] The embodiments of this disclosure can be modified in various ways as appropriate within the scope of the technical idea set forth in the claims. The embodiments described above are merely examples of embodiments of this disclosure, and the meaning of the terms in this disclosure or each constituent element is not limited to those described above. The specific numerical values ​​given in the above description are merely examples and can, of course, be changed to various numerical values.

[0100] <<Note>> A note is provided regarding this disclosure in which specific configuration examples are shown in the embodiments described above.

[0101] A semiconductor device (10) relating to one aspect of the present disclosure includes a charging circuit (120) configured to supply a charging current to a target capacitor (C12) based on a pulsating voltage (Vpls) obtained by rectifying an AC voltage (Vac), and a control circuit (110) configured to drive the target capacitor using the charging voltage of the target capacitor as a power supply voltage (VCC), wherein the control circuit is configured to control the supply or non-supply of the charging current to the target capacitor through control of the charging circuit according to the level of the pulsating voltage (first configuration).

[0102] This makes it possible to supply charging current when the pulsating current level is low. This leads to a reduction in the power consumption of semiconductor devices.

[0103] In the semiconductor device according to the first configuration described above, the control circuit may be configured to allow the supply of the charging current to the target capacitor during a charging permission period in which the pulsating voltage is lower than the charging permission voltage (Vchg) (second configuration).

[0104] This makes it possible to reduce the power consumption of semiconductor devices.

[0105] In the semiconductor device according to the second configuration described above, the control circuit may be configured to start supplying the charging current to the target capacitor using the charging circuit when the power supply voltage is lower than a predetermined charging determination voltage (VM) during the charging permission period, and to stop supplying the charging current by the charging circuit when the power supply voltage reaches a charging stop voltage (VH) that matches the charging determination voltage or is higher than the charging determination voltage after the start of supplying the charging current (third configuration).

[0106] In the semiconductor device relating to the third configuration described above, when the charging current is supplied to the target capacitor during the charging permission period, the charging circuit may output a constant current through the terminal (TM4) to which the pulsating voltage is applied, a portion of the constant current is supplied to the control circuit as the current consumed by the control circuit, and the other portion of the constant current is supplied to the target capacitor as the charging current (fourth configuration).

[0107] In a semiconductor device relating to any of the second to fourth configurations described above, the control circuit may be configured to suppress the supply of the charging current to the target capacitor during a charging suppression period when the pulsating voltage exceeds the charging permission voltage (fifth configuration).

[0108] In the semiconductor device according to the fifth configuration described above, the control circuit may be configured such that, during the charging suppression period, when the power supply voltage drops to a lower limit determination voltage (VL) lower than the charging determination voltage, it starts supplying the charging current to the target capacitor using the charging circuit regardless of the level of the pulsating voltage, and thereafter, when the power supply voltage reaches the charging stop voltage, it stops supplying the charging current by the charging circuit (sixth configuration).

[0109] Depending on the capacitance value of the target capacitor, the power supply voltage may drop transiently during the charging suppression period, potentially interfering with the normal operation of the control circuit. Adopting the sixth configuration ensures the normal operation of the control circuit.

[0110] In a semiconductor device relating to any of the above configurations 1 to 6, the charging circuit may have a switch (123) provided in series between the terminal to which the pulsating voltage is applied and the target capacitor, and the control circuit may have a configuration (7th configuration) that controls the supply or non-supply of the charging current to the target capacitor through the on or off control of the switch.

[0111] In a semiconductor device relating to any of the above configurations 1 to 7, the rectification may be performed as full-wave rectification or half-wave rectification (configuration 8).

[0112] An AC / DC converter according to one aspect of the present disclosure comprises a semiconductor device (10) according to any of the first to eighth configurations described above, a rectifier and smoothing circuit (3 and C11) configured to generate a primary voltage by rectifying and smoothing the AC voltage separately from the rectification, and a transformer (TR) having a primary winding (W1) and a secondary winding (W2) that receive the primary voltage, wherein the AC / DC converter (1) is configured to generate a secondary voltage (Vout) on the secondary side from the primary voltage (Vin) on the primary side, wherein a switching transistor (M1) configured to be connected in series with the primary winding is provided inside or outside the semiconductor device, and the control circuit is configured to generate the secondary voltage on the secondary side by switching control of the switching transistor (ninth configuration).

[0113] The AC / DC converter according to the ninth configuration described above may also have a configuration (tenth configuration) in which the transformer has an auxiliary winding (W3) on the primary side, and the target capacitor can be charged based on the voltage induced in the auxiliary winding by the switching control of the switching transistor, or the charging current from the charging circuit. [Explanation of Symbols]

[0114] 1 AC / DC converter 2 AC voltage source 3, 3A, 4, 4A rectifier circuit 3a~3e, 4a~4c diodes IN1, IN2 Input Terminals 10 Primary side control device C11 Input Capacitor C12 Power supply capacitor C13 Capacitor D11 Rectifier Diode Rsns Sense Resistance WR11, WR12, WR21, WR22 wiring TM1~TM7 terminals TR Transformer W1 Primary winding W2 Secondary winding W3 Auxiliary winding D21 Rectifier Diode C21 Output Capacitor OUTp, OUTn output terminals 20 Secondary control device LD load R21, R22 voltage divider resistors R23 resistance PC Photocoupler PCa light-emitting element PCB photodetector 110 Control circuit 120 Charging circuit 121 transistors 122 Constant current circuit 123 Switch 130 Voltage detection circuit 131 Comparator 132, 133 voltage divider resistors Vin Input Voltage Vout output voltage VCC power supply voltage Vac AC voltage Vpls (pulsating voltage) Vsns Sense Voltage Vfb Feedback Voltage Vdiv Voltage (Voltage Divider) Vref Reference Voltage ICC current consumption Ia current VH charging stop voltage VM Charging Judgment Voltage VL Lower Limit Judgment Voltage Vchg Charging Allowed Voltage 111 Comparator 112 OR circuit

Claims

1. A charging circuit configured to supply a charging current to a target capacitor based on a pulsating voltage obtained by rectifying an AC voltage, The system includes a control circuit configured to drive the target capacitor using its charging voltage as the power supply voltage, The control circuit controls the supply or non-supply of the charging current to the target capacitor through the control of the charging circuit, according to the level of the pulsating voltage. Semiconductor equipment.

2. The control circuit permits the supply of the charging current to the target capacitor during the charging permission period when the pulsating voltage is lower than the charging permission voltage. The semiconductor device according to claim 1.

3. The control circuit, during the charging permission period, starts supplying the charging current to the target capacitor using the charging circuit when the power supply voltage is lower than a predetermined charging determination voltage, and after the start of supplying the charging current, stops supplying the charging current by the charging circuit when the power supply voltage reaches a charging stop voltage that matches or is higher than the charging determination voltage. The semiconductor device according to claim 2.

4. During the charging permission period, when the charging current is supplied to the target capacitor, the charging circuit outputs a constant current through the terminal to which the pulsating voltage is applied. A portion of the constant current is supplied to the control circuit as the current consumed by the control circuit, and the other portion of the constant current is supplied to the target capacitor as the charging current. The semiconductor device according to claim 3.

5. The control circuit suppresses the supply of the charging current to the target capacitor during a charging suppression period when the pulsating voltage exceeds the charging permission voltage. A semiconductor device according to any one of claims 2 to 4.

6. During the charging suppression period, the control circuit starts supplying the charging current to the target capacitor using the charging circuit when the power supply voltage drops to a lower limit determination voltage lower than the charging determination voltage, regardless of the level of the pulsating voltage, and then stops supplying the charging current by the charging circuit when the power supply voltage reaches the charging stop voltage. The semiconductor device according to claim 5.

7. The charging circuit has a switch provided in series between the terminal to which the pulsating voltage is applied and the target capacitor. The control circuit controls the supply or non-supply of the charging current to the target capacitor through the on or off control of the switch. or semiconductor device according to any one of claims 1 to 4.

8. The rectification is either full-wave rectification or half-wave rectification. or semiconductor device according to any one of claims 1 to 4.

9. A semiconductor device according to any one of claims 1 to 4, A rectifier and smoothing circuit configured to generate a primary voltage by rectifying and smoothing the aforementioned AC voltage separately from the rectification, An AC / DC converter comprising a transformer having a primary winding that receives the primary voltage and a secondary winding, configured to generate a secondary voltage on the secondary side from the primary voltage on the primary side, A switching transistor configured to be connected in series with the primary winding is provided inside or outside the semiconductor device. The control circuit generates the secondary voltage on the secondary side by switching control of the switching transistor. AC / DC converter.

10. The transformer has an auxiliary winding on the primary side, The target capacitor is configured to be rechargeable based on the voltage induced in the auxiliary winding by the switching control of the switching transistor, or the charging current from the charging circuit. The AC / DC converter according to claim 8.

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