Internal impedance measurement circuit, semiconductor device, battery system, method for measuring the electrical characteristics of an object, method for fabricating a battery system

Abstract

This enables measurements that show changes in the characteristics of a voltage source. [Solution] The internal impedance measurement circuit 19 is a switching circuit 25 connected between a first conductor 27 and a second conductor 29, the switching circuit 25 includes a bypass circuit 35, each of which includes a switch 37 and a capacitor 39 connected in series, and the bypass circuits 35 are respectively connected between the anode and cathode of a plurality of voltage sources 10 connected in series, so that the bypass circuits 35 and the voltage sources 10 form their respective parallel circuits 22, the switching circuit 25 and the measurement conductive path 23 connected between the first conductor 27 and the second conductor 29, the measurement conductive path 23 includes a pair of applied conductors configured to receive an input signal for measuring the internal impedance of the voltage source 10, and the measurement conductive path 23 includes a pair of measurement conductors and measurement conductors configured to receive an output signal from the switching circuit 25 in response to the input signal.

Description

[Technical Field]

[0001] The present invention relates to an internal impedance measurement circuit, a semiconductor device, a battery system, a method for measuring the electrical characteristics of an object, and a method for manufacturing a battery system. [Background technology]

[0002] Patent Document 1 provides a battery monitoring device that can measure the AC impedance of a battery regardless of whether the battery is being charged or discharged.

[0003] Patent Document 2 provides a device for suppressing power consumption of a secondary battery and detecting signs of thermal runaway. The thermal runaway detection device comprises a measurement unit and a detection unit. The measurement unit measures voltage fluctuations using a fluctuating current at a predetermined frequency such that the imaginary part of the AC impedance of the secondary battery, calculated based on the voltage fluctuation, becomes zero. The detection unit detects that there are signs of thermal runaway in the secondary battery when the rate of change of the real part of the AC impedance obtained based on this voltage fluctuation is greater than a threshold. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2024-38292 [Patent Document 2] Japanese Patent Publication No. 2024-10570

[0005] [overview] Rechargeable batteries have characteristics that change with use, specifically through discharge and charging, and repeated cycles of these processes. Systems using rechargeable batteries change the characteristics of the batteries through use, and such systems require tracking of these characteristic changes.

[0006] What is needed is the ability to measure the characteristic changes of voltage sources such as secondary batteries.

[0007] The internal impedance measurement circuit according to the first aspect of the present disclosure is a switching circuit connected between a first conductor and a second conductor. The switching circuit includes a plurality of bypass circuits. Each of the bypass circuits includes a switch that responds to a switching signal and at least one capacitor. At least one of the capacitor and the switch are connected in series. The plurality of bypass circuits are respectively connected between the anode and the cathode of a plurality of voltage sources connected in series, and are configured such that the bypass circuits and the voltage sources form respective parallel circuits. A switching circuit, and a measurement conduction path connected between the first conductor and the second conductor. The measurement conduction path includes a first application conductor and a second application conductor configured to receive an input signal for measuring the internal impedance of the voltage source. The measurement conduction path includes a first measurement conductor and a second measurement conductor configured to receive an output signal from the switching circuit in response to the input signal. The first measurement conductor, the second measurement conductor, the first application conductor, and the second application conductor are arranged in order in a direction from one of the first conductor and the second conductor to the other in the measurement conduction path.

Brief Description of the Drawings

[0008] [Figure 1] FIG. 1 is a drawing schematically showing a battery system according to the present embodiment. [Figure 2] FIG.  2 is a drawing schematically showing an internal impedance measurement circuit according to the present embodiment. [Figure 3] FIG. 3 is a drawing schematically showing a main part of an internal impedance measurement circuit according to the present embodiment. [Figure 4] FIG. 4 is a drawing schematically showing a semiconductor device according to the present embodiment. [Figure 5]FIG. 5(a) is a drawing showing symbols of single cell batteries in the assembled battery shown in FIG. 3. FIG. 5(b) is a drawing showing an exemplary equivalent circuit model of a single cell battery in the assembled battery as an exemplary voltage source according to the present embodiment. FIG. 5(c) is a drawing showing an exemplary equivalent circuit model of a parallel circuit of a single cell battery and a bypass circuit in the assembled battery as an exemplary voltage source according to the present embodiment. [Figure 6] FIG. 6 is a drawing showing a bypass circuit of a switching circuit of an exemplary battery system and an equivalent circuit of the assembled battery. [Figure 7] FIG. 7 is a drawing showing a bypass circuit of a switching circuit of an exemplary battery system and an equivalent circuit of the assembled battery. [Figure 8] FIG. 8 is a drawing showing a bypass circuit of a switching circuit of an exemplary battery system and an equivalent circuit of the assembled battery. [Figure 9] FIG. 9 is a block diagram showing the configuration of a processing device according to the present embodiment. [Figure 10] FIG. 10 is a drawing showing main operations in an exemplary method according to the present embodiment. [Figure 11] FIG. 11(a) is a drawing showing the connection of a parallel circuit in an exemplary measurement object according to the present embodiment. FIG. 11(b) is a drawing showing a parallel circuit of conduction in an exemplary measurement object according to the present embodiment. FIG. 11(c) is a drawing showing a parallel circuit of non-conduction in an exemplary measurement object according to the present embodiment. [Figure 12] FIG. 12 is a drawing showing the module configuration of a processing device according to the present embodiment.

[0009] [Detailed Description] Hereinafter, each embodiment for implementing the present disclosure will be described with reference to the drawings. The same parts are denoted by the same reference numerals, and duplicate descriptions are omitted.

[0010] Figure 1 is a schematic diagram showing the battery system according to this embodiment. Figure 2 is a schematic diagram showing the internal impedance measurement circuit according to this embodiment. Figure 3 is a schematic diagram showing the main parts of the internal impedance measurement circuit according to this embodiment.

[0011] Referring to Figures 1 to 3, the battery system 11 may include a battery pack 17 and an internal impedance measurement circuit 19. The battery pack 17 is shown as an example of multiple voltage sources 10 connected in series, which will be described later. The exemplary internal impedance measurement circuit 19 may include a semiconductor device 13 and may further include a signal processing circuit 15.

[0012] An exemplary internal impedance measurement circuit 19 includes at least one of a measurement conductive path 23 and a switching circuit 25, and further includes a first conductor 27 and a second conductor 29. The measurement conductive path 23 is connected between the first conductor 27 and the second conductor 29. The switching circuit 25 is connected between the first conductor 27 and the second conductor 29. The switching circuit 25 is connected to the measurement conductive path 23 via the first conductor 27 and the second conductor 29.

[0013] The switching circuit 25 has one end 25b and the other end 25c. The switching circuit 25 is connected to the first conductor 27 at one end 25b and to the second conductor 29 at the other end 25c.

[0014] The switching circuit 25 may include a plurality of bypass circuits 35 (for example, six bypass circuits 35). The plurality of bypass circuits 35 are connected between the anode 10b and cathode 10c of each of the plurality of voltage sources 10 connected in series. Specifically, the bypass circuits 35 have a first electrode 35c and a second electrode 35d connected to the anode 10b and cathode 10c, respectively. Each of the voltage sources 10 has a characteristic to be measured, such as internal impedance. An exemplary voltage source 10 may be, for example, a secondary battery. An exemplary secondary battery may include cell batteries, and a plurality of cell batteries may constitute a battery pack. An exemplary cell battery includes, but is not limited to, lithium batteries. In the following description, a battery pack 17 will be referred to as a series connection of the plurality of voltage sources 10. The battery pack 17 includes cell batteries 18 connected in series.

[0015] Each of the bypass circuits 35 includes a switch 37 (SW1) that responds to a switching signal Ssw, and may further include one or more capacitors 39. The switch 37 and the one or more capacitors 39 may be connected in series. In an exemplary bypass circuit 35, the one or more capacitors 39 may include at least one capacitor connected between the anode 10b of the voltage source 10 and one end of the switch 37, and at least one capacitor connected between the cathode 10c of the voltage source 10 and the other end of the switch 37. Specifically, the one or more capacitors 39 may be implemented as three capacitors (e.g., C1, C2, C3) or two capacitors (e.g., C1, C3).

[0016] In the exemplary battery system 11 shown in Figure 1, each of the bypass circuits 35 may include one or more capacitors 39 (e.g., C1, C2, C3) in addition to a switch 37 (SW1) that responds to a switching signal Ssw.

[0017] In the drawing, three capacitors are depicted as exemplary capacitor 39. However, the symbols for these capacitors may not represent the capacitor elements in the fabricated device. A single capacitor symbol may be implemented as multiple capacitor elements, a single capacitor symbol may be implemented as a single capacitor element, or symbols for multiple capacitors in series may be implemented as a single capacitor element.

[0018] An exemplary measuring conductive path 23 may include a first applied conductor 23b and a second applied conductor 23c, as well as a first measuring conductor 23f and a second measuring conductor 23g. The first measuring conductor 23f, the second measuring conductor 23g, the first applied conductor 23b, and the second applied conductor 23c are arranged sequentially in the measuring conductive path 23 in the direction from one of the first conductor 27 and the second conductor 29 to the other.

[0019] The first applied conductor 23b and the second applied conductor 23c are configured to receive an input signal SIN for measuring their internal impedance.

[0020] The first measuring conductor 23f and the second measuring conductor 23g are configured to receive the output signal SOUT from the switching circuit 25.

[0021] The measurement circuit 24 is connected to the measurement conductive path 23. The measurement circuit 24 may include either a signal generator 31 or a signal measuring instrument 33. Alternatively, the measurement circuit 24 may include the other of the signal generator 31 and the signal measuring instrument 33. An exemplary measurement circuit 24 may include both the signal generator 31 and the signal measuring instrument 33. Specifically, the signal generator 31 and the signal measuring instrument 33 are connected in series between the first conductor 27 and the second conductor 29 in the measurement conductive path 23. An exemplary measurement circuit 24 may be configured to include the signal generator 31 and the signal measuring instrument 33, as well as a signal processing circuit 15 connected to the signal generator 31 and the signal measuring instrument 33.

[0022] In the example internal impedance measurement circuit 19, the signal generator 31 can be connected between the first applied conductor 23b and the second applied conductor 23c, and the signal measuring instrument 33 can be connected between the first measuring conductor 23f and the second measuring conductor 23g.

[0023] The first conductor 27 is configured to receive the input signal SIN from the signal generator 31. The second conductor 29 is configured to provide the output signal SOUT, which is generated in response to the input signal SIN, to the signal measuring instrument 33.

[0024] The input signal SIN can be generated to include an AC component. The output signal SOUT can be generated to include an AC component having the same frequency components as the input signal SIN.

[0025] An exemplary measuring conductive path 23 may include a switch 34 for switching the conduction / non-conductivity of the measuring conductive path 23. Non-conductivity of the switch 34 prevents the signal generator 31 and the signal measuring instrument 33 from being connected to the switching circuit 25, regardless of the activation of the signal generator 31 and the signal measuring instrument 33.

[0026] Specifically, the signal generator 31 can be configured to generate an input signal SIN that includes an AC waveform, and the signal measuring instrument 33 can be configured to receive an output signal SOUT.

[0027] As already explained, the switching circuit 25 can be provided with one end 25b as a signal input and the other end 25c as a signal output. The switching circuit 25 can be connected to one end of the battery pack 17 at one end 25b and to the other end of the battery pack 17 at the other end 25c.

[0028] The switching circuit 25 and the battery pack 17 are configured to receive an input signal SIN from the measuring conductive path 23 at one end shared by the switching circuit 25 and the battery pack 17, and this shared end is connected to the second conductor 29. The switching circuit 25 and the battery pack 17 are also configured to provide an output signal SOUT at the other end shared by the switching circuit 25 and the battery pack 17, and this other shared end is connected to the first conductor 27.

[0029] The internal impedance measurement circuit 19 further comprises a switching control circuit 51, which is configured to provide a switching signal Ssw for each bypass circuit 35. Specifically, the switching signal Ssw can switch each switch 37 of the bypass circuit 35 between conducting and not conducting. The switching control circuit 51 can also control the opening and closing of the switch 34.

[0030] The switching control circuit 51 can be configured to control the bypass circuits 35. This control is performed by opening the switch 37 of at least one of the multiple first bypass circuits 35f and closing the switch 37 of the remaining second bypass circuits 35g.

[0031] Specifically, the exemplary switching control circuit 51 is configured to open the switch 37 of one of the multiple bypass circuits 35, the first bypass circuit (35b in Figures 6 and 8), and to close the switch 37 of the remaining second bypass circuit (35c in Figures 7 and 8).

[0032] Furthermore, the exemplary switching control circuit 51 can be configured to control the bypass circuit 35 so that all of the switches 37 in the bypass circuit 35 are closed (conductive).

[0033] Furthermore, the exemplary switching control circuit 51 can be configured to control the bypass circuit 35 so that all of the switches 37 in the bypass circuit 35 are open (non-conductive). This control makes it possible to disconnect the battery pack 17 from the switching circuit 25.

[0034] The exemplary switching control circuit 51 is not limited to the above operation, and when the number of switches 37 is n1 (n1 is a natural number, n1>2), the following combinations of switching can be applied sequentially to the switching circuit 25. It is possible to select the conduction of m1 switches 37 (m1 is a non-negative integer, n1≧m1≧0) and the non-conduction of the remaining (n1-m1) switches 37.

[0035] Alternatively, the exemplary switching control circuit 51 is not limited to the above operation, and when the number of switches 37 is n2 (where n2 is a natural number, n2>2), the following combinations of switching can be applied sequentially to the switching circuit 25. It is possible to select m2 switches 37 (where m2 is a non-negative integer, n2≧m2≧0) to be non-conductive and select the remaining (n2-m2) switches 37 to conduct.

[0036] In each of the bypass circuits 35, the exemplary capacitor 39 may include a first capacitor 39b, which may be connected in series with the switch 37. In one bypass circuit 35, the first capacitor 39b acts as a propagation path for the AC component.

[0037] The exemplary capacitor 39 may include a second capacitor 39c and a third capacitor 39d. The second capacitor 39c and the third capacitor 39d in a bypass circuit 35 block the DC voltage of the voltage source 10 and act as a propagation path for the AC component. The first capacitor 39b, the second capacitor 39c, and the third capacitor 39d can be connected in series.

[0038] Referring to Figure 1, the first capacitor 39b and the second capacitor 39c are connected in series. For implementation purposes, these capacitors can be formed as a single capacitor.

[0039] Specifically, the second capacitor 39c has one end 39f and the other end 39g. The third capacitor 39d has one end 39j and the other end 39h.

[0040] The second capacitor 39c is connected at one end 39f to, for example, the anode 10b of each of the voltage sources 10, and the third capacitor 39d is connected at one end 39j to, for example, the cathode 10c of each of the voltage sources 10. The first capacitor 39b and the switch 37 are connected in series between the other end 39g of the second capacitor 39c and the other end 39h of the third capacitor 39d.

[0041] The voltages applied to the three capacitors, specifically the first capacitor 39b, the second capacitor 39c, and the third capacitor 39d, are referred to as "V1," "V2," and "V3" in this description. The ratio of the terminal voltages of the first capacitor 39b, the second capacitor 39c, and the third capacitor 39d is expressed as follows:

[0042] V1:V2:V3=1 / C1:1 / C2:1 / C3

[0043] Increasing the voltages across the second capacitor 39c and the third capacitor 39d reduces the voltage applied to the switch 37. Accordingly, the capacitances of the second capacitor 39c and the third capacitor 39d are made smaller than the capacitance of the first capacitor 39b. The smaller voltage reduces the maximum voltage that can be applied to the switch 37, thereby reducing the load on the breakdown voltage of the transistor in the semiconductor device 13.

[0044] Figure 4 is a schematic diagram showing a semiconductor device according to this embodiment.

[0045] An exemplary semiconductor device 13 will be described with reference to Figure 4.

[0046] The exemplary semiconductor device 13 is provided with a plurality of unit circuits 30. Specifically, this semiconductor device 13 may include an array 32 of the unit circuits 30.

[0047] The unit circuit 30 may include a first electrode 32b and a second electrode 32c provided to be coupled to external electrodes, specifically the anode and cathode of the cell battery 18. The coupling between the first electrode 32b and the second electrode 32c and the anode 10b and cathode 10c of the cell battery 18 can be provided by connecting the first electrode 32b and the second electrode 32c to the anode 10b and cathode 10c of each voltage source, such as the cell battery 18, via their respective capacitors. Alternatively, such coupling may be provided, for example, by directly connecting the first electrode 32b to the anode 10b of the cell battery 18.

[0048] In the exemplary semiconductor device 13, the first electrode 32b and the second electrode 32c can be connected to one end of the second capacitor 39c and the third capacitor 39d, respectively, and the unit circuit 30, the second capacitor 39c and the third capacitor 39d can constitute a bypass circuit 35.

[0049] The unit circuit 30 may include a switch 37. An exemplary switch 37 is embodied as a semiconductor transistor (for example, a metal-oxide-semiconductor (MOS) transistor). In addition to the switch 37, the unit circuit 30 may also include a first capacitor 39b if the element area of ​​the first capacitor 39b is acceptable as the chip area of ​​the semiconductor integrated circuit of the semiconductor device 13. The first capacitor 39b is connected in series with the switch 37 to form a series connection. However, when the second capacitor 39c and the third capacitor 39d use a semiconductor process that can be integrated into the semiconductor device 13, the semiconductor device 13 may include the second capacitor 39c and the third capacitor 39d within the unit circuit 30. Accordingly, the semiconductor device 13 in Figure 3 includes a bypass circuit 35 instead of the unit circuit 30.

[0050] As shown in Figure 4, the semiconductor device 13 may further include a switching control circuit 51 that controls the switches 37 of the unit circuit 30. The switching control circuit 51 is configured to individually control the switches 37 to be controlled, for example, all the control electrodes 37b of all the switches 37, as control inputs.

[0051] In semiconductor device 13, three capacitors are depicted as capacitors 39. However, these capacitor symbols may not represent the capacitor elements in the fabricated device. A single capacitor symbol may be implemented as multiple capacitor elements, or a symbol for multiple capacitors in series may be implemented as a single capacitor element.

[0052] Referring to Figure 4, the first capacitor 39b and the second capacitor 39c are connected in series. For implementation purposes, these capacitors can be formed as a single capacitor.

[0053] In the semiconductor device 13, the switching circuit 25 may include elements suitable for formation on a semiconductor substrate as a semiconductor integrated circuit from the circuit components of the bypass circuit 35. One consideration of suitability is, for example, blocking the high voltage of the cell battery 18. In the exemplary bypass circuit 35, the capacitors connected to the anode 10b and cathode 10c of the cell battery 18 (e.g., the second capacitor 39c and the third capacitor 39d) are configured to block the high voltage of the cell battery 18. Accordingly, the unit circuit 30 includes part or all of the bypass circuit 35.

[0054] Next, we will describe an equivalent circuit model representing the electrical characteristics of the exemplary voltage source 10 according to this embodiment.

[0055] Figure 5(a) is a diagram showing the symbol for a single cell battery in the battery pack 17 shown in Figure 3. Figure 5(b) is a diagram showing an exemplary equivalent circuit model of a single cell battery in the battery pack 17 as an exemplary voltage source 10 according to this embodiment. Figure 5(c) is a diagram showing an exemplary equivalent circuit model of a parallel circuit 22 between a single cell battery in the battery pack 17 as an exemplary voltage source 10 according to this embodiment and a bypass circuit.

[0056] Referring to Figures 5(a), 5(b), and 5(c), a secondary battery shown as an exemplary voltage source 10 and an exemplary equivalent circuit of the secondary battery will be described. The exemplary secondary battery includes a single cell battery.

[0057] A single cell battery 18 can be represented as an equivalent circuit model 16 including passive elements. This equivalent circuit model may include a parallel connection 18d of a capacitor 18b and a first resistor 18c connected in parallel, and a second resistor 18f connected in series with the parallel connection 18d. The parallel connection 18d and the second resistor 18f may constitute a series connection 18g.

[0058] The complex impedance of the first resistor 18c is referred to as "R1", the complex impedance of the capacitor 18b is referred to as "-j / ωC", and the complex impedance of the second resistor 18f is referred to as "R2". Although not shown in the diagram, the complex impedance of the inductor L is expressed as "jωL", where "ω" represents the angular frequency of the AC component.

[0059] Specifically, the first resistor 18c is the internal impedance that changes in accordance with the characteristics of the cell 18. The capacitor 18b originates from the electric double layer of the cell 18. The second resistor 18f is a parasitic resistance that originates from the mechanical structure of the cell 18. If necessary, a parasitic inductor that originates from the mechanical structure of the cell 18 can be added to the model.

[0060] The combined impedance Zp of the parallel connection 18d is derived as follows:

[0061] The combined impedance Zp of the RC parallel circuit is as follows. 1 / Zp = 1 / R1 - ωC / j = 1 / R1 + jωC

[0062] Zp = 1 / (1 / R1 + jωCR) = R1 / (1 + jωCR1) = R1 / (1 + ω 2 , <000,022>, <000,292>, <000,019>, <000,293>, <000,020>, <000,017>, <000,021> C 2 R1 2 ) - jωCR1 2 / (1 + ω 2 C <00000I6>R1 2 )

[0063] The phase angle θp of the parallel connector 18d is derived as follows as the ratio of the real part and the imaginary part of the complex impedance.

[0064] Based on the equivalent circuit model, it is expressed as follows. tanθp = -ωCR1 2 / R1 = -ωCR1

[0065] On the other hand, the phase angle θp is obtained by measurement. θp = tan -1 (-ωCR)

[0066] Next, the combined impedance Z (the combined impedance of the series circuit of the RC parallel and R) of the series connector 18g is derived as follows.

[0067] Z = Zp + Zs = R1 / (1 + ω 2 C 2 R1 2 ) - jωCR1 2 / (1 + ω 2 C 2 R1 2 ) + R2 = (R1 + R2 + ω 2 C 2 R1 2 R2) / (1 + ω 2 C 2 R1 2 ) -jωCR1 2 / (1+ω 2 C 2 R1 2 )

[0068] The complex impedance is expressed as follows, with a real part Zr and an imaginary part Zi: Z=Zr+jZi

[0069] The phase angle θ of the series connection 18g is derived as the ratio of the real and imaginary parts of the complex impedance, as follows: tanθ = Zi / Zr =-ωCR1 2 / (R1+R2+ω 2 C 2 R1 2 R2)

[0070] The phase angle θ is obtained by measurement. θ = tan -1 (Zi / Zr) =tan -1 (-ωCR1 2 / (R1+R2+ω 2 C 2 R1 2 R2))

[0071] Given that the resistance (R2) and capacitance (C) are known, the internal impedance (e.g., R1) to be measured (or estimated) can be obtained from the value of the phase angle θ.

[0072] As described above, the first resistance R1 of the parallel connection in the equivalent circuit model can be estimated from the phase difference. The phase difference can be obtained, for example, from the phases of the input signal SIN and the output signal SOUT.

[0073] The first capacitor 39b, the second capacitor 39c, and the third capacitor 39d, and the combined capacitance of their series connection, are referred to as "C1," "C2," "C3," and "C0," respectively.

[0074] It can be expressed as follows: 1 / C0 = 1 / C1 + 1 / C2 + 1 / C3 =(C2×C3+C3×C1+C1×C2) / C1×C2×C3 C0=C1×C2×C3 / (C2×C3+C3×C1+C1×C2)

[0075] The combined capacitance C0 is expressed as follows: Zb = -j / ωC0 = jZbi, Zbi = -1 / ωC0

[0076] We focus on the imaginary part of the impedance in the equivalent circuit model. The imaginary part is related to the propagation of the AC component of the signal (including AC and DC components). The imaginary part Zi of a single cell battery 18 is expressed as follows:

[0077] Zi=-ωCR1 2 / (1+ω 2 C 2 R1 2 )

[0078] When the angular frequency ω of the AC is large, Zi can be approximately expressed as follows: Zi=-ωCR1 2 / (ω 2 C 2 R1 2 ) = -1 / ωC

[0079] The conditions for primarily passing the AC component through the conductive bypass circuit 35 are shown below. Zi(=1 / ωC)>Zbi(=1 / ωC0)

[0080] The combined capacitance (C0) of the first capacitor (C1), the second capacitor (C2), and the third capacitor (C3) is set to be greater than the capacitance (C) of the capacitor (C) in the equivalent circuit model of a single cell battery 18 (i.e., C0 > C).

[0081] Figures 6, 7, and 8 show a portion of an exemplary battery system 11, specifically the bypass circuit 35 of the switching circuit 25 and the equivalent circuit of the battery pack 17.

[0082] Referring to Figure 6, in the equivalent circuit of the bypass circuit 35 of the switching circuit 25 and the arrangement of the cell batteries 18 of the battery pack 17, all bypass circuits 35 are non-conductive. The battery pack 17 can be charged or discharged. When the AC signal SAC is applied to the bypass circuit 35 of the switching circuit 25 and the arrangement of the cell batteries 18 of the battery pack 17, all of the AC signal SAC flows to the cell batteries 18 of the battery pack 17. Accordingly, the complex impedance of the cell batteries 18 of the battery pack 17, i.e., the series-connected cell batteries 18, can be measured.

[0083] Referring to Figure 7, in the equivalent circuit of the bypass circuit 35 of the switching circuit 25 and the arrangement of the cell batteries 18 of the battery pack 17, all bypass circuits 35 are conducting. All of the AC signal SAC flows mainly through the bypass circuits 35, not through the cell batteries 18 of the battery pack 17. Accordingly, the complex impedance of the conducting bypass circuits 35, that is, all bypass circuits 35, can be measured.

[0084] Referring to Figure 8, in the equivalent circuit of the bypass circuit 35 of the switching circuit 25 and the arrangement of the cell batteries 18 of the battery pack 17, one bypass circuit 35 is non-conductive while the remaining bypass circuits 35 are conductive. The AC signal SAC flows through the cell battery 18 (third cell battery from the top) connected in parallel to the non-conductive bypass circuit 35 (third bypass circuit 35 from the top), and through the conductive bypass circuit 35. According to this connection, the complex impedance of a single cell battery 18, specifically the cell battery 18 (third cell battery from the top), can be measured.

[0085] The internal impedance measurement circuit 19 will be explained again with reference to Figures 1 to 4. The bypass circuit 35 of the switching circuit 25 is made, for example, as shown in Figure 8.

[0086] The signal generator 31 can be configured to generate a first signal containing an AC component, and the signal measuring instrument 33 receives the output signal from the switching circuit 25 and generates a measurement signal representing the waveform of the output signal. The signal measuring instrument 33 can be configured to generate a potential difference signal as a measurement signal, for example, a potential difference signal indicating the potential difference between the first measuring conductor 23f and the second measuring conductor 23g.

[0087] The signal measuring instrument 33 may include an A / D conversion circuit 47 (A / D: Analog-Digital) configured to generate a digital value of the measurement signal. The signal measuring instrument 33, specifically the A / D conversion circuit 47, is connected to a phase difference circuit 53 and / or a processor 55 to provide a digital value of the measurement signal (or potential difference).

[0088] The signal generator 31 can provide the signal to be generated, for example, the first signal, in digital data format.

[0089] Next, we will describe some exemplary forms.

[0090] (Form 1) The internal impedance measurement circuit 19 may further include a phase difference circuit 53. The phase difference circuit 53 can receive a first signal containing an AC component from a signal generator 31 and a measurement signal from a signal measuring instrument 33. The phase difference circuit 53 can be configured to generate a phase difference between the output signal from the switching circuit 25 and the first signal from the AC waveform of the first signal and the AC waveform of the measurement signal. The phase difference circuit 53 can process the first signal and the measurement signal using, for example, at least one of an analog circuit and a digital circuit.

[0091] (Form 2) The internal impedance measurement circuit 19 may include a processor 55. The processor can receive a first signal from a signal generator 31 and a measurement signal from a signal measuring instrument 33. The processor 55 may be configured to generate the phase difference between the output signal from the switching circuit 25 and the first signal from the AC waveform of the first signal and the AC waveform of the measurement signal. The internal impedance measurement circuit 19 can cause the processor 55 to perform the operations shown in Figure 11 and / or the operations defined in the module shown in Figure 12, for example, based on program code stored in memory.

[0092] (Form 3) The internal impedance measurement circuit 19 controls the switching circuit 25 to make the connection shown in Figure 8, and in response, the switching circuit 25 specifically deactivates one bypass circuit 35 and activates the remaining bypass circuits 35. In this connection, the signal generator 31 provides a first signal to the switching circuit 25, and the signal measuring instrument 33 receives the first output signal from the switching circuit 25. The signal measuring instrument 33 generates a first measurement signal from the first output signal.

[0093] Furthermore, the internal impedance measurement circuit 19 controls the switching circuit 25 to make the connection shown in Figure 7, and in response, the switching circuit 25 makes all the bypass circuits 35 conduct. In this connection, the signal generator 31 provides the switching circuit 25 with a first signal including an AC component, and the signal measuring instrument 33 receives the second output signal from the switching circuit 25. The signal measuring instrument 33 generates a second measurement signal from the second output signal.

[0094] The phase difference circuit 53 and / or processor 55 can be configured to receive a first measurement signal and a second measurement signal, and the first signal if necessary, and to generate a phase difference between the first measurement signal and the second measurement signal from the AC waveform of the first measurement signal and the AC waveform of the second measurement signal.

[0095] The internal impedance measurement circuit 19 can be connected to the switching circuit 25 in various ways, without being limited to the exemplary configuration described above.

[0096] Figure 9 is a block diagram showing the configuration of a processing unit (e.g., a processor 55) according to this embodiment. An exemplary computer 20 for the internal impedance measurement circuit 19 may include a central processing unit (CPU) 41, memory 42, input / output ports 43, and a network port 44, and may include an input device 45 and a display 46 if necessary. The memory 42 is communicatively coupled to the central processing unit 41. The input / output ports 43 are communicatively coupled to the central processing unit 41 and also receive and transmit data from external sensors. The network port 44 is communicatively coupled to the central processing unit 41 and connected to an (external) network. The input device 45 is communicatively coupled to the central processing unit 41. The display 46 is communicatively coupled to the central processing unit 41 and the memory 42. Program instructions that cause the internal impedance measurement circuit 19 to perform a desired operation are stored in the memory 42 or provided from the network via the network port 44. The program instructions are executed by the central processing unit 41 to cause the internal impedance measurement circuit 19 to perform the desired operation.

[0097] Figure 10 is a diagram illustrating the main operations in an exemplary method according to this embodiment. The exemplary method may include, for example, methods for measuring internal impedance, methods for estimating internal impedance, methods for controlling a battery pack, methods for measuring the electrical characteristics of an object, and methods for fabricating a battery system. Hereinafter, these methods will simply be referred to as Method 100. While Method 100 illustrates its main operations, the operations in Method 100 can be performed without being limited to the order shown in Figure 10.

[0098] Method 100 includes operation S101, in which the object to be measured can be prepared. An exemplary object to be measured includes a battery system 11 as shown in Figures 1 to 4, the battery system 11 may include a battery pack 17 and an internal impedance measurement circuit 19. A signal generator 31 and a signal measuring instrument 33 may be connected to the measurement conductive path 23 of the internal impedance measurement circuit 19.

[0099] Exemplary operations for preparing the object to be measured may include a method for fabricating a battery system. This fabrication method includes preparing an internal impedance measuring circuit 19 with an array of bypass circuits 35, and a battery pack 17 with cell batteries 18. The fabrication method also includes fabricating the battery system by connecting the bypass circuits 35 of the internal impedance measuring circuit 19 and the cell batteries 18 of the battery pack 17 to each other to form an array of parallel circuits 22.

[0100] The signal generator 31 can be configured to generate a first signal containing an AC component, and the signal measuring instrument 33 can be configured to generate a potential difference signal indicating the potential difference between the first measuring conductor 23f and the second measuring conductor 23g. The signal generator 31 can determine the frequency of the AC component and the magnitude of the DC component superimposed on the AC component. For example, the frequency of the AC component and / or the amplitude of the AC signal can be determined depending on the capacitance of the capacitor used and the parasitic elements of the object being measured.

[0101] Figure 11(a) is a diagram showing the connection of a parallel circuit in an exemplary object to be measured according to this embodiment. Figure 11(b) is a diagram showing a conductive parallel circuit in an exemplary object to be measured according to this embodiment. Figure 11(c) is a diagram showing a non-conductive parallel circuit in an exemplary object to be measured according to this embodiment.

[0102] The object to be measured specifically includes a battery pack 17 containing a plurality of cell batteries 18 connected in series, and a bypass circuit 35 connected in parallel to each of the cell batteries 18 within the battery pack 17. The object to be measured includes a plurality of parallel circuits 22 connected in series, each of which includes cell batteries 18 and a bypass circuit 35 connected in parallel. The bypass circuit 35 may be connected in parallel to the cell batteries 18 if necessary, for example, during measurement. Alternatively, the battery system 11 may include a bypass circuit 35 connected in parallel to the cell batteries 18.

[0103] The switching circuit 25 and the battery pack 17, which are connected to each other, can be configured as a series connection of the parallel circuit 22.

[0104] Method 100 includes operation S102. In operation S102, the connection type of the series connection of the parallel circuit 22 in the object to be measured is identified, specifically, the locations of the first bypass circuit 35f and the second bypass circuit 35g within the series connection.

[0105] Method 100 includes operation S103. In operation S103, at least one bypass circuit 35 (specified first bypass circuit 35f) among the series connections of the parallel circuit 22 (specifically, the series connections of the bypass circuits 35) is made non-conductive, and the remaining bypass circuit 35 (specified second bypass circuit 35g) among the series connections of the parallel circuit 22 is made conductive, thereby making a first connection to the bypass circuits.

[0106] An exemplary operation S103 may include configuring connection 0 from the series connection of the parallel circuit 22, such that a single bypass circuit 35 is de-conducted as the first bypass circuit 35f, while the remaining bypass circuits 35 are conductive as the second bypass circuit 35g.

[0107] Method 100 includes operation S104. Operation S104 includes applying a first signal containing an AC component to the series connection of the parallel circuit 22 in a first connection to the bypass circuit 35 of the object to be measured, and repeating the application of the first signal to the series connection of the parallel circuit 22.

[0108] Method 100 includes operation S105. Operation S105 includes generating a first measurement signal by receiving a first output signal from the object to be measured in response to the application of a first signal, in a first connection to the bypass circuit 35 of the object to be measured, and repeating the reception of the first output signal and the generation of the first measurement signal.

[0109] When the first connection is provided in particular as connection 0, the output signal from the non-conducting single bypass circuit 35 may include information relating to the characteristics of the parallel circuit 22 corresponding to the non-conducting bypass circuit 35 (for example, characteristic information of the cell battery 18).

[0110] Method 100 includes operation S106. In operation S106, all series connections of the parallel circuit 22 (specifically, the series connections of the bypass circuit 35) are made conductive in the object to be measured, and a second connection is made to the bypass circuit.

[0111] Method 100 includes operation S107. Operation S107 includes repeatedly applying a first signal containing an AC component to the series connection of the parallel circuit 22 in the second connection to the bypass circuit 35 of the object to be measured, and applying the first signal to the series connection of the parallel circuit 22.

[0112] Method 100 includes operation S108. Operation S108 includes generating a second measurement signal by receiving a second output signal from the object to be measured in response to the application of a first signal in a second connection to the bypass circuit 35 of the object to be measured, and repeating the reception of the second output signal and the generation of the second measurement signal.

[0113] Method 100 includes operation S109. In operation S109, all series connections of the parallel circuit 22 (specifically, the series connections of the bypass circuit 35) are deconducted in the object to be measured, and a third connection is made to the bypass circuit.

[0114] Method 100 includes operation S110. Operation S110 includes repeatedly applying a first signal containing an AC component to the series connection of the parallel circuit 22 at a third connection to the bypass circuit 35 of the object to be measured, and applying the first signal to the series connection of the parallel circuit 22.

[0115] Method 100 includes operation S111. Operation S111 includes generating a third measurement signal by receiving a second output signal from the object to be measured in response to the application of a first signal in a third connection to the bypass circuit 35 of the object to be measured, and repeating the reception of the third output signal and the generation of the third measurement signal.

[0116] Method 100 includes operation S112. Operation S112 includes selecting an equivalent circuit model of the cell battery 18 prior to analyzing the measurement information. The selection of the equivalent circuit model may include identifying the model type and loading model parameters from memory.

[0117] Method 100 includes operation S113. Operation S113 may include deriving the phase change of the AC signal caused by the object being measured, using at least a first output signal.

[0118] Method 100 includes operation S114. In operation S114, the internal impedance of the object to be measured can be estimated from the derived value.

[0119] The exemplary derivation of the phase change of an AC signal can use the first signal (specifically, at least one of the transmitted waveform of the signal generator 31 and the received waveform of the signal measuring instrument 33) and the first output signal. Furthermore, the exemplary derivation of the phase change of an AC signal can use at least the first output signal and the second output signal. Moreover, the exemplary derivation of the phase change of an AC signal can use at least the first signal, the first output signal, and the second output signal.

[0120] The illustrative derivation generates characteristic information of the cell battery 18 from the phase angle already described.

[0121] Method 100 is not limited to the measurement of the characteristics of the cell battery 18, and the above description can be applied to voltage sources other than the cell battery 18 by replacing the cell battery 18 with a voltage source 10 having an internal impedance to be measured (to be estimated) in the description.

[0122] Figure 12 is a diagram showing the module configuration of the processing apparatus according to this embodiment. Modules 221, 222, 223, 224, 225, 226, and 227 are configured to perform processes 1, 2, 3, 4, 5, 6, and 7, respectively. The processor 55 can execute the processes of modules 221, 222, 223, 224, 225, 226, and 227. The exemplary relationship between modules 221, 222, 223, 224, 225, 226, and 227 and the operations already described is as follows.

[0123] Module 221 can be configured to perform operation S102. Module 222 can be configured to perform operations S103, S106, and S109. Module 223 can be configured to perform operations S104, S107, and S110. Module 224 can be configured to perform operations S105, S108, and S111. Module 225 can be configured to perform operation S112. Module 226 can be configured to perform operation S113. Module 227 can be configured to perform operation S114.

[0124] As described above, according to this embodiment, the internal impedance measurement circuit, semiconductor device, battery system, method for estimating the electrical characteristics of an object, and method for manufacturing a battery system enable the measurement of changes in the characteristics of a secondary battery.

[0125] This embodiment can have various forms as shown below.

[0126] The internal impedance measurement circuit on the first side according to this embodiment is a switching circuit connected between a first conductor and a second conductor, the switching circuit includes a plurality of bypass circuits, each of which includes a switch and at least one capacitor that respond to a switching signal, the at least one capacitor and the switch being connected in series, and the plurality of bypass circuits being connected between the anode and cathode of a plurality of voltage sources connected in series, so that the bypass circuits and the voltage sources form their respective parallel circuits; and a measurement conductive path connected between the first conductor and the second conductor, the measurement conductive path includes a first applied conductor and a second applied conductor configured to receive an input signal for measuring the internal impedance of the voltage sources, the measurement conductive path includes a first measurement conductor and a second measurement conductor configured to receive an output signal from the switching circuit in response to the input signal, and the first measurement conductor, the second measurement conductor, the first applied conductor and the second applied conductor are arranged sequentially in the measurement conductive path from one of the first conductor and the second conductor to the other.

[0127] According to this aspect, a switch can be used to set the conduction and non-conductivity in the bypass circuit of a parallel circuit.

[0128] The internal impedance measurement circuit of the second side according to the first side of this embodiment may further include a switching control circuit configured to provide the switching signal to the bypass circuit.

[0129] According to this aspect, the conduction and non-conductivity of the bypass circuit in the parallel circuit can be controlled using a switching control circuit that generates a switching signal.

[0130] In the internal impedance measurement circuit of the third side according to the second side of this embodiment, the switching control circuit can be configured to control the multiple bypass circuits such that it opens the switch of one of the multiple first bypass circuits and closes the switch of the remaining multiple second bypass circuits.

[0131] According to this aspect, the conduction and non-conductivity of the bypass circuit can be determined by the switching control circuit, which identifies the bypass circuit of the parallel circuit.

[0132] In the internal impedance measurement circuit of the fourth side according to the second or third side of this embodiment, the switching control circuit can be configured to control the plurality of bypass circuits so as to close all of the switches of the plurality of bypass circuits.

[0133] This aspect allows for signal propagation through a bypass circuit in parallel with each of the voltage sources.

[0134] In the internal impedance measurement circuit of the fifth side according to any one of the first to fourth sides according to this embodiment, in each of the bypass circuits, at least one capacitor may include at least one capacitor connected between the anode of each of the voltage sources and one end of the switch, and at least one capacitor connected between the cathode of each of the voltage sources and the other end of the switch.

[0135] According to this aspect, in each of the bypass circuits, at least one capacitor can be connected to one end and the other end of the switch, respectively.

[0136] In the internal impedance measurement circuit of the sixth side according to the fifth side of this embodiment, in each of the bypass circuits, at least one capacitor includes a first capacitor, a second capacitor, and a third capacitor, and the first capacitor, the second capacitor, and the third capacitor can be connected in series. Optionally, the second capacitor has one end connected to the anode in each of the voltage sources, and the third capacitor has one end connected to the cathode in each of the voltage sources, and the first capacitor and the switch can be connected in series between the other end of the second capacitor and the other end of the third capacitor.

[0137] According to this aspect, multiple capacitors can be provided in each bypass circuit, assigning specific roles to the first, second, and third capacitors. Furthermore, the second and third capacitors block the DC voltage from the voltage source.

[0138] In the internal impedance measurement circuit of the seventh side according to the fifth or sixth side of this embodiment, each of the voltage sources is represented as an equivalent circuit model, and the equivalent circuit model of the voltage source may include a parallel connection of parallel-connected resistors and capacitors.

[0139] From this perspective, defining an equivalent circuit model of a voltage source facilitates the estimation of internal impedance.

[0140] In the internal impedance measurement circuit of the eighth side according to any one of the fifth to seventh sides according to this embodiment, the plurality of voltage sources include a secondary battery, the plurality of secondary batteries constitute a battery pack, each of the secondary batteries is represented as an equivalent circuit model, and the equivalent circuit model of the secondary battery can be provided as including a parallel connection of a first resistor and a first capacitor connected in parallel, and a second resistor connected in series with the parallel connection.

[0141] According to this aspect, this circuit can be used to measure the internal impedance of a secondary battery.

[0142] In the internal impedance measurement circuit of the ninth side according to the eighth side of this embodiment, the capacitance of at least one of the capacitors can be greater than the capacitance of the first capacitor in the equivalent circuit model.

[0143] This aspect allows more AC components to flow through the bypass circuit than through the voltage source.

[0144] The internal impedance measurement circuit of the tenth side according to any one of the first to ninth sides according to this embodiment further comprises a signal measuring instrument connected between the first measuring conductor and the second measuring conductor, the signal measuring instrument may be configured to generate a potential difference signal indicating the potential difference between the first measuring conductor and the second measuring conductor.

[0145] According to this aspect, a signal measuring instrument is connected between the first measuring conductor and the second measuring conductor to enable signal measurement in the internal impedance measuring circuit.

[0146] In the internal impedance measurement circuit of the 11th side according to the 10th side of this embodiment, the signal measuring instrument may include an A / D conversion circuit configured to generate a digital value of the potential difference.

[0147] From this perspective, the measured waveform can be digitally processed using an A / D conversion circuit.

[0148] The internal impedance measurement circuit of the 12th side, which corresponds to any one of the first to 9th sides according to this embodiment, further comprises a signal generator connected between the first applied conductor and the second applied conductor, the signal generator may be configured to generate a first signal including an AC waveform.

[0149] According to this aspect, a signal generator is connected between the first and second applied conductors to enable the generation of a signal for impedance measurement in the internal impedance measurement circuit.

[0150] In the internal impedance measurement circuit of the 13th side according to the 12th side of this embodiment, the signal generator may include digital data configured to generate the first signal.

[0151] From this perspective, signal generation using digital data facilitates the digital processing of measurement signals.

[0152] In the internal impedance measurement circuit according to any one of the first to thirteenth aspects of this embodiment, the plurality of voltage sources each include a plurality of cell batteries, and the plurality of cell batteries can constitute a battery pack.

[0153] This aspect allows for the measurement of the internal impedance of individual cells within a battery pack.

[0154] The semiconductor device of the 15th side according to this embodiment comprises a switching circuit including a plurality of unit circuits, each of the unit circuits including a first capacitor for a bypass circuit, a switch and a control input to the switch, the first capacitor and the switch being connected in series to form a series connection; a plurality of first electrodes and a plurality of second electrodes connected to each of the unit circuits, the series connection having one end connected to one of the first electrodes and the other end connected to one of the second electrodes, the plurality of first electrodes and a plurality of second electrodes configured to be connected to the anode and cathode of each of a plurality of voltage sources connected in series via a second capacitor and a third capacitor, respectively; and a switching control circuit connected to the control input of the switch in each of the unit circuits.

[0155] This aspect allows for a configuration in which at least a portion of the internal impedance measurement circuit can be implemented in the form of a semiconductor device.

[0156] The battery system of the 16th side according to this embodiment comprises an internal impedance measurement circuit described on any one of the 1st to 14th sides, and a battery pack including a plurality of cell batteries as the voltage source.

[0157] This aspect allows for the provision of a battery system with a built-in internal impedance measurement circuit.

[0158] A method for measuring the electrical characteristics of an object on the 17th aspect according to this embodiment comprises: making at least one first bypass circuit of the parallel circuits conductive and the remaining second bypass circuit of the parallel circuits conductive in an object that includes a series connection of a plurality of parallel circuits, each having a battery pack containing a plurality of cell batteries connected in series and a plurality of bypass circuits connected in parallel to each of the cell batteries in the battery pack, thereby making a first connection to the bypass circuits of the series connection of the parallel circuits; applying an input signal containing an AC component to the input of the object to activate the object; and measuring the electrical characteristics of the object using an output signal generated at the output of the object, wherein each of the bypass circuits includes at least one capacitor.

[0159] According to this aspect, it becomes possible to measure the electrical characteristics of an object by using multiple bypass circuits connected in parallel to each of the cell batteries in a battery pack.

[0160] In the method of the 18th aspect according to the 17th aspect of this embodiment, making a first connection to the bypass circuit in series connection of the parallel circuit may include identifying a single bypass circuit as at least one of the first bypass circuits.

[0161] According to this aspect, using the first connection makes it possible to identify individual cells within a battery pack and measure the electrical characteristics of the object.

[0162] In the method of the 19th aspect according to the 17th or 18th aspect of this embodiment, making a first connection to the bypass circuit in series connection of the parallel circuit may include specifying all of the bypass circuits as at least one of the first bypass circuits.

[0163] This aspect makes it possible to bypass all the individual cells within a battery pack and measure the electrical properties of the object being measured.

[0164] A method for manufacturing a battery system on the 20th side according to this embodiment comprises: preparing a battery pack including a plurality of cell batteries connected in series; preparing a plurality of bypass circuits, each of which includes at least one capacitor and a switch, and the at least one capacitor and the switch being connected in series; and manufacturing an object including a series connection of a plurality of parallel circuits by connecting the plurality of bypass circuits in parallel with each of the plurality of cell batteries in the battery pack.

[0165] According to this aspect, a battery system can be provided by connecting a battery pack to multiple bypass circuits.

[0166] (Note 1) The internal impedance measurement circuit according to Appendix 1 comprises a first conductor and a second conductor, wherein a switching circuit including a plurality of bypass circuits connected between the anode and cathode of each of a plurality of voltage sources connected in series is connected between the first conductor and the second conductor; and a measurement circuit including a signal generator and a signal measuring instrument, wherein the signal generator and the signal measuring instrument are connected in series in a measurement conductive path connected between the first conductor and the second conductor, the signal generator is configured to be applied to the switching circuit and generates an input signal including an AC waveform, and the signal measuring instrument receives an output signal from the switching circuit in response to the input signal.

[0167] (Note 2) The internal impedance measurement circuit according to Appendix 2 comprises: a first conductor configured to receive an input signal including an AC component from a signal generator; a second conductor configured to provide an output signal generated in response to the input signal to a signal measuring instrument; and a switching circuit connected between the first conductor and the second conductor, wherein the switching circuit generates the output signal, and the switching circuit includes a plurality of bypass circuits, each of which is configured to be connected between the anode and cathode of each of a plurality of voltage sources connected in series, and each of the bypass circuits includes a switch that responds to a switching signal and a plurality of capacitors, the plurality of capacitors and the switch being connected in series, and the switching circuit includes a plurality of bypass circuits.

[0168] This disclosure is not limited to the embodiments described above, and can be implemented with various modifications without departing from the spirit of this disclosure. All such modifications are included in the technical concept of this disclosure. [Explanation of Symbols]

[0169] 10. Voltage source, 10b...Anode, 10c...Cathode, 11. Battery system, 13. Semiconductor equipment, 15. Signal processing circuit, 16. Equivalent circuit model, 17.. Battery pack, 18-cell battery, 18b...resistance, 18d...Parallel connection, 18f...resistance, 18g...Series connection, 19. Internal impedance measurement circuit, 20. Computers, 22...parallel circuit, 23... Measuring conductive path, 23b...first application conductor, 23c...Second applied conductor, 23f...First measuring conductor, 23g... Second measuring conductor, 24...Measuring circuit, 25... Switching circuit, 25b...one end, 25c...the other end, 27. First conductor, 28c...capacitor, 29...Second conductor, 29d... Capacitor, 30 unit circuits, 31...signal generator, 32...array, 32b...first electrode, 32c...Second electrode, 33... Signal measuring instrument, 34...switch, 35, 35f, 35g... Bypass circuit, 35c...1st electrode, 35d...Second electrode, 37...switch, 37b...Control electrode, 39. Capacitor, 39b...First capacitor, 39c...Second capacitor, 39d...Third capacitor, 41. Central processing unit, 42...memory, 47. A / D conversion circuit, 51... Switching control circuit, 53...phase difference circuit, 55... Processor, 100... ways.

Claims

1. A switching circuit connected between a first conductor and a second conductor, the switching circuit comprising a plurality of bypass circuits, each of which comprises a switch and at least one capacitor that respond to a switching signal, the at least one capacitor and the switch being connected in series, and the plurality of bypass circuits being connected between the anode and cathode of a plurality of voltage sources connected in series, such that the bypass circuits and the voltage sources form their respective parallel circuits. A measuring conductive path connected between the first conductor and the second conductor, Equipped with, The measurement conductive path includes a first applying conductor and a second applying conductor configured to receive an input signal for measuring the internal impedance of the voltage source. The measurement conductive path includes a first measurement conductor and a second measurement conductor configured to receive an output signal from the switching circuit in response to the input signal. The first measuring conductor, the second measuring conductor, the first applied conductor, and the second applied conductor are arranged in the measuring conductive path in order from one of the first conductors and the second conductor to the other. Internal impedance measurement circuit.

2. The switching control circuit is further configured to provide the switching signal to the bypass circuit. An internal impedance measurement circuit as described in claim 1.

3. The switching control circuit is configured to control the multiple bypass circuits such that it opens the switch of one of the multiple first bypass circuits and closes the switches of the remaining multiple second bypass circuits. The internal impedance measurement circuit described in claim 2.

4. The switching control circuit is configured to control the multiple bypass circuits so as to close all of the switches in the multiple bypass circuits. The internal impedance measurement circuit described in claim 2.

5. In each of the bypass circuits, at least one capacitor includes at least one capacitor connected between the anode of each of the voltage sources and one end of the switch, and at least one capacitor connected between the cathode of each of the voltage sources and the other end of the switch. An internal impedance measurement circuit as described in claim 1.

6. In each of the bypass circuits, at least one of the capacitors includes a first capacitor, a second capacitor, and a third capacitor. The first capacitor, the second capacitor, and the third capacitor are connected in series. The second capacitor has one end connected to the anode of each of the voltage sources, The third capacitor has one end connected to the cathode of each of the voltage sources, The first capacitor and the switch are connected in series between the other end of the second capacitor and the other end of the third capacitor. An internal impedance measurement circuit as described in claim 5.

7. Each of the aforementioned voltage sources is represented as an equivalent circuit model, and the equivalent circuit model of the voltage source includes a parallel connection of resistors and capacitors connected in parallel. An internal impedance measurement circuit as described in claim 5.

8. Each of the multiple voltage sources includes a secondary battery, and the multiple secondary batteries constitute a battery pack. Each of the secondary batteries is represented as an equivalent circuit model, and the equivalent circuit model of the secondary battery is provided to include a parallel connection of a first resistor and a first capacitor connected in parallel, and a second resistor connected in series with the parallel connection. An internal impedance measurement circuit as described in claim 5.

9. The capacitance of at least one of the capacitors is greater than the capacitance of the first capacitor in the equivalent circuit model. An internal impedance measurement circuit as described in claim 8.

10. The system further comprises a signal measuring instrument connected between the first measuring conductor and the second measuring conductor, The signal measuring instrument is configured to generate a potential difference signal indicating the potential difference between the first measuring conductor and the second measuring conductor. An internal impedance measurement circuit as described in claim 1.

11. The signal measuring instrument includes an A / D conversion circuit configured to generate a digital value of the potential difference. An internal impedance measurement circuit as described in claim 10.

12. The system further comprises a signal generator connected between the first applied conductor and the second applied conductor, The signal generator is configured to generate a first signal including an AC waveform. An internal impedance measurement circuit as described in claim 1.

13. The signal generator comprises digital data configured to generate the first signal. An internal impedance measurement circuit as described in claim 12.

14. Each of the multiple voltage sources includes a plurality of cell batteries, and the plurality of cell batteries constitute a battery pack. An internal impedance measurement circuit as described in claim 1.

15. A switching circuit comprising a plurality of unit circuits, each of which includes a first capacitor for a bypass circuit, a switch, and a control input for the switch, wherein the first capacitor and the switch are connected in series to form a series connection, A plurality of first electrodes and a plurality of second electrodes connected to each of the unit circuits, wherein the series connection has one end connected to one of the first electrodes and the other end connected to one of the second electrodes, and the plurality of first electrodes and the plurality of second electrodes are configured to be connected directly or via a capacitor to the anode and cathode of each of the plurality of voltage sources connected in series, A switching control circuit connected to the control input of the switch in each of the unit circuits, A semiconductor device equipped with the following features.

16. An internal impedance measurement circuit as described in any one of claims 1 to 14, The aforementioned voltage source is a battery pack including multiple cell batteries, Equipped with, Battery system.

17. A method for measuring the electrical properties of an object, In an object including a series connection of multiple parallel circuits, each having a battery pack containing multiple cell batteries connected in series and multiple bypass circuits connected in parallel to each of the cell batteries in the battery pack, a first connection is made to the bypass circuits of the series connection of the parallel circuits by making at least one first bypass circuit of the bypass circuits of the parallel circuits conductive and the remaining second bypass circuits of the bypass circuits of the parallel circuits non-conductive, To activate the object by applying an input signal containing an AC component to the input of the object, To measure the electrical characteristics of the object using the output signal generated at the output of the object, Equipped with, Each of the bypass circuits includes at least one capacitor. A method for measuring the electrical properties of an object.

18. Making a first connection to the bypass circuit in series connection of the parallel circuit includes identifying a single bypass circuit as at least one of the first bypass circuits. The method described in claim 17.

19. Making a first connection to the bypass circuit in series connection of the parallel circuit includes identifying all of the bypass circuits as at least one of the first bypass circuits. The method described in claim 17 or claim 18.

20. A method for manufacturing a battery system, This involves preparing a battery pack containing multiple cell batteries connected in series, The method involves preparing multiple bypass circuits, each of which includes at least one capacitor and a switch, and the at least one capacitor and the switch being connected in series. To create an object that includes a series connection of multiple parallel circuits, by connecting multiple bypass circuits in parallel to each of the multiple cell batteries in the aforementioned battery pack, A method that includes [a certain feature].

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