Semiconductor equipment

Abstract

To provide a semiconductor device with a small footprint. [Solution] The semiconductor device comprises a first transistor 11 having a first oxide semiconductor, a second transistor 12 having a second oxide semiconductor, a capacitive element 13, a first insulator 280, and a first conductor 240 in contact with the source or drain of the second transistor 12, wherein the capacitive element 13 comprises a second conductor 207, a third conductor 208, and a second insulator 282, and is embedded in the first insulator 280. A first transistor 11, a second transistor 12, and a first conductor 240 are arranged so as to be placed, the second conductor 207 is placed in contact with the upper surface of the first conductor 240 and the upper surface of the gate of the first transistor 11, the second insulator 282 is placed on the second conductor 207 and the first insulator 280, and the third conductor 208 is placed covering the second conductor 207 via the second insulator 282.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a semiconductor device.

[0002] One aspect of the present invention is not limited to the above-mentioned technical field. The technical field relates to a product, a method, or a method of manufacture. Or, one aspect of the present invention. This refers to a process, machine, manufacture, or composition. This concerns (the tar).

[0003] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to the whole. Therefore, it includes semiconductor elements such as transistors and diodes, and semiconductor elements. The circuit is a semiconductor device. It is also used in display devices, light-emitting devices, lighting devices, electro-optical devices, and memory devices. Devices, imaging devices, communication devices, and electronic equipment may include semiconductor elements and semiconductor circuits. Yes, there are. Also, display devices, light-emitting devices, lighting devices, electro-optical devices, memory devices, imaging devices, and communications. Devices and electronic equipment are sometimes also referred to as semiconductor devices. [Background technology]

[0004] In recent years, transistors using oxide semiconductors or metal oxides in the channel formation region (Ox ide Semiconductor transistor (hereinafter referred to as OS transistor) It is attracting attention (Patent Document 1).

[0005] OS transistors have a very low off-current. This is utilized in Patent Document 2 and Section 3 discloses a non-volatile memory using an OS transistor. Non-volatile memory using this technology has no limit on the number of times data can be rewritten, and furthermore, the data can be written The power consumption when switching is also low. Furthermore, Patent Document 3 describes a non-volatile design using only OS transistors. An example of a memory cell configuration for a self-generating memory is disclosed.

[0006] In this specification, non-volatile memory using OS transistors is referred to as NOSRAM (Registered It is sometimes referred to as a registered trademark. NOSRAM stands for "Nonvolatile Oxide An abbreviation for "Semiconductor RAM," referring to gain cell type (2T type, 3T type). This refers to RAM that has memory cells. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2011-151383 [Patent Document 3] Japanese Patent Publication No. 2016-115387 [Overview of the project] [Problems that the invention aims to solve]

[0008] One embodiment of the present invention aims to provide a semiconductor device with a small footprint. Alternatively, one embodiment of the present invention aims to provide a semiconductor device that can be highly integrated. Alternatively, one embodiment of the present invention aims to provide a semiconductor device with a large memory capacity. Alternatively, one embodiment of the present invention aims to provide a semiconductor device with low manufacturing costs. One embodiment of the present invention aims to provide a highly reliable semiconductor device. One embodiment of the present invention aims to provide a novel semiconductor device. ru.

[0009] Furthermore, the description of these problems does not preclude the existence of other problems. One embodiment does not need to solve all of these problems. Other problems are addressed in the details. This will become clear from the description in the document, drawings, and claims, etc. It is possible to extract other issues from the descriptions in the sections and other documents. [Means for solving the problem]

[0010] One aspect of the present invention comprises a first transistor, a second transistor, a capacitive element, and a first The first transistor comprises an insulator and a first conductor, and the first transistor comprises a first oxide semiconductor, The second transistor has a first gate and a first gate insulator, and the second transistor has a second oxide The capacitive element comprises a semiconductor, a second gate, and a second gate insulator, and the second conductor The material comprises a third conductor and a second insulator, wherein the first insulator is a first oxide semiconductor. and placed on the second oxide semiconductor, the first insulator reaches the first oxide semiconductor A first opening is formed, a second opening is formed that reaches the second oxide semiconductor, and the second A third opening is formed that reaches either the source or drain of the lampistor, and the first opening Inside, a first gate insulator and a first gate are arranged, and in the second opening, the second A gate insulator and a second gate are positioned, and a first conductor is positioned within the third opening. The second conductor is positioned in contact with the upper surface of the first conductor and the upper surface of the first gate. The second insulator is placed on the second conductor and the first insulator, and the third conductor is This is a semiconductor device in which a second conductor is arranged to cover a second conductor via a second insulator.

[0011] In the above, it is preferable that the second conductor is positioned to cover the first gate.

[0012] Furthermore, in the above, a part of the first gate is exposed from the second conductor, and the first gate A configuration in which a part of it is in contact with the second insulator is also possible.

[0013] Furthermore, in the above, the channel length direction of the first transistor and the second transistor It is preferable that the channel length direction is approximately parallel. Furthermore, in the above, the third conductive The direction of extension of the body is preferably approximately perpendicular to the channel length direction of the first transistor. It's nice.

[0014] Furthermore, in the above, the second gate has a fourth conductor in contact with the upper surface, and the fourth conductor It is preferable that the extension direction is approximately perpendicular to the channel length direction of the second transistor. Furthermore, in the above, the fourth conductor is connected to the first oxide semiconductor via the first insulator. It is preferable that it overlaps with the above.

[0015] Another aspect of the present invention includes first to fourth transistors, a first oxide semiconductor, and a second an oxide semiconductor, a first capacitive element, a second capacitive element, a first insulator, and a second insulator It has a body, a first conductor, a second conductor, a first transistor, and a third transistor. The transistor is formed on the first oxide semiconductor, and the second transistor and the fourth transistor The transistor is formed on the second oxide semiconductor, and the first transistor has a first gate and The second transistor has a first gate insulator and a second gate and a second gate The third transistor has an insulator and a third gate, and a third gate insulator. The fourth transistor has a fourth gate and a fourth gate insulator, and the first The capacitive element has a third conductor and a fourth conductor, and the second capacitive element has a fifth conductor The material comprises a body and a sixth conductor, wherein the first insulator is a first oxide semiconductor and a second acid Displaced on the oxide semiconductor, the first insulator reaches the first oxide semiconductor through the first aperture and a second opening is formed, reaching the second oxide semiconductor, the third opening and the fourth opening A fifth opening is formed, which reaches either the source or the drain of the second transistor. A sixth opening is formed, which reaches either the source or the drain of the fourth transistor. The first gate insulator and the first gate are placed in the first opening, and the second A third gate insulator and a third gate are placed inside the opening, A second gate insulator and a second gate are positioned within the fourth opening, and the fourth gate An insulator and a fourth gate are placed, and a first conductor is placed in the fifth opening. A second conductor is placed in the sixth opening, and a third conductor is positioned on the upper surface of the first conductor. The fifth conductor is positioned in contact with the upper surface of the first gate, and the upper surface of the second conductor, and The second insulator is positioned in contact with the upper surface of the third gate, and the third conductor and the fifth conductor are located together. and disposed on the first insulator, the fourth conductor is through the second insulator to the third conductor The body is covered and arranged, and the sixth conductor is arranged to cover the fifth conductor via the second insulator. It is a semiconductor device that is installed.

[0016] In the above, the first oxide semiconductor and the second oxide semiconductor are made of indium and Element M (M is selected from gallium, aluminum, yttrium, and tin) Preferably, it has (multiple) and zinc. [Effects of the Invention]

[0017] One embodiment of the present invention can provide a semiconductor device with a small footprint. According to one embodiment of the present invention, a semiconductor device capable of high integration can be provided. According to one embodiment of the present invention, a semiconductor device with a large memory capacity can be provided. According to one embodiment of the present invention, a semiconductor device with low manufacturing costs can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. Alternatively, One embodiment of the invention can provide a novel semiconductor device.

[0018] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the description in the drawings, claims, etc., and the specification, drawings, claims From descriptions such as these, it is possible to extract other effects. [Brief explanation of the drawing]

[0019] [Figure 1] Figure 1A is a circuit diagram of a semiconductor device according to one aspect of the present invention. Figure 1B is a top view of a semiconductor device according to one aspect of the present invention. [Figure 2] Figures 2A and 2B are top views of a semiconductor device according to one embodiment of the present invention. [Figure 3] Figures 3A and 3B are cross-sectional views of a semiconductor device according to one aspect of the present invention. [Figure 4] Figure 4 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 5]Figure 5A illustrates the classification of IGZO crystal structures. Figure 5B illustrates the XRD spectrum of a CAAC-IGZO film. Figure 5C illustrates the micro-electron diffraction pattern of a CAAC-IGZO film. [Figure 6] Figure 6 is a top view of a semiconductor device according to one aspect of the present invention. [Figure 7] Figures 7A and 7B are cross-sectional views of a semiconductor device according to one aspect of the present invention. [Figure 8] Figures 8A and 8B are circuit diagrams of a semiconductor device according to one aspect of the present invention. [Figure 9] Figure 9A is a block diagram illustrating an example configuration of a semiconductor device according to one aspect of the present invention. Figure 9B is a perspective view illustrating an example configuration of a semiconductor device according to one aspect of the present invention. [Figure 10] Figure 10 is a circuit diagram of a memory cell array according to one aspect of the present invention. [Figure 11] Figure 11 is a schematic diagram of a memory cell array according to one aspect of the present invention. [Figure 12] Figures 12A and 12B show timing charts of a memory cell array according to one embodiment of the present invention. [Figure 13] Figure 13 is a diagram showing various types of storage devices in a hierarchical structure. [Figure 14] Figures 14A to 14E illustrate an example of an application of a storage device according to one aspect of the present invention. [Figure 15] Figures 15A to 15H show an electronic device according to one aspect of the present invention. [Modes for carrying out the invention]

[0020] Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. Without departing from the spirit and scope of the present invention, its form and details may vary. Those skilled in the art will readily understand that modifications are possible. Therefore, the present invention is as described below. The description of the form is not to be interpreted in isolation. In this context, the same reference numeral is used for identical parts or parts having similar functions across different drawings. We will use it and omit the repetition of its explanation.

[0021] Furthermore, the position, size, and range of each component shown in the drawings, etc., are intended to facilitate understanding of the invention. Therefore, the actual location, size, and range may not be represented. The invention is not necessarily limited to the position, size, scope, etc. disclosed in the drawings, etc. However, in the actual manufacturing process, the resist mask and other materials may be removed due to processes such as etching. While there may be some reduction in volume, this is sometimes not reflected in the diagram for the sake of easier understanding.

[0022] Furthermore, in order to make the explanations easier to understand in drawings and other materials, the description of some components has been omitted. It may be abbreviated.

[0023] Furthermore, in this specification, the terms "electrode" and "wiring" refer to these components functionally. It is not limited to this. For example, "electrode" can be used as part of "wiring". And the reverse is also true. Furthermore, the terms "electrode" and "wiring" can refer to multiple "electrodes" and This includes cases where the wiring is formed as an integrated unit.

[0024] Furthermore, in this specification, etc., "terminal" in an electrical circuit means an input or output of current, This refers to the part where voltage is input or output, or where signals are received or transmitted. In some cases, a portion of the wiring or electrodes may function as a terminal.

[0025] In this specification, the terms "above" and "below" refer to the relative positions of the constituent elements, specifically when they are directly above or below. It is not limited to being directly below and in direct contact. For example, "electrical on insulating layer A" If the expression is "electrode B," it is not necessary for electrode B to be directly in contact with the insulating layer A. Cases containing other components between insulating layer A and electrode B are not excluded.

[0026] Furthermore, the source and drain functions may differ when using transistors with different polarities, In circuit operation, the direction of current changes, and depending on the operating conditions, they can be swapped. Therefore, it is difficult to determine which is the source and which is the drain. In this specification, the terms source and drain may be used interchangeably. It shall be considered as such.

[0027] Furthermore, in this specification, "electrically connected" refers to both a direct connection and a connection without any other means. This includes cases where it is connected via "something that has an electrical effect". Here, "anything" "A device that has electrical properties" is one that enables the exchange of electrical signals between connected objects. If so, there are no particular restrictions. Therefore, even when it is expressed as "electrically connected" In real-world circuits, there are cases where there are no physical connections, and only wiring extends. ru.

[0028] In this specification and other documents, the terms "identical," "same," and "equivalent" are used in relation to count values ​​and measured values. When using terms like "uniform" or "same," unless otherwise specified, it refers to plus or minus 2. Assume a 0% margin of error.

[0029] Furthermore, voltage is the potential difference between a certain potential and a reference potential (e.g., ground potential or source potential). It often refers to the difference. Therefore, voltage and potential can sometimes be used interchangeably. Many. In this specification, unless otherwise specified, voltage and potential can be used interchangeably. It shall be assumed that...

[0030] Furthermore, even when the term "semiconductor" is used, if, for example, its conductivity is sufficiently low, it can be referred to as an "insulator." It possesses the following characteristics. Therefore, it is also possible to use it by replacing "semiconductor" with "insulator". Yes, in this case, the boundary between "semiconductors" and "insulators" is ambiguous, and a strict distinction between the two is difficult. Therefore, the terms "semiconductor" and "insulator" as used in this specification may be interpreted interchangeably. It is sometimes possible.

[0031] Also, even when the term "semiconductor" is used, for example, if the conductivity is sufficiently high, it can be referred to as a "conductor." It possesses the following characteristics. Therefore, it is also possible to use it by replacing "semiconductor" with "conductor". Yes, in this case, the boundary between "semiconductors" and "conductors" is ambiguous, and a strict distinction between the two is difficult. Therefore, the terms "semiconductor" and "conductor" as used herein may be interpreted interchangeably. It is sometimes possible.

[0032] In this specification, ordinal numbers such as "the first," "the second," etc., are used to avoid confusion of constituent elements. It is added for the purpose of indicating the order or sequence of processes or stacking order, or any other kind of order or ranking. No. Furthermore, even if a term is not given an ordinal number in this specification, the constituent elements may be mixed. To avoid ambiguity, ordinal numbers may be used in the claims. Even if a term is given an ordinal number in the patent claims, if a different ordinal number is used in the patent claims... In some cases, an ordinal number may be attached. Also, even if a term is used with an ordinal number in this specification, In some cases, ordinal numbers may be omitted in patent claims and other documents.

[0033] In this specification, the "on state" of a transistor refers to the source of the transistor. This refers to a state where the drain can be considered electrically short-circuited (also called a "conductive state"). Furthermore, the "off state" of a transistor means that the source and drain of the transistor are electrically separated. This refers to a state that can be considered disconnected (also called a "non-conductive state").

[0034] Furthermore, in this specification, "on-current" refers to the current when the transistor is in the ON state. Sometimes, "off-current" refers to the current that flows between the transistor and the drain. It can sometimes refer to the current flowing between the source and drain when the device is in the off state.

[0035] Furthermore, in this specification, etc., the high power supply potential VDD (hereinafter simply referred to as "VDD", "H potential"), (Also called "H") refers to the low power supply potential VSS (hereinafter simply referred to as "VSS" or "L potential"). It indicates a power supply potential that is higher than VDD (also called "L"). Also, VSS is a power supply potential that is higher than VDD. It also shows a power supply potential that is even lower. Furthermore, the ground potential (hereinafter simply referred to as "GND" or "GN") The "D potential" (also called the D potential) can also be used as VDD or VSS. For example, if VDD is connected In the case of ground potential, VSS is at a lower potential than the ground potential, and when VSS is at the ground potential... VDD is at a higher potential than the ground potential.

[0036] Furthermore, transistors described herein, unless otherwise explicitly stated, are enhancement transistors. Let's assume a T-type (normally off) n-channel field-effect transistor. Therefore, The key voltage (also called "Vth") shall be greater than 0V. Also, explicitly stated Unless otherwise stated, "supplying a high potential to the gate of a transistor" means "transistor This can be synonymous with "turn on". Also, unless explicitly stated, "transition "Supplying an inductive potential to the gate of the transistor" is equivalent to "turning the transistor off." There are cases where it is just.

[0037] Furthermore, in this specification, the term "gate" refers to a gate electrode and part or all of the gate wiring. It refers to the gate. Gate wiring is the gate electrode of at least one transistor and another This refers to wiring used to electrically connect electrodes or other wiring.

[0038] Furthermore, in this specification, the term "source" refers to the source region, source electrode, and source wiring. This refers to a part or all of the source region. The source region is the part of the semiconductor layer whose resistivity is below a certain value. This refers to the region. The source electrode is the conductive layer of the part connected to the source region. Source wiring refers to the connection between the source electrode of at least one transistor and another electrode or another wiring. This refers to the wiring used to electrically connect wires.

[0039] Furthermore, in this specification, the term "drain" refers to the drain region, the drain electrode, and the drain This refers to part or all of the wiring. The drain region is a part of the semiconductor layer with a resistivity of one This refers to the region below a certain value. The drain electrode is the conductive part connected to the drain region. It refers to a layer. Drain wiring refers to the drain electrode of at least one transistor, This refers to wiring used to electrically connect another electrode or another wire.

[0040] Furthermore, in drawings and other diagrams, to make the potential of wiring and electrodes easier to understand, When adding "H" to indicate an H potential or "L" to indicate an L potential adjacent to an electrode, etc. There is also a symbol "H" or "L" enclosed in the text for wiring and electrodes where a potential change has occurred. Sometimes it is noted in writing. Also, if the transistor is in the off state, the transistor Sometimes, an "×" symbol is added in addition to it.

[0041] Furthermore, generally speaking, "capacitance" refers to a configuration where two electrodes face each other with an insulator (dielectric) in between. It has. In this specification, etc., "capacitive element" includes the case of the aforementioned "capacitance". In other words, in this specification, "capacitive element" means a device in which two electrodes are connected via an insulator. A configuration in which two wires face each other with an insulator in between, This includes cases where two wires are arranged with an insulator in between.

[0042] Furthermore, in this specification, when the same reference numeral is used for multiple elements, there is no particular distinction between them. When necessary, use symbols such as "_1", "_2", "[n]", "[m,n]", etc. Sometimes, a different code is assigned to indicate the second wiring CL. For example, wiring CL[2] This may be written as follows.

[0043] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. When the inverter is ON, the part of the semiconductor through which current flows and the gate electrode overlap each other. In the region or channel-forming region, the source (source region or source electrode) and This refers to the distance between the drain (drain region or drain electrode) and the other element. In a zista, the channel length is not necessarily the same across all regions. That is, one The channel length of the transistor may not be fixed to a single value. Therefore, this specification So, the channel length is any one value, maximum value, minimum value, or This will be the average value.

[0044] Channel width refers to, for example, the top view of a transistor, the semiconductor (or transistor) The region where the gate electrode and the part of the semiconductor through which current flows when the gate electrode is ON overlap each other. Channels in a region or channel-forming region, perpendicular to the channel length direction. This refers to the length of the formation region. Note that in a single transistor, the channel width encompasses the entire region. They do not necessarily take the same value. In other words, the channel width of a single transistor is a single value. It may not be fixed. Therefore, in this specification, the channel width is defined as the channel formation region. This is one of the values, the maximum value, the minimum value, or the average value.

[0045] In this specification, depending on the transistor structure, channel formation may actually occur. The channel width in the region (hereinafter also referred to as the "effective channel width") and the transition The channel width shown in the top view of the stylus (hereinafter also referred to as the "apparent channel width") is as follows. ) and may differ. For example, when the gate electrode covers the side of the semiconductor, the effective ch When the channel width becomes larger than the apparent channel width, and its effect can no longer be ignored. For example, in a transistor that is very small and whose gate electrode covers the side of the semiconductor, the semiconductor In some cases, the proportion of channel-forming regions formed on the sides may increase. In such cases, the apparent The effective channel width will be larger than the channel width shown above.

[0046] In such cases, it can be difficult to estimate the effective channel width through actual measurements. For example, in order to estimate the effective channel width from the design value, the shape of the semiconductor is known. A certain assumption is necessary. Therefore, if the shape of the semiconductor is not precisely known, the effective It is difficult to accurately measure channel width.

[0047] In this specification, when simply referred to as "channel width," it refers to the apparent channel width. There is. Or, in this specification, when simply referred to as channel width, it means effective channel It can refer to width. Note that it can also refer to channel length, channel width, effective channel width, or apparent width. Channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0048] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentrated Elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, lead to... In some cases, this can lead to an increase in the defect level density of semiconductors or a decrease in crystallinity. If the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, oxide semiconductors Other components besides the main component include transition metals, such as hydrogen, lithium, sodium, silicon, These include boron, phosphorus, carbon, and nitrogen. Note that water can also function as an impurity. For example, the inclusion of impurities can cause oxygen vacancies (V) in oxide semiconductors. O :oxygen va In some cases, cancy (also known as cancy) may form.

[0049] In this specification, oxidnitrides are defined as having a higher oxygen content than nitrogen in their composition. These are abundant. Also, nitride oxides have a higher nitrogen content than oxygen in their composition. It is a rare thing.

[0050] Furthermore, in this specification, the term "insulator" shall be replaced with "insulating film" or "insulating layer." It is possible to replace the term "conductor" with "conductive film" or "conductive layer." This is possible. Also, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0051] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10 degrees or more and 10 degrees or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5 degrees and 5 degrees. Furthermore, "approximately parallel" means that two straight lines are positioned at an angle of -30 degrees or more and 30 degrees or less. It refers to a state or condition. Also, "perpendicular" means that two straight lines are positioned at an angle of 80 degrees or more and 100 degrees or less. This refers to a state in which the temperature is between 85 and 95 degrees. Therefore, it also includes cases between 85 and 95 degrees. "Perpendicular" refers to a state where two straight lines are positioned at an angle between 60 degrees and 120 degrees.

[0052] In this specification, metal oxide refers to metal in a broad sense. It is an oxide. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). . ), oxide semiconductor (also called Oxide Semiconductor or simply OS) They are classified into categories such as . ) For example, when a metal oxide is used in the semiconductor layer of a transistor, The metal oxide in question is sometimes referred to as an oxide semiconductor. Therefore, it is sometimes described as an OS transistor. In such cases, it can be rephrased as a transistor having a metal oxide or oxide semiconductor. It is possible.

[0053] Furthermore, in this specification, normally off means not applying a potential to the gate, or When the gate is given a ground potential, the amount of drape flowing through the transistor per 1 μm of channel width is The current is 1 × 10 at room temperature. -20 A or less, 1 × 10 at 85℃ -18 Below A , or 1 × 10 at 125℃ -16 This means being less than or equal to A.

[0054] (Embodiment 1) In this embodiment, as an example of a semiconductor device according to one aspect of the present invention, the memory cell 10 The configuration will be explained using Figures 1 to 8. The memory cell 10 is part of the storage device. It functions and has transistor 11, transistor 12, and capacitive element 13, and wiring C L, wiring WL, wiring RBL, wiring SL, wiring WBL, wiring BGL1, and wiring BGL2 And they are electrically connected.

[0055] Figure 1A is a circuit diagram of the memory cell 10, and Figure 1B is a top view of the memory cell 10. Figure 2A is a top view of Figure 1B with wiring CL removed. Figure 2B is a top view of Figure 1B with wiring CL removed. Wiring WL, conductor 207, dashed lines A1-A2-A3, and dashed lines A4-A5-A6 This is a top view excluding the area shown. Note that in the top views of Figures 1B, 2A, and 2B, the diagrams have been clarified. Some elements have been omitted for this reason.

[0056] Figure 3A is a cross-sectional view of the area indicated by the dashed lines A1-A2-A3 in Figures 1B and 2A. Here, the cross-sectional view shown in A1-A2 is a cross-sectional view of transistor 12 in the channel length direction. Yes, the cross-sectional view shown in A2-A3 is a cross-sectional view of transistor 11 in the channel width direction. Furthermore, Figure 3B is a cross-sectional view of the area indicated by the dashed lines A4-A5-A6 in Figures 1B and 2A. Here, the cross-sectional view shown in A4-A5 is a cross-section of transistor 12 in the channel width direction. The diagram shows a cross-sectional view of transistor 11 in the channel length direction, as shown in A5-A6. ru.

[0057] Note that in drawings and other diagrams, arrows indicating the x, y, and z directions may be included. The x, y, and z directions are each orthogonal to each other. In this context, one of the x, y, or z directions is called the "first direction" or "first direction." In some cases, one of the other two is called the "second direction" or "second option." In some cases, the remaining one is referred to as the "third direction" or "third way."

[0058] <Example of semiconductor device configuration> First, we will explain an example of the circuit configuration of the memory cell 10. As shown in Figure 1A, the memory cell The transistor 10 comprises transistor 11, transistor 12, and capacitive element 13. One of the source or drain of the zista 11 is electrically connected to the wiring RBL, and the other is connected to the wiring It is electrically connected to SL. The back gate of transistor 11 is electrically connected to wiring BGL1. The connection is made. Either the source or drain of transistor 12 is electrically connected to the wiring WBL. The other end is connected to the gate of transistor 11. This involves the gate of transistor 11 and the other of the source or drain of transistor 12. The node or wiring that electrically connects these transistors is sometimes called node FN. Gate 2 is electrically connected to wiring WL, and the back gate is electrically connected to wiring BGL2. It will be done.

[0059] As shown in Figure 1A, transistors 11 and 12 are placed on the same plane, It is preferable that the capacitive element 13 is provided on the transistor 11 and the transistor 12. In other words, the capacitive element 13 controls the capacitance of transistors 11 and 12, z It is preferable to arrange them so that they overlap in the axial direction. With this configuration, the tra With respect to the transistor 11 and transistor 12, the area of ​​the capacitive element 1 is increased without significantly increasing the area. 3 can be provided. Therefore, the occupied area of ​​the memory cell 10 can be reduced. This will enable the high integration of semiconductor devices and provide semiconductor devices with large memory capacity. This is possible. Furthermore, it is possible to provide semiconductor devices with low manufacturing costs per unit of memory capacity. .

[0060] The wiring CL is placed on top of the capacitive element 13. Here, the wiring CL is on top of the capacitive element 13. It functions as an electrode. In contrast, node FN functions as the lower electrode of the capacitive element 13. In other words, the capacitive element 13 is MIM (Metal-Insulator-Metal) Capacitance is formed. In addition, the memory cell 10 has a capacitive element 1 between node FN and wiring CL. It can also be said that it has 3.

[0061] Memory cell 10 holds the potential (charge) written to node FN and stores the data. It has the function of supplying a potential to the wiring WL that turns on transistor 12. Then, connect the wiring WBL and node FN to a conductive state. This will bring node FN to a predetermined potential. The charge for this is supplied to node FN via wiring WBL. Then, transistor 12 A potential is supplied to the gate to turn off transistor 12. By doing so, the charge written to node FN is retained.

[0062] Furthermore, when reading data stored in memory cell 10, a certain potential is applied to the wiring CL. Hereafter, this may be referred to as the read potential.) should be provided. The read potential is supplied to the wiring CL. When supplied, transistor 11 turns ON according to the potential written to node FN, Or it turns off. In other words, the data stored in node FN of memory cell 10 is transferred to the The state of the inverter 11 can be read as either ON or OFF.

[0063] The semiconductor layers of transistors 12 and 11 are single-crystal semiconductors and polycrystalline semiconductors. Microcrystalline semiconductors, amorphous semiconductors, etc., can be used individually or in combination. Yes, it is possible. For semiconductor materials, for example, silicon and germanium can be used. Also, silicon germanium, silicon carbide, gallium arsenide, oxide semiconductors, nitrides Compound semiconductors, such as semiconductors, may also be used.

[0064] Furthermore, the semiconductor layers used in the transistor may be stacked. When stacking semiconductor layers, You may use semiconductors that have different crystalline states, or you may use different semiconductor materials You may use it.

[0065] In particular, transistor 12 is preferably an OS transistor. Oxide semiconductor is Because the band gap is 2eV or more, the off-current is extremely low. Using an OS transistor, it is possible to retain the charge written to node FN for a long period of time. Therefore, the capacitance required for the capacitive element 13 can be reduced. By using an OS transistor for transistor 12, the occupied area of ​​the capacitive element 13 is reduced. This makes it possible to This makes it easier to arrange the element 13, thus reducing the occupied area of ​​the memory cell 10. When an OS transistor is used for transistor 12, the memory cell 10 is called "OS memory". It can be called that.

[0066] OS memory can retain data for over a year, or even over 10 years, even after the power supply is cut off. It can retain the information it contains. Therefore, OS memory can be considered non-volatile memory. It can also be done this way.

[0067] Furthermore, because the amount of charge written to OS memory does not change easily over a long period of time, OS memory is binary. It can store not only single-bit information, but also multi-bit information.

[0068] Furthermore, OS memory uses a method of writing electric charge to nodes via OS transistors. Furthermore, it does not require the high voltage that was necessary for conventional flash memory, enabling high-speed writing operations. It can be displayed. Also, the erase operation performed on flash memory before data rewriting is the OS memory It is not necessary in the case of Ri. Also, charge injection and extraction into the floating gate or charge trapping layer. Since no data is extracted, the number of times data is written to and read from OS memory is... It can be made virtually unlimited. OS memory is different from conventional flash memory. It exhibits minimal degradation and high reliability.

[0069] Furthermore, OS memory is phase-change memory (PCM). y), magnetoresistive random memory (MRAM) Access Memory, or resistive random-access memory (ReRAM): Structure at the atomic level, such as in Random Access Memory It does not involve a change in phase. Therefore, OS memory is a phase-change memory, magnetoresistive memory, and resistive memory. It has better rewrite endurance than condensed memory.

[0070] Furthermore, OS transistors exhibit almost no increase in off-current even in high-temperature environments. Specifically, The off-current hardly increases even at ambient temperatures between room temperature and 200°C. The on-current does not decrease easily even at low temperatures. The storage device, including the OS memory, operates even in high-temperature environments. The operation is stable and highly reliable. Therefore, when configuring OS memory, It is preferable to make transistors 11 and 12 OS transistors. Transistors have high dielectric strength between the source and drain. Transistors are components of semiconductor devices. By using OS transistors, operation is stable even in high-temperature environments, resulting in high reliability. This makes it possible to create a good semiconductor device.

[0071] As shown in Figures 3A and 3B, the memory cell 10 is located on an insulator 2 on a substrate (not shown). 12, insulator 214 on insulator 212, insulator 216 on insulator 214, and insulator 2 Insulator 222 on 16, insulator 224 on insulator 222, and insulator 2 on insulator 224 75, insulator 280 on insulator 275, insulator 282 on insulator 280, and insulator 2 It has an insulator 283 on 82, insulator 212, insulator 214, insulator 216, insulation Body 222, insulator 224, insulator 275, insulator 280, insulator 282, and insulator 2 83 functions as an interlayer insulating film. Transis is present in the layer between insulator 214 and insulator 282. A 11 and a transistor 12 are provided, and a capacitive element 13 is provided on the insulator 280. The insulators 280 and 275 are located at the source or drain of transistor 12. An opening is formed that reaches the other side, and a conductor 240 is provided so as to be embedded in the opening. It is also preferable that an insulator 241 be provided in contact with the side surface of the conductor 240.

[0072] The transistor 11 is a conductor 205 (conductor) arranged to be embedded in the insulator 216. The conductive material 205a, the conductive material 205b, and the conductive material 205c, and the insulator 216, and the conductive material Insulator 222 on the electrode 205, insulator 224 on insulator 222, and acid on insulator 224 Oxide 230a, oxide 230b on oxide 230a, and oxide 2 on oxide 230b 30c, oxide 243a and oxide 243b, and conductor 242a on oxide 243a , conductor 242b on oxide 243b, insulator 250 on oxide 230c, and insulator 2 Located above 50, the conductor 260 (conductor 260a, and overlaps with a portion of oxide 230b) It has a conductor 260b). In the following, oxide 230a and oxide 230b Oxide 230c and oxide 243 are sometimes collectively referred to as oxide 230. a and oxide 243b are sometimes collectively referred to as oxide 243. Also, conductor 24 Sometimes, conductor 2a and conductor 242b are collectively referred to as conductor 242.

[0073] Here, conductor 260 functions as the top gate, and conductor 205 is the back gate (distribution It functions as wire BGL1). Also, insulator 250 is the gate insulator of the top gate. Insulators 222 and 224 function as gate insulators for the back gate. Furthermore, conductor 242a functions as either a source or a drain, and conductor 242b It functions as either a source or a drain. Also, the conductor 260 of oxide 230 and At least a portion of the overlapping regions functions as a channel-forming region.

[0074] Furthermore, insulator 275 is composed of insulator 224, oxide 230a, oxide 230b, and oxide 24 3, and covering the conductor 242, the insulator 280 is provided in contact with the upper surface of the insulator 275. It is present. It reaches insulators 280 and 275, oxide 230b and insulator 224. An opening is provided, and the opening is superimposed on the region between the conductor 242a and the conductor 242b. It's being kicked.

[0075] As shown in Figures 2B, 3A, and 3B, oxide 230c and insulating material are placed in the opening. Body 250 and conductor 260 are arranged. Therefore, oxide 230c is an insulator 2 The top surface of 24, the side surface of oxide 230a, the top surface and side surface of oxide 230b, and oxide 2 The sides of 43a and oxide 243b, and the sides of conductor 242a and conductor 242b, It is provided in contact with the side surface of insulator 275 and the side surface of insulator 280. In addition, insulator 250 The conductor 260 is provided in contact with the upper and side surfaces of the oxide 230c, and the conductor 260 is on the upper surface of the insulator 250. and are provided in contact with the side surface. Also, the upper surface of the conductor 260, the uppermost surface of the insulator 250, The uppermost surface of the oxide 230c is positioned to roughly coincide with the upper surface of the insulator 280.

[0076] By using this structure, the conductor 260, the insulator 250, and the oxide 230c It can be formed in a self-aligning manner so as to be embedded in an opening formed in the insulator 280 or the like. Yes, it is possible. By forming the conductive material 260 in this way, alignment is not required. A conductor 260 can be placed in the region between conductor 242a and conductor 242b.

[0077] Furthermore, the transistor 12 is positioned so as to be embedded in the insulator 216, and the conductor 20 6 (conductors 206a, 206b, and 206c) and on the insulator 216, Insulator 222 on conductor 206, insulator 224 on insulator 222, and insulator 224 The oxide 231a above, the oxide 231b on oxide 231a, and the acid on oxide 231b. The oxide 231c, oxide 245a and oxide 245b, and the conductor 24 on oxide 245a 4a, conductor 244b on oxide 245b, insulator 251 on oxide 231c, and A conductor 261 (conductor 261a, located on the edge 251 and overlapping with a portion of the oxide 231b) and conductor 261b) and, in the following, oxide 231a, oxide 2 31b and oxide 231c are sometimes collectively referred to as oxide 231. 245a and oxide 245b are sometimes collectively referred to as oxide 245. Also, conductive Body 244a and conductor 244b are sometimes collectively referred to as conductor 244.

[0078] Furthermore, transistor 12 has the same configuration as transistor 11. Therefore, the conductor 206 is a conductor 205, oxide 231 is an oxide 230, and insulator 251 is an insulator 250 Therefore, the conductor 261 is formed in the same layer as the conductor 260 and has a similar structure. In the following, conductor 206 is of conductor 205, oxide 231 is of oxide 230, and insulator 251 can be referred to in the description of insulator 250, and conductor 261 can be referred to in the description of conductor 260.

[0079] Here, conductor 261 acts as the top gate, and conductor 206 acts as the back gate (distribution It functions as a wire (BGL2). Also, insulator 251 acts as a gate insulator for the top gate. Insulators 222 and 224 function as gate insulators for the back gate. Furthermore, conductor 244a functions as either a source or a drain, and conductor 244b It functions as either a source or a drain. Also, the conductor 261 of oxide 231 and At least a portion of the overlapping regions functions as a channel-forming region.

[0080] Furthermore, insulator 275 consists of insulator 224, oxide 231a, oxide 231b, and oxide 24 5, and covering the conductor 244, the insulator 280 is provided in contact with the upper surface of the insulator 275. It is present. It reaches insulators 280 and 275, oxide 231b and insulator 224. An opening is provided, and the opening is superimposed on the region between the conductor 244a and the conductor 244b. It's being kicked.

[0081] As shown in Figures 2B, 3A, and 3B, oxide 231c and insulating material are placed in the opening. Body 251 and conductor 261 are arranged. Therefore, oxide 231c is an insulator 2 The top surface of 24, the side surface of oxide 231a, the top surface and side surface of oxide 231b, and oxide 2 The sides of 45a and oxide 245b, and the sides of conductor 244a and conductor 244b, It is provided in contact with the side surface of insulator 275 and the side surface of insulator 280. In addition, insulator 251 The conductor 261 is provided in contact with the upper and side surfaces of the oxide 231c, and the conductor 261 is on the upper surface of the insulator 251. and are provided in contact with the side surface. Also, the upper surface of the conductor 261, the uppermost surface of the insulator 251, The uppermost surface of the oxide 231c is positioned to roughly coincide with the upper surface of the insulator 280.

[0082] By using this structure, the conductor 261, the insulator 251, and the oxide 231c It can be formed in a self-aligning manner so as to be embedded in an opening formed in the insulator 280 or the like. Yes, it is possible. By forming the conductive material 261, etc., in this way, alignment is not required. A conductor 261 can be placed in the region between conductor 244a and conductor 244b.

[0083] The capacitive element 13 is positioned in contact with the upper surface of the conductor 240 and the upper surface of the conductor 260. A conductor 207, an insulator 280 and an insulator 282 placed on the conductor 207, and A conductor 208 is placed on the edge body 282, and at least a portion of it overlaps with the conductor 207, To possess.

[0084] Here, conductor 207 functions as node FN, and conductor 208 functions as wiring CL. In other words, the conductor 207 functions as the lower electrode of the capacitive element 13, and the conductor 20 8 functions as the upper electrode of the capacitive element 13. In addition, the insulator 282 is the dielectric of the capacitive element 13. It functions as a body.

[0085] As shown in Figure 2A, in a top view, the conductor 207 encompasses the conductor 260. Preferably, the conductor 207 is arranged to cover the conductor 260. This is preferable. Furthermore, in a top view, the conductor 207 may also include the conductor 240. This configuration allows the capacitive element 13 to cover the top gate of the transistor 11. It can be placed in conjunction with the source or drain of transistor 12. Therefore, with respect to transistors 11 and 12, without significantly increasing the area, The area of ​​the quantitative element 13 can be made larger.

[0086] Furthermore, as shown in Figures 1B, 3A, and 3B, the insulator 282 covers the conductor 207. It is preferable that the conductor 208 is positioned so as to cover the conductor 207 via the insulator 282. This is because, even on the side surface of the conductor 207, the conductor 20 is transmitted through the insulator 282. 8 is placed. Therefore, the entire region where conductor 208 and conductor 207 overlap, and conductor 20 The side of 7 can be made to function as a capacitive element 13.

[0087] By using the above configuration, the occupied area of ​​the memory cell 10 is reduced, and the capacitive element 1 3 can be provided. This will enable high integration of semiconductor devices and large memory capacity. We can provide semiconductor devices. Furthermore, semiconductor devices with low manufacturing costs per unit of memory capacity. We can provide a place for you.

[0088] Furthermore, a conductor 209 is positioned in contact with the upper surface of the conductor 261. The conductor 209 is a conductor It can be formed in the same layer as the conductive body 207 and is covered by the insulator 282. Conductor 209 It functions as a wiring WL.

[0089] Furthermore, by arranging multiple memory cells 10 in a matrix, a memory cell array is formed. This can be formed. In this case, the wiring connecting each memory cell 10 extends in one direction. It is preferable that it be provided in this manner. For example, as shown in Figures 1A and 1B, wiring CL (conductive Body 208), wiring WL (conductor 209), wiring BGL1 (conductor 205), and wiring B GL2 (conductor 206) should be provided extended in the y direction. In this case, they are arranged in the y direction. Each memory cell 10 has a common wiring CL (conductor 208) and wiring WL (conductor 209). It is connected to wiring BGL1 (conductor 205) and wiring BGL2 (conductor 206). It will become that.

[0090] Furthermore, for example, if the conductor 261 is extended and provided as the wiring WL, the wiring WL Parasitic transistors are formed where oxide 230b is superimposed. In this embodiment, the conductor 209, which is placed on the conductor 261, functions as a wiring WL. This enables the conductor 209 and oxide 230b to insulate, as shown in A5 of Figure 3B. They overlap via body 280, etc. Therefore, at the point where the conductor 209 and oxide 230b overlap, This can suppress the formation of raw transistors.

[0091] Furthermore, when multiple memory cells 10 are arranged in the x direction, the transients of the memory cells 10 Either the source or drain of transistor 11 is connected to the transistor 11 of the adjacent memory cell 10. It is connected to the other of the source or drain. Also, the transistor 12 of the memory cell 10 Either the source or the drain is connected to the source of the transistor 12 of the adjacent memory cell 10. The other end is connected to the drain. In other words, the source and drain of multiple transistors 11. These are connected in series, and the sources and drains of multiple transistors 12 are also connected in series. In other words, in the memory cell 10, either the source or the drain of the transistor 12 It is electrically connected to the wiring WBL via another transistor 12, and transistor 11 One of the sources or drains of the RBL is electrically connected to the wiring RBL via the other transistor 11. The source or drain of transistor 11 is connected to the other transistor 11. It is electrically connected to wiring SL via this.

[0092] In this case, node FN of memory cell 10 is the node of transistor 12 of memory cell 10. The other side of the drain or source of the transistor 12 of the adjacent memory cell 10 It is connected to one of the drains. Therefore, the potential (charge) written to node FN is, Turn off transistor 12 of Morisel 10, and the transistor of adjacent memory cell 10 By turning off 12, it can be retained.

[0093] When the above configuration is used, as shown in Figure 1B, oxide 230b and oxide 230a are used, The oxides 231b and 231a can be provided by extending them in the x-direction. As a result, the transistor 11 is formed in the region where the oxide 230b and the conductor 208 overlap. This allows for the formation of a transistor 12 in the area where the oxide 231b and the conductor 209 overlap. This can be done. Here, the channel length direction of transistor 11 and the channel of transistor 12 The channel length direction is approximately parallel. Also, the channel length direction of transistor 11 and the conductor 20 The extension direction of 8 is approximately perpendicular. Also, the channel length direction of transistor 12 and the conductor The extension direction of 209 is approximately vertical.

[0094] Furthermore, the region that overlaps with the conductor 260 and is removed is excluded, but the oxide 243 and The conductor 242 may be arranged to extend in the x direction, similar to the oxide 230b. Also, the region where the conductor 261 is overlapped and removed is excluded, but the oxide 245 and the conductor 244 may be arranged to extend in the x direction, similar to the oxide 231b.

[0095] Note that the configuration of the memory cell 10 is not limited to the above. For example, in each memory cell 1 0, the wiring RBL and the wiring SL may be connected to the transistor 11, and the transistor 1 2 may be connected to the wiring WBL. In this case, the oxides 230b, 23 1b, etc. are not provided in an extended manner, but are provided in an island pattern in each memory cell 10 Thus, the potential (charge) written to the node FN can be held simply by turning off the transistor 1 2 of each memory cell 10.

[0096] Also, details of a memory cell array in which a plurality of memory cells 10 are arranged in a matrix will be described in a later embodiment.

[0097] Next, an enlarged view of the vicinity of the channel formation region of the transistor 11 in FIG. 3B is shown in FIG. 4 . Hereinafter, the oxide 230 of the transistor 11 will be described, but the description can also be referred to for the oxide 231 of the transistor 12. As shown in FIG. 4, the oxide 230 has a region 232c that functions as the channel formation region of the transistor 11, and a region 232a and a region 232b that are provided so as to sandwich the region 232c and function as the source region or the drain region of the transistor 11. The region 232c overlaps at least partially with the conductor 260. In other words, the region 232c has a part that overlaps with the conductor 260.

[0098] At least a part of the region 232c overlaps with the conductor 260. In other words, the region 232c is provided in the region between the conductor 242a and the conductor 242b. Region 232 a is provided so as to overlap the conductor 242a, and region 232b is provided so as to overlap the conductor 242b.

[0099] The region 232c that functions as a channel formation region has less oxygen deficiency or a lower impurity concentration than region 232a and region 232b, and thus is a high-resistance region with a low carrier concentration. Therefore, it can be said that region 232c is of i-type (intrinsic) or substantially i-type. Moreover, region 232a and region 232b that function as a source region or a drain region have a high oxygen deficiency or a high impurity concentration such as hydrogen, nitrogen, or a metal element, resulting in an increased carrier concentration and a reduced resistance. That is, region 232a and region 232b are n-type regions with a high carrier concentration and a low resistance compared to region 232c. Here, the carrier concentration of the region 232c that functions as a channel formation region is preferably 1×10 cm

[0100] or less, more preferably less than 1×10 cm , even more preferably less than 1×10<00009​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​There are no particular limitations, but for example, 1 x 10 -9 cm -3 It can be done this way.

[0102] Furthermore, between region 232c and region 232a, or region 232b, the carrier concentration is , the carrier concentration in region 232a and region 232b is equivalent to or lower than that of region A region may be formed with a carrier concentration equivalent to or higher than that of region 232c. In other words, the region in question is the junction region between region 232c and region 232a, or region 232b. It functions as follows. The junction region has a hydrogen concentration that is the same as the water in region 232a and region 232b. Equivalent to or lower than the elementary concentration, and equivalent to or lower than the hydrogen concentration in region 232c. The oxygen deficiency may also increase in the junction region, region 232a, and region Equivalent to or less than the oxygen deficiency in region 232b, and equivalent to the oxygen deficiency in region 232c. Or it may be more than that.

[0103] Furthermore, in oxide 230, it can sometimes be difficult to clearly detect the boundaries of each region. The concentrations of metallic elements, as well as impurity elements such as hydrogen and nitrogen, detected within each region are Furthermore, the changes may not be limited to gradual changes within each domain, but may also be continuous within each domain. The closer the region is to the channel formation region, the more likely it is to contain metallic elements, as well as hydrogen and nitrogen. It is sufficient if the concentration of impurity elements decreases.

[0104] The transistor 11 functions as a semiconductor in the oxide 230 which includes a channel formation region. It is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor). Oxide 230 is , an oxide 230a placed on the insulator 224, and an acid placed on the oxide 230a It is preferable to have the oxide 230b and the oxide 230c disposed on the oxide 230b. Hereinafter, the oxide 230 of the transistor 11 will be described, but the description can also be referred to for the oxide 231 of the transistor 12.

[0105] In addition, as the metal oxide that functions as a semiconductor, it is preferable to use one having a band gap of 2 eV or more, preferably 2.5 eV or more. By using such a metal oxide with a large band gap, the off-current of the transistor can be reduced. By using a metal oxide with a large band gap, the off-current of the transistor 11 and the transistor 12 can be reduced. In particular, by reducing the off-current of the transistor 12, when the transistor 11 and the transistor 12 are used as memory cells of a memory device, <00​​​​​​​​​​​​​​​​​​​​​​​​​​​​Oxides with added components may also be used. In addition, as oxide 230, In-Ga oxide, In -Zn oxide and indium oxide may also be used.

[0107] The above metal oxides can be deposited on a substrate using methods such as sputtering. So, the transistor 11 is superimposed on top of the peripheral circuits such as the drive circuit formed on the silicon substrate. Transistor 12 can be provided. Therefore, transistor 11 and transistor When STA 12 is used as a memory cell of a storage device, it can be provided on a single chip. This allows for an increase in the area occupied by the memory cell array, thereby increasing the storage capacity of the storage device. Furthermore, by stacking multiple metal oxide films as described above, memory can be formed. Cell arrays can be stacked. This reduces the area occupied by the memory cell array. Cells can be integrated and arranged without increasing their number. In other words, the number of cells in the memory cell array can be increased. A layered structure (which may be referred to as a 3D cell array below) can be constructed. This allows for higher integration of memory cells, enabling the provision of semiconductor devices with larger memory capacities. ru.

[0108] Furthermore, the above-mentioned method for depositing metal oxide films is not limited to sputtering, but also includes chemical Chemical Vapor Deposition (CVD) method, molecular beam Epitaxy (MBE: Molecular Beam Epitaxy), pulsed Pulsed Laser Deposition (PLD) method, atomic layer deposition You may use methods such as Atomic Layer Deposition (ALD) as appropriate. stomach.

[0109] Here, the atomic ratio of In to element M in the metal oxide used for oxide 230b However, the atomic ratio of In to element M in the metal oxide used in oxide 230a is larger It is preferable that it is a metal oxide. Oxide 230c can be used in oxide 230b. Any metal oxide that can be used as the substance or oxide 230a may be used.

[0110] Specifically, for oxide 230a, In:M:Zn = 1:3:4 [atomic ratio] or This refers to the composition in its vicinity, or In:M:Zn=1:1:0.5 [atomic ratio] or its vicinity. A metal oxide with a similar composition can be used. Also, as oxide 230b, In:M:Zn = Composition with a ratio of 1:1:1 [number of atoms] or close to it, In:M:Zn=4:2:3 [number of atoms] [Ratio] or a composition near that ratio, or In:M:Zn=5:1:3 [atomic ratio] or A metal oxide with a composition in the vicinity of that desired value can be used. Note that the composition in the vicinity refers to the desired atomic ratio. The range includes ±30%. Furthermore, it is preferable to use gallium as element M.

[0111] Furthermore, when depositing metal oxides by sputtering, the above atomic ratio is used for the deposition of the film. Not limited to the atomic ratio of the metal oxides, the sputtering target used for depositing metal oxide films The atomic ratio of the set may also be acceptable.

[0112] By placing oxide 230a below oxide 230b, below oxide 230a This suppresses the diffusion of impurities and oxygen from the formed structure to oxide 230b. It can be done. Also, by placing oxide 230c on top of oxide 230b, oxide 230c Furthermore, it suppresses the diffusion of impurities and oxygen from the structure formed above to oxide 230b. It is possible.

[0113] However, oxide 230 is oxide 230a, oxide 230b, and oxide 230c It is not limited to a configuration of three layers stacked together. For example, a single layer of oxide 230b, oxide 2 The structure may also consist of two layers of 30a and oxide 230b, or a laminated structure of four or more layers. Each of oxides 230a, 230b, or 230c has a layered structure. It is also possible to have a two-layer laminated structure of oxide 230c. In this case, oxidation As substance 230c, a metal oxide that can be used as oxide 230b is provided, and acid is placed on it. The configuration should include a metal oxide that can be used in compound 230a.

[0114] Furthermore, oxides 230a, 230b, and 230c share common elements other than oxygen. By having elements (as the main component), the interface between oxide 230a and oxide 230b, and Furthermore, the defect level density at the interface between oxide 230b and oxide 230c can be reduced. The interface between oxide 230a and oxide 230b, and between oxide 230b and oxide 230c Because the defect level density at the interface can be reduced, carrier propagation by interface scattering can be reduced. It has minimal impact on conductivity and allows for high on-current.

[0115] Here, the junction of oxide 230a and oxide 230b, and oxide 230b and oxide 2 At the junction of 30c, the lower end of the conduction band changes smoothly. In other words, oxide 230 In the junction between a and oxide 230b, and in the junction between oxide 230b and oxide 230c The lower end of the conduction band can also be described as continuously changing or continuously junctioning. For this to happen, the interface between oxide 230a and oxide 230b, and the interface between oxide 230b and oxide 2 It is desirable to lower the defect level density of the mixed layer formed at the interface with 30c.

[0116] It is preferable that each of the oxides 230b has crystalline properties. In particular, oxides 230b and CAAC-OS(c-axis aligned crystalline ox It is preferable to use an IDE semiconductor. Also, oxide 230a Alternatively, CAAC-OS may be used for oxide 230c.

[0117] CAAC-OS has a highly crystalline, dense structure, and is free from impurities and defects (for example, Oxygen deficiency (V O Metal oxides with low oxygen vacancy (also known as oxygen vacancy) Yes. In particular, after the formation of the metal oxide, the temperature is such that the metal oxide does not undergo polycrystallization (for example, By heat treatment at temperatures between 400°C and 600°C, CAAC-OS can be made more crystalline. This allows for a more intricate structure. In this way, the density of CAAC-OS can be further increased. This makes it possible to further reduce the diffusion of impurities or oxygen in the CAAC-OS.

[0118] On the other hand, CAAC-OS is difficult to identify clear grain boundaries, so it is difficult to identify grain boundaries. It can be said that a decrease in electron mobility due to CAAC-OS is less likely to occur. Metal oxides have stable physical properties. Therefore, metal oxides containing CAAC-OS are It is heat-resistant and highly reliable.

[0119] In transistors using oxide semiconductors, the region in the oxide semiconductor where the channel is formed... The presence of impurities and oxygen deficiencies can easily lead to variations in electrical properties and reduced reliability. Yes. Also, hydrogen near the oxygen vacancy can fill the oxygen vacancy, creating a defect (hereinafter referred to as V). O Let's call it H. In some cases, this can occur. ) and even when no voltage is applied to the gate electrode of the transistor. In some cases, electron carriers are generated. This can lead to the formation of channels in oxide semiconductors. If the region being treated contains an oxygen vacancy, the transistor exhibits normally-on characteristics (gate current). This characteristic allows a channel to exist and current to flow through the transistor even without applying voltage to the electrodes. Therefore, in the region where channels are formed in oxide semiconductors, impurities and oxygen deficiencies are present. Loss, and V O It is preferable that the amount of H is reduced as much as possible. In other words, the amount of H in the oxide is reduced as much as possible. The region in which a channel is formed in a conductor is where a voltage is applied to the gate electrode of a transistor. In the absence of this substance, the carrier concentration is reduced, and it is type i (true) or substantially type i. This is preferable.

[0120] In contrast, near the oxide semiconductor, oxygen that is desorbed by heating (hereinafter referred to as excess oxygen) In some cases, an insulator containing ( ) is provided and heat treatment is performed, which can cause oxide semiconductors to be released from the insulator. It supplies oxygen to the body, prevents oxygen deficiency, and V O H can be reduced. However, the source region When an excess amount of oxygen is supplied to the region or drain region, transistor 11 and the transistor This may cause a decrease in the on-current of Zistor 12 or a decrease in its field-effect mobility. Furthermore, the oxygen supplied to the source or drain region varies within the substrate surface, This will result in variations in the characteristics of semiconductor devices containing transistors.

[0121] Therefore, in the oxide semiconductor, the region 232c that functions as a channel-forming region is The carrier concentration is reduced and it is preferable that it is type i or substantially type i, but the source region Alternatively, regions 232a and 232b function as drain regions, and the carrier concentration It is preferable that the value is high and that it is n-type. In other words, the oxygen vacancy in region 232c of the oxide semiconductor, and V O By reducing H, an excess amount of oxygen is supplied to regions 232a and 232b. It is preferable to prevent this from happening.

[0122] Therefore, with the conductor 242a and conductor 242b provided on the oxide 230b, Microwave treatment was performed in an oxygen-containing atmosphere to eliminate oxygen deficiencies in region 232c, and V O Low H It is preferable to reduce the amount. Here, microwave processing refers to, for example, using microwaves to achieve high density This refers to processing using a device that has a power supply for generating plasma. In the radiator 12, with conductors 244a and 244b provided, oxygen Microwave processing is performed in an atmosphere containing [specific element].

[0123] By performing microwave processing in an oxygen-containing atmosphere, microwaves or high frequencies such as RF are produced. By using this method, oxygen gas can be converted into plasma, and this oxygen plasma can be applied. Alternatively, microwaves or high-frequency waves such as RF can be irradiated into region 232c. Due to the effects of microwaves and other factors, the V region 232c O The H is divided, and the hydrogen H is in region 232 Remove from c, oxygen-deficient V O It can be replenished with oxygen. In other words, in region 232c And, "V O H → H + V OThis reaction occurs, reducing the hydrogen concentration in region 232c. Therefore, oxygen deficiency in region 232c, and V O Reduce H, carrier concentration It can reduce [the value].

[0124] Furthermore, when performing microwave processing in an oxygen-containing atmosphere, high frequencies such as microwaves or RF are used. The effects of waves, oxygen plasma, etc., are shielded by conductors 242a and 242b, and It does not extend to regions 232a and 232b. Furthermore, the effect of oxygen plasma is on oxides. Insulator 275 and insulator 2 are provided covering 230b and the conductor 242. This can be reduced by 80. This allows for reduction in region 232 during microwave processing. a, and in region 232b, V O Because H is reduced and no excessive oxygen supply occurs, This can prevent a decrease in carrier concentration.

[0125] In this way, oxygen vacancies are selectively created in the oxide semiconductor region 232c, and V O Remove H Furthermore, region 232c can be made i-type or substantially i-type. Region 232a and region 232b, which function as a drain region, have excess oxygen This suppresses the supply and maintains the n-type. This suppresses fluctuations in electrical characteristics and prevents variations in the electrical characteristics of transistor 11 within the substrate surface. This can be achieved. Furthermore, the same effect can be obtained with transistor 12.

[0126] By adopting the above configuration, we can provide a semiconductor device with less variation in transistor characteristics. It can be provided. Furthermore, it can provide a semiconductor device with good electrical characteristics. Furthermore, it is possible to provide semiconductor devices with good reliability.

[0127] Furthermore, in Figures 3A, 3B, etc., the side surface of the opening into which the conductor 260, etc. is embedded is made of oxide. The grooves of 230b are also roughly perpendicular to the surface on which oxide 230b is formed, This embodiment is not limited to this. For example, the bottom of the opening may have a gently curved surface. It may have a U-shaped form. Also, for example, the side surface of the opening may be oxide 230b It may be inclined with respect to the surface to be formed.

[0128] Furthermore, as shown in Figure 3A, in a cross-sectional view of the transistor 11 in the channel width direction, acid A curved surface may be present between the side surface of the oxide 230b and the top surface of the oxide 230b. That is, The edges of the side surface and the edges of the top surface may be curved (hereinafter also referred to as rounded).

[0129] The radius of curvature on the above curved surface is greater than 0 nm, and the oxide 2 in the region overlapping with conductor 242. A thickness smaller than 30b, or smaller than half the length of the region that does not have the curved surface. This is preferable. Specifically, the radius of curvature of the curved surface is greater than 0 nm and less than or equal to 20 nm. Preferably, the wavelength is 1 nm to 15 nm, and more preferably 2 nm to 10 nm. By adopting this shape, the oxide 230b of the insulator 250 and conductor 260 is formed. This can improve the coverage.

[0130] A small amount of insulators 212, 214, 275, 282, and 283 At the very least, impurities such as water and hydrogen may enter from the substrate side, or from transistor 11 and From above transistor 12, the diffusion to transistors 11 and 12 It is preferable that it functions as a suppressive barrier insulating film. Therefore, the insulator 212, insulating At least one of body 214, insulator 275, insulator 282, and insulator 283 is a hydrogen source Nitrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.) ), has the function of suppressing the diffusion of impurities such as copper atoms (the above impurities are less likely to permeate) It is preferable to use an edge material. Alternatively, oxygen (for example, oxygen atoms, oxygen molecules, etc.) At the very least, use an insulating material that has the function of suppressing the diffusion of (i) (i.e., the above oxygen does not easily permeate it). It is preferable that they be present.

[0131] In this specification, a barrier insulating film refers to an insulating film that has barrier properties. In this specification, barrier properties refer to the function of suppressing the diffusion of the corresponding substance (low permeability). (Also known as) capturing and fixing the corresponding substance (also known as gettering) (u) To be a function.

[0132] Insulators 212, 214, 275, 282, and 283 For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, Using indium gallium zinc oxide, silicon nitride, or silicon nitride oxide, etc. This can be achieved. For example, as insulators 212 and 283, the hydrogen barrier properties are higher. It is preferable to use silicon nitride or the like. Also, for example, insulator 214, insulator 2 75, and as an insulator 282, it has high hydrogen capture and hydrogen fixation capabilities, oxide It is preferable to use luminium or magnesium oxide, etc. This allows water and hydrogen to be produced. Impurities such as these can enter through insulators 212 and 214 from the substrate side into transistor 1 This can suppress diffusion to the side of transistor 12 and 1. Alternatively, water, hydrogen, etc. Which impurities are located above the insulator 283, such as in the interlayer insulating film, and which are transients This can suppress diffusion to the ta 11 and transistor 12 side. Alternatively, an insulator Oxygen contained in 224, etc., spreads to the substrate side via insulators 212 and 214. It can suppress the dispersion. Alternatively, oxygen contained in the insulator 280, etc. The diffusion occurs above transistors 11 and 12 via 282, etc. It can be suppressed. In this way, transistors 11 and 12 are connected to water, water Insulators 212 and 214 have the function of suppressing the diffusion of impurities such as elements and oxygen. It is preferable to have a structure surrounded by insulators 275, 282, and 283. stomach.

[0133] Here, insulator 212, insulator 214, insulator 275, insulator 282, and insulator 2 As for 83, when using aluminum oxide, use an oxide having an amorphous structure. It is preferable that they be present. For example, AlO x (x is any number greater than 0), or MgO y ( It is preferable to use metal oxides such as y (where y is any number greater than 0). In metal oxides having a fast structure, oxygen atoms have dangling bonds, Dangling bonds may have the property of capturing or fixing hydrogen. A metal oxide having a morphous structure is used as a component of transistors 11 and 12. By using it as an element, or by providing it around transistors 11 and 12 , hydrogen contained in transistor 11 and transistor 12, or transistor 11 It can capture or fix hydrogen present around transistor 12. The hydrogen contained in the channel formation region of the transistor 11 and transistor 12 is captured or It is preferable that it adheres. A metal oxide having an amorphous structure is attached to the transistor 11 and and used as components of transistor 12, or transistor 11 and transistor By providing it around the 12, the transistor 11 and have good characteristics and are highly reliable. A transistor 12 and a semiconductor device can be fabricated.

[0134] Also, insulators 212, 214, 275, 282, and 28 3. When using aluminum oxide or the like, it is preferable that it has an amorphous structure. A region with a polycrystalline structure may be formed in part. Also, insulator 212, insulator 214, Insulators 275, 282, and 283 consist of an amorphous layer and a polycrystalline layer. It may also be a multilayer structure in which layers of structure are stacked. For example, on top of a layer of amorphous structure A laminated structure in which a polycrystalline layer is formed may also be used.

[0135] The composition of insulators 212, 214, 275, 282, and 283 The film can be formed, for example, using the sputtering method. The sputtering method uses a deposition gas. Since hydrogen is not required, insulators 212, 214, 275, and 282 are used. , and the hydrogen concentration of the insulator 283 can be reduced. The film deposition method is sputtering. This is not limited to the ring method; CVD, MBE, PLD, ALD, etc., can be used as appropriate. You may use it.

[0136] Furthermore, it is preferable to lower the resistivity of insulators 212 and 283. For example, the resistivity of insulator 212 and insulator 283 is approximately 1 × 10⁻⁶. 13 Ωcm By doing so, in the process of using plasma in the semiconductor device manufacturing process, the insulator 212, and The insulator 283 charges up the conductor 205, conductor 242, or conductor 260. This can be mitigated in some cases. The resistivity of insulators 212 and 283 is favorable. Mashiku is 1 x 10 10 Ωcm or more, 1 × 10 15 The density should be less than or equal to Ωcm.

[0137] Furthermore, insulators 216 and 280 have a lower dielectric constant than insulator 214. This is preferable. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wirings is reduced. For example, silicon oxide, oxide, silicon oxide can be used as insulator 216 and insulator 280. Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon Silicon oxide with added carbon and nitrogen, silicon oxide with added carbon and nitrogen, porous silicon oxide You can use reconnaissance or similar methods as appropriate.

[0138] In transistor 11, the conductor 205 is composed of oxide 230 and conductor 260, and They are arranged in such a way. The conductor 205 is extended in the y direction, as shown in Figure 1B and other figures. This is sufficient. Here, the conductor 205 is embedded in an opening formed in the insulator 216. It is preferable to do so. The conductor 205 of the transistor 11 will be described below. However, the same explanation can also be applied to the conductor 206 of transistor 12.

[0139] The conductor 205 comprises conductor 205a, conductor 205b, and conductor 205c. The conductor 205a is provided in contact with the bottom surface and side wall of the opening. The conductor 205b is It is provided so as to be embedded in a recess formed in the conductor 205a. Here, the conductor 20 The upper surface of 5b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. Conductor 2 05c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is the height of the upper surface of the conductor 205a and the insulator 216 It roughly coincides with the height of the top surface. In other words, conductor 205b is conductor 205a and conductor It will be enclosed in 205c.

[0140] Here, conductors 205a and 205c are hydrogen atoms, hydrogen molecules, water molecules, and nitrogen atoms. Expansion of impurities such as atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. It is preferable to use a conductive material that has the function of suppressing dispersion. Alternatively, oxygen (for example, Using a conductive material that has the function of suppressing the diffusion of at least one of the following: oxygen atoms, oxygen molecules, etc. It is preferable that they be present.

[0141] Conductive material having the function of reducing hydrogen diffusion in conductor 205a and conductor 205c By using this material, impurities such as hydrogen contained in the conductor 205b are removed from the insulator 224, etc. This prevents diffusion into oxide 230. Also, conductor 205a and By using a conductive material that has the function of suppressing oxygen diffusion in the conductor 205c, This can suppress the oxidation of the conductor 205b, which reduces its conductivity. Examples of conductive materials that have a suppressive function include titanium, titanium nitride, tantalum, and nitrogen. It is preferable to use tantalum oxide, ruthenium oxide, etc. The conductive material 205a can be a single layer or a laminate of the above conductive material. For example, a conductor For 205a, titanium nitride can be used.

[0142] Furthermore, the conductor 205b is a conductive material mainly composed of tungsten, copper, or aluminum. It is preferable to use a material with properties. For example, tungsten can be used for the conductor 205b. stomach.

[0143] Conductor 205 may function as a back gate electrode. In that case, conductor 20 The potential applied to 5 is changed independently of the potential applied to the conductor 260, without being linked to it. This allows the threshold voltage (Vth) of transistor 11 to be controlled. In particular, By applying a negative potential to the electromagnet 205, the Vth of transistor 11 is increased. Therefore, the off-current can be reduced. This is better than not applying a potential when the potential applied to the conductor 260 is 0V, when drain The current can be reduced.

[0144] Furthermore, the electrical resistivity of the conductor 205 is set considering the potential applied to the conductor 205. The thickness of the conductor 205 is measured and set to match the electrical resistivity. Also, the insulator 21 The film thickness of 6 will be approximately the same as that of conductor 205. Here, within the limits allowed by the design of conductor 205 It is preferable to reduce the film thickness of the conductor 205 and the insulator 216. By making it thinner, the absolute amount of impurities such as hydrogen contained in the insulator 216 is reduced. This allows for the reduction of the diffusion of the impurity into the oxide 230.

[0145] Furthermore, as shown in Figures 3A and 3B, the conductor 205 is the conductor 242a of oxide 230. Furthermore, it is preferable to provide a region larger than the area that does not overlap with the conductor 242b. In particular, the conductor The electrode 205 is located at the end that intersects the channel width direction of oxide 230a and oxide 230b It is preferable that the outer region is also stretched. In other words, the channel of oxide 230 On the outer side of the side in the width direction, the conductor 205 and the conductor 260 are separated by an insulator. It is preferable that they are superimposed. Having this configuration, the top gate electrode is functional. The electric field of the conductor 260 that can perform the function and the electric field of the conductor 205 that functions as a back gate electrode This allows the channel-forming region of oxide 230 to be electrically surrounded. Furthermore, the top gate and back gate electric fields electrically isolate the channel formation region. The structure of the surrounding transistors is called a surrounded channel (S-channel). This is called a nel structure.

[0146] In this specification, etc., an S-channel transistor refers to a pair of gates. The electric fields of one and the other electrodes electrically surround the channel formation region. This represents the structure of the sta. Furthermore, the S-channel structure disclosed in this specification is a Fin-type structure. It differs from conventional and planar structures. By adopting an S-channel structure, short channels A transistor that is less susceptible to the Nell effect, or in other words, a transistor that is less prone to short-channel effects. It is possible.

[0147] Furthermore, as shown in Figure 1B and other figures, the conductor 205 is extended and also functions as wiring. However, it is not limited to this, and a conductive material that functions as wiring is located beneath the conductor 205. A configuration with a body may also be used. Also, the conductor 205 does not necessarily have to be one per transistor. It is not necessary to provide one. For example, by configuring the conductor 205 to be shared by multiple transistors. That's good too.

[0148] Note that the conductor 205 includes conductor 205a, conductor 205b, and conductor 205c. The present invention describes a configuration in which the materials are stacked, but is not limited thereto. Conductor 2 05 may be configured as a single-layer, two-layer, or four-layer or more laminated structure. For example, When the conductor 205 is made into a two-layer laminated structure, the conductor 205c is omitted, and the conductor 205a is The structure should be such that the top surface and the top surface of the conductor 205b coincide.

[0149] Insulators 222 and 224 are located between transistors 11 and 12. It functions as a gate insulator for a gate.

[0150] The insulator 222 suppresses the diffusion of hydrogen (for example, at least one such as a hydrogen atom or hydrogen molecule). It is preferable that it has a function to control oxygen. Also, the insulator 222 is oxygen (for example, oxygen atoms, It is preferable that the function suppresses the diffusion of at least one of the following: oxygen molecules. For example, Insulator 222 suppresses the diffusion of hydrogen and / or oxygen more effectively than insulator 224. It is preferable that it has a function.

[0151] The insulator 222 is made of either or both aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Suitable insulators include aluminum oxide and hafni oxide. Using oxides containing um, aluminum, and hafnium (hafnium aluminate), etc. It is preferable that such a material is used to form the insulator 222. 2 is the release of oxygen from oxide 230 and oxide 231 to the substrate side, and transistor 11 And impurities such as hydrogen from the peripheral area of ​​transistor 12 to oxide 230 and oxide 231 It functions as a layer that suppresses the diffusion of substances. Therefore, by providing the insulator 222, hydrogen and other substances are suppressed. The diffusion of impurities into the interior of transistors 11 and 12 is suppressed, and acid It is possible to suppress the formation of oxygen vacancies in the compound 230 and oxide 231. Body 205 and conductor 206 have insulator 224, oxide 230 and oxide 231 This can suppress the reaction with oxygen.

[0152] Alternatively, the above insulator may contain, for example, aluminum oxide, bismuth oxide, or germanium oxide. Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, oxide Zirconium may be added. Alternatively, these insulators may be nitrided. Also, Insulator 222 is made of silicon oxide, silicon oxide nitride, or silicon nitride. They may be used in stacked form.

[0153] Furthermore, the insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT) (Io3), (Ba,Sr)TiO3 (BST), and other so-called high-k materials are included in the aqueous solution. The edge material may be used in a single layer or in a stacked configuration. As transistors become smaller and more integrated... Thinning the gate insulator can sometimes lead to problems such as leakage current. By using a high-k material as an insulator that functions as a body, the physical film thickness is maintained while... This makes it possible to reduce the gate potential during transistor operation.

[0154] The insulator 224 in contact with oxides 230 and 231 contains excess oxygen (due to heating) It is preferable to remove oxygen. For example, the insulator 224 is silicon oxide, oxidized nitride. Silicon or similar materials can be used as appropriate. Oxygen-containing insulators are oxide 230 and oxide 231. By providing it in contact with the surface, oxygen deficiency in oxides 230 and 231 is reduced, The reliability of the transistor 11 and transistor 12 can be improved.

[0155] As for the insulator 224, specifically, an oxide material from which some oxygen is removed by heating, or alternatively, Therefore, it is preferable to use an insulating material that has an excess oxygen region. Oxygen is removed by heating. The oxides that are released are TDS (Thermal Desorption Spectroscopy). (copy) Analysis showed that the amount of oxygen molecules removed was 1.0 × 10⁻⁶. 18 molecular / cm² 3 Preferably 1.0 × 10 19 molecular / cm² 3 More preferably 2.0×10 19 molecular / cm² 3 Above, or 3.0 × 10 20 molc ules / cm 3 The above describes the oxide film. Note that the surface temperature of the film during the above TDS analysis was The preferred temperature range is between 100°C and 700°C, or between 100°C and 400°C. stomach.

[0156] Furthermore, during the manufacturing process of transistors 11 and 12, oxide 230 It is preferable to perform the heat treatment with the surface of oxide 231 exposed. The principle is, for example, between 100°C and 600°C, more preferably between 350°C and 550°C. It should be done in a nitrogen gas or inert gas atmosphere, or an oxidizing gas atmosphere. The procedure is carried out in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of sulfate. For example, heating treatment The procedure is preferably carried out in an oxygen atmosphere. This is done in oxide 230 and oxide 231. By supplying oxygen, oxygen deficiency (V O This can reduce the amount of heat loss. In addition, the heat treatment is performed under reduced pressure. It may be carried out in a normal state. Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere. After processing, to replenish the removed oxygen, an oxidizing gas is added at a concentration of 10 ppm or more, or at a concentration of 1% or more. The procedure may be carried out in an atmosphere containing 10% or more of the substance. Alternatively, an oxidizing gas can be used at 10 ppm or more, or 1% or less. After heat treatment in the above or an atmosphere containing 10% or more, followed by continuous treatment with nitrogen gas or an inert gas. Heat treatment can also be performed in a gas atmosphere.

[0157] Furthermore, by performing an oxygenation treatment on oxide 230 and oxide 231, oxide 230 The oxygen deficiency in oxide 231 is repaired by the supplied oxygen, in other words, "V O The reaction "+O → null" can be promoted. Furthermore, oxide 230 and acid The oxygen supplied reacts with the hydrogen remaining in compound 231, converting the hydrogen into H2O. This allows for the removal (dehydration) of oxide 230 and oxide 231. The remaining hydrogen inside recombines with the oxygen vacancy and V O It is possible to suppress the formation of H. Cut.

[0158] The insulators 222 and 224 may have a laminated structure of two or more layers. In that case, it is not limited to laminated structures made of the same material, but also applies to laminated structures made of different materials. Good. Also, the insulator 224 is superimposed with oxides 230a and 231a to form island-like structures. This may be done. In this case, the insulator 275 is on the side of the insulator 224 and on the surface of the insulator 222. It will be configured to be in contact with the surface.

[0159] Oxide 243a and oxide 243b are provided on oxide 230b. 43a and oxide 243b are provided separated from the conductor 260, respectively. Note that the oxide 243 of transistor 11 will be described below, but transistor 12 The same explanation can also be considered regarding oxide 245.

[0160] Oxide 243 (oxide 243a and oxide 243b) is a material that suppresses oxygen permeation. It is preferable that it has the ability. Conductor 242 that functions as a source electrode and drain electrode and acid By placing an oxide 243, which has the function of suppressing oxygen permeation, between the oxide 230b and the oxide 230b, This is preferable because it reduces the electrical resistance between the conductor 242 and the oxide 230b. By using this configuration, the electrical characteristics and reliability of transistor 11 are improved. It can be improved. Furthermore, the electrical resistance between the conductor 242 and the oxide 230b can be sufficiently reduced. If possible, a configuration without oxide 243 may be used.

[0161] As oxide 243, a metal oxide containing element M may be used. In particular, element M is A Luminium, gallium, yttrium, or tin may be used. Oxide 243 is an oxide. It is preferable that the concentration of element M is higher than that of substance 230b. Also, as oxide 243, Gallium may be used. Alternatively, metal acids such as In-M-Zn oxide may be used as oxide 243. A compound may also be used. Specifically, in the metal oxide used in oxide 243, with respect to In The atomic ratio of element M in oxide 230b is the element relative to In in the metal oxide used in oxide 230b. It is preferable that the atomic ratio is greater than that of element M. Also, the film thickness of oxide 243 is 0.5 nm or less. Preferably, the wavelength is 5 nm or less, more preferably 1 nm to 3 nm, and even more preferably 1 nm. The wavelength is between m and 2 nm. Furthermore, it is preferable that oxide 243 is crystalline. If 43 is crystalline, the release of oxygen from the oxide 230 can be effectively suppressed. For example, if oxide 243 has a crystalline structure such as hexagonal, then the acid in oxide 230 In some cases, it may be possible to suppress the release of primary substances.

[0162] Conductor 242a is provided in contact with the upper surface of oxide 243a, and conductor 242b is oxide 2 It is preferable that it be provided in contact with the upper surface of 43b. Conductor 242a and Conductor 242 b is arranged in the A5-A6 direction and is provided spaced apart with the conductor 260 in between. The conductor 242 of transistor 11 will be described below, but transistor The same explanation can also be considered for the 12 conductors 244.

[0163] Examples of conductors 242 (conductors 242a and 242b) include tantalum. Nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten Materials, nitrides containing tantalum and aluminum, nitrides containing titanium and aluminum It is preferable to use such materials. In one embodiment of the present invention, a nitride containing tantalum is particularly Preferred. Also, for example, ruthenium oxide, ruthenium nitride, strontium and ruthenium Oxides containing lanthanum, oxides containing lanthanum and nickel, etc., may also be used. These materials Because it is a conductive material that is resistant to oxidation, or a material that maintains its conductivity even when it absorbs oxygen. ,preferable.

[0164] Furthermore, the hydrogen contained in oxide 230b, etc., is present in conductor 242a and conductor 242b It may diffuse into the atmosphere. In particular, conductors 242a and 242b contain tantalum. By using nitrides, the hydrogen contained in oxides 230b, etc., is absorbed by the conductor 242a, and The hydrogen diffuses into the conductor 242b, and the diffused hydrogen then enters the conductor 242a and the conductor 242b. It can combine with nitrogen it contains. In other words, hydrogen contained in oxide 230b, etc., is conductive. It may be absorbed by body 242a and conductor 242b.

[0165] Furthermore, the configuration ensures that no curved surface is formed between the side surface of the conductor 242 and the top surface of the conductor 242. This may also be done. By making the conductor 242 in which the curved surface is not formed, the channel width direction The cross-sectional area of ​​the conductor 242 in the cross-section can be increased. This makes the conductor 2 The conductivity of 42 can be increased, thereby increasing the on-current of transistor 11.

[0166] Insulator 275 is composed of insulator 224, oxide 230, oxide 231, oxide 243, oxide It is provided covering conductors 245, conductor 242, and conductor 244, and conductor 260, conductor An opening is formed in the region where the electric body 261, conductor 240, etc. are provided. Insulator 275 This includes the upper surface of the insulator 224, the side surface of the oxide 230, the side surface of the oxide 243, and the side of the conductor 242. Surface, top surface of conductor 242, side surface of oxide 231, side surface of oxide 245, side of conductor 244 It is preferable that it is provided in contact with the surface and the upper surface of the conductor 244. Also, the insulator 275 It is preferable that the insulator 2 functions as a barrier insulating film that suppresses oxygen permeation. 75 contains impurities such as water and hydrogen, from above insulator 224, oxide 230 or oxide 2 It is preferable that it functions as a barrier insulating film that suppresses diffusion to 31, and is suitable for non-hydrogen and other non-hydrogen It is preferable that it has the function of capturing pure substances. As for the insulator 275, for example, aluminum oxide An insulator such as titanium or silicon nitride can be used.

[0167] Within the region sandwiched between insulator 212 and insulator 283, insulator 280 and insulator 224 By providing an insulator 275 that is in contact with the material and has the function of capturing impurities such as hydrogen, Impurities such as hydrogen contained in the insulator 280 and insulator 224 are captured, and the area The amount of hydrogen inside can be kept constant. In this case, as the insulator 275, It is preferable to use aluminum oxide or the like.

[0168] Furthermore, between the insulator 275 and the conductors 242 and 244, there is a conductor visible from above. A barrier insulating film having the same shape as the electric body 242 and the conductor 244 may be provided. For the insulating film, any insulator that can be used for insulator 275 may be used.

[0169] The insulator 250 functions as a gate insulator for the top gate of transistor 11. In the transistor 11, it is preferable that the insulator 250 be placed superimposed on the oxide 230b. It seems so. Furthermore, the insulator 250 of transistor 11 will be described below, but the transistor The same explanation can also be considered regarding the insulator 251 of sta 12.

[0170] Insulator 250 is silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride. fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide Silicon oxide, porous silicon oxide, etc. can be used. Silicon oxide and silicon nitride are preferred because they are stable to heat.

[0171] Insulator 250, like insulator 224, has a concentration of impurities such as water and hydrogen in it. It is preferable that the amount is reduced. The film thickness of the insulator 250 is 1 nm or more and 20 nm or less. It is preferable to do so.

[0172] Note that in Figures 3A and 3B, the insulator 250 is shown as a single layer, but a laminated structure of two or more layers is also possible. This may be done. When the insulator 250 has a two-layer laminated structure, the lower layer of the insulator 250 is heated Formed using an insulator that releases more oxygen, the upper layer of insulator 250 suppresses oxygen diffusion. It is preferable to form it using an insulator that has the function of doing so. This suppresses the diffusion of oxygen contained in the lower layer of the insulator 250 into the conductor 260. This means that the decrease in the amount of oxygen supplied to oxide 230 can be suppressed. Also, This can suppress the oxidation of the conductor 260 by oxygen contained in the lower layer of the edge material 250. For example, the lower layer of the insulator 250 is made using the material that can be used for the insulator 250 as described above. The upper layer of the insulator 250 can be provided using the same material as the insulator 222.

[0173] Furthermore, when silicon oxide or silicon oxide nitride is used as the lower layer of the insulator 250, The upper layer of body 250 may be made of an insulating material, which is a high-k material with a high dielectric constant. The gate insulator is constructed with a laminated structure consisting of a lower layer of insulator 250 and an upper layer of insulator 250. A layered structure that is stable against heat and has a high dielectric constant can be created. Therefore, the gate The gate potential applied during transistor operation can be reduced while maintaining the physical thickness of the insulator. This becomes possible. Also, a thin film of equivalent oxide film thickness (EOT) of an insulator that functions as a gate insulator. This makes transformation possible.

[0174] Specifically, the upper layer of insulator 250 is made of hafnium, aluminum, gallium, and Thorium, zirconium, tungsten, titanium, tantalum, nickel, germanium, A metal oxide containing one or more metals selected from magnesium, or an acid Metal oxides that can be used as oxide 230 can be used. In particular, aluminum It is preferable to use an insulator containing oxides of um and / or hafnium. For example, the insulator 250 includes silicon oxide and hafnium oxide on the silicon oxide. A layered structure can be used.

[0175] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 is reduced. Dispersion is suppressed. In other words, the decrease in the amount of oxygen supplied to oxide 230 can be suppressed. Furthermore, the oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed.

[0176] Furthermore, even if the above metal oxide is configured to function as part of the top gate electrode, Good. For example, a metal oxide that can be used as oxide 230 is the same as the above metal oxide. It can be used in this way. In that case, the conductive material 260a is deposited by sputtering. Therefore, the electrical resistance of the above metal oxide can be reduced to make it a conductor. This is called OC( This can be called an Oxide Conductor electrode.

[0177] Having the above metal oxide, the influence of the electric field from the conductor 260 is not weakened. The on-current of the transistor 11 can be improved. Also, the insulator 250 and the above metal The physical thickness of the oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress leakage current between the conductor 260 and the oxide 230. Also, By providing a laminated structure with the edge body 250 and the metal oxide, the conductor 260 and the oxide are formed. The physical distance between 230 and the conductor 260, and the electric field strength from the conductor 260 to the oxide 230. It can be easily adjusted as needed.

[0178] The conductor 260 functions as the top gate electrode of transistor 11. In 11, the conductor 260 comprises a conductor 260a and a conductor disposed on the conductor 260a. It is preferable to have the electric body 260b. In the following, the conductor 2 of the transistor 11 I will explain 60, but please also consider the conductor 261 of transistor 12 in the same explanation. It is possible.

[0179] For example, the conductor 260a is positioned to enclose the bottom and sides of the conductor 260b. This is preferable. Also, as shown in Figures 3A and 3B, the upper surface of the conductor 260 is insulator 2 The top surface of 50 and the top surface of oxide 230c are roughly in agreement. See Figures 3A and 3. In B, the conductor 260 is shown as a two-layer structure consisting of conductor 260a and conductor 260b. However, it may be a single-layer structure or a laminated structure of three or more layers.

[0180] Conductor 260a contains hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules. It is preferable to use a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, a device that inhibits the diffusion of oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable to use a conductive material that has conductivity.

[0181] Furthermore, because the conductor 260a has the function of suppressing oxygen diffusion, the insulator 250 The oxygen contained in the material suppresses the oxidation of the conductor 260b, which reduces its conductivity. Yes, it is possible. Examples of conductive materials that have the function of suppressing oxygen diffusion include titanium and nitride. Titanium, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferred. It's nice.

[0182] Furthermore, since the conductor 260 also functions as wiring, a highly conductive material should be used. This is preferable. For example, the conductor 260b is mainly composed of tungsten, copper, or aluminum. A conductive material can be used. Furthermore, the conductor 260b may also be in a laminated structure. For example, a laminated structure of titanium or titanium nitride and the above-mentioned conductive material may be used.

[0183] Furthermore, as shown in Figure 3A, in the channel width direction of transistor 11, the insulator 22 When the bottom surface of 2 is used as a reference, the conductor 260 and the oxide 230b overlap. The height of the bottom surface of the region that is not covered is preferably lower than the height of the bottom surface of oxide 230b. The conductor 260, which functions as an electrode, transmits the oxide 230b via an insulator 250, etc. By configuring the side and top surfaces of the channel formation region to cover the electric field of the conductor 260, the oxide This makes it easier to apply the signal to the entire channel formation region of 230b. Therefore, the O The current can be increased and the frequency characteristics can be improved. The bottom surface of the insulator 222 is used as the reference. When this is done, the oxides 230a and 230b and the conductor 260 do not overlap. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in the region is 0n m or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably 5 nm The above must be 20nm or less.

[0184] The insulator 280 is provided on the insulator 275, and the conductors 260, 261, and 2 An opening is formed in the area where 40 and the like are provided. Also, the upper surface of the insulator 280 is flat. It's okay if it's been transformed.

[0185] The insulator 280, which functions as an interlayer film, preferably has a low dielectric constant. By using the material as an interlayer film, parasitic capacitance occurring between wiring can be reduced. Insulator 28 It is preferable that 0 be provided using a material similar to that of the insulator 216, for example. Silicon and silicon oxide nitride are preferred because they are thermally stable. In particular, silicon oxide Materials such as silicon oxide nitride and porous silicon oxide have acids that are released by heating. This is preferable because it allows for the easy formation of regions containing elements.

[0186] Insulator 280, like insulator 224, may have an excess oxygen region or excess oxygen. It is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. For example, insulator 280 contains silicon such as silicon oxide and silicon oxide nitride. Any suitable oxide can be used. An insulator with excess oxygen is made of oxide 230 and oxide 23 By providing it in contact with 1, oxygen deficiency in oxide 230 and oxide 231 is reduced, The reliability of transistors 11 and 12 can be improved.

[0187] The conductor 240, which is placed between the transistor 12 and the capacitive element 13, has a bottom surface that is made of conductor 24 It is in contact with 4b, and its upper surface is in contact with the conductor 207. Furthermore, the conductor 240 functions as a plug. It is preferable that an insulator 241 is provided in contact with the side surface of the material.

[0188] An insulator 241 is provided in contact with the inner wall of the opening of the insulator 275 and the insulator 280, A first conductor of the conductor 240 is provided in contact with the side surface of the edge 241, and further inside is a conductor A second conductor 240 is provided. Note that in Figure 3A, the first conductive element of conductor 240 The present invention describes a configuration in which the body and the second conductor of the conductor 240 are laminated, but the present invention is It is not limited to this. For example, the conductor 240 can be a single layer or a laminated structure of three or more layers. It may also be configured to include such a setup.

[0189] Conductor 240 is a conductive material mainly composed of tungsten, copper, or aluminum. It is preferable to use it. Also, the conductor 240 may have a laminated structure. When a layered structure is used, the conductor in contact with the insulator 275 and the insulator 280 contains water, hydrogen, etc. It is preferable to use a conductive material that has the function of suppressing the permeation of any impurities. For example, Using tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, etc. It is preferable to have a conductive material that has the function of suppressing the permeation of impurities such as water and hydrogen. The material may be used in a single layer or a multilayer form. This allows water contained in the insulator 280, etc. This prevents impurities such as elements from entering the oxide 231 through the conductor 240. Cut.

[0190] Examples of insulator 241 include silicon nitride, aluminum oxide, and silicon nitride oxide. Any insulator such as the above may be used. Insulator 241 is in contact with insulator 275 and insulator 280. Since it is provided in this way, impurities such as water and hydrogen contained in the insulator 280, etc., will be absorbed by the conductor 24 It is possible to suppress the mixing of oxide 230 through 0. In particular, silicon nitride is water It is suitable because it has high blocking properties against the element. Also, the oxygen contained in the insulator 280 This prevents absorption by the conductor 240.

[0191] Furthermore, a conductor 207 is provided in contact with the upper surface of the conductor 240 and the upper surface of the conductor 260. Here, conductor 207 functions as node FN. That is, transistor 12 Conductor 244b, which functions as the other of the source or drain of conductor 240, Electrically, through the conductor 207, the conductor 260, which functions as the gate of transistor 11, is electrically connected. It connects to the network.

[0192] Furthermore, in the same layer as the conductor 207, the conductor 209 is in contact with the upper surface of the conductor 261. It is provided. Here, the conductor 209 functions as wiring WL.

[0193] Conductors 207 and 209 can be formed by patterning the same conductive film. Conductors 207 and 209 are mainly composed of tungsten, copper, or aluminum. It is preferable to use conductive materials such as conductor 207 and conductor 209. This may also be a laminated structure, for example, a layered structure of titanium or titanium nitride and the conductive material. It may also be a layer. Note that the conductor 207 and the conductor 209 are openings provided in the insulator. It may be formed to be embedded in.

[0194] The insulator 282 covers the conductors 207 and 209, and the upper surface of the insulator 280 It is positioned in contact with the other. The insulator 282 functions as a dielectric for the capacitive element 13, so equivalent The equivalent oxide thickness (EOT) is thin. It is preferable to use an insulator. Examples of insulators 282 include aluminum oxide and acid It contains gallium oxide, hafnium oxide, zirconium oxide, aluminum, and hafnium. Oxides, aluminum and hafnium-containing oxides and nitrides, silicon and hafnium Oxides containing um, silicon and hafnium-containing oxiditrides or silicon and Nitrides containing hafnium can be used. In this specification, equivalent Oxide film thickness refers to the electrical film thickness equivalent to the physical film thickness of silicon oxide or silicon oxide nitride. This refers to the value converted to [a specific currency].

[0195] For example, as the insulator 282, aluminum oxide with a relative permittivity of 8.5 is used, and the capacitive element 1 Area 3 is 61800nm 2 Therefore, by reducing the film thickness of insulator 282 to 5 nm or less, The capacitance value of the capacitive element 13 can be made 0.9 fF or more. Here, the relative permittivity is 3.9 Using EOT, the thickness of insulator 282 can be expressed as 2.3 nm. Yes.

[0196] If the capacitance value of the capacitive element 13 is 0.9 fF or greater, then it is greater than the gate capacitance of transistor 12. Because it is large, it is not possible to write and read data from memory cell 10 sufficiently. Yes, it is possible. In other words, by making the film thickness of the insulator 282 less than 5 nm, the memory cell 10 can be made It can function perfectly well as a storage device.

[0197] Furthermore, the insulator 282 prevents impurities such as water and hydrogen from diffusing into the insulator 280 from above. It is preferable that it functions as a barrier insulating film that suppresses impurities such as hydrogen, and captures impurities such as hydrogen. It is preferable that it has the ability to do so. In addition, the insulator 282 is a barrier insulating film that suppresses oxygen permeation. It is preferable that it functions as such. As the insulator 282, for example, aluminum oxide. An insulator of the following type can be used. Within the region sandwiched between insulator 212 and insulator 283, insulator 28 By providing an insulator 282 that is in contact with 0 and has the function of capturing impurities such as hydrogen, The amount of hydrogen contained in the insulator 280 is captured. It can be set to a constant value.

[0198] Furthermore, the insulator 282 is preferably formed using a sputtering method. For example, The film can be deposited using the sputtering method in an oxygen-containing atmosphere. By forming a film of body 282, oxygen can be added to the insulator 280. This allows, Oxygen contained in insulator 280 is released via oxide 230c or oxide 231c, Since it can be efficiently supplied to 230 or oxide 231, in oxide 230 and Reduces oxygen vacancies in oxide 231 and improves the electrical properties of transistors 11 and 12. The properties and reliability can be improved. However, the method for forming the insulator 282 is spalling. This is not limited to the Taring method, but also applies to CVD, MBE, PLD, ALD, etc. You may use it as you see fit.

[0199] Furthermore, on top of the insulator 282, a conductor is superimposed on the conductor 207, at least a portion of which is superimposed on the conductor 207. A conductor 208 is provided. Here, the conductor 208 functions as wiring CL. The conductor 208 is Any conductor that can be used for conductor 209, etc. is acceptable. Note that conductor 208 is Alternatively, it may be formed to be embedded in an opening provided in an insulator.

[0200] The insulator 283 is provided covering the insulator 282 and the conductor 208. This is a barrier insulation that suppresses the diffusion of impurities such as water and hydrogen into the insulator 280 from above. It functions as a film. The insulator 283 is silicon nitride or silicon nitride oxide, etc. It is preferable to use a nitride containing silicon. For example, sputtering as insulator 283. Silicon nitride deposited by the ring method can be used. Insulator 283 is deposited by sputtering. By forming a film, it is possible to create a silicon nitride film that has high density and is less prone to the formation of pores. Yes, it is possible. Also, as insulator 283, on silicon nitride film deposited by sputtering. Furthermore, silicon nitride films deposited by CVD may be laminated.

[0201] <Component materials for semiconductor devices> The following describes the constituent materials that can be used in semiconductor devices.

[0202] The following methods for forming insulators, conductors, and oxides include sputtering, CVD, and M This can be done using methods such as the BE method, PLD method, and ALD method.

[0203] Furthermore, the CVD method is a type of plasma CVD (PECVD) that utilizes plasma. Enhanced CVD (Enhanced CVD), Thermal CVD (TCVD: Thermal CCVD) which utilizes heat. It can be classified into methods such as the VD method and the photoCVD method which utilizes light. Depending on the source gas used, the process can be metal CVD (MCVD) or organometallic CVD. It can be divided into (MOCVD: Metal Organic CVD) methods.

[0204] Furthermore, in the ALD method, the reaction between the precursor and reactant is carried out using only thermal energy. Thermal ALD (Thermal Altode Discharge) method, using plasma-excited reactants. Methods such as EALD (Plasma Enhanced Alopecia) can be used.

[0205] <<Substrate>> For example, an insulating substrate can be used as the substrate on which transistors 11 and 12 are formed. A plate, semiconductor substrate, or conductive substrate may be used. Examples of insulating substrates include glass. Sapphire substrate, quartz substrate, sapphire substrate, stabilized zirconia substrate (yttria stabilized zirconia Examples include aluminum substrates, resin substrates, etc. Semiconductor substrates include, for example, silicon, gelatin. Semiconductor substrates made of luminium, or silicon carbide, silicon germanium, arsenic Compound semiconductor substrates consisting of gallium, indium phosphide, zinc oxide, and gallium oxide, etc. There are also semiconductor substrates having insulating regions within the aforementioned semiconductor substrate, for example, SO Examples include I (Silicon On Insulator) substrates. These include graphite substrates, metal substrates, alloy substrates, conductive resin substrates, etc. Alternatively, metal nitrides can be used. These include substrates containing metal oxides, and furthermore, conductive materials on insulating substrates. This refers to a substrate on which a semiconductor is provided, a substrate on which a conductor or insulator is provided on a semiconductor substrate, and a conductor. Some substrates have semiconductors or insulators attached to them. Or, some of these substrates have elements attached to them. You may use the provided elements. The elements provided on the substrate include capacitive elements, resistive elements, Examples include switching elements, light-emitting elements, and memory elements.

[0206] <<Insulator>> Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, and metal oxides. Examples include metal oxides, metal nitrides, and metal nitride oxides.

[0207] For example, as transistors become smaller and more integrated, the gate insulator can be made thinner. This can lead to problems such as leakage current. By using high-k materials, the physical film thickness is maintained while lowering the voltage during transistor operation. This becomes possible. On the other hand, for the insulator that functions as an interlayer film, a material with a low dielectric constant is used. This reduces parasitic capacitance between wires. Therefore, it is possible to reduce the parasitic capacitance that occurs between wires. Then, you should select the materials.

[0208] Furthermore, insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum, and hafnium, aluminum and hafnium Oxidized nitrides, silicon and hafnium oxides, silicon and hafnium Examples include oxide nitrides containing um, or nitrides containing silicon and hafnium.

[0209] Furthermore, examples of insulators with low dielectric constant include silicon oxide, silicon oxide nitride, and silicon nitride oxide. Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, Silicon oxide with added carbon and nitrogen, porous silicon oxide, or resins, etc. be.

[0210] Furthermore, transistors using metal oxides suppress the permeation of impurities such as hydrogen and oxygen. By surrounding it with an insulator that has the function of stabilizing the electrical characteristics of the transistor. This is possible. As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, Phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum An insulator containing fluorine, neodymium, hafnium, or tantalum is used in a single layer or in a multilayer structure. That's all that's needed. Specifically, an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. As a body, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, acid Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, acid Metal oxides such as tantalum oxide, aluminum nitride, silicon nitride, silicon nitride, etc. Metal nitrides can be used.

[0211] Furthermore, the insulator that functions as a gate insulator has regions containing oxygen that is released by heating. It is preferable that the insulator has a region containing oxygen that is desorbed by heating. By creating a structure in which silicon oxide or silicon oxide nitride is in contact with oxide 230, This can compensate for the oxygen deficiency present in 230.

[0212] <<Conductive material>> Examples of conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and crystalline silver. Tun, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Zium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metallic element selected from um, lanthanum, etc., or an alloy containing the aforementioned metallic elements. It is preferable to use an alloy or the like that which combines the above-mentioned metal elements. For example, tantalum nitride Titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use oxides containing lanthanum and nickel. Tantalum, titanium nitride, titanium and aluminum nitrides, tantalum and aluminum Includes nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium oxides Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation, or that absorb oxygen. It is preferable because it is a material that maintains conductivity even when subjected to certain conditions. Furthermore, it does not contain impurity elements such as phosphorus. Highly electrically conductive semiconductors such as polycrystalline silicon and nickel silicides. Silicide may also be used.

[0213] Furthermore, multiple conductive layers formed from the above materials may be stacked and used. For example, as described above. A laminated structure may be formed by combining a material containing a metallic element with a conductive material containing oxygen. Furthermore, a laminate combining the aforementioned metal element-containing material and a nitrogen-containing conductive material is also used. It may also be used as a structure. Furthermore, a material containing the aforementioned metal element, a conductive material containing oxygen, and nitrogen A laminated structure combining conductive materials containing elements may also be used.

[0214] Furthermore, when an oxide is used in the channel formation region of a transistor, the gate electrode and A conductor that functions as such includes a material containing the aforementioned metal element and a conductive material containing oxygen. It is preferable to use a combined laminated structure. In this case, an oxygen-containing conductive material is used. It is preferable to place it on the channel formation region side. A conductive material containing oxygen should be placed on the channel formation region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel-forming region.

[0215] In particular, as a conductor that functions as a gate electrode, it is included in the metal oxide in which the channel is formed. It is preferable to use a conductive material containing metallic elements and oxygen. Conductive materials containing group elements and nitrogen may be used. For example, titanium nitride, tantalum nitride Conductive materials containing nitrogen, such as indium tin oxide and tungsten oxide, may also be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium dioxide, indium tin oxide containing titanium dioxide, indium zinc oxide Indium tin oxide with added silicon may also be used. Moogarium zinc oxide may also be used. Using such a material allows for channel formation. In some cases, hydrogen contained in the metal oxide can be captured. Alternatively, the outer atmosphere In some cases, it may be possible to capture hydrogen that has been introduced from surrounding materials.

[0216] <<Metal Oxides>> As oxide 230, a metal oxide (oxide semiconductor) that functions as a semiconductor is used. This is preferable. Below, metal oxides applicable to the oxide 230 according to the present invention will be described. do.

[0217] The metal oxide preferably contains at least indium or zinc. In particular, indium Preferably, it contains aluminum and zinc. In addition, aluminum and gallium It is preferable that it contains yttrium, tin, etc. Also, boron, titanium, iron, nitrile Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Ha One of the following materials is selected from tungsten, tantalum, magnesium, cobalt, etc. It may include multiple species.

[0218] Here, the metal oxide is In-M-Zn oxide, which has indium, element M, and zinc. Let's consider the case where it is a substance. Note that element M is aluminum, gallium, yttrium, and One or more elements selected from among tin. Other elements applicable to element M include: Boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt These are some examples. However, in some cases, it is acceptable to combine multiple of the aforementioned elements as element M. ru.

[0219] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). They are sometimes collectively referred to as metal oxynitrides (metal oxides). Also, metal oxides containing nitrogen are sometimes called metal oxynitrides (metal oxides). It may also be called tal oxynitride.

[0220] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 5A. Figure 5A shows an oxide semiconductor, typically IGZO (containing metal acids such as In, Ga, and Zn). This is a diagram illustrating the classification of the crystal structures of ionized compounds.

[0221] As shown in Figure 5A, oxide semiconductors can be broadly classified into "Amorphous" It is divided into "Crystalline (crystalline)" and "Crystal (crystal)". They are classified as such. Also, among "Amorphous," there are completely amorp It includes hous. Also, within "Crystalline" there is CAAC(c-ax is-aligned crystalline), nc(nanocrystalli ne), and CAC (cloud-aligned composite) are included. excluding single crystal and poly crystal l). Note that the classification of "Crystalline" includes single crystal, Polycrystalline and completely amorphous materials are excluded. Furthermore, within "Crystal," there are single crystals and poly crystals. It contains crystal.

[0222] The structures within the thick border shown in Figure 5A are "Amorphous" and "Cry It is an intermediate state between "stal (crystal)" and a new boundary region (New crystal This structure belongs to the line phase. In other words, this structure is energetically in It is completely different from the stable "Amorphous" or "Crystal" forms. This can be rephrased as a structure.

[0223] The crystal structure of the film or substrate can be determined by X-ray diffraction (XRD). It can be evaluated using the ion spectrum. Here, "Crystalline GIXD (Grazing-Incidence) of CAAC-IGZO film, which is classified as " The XRD spectrum obtained by the XRD measurement is shown in Figure 5B. Note that the GIXD method is used for thin films. This method is also called the Seemann-Bohlin method. Hereafter, the GIXD measurement shown in Figure 5B will be used. The resulting XRD spectrum will simply be referred to as the XRD spectrum. Note that the CAA shown in Figure 5B The composition of the C-IGZO film is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 5B is 500 nm.

[0224] In Figure 5B, the horizontal axis is 2θ [deg.] and the vertical axis is intensity [a .u.] As shown in Figure 5B, the XRD spectrum of the CAAC-IGZO film is A peak indicating clear crystallinity is detected. Specifically, the XRD of the CAAC-IGZO film... In the vector, a peak indicating c-axis orientation is detected near 2θ = 31°. (See Figure 5B) As shown, the peak near 2θ=31° is located on the left and right sides of the axis where the peak intensity was detected. It is symmetrical.

[0225] Furthermore, the crystal structure of the film or substrate is determined by nano-beam diffraction (NBED). Diffraction patterns observed by electron diffraction (extremely small) It can be evaluated by (also called electron diffraction pattern). The folding pattern is shown in Figure 5C. Figure 5C shows an NBED with an electron beam incident parallel to the substrate. This is the diffraction pattern observed by the CAAC-IGZO film shown in Figure 5C. The composition is approximately In:Ga:Zn=4:2:3 [atomic ratio]. Furthermore, micro-electron diffraction... Next, electron diffraction is performed with a probe diameter of 1 nm.

[0226] As shown in Figure 5C, the diffraction pattern of the CAAC-IGZO film shows multiple c-axis orientations. Spots of this nature can be observed.

[0227] <<Oxide semiconductor structure>> Note that oxide semiconductors may be classified differently from those shown in Figure 5A when considering their crystal structure. Yes, there are. For example, oxide semiconductors include single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It can be divided into two parts. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS. And there is nc-OS. In addition, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors and pseudo-non-crystalline oxide semiconductors. crystalline oxide semiconductor (a-like OS: amorphous-like oxide) This includes semiconductors, amorphous oxide semiconductors, and so on.

[0228] Here, we will provide details on the CAAC-OS, nc-OS, and a-like OS mentioned above. Then, I will give an explanation.

[0229] [CAAC-OS] CAAC-OS has multiple crystalline regions, and these multiple crystalline regions have their c-axis oriented in a specific direction. It is an oriented oxide semiconductor. The specific direction refers to the thickness direction of the CAAC-OS film. , in the direction normal to the surface on which the CAAC-OS film is formed, or in the direction normal to the surface of the CAAC-OS film Yes, there is. Furthermore, a crystalline region is a region in which the atomic arrangement has periodicity. Note that the atomic arrangement is categorized If considered as a child arrangement, a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC- OS has a region in which multiple crystal regions are connected in the ab-plane direction, and this region is strained It may have strain. Note that strain refers to the lattice arrangement in a region where multiple crystal regions are connected. The orientation of the grid arrangement changes between a region with aligned grids and another region with aligned grids. This refers to the location. In other words, CAAC-OS is c-axis oriented and has a clear orientation in the ab-plane direction. It is an oxide semiconductor that does not exist.

[0230] Each of the above multiple crystalline regions is composed of one or more minute crystals (with a maximum diameter of 10 It is composed of crystals smaller than nm. Furthermore, the maximum diameter of the crystalline region is less than 10 nm. If this occurs, the size of the crystalline region may be around several tens of nanometers.

[0231] Also, In-M-Zn oxide (element M is aluminum, gallium, yttrium, sulfite) In one or more types selected from materials such as titanium, CAAC-OS is an indicator. A layer containing um (In) and oxygen (hereinafter referred to as the In layer), and an element M, zinc (Zn), and acid A layered crystalline structure (also called a layered structure) is formed by stacking layers containing an element (hereinafter referred to as (M,Zn) layer). It tends to have (u). Furthermore, indium and element M are mutually substitutable. Therefore The (M,Zn) layer may contain indium. Also, the In layer contains element M. This may occur. Furthermore, the In layer may also contain Zn. This layered structure is, for example, In high-resolution TEM images, it is observed as a grid pattern.

[0232] For example, when structural analysis of a CAAC-OS film is performed using an XRD device, the θ / 2θ scale is obtained. Out-of-plane XRD measurements using the CANR showed two peaks indicating c-axis orientation. It is detected at θ=31° or nearby. Note that the position of the peak indicating c-axis orientation (value of 2θ) ) may vary depending on the type and composition of the metal elements that make up CAAC-OS.

[0233] Furthermore, for example, in the electron diffraction pattern of a CAAC-OS film, multiple bright spots (spots) (T) is observed. Note that one spot and another spot are separated by the incident electron beam that has passed through the sample. With the spot (also called the direct spot) as the center of symmetry, observations are made at point-symmetric positions. It can be done.

[0234] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is a hexagonal lattice. While this is the basic principle, the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. Also, The above distortion may have a grid arrangement such as a pentagon or heptagon. -In OS, clear grain boundaries were confirmed even near the strain. This is not possible. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This indicates that CAAC-OS has a dense arrangement of oxygen atoms in the ab-plane direction. This is because, for example, the substitution of metal atoms changes the bond distance between atoms. This is thought to be because it allows for distortion to be tolerated.

[0235] Furthermore, a crystal structure in which clear grain boundaries can be observed is known as a polycrystalline structure. It is called al(al). The grain boundaries become recombination centers, trapping carriers and forming transistors. This is likely to cause a decrease in on-current and a decrease in field-effect mobility. CAAC-OS, which lacks visible grain boundaries, has a crystal structure suitable for the semiconductor layer of transistors. It is one of the crystalline oxides that possesses Zn. Furthermore, CAAC-OS requires the presence of Zn. A configuration in which In-Zn oxide and In-Ga-Zn oxide are made of In acid It is preferable because it can suppress the generation of grain boundaries more effectively than oxidized materials.

[0236] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less prone to a decrease in electron mobility caused by grain boundaries. Furthermore, the crystallinity of oxide semiconductors can decrease due to impurities and the formation of defects. Because of this, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies) It can also be said that oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. C-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors expands the degree of freedom in the manufacturing process. It becomes possible to increase the risk.

[0237] [nc-OS] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. In other words, nc-OS is micro It has small crystals. The size of these minute crystals is, for example, between 1 nm and 10 nm. In particular, because they are between 1 nm and 3 nm in size, these minute crystals are also called nanocrystals. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, the entire film... No orientation is observed. Therefore, nc-OS is a-like depending on the analytical method. It can sometimes be indistinguishable from OS or amorphous oxide semiconductors. For example, compared to nc-OS films When performing structural analysis using an XRD device, out-of-pl using θ / 2θ scans is obtained. In ane XRD measurements, no peak indicating crystallinity was detected. Furthermore, for nc-OS films... Furthermore, electron beam blasts using electron beams with probe diameters larger than those of nanocrystals (e.g., 50 nm or more) When diffraction (also called limited-field electron diffraction) is performed, a diffraction pattern similar to a halo pattern is obtained. Observed. On the other hand, compared to the nc-OS film, the size is close to or smaller than that of nanocrystals. Electron diffraction (nanobeam) using electron beams with probe diameters (e.g., 1 nm to 30 nm). Also called electron diffraction, when this is performed, a ring-shaped region centered on the direct spot appears. In some cases, electron diffraction patterns with multiple spots observed may be obtained.

[0238] [a-like OS] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor. an a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, it has a-like properties. OS has a higher hydrogen concentration in the membrane compared to nc-OS and CAAC-OS.

[0239] <<Oxide Semiconductor Composition>> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS is a material composition. Regarding achievement.

[0240] [CAC-OS] CAC-OS refers to, for example, metal oxides in which the elements constituting the metal oxide are between 0.5 nm and 10 nm. Below, preferably, a structure of material that is unevenly distributed with a size of 1 nm to 3 nm or near that size. It is formed. Furthermore, in the following, in metal oxides, one or more metal elements are unevenly distributed. The region containing the metal element is 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A mixture of particles smaller than or near a m in size is also called a mosaic or patchy appearance. .

[0241] Furthermore, CAC-OS is a material that separates into a first region and a second region. This results in a zigzag-like structure, where the first region is distributed within the film (hereinafter also referred to as a cloud-like structure). ) In other words, CAC-OS is a mixture of the first region and the second region. It is a composite metal oxide having the following composition.

[0242] Here, I for the metal elements constituting CAC-OS in In-Ga-Zn oxide The atomic ratios of n, Ga, and Zn are given as [In], [Ga], and [Zn] respectively. To be expressed. For example, in CAC-OS in In-Ga-Zn oxide, the first region This is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. That is. Or, for example, in the first region, [In] is greater than [In] in the second region. It is also a region where the [Ga] is large, and the [Ga] is smaller than the [Ga] in the second region. Furthermore, in the second region, [Ga] is greater than [Ga] in the first region, and [I n] is a region where n is smaller than [In] in the first region.

[0243] Specifically, the first region mentioned above mainly consists of indium oxide, indium zinc oxide, etc. This is a region of minutes. Furthermore, the second region mentioned above is gallium oxide, gallium zinc oxide, etc. This is the region in which In is the main component. In other words, the first region described above can be said to be the region in which In is the main component. It can be replaced. Furthermore, the second region described above can be rephrased as the region with Ga as the main component. It is possible.

[0244] Note that a clear boundary may not be observed between the first region and the second region described above. .

[0245] For example, in CAC-OS in In-Ga-Zn oxide, the energy-dispersive X-ray segment Optical method (EDX:Energy Dispersive X-ray spectrosc) EDX mapping obtained using opy revealed the region with In as its main component (the first region) It has a structure in which a region (the second region) and a region mainly composed of Ga are unevenly distributed and mixed. This can be confirmed.

[0246] When CAC-OS is used in a transistor, the conductivity is due to the first region and the second region The insulating properties due to the region work complementarily to enable the switching function (On The function to turn off CAC-OS can be added to it. In other words, CAC-OS and The material has both conductive and insulating properties in parts, and the entire material Then it has the function of a semiconductor. By separating the conductive function and the insulating function, This allows for the maximum enhancement of both functions. Therefore, CAC-OS is used in transistors. This results in a high on-current (I on ), high field-effect mobility (μ), and good switching This enables smooth operation.

[0247] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and C It may have two or more of the following: AC-OS, nc-OS, and CAAC-OS.

[0248] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0249] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility is obtained. This can be achieved. Furthermore, highly reliable transistors can be realized.

[0250] A low-carrier-concentration oxide semiconductor is used in the channel formation region of the transistor. This is preferable. For example, the carrier concentration in the channel formation region of the oxide semiconductor is 1 × 10⁻⁶. 18 cm -3 The following is preferable: 1 × 10 17 cm -3 It is preferable to be less than , 1 x 10 16 cm -3 It is even more preferable that it be less than 1 × 10 13 cm -3 less than It is even more preferable that it be 1 × 10 12 cm -3 It is even more preferable that it be less than [a certain value]. Furthermore, when the carrier concentration of the oxide semiconductor film is reduced, the ions in the oxide semiconductor film The solution is to lower the concentration of pure substances and reduce the defect level density. In this specification, the impurity concentration is A low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic. Oxide semiconductors with low nitrile concentration are called high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. There are cases where this happens.

[0251] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a low defect level density. Therefore, the trap level density may also be low.

[0252] Furthermore, the time required for charges trapped in the trap levels of an oxide semiconductor to disappear is... It can behave for a long time, almost like a fixed charge. Therefore, the trap level density is high. Transistors in which a channel formation region is formed in an oxide semiconductor have unstable electrical properties. There are cases where this occurs.

[0253] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is Reducing it is effective. Furthermore, in order to reduce the impurity concentration in oxide semiconductors, It is also preferable to reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen, nitrogen, and Examples include potassium metals, alkaline earth metals, iron, nickel, and silicon.

[0254] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0255] In oxide semiconductors, if silicon or carbon, which are among the Group 14 elements, are present, oxidation occurs. Defect levels are formed in material semiconductors. Therefore, in the channel formation region of oxide semiconductors... The concentration of silicon and carbon in the oxide semiconductor and the silicon near the interface with the channel formation region The concentration of ions and carbon (Secondary Ion Mass Spectrometry (SIMS)) The concentration obtained by ss Spectrometry is 2 × 10 18 atom / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0256] Furthermore, if alkali metals or alkaline earth metals are present in the oxide semiconductor, defect levels are formed. This can result in the generation of carriers. Therefore, alkali metals or alkaline earth metals may be present. Transistors using oxide semiconductors tend to exhibit normally-on characteristics. Therefore, alkali metals or a in the channel formation region of oxide semiconductors obtained by SIMS The concentration of rutile earth metals is 1 × 10⁻⁶ 18 atoms / cm 3 The following is preferably 2 × 10 1 6 atoms / cm 3 Do the following:

[0257] Furthermore, in oxide semiconductors, when nitrogen is present, electrons, which are carriers, are generated. As the nitrogen concentration increases, it becomes easier to convert to n-type semiconductors. As a result, oxide semiconductors containing nitrogen become semiconductors. The transistor used tends to exhibit normally-on characteristics. Alternatively, oxide semiconductors Furthermore, when nitrogen is present, trap levels may be formed. As a result, transistor The electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration in the channel formation region is 5 × 10 19 atoms / cm 3 Less than, preferably 5 x 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 Do the following:

[0258] Furthermore, the hydrogen contained in oxide semiconductors reacts with the oxygen bonded to the metal atoms to form water. Therefore, an oxygen deficiency may form. When hydrogen enters this oxygen deficiency, the carrier electrons In some cases, a child may be produced. Also, some of the hydrogen combines with the metal atom and oxygen, resulting in a crystal. It can generate electrons that act as carriers. Therefore, an oxide semiconductor containing hydrogen is used. Transistors that have been modified tend to exhibit normally-on characteristics. For this reason, the channels of oxide semiconductors It is preferable that the amount of hydrogen in the hydrogen-forming region be reduced as much as possible. Specifically, In the channel formation region of an oxide semiconductor, the hydrogen concentration obtained by SIMS is 1 × 1 0 20 atoms / cm 3 Less than 5 × 10 19 atoms / cm 3 Less than, Preferably 1 × 10 19 atoms / cm 3 Less than 5 × 10 18 ato ms / cm 3 Less than 1 × 10 18 atoms / cm 3 Make it less than.

[0259] Using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor. This allows for the provision of stable electrical characteristics.

[0260] <<Other Semiconductor Materials>> The semiconductor materials that can be used for oxide 230 are not limited to the metal oxides mentioned above. As monster 230, semiconductor materials with a band gap (not zero-gap semiconductors) Conductive materials may be used. For example, semiconductors of elemental silicon, gallium arsenide, etc. Which compound semiconductors, layered materials that function as semiconductors (also known as atomic layer materials, two-dimensional materials, etc.) It is preferable to use materials such as (u) as semiconductor materials. In particular, layered materials that function as semiconductors It is preferable to use this as a semiconductor material.

[0261] Here, in this specification, etc., "layered material" is a general term for a group of materials having a layered crystalline structure. Yes, it exists. Layered crystal structures are formed by layers created by covalent or ionic bonds, such as van der Wa. It is a structure in which layers are attached via weaker bonds than covalent or ionic bonds, such as the Ruhls force. Layered materials have high electrical conductivity within a single layer, meaning they have high two-dimensional electrical conductivity. A material that functions as a semiconductor and has high two-dimensional electrical conductivity is used in the channel formation region. This makes it possible to provide transistors with a large on-current.

[0262] Examples of layered materials include graphene, silicene, and chalcogenides. It is a compound containing chalcogens. Furthermore, chalcogens are a general term for elements belonging to Group 16. It contains oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .

[0263] For example, a transition metal chalcogenide that functions as a semiconductor can be used as oxide 230. Preferably, a transition metal chalcogenide applicable as oxide 230 is specified. These include molybdenum sulfide (typically MoS2) and molybdenum selenide (typically MoS2) e2), molybdenum tellurium (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten tellurium (typically (WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically (HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (alternative) Examples include ZrSe2).

[0264] <Modified examples of semiconductor devices> In the following, using Figures 6, 7A, 7B, 8A, and 8B, we will describe one embodiment of the present invention. An example of a conductor device will be described.

[0265] Figure 6 is a top view of the memory cell 10. Figure 7A shows the same view as in Figure 6, but with the dashed lines A1-A2-A3. This is a cross-sectional view of the part indicated by A1-A2. Here, the cross-sectional view shown is of the transistor 12. This is a cross-sectional view in the direction of the channel length, and the cross-sectional view shown in A2-A3 is the channel of transistor 11. This is a cross-sectional view in the width direction. Figure 7B also shows the area indicated by the dashed line A4-A5-A6 in Figure 6. This is a cross-sectional view. Here, the cross-sectional view shown in A4-A5 shows the channel width of transistor 12. This is a cross-sectional view, and the cross-sectional view shown in A5-A6 is a cross-section of transistor 11 in the channel length direction. This is a top view. Note that in the top view of Figure 6, some elements (for example, wiring C) are omitted for clarity. The letter L is omitted.

[0266] Furthermore, in the semiconductor device shown in Figures 6, 7A, and 7B, the <Example of Semiconductor Device Configuration> is shown Structures having the same function as the structures constituting the semiconductor device described above will be denoted by the same reference numeral. For details on the components of semiconductor devices, please refer to the explanation in <Examples of Semiconductor Device Configurations>. It is possible to pour drinks.

[0267] The semiconductor device shown in Figures 6, 7A, and 7B is the same as the semiconductor devices shown in Figures 1B, 2A, 2B, 3A, and 3B. This is a modified example of the semiconductor device shown in Figure 6. The memory cell 10 shown in Figures 6, 7A, and 7B is shown in Figure The memory cell 10 shown in Figures 1B, 2A, 2B, 3A, and 3B is one of the conductors 260. The difference is that the part is exposed from the conductor 207.

[0268] Here, a portion of the conductor 260 is in contact with the insulator 282. Therefore, see Figures 6 and 7. In the memory cell 10 shown in Figure 7B, the conductors 207 and 260 are capacitive elements 1 It functions as the lower electrode of 3.

[0269] Furthermore, the region of the conductor 260 that is in contact with the insulator 282 is the channel of the transistor 11. This includes the region that overlaps with the surrounding region. In other words, in the memory cell 10 shown in Figures 6, 7A, and 7B, In the vicinity of the upper part of the channel formation region of transistor 11, insulator 282 and insulator 2 80, oxide 230c, insulator 250, and conductor 260 are in contact.

[0270] With this configuration, water is formed near the top of the channel formation region of transistor 11. A barrier insulating film can be provided against impurities such as hydrogen, so that the impurities are acid It is more effective to reduce the diffusion of oxide 230 through oxide 230c, insulator 250, etc. It can be reduced. Also, by depositing the insulator 282 by sputtering, the insulator By adding oxygen to the region closer to the channel formation region of transistor 11, This allows the oxygen contained in the insulator 280 to be removed from the oxide 230c or the insulator 250. Since it can be supplied more efficiently to oxide 230 via this, the acid in oxide 230 This reduces elemental defects and improves the electrical characteristics and reliability of transistor 11.

[0271] Furthermore, Figure 1A and others show examples where wiring BGL1 and wiring BGL2 are extended in the y direction. However, the semiconductor device according to the present invention is not limited thereto. For example, as shown in Figure 8A To achieve this, transistors 11 and 12 are configured without back gates. It is also possible to do so, for example, as shown in Figure 8B, by connecting wiring BGL1 and wiring BGL2 to x The configuration may also be one in which it extends in a directional manner.

[0272] Furthermore, as shown in Figure 1A, when reading from memory cell 10, a read potential is applied. An example of connecting the wiring CL to the upper electrode of the capacitive element 13 has been shown, but the semiconductor according to the present invention The body apparatus is not limited to this. For example, the back gate electrode of transistor 11 Alternatively, the wiring CL may be connected to it. In this case, it will be connected to the upper electrode of the capacitive element 13. For the wiring, a low power supply potential VSS should be applied. That is, the conductor 205 should be connected to the memory cell 10 When reading the data, the wiring CL provides the reading potential, and the conductor 208 is connected to the low power supply. The wiring should be such that a position VSS is assigned.

[0273] One embodiment of the present invention can provide a semiconductor device with a small footprint. According to one embodiment of the present invention, a semiconductor device capable of high integration can be provided. According to one embodiment of the present invention, a semiconductor device with a large memory capacity can be provided. According to one embodiment of the present invention, a semiconductor device with low manufacturing costs can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. Alternatively, One embodiment of the invention can provide a novel semiconductor device.

[0274] The configurations and methods described in this embodiment are similar to those described in other configurations and methods of this embodiment. Alternatively, it can be used in appropriate combination with the configurations, methods, etc., shown in other embodiments.

[0275] (Embodiment 2) In this embodiment, the structure of the semiconductor device 500 including the memory cell 10 shown in the previous embodiment Let me explain the examples.

[0276] Figure 9A shows a block diagram illustrating an example configuration of a semiconductor device 500 according to one aspect of the present invention. The semiconductor device 500 shown in Figure 9A includes a drive circuit 510 and a memory cell array 520. The memory cell array 520 has multiple memory cell strings 20, and is a NAND This is a memory cell array of type 2. The memory cell string 20 has multiple memory cells 10. In Figure 9A, the memory cell array 520 contains n memory cells (where n is an integer greater than or equal to 2). An example having strings 20[1] to 20[n] is shown. However, the present invention does not include It is not limited to this; for example, if n memory cell strings 20 are considered as one block, The memory cell array 520 may be configured to have a number of blocks.

[0277] The drive circuit 510 includes PSW541 (power switch), PSW542, and peripheral circuits. It has 515. Peripheral circuit 515 is peripheral circuit 511, control circuit 512, and It has a voltage generation circuit 528.

[0278] In the semiconductor device 500, each circuit, each signal, and each voltage may be selected or discarded as needed. This is possible. Alternatively, other circuits or other signals may be added. Signals BW, C E, GW, CLK, WAKE, ADDR, WDA, PON1, and PON2 are external inputs. These are signals, and signal RDA is an output signal to the outside. Signal CLK is a clock signal.

[0279] Furthermore, signals BW, CE, and GW are control signals. Signal CE is a chip enable signal. The signal GW is the global write enable signal, and the signal BW is the byte signal. This is the write enable signal. Signal ADDR is the address signal. Signal WDA is the write enable signal. This is the data, and signal RDA is the read data. Signals PON1 and PON2 are... These are signals for wargating control. Note that signals PON1 and PON2 are control signals. It may also be generated on path 512.

[0280] The control circuit 512 has a function to control the overall operation of the semiconductor device 500. This is a control circuit. For example, the control circuit 512 controls signals CE, GW, and B W is logically manipulated to determine the operating mode of the semiconductor device 500 (for example, write operation, read operation). The control circuit 512 determines the operation mode. Alternatively, it determines the operation mode to be performed. This generates control signals for the peripheral circuit 511.

[0281] The voltage generation circuit 528 has the function of generating a negative voltage. The signal WAKE is the same as the signal CLK. It has the function of controlling the input to the voltage generation circuit 528. For example, it controls the input to the WAKE signal at a high level. When the signal is applied, the signal CLK is input to the voltage generation circuit 528, and the voltage generation circuit 52 8 generates a negative voltage.

[0282] The peripheral circuit 511 writes and reads data to and from the memory cell 10. This is the main circuit. The peripheral circuit 511 consists of a row decoder 521, a column decoder 522, and a row driver. It has a row driver 523, a column driver 524, an input circuit 525, an output circuit 526, and a sense amplifier 527. to do.

[0283] The row decoder 521 and the column decoder 522 have the function of decoding the signal ADDR. The row decoder 521 is a circuit for specifying the row to be accessed, and the column decoder 52 2 is a circuit for specifying the column to be accessed. The row driver 523 has the function of selecting the wiring WL specified by the row decoder 5 21. The column driver 524 has functions such as writing data to the memory cell 10, reading data from the memory cell 10, and holding the read data. The input circuit 525 has the function of holding the signal WDA. The data held by the input circuit 525 is output to the column driver 524. The output data of the input circuit 525 is the data (Din) to be written to the memory cell 1 0. The data (Dout) read by the column driver 524 from the memory cell 10 is output to the output circuit 526. The output circuit 526 has the function of holding Dout. Also, the output circuit 526 has the function of outputting Dout to the outside of the semiconductor device 500. The data output from the output circuit 526 is the signal RDA.

[0284] The input circuit 525 has the function of holding the signal WDA. The data held by the input circuit 525 is output to the column driver 524. The output data of the input circuit 525 is the data (Din) to be written to the memory cell 1 0. The data (Dout) read by the column driver 524 from the memory cell 10 is output to the output circuit 526. The output circuit 526 has the function of holding Dout. Also, the output circuit 526 has the function of outputting Dout to the outside of the semiconductor device 500. The data output from the output circuit 526 is the signal RDA. 0. The data (Dout) read by the column driver 524 from the memory cell 10 is output to the output circuit 526. The output circuit 526 has the function of holding Dout. Also, the output circuit 526 has the function of outputting Dout to the outside of the semiconductor device 500. The data output from the output circuit 526 is the signal RDA. 0. The data (Dout) read by the column driver 524 from the memory cell 10 is output to the output circuit 526. The output circuit 526 has the function of holding Dout. Also, the output circuit 526 has the function of outputting Dout to the outside of the semiconductor device 500. The data output from the output circuit 526 is the signal RDA. 0. The data (Dout) read by the column driver 524 from the memory cell 10 is output to the output circuit 526. The output circuit 526 has the function of holding Dout. Also, the output circuit 526 has the function of outputting Dout to the outside of the semiconductor device 500. The data output from the output circuit 526 is the signal RDA. 0. The data (Dout) read by the column driver 524 from the memory cell 10 is output to the output circuit 526. The output circuit 526 has the function of holding Dout. Also, the output circuit 526 has the function of outputting Dout to the outside of the semiconductor device 500. The data output from the output circuit 526 is the signal RDA.

[0285] PSW541 has the function of controlling the supply of V to the peripheral circuit 515. DD to the peripheral circuit 515. PSW54 2 has the function of controlling the supply of V to the row driver 523. HM to the row driver 523. Here, the high power supply voltage of the semiconductor device 500 is V and the low power supply voltage is GND (ground potential). Also, DD V is the high power supply voltage used to set the word line to a high level, and V V is the high power supply voltage used to set the word line to a high level, and V HM is the high power supply voltage used to set the word line to a high level, and V DDRather It's expensive. The on / off state of PSW541 is controlled by signal PON1, and by signal PON2. The on / off state of PSW542 is controlled. In Figure 9A, in peripheral circuit 515, V D D The number of power domains supplied is set to 1, but it can be multiple. A power switch can be provided for each power supply domain.

[0286] The drive circuit 510 and the memory cell array 520 may be provided on the same plane. Also, see Figure 9B. As shown, the drive circuit 510 and the memory cell array 520 may be arranged in a stacked configuration. By overlapping the path 510 and the memory cell array 520, the signal propagation distance is shortened. This is possible. Furthermore, miniaturization of the semiconductor device 500 can be achieved.

[0287] Figure 10 is a circuit diagram illustrating an example of the arrangement of memory cells 10 in the memory cell array 520. This shows that the memory cell array 520 consists of n memory cell strings 2 extending in the x direction. It has 0[1] to memory cell string 20[n]. Each memory cell string 20 is m memory cells 10 (where m is an integer greater than or equal to 2) arranged in the x direction, and a transistor 1 It has 4 and transistor 15. Therefore, in the memory cell array 520, m × n memory cells 10 are arranged in an n-row, m-column matrix. Also, n tra Transistor 14[1] to transistor 14[n] and n transistors 15[1] to Transistors 15[n] and are arranged in the y direction. Note that each memory cell 1 The circuit configuration of 0 is the same as the configuration shown in Figure 1A, and the wiring connections are also the same, therefore, The description of the embodiment can be given due consideration.

[0288] In each memory cell string 20, the sources and drains of multiple transistors 11 are They are connected in series, and the sources and drains of multiple transistors 12 are also connected in series. Furthermore, at one end of each memory cell string 20, the source of the transistor 11 Either the source or the drain is electrically connected to either the source or the drain of transistor 14. In addition, at the other end of each memory cell string 20, the transistor 11 The other side of the source or drain supplies electricity to one of the sources or drains of transistor 15. It connects to the target.

[0289] In Figure 10, the memory cell 10 in the first row and first column is shown as memory cell 10[1,1], and the nth row m The memory cell 10 in the column is denoted as memory cell 10[n,m]. Also, the j row i column (j i is an integer between 1 and n (inclusive). i is an integer between 1 and m (inclusive). ) Memory cell 10 of memory cell 10 [j,i] is indicated.

[0290] Note that rows and columns extend in directions that are orthogonal to each other. In this embodiment, the x-direction is defined as "row". Although the y-direction is defined as "columns," it is also acceptable to define the x-direction as "columns" and the y-direction as "rows."

[0291] Furthermore, the memory cell array 520 has m wirings CL[1] to wirings extending in the y direction. CL[m], m wirings WL[1] to WL[m] extending in the y direction, and in the y direction m wirings BGL1[1] to BGL1[m] extending in the direction and extending in the direction of y m wirings BGL2[1] to BGL2[m] and two wirings S extending in the y direction It has EL[1] and wiring SEL[2], where wiring SEL[1] is a transistor Electrically connected to the gate of transistor 14[1] or transistor 14[n], wiring SEL [2] is electrically connected to the gates of transistors 15[1] through 15[n]. It will be done.

[0292] Furthermore, the memory cell array 520 has n wiring RBL[1] to RBL[n], n wirings SL[1] to SL[n] and n wirings WBL[1] to WBL[ n] and has. In each memory cell string 20, one end has transistor 1 Wired WBL is electrically connected to 2, and wired RBL is electrically connected to transistor 14 at one end. They are connected, and the wiring SL is electrically connected to the transistor 15 at the other end.

[0293] For example, in memory cell string 20[1], wiring RBL[1] is connected to transistor 14[ via [1], the source or drain of the transistor 11 of the memory cell 10[1,1] It is electrically connected to one side. Also, the wiring SL[1] is connected via transistor 15[1] Electrically, the source or drain of the transistor 11 of the memory cell 10[1,m] The wiring WBL[1] is connected to the transistor 12 of the memory cell 10[1,1]. It is electrically connected to either the source or the drain.

[0294] Figure 11 shows a top view of the memory cell array 520, corresponding to the circuit diagram in Figure 10. In the top view of Figure 11, some elements have been omitted for clarity. Therefore, some elements such as conductor 207 are displayed with solid lines instead of hidden lines. The structure of each memory cell 10 is as shown in Figures 1B, 2A, 2B, 3A, and 3B. This is similar to the previous embodiment, and the description of the earlier embodiment can be taken into consideration.

[0295] As shown in Figure 11, the memory cell array 520 extends in the y direction as wiring CL. m functional conductors 208[1] to 208[m] and wiring WL functioning m conductive elements 209[1] to 209[m] and m elements that function as wiring BGL1 Conductors 205[1] to 205[m] and m conductors that function as wiring BGL2 The electric body 206[1] or conductor 206[m] and the conductor 2 that functions as wiring SEL[1] It has 10[1] and a conductor 210[2] that functions as a wiring SEL[2]. The conductor 210, which functions as wiring SEL[1] and wiring SEL[2], is conductor 20 It can be formed using the same conductive material as in 9.

[0296] Furthermore, as shown in Figure 11, the memory cell array 520 extends in the x direction, and n acid Oxide 230b[1] to oxide 230b[n] and n oxides 231b[1] to oxide It has substance 231b[n] and oxide 230b and oxide 231b in each memory cell. One wire is placed on each ring 20. One end of the oxide 230b has a wiring RBL. A plug is provided that is electrically connected to the other end of oxide 230b, and wiring SL and An electrically connected plug is provided. Also, one end of oxide 231b has wiring. A plug electrically connected to the WBL is provided. Although not shown in the diagram, oxide 23 Similar to oxide 231b, oxides 230a, 231a, and 243 The oxide 245, conductor 242, and conductor 244 are also arranged to extend as appropriate.

[0297] In oxide 230b, the transistor 11 is formed in the portion that overlaps with the conductor 208. Furthermore, in the oxide 231b, the transistor 12 is formed in the portion that overlaps with the conductor 209. The transistor 14 is formed in the portion that overlaps with the conductor 210[1], and the conductor 210[ A transistor 15 is formed in the area that overlaps with [2]. Here, transistor 14 and The transistor 15 can have the same structure as the transistor 11. However, the transistor The top surface of the top gate of transistor 14 is in contact with the conductor 210[1], and the top gate of transistor 15 The upper surface of the sheet is in contact with the conductor 210[2].

[0298] Furthermore, the memory cell array 520 has a structure similar to that shown in Figures 3A and 3B, etc., on a substrate (Figure (Not shown) Insulator 212 on top, insulator 214 on top of insulator 212, and insulation on top of insulator 214 Body 216, insulator 222 on insulator 216, insulator 224 on insulator 222, insulation Insulator 275 on body 224, insulator 280 on insulator 275, and insulating on insulator 280 It has a body 282 and an insulator 283 on the insulator 282. It also has the same layer as the insulator 216. m conductors 205 and m conductors 206 are arranged on the insulator 224, and n conductors Oxide 230b and n oxides 231b, etc. are arranged on the insulator 280, and m A conductor 209 is placed, and m conductors 208 are placed on top of the insulator 282. In each memory cell 10, a transistor 11 is placed in the layer between the insulator 214 and the insulator 282. And a transistor 12 is provided, and a capacitive element 13 is provided on the insulator 280, A conductor 240 is provided to connect the radiator 11 and the transistor 12.

[0299] For example, memory cells 10[1,1] and memory cells that constitute a memory cell array 520 Cells 10[1,2] also have the structures shown in Figures 3A and 3B, respectively. However, note Transistor 11 of recell 10[1,2] and transistor of memory cell 10[1,2] Both sta 11 are formed in oxide 230b[1]. Also, memory cell 10[1 The transistor 12 of [1,2] and the transistor 12 of the memory cell 10[1,2] are both Both are formed on oxide 231b[1].

[0300] As shown in Figure 11, in the NAND type memory cell array 520, each memory cell 10 Therefore, there is no need to form contact plugs that connect to wiring WBL, wiring RBL, etc. Therefore, space is provided within the memory cell 10 to form extra contact holes. It is not necessary. Therefore, oxide 230b, oxide 231b, conductor 208 (wiring CL), The shape of the memory cell 10 is based on the rectangle enclosed by the conductor 209 (wiring WL). By designing it this way, the area occupied by the memory cell 10 can be minimized.

[0301] Here, the rays of oxide 230b, oxide 231b, conductor 208, and conductor 209 The output is determined based on parasitic capacitance between wires and minimum processing dimensions, and is as close to the minimum memory cell size as possible. It is preferable to design it so that the area is reduced. This is because the upper electrode of the capacitive element 13 The area occupied by the conductive material 208, which functions as such, in the memory cell 10, that is, the area occupied by the capacitive element 13 The maximum possible area will also be limited. Therefore, for the designed conductor 208 Therefore, it is preferable to maximize the area over which the conductor 207 is superimposed.

[0302] In the memory cell 10 described in the present embodiment etc., the conductor 20 7 that functions as the node FN is disposed so as to overlap the oxide 230b and the oxide 231b. Thereby, in the memory cell 10, the area where the conductor 208 and the conductor 207 overlap can be expanded in the y direction.

[0303] By adopting such a configuration, the capacitance of the capacitance element 13 can be increased without substantially increasing the area of the limited memory cell 10. Therefore, the occupied area of the memory cell 10 can be reduced. Thereby, high integration of the semiconductor device can be achieved, and a semiconductor device with a large storage capacity can be provided. Also, a semiconductor device with a low manufacturing cost per storage capacity can be provided.

[0304] Next, an example of the data writing operation and the data reading operation of the memory cell array 520 will be described using FIGS. 12A and 12B. Hereinafter, the operation will be described using the memory cell string 20[1] as a model when m = 4.

[0305] First, an example of writing data to the memory cell string 20[1] in periods T1 to T4 will be described using the timing chart shown in FIG. 12A. Here, FIG. 12A shows the potential V [V] of the wiring WBL[1], the potential V WBL[1] [V] of the wiring WL[4], the potential V WL[4] V] of the wiring WL[3], the potential V WL[3] [V] of the wiring WL[2], the potential V WL[2] V] of the wiring WL[1], the potential V WL[1] [V]. Note that in periods T1 to T4 , the wirings RBL[1], SL[1], CL[1] to CL[4], the wirings ​​​​​Wire BGL1[1] to wiring BGL1[4], and wiring BGL2[1] to wiring BGL2 The potential at [4] is assumed to be 0V.

[0306] During period T1, data 0 is written to memory cell 10[1,4]. Potential V WBL[1] Let V be the potential of data 0 (e.g., 0V), and the potential V WL[4] Potential V WL[1] Note When the transistor 11 of the recell 10[1,4] or memory cell 10[1,1] is turned ON Set the potential to a certain level (e.g., 4V). This will connect the wiring WBL[1] and the memory cell 10[1,4 Node FN of ] conducts, and a potential of data 0 is applied to node FN. From period T1 to period When switching to T2, the potential V WL[4] The potential at which transistor 11 turns off ( For example, set the voltage to -4V. This causes node FN of memory cell 10[1,4] to be in a floating state. This allows node FN to hold the potential corresponding to the data 0 it was given.

[0307] During period T2, data 1 is written to memory cell 10[1,3]. Potential V WBL[1] Let the potential of data 1 be (e.g., 2V), and the potential V WL[3] Potential V WL[1] Note When the transistor 11 of the recell 10[1,3] or memory cell 10[1,1] is turned ON Set the potential to a certain level (e.g., 4V). This will connect the wiring WBL[1] and the memory cell 10[1,3 Node FN of ] becomes conductive, and the potential of data 1 is applied to node FN. At this time, memory Since transistor 11 of cell 10[1,4] is in the off state, memory cell 10[ The data 0 written to [1,4] is retained. When switching from period T2 to period T3, Potential V WL[3]The voltage is set to a level (e.g., -4V) that turns off transistor 11. As a result, node FN of memory cell 10[1,3] becomes floating, and the node FN is supplied The potential corresponding to the obtained data 1 can be retained.

[0308] In the following period T3, data 0 is stored in memory cell 10[1,2] in the same manner as in period T1. Write the data, and in period T4, use the same method as in period T2 to write the data to memory cell 10[1,1]. Just write "Ta1".

[0309] Next, using the timing chart shown in Figure 12B, data is collected for periods T1 through T4. For the written memory cell string 20[1], data is stored in period T5 to period T8. Let's explain an example of reading the data. Here, Figure 12B shows the potential V of wiring CL[4]. CL[4] [V], potential V of wiring CL[3] CL[3] [V], potential V of wiring CL[2] CL[2] [V], potential V of wiring CL[1] CL[1] [V], current value I of wiring RBL[1] RBL [1] [μA] is indicated. Note that during periods T5 to T8, wiring WL[1] to The potential of wire WL[4] is -4V, the potential of wiring RBL[1] is 1.2V, wiring SL[1], wiring Wire WBL[1], wiring BGL1[1] to wiring BGL1[4], and wiring BGL2[1 The potential of the wiring BGL2[4] is set to 0V. Also, transistor 14[1] and The transistor 15[1] is set to the ON state.

[0310] During period T5, data 0 is read from memory cell 10[1,4]. Potential V CL[4] of Let the read potential be (e.g., 0V), and the potential V CL[3]Potential V CL[1] to, memory The transistor 11 of the memory cell 10[1,3] to memory cell 10[1,1] holds Regardless of the data, set the potential to turn on (e.g., 4V). This will enable the wiring RBL[1 The conductivity of the wiring SL[1] and the conductivity of the transistor 11 of the memory cell 10[1,4] This will be determined by the state. Here, the transistor 11 of the memory cell 10 is connected to the wiring CL. When a readout potential is applied, if data 0 is held, it will turn off, and data 1 If it is held, it will be in the ON state. As shown in Figure 12B, I RBL[1] is 0μA Yes, wiring RBL[1] and wiring SL[1] are in a non-conductive state, so memory cell 10[1,4 It can be read that the data 0 is stored in ].

[0311] During period T6, data 1 from memory cell 10[1,3] is read. Potential V CL[3] of Let the read potential be (e.g., 0V), and the potential V CL[4]、 Potential V CL[2] , and potential V CL[1] This refers to memory cell 10[1,4], memory cell 10[1,2] and memory cell The transistor 11 at 10[1,1] turns ON regardless of the data it holds. Set the voltage to a certain level (for example, 4V). This ensures that the continuity between wire RBL[1] and wire SL[1] is This will be determined by the conduction state of the transistor 11 of the memory cell 10[1,3]. As shown in 12B, RBL[1] The value is positive, and the wiring RBL[1] and wiring S Since L[1] is conducting, data 1 is held in memory cell 10[1,3]. It can be read.

[0312] In the following period T7, the data 0 of memory cell 10[1,2] was processed in the same way as in period T5. The data is read, and in period T8, the data of memory cell 10[1,1] is read in the same way as in period T6. Read out 'Ta1'.

[0313] As described above, data is written to and read from the memory cell string 20[1]. It is possible to output data. In the above, one memory cell string 20 We performed writing and reading operations on multiple memory cell strings in a similar manner. Twenty data entries can be written to and read simultaneously. For example, see Figure 10. If the memory cell array 520 shown is, then the memory cell string 20[1] to memory cell The data in string 20[n] can be written to and read simultaneously. .

[0314] Furthermore, the data writing operation and data reading operation of the memory cell array 520 described above The operation described is merely an example, and the present invention is not limited thereto. For example, the aforementioned embodiment As mentioned above, during the data reading operation, the conductor 205 is supplied with a reading potential. It can function as a wire CL, and the conductor 208 can also be used as wiring to which a low power supply potential VSS is applied. stomach.

[0315] Furthermore, the layout of the memory cell array 520 described above is just one example, and the present invention is not limited thereto. It is not possible to connect the wiring WBL to only one end of the memory cell string 20. Furthermore, they are also provided at the other end, that is, a wiring WBL is provided for one memory cell string 20. It is also possible to use a configuration with two connections. With this configuration, the above data can be written. In operation, data is written to the memory cell string 20 simultaneously from two directions. This allows for improved data writing speed.

[0316] Furthermore, for example, a configuration may be made in which wiring BGL1 and wiring BGL2 are not provided, or wiring The BGL1 and wiring BGL2 may be configured to extend in the x direction. The configuration includes providing a back gate and wiring BGL1 for transistors 14 and 15. That's fine.

[0317] Furthermore, although the memory cell array 520 described above is a NAND type memory cell array, the present invention This is not limited to this. For example, each memory cell 10 contains oxide 230b and acid By forming island-like patterns of the compound 231b, etc., it is possible to create a NOR-type memory cell array. stomach.

[0318] The configurations and methods described in this embodiment are similar to those described in other configurations and methods of this embodiment. Alternatively, it can be used in appropriate combination with the configurations, methods, etc., shown in other embodiments.

[0319] (Embodiment 3) This embodiment describes an application example of a storage device according to one aspect of the present invention.

[0320] Generally, various types of storage devices are used in semiconductor devices such as computers, depending on the application. Figure 13 shows various storage devices in a hierarchical structure. The higher the storage device, the faster the access. As speed is required, lower-level memory devices require larger storage capacity and higher recording density. In Figure 13, the data is stored as registers in the arithmetic processing units such as the CPU, starting from the top layer. The memory used is called SRAM (Static Random Access Memory). , DRAM (Dynamic Random Access Memory), 3D N This indicates AND memory.

[0321] Memory embedded as registers in processing units such as CPUs is used for temporary storage of calculation results. Because it is used in such applications, it is frequently accessed by the processing unit. Therefore, rather than memory capacity... Fast operating speed is required. Also, registers hold configuration information for the arithmetic processing unit. It also has functions.

[0322] SRAM is used, for example, as a cache. The cache is held in main memory. It has the function of duplicating and storing some of the information it holds. Frequently used data is cached. By creating a copy, you can increase the speed of data access.

[0323] DRAM is used, for example, in main memory. Main memory reads from storage. It has the function of retaining the programs and data that are released. The recording density of DRAM is approximately 0.1~0.3Gbit / mm 2 That is the case.

[0324] 3D NAND memory is used, for example, in storage. Storage is for long-term storage. It has the function of holding necessary data and various programs used by the processing unit. Therefore, storage requires a large storage capacity and high recording density rather than just high operating speed. The recording density of storage devices used for storage is approximately 0.6 to 6.0 Gbit / m². m 2 That is the case.

[0325] A storage device according to one aspect of the present invention has a large storage capacity, a fast operating speed, and long-term data storage. Data retention is possible. A storage device according to one aspect of the present invention has a hierarchy in which the cache is located and Suitable as a storage device located in the boundary region 901 which includes both layers in which the in-memory is located. It can be used. Furthermore, in one aspect of the present invention, the storage device in which the main memory is located As a storage device located in boundary region 902 which includes both the hierarchy and the hierarchy in which the storage is located It can be used suitably.

[0326] A storage device according to one aspect of the present invention is, for example, used in various electronic devices (e.g., information terminals, computers). Computers, smartphones, e-readers, digital still cameras, video cameras, recording and playback It can be applied to storage devices (such as those used in electronic devices, navigation systems, and game consoles). Used in applications such as image sensors, IoT (Internet of Things), and healthcare. It is also possible to do so. Note that, here, "computer" refers to tablet computers and other types of computers. In addition to mobile computers and desktop computers, there are also server systems. This includes large-scale computers.

[0327] Furthermore, a storage device according to one aspect of the present invention includes a memory card (e.g., an SD card), US B Memory, SSD (Solid State Drive), and various other removable storage devices Applicable. Figures 14A to 14E schematically show several configuration examples of removable storage devices. For example, a storage device according to one aspect of the present invention is provided on a packaged memory chip. It is processed and used in various storage devices and removable memory.

[0328] Figure 14A is a schematic diagram of a USB memory device. The USB memory device 1100 consists of a casing 1101 and a key It has a cap 1102, a USB connector 1103 and a circuit board 1104. The circuit board 1104 is , housed in the casing 1101. For example, the circuit board 1104 has a memory chip 1105, Controller chip 1106 is installed. Memory chip 110 on board 1104 The semiconductor device shown in the above embodiment can be incorporated into 5, etc.

[0329] Figure 14B is a schematic diagram of the external appearance of an SD card, and Figure 14C is a schematic diagram of the internal structure of an SD card. This is a diagram of the equation. The SD card 1110 consists of a housing 1111, a connector 1112, and a circuit board 111. It has 3. The circuit board 1113 is housed in the housing 1111. For example, the circuit board 1113 has A memory chip 1114 and a controller chip 1115 are mounted on the circuit board 11. By also providing a memory chip 1114 on the back side of 13, the capacity of the SD card 1110 can be increased. It is possible to do so. Furthermore, a wireless chip with wireless communication functionality may be provided on the circuit board 1113. Yes. This allows the memory chip to be controlled wirelessly between the host device and the SD card 1110. Data can be read and written to p1114. Memory chip 1 on board 1113 The semiconductor device shown in the above embodiment can be incorporated into 114, etc.

[0330] Figure 14D is a schematic diagram of the external appearance of the SSD, and Figure 14E is a schematic diagram of the internal structure of the SSD. The SSD1150 has a housing 1151, a connector 1152, and a circuit board 1153. The circuit board 1153 is housed in the casing 1151. For example, the circuit board 1153 has memory chips. The chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is the work memory of the controller chip 1156, for example D An OSRAM chip can be used. A memory chip 1154 is also provided on the back side of the circuit board 1153. By doing so, the capacity of the SSD1150 can be increased. (Memory chip on board 1153) The semiconductor device shown in the above embodiment can be incorporated into 1154, etc.

[0331] The configurations and methods described in this embodiment are similar to those described in other configurations and methods of this embodiment. Alternatively, it can be used in appropriate combination with the configurations, methods, etc., shown in other embodiments.

[0332] (Embodiment 4) Figure 15 shows a specific example of an electronic device equipped with a semiconductor device according to one aspect of the present invention.

[0333] <Electronic Equipment and Systems> A semiconductor device according to one aspect of the present invention can be mounted on various electronic devices. Examples of devices include television equipment, desktop or notebook-type information terminals. Monitors for use, digital signage, In addition to electronic devices with relatively large screens, such as large game machines like pachinko machines, digital Cameras, digital video cameras, digital photo frames, e-book readers, mobile phones Examples include telephones, portable game consoles, personal digital assistants, and audio playback devices. A semiconductor device according to one aspect of the present invention can be applied as a component of artificial intelligence. Using the semiconductor device described herein, artificial intelligence can be incorporated into electronic devices.

[0334] An electronic device according to one aspect of the present invention may have an antenna. The antenna receives a signal. By doing so, the display unit can show images, information, etc. Also, electronic devices can If an antenna and a secondary battery are present, the antenna may be used for contactless power transmission.

[0335] An electronic device according to one aspect of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation). Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power (including functions for measuring radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation) It is acceptable to have it.

[0336] An electronic device according to one aspect of the present invention can have various functions. For example, various Functions for displaying information (still images, videos, text images, etc.) on the display unit, touch panel function, Features that display a calendar, date, or time, and various software (programs) The functions to be executed, wireless communication functions, and the ability to read programs or data recorded on a recording medium. It can have functions such as outputting.

[0337] [Information terminal] Figure 15A illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5100 has a housing 5101 and a display unit 5102, and an input interface - As a face, a touch panel is provided on the display unit 5102, and buttons are located on the housing 5101. It is provided.

[0338] The information terminal 5100 uses a semiconductor device according to one aspect of the present invention to utilize artificial intelligence. The application can be run. As an application utilizing artificial intelligence. For example, an application that recognizes a conversation and displays the content of that conversation on the display unit 5102. The display unit 5102 recognizes characters, shapes, etc., entered by the user on the touch panel. The application to be displayed on the display unit 5102, and the biometric authentication such as fingerprints and voiceprints are performed. Applications are one example.

[0339] Figure 15B shows a notebook-type information terminal 5200. Notebook-type information terminal 520 0 comprises an information terminal body 5201, a display unit 5202, and a keyboard 5203. .

[0340] Notebook-type information terminal 5200, like the information terminal 5100 described above, is in one aspect of the present invention. Using such a semiconductor device, applications utilizing artificial intelligence can be executed. Examples of applications utilizing artificial intelligence include design support software and text Examples include editing software and automatic menu generation software. Also, notebook-type information terminals... By using the 5200 chip, it is possible to develop new artificial intelligence.

[0341] In the above, smartphones and notebook computers were used as examples of electronic devices. As illustrated in Figures 15A and 15B, these are smartphones and notebook computers, respectively. Other information terminals can be used. (Smartphones and notebook computers are exceptions.) Examples of information terminals include PDAs (Personal Digital Assistants). Examples include tants, desktop information terminals, and workstations.

[0342] [Game console] Figure 15C shows a portable game console 5300, which is an example of a game console. 5300 consists of casing 5301, casing 5302, casing 5303, display unit 5304, and connection unit 53 05, it has an operation key 5306, etc. Housing 5302 and housing 5303 are housing 530 It can be removed from 1. The connection part 5305 provided on the housing 5301 can be connected to another By mounting it in a housing (not shown), the video output to the display unit 5304 can be displayed on another video device. The output can be sent to a device (not shown). At this time, housing 5302 and housing 5303 Each of these can function as a control unit. This allows multiple players to play simultaneously. The game can be played using the circuit boards of cabinets 5301, 5302, and 5303. A semiconductor device according to one aspect of the present invention can be incorporated into a chip or the like provided therein. .

[0343] Figure 15D also shows a home console, model 5400, which is an example of a game console. The 5400 home console can be connected to a controller 5402 either wirelessly or via a wired connection. Yes, they are.

[0344] One aspect of the present invention applies to game consoles such as the portable game console 5300 and the home game console 5400. By applying a GPU or chip, it is possible to create a low-power gaming console. Yes, it is possible. Furthermore, the low power consumption reduces heat generation from the circuit, thus reducing heat generation. This minimizes the impact on the circuit itself, surrounding circuits, and modules.

[0345] Furthermore, artificial intelligence is provided to the portable game console 5300 using a semiconductor device according to one aspect of the present invention. This makes it possible to realize the portable game console 5300.

[0346] Originally, the progression of the game, the behavior of creatures appearing in the game, and the phenomena that occur in the game, etc. The expression is determined by the program of the game, but the portable game console 530 By applying artificial intelligence to 0, it becomes possible to create expressions that are not limited to game programs. For example, the questions the player asks, the game's progress, the time, and the characters that appear in the game. This allows for expressions that describe a change in a person's words and actions.

[0347] Furthermore, when playing games that require multiple players on the 5300 handheld game console, artificial intelligence is used. This allows for the creation of anthropomorphic game players, thus enabling the opponent to be represented by artificial intelligence. By making it a night game, it's possible to play the game even by yourself.

[0348] Figures 15C and 15D show examples of game consoles, including a handheld game console and a home console. Although a machine is shown in the illustration, a game machine to which the semiconductor device according to one aspect of the present invention can be applied is shown below. Not limited to, for example, a game machine to which a semiconductor device according to one aspect of the present invention can be applied is Arcade game machines installed in entertainment facilities (game centers, amusement parks, etc.), sports Examples include pitching machines for batting practice that are installed in facilities.

[0349] [Large computer] A semiconductor device according to one aspect of the present invention can be applied to a large-scale computer.

[0350] Figure 15E shows the Supercomputer 5500, an example of a large-scale computer. Figure 15F shows the rack-mount type computer used by the Supercomputer 5500. This is a diagram of 5502.

[0351] The supercomputer 5500 consists of rack 5501 and multiple rack-mount computing devices. It has a machine 5502. Note that multiple computers 5502 are stored in a rack 5501. Furthermore, the computer 5502 is provided with multiple circuit boards 5504, and the present invention is located on these circuit boards. A semiconductor device according to one embodiment can be mounted.

[0352] The Supercomputer 5500 is a large computer primarily used for scientific and technical calculations. Yes. Scientific and technical computing requires high-speed processing of enormous calculations, so power consumption is high. The chip generates a lot of heat. A semiconductor according to one aspect of the present invention is used in the supercomputer 5500. By applying this device, a low-power supercomputer can be realized. Furthermore, low power consumption reduces heat generation from the circuit, thus reducing heat generation. This minimizes the impact on the circuit itself, surrounding circuits, and modules.

[0353] Figures 15E and 15F illustrate a supercomputer as an example of a large-scale computer. However, the large computers to which the semiconductor device according to one aspect of the present invention is applied are not limited to this. It will not be done. An example of a large computer to which a semiconductor device according to one aspect of the present invention is applied is For example, a computer (server) that provides services, a large general-purpose computer (mainframe) Examples include (e.g., room).

[0354] [Mobile] A semiconductor device according to one aspect of the present invention is used in a mobile vehicle and around the driver's seat of the vehicle. It can be applied to this.

[0355] Figure 15G shows the area around the windshield inside the cabin of a vehicle 5600, which is an example of a mobile vehicle. This is the diagram shown. In Figure 15G, the display panel 5601 mounted on the dashboard, In addition to display panel 5602 and display panel 5603, there is also a display panel 560 mounted on the pillar. Figure 4 is shown.

[0356] Display panels 5601 to 5603 display the speedometer, tachometer, and It provides various information by displaying mileage, fuel gauge, gear status, air conditioning settings, etc. It is possible to do so. Furthermore, the display items and layout shown on the display panel can be customized by the user. It can be modified as needed to suit your preferences, and the design can be enhanced. The panel 5601 to the display panel 5603 can also be used as a lighting device.

[0357] The display panel 5604 displays images from an imaging device (not shown) installed in the automobile. By doing so, it is possible to compensate for the blind spots (visibility obstructed by the pillars). By displaying images from an imaging device installed on the outside of the vehicle, blind spots are compensated for. Safety can be enhanced. Furthermore, by displaying images that supplement what is not visible, Safety checks can be performed more naturally and without any sense of unease. The display panel 5604 is equipped with a lighting device and It can also be used in this way.

[0358] A semiconductor device according to one aspect of the present invention can be applied as a component of artificial intelligence, for example, The chip can be used in an autonomous driving system for automobiles. It can be used in systems that provide route guidance, predict hazards, etc. Display panel 5601 to The display panel 5604 may be configured to display information such as road directions and hazard predictions.

[0359] In the above, an automobile was described as an example of a moving object, but the moving object is an automobile. It is not limited to these. For example, examples of moving objects include trains, monorails, ships, and aircraft (helicopters). Other examples include unmanned aerial vehicles (drones), airplanes, and rockets, and these can be moved A semiconductor device according to one aspect of the present invention is applied to a moving object to provide it with a system utilizing artificial intelligence. It is possible.

[0360] [electric appliances] Figure 15H shows an example of an electrical appliance, the electric refrigerator-freezer 5700. The storage unit 5700 includes a casing 5701, a door for the refrigerator compartment 5702, a door for the freezer compartment 5703, and the like.

[0361] An electric refrigerator 5700 is equipped with artificial intelligence using a semiconductor device according to one aspect of the present invention. It is possible to realize the 5700 electric refrigerator. By using artificial intelligence, The 5700 electric refrigerator-freezer stores food items, and the consumption of those food items. It has a function that automatically generates menus based on expiration dates, etc., and is stored in the 5700 electric refrigerator / freezer. It can have features such as automatically adjusting the temperature to suit the ingredients.

[0362] I explained electric refrigerators as an example of electrical appliances, but other electrical appliances include For example, vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, induction cooktops, and water heaters. Heating and cooling appliances including air conditioners, washing machines, dryers, and audio equipment. Examples include visual equipment.

[0363] The electronic device described in this embodiment, its functions, examples of artificial intelligence applications, and their effects. These can be combined as appropriate with descriptions of other electronic devices.

[0364] The configurations and methods described in this embodiment are similar to those described in other configurations and methods of this embodiment. Alternatively, it can be used in appropriate combination with the configurations, methods, etc., shown in other embodiments. [Explanation of Symbols]

[0365] BGL1: Wiring, BGL2: Wiring, CL: Wiring, RBL: Wiring, SL: Wiring, SEL: Wiring Line, T1: period, T2: period, T3: period, T4: period, T5: period, T6: period, T7 : Period, T8: Period, WBL: Wiring, WL: Wiring, 10: Memory cell, 11: Transistor Ta, 12: Transistor, 13: Capacitive element, 14: Transistor, 15: Transistor, 20: Memory cell string, 205: Conductor, 205a: Conductor, 205b: Conductor, 205c: Conductor, 206: Conductor, 206a: Conductor, 206b: Conductor, 206c: Conductor, 207: Conductor, 208: Conductor, 209: Conductor, 210: Conductor, 212: Insulator, 214: Insulator, 216: Insulator, 222: Insulator, 224: Insulator, 230: Oxide, 230a: Oxide, 230b: Oxide, 230c: Oxide, 231: Oxide, 2 31a: oxide, 231b: oxide, 231c: oxide, 232a: region, 232b: region 232c: region, 240: conductor, 241: insulator, 242: conductor, 242a: conductor Electrode, 242b: Conductor, 243: Oxide, 243a: Oxide, 243b: Oxide, 24 4: Conductor, 244a: Conductor, 244b: Conductor, 245: Oxide, 245a: Oxide 245b: oxide, 250: insulator, 251: insulator, 260: conductor, 260a: conductor Electrical body, 260b: conductor, 261: conductor, 261a: conductor, 261b: conductor, 27 5: Insulator, 280: Insulator, 282: Insulator, 283: Insulator, 500: Semiconductor equipment, 510: Drive circuit, 511: Peripheral circuit, 512: Control circuit, 515: Peripheral circuit, 520: Memory cell array, 521: Row decoder, 522: Column decoder, 523: Row driver IBA, 524: Column driver, 525: Input circuit, 526: Output circuit, 527: Sense amplifier P, 528: Voltage generation circuit, 541: PSW, 542: PSW, 901: Boundary region, 90 2: Boundary area, 1100: USB memory, 1101: Enclosure, 1102: Cap, 110 3: USB connector, 1104: circuit board, 1105: memory chip, 1106: controller Lachip, 1110: SD card, 1111: housing, 1112: connector, 1113: base Board, 1114: Memory chip, 1115: Controller chip, 1150: SSD, 11 51: Enclosure, 1152: Connector, 1153: Circuit board, 1154: Memory chip, 1155 :Memory chip, 1156:Controller chip, 5100:Information terminal, 5101:Enclosure 5102: Display unit, 5200: Notebook-type information terminal, 5201: Main unit, 5202: Display unit , 5203: Keyboard, 5300: Portable game console, 5301: Cabinet, 5302: Cabinet, 5303: Enclosure, 5304: Display unit, 5305: Connection unit, 5306: Operation keys, 5400 : game console, 5402: controller, 5500: supercomputer, 5501: Rack, 5502: Calculator, 5504: Circuit board, 5600: Automobile, 5601: Display panel , 5602: Display panel, 5603: Display panel, 5604: Display panel, 5700: Electric Refrigerator-freezer, 5701: enclosure, 5702: refrigerator door, 5703: freezer door

Claims

[Claim 1] It comprises a first transistor, a second transistor, a capacitive element, a first insulator, and a first conductor. The first transistor comprises a first oxide semiconductor, a first gate, and a first gate insulator. The second transistor comprises a second oxide semiconductor, a second gate, and a second gate insulator. The capacitive element comprises a second conductor, a third conductor, and a second insulator. The first insulator is disposed on the first oxide semiconductor and the second oxide semiconductor. The first insulator has a first opening that reaches the first oxide semiconductor, a second opening that reaches the second oxide semiconductor, and a third opening that reaches either the source or the drain of the second transistor. The first gate insulator and the first gate are placed inside the first opening. The second gate insulator and the second gate are arranged within the second opening. The first conductor is placed inside the third opening. The second conductor is positioned in contact with the upper surface of the first conductor and the upper surface of the first gate. The second insulator is placed on the second conductor and the first insulator. A semiconductor device wherein the third conductor is arranged to cover the second conductor via the second insulator.

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