Thin-film transistor manufacturing method

Abstract

To provide a method for manufacturing thin-film transistors that involves minimal thermal history, does not use gases harmful to the human body, and uses a simple process. [Solution] A method for manufacturing a thin-film transistor, comprising the steps of: forming a semiconductor layer containing a metal oxide on a substrate; irradiating the semiconductor layer with ultraviolet light in an oxygen-containing atmosphere and at a substrate temperature of 50°C or less; allowing the semiconductor layer irradiated with ultraviolet light to stand; and forming a protective layer on the semiconductor layer that has been allowed to stand.

Description

[Technical Field]

[0001] This disclosure relates to a method for manufacturing thin-film transistors. [Background technology]

[0002] Amorphous oxide semiconductors are attracting attention as materials for thin-film transistors (TFTs) used in displays due to their high field-effect mobility and mechanical flexibility. Because this material can be fabricated at relatively low temperatures, it is expected to be used in flexible devices by being directly formed on plastic substrates. In particular, it is anticipated to be applied to flexible displays as a flexible TFT. However, immediately after film deposition, even with precise control of deposition conditions, it is impossible to eliminate atomic defects within the thin film. This results in undesirable phenomena such as hysteresis and humps remaining in the electrical properties of the TFT. Conventionally, heat treatment was used to eliminate these defects and successfully obtain ideal TFT characteristics. However, since heat treatment is usually performed at temperatures above 300°C, the substrate is limited to heat-resistant glass substrates, and a challenge has been identified as the inability to fully utilize the mechanical flexibility of amorphous oxides. Therefore, a manufacturing method for TFTs with high electrical properties has been reported, which involves combining low-temperature heat treatment at 150°C with ultraviolet irradiation (Non-Patent Literature 1). Furthermore, Patent Document 1 discloses a process for converting a metal oxide precursor film prepared from a solution into a metal oxide film by irradiating it with ultraviolet light (Patent Document 1). Similarly, Patent Document 2 also discloses a TFT manufacturing process in which a semiconductor film made from a solution is irradiated with ultraviolet light (Patent Document 2).

[0003] On the other hand, Patent Document 3 discloses a TFT manufacturing process in which short-wavelength light or high-energy particles are irradiated to a desired location on an oxide semiconductor film (Patent Document 3). Furthermore, Patent Document 4 discloses a manufacturing process for TFTs in which a sputter-deposited semiconductor layer is irradiated with ultraviolet light in an ozone atmosphere.

[0004] Patent Document 5 discloses a technique in which a buffer layer is formed to completely cover an oxide semiconductor film, and then a protective layer is formed. Furthermore, Patent Document 6 provides a transistor structure in which, in addition to the source electrode and drain electrode of a normal transistor, a first shield electrode is provided in the region where the source electrode and gate electrode overlap, and a second shield electrode is provided in the region where the drain electrode and gate electrode overlap. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2015-111627 [Patent Document 2] International Publication No. 2018-074607 [Patent Document 3] Japanese Patent Publication No. 2007-073699 [Patent Document 4] Japanese Patent Publication No. 2013-041944 [Patent Document 5] Japanese Patent Publication No. 2016-063053 [Patent Document 6] Japanese Patent Publication No. 2022-150881 [Non-patent literature]

[0006] [Non-Patent Document 1] Yong-Hoon Kim, et al., Nature, volume 489, 128-132(2012) [Overview of the project] [Problems that the invention aims to solve]

[0007] In both of the above Patent Documents 1 and 2, since it is a process involving heat treatment as a premise, there remains a problem that the selection of plastic substrates for manufacturing flexible devices is restricted. In addition, in the invention described in Patent Document 3, the irradiation region is limited to the source / drain electrode region, and the purpose is to reduce the contact resistance accompanying the increase in the conductivity of the semiconductor film in the electrode region. Furthermore, in the invention described in Patent Document 4, ozone is harmful to the human body, and since corona discharge is used for its generation, the entire manufacturing apparatus becomes a complicated system.

[0008] In consideration of the above-described prior art, there has been a strong demand for the development of a manufacturing method of an unheated TFT that does not limit the type of flexible substrate in order to effectively utilize the flexibility of amorphous oxide TFTs. Furthermore, as the manufacturing method, a technique that does not use ozone and can be processed with a conventional apparatus configuration has been demanded.

[0009] In addition, in both of Patent Documents 5 and 6, since one or more additional film formations are required for the conventional transistor structure, a manufacturing method of a stable thin film transistor without structural changes and with little heat history has been demanded.

[0010] This disclosure is made in view of the above circumstances. The problem to be solved by the embodiments of this disclosure is to provide a manufacturing method of a thin film transistor that has little heat history, does not use a gas harmful to the human body, and has a simple process.

Means for Solving the Problem

[0011] Specific means for solving the above problem include the following aspects. <1> A method for manufacturing a thin film transistor, including a step of forming a semiconductor layer containing a metal oxide on a substrate, a step of irradiating the semiconductor layer with ultraviolet light in an atmosphere containing oxygen and at a substrate temperature of 50°C or lower, a step of allowing the semiconductor layer irradiated with ultraviolet light to stand, and a step of forming a protective layer on the semiconductor layer that has been allowed to stand. <2> The manufacturing method of the thin film transistor according to <1>, wherein the standing time in the standing step is 60 seconds to 6 hours. <3> The manufacturing method of the thin film transistor according to <1> or <2>, wherein the standing temperature in the standing step is 50°C or lower. <4> The manufacturing method of the thin film transistor according to any one of <1> to <3>, wherein in the irradiating step, the ultraviolet irradiation is performed in an air atmosphere. <5> The manufacturing method of the thin film transistor according to any one of <1> to <4>, wherein the substrate is a plastic substrate.

Effects of the Invention

[0012] According to the present disclosure, there is provided a manufacturing method of a thin film transistor, which has less thermal history, does not use gases harmful to the human body, and has a simple process.

Brief Description of the Drawings

[0013] [Figure 1] It is a schematic cross-sectional view of a TFT with a back gate structure. [Figure 2] It is a schematic cross-sectional view of a TFT with a top gate structure. [Figure 3] It is a schematic cross-sectional view of a TFT with a bottom gate structure. [Figure 4] It is a graph showing the transfer characteristics of the TFT fabricated in Example 1. [Figure 5] It is a graph showing the transfer characteristics of the TFT fabricated in Comparative Example 1. [Figure 6] It is a graph showing the transfer characteristics of the TFT fabricated in Comparative Example 2. [Figure 7] It is a graph showing the transfer characteristics of the TFT fabricated in Comparative Example 3. [Figure 8] It is a graph showing the negative gate voltage induced instability test of the TFT fabricated in Example 2. [Figure 9] It is a graph showing the negative gate voltage induced instability test of the TFT fabricated in Comparative Example 5. <{

Embodiments for Carrying Out the Invention

[0014] The present disclosure will be described in detail below with reference to embodiments. In this disclosure, a numerical range represented by "~" means a range that includes the numbers written before and after "~" as the lower and upper limits, respectively. In the numerical ranges described in this disclosure, the upper or lower limits of the numerical range may be replaced with the values ​​shown in the examples. In this disclosure, if there are multiple substances corresponding to each component, the content of each component refers to the total amount of those multiple substances unless otherwise specified. In this disclosure, the term "process" includes not only independent processes but also any process that cannot be clearly distinguished from other processes, as long as its intended purpose is achieved.

[0015] (Manufacturing method for thin-film transistors) A method for manufacturing a thin-film transistor according to this disclosure includes the steps of: forming a semiconductor layer containing a metal oxide on a substrate; irradiating the semiconductor layer with ultraviolet light in an oxygen-containing atmosphere and at a substrate temperature of 50°C or less; allowing the semiconductor layer irradiated with ultraviolet light to stand; and forming a protective layer on the semiconductor layer that has been allowed to stand.

[0016] The method for manufacturing a thin-film transistor according to this disclosure includes the steps of irradiating a semiconductor layer with ultraviolet light, allowing the irradiated semiconductor layer to stand, and forming a protective layer on the standing semiconductor layer, thereby enabling the production of a thin-film transistor in a simple process without heating or using gases harmful to the human body. Furthermore, because the thin-film transistor manufacturing method according to this disclosure has a low thermal history, heat-sensitive plastic substrates and the like can be suitably used as the substrate.

[0017] <Semiconductor layer formation process> The method for manufacturing a thin-film transistor according to this disclosure includes a step of forming a semiconductor layer containing a metal oxide on a substrate (also referred to as the "semiconductor layer formation step"). Semiconductor layers containing metal oxides can include, for example, those primarily composed of indium oxide such as indium oxide, indium tin oxide (ITO), boron-doped indium oxide (IBO), InGaZnO, InZnO, InGaO, InSnZnO, and InSiO; those primarily composed of zinc oxide such as ZnO, AlZnO, and BZnO; those primarily composed of tin oxide such as tin oxide and fluorine-doped tin oxide (FTO); and those primarily composed of titanium oxide. In particular, from the viewpoint of electrical properties, it is preferable that the main component is indium oxide (i.e., that it contains 50% by mass or more of components other than oxygen atoms), and it is especially preferable that it is boron-doped indium oxide (IBO). Furthermore, it is preferable that the semiconductor layer is a semiconductor layer made of a metal oxide.

[0018] There are no particular restrictions on the thickness and shape of the semiconductor layer, and they can be appropriately selected depending on the structure of the TFT to be fabricated.

[0019] Furthermore, as a method for forming the semiconductor layer, thin films fabricated using vacuum equipment, such as conventional sputtering and vacuum deposition, as well as thin films formed by solution processes such as inkjet, spin coating, and spray coating, and thin films fabricated by atomic layer deposition can be used. In the example, an indium oxide thin film fabricated by sputtering was used, but the fabrication conditions are not limited to this.

[0020] The substrates used in this disclosure can be Si, as well as inorganic substrates such as glass, quartz, sapphire, and yttrium-stabilized zirconia, metal foils such as aluminum, copper, and stainless steel, resin substrates, and composite materials thereof. Among these, plastic substrates are preferred from the viewpoint of lightness and flexibility. As plastic substrates, acrylic resin, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyethersulfone, triacetylcellulose, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer resin, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluororesin, cyclic polyolefin resin, etc. can be used, but are not limited to these. These can be used individually or as composite substrates with two or more types laminated together. In addition, substrates having a resin layer such as a color filter on a glass or plastic substrate can also be used. Furthermore, the substrate may have an insulating layer as needed. Known materials can be used as the insulating layer.

[0021] Furthermore, the method for manufacturing a thin-film transistor according to this disclosure may include a step of cleaning the substrate. The method for cleaning the substrate is not limited to organic cleaning using acetone and isopropanol; it is also possible to use dry cleaning methods using plasma or wet processes such as RCA cleaning.

[0022] <Irradiation process> The method for manufacturing a thin-film transistor according to this disclosure includes a step of irradiating the semiconductor layer with ultraviolet light in an oxygen-containing atmosphere and at a substrate temperature of 50°C or less (also referred to as the "irradiation step"). The atmosphere in the irradiation process may be any atmosphere containing 25% or more by volume of oxygen, but from the viewpoint of simplicity, electrical properties, and improving the oxidation rate of pores, it is preferable that it contains 1% or more by volume and less than 25% by volume of oxygen, more preferably an air atmosphere, and particularly preferably a dry air atmosphere. There are no particular restrictions on the gas other than oxygen in the atmosphere, but it is preferable to use an inert gas such as nitrogen or argon. Furthermore, the irradiation process may be carried out under atmospheric pressure or under reduced pressure, but it is preferable to carry it out under atmospheric pressure from the viewpoint of improving the oxidation rate of the pores.

[0023] The substrate temperature in the irradiation process may be 50°C or lower, but from the viewpoint of suppressing thermal history, simplicity, and electrical characteristics, it is preferably 40°C or lower, more preferably 0°C to 40°C, and particularly preferably 10°C to 35°C.

[0024] The irradiation time of ultraviolet light in the above irradiation step is preferably 1 minute to 120 minutes, more preferably 5 minutes to 60 minutes, and particularly preferably 10 minutes to 45 minutes, from the viewpoint of electrical characteristics, especially hysteresis width.

[0025] The ultraviolet light irradiated in the above irradiation step is not particularly limited, but it is preferably one that includes a wavelength of 365 nm. Regarding the ultraviolet irradiation means, for example, in the embodiment, a Deep UV lamp with a central wavelength of 365 nm (USHIO spot UV irradiation device, SP7-250, manufactured by Ushio Inc.) was used, but it is not limited to this, and excimer lamps, deuterium lamps, low-pressure mercury lamps, high-pressure mercury lamps, ultra-high-pressure mercury lamps, metal halide lamps, helium lamps, carbon arc lamps, cadmium lamps, electrodeless discharge lamps, etc., can be used.

[0026] <Stationing process> The method for manufacturing a thin-film transistor according to this disclosure includes a step of allowing the semiconductor layer irradiated with ultraviolet light to stand (also referred to as the "standing step"). By including the standing step after the irradiation step and before the protective layer formation step described later, although the details are unclear, it is presumed that some chemical reaction, chemical change, or both occur in the semiconductor layer due to oxygen-derived chemical species, making the process simple and further improving the electrical properties.

[0027] The atmosphere in the aforementioned standing process is not particularly limited, but from the viewpoint of simplicity and electrical properties, it is preferable to have an atmosphere containing oxygen, more preferably an atmosphere containing less than 25% by volume of oxygen, even more preferably an air atmosphere, and particularly preferably a dry air atmosphere. There are no particular restrictions on the gas other than oxygen in the atmosphere, but it is preferable to use an inert gas such as nitrogen or argon. Furthermore, the aforementioned standing process may be carried out under atmospheric pressure or under reduced pressure, but from the viewpoint of simplicity, it is preferable to carry it out under atmospheric pressure.

[0028] The substrate temperature during the standing process may be 50°C or lower, but from the viewpoint of suppressing thermal history, simplicity, and electrical characteristics, it is preferably 40°C or lower, more preferably 0°C to 40°C, and particularly preferably 10°C to 35°C.

[0029] <Protective layer formation process> The method for manufacturing a thin-film transistor according to this disclosure includes a step of forming a protective layer on the standing semiconductor layer (also referred to as the "protective layer formation step"). As a protective layer, commonly known materials such as silicon oxide and silicon nitride, as well as structures combining these (including multilayer structures), or insulating films with a high dielectric constant known as High-k can be used. Furthermore, a protective layer can be made primarily from yttrium oxide, among other materials. In particular, the protective layer is preferably composed mainly of yttrium oxide (i.e., containing 50% or more by mass as a component other than oxygen atoms) from the viewpoint of electrical properties, and is especially preferably a layer made of yttrium oxide.

[0030] There are no particular restrictions on the thickness and shape of the protective layer, and they can be appropriately selected according to the structure of the TFT being manufactured.

[0031] Furthermore, as a method for forming the protective layer, in addition to thin films fabricated using vacuum equipment, such as conventional sputtering and vacuum deposition, thin films formed by solution processes such as inkjet, spin coating, and spray coating, as well as thin films fabricated by chemical vapor deposition and atomic layer deposition can be used.

[0032] <Other processes> The method for manufacturing a thin-film transistor according to this disclosure may include other steps besides those described above. Other processes include known processes, specifically, for example, the process of forming a gate electrode, a process of forming a source electrode, a process of forming a drain electrode, and a process of forming an insulating layer. The thickness and shape of the gate electrode, source electrode, drain electrode, insulating layer, and protective layer are not particularly limited and can be appropriately selected according to the structure of the TFT being fabricated.

[0033] The source and drain electrodes are not limited to Ti, but can also be made of metals such as Mo, Al, Cu, Au, Pt, Ag, and Ni, transparent conductive films such as ITO, or conductive polymers such as PEDOT:PSS (Poly(3,4-EthyleneDiOxyThiophene) / Poly(4-StyreneSulfonate)). Furthermore, the formation method is not limited to electron beam deposition; it is also possible to fabricate them using other vacuum equipment such as sputtering or vacuum deposition, or to form them using inkjet methods with solutions or gel-like metallic liquids.

[0034] The structure of the thin-film transistor (TFT) in this disclosure is not limited to a back-gate structure with a Si substrate as the gate electrode, but can also be a top-gate structure or a bottom-gate structure, which are generally known as TFT structures. In this case, the gate electrode can be a metal, a transparent conductive film, or a conductive polymer, as described above for the source and drain electrodes. In addition, as the gate insulating film, in addition to generally known silicon oxide and silicon nitride, structures combining them (including multilayer structures), or insulating films with a high dielectric constant called High-k can be used. As for the film deposition method, thin films fabricated using vacuum equipment, such as conventional sputtering and vacuum deposition, as well as thin films formed by solution processes such as inkjet, spin coating, and spray coating, and thin films fabricated by atomic layer deposition can be used. Furthermore, although a metal mask was used for patterning for TFT manufacturing in this case, it is not limited to this, and conventional microfabrication techniques such as well-known photolithography, etching, and lift-off can be applied.

[0035] Figure 1 is a schematic cross-sectional view of the TFT structure of the back gate. In the TFT 10 shown in Figure 1, an insulating layer 12 is provided on the substrate 20, and source and drain electrodes 14 and 16 and a semiconductor layer 18 are provided on top of it. In addition, a gate electrode (not shown) is provided on a part of the insulating layer 12. In a TFT 10 with this structure, ultraviolet irradiation can be performed after the semiconductor layer 18 is fabricated, or after the source and drain electrodes 14 and 16 are formed. Furthermore, ultraviolet irradiation can be performed both after the semiconductor layer 18 is fabricated and after the source and drain electrodes 14 and 16 are formed.

[0036] Figure 2 is a schematic cross-sectional view of the TFT structure of the top gate structure. In the TFT 10 shown in Figure 2, source and drain electrodes 14 and 16 and a semiconductor layer 18 are provided on a substrate 20, and an insulating layer 12 is provided on top of these. A gate electrode 22 is also provided on top of the insulating layer 12. In a TFT 10 with this structure, ultraviolet irradiation can be performed after the semiconductor layer 18 is fabricated, or after the source and drain electrodes 14 and 16 are formed, after the ultraviolet-transmitting insulating film 12 is formed, or after the ultraviolet-transmitting gate electrode 22 is formed. Furthermore, the process can be combined in two or more ways, or ultraviolet irradiation can be performed after all processes have been completed.

[0037] Figure 3 is a schematic cross-sectional view of the TFT structure of the bottom gate structure. In the TFT10 shown in Figure 3, a gate electrode 22 is provided on the substrate 20, and an insulating layer 12 is provided so as to cover the upper part of the gate electrode 22. Furthermore, source and drain electrodes 14 and 16 and a semiconductor layer 18 are provided on the insulating layer 12. In a TFT 10 with this structure, ultraviolet irradiation can be performed either after the semiconductor layer 18 is fabricated, or after the source and drain electrodes 14 and 16 are formed, or after an ultraviolet-transmitting protective layer (not shown) is formed. Furthermore, the process can be combined in two or more ways, or ultraviolet irradiation can be performed after all processes have been completed.

[0038] From the viewpoint of electrical properties, the concentration ratio of the metal-oxygen bond component in the semiconductor layer of a thin-film transistor obtained by the manufacturing method of a thin-film transistor according to this disclosure is preferably 20 atomic% to 90 atomic%, and more preferably 30 atomic% to 80 atomic%. From the viewpoint of electrical properties, the concentration ratio of the oxygen vacancy component in the semiconductor layer of a thin-film transistor obtained by the manufacturing method of a thin-film transistor according to this disclosure is preferably 10 atomic% to 60 atomic%, and more preferably 20 atomic% to 50 atomic%. From the viewpoint of electrical properties, the concentration ratio of the adsorbed oxygen component in the semiconductor layer of a thin-film transistor obtained by the manufacturing method of a thin-film transistor according to this disclosure is preferably 0 atomic% to 35 atomic%, and more preferably 0 atomic% to 25 atomic%.

[0039] The chemical bonding state of the semiconductor layer (concentration ratio of metal-oxygen bonded components, concentration ratio of oxygen vacancy components, and concentration ratio of adsorbed oxygen components) can be measured using an X-ray photoelectron spectrometer (XPS, JEOLJPS9030, manufactured by JEOL Ltd.).

[0040] The film density of the semiconductor layer in the thin-film transistor obtained by the thin-film transistor manufacturing method according to this disclosure is 6.20 g / cm³ from the viewpoint of electrical properties. 3 ~7.10g / cm 3 Preferably, it is 6.40 g / cm³. 3 ~6.90g / cm 3 It is preferable that it be so.

[0041] The film density of a semiconductor layer can be measured and calculated using an X-ray reflectance analyzer (XRR, RigakuSmartLab, manufactured by Rigaku Corporation).

[0042] The thin-film transistor obtained by the manufacturing method of the thin-film transistor according to this disclosure can be manufactured without heat treatment, producing a highly stable amorphous oxide TFT without using gases harmful to the human body. Therefore, it is possible to provide a TFT that does not limit the type of flexible substrate, and applications such as displays, solar cells, touch panel sensors, image sensors, and gas sensors using the TFT. Furthermore, thin-film transistors obtained by the thin-film transistor manufacturing method described herein can be incorporated not only into flexible device applications but also into the manufacturing processes of DRAMs, CMOSs, and active-matrix elements made using amorphous oxide semiconductors, enabling the provision of an energy-saving and environmentally friendly manufacturing method that does not involve heating. [Examples]

[0043] The present disclosure will be described in detail below based on specific examples, but the disclosure is not limited thereto.

[0044] (Example 1) A boron-doped indium oxide semiconductor layer was deposited on an SiO2 (200 nm) / Si substrate, ultrasonically cleaned in acetone and isopropanol, using an RF (radio frequency) magnetron sputtering system (Canon Anelva L-332SFH) via a metal mask, with a thickness of 15 nm. The sputtering conditions were a total pressure of 0.16 Pa, an Ar flow rate of 8.5 sccm, an oxygen flow rate of 1.5 sccm, and an RF power of 100 W. Next, a back-gate TFT was fabricated using an electron beam deposition system (JEOL Ltd. JBS-Z0501EVC) to deposit Ti (50 nm) as the source and drain electrodes, with a Si substrate as the gate electrode. The source and drain electrodes were patterned using a metal mask. The fabricated TFT was sealed in a quartz tube, evacuated, and then filled with air. The TFT was then irradiated with ultraviolet light (center wavelength 365 nm) for 15 minutes. The substrate temperature was 25°C. After stopping the UV light, the fabricated TFTs were left to stand in the same environment for one hour. Finally, a yttrium oxide protective layer was deposited to a thickness of 100 nm using an RF magnetron sputtering system (Canon Anelva L-332S-FH) via a metal mask. The sputtering conditions were a total pressure of 0.5 Pa, an Ar flow rate of 5 sccm, an oxygen flow rate of 5 sccm, and an RF power of 50 W. The transfer characteristics of the fabricated TFTs were measured at room temperature (25°C), in air, and in a light-shielded environment using a semiconductor parameter analyzer (Agilent HP 4156A) connected to a vacuum manual prober. Figure 4 shows the transfer characteristics of the TFT fabricated in the above process. The vertical axis of Figure 4 represents the drain current (I D The horizontal axis represents the gate voltage (V), with the horizontal axis being the gate voltage (V). G , represents the unit V, V D This represents the drain voltage (in volts). As shown in Figure 4, hysteresis was completely eliminated by performing the irradiation process, the standing process, and the protective layer formation process.

[0045] (Comparative Example 1) The procedure was the same as in Example 1, except that the irradiation step, the standing step, and the protective layer formation step were omitted. Figure 5 shows the transfer characteristics of the fabricated TFT. The vertical axis in Figure 5 represents the drain current (I D , unit: A), and the horizontal axis represents the gate voltage (V G , unit: V), and V D represents the drain voltage (unit: V). As shown in Figure 5, compared with Figure 4, the width of the hysteresis window (V hys ) was large, and the electrical characteristics were inferior.

[0046] (Comparative Example 2) It was carried out in the same manner as in Example 1 except that the standing process and the protective layer formation process were not performed. Figure 6 shows the transfer characteristics of the fabricated TFT. The vertical axis in Figure 6 represents the drain current (I D , unit: A), and the horizontal axis represents the gate voltage (V G , unit: V), and V D represents the drain voltage (unit: V). As shown in Figure 6, compared with Figure 4, hysteresis remained, and the electrical characteristics were inferior.

[0047] (Comparative Example 3) It was carried out in the same manner as in Example 1 except that the irradiation process was not performed. Figure 7 shows the transfer characteristics of the fabricated TFT. The vertical axis in Figure 7 represents the drain current (I D , unit: A), and the horizontal axis represents the gate voltage (V G , unit: V), and V D represents the drain voltage (unit: V). As shown in Figure 7, compared with Figure 5, a decrease in the width of the hysteresis window (V hys ) can be confirmed, but hysteresis still remains, and compared with Figure 4, the electrical characteristics were inferior.

[0048] (Comparative Example 4) It was carried out in the same manner as in Example 1 except that the air atmosphere in the irradiation process was changed to a nitrogen atmosphere. The obtained TFT had metallic characteristics that did not exhibit on / off operation within the range of gate voltages of ±40 V.

[0049] (Reference example 1) In Example 1, the transfer characteristics of the TFT were measured immediately after standing for 60 seconds, 180 seconds, 300 seconds, 600 seconds, 1200 seconds, 1800 seconds, 2400 seconds, 3000 seconds, or 3600 seconds during the standing process (i.e., before the protective formation process). The transfer characteristics graph gradually changes from 60 seconds to 3600 seconds, suggesting that some phenomenon is occurring during the standing process. Furthermore, when the standing time was greater than 3600 seconds, the change in the transfer characteristic graph was smaller compared to when the standing time was 3600 seconds.

[0050] [Negative Gate Voltage Induced Instability Test] (Example 2) TFTs were fabricated in the same manner as in Example 1. Using the obtained TFTs, a negative gate voltage-induced instability test was performed. Figure 8 shows the results of a negative gate voltage induced instability test of the TFT fabricated in the above process. The transfer characteristics were measured after applying a gate voltage stress of -40V for a certain period of time. In Figure 8, the vertical axis represents drain current (ID, in amperes), the horizontal axis represents gate voltage (VG, in volts), and VD represents drain voltage (in volts). Here, we show the results for four gate voltage stress application times: 0 seconds (solid line), 600 seconds (dotted line), 3600 seconds (dashed line), and 10800 seconds (double-dotted line). As shown in Figure 8, by performing the irradiation process, the standing process, and the protective layer formation process, a graph showing no change in transfer characteristics was obtained, and a TFT capable of withstanding long-term degradation testing was fabricated.

[0051] (Comparative Example 5) The procedure was the same as in Example 2, except that the settling step and the protective layer formation step were omitted. Figure 9 shows the results of the negative gate voltage induced instability test of the fabricated TFT. In Figure 9, the vertical axis represents the drain current (ID, in amperes), the horizontal axis represents the gate voltage (VG, in volts), and VD represents the drain voltage (in volts). As shown in Figure 9, a change in transfer characteristics was observed compared to Figure 8, indicating that the TFT could not withstand long-term degradation testing.

Claims

1. A process for forming a semiconductor layer containing a metal oxide on a substrate, A step of irradiating the semiconductor layer with ultraviolet light in an oxygen-containing atmosphere and at a substrate temperature of 50°C or less. A step of allowing the semiconductor layer irradiated with ultraviolet light to stand, The process includes forming a protective layer on the semiconductor layer that has been left to stand. A method for manufacturing thin-film transistors.

2. The method for manufacturing a thin-film transistor according to claim 1, wherein the resting time in the resting step is 60 seconds to 6 hours.

3. The method for manufacturing a thin-film transistor according to claim 1, wherein the standing temperature in the standing step is 50°C or less.

4. The method for manufacturing a thin-film transistor according to claim 1, wherein the irradiation of ultraviolet light in the irradiation step is performed in an air atmosphere.

5. The method for manufacturing a thin-film transistor according to claim 1, wherein the substrate is a plastic substrate.

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